node-red-STM32/OZE_Main/Debug/OZE_Main.list

OZE_Main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000298  08000000  08000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0002cf40  080002a0  080002a0  000012a0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00004e0c  0802d1e0  0802d1e0  0002e1e0  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  08031fec  08031fec  00032fec  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08031ff4  08031ff4  00032ff4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .fini_array   00000004  08031ff8  08031ff8  00032ff8  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  6 .data         00000224  24000000  08031ffc  00033000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          0002b044  24000224  08032220  00033224  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  2402b268  08032220  00033268  2**0
                  ALLOC
  9 .lwip_sec     0001931b  2402b868  08032220  00033868  2**2
                  ALLOC
 10 .ARM.attributes 0000002e  00000000  00000000  00033224  2**0
                  CONTENTS, READONLY
 11 .debug_info   00051d1d  00000000  00000000  00033252  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 12 .debug_abbrev 0000b72e  00000000  00000000  00084f6f  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 13 .debug_aranges 00003848  00000000  00000000  000906a0  2**3
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 14 .debug_rnglists 00002cf9  00000000  00000000  00093ee8  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 15 .debug_macro  0004f343  00000000  00000000  00096be1  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 16 .debug_line   00057cb9  00000000  00000000  000e5f24  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 17 .debug_str    0018eb0b  00000000  00000000  0013dbdd  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 18 .comment      00000043  00000000  00000000  002cc6e8  2**0
                  CONTENTS, READONLY
 19 .debug_frame  0000fc30  00000000  00000000  002cc72c  2**2
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 20 .debug_line_str 00000064  00000000  00000000  002dc35c  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS

Disassembly of section .text:

080002a0 <__do_global_dtors_aux>:
 80002a0:	b510      	push	{r4, lr}
 80002a2:	4c05      	ldr	r4, [pc, #20]	@ (80002b8 <__do_global_dtors_aux+0x18>)
 80002a4:	7823      	ldrb	r3, [r4, #0]
 80002a6:	b933      	cbnz	r3, 80002b6 <__do_global_dtors_aux+0x16>
 80002a8:	4b04      	ldr	r3, [pc, #16]	@ (80002bc <__do_global_dtors_aux+0x1c>)
 80002aa:	b113      	cbz	r3, 80002b2 <__do_global_dtors_aux+0x12>
 80002ac:	4804      	ldr	r0, [pc, #16]	@ (80002c0 <__do_global_dtors_aux+0x20>)
 80002ae:	f3af 8000 	nop.w
 80002b2:	2301      	movs	r3, #1
 80002b4:	7023      	strb	r3, [r4, #0]
 80002b6:	bd10      	pop	{r4, pc}
 80002b8:	24000224 	.word	0x24000224
 80002bc:	00000000 	.word	0x00000000
 80002c0:	0802d1c8 	.word	0x0802d1c8

080002c4 <frame_dummy>:
 80002c4:	b508      	push	{r3, lr}
 80002c6:	4b03      	ldr	r3, [pc, #12]	@ (80002d4 <frame_dummy+0x10>)
 80002c8:	b11b      	cbz	r3, 80002d2 <frame_dummy+0xe>
 80002ca:	4903      	ldr	r1, [pc, #12]	@ (80002d8 <frame_dummy+0x14>)
 80002cc:	4803      	ldr	r0, [pc, #12]	@ (80002dc <frame_dummy+0x18>)
 80002ce:	f3af 8000 	nop.w
 80002d2:	bd08      	pop	{r3, pc}
 80002d4:	00000000 	.word	0x00000000
 80002d8:	24000228 	.word	0x24000228
 80002dc:	0802d1c8 	.word	0x0802d1c8

080002e0 <strcmp>:
 80002e0:	f810 2b01 	ldrb.w	r2, [r0], #1
 80002e4:	f811 3b01 	ldrb.w	r3, [r1], #1
 80002e8:	2a01      	cmp	r2, #1
 80002ea:	bf28      	it	cs
 80002ec:	429a      	cmpcs	r2, r3
 80002ee:	d0f7      	beq.n	80002e0 <strcmp>
 80002f0:	1ad0      	subs	r0, r2, r3
 80002f2:	4770      	bx	lr
	...

08000300 <memchr>:
 8000300:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 8000304:	2a10      	cmp	r2, #16
 8000306:	db2b      	blt.n	8000360 <memchr+0x60>
 8000308:	f010 0f07 	tst.w	r0, #7
 800030c:	d008      	beq.n	8000320 <memchr+0x20>
 800030e:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000312:	3a01      	subs	r2, #1
 8000314:	428b      	cmp	r3, r1
 8000316:	d02d      	beq.n	8000374 <memchr+0x74>
 8000318:	f010 0f07 	tst.w	r0, #7
 800031c:	b342      	cbz	r2, 8000370 <memchr+0x70>
 800031e:	d1f6      	bne.n	800030e <memchr+0xe>
 8000320:	b4f0      	push	{r4, r5, r6, r7}
 8000322:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
 8000326:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
 800032a:	f022 0407 	bic.w	r4, r2, #7
 800032e:	f07f 0700 	mvns.w	r7, #0
 8000332:	2300      	movs	r3, #0
 8000334:	e8f0 5602 	ldrd	r5, r6, [r0], #8
 8000338:	3c08      	subs	r4, #8
 800033a:	ea85 0501 	eor.w	r5, r5, r1
 800033e:	ea86 0601 	eor.w	r6, r6, r1
 8000342:	fa85 f547 	uadd8	r5, r5, r7
 8000346:	faa3 f587 	sel	r5, r3, r7
 800034a:	fa86 f647 	uadd8	r6, r6, r7
 800034e:	faa5 f687 	sel	r6, r5, r7
 8000352:	b98e      	cbnz	r6, 8000378 <memchr+0x78>
 8000354:	d1ee      	bne.n	8000334 <memchr+0x34>
 8000356:	bcf0      	pop	{r4, r5, r6, r7}
 8000358:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 800035c:	f002 0207 	and.w	r2, r2, #7
 8000360:	b132      	cbz	r2, 8000370 <memchr+0x70>
 8000362:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000366:	3a01      	subs	r2, #1
 8000368:	ea83 0301 	eor.w	r3, r3, r1
 800036c:	b113      	cbz	r3, 8000374 <memchr+0x74>
 800036e:	d1f8      	bne.n	8000362 <memchr+0x62>
 8000370:	2000      	movs	r0, #0
 8000372:	4770      	bx	lr
 8000374:	3801      	subs	r0, #1
 8000376:	4770      	bx	lr
 8000378:	2d00      	cmp	r5, #0
 800037a:	bf06      	itte	eq
 800037c:	4635      	moveq	r5, r6
 800037e:	3803      	subeq	r0, #3
 8000380:	3807      	subne	r0, #7
 8000382:	f015 0f01 	tst.w	r5, #1
 8000386:	d107      	bne.n	8000398 <memchr+0x98>
 8000388:	3001      	adds	r0, #1
 800038a:	f415 7f80 	tst.w	r5, #256	@ 0x100
 800038e:	bf02      	ittt	eq
 8000390:	3001      	addeq	r0, #1
 8000392:	f415 3fc0 	tsteq.w	r5, #98304	@ 0x18000
 8000396:	3001      	addeq	r0, #1
 8000398:	bcf0      	pop	{r4, r5, r6, r7}
 800039a:	3801      	subs	r0, #1
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop

080003a0 <strlen>:
 80003a0:	4603      	mov	r3, r0
 80003a2:	f813 2b01 	ldrb.w	r2, [r3], #1
 80003a6:	2a00      	cmp	r2, #0
 80003a8:	d1fb      	bne.n	80003a2 <strlen+0x2>
 80003aa:	1a18      	subs	r0, r3, r0
 80003ac:	3801      	subs	r0, #1
 80003ae:	4770      	bx	lr

080003b0 <__aeabi_drsub>:
 80003b0:	f081 4100 	eor.w	r1, r1, #2147483648	@ 0x80000000
 80003b4:	e002      	b.n	80003bc <__adddf3>
 80003b6:	bf00      	nop

080003b8 <__aeabi_dsub>:
 80003b8:	f083 4300 	eor.w	r3, r3, #2147483648	@ 0x80000000

080003bc <__adddf3>:
 80003bc:	b530      	push	{r4, r5, lr}
 80003be:	ea4f 0441 	mov.w	r4, r1, lsl #1
 80003c2:	ea4f 0543 	mov.w	r5, r3, lsl #1
 80003c6:	ea94 0f05 	teq	r4, r5
 80003ca:	bf08      	it	eq
 80003cc:	ea90 0f02 	teqeq	r0, r2
 80003d0:	bf1f      	itttt	ne
 80003d2:	ea54 0c00 	orrsne.w	ip, r4, r0
 80003d6:	ea55 0c02 	orrsne.w	ip, r5, r2
 80003da:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 80003de:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80003e2:	f000 80e2 	beq.w	80005aa <__adddf3+0x1ee>
 80003e6:	ea4f 5454 	mov.w	r4, r4, lsr #21
 80003ea:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 80003ee:	bfb8      	it	lt
 80003f0:	426d      	neglt	r5, r5
 80003f2:	dd0c      	ble.n	800040e <__adddf3+0x52>
 80003f4:	442c      	add	r4, r5
 80003f6:	ea80 0202 	eor.w	r2, r0, r2
 80003fa:	ea81 0303 	eor.w	r3, r1, r3
 80003fe:	ea82 0000 	eor.w	r0, r2, r0
 8000402:	ea83 0101 	eor.w	r1, r3, r1
 8000406:	ea80 0202 	eor.w	r2, r0, r2
 800040a:	ea81 0303 	eor.w	r3, r1, r3
 800040e:	2d36      	cmp	r5, #54	@ 0x36
 8000410:	bf88      	it	hi
 8000412:	bd30      	pophi	{r4, r5, pc}
 8000414:	f011 4f00 	tst.w	r1, #2147483648	@ 0x80000000
 8000418:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800041c:	f44f 1c80 	mov.w	ip, #1048576	@ 0x100000
 8000420:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 8000424:	d002      	beq.n	800042c <__adddf3+0x70>
 8000426:	4240      	negs	r0, r0
 8000428:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800042c:	f013 4f00 	tst.w	r3, #2147483648	@ 0x80000000
 8000430:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8000434:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 8000438:	d002      	beq.n	8000440 <__adddf3+0x84>
 800043a:	4252      	negs	r2, r2
 800043c:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 8000440:	ea94 0f05 	teq	r4, r5
 8000444:	f000 80a7 	beq.w	8000596 <__adddf3+0x1da>
 8000448:	f1a4 0401 	sub.w	r4, r4, #1
 800044c:	f1d5 0e20 	rsbs	lr, r5, #32
 8000450:	db0d      	blt.n	800046e <__adddf3+0xb2>
 8000452:	fa02 fc0e 	lsl.w	ip, r2, lr
 8000456:	fa22 f205 	lsr.w	r2, r2, r5
 800045a:	1880      	adds	r0, r0, r2
 800045c:	f141 0100 	adc.w	r1, r1, #0
 8000460:	fa03 f20e 	lsl.w	r2, r3, lr
 8000464:	1880      	adds	r0, r0, r2
 8000466:	fa43 f305 	asr.w	r3, r3, r5
 800046a:	4159      	adcs	r1, r3
 800046c:	e00e      	b.n	800048c <__adddf3+0xd0>
 800046e:	f1a5 0520 	sub.w	r5, r5, #32
 8000472:	f10e 0e20 	add.w	lr, lr, #32
 8000476:	2a01      	cmp	r2, #1
 8000478:	fa03 fc0e 	lsl.w	ip, r3, lr
 800047c:	bf28      	it	cs
 800047e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8000482:	fa43 f305 	asr.w	r3, r3, r5
 8000486:	18c0      	adds	r0, r0, r3
 8000488:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800048c:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 8000490:	d507      	bpl.n	80004a2 <__adddf3+0xe6>
 8000492:	f04f 0e00 	mov.w	lr, #0
 8000496:	f1dc 0c00 	rsbs	ip, ip, #0
 800049a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800049e:	eb6e 0101 	sbc.w	r1, lr, r1
 80004a2:	f5b1 1f80 	cmp.w	r1, #1048576	@ 0x100000
 80004a6:	d31b      	bcc.n	80004e0 <__adddf3+0x124>
 80004a8:	f5b1 1f00 	cmp.w	r1, #2097152	@ 0x200000
 80004ac:	d30c      	bcc.n	80004c8 <__adddf3+0x10c>
 80004ae:	0849      	lsrs	r1, r1, #1
 80004b0:	ea5f 0030 	movs.w	r0, r0, rrx
 80004b4:	ea4f 0c3c 	mov.w	ip, ip, rrx
 80004b8:	f104 0401 	add.w	r4, r4, #1
 80004bc:	ea4f 5244 	mov.w	r2, r4, lsl #21
 80004c0:	f512 0f80 	cmn.w	r2, #4194304	@ 0x400000
 80004c4:	f080 809a 	bcs.w	80005fc <__adddf3+0x240>
 80004c8:	f1bc 4f00 	cmp.w	ip, #2147483648	@ 0x80000000
 80004cc:	bf08      	it	eq
 80004ce:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 80004d2:	f150 0000 	adcs.w	r0, r0, #0
 80004d6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 80004da:	ea41 0105 	orr.w	r1, r1, r5
 80004de:	bd30      	pop	{r4, r5, pc}
 80004e0:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 80004e4:	4140      	adcs	r0, r0
 80004e6:	eb41 0101 	adc.w	r1, r1, r1
 80004ea:	3c01      	subs	r4, #1
 80004ec:	bf28      	it	cs
 80004ee:	f5b1 1f80 	cmpcs.w	r1, #1048576	@ 0x100000
 80004f2:	d2e9      	bcs.n	80004c8 <__adddf3+0x10c>
 80004f4:	f091 0f00 	teq	r1, #0
 80004f8:	bf04      	itt	eq
 80004fa:	4601      	moveq	r1, r0
 80004fc:	2000      	moveq	r0, #0
 80004fe:	fab1 f381 	clz	r3, r1
 8000502:	bf08      	it	eq
 8000504:	3320      	addeq	r3, #32
 8000506:	f1a3 030b 	sub.w	r3, r3, #11
 800050a:	f1b3 0220 	subs.w	r2, r3, #32
 800050e:	da0c      	bge.n	800052a <__adddf3+0x16e>
 8000510:	320c      	adds	r2, #12
 8000512:	dd08      	ble.n	8000526 <__adddf3+0x16a>
 8000514:	f102 0c14 	add.w	ip, r2, #20
 8000518:	f1c2 020c 	rsb	r2, r2, #12
 800051c:	fa01 f00c 	lsl.w	r0, r1, ip
 8000520:	fa21 f102 	lsr.w	r1, r1, r2
 8000524:	e00c      	b.n	8000540 <__adddf3+0x184>
 8000526:	f102 0214 	add.w	r2, r2, #20
 800052a:	bfd8      	it	le
 800052c:	f1c2 0c20 	rsble	ip, r2, #32
 8000530:	fa01 f102 	lsl.w	r1, r1, r2
 8000534:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000538:	bfdc      	itt	le
 800053a:	ea41 010c 	orrle.w	r1, r1, ip
 800053e:	4090      	lslle	r0, r2
 8000540:	1ae4      	subs	r4, r4, r3
 8000542:	bfa2      	ittt	ge
 8000544:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 8000548:	4329      	orrge	r1, r5
 800054a:	bd30      	popge	{r4, r5, pc}
 800054c:	ea6f 0404 	mvn.w	r4, r4
 8000550:	3c1f      	subs	r4, #31
 8000552:	da1c      	bge.n	800058e <__adddf3+0x1d2>
 8000554:	340c      	adds	r4, #12
 8000556:	dc0e      	bgt.n	8000576 <__adddf3+0x1ba>
 8000558:	f104 0414 	add.w	r4, r4, #20
 800055c:	f1c4 0220 	rsb	r2, r4, #32
 8000560:	fa20 f004 	lsr.w	r0, r0, r4
 8000564:	fa01 f302 	lsl.w	r3, r1, r2
 8000568:	ea40 0003 	orr.w	r0, r0, r3
 800056c:	fa21 f304 	lsr.w	r3, r1, r4
 8000570:	ea45 0103 	orr.w	r1, r5, r3
 8000574:	bd30      	pop	{r4, r5, pc}
 8000576:	f1c4 040c 	rsb	r4, r4, #12
 800057a:	f1c4 0220 	rsb	r2, r4, #32
 800057e:	fa20 f002 	lsr.w	r0, r0, r2
 8000582:	fa01 f304 	lsl.w	r3, r1, r4
 8000586:	ea40 0003 	orr.w	r0, r0, r3
 800058a:	4629      	mov	r1, r5
 800058c:	bd30      	pop	{r4, r5, pc}
 800058e:	fa21 f004 	lsr.w	r0, r1, r4
 8000592:	4629      	mov	r1, r5
 8000594:	bd30      	pop	{r4, r5, pc}
 8000596:	f094 0f00 	teq	r4, #0
 800059a:	f483 1380 	eor.w	r3, r3, #1048576	@ 0x100000
 800059e:	bf06      	itte	eq
 80005a0:	f481 1180 	eoreq.w	r1, r1, #1048576	@ 0x100000
 80005a4:	3401      	addeq	r4, #1
 80005a6:	3d01      	subne	r5, #1
 80005a8:	e74e      	b.n	8000448 <__adddf3+0x8c>
 80005aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80005ae:	bf18      	it	ne
 80005b0:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80005b4:	d029      	beq.n	800060a <__adddf3+0x24e>
 80005b6:	ea94 0f05 	teq	r4, r5
 80005ba:	bf08      	it	eq
 80005bc:	ea90 0f02 	teqeq	r0, r2
 80005c0:	d005      	beq.n	80005ce <__adddf3+0x212>
 80005c2:	ea54 0c00 	orrs.w	ip, r4, r0
 80005c6:	bf04      	itt	eq
 80005c8:	4619      	moveq	r1, r3
 80005ca:	4610      	moveq	r0, r2
 80005cc:	bd30      	pop	{r4, r5, pc}
 80005ce:	ea91 0f03 	teq	r1, r3
 80005d2:	bf1e      	ittt	ne
 80005d4:	2100      	movne	r1, #0
 80005d6:	2000      	movne	r0, #0
 80005d8:	bd30      	popne	{r4, r5, pc}
 80005da:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 80005de:	d105      	bne.n	80005ec <__adddf3+0x230>
 80005e0:	0040      	lsls	r0, r0, #1
 80005e2:	4149      	adcs	r1, r1
 80005e4:	bf28      	it	cs
 80005e6:	f041 4100 	orrcs.w	r1, r1, #2147483648	@ 0x80000000
 80005ea:	bd30      	pop	{r4, r5, pc}
 80005ec:	f514 0480 	adds.w	r4, r4, #4194304	@ 0x400000
 80005f0:	bf3c      	itt	cc
 80005f2:	f501 1180 	addcc.w	r1, r1, #1048576	@ 0x100000
 80005f6:	bd30      	popcc	{r4, r5, pc}
 80005f8:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80005fc:	f045 41fe 	orr.w	r1, r5, #2130706432	@ 0x7f000000
 8000600:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8000604:	f04f 0000 	mov.w	r0, #0
 8000608:	bd30      	pop	{r4, r5, pc}
 800060a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800060e:	bf1a      	itte	ne
 8000610:	4619      	movne	r1, r3
 8000612:	4610      	movne	r0, r2
 8000614:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 8000618:	bf1c      	itt	ne
 800061a:	460b      	movne	r3, r1
 800061c:	4602      	movne	r2, r0
 800061e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8000622:	bf06      	itte	eq
 8000624:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 8000628:	ea91 0f03 	teqeq	r1, r3
 800062c:	f441 2100 	orrne.w	r1, r1, #524288	@ 0x80000
 8000630:	bd30      	pop	{r4, r5, pc}
 8000632:	bf00      	nop

08000634 <__aeabi_ui2d>:
 8000634:	f090 0f00 	teq	r0, #0
 8000638:	bf04      	itt	eq
 800063a:	2100      	moveq	r1, #0
 800063c:	4770      	bxeq	lr
 800063e:	b530      	push	{r4, r5, lr}
 8000640:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000644:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000648:	f04f 0500 	mov.w	r5, #0
 800064c:	f04f 0100 	mov.w	r1, #0
 8000650:	e750      	b.n	80004f4 <__adddf3+0x138>
 8000652:	bf00      	nop

08000654 <__aeabi_i2d>:
 8000654:	f090 0f00 	teq	r0, #0
 8000658:	bf04      	itt	eq
 800065a:	2100      	moveq	r1, #0
 800065c:	4770      	bxeq	lr
 800065e:	b530      	push	{r4, r5, lr}
 8000660:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000664:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000668:	f010 4500 	ands.w	r5, r0, #2147483648	@ 0x80000000
 800066c:	bf48      	it	mi
 800066e:	4240      	negmi	r0, r0
 8000670:	f04f 0100 	mov.w	r1, #0
 8000674:	e73e      	b.n	80004f4 <__adddf3+0x138>
 8000676:	bf00      	nop

08000678 <__aeabi_f2d>:
 8000678:	0042      	lsls	r2, r0, #1
 800067a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800067e:	ea4f 0131 	mov.w	r1, r1, rrx
 8000682:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8000686:	bf1f      	itttt	ne
 8000688:	f012 437f 	andsne.w	r3, r2, #4278190080	@ 0xff000000
 800068c:	f093 4f7f 	teqne	r3, #4278190080	@ 0xff000000
 8000690:	f081 5160 	eorne.w	r1, r1, #939524096	@ 0x38000000
 8000694:	4770      	bxne	lr
 8000696:	f032 427f 	bics.w	r2, r2, #4278190080	@ 0xff000000
 800069a:	bf08      	it	eq
 800069c:	4770      	bxeq	lr
 800069e:	f093 4f7f 	teq	r3, #4278190080	@ 0xff000000
 80006a2:	bf04      	itt	eq
 80006a4:	f441 2100 	orreq.w	r1, r1, #524288	@ 0x80000
 80006a8:	4770      	bxeq	lr
 80006aa:	b530      	push	{r4, r5, lr}
 80006ac:	f44f 7460 	mov.w	r4, #896	@ 0x380
 80006b0:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80006b4:	f021 4100 	bic.w	r1, r1, #2147483648	@ 0x80000000
 80006b8:	e71c      	b.n	80004f4 <__adddf3+0x138>
 80006ba:	bf00      	nop

080006bc <__aeabi_ul2d>:
 80006bc:	ea50 0201 	orrs.w	r2, r0, r1
 80006c0:	bf08      	it	eq
 80006c2:	4770      	bxeq	lr
 80006c4:	b530      	push	{r4, r5, lr}
 80006c6:	f04f 0500 	mov.w	r5, #0
 80006ca:	e00a      	b.n	80006e2 <__aeabi_l2d+0x16>

080006cc <__aeabi_l2d>:
 80006cc:	ea50 0201 	orrs.w	r2, r0, r1
 80006d0:	bf08      	it	eq
 80006d2:	4770      	bxeq	lr
 80006d4:	b530      	push	{r4, r5, lr}
 80006d6:	f011 4500 	ands.w	r5, r1, #2147483648	@ 0x80000000
 80006da:	d502      	bpl.n	80006e2 <__aeabi_l2d+0x16>
 80006dc:	4240      	negs	r0, r0
 80006de:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80006e2:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 80006e6:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 80006ea:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 80006ee:	f43f aed8 	beq.w	80004a2 <__adddf3+0xe6>
 80006f2:	f04f 0203 	mov.w	r2, #3
 80006f6:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 80006fa:	bf18      	it	ne
 80006fc:	3203      	addne	r2, #3
 80006fe:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8000702:	bf18      	it	ne
 8000704:	3203      	addne	r2, #3
 8000706:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800070a:	f1c2 0320 	rsb	r3, r2, #32
 800070e:	fa00 fc03 	lsl.w	ip, r0, r3
 8000712:	fa20 f002 	lsr.w	r0, r0, r2
 8000716:	fa01 fe03 	lsl.w	lr, r1, r3
 800071a:	ea40 000e 	orr.w	r0, r0, lr
 800071e:	fa21 f102 	lsr.w	r1, r1, r2
 8000722:	4414      	add	r4, r2
 8000724:	e6bd      	b.n	80004a2 <__adddf3+0xe6>
 8000726:	bf00      	nop

08000728 <__aeabi_uldivmod>:
 8000728:	b953      	cbnz	r3, 8000740 <__aeabi_uldivmod+0x18>
 800072a:	b94a      	cbnz	r2, 8000740 <__aeabi_uldivmod+0x18>
 800072c:	2900      	cmp	r1, #0
 800072e:	bf08      	it	eq
 8000730:	2800      	cmpeq	r0, #0
 8000732:	bf1c      	itt	ne
 8000734:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
 8000738:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
 800073c:	f000 b9a2 	b.w	8000a84 <__aeabi_idiv0>
 8000740:	f1ad 0c08 	sub.w	ip, sp, #8
 8000744:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000748:	f000 f83e 	bl	80007c8 <__udivmoddi4>
 800074c:	f8dd e004 	ldr.w	lr, [sp, #4]
 8000750:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000754:	b004      	add	sp, #16
 8000756:	4770      	bx	lr

08000758 <__aeabi_d2lz>:
 8000758:	b508      	push	{r3, lr}
 800075a:	4602      	mov	r2, r0
 800075c:	460b      	mov	r3, r1
 800075e:	ec43 2b17 	vmov	d7, r2, r3
 8000762:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8000766:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 800076a:	d403      	bmi.n	8000774 <__aeabi_d2lz+0x1c>
 800076c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8000770:	f000 b80a 	b.w	8000788 <__aeabi_d2ulz>
 8000774:	eeb1 7b47 	vneg.f64	d7, d7
 8000778:	ec51 0b17 	vmov	r0, r1, d7
 800077c:	f000 f804 	bl	8000788 <__aeabi_d2ulz>
 8000780:	4240      	negs	r0, r0
 8000782:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8000786:	bd08      	pop	{r3, pc}

08000788 <__aeabi_d2ulz>:
 8000788:	ed9f 6b0b 	vldr	d6, [pc, #44]	@ 80007b8 <__aeabi_d2ulz+0x30>
 800078c:	ec41 0b17 	vmov	d7, r0, r1
 8000790:	ed9f 5b0b 	vldr	d5, [pc, #44]	@ 80007c0 <__aeabi_d2ulz+0x38>
 8000794:	ee27 6b06 	vmul.f64	d6, d7, d6
 8000798:	eebc 6bc6 	vcvt.u32.f64	s12, d6
 800079c:	eeb8 4b46 	vcvt.f64.u32	d4, s12
 80007a0:	eea4 7b45 	vfms.f64	d7, d4, d5
 80007a4:	eefc 7bc7 	vcvt.u32.f64	s15, d7
 80007a8:	ee16 1a10 	vmov	r1, s12
 80007ac:	ee17 0a90 	vmov	r0, s15
 80007b0:	4770      	bx	lr
 80007b2:	bf00      	nop
 80007b4:	f3af 8000 	nop.w
 80007b8:	00000000 	.word	0x00000000
 80007bc:	3df00000 	.word	0x3df00000
 80007c0:	00000000 	.word	0x00000000
 80007c4:	41f00000 	.word	0x41f00000

080007c8 <__udivmoddi4>:
 80007c8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80007cc:	9d08      	ldr	r5, [sp, #32]
 80007ce:	460c      	mov	r4, r1
 80007d0:	2b00      	cmp	r3, #0
 80007d2:	d14e      	bne.n	8000872 <__udivmoddi4+0xaa>
 80007d4:	4694      	mov	ip, r2
 80007d6:	458c      	cmp	ip, r1
 80007d8:	4686      	mov	lr, r0
 80007da:	fab2 f282 	clz	r2, r2
 80007de:	d962      	bls.n	80008a6 <__udivmoddi4+0xde>
 80007e0:	b14a      	cbz	r2, 80007f6 <__udivmoddi4+0x2e>
 80007e2:	f1c2 0320 	rsb	r3, r2, #32
 80007e6:	4091      	lsls	r1, r2
 80007e8:	fa20 f303 	lsr.w	r3, r0, r3
 80007ec:	fa0c fc02 	lsl.w	ip, ip, r2
 80007f0:	4319      	orrs	r1, r3
 80007f2:	fa00 fe02 	lsl.w	lr, r0, r2
 80007f6:	ea4f 471c 	mov.w	r7, ip, lsr #16
 80007fa:	fa1f f68c 	uxth.w	r6, ip
 80007fe:	fbb1 f4f7 	udiv	r4, r1, r7
 8000802:	ea4f 431e 	mov.w	r3, lr, lsr #16
 8000806:	fb07 1114 	mls	r1, r7, r4, r1
 800080a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800080e:	fb04 f106 	mul.w	r1, r4, r6
 8000812:	4299      	cmp	r1, r3
 8000814:	d90a      	bls.n	800082c <__udivmoddi4+0x64>
 8000816:	eb1c 0303 	adds.w	r3, ip, r3
 800081a:	f104 30ff 	add.w	r0, r4, #4294967295	@ 0xffffffff
 800081e:	f080 8112 	bcs.w	8000a46 <__udivmoddi4+0x27e>
 8000822:	4299      	cmp	r1, r3
 8000824:	f240 810f 	bls.w	8000a46 <__udivmoddi4+0x27e>
 8000828:	3c02      	subs	r4, #2
 800082a:	4463      	add	r3, ip
 800082c:	1a59      	subs	r1, r3, r1
 800082e:	fa1f f38e 	uxth.w	r3, lr
 8000832:	fbb1 f0f7 	udiv	r0, r1, r7
 8000836:	fb07 1110 	mls	r1, r7, r0, r1
 800083a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800083e:	fb00 f606 	mul.w	r6, r0, r6
 8000842:	429e      	cmp	r6, r3
 8000844:	d90a      	bls.n	800085c <__udivmoddi4+0x94>
 8000846:	eb1c 0303 	adds.w	r3, ip, r3
 800084a:	f100 31ff 	add.w	r1, r0, #4294967295	@ 0xffffffff
 800084e:	f080 80fc 	bcs.w	8000a4a <__udivmoddi4+0x282>
 8000852:	429e      	cmp	r6, r3
 8000854:	f240 80f9 	bls.w	8000a4a <__udivmoddi4+0x282>
 8000858:	4463      	add	r3, ip
 800085a:	3802      	subs	r0, #2
 800085c:	1b9b      	subs	r3, r3, r6
 800085e:	ea40 4004 	orr.w	r0, r0, r4, lsl #16
 8000862:	2100      	movs	r1, #0
 8000864:	b11d      	cbz	r5, 800086e <__udivmoddi4+0xa6>
 8000866:	40d3      	lsrs	r3, r2
 8000868:	2200      	movs	r2, #0
 800086a:	e9c5 3200 	strd	r3, r2, [r5]
 800086e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000872:	428b      	cmp	r3, r1
 8000874:	d905      	bls.n	8000882 <__udivmoddi4+0xba>
 8000876:	b10d      	cbz	r5, 800087c <__udivmoddi4+0xb4>
 8000878:	e9c5 0100 	strd	r0, r1, [r5]
 800087c:	2100      	movs	r1, #0
 800087e:	4608      	mov	r0, r1
 8000880:	e7f5      	b.n	800086e <__udivmoddi4+0xa6>
 8000882:	fab3 f183 	clz	r1, r3
 8000886:	2900      	cmp	r1, #0
 8000888:	d146      	bne.n	8000918 <__udivmoddi4+0x150>
 800088a:	42a3      	cmp	r3, r4
 800088c:	d302      	bcc.n	8000894 <__udivmoddi4+0xcc>
 800088e:	4290      	cmp	r0, r2
 8000890:	f0c0 80f0 	bcc.w	8000a74 <__udivmoddi4+0x2ac>
 8000894:	1a86      	subs	r6, r0, r2
 8000896:	eb64 0303 	sbc.w	r3, r4, r3
 800089a:	2001      	movs	r0, #1
 800089c:	2d00      	cmp	r5, #0
 800089e:	d0e6      	beq.n	800086e <__udivmoddi4+0xa6>
 80008a0:	e9c5 6300 	strd	r6, r3, [r5]
 80008a4:	e7e3      	b.n	800086e <__udivmoddi4+0xa6>
 80008a6:	2a00      	cmp	r2, #0
 80008a8:	f040 8090 	bne.w	80009cc <__udivmoddi4+0x204>
 80008ac:	eba1 040c 	sub.w	r4, r1, ip
 80008b0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80008b4:	fa1f f78c 	uxth.w	r7, ip
 80008b8:	2101      	movs	r1, #1
 80008ba:	fbb4 f6f8 	udiv	r6, r4, r8
 80008be:	ea4f 431e 	mov.w	r3, lr, lsr #16
 80008c2:	fb08 4416 	mls	r4, r8, r6, r4
 80008c6:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008ca:	fb07 f006 	mul.w	r0, r7, r6
 80008ce:	4298      	cmp	r0, r3
 80008d0:	d908      	bls.n	80008e4 <__udivmoddi4+0x11c>
 80008d2:	eb1c 0303 	adds.w	r3, ip, r3
 80008d6:	f106 34ff 	add.w	r4, r6, #4294967295	@ 0xffffffff
 80008da:	d202      	bcs.n	80008e2 <__udivmoddi4+0x11a>
 80008dc:	4298      	cmp	r0, r3
 80008de:	f200 80cd 	bhi.w	8000a7c <__udivmoddi4+0x2b4>
 80008e2:	4626      	mov	r6, r4
 80008e4:	1a1c      	subs	r4, r3, r0
 80008e6:	fa1f f38e 	uxth.w	r3, lr
 80008ea:	fbb4 f0f8 	udiv	r0, r4, r8
 80008ee:	fb08 4410 	mls	r4, r8, r0, r4
 80008f2:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008f6:	fb00 f707 	mul.w	r7, r0, r7
 80008fa:	429f      	cmp	r7, r3
 80008fc:	d908      	bls.n	8000910 <__udivmoddi4+0x148>
 80008fe:	eb1c 0303 	adds.w	r3, ip, r3
 8000902:	f100 34ff 	add.w	r4, r0, #4294967295	@ 0xffffffff
 8000906:	d202      	bcs.n	800090e <__udivmoddi4+0x146>
 8000908:	429f      	cmp	r7, r3
 800090a:	f200 80b0 	bhi.w	8000a6e <__udivmoddi4+0x2a6>
 800090e:	4620      	mov	r0, r4
 8000910:	1bdb      	subs	r3, r3, r7
 8000912:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
 8000916:	e7a5      	b.n	8000864 <__udivmoddi4+0x9c>
 8000918:	f1c1 0620 	rsb	r6, r1, #32
 800091c:	408b      	lsls	r3, r1
 800091e:	fa22 f706 	lsr.w	r7, r2, r6
 8000922:	431f      	orrs	r7, r3
 8000924:	fa20 fc06 	lsr.w	ip, r0, r6
 8000928:	fa04 f301 	lsl.w	r3, r4, r1
 800092c:	ea43 030c 	orr.w	r3, r3, ip
 8000930:	40f4      	lsrs	r4, r6
 8000932:	fa00 f801 	lsl.w	r8, r0, r1
 8000936:	0c38      	lsrs	r0, r7, #16
 8000938:	ea4f 4913 	mov.w	r9, r3, lsr #16
 800093c:	fbb4 fef0 	udiv	lr, r4, r0
 8000940:	fa1f fc87 	uxth.w	ip, r7
 8000944:	fb00 441e 	mls	r4, r0, lr, r4
 8000948:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 800094c:	fb0e f90c 	mul.w	r9, lr, ip
 8000950:	45a1      	cmp	r9, r4
 8000952:	fa02 f201 	lsl.w	r2, r2, r1
 8000956:	d90a      	bls.n	800096e <__udivmoddi4+0x1a6>
 8000958:	193c      	adds	r4, r7, r4
 800095a:	f10e 3aff 	add.w	sl, lr, #4294967295	@ 0xffffffff
 800095e:	f080 8084 	bcs.w	8000a6a <__udivmoddi4+0x2a2>
 8000962:	45a1      	cmp	r9, r4
 8000964:	f240 8081 	bls.w	8000a6a <__udivmoddi4+0x2a2>
 8000968:	f1ae 0e02 	sub.w	lr, lr, #2
 800096c:	443c      	add	r4, r7
 800096e:	eba4 0409 	sub.w	r4, r4, r9
 8000972:	fa1f f983 	uxth.w	r9, r3
 8000976:	fbb4 f3f0 	udiv	r3, r4, r0
 800097a:	fb00 4413 	mls	r4, r0, r3, r4
 800097e:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 8000982:	fb03 fc0c 	mul.w	ip, r3, ip
 8000986:	45a4      	cmp	ip, r4
 8000988:	d907      	bls.n	800099a <__udivmoddi4+0x1d2>
 800098a:	193c      	adds	r4, r7, r4
 800098c:	f103 30ff 	add.w	r0, r3, #4294967295	@ 0xffffffff
 8000990:	d267      	bcs.n	8000a62 <__udivmoddi4+0x29a>
 8000992:	45a4      	cmp	ip, r4
 8000994:	d965      	bls.n	8000a62 <__udivmoddi4+0x29a>
 8000996:	3b02      	subs	r3, #2
 8000998:	443c      	add	r4, r7
 800099a:	ea43 400e 	orr.w	r0, r3, lr, lsl #16
 800099e:	fba0 9302 	umull	r9, r3, r0, r2
 80009a2:	eba4 040c 	sub.w	r4, r4, ip
 80009a6:	429c      	cmp	r4, r3
 80009a8:	46ce      	mov	lr, r9
 80009aa:	469c      	mov	ip, r3
 80009ac:	d351      	bcc.n	8000a52 <__udivmoddi4+0x28a>
 80009ae:	d04e      	beq.n	8000a4e <__udivmoddi4+0x286>
 80009b0:	b155      	cbz	r5, 80009c8 <__udivmoddi4+0x200>
 80009b2:	ebb8 030e 	subs.w	r3, r8, lr
 80009b6:	eb64 040c 	sbc.w	r4, r4, ip
 80009ba:	fa04 f606 	lsl.w	r6, r4, r6
 80009be:	40cb      	lsrs	r3, r1
 80009c0:	431e      	orrs	r6, r3
 80009c2:	40cc      	lsrs	r4, r1
 80009c4:	e9c5 6400 	strd	r6, r4, [r5]
 80009c8:	2100      	movs	r1, #0
 80009ca:	e750      	b.n	800086e <__udivmoddi4+0xa6>
 80009cc:	f1c2 0320 	rsb	r3, r2, #32
 80009d0:	fa20 f103 	lsr.w	r1, r0, r3
 80009d4:	fa0c fc02 	lsl.w	ip, ip, r2
 80009d8:	fa24 f303 	lsr.w	r3, r4, r3
 80009dc:	4094      	lsls	r4, r2
 80009de:	430c      	orrs	r4, r1
 80009e0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80009e4:	fa00 fe02 	lsl.w	lr, r0, r2
 80009e8:	fa1f f78c 	uxth.w	r7, ip
 80009ec:	fbb3 f0f8 	udiv	r0, r3, r8
 80009f0:	fb08 3110 	mls	r1, r8, r0, r3
 80009f4:	0c23      	lsrs	r3, r4, #16
 80009f6:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 80009fa:	fb00 f107 	mul.w	r1, r0, r7
 80009fe:	4299      	cmp	r1, r3
 8000a00:	d908      	bls.n	8000a14 <__udivmoddi4+0x24c>
 8000a02:	eb1c 0303 	adds.w	r3, ip, r3
 8000a06:	f100 36ff 	add.w	r6, r0, #4294967295	@ 0xffffffff
 8000a0a:	d22c      	bcs.n	8000a66 <__udivmoddi4+0x29e>
 8000a0c:	4299      	cmp	r1, r3
 8000a0e:	d92a      	bls.n	8000a66 <__udivmoddi4+0x29e>
 8000a10:	3802      	subs	r0, #2
 8000a12:	4463      	add	r3, ip
 8000a14:	1a5b      	subs	r3, r3, r1
 8000a16:	b2a4      	uxth	r4, r4
 8000a18:	fbb3 f1f8 	udiv	r1, r3, r8
 8000a1c:	fb08 3311 	mls	r3, r8, r1, r3
 8000a20:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000a24:	fb01 f307 	mul.w	r3, r1, r7
 8000a28:	42a3      	cmp	r3, r4
 8000a2a:	d908      	bls.n	8000a3e <__udivmoddi4+0x276>
 8000a2c:	eb1c 0404 	adds.w	r4, ip, r4
 8000a30:	f101 36ff 	add.w	r6, r1, #4294967295	@ 0xffffffff
 8000a34:	d213      	bcs.n	8000a5e <__udivmoddi4+0x296>
 8000a36:	42a3      	cmp	r3, r4
 8000a38:	d911      	bls.n	8000a5e <__udivmoddi4+0x296>
 8000a3a:	3902      	subs	r1, #2
 8000a3c:	4464      	add	r4, ip
 8000a3e:	1ae4      	subs	r4, r4, r3
 8000a40:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 8000a44:	e739      	b.n	80008ba <__udivmoddi4+0xf2>
 8000a46:	4604      	mov	r4, r0
 8000a48:	e6f0      	b.n	800082c <__udivmoddi4+0x64>
 8000a4a:	4608      	mov	r0, r1
 8000a4c:	e706      	b.n	800085c <__udivmoddi4+0x94>
 8000a4e:	45c8      	cmp	r8, r9
 8000a50:	d2ae      	bcs.n	80009b0 <__udivmoddi4+0x1e8>
 8000a52:	ebb9 0e02 	subs.w	lr, r9, r2
 8000a56:	eb63 0c07 	sbc.w	ip, r3, r7
 8000a5a:	3801      	subs	r0, #1
 8000a5c:	e7a8      	b.n	80009b0 <__udivmoddi4+0x1e8>
 8000a5e:	4631      	mov	r1, r6
 8000a60:	e7ed      	b.n	8000a3e <__udivmoddi4+0x276>
 8000a62:	4603      	mov	r3, r0
 8000a64:	e799      	b.n	800099a <__udivmoddi4+0x1d2>
 8000a66:	4630      	mov	r0, r6
 8000a68:	e7d4      	b.n	8000a14 <__udivmoddi4+0x24c>
 8000a6a:	46d6      	mov	lr, sl
 8000a6c:	e77f      	b.n	800096e <__udivmoddi4+0x1a6>
 8000a6e:	4463      	add	r3, ip
 8000a70:	3802      	subs	r0, #2
 8000a72:	e74d      	b.n	8000910 <__udivmoddi4+0x148>
 8000a74:	4606      	mov	r6, r0
 8000a76:	4623      	mov	r3, r4
 8000a78:	4608      	mov	r0, r1
 8000a7a:	e70f      	b.n	800089c <__udivmoddi4+0xd4>
 8000a7c:	3e02      	subs	r6, #2
 8000a7e:	4463      	add	r3, ip
 8000a80:	e730      	b.n	80008e4 <__udivmoddi4+0x11c>
 8000a82:	bf00      	nop

08000a84 <__aeabi_idiv0>:
 8000a84:	4770      	bx	lr
 8000a86:	bf00      	nop

08000a88 <case_insensitive_strcmp>:
    return version;
}

/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
 8000a88:	b480      	push	{r7}
 8000a8a:	b085      	sub	sp, #20
 8000a8c:	af00      	add	r7, sp, #0
 8000a8e:	6078      	str	r0, [r7, #4]
 8000a90:	6039      	str	r1, [r7, #0]
    if ((string1 == NULL) || (string2 == NULL))
 8000a92:	687b      	ldr	r3, [r7, #4]
 8000a94:	2b00      	cmp	r3, #0
 8000a96:	d002      	beq.n	8000a9e <case_insensitive_strcmp+0x16>
 8000a98:	683b      	ldr	r3, [r7, #0]
 8000a9a:	2b00      	cmp	r3, #0
 8000a9c:	d101      	bne.n	8000aa2 <case_insensitive_strcmp+0x1a>
    {
        return 1;
 8000a9e:	2301      	movs	r3, #1
 8000aa0:	e056      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    if (string1 == string2)
 8000aa2:	687a      	ldr	r2, [r7, #4]
 8000aa4:	683b      	ldr	r3, [r7, #0]
 8000aa6:	429a      	cmp	r2, r3
 8000aa8:	d10d      	bne.n	8000ac6 <case_insensitive_strcmp+0x3e>
    {
        return 0;
 8000aaa:	2300      	movs	r3, #0
 8000aac:	e050      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
    {
        if (*string1 == '\0')
 8000aae:	687b      	ldr	r3, [r7, #4]
 8000ab0:	781b      	ldrb	r3, [r3, #0]
 8000ab2:	2b00      	cmp	r3, #0
 8000ab4:	d101      	bne.n	8000aba <case_insensitive_strcmp+0x32>
        {
            return 0;
 8000ab6:	2300      	movs	r3, #0
 8000ab8:	e04a      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
 8000aba:	687b      	ldr	r3, [r7, #4]
 8000abc:	3301      	adds	r3, #1
 8000abe:	607b      	str	r3, [r7, #4]
 8000ac0:	683b      	ldr	r3, [r7, #0]
 8000ac2:	3301      	adds	r3, #1
 8000ac4:	603b      	str	r3, [r7, #0]
 8000ac6:	687b      	ldr	r3, [r7, #4]
 8000ac8:	781b      	ldrb	r3, [r3, #0]
 8000aca:	73fb      	strb	r3, [r7, #15]
 8000acc:	7bfb      	ldrb	r3, [r7, #15]
 8000ace:	3301      	adds	r3, #1
 8000ad0:	4a22      	ldr	r2, [pc, #136]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000ad2:	4413      	add	r3, r2
 8000ad4:	781b      	ldrb	r3, [r3, #0]
 8000ad6:	f003 0303 	and.w	r3, r3, #3
 8000ada:	2b01      	cmp	r3, #1
 8000adc:	d103      	bne.n	8000ae6 <case_insensitive_strcmp+0x5e>
 8000ade:	7bfb      	ldrb	r3, [r7, #15]
 8000ae0:	f103 0220 	add.w	r2, r3, #32
 8000ae4:	e000      	b.n	8000ae8 <case_insensitive_strcmp+0x60>
 8000ae6:	7bfa      	ldrb	r2, [r7, #15]
 8000ae8:	683b      	ldr	r3, [r7, #0]
 8000aea:	781b      	ldrb	r3, [r3, #0]
 8000aec:	73bb      	strb	r3, [r7, #14]
 8000aee:	7bbb      	ldrb	r3, [r7, #14]
 8000af0:	3301      	adds	r3, #1
 8000af2:	491a      	ldr	r1, [pc, #104]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000af4:	440b      	add	r3, r1
 8000af6:	781b      	ldrb	r3, [r3, #0]
 8000af8:	f003 0303 	and.w	r3, r3, #3
 8000afc:	2b01      	cmp	r3, #1
 8000afe:	d102      	bne.n	8000b06 <case_insensitive_strcmp+0x7e>
 8000b00:	7bbb      	ldrb	r3, [r7, #14]
 8000b02:	3320      	adds	r3, #32
 8000b04:	e000      	b.n	8000b08 <case_insensitive_strcmp+0x80>
 8000b06:	7bbb      	ldrb	r3, [r7, #14]
 8000b08:	429a      	cmp	r2, r3
 8000b0a:	d0d0      	beq.n	8000aae <case_insensitive_strcmp+0x26>
        }
    }

    return tolower(*string1) - tolower(*string2);
 8000b0c:	687b      	ldr	r3, [r7, #4]
 8000b0e:	781b      	ldrb	r3, [r3, #0]
 8000b10:	737b      	strb	r3, [r7, #13]
 8000b12:	7b7b      	ldrb	r3, [r7, #13]
 8000b14:	3301      	adds	r3, #1
 8000b16:	4a11      	ldr	r2, [pc, #68]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b18:	4413      	add	r3, r2
 8000b1a:	781b      	ldrb	r3, [r3, #0]
 8000b1c:	f003 0303 	and.w	r3, r3, #3
 8000b20:	2b01      	cmp	r3, #1
 8000b22:	d103      	bne.n	8000b2c <case_insensitive_strcmp+0xa4>
 8000b24:	7b7b      	ldrb	r3, [r7, #13]
 8000b26:	f103 0220 	add.w	r2, r3, #32
 8000b2a:	e000      	b.n	8000b2e <case_insensitive_strcmp+0xa6>
 8000b2c:	7b7a      	ldrb	r2, [r7, #13]
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	781b      	ldrb	r3, [r3, #0]
 8000b32:	733b      	strb	r3, [r7, #12]
 8000b34:	7b3b      	ldrb	r3, [r7, #12]
 8000b36:	3301      	adds	r3, #1
 8000b38:	4908      	ldr	r1, [pc, #32]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b3a:	440b      	add	r3, r1
 8000b3c:	781b      	ldrb	r3, [r3, #0]
 8000b3e:	f003 0303 	and.w	r3, r3, #3
 8000b42:	2b01      	cmp	r3, #1
 8000b44:	d102      	bne.n	8000b4c <case_insensitive_strcmp+0xc4>
 8000b46:	7b3b      	ldrb	r3, [r7, #12]
 8000b48:	3320      	adds	r3, #32
 8000b4a:	e000      	b.n	8000b4e <case_insensitive_strcmp+0xc6>
 8000b4c:	7b3b      	ldrb	r3, [r7, #12]
 8000b4e:	1ad3      	subs	r3, r2, r3
}
 8000b50:	4618      	mov	r0, r3
 8000b52:	3714      	adds	r7, #20
 8000b54:	46bd      	mov	sp, r7
 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000b5a:	4770      	bx	lr
 8000b5c:	08031c30 	.word	0x08031c30

08000b60 <cJSON_New_Item>:
    }
}

/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
 8000b60:	b580      	push	{r7, lr}
 8000b62:	b084      	sub	sp, #16
 8000b64:	af00      	add	r7, sp, #0
 8000b66:	6078      	str	r0, [r7, #4]
    cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	681b      	ldr	r3, [r3, #0]
 8000b6c:	2028      	movs	r0, #40	@ 0x28
 8000b6e:	4798      	blx	r3
 8000b70:	60f8      	str	r0, [r7, #12]
    if (node)
 8000b72:	68fb      	ldr	r3, [r7, #12]
 8000b74:	2b00      	cmp	r3, #0
 8000b76:	d004      	beq.n	8000b82 <cJSON_New_Item+0x22>
    {
        memset(node, '\0', sizeof(cJSON));
 8000b78:	2228      	movs	r2, #40	@ 0x28
 8000b7a:	2100      	movs	r1, #0
 8000b7c:	68f8      	ldr	r0, [r7, #12]
 8000b7e:	f029 ff7f 	bl	802aa80 <memset>
    }

    return node;
 8000b82:	68fb      	ldr	r3, [r7, #12]
}
 8000b84:	4618      	mov	r0, r3
 8000b86:	3710      	adds	r7, #16
 8000b88:	46bd      	mov	sp, r7
 8000b8a:	bd80      	pop	{r7, pc}

08000b8c <cJSON_Delete>:

/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
 8000b8c:	b580      	push	{r7, lr}
 8000b8e:	b084      	sub	sp, #16
 8000b90:	af00      	add	r7, sp, #0
 8000b92:	6078      	str	r0, [r7, #4]
    cJSON *next = NULL;
 8000b94:	2300      	movs	r3, #0
 8000b96:	60fb      	str	r3, [r7, #12]
    while (item != NULL)
 8000b98:	e03d      	b.n	8000c16 <cJSON_Delete+0x8a>
    {
        next = item->next;
 8000b9a:	687b      	ldr	r3, [r7, #4]
 8000b9c:	681b      	ldr	r3, [r3, #0]
 8000b9e:	60fb      	str	r3, [r7, #12]
        if (!(item->type & cJSON_IsReference) && (item->child != NULL))
 8000ba0:	687b      	ldr	r3, [r7, #4]
 8000ba2:	68db      	ldr	r3, [r3, #12]
 8000ba4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000ba8:	2b00      	cmp	r3, #0
 8000baa:	d108      	bne.n	8000bbe <cJSON_Delete+0x32>
 8000bac:	687b      	ldr	r3, [r7, #4]
 8000bae:	689b      	ldr	r3, [r3, #8]
 8000bb0:	2b00      	cmp	r3, #0
 8000bb2:	d004      	beq.n	8000bbe <cJSON_Delete+0x32>
        {
            cJSON_Delete(item->child);
 8000bb4:	687b      	ldr	r3, [r7, #4]
 8000bb6:	689b      	ldr	r3, [r3, #8]
 8000bb8:	4618      	mov	r0, r3
 8000bba:	f7ff ffe7 	bl	8000b8c <cJSON_Delete>
        }
        if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
 8000bbe:	687b      	ldr	r3, [r7, #4]
 8000bc0:	68db      	ldr	r3, [r3, #12]
 8000bc2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000bc6:	2b00      	cmp	r3, #0
 8000bc8:	d10c      	bne.n	8000be4 <cJSON_Delete+0x58>
 8000bca:	687b      	ldr	r3, [r7, #4]
 8000bcc:	691b      	ldr	r3, [r3, #16]
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d008      	beq.n	8000be4 <cJSON_Delete+0x58>
        {
            global_hooks.deallocate(item->valuestring);
 8000bd2:	4b15      	ldr	r3, [pc, #84]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bd4:	685b      	ldr	r3, [r3, #4]
 8000bd6:	687a      	ldr	r2, [r7, #4]
 8000bd8:	6912      	ldr	r2, [r2, #16]
 8000bda:	4610      	mov	r0, r2
 8000bdc:	4798      	blx	r3
            item->valuestring = NULL;
 8000bde:	687b      	ldr	r3, [r7, #4]
 8000be0:	2200      	movs	r2, #0
 8000be2:	611a      	str	r2, [r3, #16]
        }
        if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
 8000be4:	687b      	ldr	r3, [r7, #4]
 8000be6:	68db      	ldr	r3, [r3, #12]
 8000be8:	f403 7300 	and.w	r3, r3, #512	@ 0x200
 8000bec:	2b00      	cmp	r3, #0
 8000bee:	d10c      	bne.n	8000c0a <cJSON_Delete+0x7e>
 8000bf0:	687b      	ldr	r3, [r7, #4]
 8000bf2:	6a1b      	ldr	r3, [r3, #32]
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d008      	beq.n	8000c0a <cJSON_Delete+0x7e>
        {
            global_hooks.deallocate(item->string);
 8000bf8:	4b0b      	ldr	r3, [pc, #44]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bfa:	685b      	ldr	r3, [r3, #4]
 8000bfc:	687a      	ldr	r2, [r7, #4]
 8000bfe:	6a12      	ldr	r2, [r2, #32]
 8000c00:	4610      	mov	r0, r2
 8000c02:	4798      	blx	r3
            item->string = NULL;
 8000c04:	687b      	ldr	r3, [r7, #4]
 8000c06:	2200      	movs	r2, #0
 8000c08:	621a      	str	r2, [r3, #32]
        }
        global_hooks.deallocate(item);
 8000c0a:	4b07      	ldr	r3, [pc, #28]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000c0c:	685b      	ldr	r3, [r3, #4]
 8000c0e:	6878      	ldr	r0, [r7, #4]
 8000c10:	4798      	blx	r3
        item = next;
 8000c12:	68fb      	ldr	r3, [r7, #12]
 8000c14:	607b      	str	r3, [r7, #4]
    while (item != NULL)
 8000c16:	687b      	ldr	r3, [r7, #4]
 8000c18:	2b00      	cmp	r3, #0
 8000c1a:	d1be      	bne.n	8000b9a <cJSON_Delete+0xe>
    }
}
 8000c1c:	bf00      	nop
 8000c1e:	bf00      	nop
 8000c20:	3710      	adds	r7, #16
 8000c22:	46bd      	mov	sp, r7
 8000c24:	bd80      	pop	{r7, pc}
 8000c26:	bf00      	nop
 8000c28:	24000000 	.word	0x24000000

08000c2c <get_decimal_point>:

/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
 8000c2c:	b480      	push	{r7}
 8000c2e:	af00      	add	r7, sp, #0
#ifdef ENABLE_LOCALES
    struct lconv *lconv = localeconv();
    return (unsigned char) lconv->decimal_point[0];
#else
    return '.';
 8000c30:	232e      	movs	r3, #46	@ 0x2e
#endif
}
 8000c32:	4618      	mov	r0, r3
 8000c34:	46bd      	mov	sp, r7
 8000c36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000c3a:	4770      	bx	lr
 8000c3c:	0000      	movs	r0, r0
	...

08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)

/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
 8000c40:	b580      	push	{r7, lr}
 8000c42:	b098      	sub	sp, #96	@ 0x60
 8000c44:	af00      	add	r7, sp, #0
 8000c46:	6078      	str	r0, [r7, #4]
 8000c48:	6039      	str	r1, [r7, #0]
    double number = 0;
 8000c4a:	f04f 0200 	mov.w	r2, #0
 8000c4e:	f04f 0300 	mov.w	r3, #0
 8000c52:	e9c7 2314 	strd	r2, r3, [r7, #80]	@ 0x50
    unsigned char *after_end = NULL;
 8000c56:	2300      	movs	r3, #0
 8000c58:	64bb      	str	r3, [r7, #72]	@ 0x48
    unsigned char number_c_string[64];
    unsigned char decimal_point = get_decimal_point();
 8000c5a:	f7ff ffe7 	bl	8000c2c <get_decimal_point>
 8000c5e:	4603      	mov	r3, r0
 8000c60:	f887 304f 	strb.w	r3, [r7, #79]	@ 0x4f
    size_t i = 0;
 8000c64:	2300      	movs	r3, #0
 8000c66:	65fb      	str	r3, [r7, #92]	@ 0x5c

    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 8000c68:	683b      	ldr	r3, [r7, #0]
 8000c6a:	2b00      	cmp	r3, #0
 8000c6c:	d003      	beq.n	8000c76 <parse_number+0x36>
 8000c6e:	683b      	ldr	r3, [r7, #0]
 8000c70:	681b      	ldr	r3, [r3, #0]
 8000c72:	2b00      	cmp	r3, #0
 8000c74:	d101      	bne.n	8000c7a <parse_number+0x3a>
    {
        return false;
 8000c76:	2300      	movs	r3, #0
 8000c78:	e09f      	b.n	8000dba <parse_number+0x17a>
    }

    /* copy the number into a temporary buffer and replace '.' with the decimal point
     * of the current locale (for strtod)
     * This also takes care of '\0' not necessarily being available for marking the end of the input */
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000c7a:	2300      	movs	r3, #0
 8000c7c:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000c7e:	e03d      	b.n	8000cfc <parse_number+0xbc>
    {
        switch (buffer_at_offset(input_buffer)[i])
 8000c80:	683b      	ldr	r3, [r7, #0]
 8000c82:	681a      	ldr	r2, [r3, #0]
 8000c84:	683b      	ldr	r3, [r7, #0]
 8000c86:	6899      	ldr	r1, [r3, #8]
 8000c88:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000c8a:	440b      	add	r3, r1
 8000c8c:	4413      	add	r3, r2
 8000c8e:	781b      	ldrb	r3, [r3, #0]
 8000c90:	2b45      	cmp	r3, #69	@ 0x45
 8000c92:	dc17      	bgt.n	8000cc4 <parse_number+0x84>
 8000c94:	2b2b      	cmp	r3, #43	@ 0x2b
 8000c96:	db40      	blt.n	8000d1a <parse_number+0xda>
 8000c98:	3b2b      	subs	r3, #43	@ 0x2b
 8000c9a:	2201      	movs	r2, #1
 8000c9c:	409a      	lsls	r2, r3
 8000c9e:	4b4e      	ldr	r3, [pc, #312]	@ (8000dd8 <parse_number+0x198>)
 8000ca0:	4013      	ands	r3, r2
 8000ca2:	2b00      	cmp	r3, #0
 8000ca4:	bf14      	ite	ne
 8000ca6:	2301      	movne	r3, #1
 8000ca8:	2300      	moveq	r3, #0
 8000caa:	b2db      	uxtb	r3, r3
 8000cac:	2b00      	cmp	r3, #0
 8000cae:	d10b      	bne.n	8000cc8 <parse_number+0x88>
 8000cb0:	f002 0308 	and.w	r3, r2, #8
 8000cb4:	2b00      	cmp	r3, #0
 8000cb6:	bf14      	ite	ne
 8000cb8:	2301      	movne	r3, #1
 8000cba:	2300      	moveq	r3, #0
 8000cbc:	b2db      	uxtb	r3, r3
 8000cbe:	2b00      	cmp	r3, #0
 8000cc0:	d111      	bne.n	8000ce6 <parse_number+0xa6>
            case '.':
                number_c_string[i] = decimal_point;
                break;

            default:
                goto loop_end;
 8000cc2:	e02a      	b.n	8000d1a <parse_number+0xda>
        switch (buffer_at_offset(input_buffer)[i])
 8000cc4:	2b65      	cmp	r3, #101	@ 0x65
 8000cc6:	d128      	bne.n	8000d1a <parse_number+0xda>
                number_c_string[i] = buffer_at_offset(input_buffer)[i];
 8000cc8:	683b      	ldr	r3, [r7, #0]
 8000cca:	681a      	ldr	r2, [r3, #0]
 8000ccc:	683b      	ldr	r3, [r7, #0]
 8000cce:	6899      	ldr	r1, [r3, #8]
 8000cd0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cd2:	440b      	add	r3, r1
 8000cd4:	4413      	add	r3, r2
 8000cd6:	7819      	ldrb	r1, [r3, #0]
 8000cd8:	f107 0208 	add.w	r2, r7, #8
 8000cdc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cde:	4413      	add	r3, r2
 8000ce0:	460a      	mov	r2, r1
 8000ce2:	701a      	strb	r2, [r3, #0]
                break;
 8000ce4:	e007      	b.n	8000cf6 <parse_number+0xb6>
                number_c_string[i] = decimal_point;
 8000ce6:	f107 0208 	add.w	r2, r7, #8
 8000cea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cec:	4413      	add	r3, r2
 8000cee:	f897 204f 	ldrb.w	r2, [r7, #79]	@ 0x4f
 8000cf2:	701a      	strb	r2, [r3, #0]
                break;
 8000cf4:	bf00      	nop
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000cf6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cf8:	3301      	adds	r3, #1
 8000cfa:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000cfc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cfe:	2b3e      	cmp	r3, #62	@ 0x3e
 8000d00:	d80d      	bhi.n	8000d1e <parse_number+0xde>
 8000d02:	683b      	ldr	r3, [r7, #0]
 8000d04:	2b00      	cmp	r3, #0
 8000d06:	d00a      	beq.n	8000d1e <parse_number+0xde>
 8000d08:	683b      	ldr	r3, [r7, #0]
 8000d0a:	689a      	ldr	r2, [r3, #8]
 8000d0c:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d0e:	441a      	add	r2, r3
 8000d10:	683b      	ldr	r3, [r7, #0]
 8000d12:	685b      	ldr	r3, [r3, #4]
 8000d14:	429a      	cmp	r2, r3
 8000d16:	d3b3      	bcc.n	8000c80 <parse_number+0x40>
        }
    }
loop_end:
 8000d18:	e001      	b.n	8000d1e <parse_number+0xde>
                goto loop_end;
 8000d1a:	bf00      	nop
 8000d1c:	e000      	b.n	8000d20 <parse_number+0xe0>
loop_end:
 8000d1e:	bf00      	nop
    number_c_string[i] = '\0';
 8000d20:	f107 0208 	add.w	r2, r7, #8
 8000d24:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d26:	4413      	add	r3, r2
 8000d28:	2200      	movs	r2, #0
 8000d2a:	701a      	strb	r2, [r3, #0]

    number = strtod((const char*)number_c_string, (char**)&after_end);
 8000d2c:	f107 0248 	add.w	r2, r7, #72	@ 0x48
 8000d30:	f107 0308 	add.w	r3, r7, #8
 8000d34:	4611      	mov	r1, r2
 8000d36:	4618      	mov	r0, r3
 8000d38:	f029 f80c 	bl	8029d54 <strtod>
 8000d3c:	ed87 0b14 	vstr	d0, [r7, #80]	@ 0x50
    if (number_c_string == after_end)
 8000d40:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8000d42:	f107 0308 	add.w	r3, r7, #8
 8000d46:	429a      	cmp	r2, r3
 8000d48:	d101      	bne.n	8000d4e <parse_number+0x10e>
    {
        return false; /* parse_error */
 8000d4a:	2300      	movs	r3, #0
 8000d4c:	e035      	b.n	8000dba <parse_number+0x17a>
    }

    item->valuedouble = number;
 8000d4e:	6879      	ldr	r1, [r7, #4]
 8000d50:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
 8000d54:	e9c1 2306 	strd	r2, r3, [r1, #24]

    /* use saturation in case of overflow */
    if (number >= INT_MAX)
 8000d58:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d5c:	ed9f 6b1a 	vldr	d6, [pc, #104]	@ 8000dc8 <parse_number+0x188>
 8000d60:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d64:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d68:	db04      	blt.n	8000d74 <parse_number+0x134>
    {
        item->valueint = INT_MAX;
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8000d70:	615a      	str	r2, [r3, #20]
 8000d72:	e015      	b.n	8000da0 <parse_number+0x160>
    }
    else if (number <= (double)INT_MIN)
 8000d74:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d78:	ed9f 6b15 	vldr	d6, [pc, #84]	@ 8000dd0 <parse_number+0x190>
 8000d7c:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d80:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d84:	d804      	bhi.n	8000d90 <parse_number+0x150>
    {
        item->valueint = INT_MIN;
 8000d86:	687b      	ldr	r3, [r7, #4]
 8000d88:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8000d8c:	615a      	str	r2, [r3, #20]
 8000d8e:	e007      	b.n	8000da0 <parse_number+0x160>
    }
    else
    {
        item->valueint = (int)number;
 8000d90:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d94:	eefd 7bc7 	vcvt.s32.f64	s15, d7
 8000d98:	ee17 2a90 	vmov	r2, s15
 8000d9c:	687b      	ldr	r3, [r7, #4]
 8000d9e:	615a      	str	r2, [r3, #20]
    }

    item->type = cJSON_Number;
 8000da0:	687b      	ldr	r3, [r7, #4]
 8000da2:	2208      	movs	r2, #8
 8000da4:	60da      	str	r2, [r3, #12]

    input_buffer->offset += (size_t)(after_end - number_c_string);
 8000da6:	683b      	ldr	r3, [r7, #0]
 8000da8:	689b      	ldr	r3, [r3, #8]
 8000daa:	6cb9      	ldr	r1, [r7, #72]	@ 0x48
 8000dac:	f107 0208 	add.w	r2, r7, #8
 8000db0:	1a8a      	subs	r2, r1, r2
 8000db2:	441a      	add	r2, r3
 8000db4:	683b      	ldr	r3, [r7, #0]
 8000db6:	609a      	str	r2, [r3, #8]
    return true;
 8000db8:	2301      	movs	r3, #1
}
 8000dba:	4618      	mov	r0, r3
 8000dbc:	3760      	adds	r7, #96	@ 0x60
 8000dbe:	46bd      	mov	sp, r7
 8000dc0:	bd80      	pop	{r7, pc}
 8000dc2:	bf00      	nop
 8000dc4:	f3af 8000 	nop.w
 8000dc8:	ffc00000 	.word	0xffc00000
 8000dcc:	41dfffff 	.word	0x41dfffff
 8000dd0:	00000000 	.word	0x00000000
 8000dd4:	c1e00000 	.word	0xc1e00000
 8000dd8:	04007fe5 	.word	0x04007fe5

08000ddc <parse_hex4>:
    return true;
}

/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
 8000ddc:	b480      	push	{r7}
 8000dde:	b085      	sub	sp, #20
 8000de0:	af00      	add	r7, sp, #0
 8000de2:	6078      	str	r0, [r7, #4]
    unsigned int h = 0;
 8000de4:	2300      	movs	r3, #0
 8000de6:	60fb      	str	r3, [r7, #12]
    size_t i = 0;
 8000de8:	2300      	movs	r3, #0
 8000dea:	60bb      	str	r3, [r7, #8]

    for (i = 0; i < 4; i++)
 8000dec:	2300      	movs	r3, #0
 8000dee:	60bb      	str	r3, [r7, #8]
 8000df0:	e04c      	b.n	8000e8c <parse_hex4+0xb0>
    {
        /* parse digit */
        if ((input[i] >= '0') && (input[i] <= '9'))
 8000df2:	687a      	ldr	r2, [r7, #4]
 8000df4:	68bb      	ldr	r3, [r7, #8]
 8000df6:	4413      	add	r3, r2
 8000df8:	781b      	ldrb	r3, [r3, #0]
 8000dfa:	2b2f      	cmp	r3, #47	@ 0x2f
 8000dfc:	d90f      	bls.n	8000e1e <parse_hex4+0x42>
 8000dfe:	687a      	ldr	r2, [r7, #4]
 8000e00:	68bb      	ldr	r3, [r7, #8]
 8000e02:	4413      	add	r3, r2
 8000e04:	781b      	ldrb	r3, [r3, #0]
 8000e06:	2b39      	cmp	r3, #57	@ 0x39
 8000e08:	d809      	bhi.n	8000e1e <parse_hex4+0x42>
        {
            h += (unsigned int) input[i] - '0';
 8000e0a:	687a      	ldr	r2, [r7, #4]
 8000e0c:	68bb      	ldr	r3, [r7, #8]
 8000e0e:	4413      	add	r3, r2
 8000e10:	781b      	ldrb	r3, [r3, #0]
 8000e12:	461a      	mov	r2, r3
 8000e14:	68fb      	ldr	r3, [r7, #12]
 8000e16:	4413      	add	r3, r2
 8000e18:	3b30      	subs	r3, #48	@ 0x30
 8000e1a:	60fb      	str	r3, [r7, #12]
 8000e1c:	e02d      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'A') && (input[i] <= 'F'))
 8000e1e:	687a      	ldr	r2, [r7, #4]
 8000e20:	68bb      	ldr	r3, [r7, #8]
 8000e22:	4413      	add	r3, r2
 8000e24:	781b      	ldrb	r3, [r3, #0]
 8000e26:	2b40      	cmp	r3, #64	@ 0x40
 8000e28:	d90f      	bls.n	8000e4a <parse_hex4+0x6e>
 8000e2a:	687a      	ldr	r2, [r7, #4]
 8000e2c:	68bb      	ldr	r3, [r7, #8]
 8000e2e:	4413      	add	r3, r2
 8000e30:	781b      	ldrb	r3, [r3, #0]
 8000e32:	2b46      	cmp	r3, #70	@ 0x46
 8000e34:	d809      	bhi.n	8000e4a <parse_hex4+0x6e>
        {
            h += (unsigned int) 10 + input[i] - 'A';
 8000e36:	687a      	ldr	r2, [r7, #4]
 8000e38:	68bb      	ldr	r3, [r7, #8]
 8000e3a:	4413      	add	r3, r2
 8000e3c:	781b      	ldrb	r3, [r3, #0]
 8000e3e:	461a      	mov	r2, r3
 8000e40:	68fb      	ldr	r3, [r7, #12]
 8000e42:	4413      	add	r3, r2
 8000e44:	3b37      	subs	r3, #55	@ 0x37
 8000e46:	60fb      	str	r3, [r7, #12]
 8000e48:	e017      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'a') && (input[i] <= 'f'))
 8000e4a:	687a      	ldr	r2, [r7, #4]
 8000e4c:	68bb      	ldr	r3, [r7, #8]
 8000e4e:	4413      	add	r3, r2
 8000e50:	781b      	ldrb	r3, [r3, #0]
 8000e52:	2b60      	cmp	r3, #96	@ 0x60
 8000e54:	d90f      	bls.n	8000e76 <parse_hex4+0x9a>
 8000e56:	687a      	ldr	r2, [r7, #4]
 8000e58:	68bb      	ldr	r3, [r7, #8]
 8000e5a:	4413      	add	r3, r2
 8000e5c:	781b      	ldrb	r3, [r3, #0]
 8000e5e:	2b66      	cmp	r3, #102	@ 0x66
 8000e60:	d809      	bhi.n	8000e76 <parse_hex4+0x9a>
        {
            h += (unsigned int) 10 + input[i] - 'a';
 8000e62:	687a      	ldr	r2, [r7, #4]
 8000e64:	68bb      	ldr	r3, [r7, #8]
 8000e66:	4413      	add	r3, r2
 8000e68:	781b      	ldrb	r3, [r3, #0]
 8000e6a:	461a      	mov	r2, r3
 8000e6c:	68fb      	ldr	r3, [r7, #12]
 8000e6e:	4413      	add	r3, r2
 8000e70:	3b57      	subs	r3, #87	@ 0x57
 8000e72:	60fb      	str	r3, [r7, #12]
 8000e74:	e001      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else /* invalid */
        {
            return 0;
 8000e76:	2300      	movs	r3, #0
 8000e78:	e00c      	b.n	8000e94 <parse_hex4+0xb8>
        }

        if (i < 3)
 8000e7a:	68bb      	ldr	r3, [r7, #8]
 8000e7c:	2b02      	cmp	r3, #2
 8000e7e:	d802      	bhi.n	8000e86 <parse_hex4+0xaa>
        {
            /* shift left to make place for the next nibble */
            h = h << 4;
 8000e80:	68fb      	ldr	r3, [r7, #12]
 8000e82:	011b      	lsls	r3, r3, #4
 8000e84:	60fb      	str	r3, [r7, #12]
    for (i = 0; i < 4; i++)
 8000e86:	68bb      	ldr	r3, [r7, #8]
 8000e88:	3301      	adds	r3, #1
 8000e8a:	60bb      	str	r3, [r7, #8]
 8000e8c:	68bb      	ldr	r3, [r7, #8]
 8000e8e:	2b03      	cmp	r3, #3
 8000e90:	d9af      	bls.n	8000df2 <parse_hex4+0x16>
        }
    }

    return h;
 8000e92:	68fb      	ldr	r3, [r7, #12]
}
 8000e94:	4618      	mov	r0, r3
 8000e96:	3714      	adds	r7, #20
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000e9e:	4770      	bx	lr

08000ea0 <utf16_literal_to_utf8>:

/* converts a UTF-16 literal to UTF-8
 * A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	b08a      	sub	sp, #40	@ 0x28
 8000ea4:	af00      	add	r7, sp, #0
 8000ea6:	60f8      	str	r0, [r7, #12]
 8000ea8:	60b9      	str	r1, [r7, #8]
 8000eaa:	607a      	str	r2, [r7, #4]
    long unsigned int codepoint = 0;
 8000eac:	2300      	movs	r3, #0
 8000eae:	627b      	str	r3, [r7, #36]	@ 0x24
    unsigned int first_code = 0;
 8000eb0:	2300      	movs	r3, #0
 8000eb2:	61fb      	str	r3, [r7, #28]
    const unsigned char *first_sequence = input_pointer;
 8000eb4:	68fb      	ldr	r3, [r7, #12]
 8000eb6:	61bb      	str	r3, [r7, #24]
    unsigned char utf8_length = 0;
 8000eb8:	2300      	movs	r3, #0
 8000eba:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    unsigned char utf8_position = 0;
 8000ebe:	2300      	movs	r3, #0
 8000ec0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    unsigned char sequence_length = 0;
 8000ec4:	2300      	movs	r3, #0
 8000ec6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
    unsigned char first_byte_mark = 0;
 8000eca:	2300      	movs	r3, #0
 8000ecc:	f887 3020 	strb.w	r3, [r7, #32]

    if ((input_end - first_sequence) < 6)
 8000ed0:	68ba      	ldr	r2, [r7, #8]
 8000ed2:	69bb      	ldr	r3, [r7, #24]
 8000ed4:	1ad3      	subs	r3, r2, r3
 8000ed6:	2b05      	cmp	r3, #5
 8000ed8:	f340 80b7 	ble.w	800104a <utf16_literal_to_utf8+0x1aa>
        /* input ends unexpectedly */
        goto fail;
    }

    /* get the first utf16 sequence */
    first_code = parse_hex4(first_sequence + 2);
 8000edc:	69bb      	ldr	r3, [r7, #24]
 8000ede:	3302      	adds	r3, #2
 8000ee0:	4618      	mov	r0, r3
 8000ee2:	f7ff ff7b 	bl	8000ddc <parse_hex4>
 8000ee6:	61f8      	str	r0, [r7, #28]

    /* check that the code is valid */
    if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
 8000ee8:	69fb      	ldr	r3, [r7, #28]
 8000eea:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000eee:	d304      	bcc.n	8000efa <utf16_literal_to_utf8+0x5a>
 8000ef0:	69fb      	ldr	r3, [r7, #28]
 8000ef2:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000ef6:	f0c0 80aa 	bcc.w	800104e <utf16_literal_to_utf8+0x1ae>
    {
        goto fail;
    }

    /* UTF16 surrogate pair */
    if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
 8000efa:	69fb      	ldr	r3, [r7, #28]
 8000efc:	f5b3 4f58 	cmp.w	r3, #55296	@ 0xd800
 8000f00:	d337      	bcc.n	8000f72 <utf16_literal_to_utf8+0xd2>
 8000f02:	69fb      	ldr	r3, [r7, #28]
 8000f04:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f08:	d233      	bcs.n	8000f72 <utf16_literal_to_utf8+0xd2>
    {
        const unsigned char *second_sequence = first_sequence + 6;
 8000f0a:	69bb      	ldr	r3, [r7, #24]
 8000f0c:	3306      	adds	r3, #6
 8000f0e:	617b      	str	r3, [r7, #20]
        unsigned int second_code = 0;
 8000f10:	2300      	movs	r3, #0
 8000f12:	613b      	str	r3, [r7, #16]
        sequence_length = 12; /* \uXXXX\uXXXX */
 8000f14:	230c      	movs	r3, #12
 8000f16:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21

        if ((input_end - second_sequence) < 6)
 8000f1a:	68ba      	ldr	r2, [r7, #8]
 8000f1c:	697b      	ldr	r3, [r7, #20]
 8000f1e:	1ad3      	subs	r3, r2, r3
 8000f20:	2b05      	cmp	r3, #5
 8000f22:	f340 8096 	ble.w	8001052 <utf16_literal_to_utf8+0x1b2>
        {
            /* input ends unexpectedly */
            goto fail;
        }

        if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
 8000f26:	697b      	ldr	r3, [r7, #20]
 8000f28:	781b      	ldrb	r3, [r3, #0]
 8000f2a:	2b5c      	cmp	r3, #92	@ 0x5c
 8000f2c:	f040 8093 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
 8000f30:	697b      	ldr	r3, [r7, #20]
 8000f32:	3301      	adds	r3, #1
 8000f34:	781b      	ldrb	r3, [r3, #0]
 8000f36:	2b75      	cmp	r3, #117	@ 0x75
 8000f38:	f040 808d 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
            /* missing second half of the surrogate pair */
            goto fail;
        }

        /* get the second utf16 sequence */
        second_code = parse_hex4(second_sequence + 2);
 8000f3c:	697b      	ldr	r3, [r7, #20]
 8000f3e:	3302      	adds	r3, #2
 8000f40:	4618      	mov	r0, r3
 8000f42:	f7ff ff4b 	bl	8000ddc <parse_hex4>
 8000f46:	6138      	str	r0, [r7, #16]
        /* check that the code is valid */
        if ((second_code < 0xDC00) || (second_code > 0xDFFF))
 8000f48:	693b      	ldr	r3, [r7, #16]
 8000f4a:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f4e:	f0c0 8084 	bcc.w	800105a <utf16_literal_to_utf8+0x1ba>
 8000f52:	693b      	ldr	r3, [r7, #16]
 8000f54:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000f58:	d27f      	bcs.n	800105a <utf16_literal_to_utf8+0x1ba>
            goto fail;
        }


        /* calculate the unicode codepoint from the surrogate pair */
        codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
 8000f5a:	69fb      	ldr	r3, [r7, #28]
 8000f5c:	029a      	lsls	r2, r3, #10
 8000f5e:	4b43      	ldr	r3, [pc, #268]	@ (800106c <utf16_literal_to_utf8+0x1cc>)
 8000f60:	4013      	ands	r3, r2
 8000f62:	693a      	ldr	r2, [r7, #16]
 8000f64:	f3c2 0209 	ubfx	r2, r2, #0, #10
 8000f68:	4313      	orrs	r3, r2
 8000f6a:	f503 3380 	add.w	r3, r3, #65536	@ 0x10000
 8000f6e:	627b      	str	r3, [r7, #36]	@ 0x24
    {
 8000f70:	e004      	b.n	8000f7c <utf16_literal_to_utf8+0xdc>
    }
    else
    {
        sequence_length = 6; /* \uXXXX */
 8000f72:	2306      	movs	r3, #6
 8000f74:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
        codepoint = first_code;
 8000f78:	69fb      	ldr	r3, [r7, #28]
 8000f7a:	627b      	str	r3, [r7, #36]	@ 0x24
    }

    /* encode as UTF-8
     * takes at maximum 4 bytes to encode:
     * 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
    if (codepoint < 0x80)
 8000f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f7e:	2b7f      	cmp	r3, #127	@ 0x7f
 8000f80:	d803      	bhi.n	8000f8a <utf16_literal_to_utf8+0xea>
    {
        /* normal ascii, encoding 0xxxxxxx */
        utf8_length = 1;
 8000f82:	2301      	movs	r3, #1
 8000f84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8000f88:	e01f      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x800)
 8000f8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f8c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 8000f90:	d206      	bcs.n	8000fa0 <utf16_literal_to_utf8+0x100>
    {
        /* two bytes, encoding 110xxxxx 10xxxxxx */
        utf8_length = 2;
 8000f92:	2302      	movs	r3, #2
 8000f94:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xC0; /* 11000000 */
 8000f98:	23c0      	movs	r3, #192	@ 0xc0
 8000f9a:	f887 3020 	strb.w	r3, [r7, #32]
 8000f9e:	e014      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x10000)
 8000fa0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fa2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8000fa6:	d206      	bcs.n	8000fb6 <utf16_literal_to_utf8+0x116>
    {
        /* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
        utf8_length = 3;
 8000fa8:	2303      	movs	r3, #3
 8000faa:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xE0; /* 11100000 */
 8000fae:	23e0      	movs	r3, #224	@ 0xe0
 8000fb0:	f887 3020 	strb.w	r3, [r7, #32]
 8000fb4:	e009      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint <= 0x10FFFF)
 8000fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fb8:	f5b3 1f88 	cmp.w	r3, #1114112	@ 0x110000
 8000fbc:	d24f      	bcs.n	800105e <utf16_literal_to_utf8+0x1be>
    {
        /* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
        utf8_length = 4;
 8000fbe:	2304      	movs	r3, #4
 8000fc0:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xF0; /* 11110000 */
 8000fc4:	23f0      	movs	r3, #240	@ 0xf0
 8000fc6:	f887 3020 	strb.w	r3, [r7, #32]
        /* invalid unicode codepoint */
        goto fail;
    }

    /* encode as utf8 */
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000fca:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8000fce:	3b01      	subs	r3, #1
 8000fd0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8000fd4:	e015      	b.n	8001002 <utf16_literal_to_utf8+0x162>
    {
        /* 10xxxxxx */
        (*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
 8000fd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fd8:	b2db      	uxtb	r3, r3
 8000fda:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 8000fde:	b2da      	uxtb	r2, r3
 8000fe0:	687b      	ldr	r3, [r7, #4]
 8000fe2:	6819      	ldr	r1, [r3, #0]
 8000fe4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000fe8:	440b      	add	r3, r1
 8000fea:	f062 027f 	orn	r2, r2, #127	@ 0x7f
 8000fee:	b2d2      	uxtb	r2, r2
 8000ff0:	701a      	strb	r2, [r3, #0]
        codepoint >>= 6;
 8000ff2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000ff4:	099b      	lsrs	r3, r3, #6
 8000ff6:	627b      	str	r3, [r7, #36]	@ 0x24
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000ff8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000ffc:	3b01      	subs	r3, #1
 8000ffe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8001002:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8001006:	2b00      	cmp	r3, #0
 8001008:	d1e5      	bne.n	8000fd6 <utf16_literal_to_utf8+0x136>
    }
    /* encode first byte */
    if (utf8_length > 1)
 800100a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800100e:	2b01      	cmp	r3, #1
 8001010:	d909      	bls.n	8001026 <utf16_literal_to_utf8+0x186>
    {
        (*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
 8001012:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001014:	b2d9      	uxtb	r1, r3
 8001016:	687b      	ldr	r3, [r7, #4]
 8001018:	681b      	ldr	r3, [r3, #0]
 800101a:	f897 2020 	ldrb.w	r2, [r7, #32]
 800101e:	430a      	orrs	r2, r1
 8001020:	b2d2      	uxtb	r2, r2
 8001022:	701a      	strb	r2, [r3, #0]
 8001024:	e007      	b.n	8001036 <utf16_literal_to_utf8+0x196>
    }
    else
    {
        (*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
 8001026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001028:	b2da      	uxtb	r2, r3
 800102a:	687b      	ldr	r3, [r7, #4]
 800102c:	681b      	ldr	r3, [r3, #0]
 800102e:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8001032:	b2d2      	uxtb	r2, r2
 8001034:	701a      	strb	r2, [r3, #0]
    }

    *output_pointer += utf8_length;
 8001036:	687b      	ldr	r3, [r7, #4]
 8001038:	681a      	ldr	r2, [r3, #0]
 800103a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800103e:	441a      	add	r2, r3
 8001040:	687b      	ldr	r3, [r7, #4]
 8001042:	601a      	str	r2, [r3, #0]

    return sequence_length;
 8001044:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8001048:	e00b      	b.n	8001062 <utf16_literal_to_utf8+0x1c2>
        goto fail;
 800104a:	bf00      	nop
 800104c:	e008      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800104e:	bf00      	nop
 8001050:	e006      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001052:	bf00      	nop
 8001054:	e004      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001056:	bf00      	nop
 8001058:	e002      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 800105a:	bf00      	nop
 800105c:	e000      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800105e:	bf00      	nop

fail:
    return 0;
 8001060:	2300      	movs	r3, #0
}
 8001062:	4618      	mov	r0, r3
 8001064:	3728      	adds	r7, #40	@ 0x28
 8001066:	46bd      	mov	sp, r7
 8001068:	bd80      	pop	{r7, pc}
 800106a:	bf00      	nop
 800106c:	000ffc00 	.word	0x000ffc00

08001070 <parse_string>:

/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
 8001070:	b580      	push	{r7, lr}
 8001072:	b08a      	sub	sp, #40	@ 0x28
 8001074:	af00      	add	r7, sp, #0
 8001076:	6078      	str	r0, [r7, #4]
 8001078:	6039      	str	r1, [r7, #0]
    const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
 800107a:	683b      	ldr	r3, [r7, #0]
 800107c:	681a      	ldr	r2, [r3, #0]
 800107e:	683b      	ldr	r3, [r7, #0]
 8001080:	689b      	ldr	r3, [r3, #8]
 8001082:	3301      	adds	r3, #1
 8001084:	4413      	add	r3, r2
 8001086:	627b      	str	r3, [r7, #36]	@ 0x24
    const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
 8001088:	683b      	ldr	r3, [r7, #0]
 800108a:	681a      	ldr	r2, [r3, #0]
 800108c:	683b      	ldr	r3, [r7, #0]
 800108e:	689b      	ldr	r3, [r3, #8]
 8001090:	3301      	adds	r3, #1
 8001092:	4413      	add	r3, r2
 8001094:	623b      	str	r3, [r7, #32]
    unsigned char *output_pointer = NULL;
 8001096:	2300      	movs	r3, #0
 8001098:	60fb      	str	r3, [r7, #12]
    unsigned char *output = NULL;
 800109a:	2300      	movs	r3, #0
 800109c:	61fb      	str	r3, [r7, #28]

    /* not a string */
    if (buffer_at_offset(input_buffer)[0] != '\"')
 800109e:	683b      	ldr	r3, [r7, #0]
 80010a0:	681a      	ldr	r2, [r3, #0]
 80010a2:	683b      	ldr	r3, [r7, #0]
 80010a4:	689b      	ldr	r3, [r3, #8]
 80010a6:	4413      	add	r3, r2
 80010a8:	781b      	ldrb	r3, [r3, #0]
 80010aa:	2b22      	cmp	r3, #34	@ 0x22
 80010ac:	f040 8103 	bne.w	80012b6 <parse_string+0x246>
        goto fail;
    }

    {
        /* calculate approximate size of the output (overestimate) */
        size_t allocation_length = 0;
 80010b0:	2300      	movs	r3, #0
 80010b2:	613b      	str	r3, [r7, #16]
        size_t skipped_bytes = 0;
 80010b4:	2300      	movs	r3, #0
 80010b6:	61bb      	str	r3, [r7, #24]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010b8:	e017      	b.n	80010ea <parse_string+0x7a>
        {
            /* is escape sequence */
            if (input_end[0] == '\\')
 80010ba:	6a3b      	ldr	r3, [r7, #32]
 80010bc:	781b      	ldrb	r3, [r3, #0]
 80010be:	2b5c      	cmp	r3, #92	@ 0x5c
 80010c0:	d110      	bne.n	80010e4 <parse_string+0x74>
            {
                if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
 80010c2:	6a3b      	ldr	r3, [r7, #32]
 80010c4:	1c5a      	adds	r2, r3, #1
 80010c6:	683b      	ldr	r3, [r7, #0]
 80010c8:	681b      	ldr	r3, [r3, #0]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	461a      	mov	r2, r3
 80010ce:	683b      	ldr	r3, [r7, #0]
 80010d0:	685b      	ldr	r3, [r3, #4]
 80010d2:	429a      	cmp	r2, r3
 80010d4:	f080 80f1 	bcs.w	80012ba <parse_string+0x24a>
                {
                    /* prevent buffer overflow when last input character is a backslash */
                    goto fail;
                }
                skipped_bytes++;
 80010d8:	69bb      	ldr	r3, [r7, #24]
 80010da:	3301      	adds	r3, #1
 80010dc:	61bb      	str	r3, [r7, #24]
                input_end++;
 80010de:	6a3b      	ldr	r3, [r7, #32]
 80010e0:	3301      	adds	r3, #1
 80010e2:	623b      	str	r3, [r7, #32]
            }
            input_end++;
 80010e4:	6a3b      	ldr	r3, [r7, #32]
 80010e6:	3301      	adds	r3, #1
 80010e8:	623b      	str	r3, [r7, #32]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010ea:	683b      	ldr	r3, [r7, #0]
 80010ec:	681b      	ldr	r3, [r3, #0]
 80010ee:	6a3a      	ldr	r2, [r7, #32]
 80010f0:	1ad3      	subs	r3, r2, r3
 80010f2:	461a      	mov	r2, r3
 80010f4:	683b      	ldr	r3, [r7, #0]
 80010f6:	685b      	ldr	r3, [r3, #4]
 80010f8:	429a      	cmp	r2, r3
 80010fa:	d203      	bcs.n	8001104 <parse_string+0x94>
 80010fc:	6a3b      	ldr	r3, [r7, #32]
 80010fe:	781b      	ldrb	r3, [r3, #0]
 8001100:	2b22      	cmp	r3, #34	@ 0x22
 8001102:	d1da      	bne.n	80010ba <parse_string+0x4a>
        }
        if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
 8001104:	683b      	ldr	r3, [r7, #0]
 8001106:	681b      	ldr	r3, [r3, #0]
 8001108:	6a3a      	ldr	r2, [r7, #32]
 800110a:	1ad3      	subs	r3, r2, r3
 800110c:	461a      	mov	r2, r3
 800110e:	683b      	ldr	r3, [r7, #0]
 8001110:	685b      	ldr	r3, [r3, #4]
 8001112:	429a      	cmp	r2, r3
 8001114:	f080 80d3 	bcs.w	80012be <parse_string+0x24e>
 8001118:	6a3b      	ldr	r3, [r7, #32]
 800111a:	781b      	ldrb	r3, [r3, #0]
 800111c:	2b22      	cmp	r3, #34	@ 0x22
 800111e:	f040 80ce 	bne.w	80012be <parse_string+0x24e>
        {
            goto fail; /* string ended unexpectedly */
        }

        /* This is at most how much we need for the output */
        allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
 8001122:	683b      	ldr	r3, [r7, #0]
 8001124:	681a      	ldr	r2, [r3, #0]
 8001126:	683b      	ldr	r3, [r7, #0]
 8001128:	689b      	ldr	r3, [r3, #8]
 800112a:	4413      	add	r3, r2
 800112c:	6a3a      	ldr	r2, [r7, #32]
 800112e:	1ad3      	subs	r3, r2, r3
 8001130:	461a      	mov	r2, r3
 8001132:	69bb      	ldr	r3, [r7, #24]
 8001134:	1ad3      	subs	r3, r2, r3
 8001136:	613b      	str	r3, [r7, #16]
        output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
 8001138:	683b      	ldr	r3, [r7, #0]
 800113a:	691b      	ldr	r3, [r3, #16]
 800113c:	693a      	ldr	r2, [r7, #16]
 800113e:	3201      	adds	r2, #1
 8001140:	4610      	mov	r0, r2
 8001142:	4798      	blx	r3
 8001144:	61f8      	str	r0, [r7, #28]
        if (output == NULL)
 8001146:	69fb      	ldr	r3, [r7, #28]
 8001148:	2b00      	cmp	r3, #0
 800114a:	f000 80ba 	beq.w	80012c2 <parse_string+0x252>
        {
            goto fail; /* allocation failure */
        }
    }

    output_pointer = output;
 800114e:	69fb      	ldr	r3, [r7, #28]
 8001150:	60fb      	str	r3, [r7, #12]
    /* loop through the string literal */
    while (input_pointer < input_end)
 8001152:	e094      	b.n	800127e <parse_string+0x20e>
    {
        if (*input_pointer != '\\')
 8001154:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001156:	781b      	ldrb	r3, [r3, #0]
 8001158:	2b5c      	cmp	r3, #92	@ 0x5c
 800115a:	d008      	beq.n	800116e <parse_string+0xfe>
        {
            *output_pointer++ = *input_pointer++;
 800115c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800115e:	1c53      	adds	r3, r2, #1
 8001160:	627b      	str	r3, [r7, #36]	@ 0x24
 8001162:	68fb      	ldr	r3, [r7, #12]
 8001164:	1c59      	adds	r1, r3, #1
 8001166:	60f9      	str	r1, [r7, #12]
 8001168:	7812      	ldrb	r2, [r2, #0]
 800116a:	701a      	strb	r2, [r3, #0]
 800116c:	e087      	b.n	800127e <parse_string+0x20e>
        }
        /* escape sequence */
        else
        {
            unsigned char sequence_length = 2;
 800116e:	2302      	movs	r3, #2
 8001170:	75fb      	strb	r3, [r7, #23]
            if ((input_end - input_pointer) < 1)
 8001172:	6a3a      	ldr	r2, [r7, #32]
 8001174:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001176:	1ad3      	subs	r3, r2, r3
 8001178:	2b00      	cmp	r3, #0
 800117a:	f340 80a4 	ble.w	80012c6 <parse_string+0x256>
            {
                goto fail;
            }

            switch (input_pointer[1])
 800117e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001180:	3301      	adds	r3, #1
 8001182:	781b      	ldrb	r3, [r3, #0]
 8001184:	2b75      	cmp	r3, #117	@ 0x75
 8001186:	f300 80a0 	bgt.w	80012ca <parse_string+0x25a>
 800118a:	2b5c      	cmp	r3, #92	@ 0x5c
 800118c:	da04      	bge.n	8001198 <parse_string+0x128>
 800118e:	2b22      	cmp	r3, #34	@ 0x22
 8001190:	d05c      	beq.n	800124c <parse_string+0x1dc>
 8001192:	2b2f      	cmp	r3, #47	@ 0x2f
 8001194:	d05a      	beq.n	800124c <parse_string+0x1dc>
                        goto fail;
                    }
                    break;

                default:
                    goto fail;
 8001196:	e098      	b.n	80012ca <parse_string+0x25a>
            switch (input_pointer[1])
 8001198:	3b5c      	subs	r3, #92	@ 0x5c
 800119a:	2b19      	cmp	r3, #25
 800119c:	f200 8095 	bhi.w	80012ca <parse_string+0x25a>
 80011a0:	a201      	add	r2, pc, #4	@ (adr r2, 80011a8 <parse_string+0x138>)
 80011a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80011a6:	bf00      	nop
 80011a8:	0800124d 	.word	0x0800124d
 80011ac:	080012cb 	.word	0x080012cb
 80011b0:	080012cb 	.word	0x080012cb
 80011b4:	080012cb 	.word	0x080012cb
 80011b8:	080012cb 	.word	0x080012cb
 80011bc:	080012cb 	.word	0x080012cb
 80011c0:	08001211 	.word	0x08001211
 80011c4:	080012cb 	.word	0x080012cb
 80011c8:	080012cb 	.word	0x080012cb
 80011cc:	080012cb 	.word	0x080012cb
 80011d0:	0800121d 	.word	0x0800121d
 80011d4:	080012cb 	.word	0x080012cb
 80011d8:	080012cb 	.word	0x080012cb
 80011dc:	080012cb 	.word	0x080012cb
 80011e0:	080012cb 	.word	0x080012cb
 80011e4:	080012cb 	.word	0x080012cb
 80011e8:	080012cb 	.word	0x080012cb
 80011ec:	080012cb 	.word	0x080012cb
 80011f0:	08001229 	.word	0x08001229
 80011f4:	080012cb 	.word	0x080012cb
 80011f8:	080012cb 	.word	0x080012cb
 80011fc:	080012cb 	.word	0x080012cb
 8001200:	08001235 	.word	0x08001235
 8001204:	080012cb 	.word	0x080012cb
 8001208:	08001241 	.word	0x08001241
 800120c:	0800125d 	.word	0x0800125d
                    *output_pointer++ = '\b';
 8001210:	68fb      	ldr	r3, [r7, #12]
 8001212:	1c5a      	adds	r2, r3, #1
 8001214:	60fa      	str	r2, [r7, #12]
 8001216:	2208      	movs	r2, #8
 8001218:	701a      	strb	r2, [r3, #0]
                    break;
 800121a:	e02c      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\f';
 800121c:	68fb      	ldr	r3, [r7, #12]
 800121e:	1c5a      	adds	r2, r3, #1
 8001220:	60fa      	str	r2, [r7, #12]
 8001222:	220c      	movs	r2, #12
 8001224:	701a      	strb	r2, [r3, #0]
                    break;
 8001226:	e026      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\n';
 8001228:	68fb      	ldr	r3, [r7, #12]
 800122a:	1c5a      	adds	r2, r3, #1
 800122c:	60fa      	str	r2, [r7, #12]
 800122e:	220a      	movs	r2, #10
 8001230:	701a      	strb	r2, [r3, #0]
                    break;
 8001232:	e020      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\r';
 8001234:	68fb      	ldr	r3, [r7, #12]
 8001236:	1c5a      	adds	r2, r3, #1
 8001238:	60fa      	str	r2, [r7, #12]
 800123a:	220d      	movs	r2, #13
 800123c:	701a      	strb	r2, [r3, #0]
                    break;
 800123e:	e01a      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\t';
 8001240:	68fb      	ldr	r3, [r7, #12]
 8001242:	1c5a      	adds	r2, r3, #1
 8001244:	60fa      	str	r2, [r7, #12]
 8001246:	2209      	movs	r2, #9
 8001248:	701a      	strb	r2, [r3, #0]
                    break;
 800124a:	e014      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = input_pointer[1];
 800124c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800124e:	1c5a      	adds	r2, r3, #1
 8001250:	68fb      	ldr	r3, [r7, #12]
 8001252:	1c59      	adds	r1, r3, #1
 8001254:	60f9      	str	r1, [r7, #12]
 8001256:	7812      	ldrb	r2, [r2, #0]
 8001258:	701a      	strb	r2, [r3, #0]
                    break;
 800125a:	e00c      	b.n	8001276 <parse_string+0x206>
                    sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
 800125c:	f107 030c 	add.w	r3, r7, #12
 8001260:	461a      	mov	r2, r3
 8001262:	6a39      	ldr	r1, [r7, #32]
 8001264:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8001266:	f7ff fe1b 	bl	8000ea0 <utf16_literal_to_utf8>
 800126a:	4603      	mov	r3, r0
 800126c:	75fb      	strb	r3, [r7, #23]
                    if (sequence_length == 0)
 800126e:	7dfb      	ldrb	r3, [r7, #23]
 8001270:	2b00      	cmp	r3, #0
 8001272:	d02c      	beq.n	80012ce <parse_string+0x25e>
                    break;
 8001274:	bf00      	nop
            }
            input_pointer += sequence_length;
 8001276:	7dfb      	ldrb	r3, [r7, #23]
 8001278:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800127a:	4413      	add	r3, r2
 800127c:	627b      	str	r3, [r7, #36]	@ 0x24
    while (input_pointer < input_end)
 800127e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8001280:	6a3b      	ldr	r3, [r7, #32]
 8001282:	429a      	cmp	r2, r3
 8001284:	f4ff af66 	bcc.w	8001154 <parse_string+0xe4>
        }
    }

    /* zero terminate the output */
    *output_pointer = '\0';
 8001288:	68fb      	ldr	r3, [r7, #12]
 800128a:	2200      	movs	r2, #0
 800128c:	701a      	strb	r2, [r3, #0]

    item->type = cJSON_String;
 800128e:	687b      	ldr	r3, [r7, #4]
 8001290:	2210      	movs	r2, #16
 8001292:	60da      	str	r2, [r3, #12]
    item->valuestring = (char*)output;
 8001294:	687b      	ldr	r3, [r7, #4]
 8001296:	69fa      	ldr	r2, [r7, #28]
 8001298:	611a      	str	r2, [r3, #16]

    input_buffer->offset = (size_t) (input_end - input_buffer->content);
 800129a:	683b      	ldr	r3, [r7, #0]
 800129c:	681b      	ldr	r3, [r3, #0]
 800129e:	6a3a      	ldr	r2, [r7, #32]
 80012a0:	1ad3      	subs	r3, r2, r3
 80012a2:	461a      	mov	r2, r3
 80012a4:	683b      	ldr	r3, [r7, #0]
 80012a6:	609a      	str	r2, [r3, #8]
    input_buffer->offset++;
 80012a8:	683b      	ldr	r3, [r7, #0]
 80012aa:	689b      	ldr	r3, [r3, #8]
 80012ac:	1c5a      	adds	r2, r3, #1
 80012ae:	683b      	ldr	r3, [r7, #0]
 80012b0:	609a      	str	r2, [r3, #8]

    return true;
 80012b2:	2301      	movs	r3, #1
 80012b4:	e020      	b.n	80012f8 <parse_string+0x288>
        goto fail;
 80012b6:	bf00      	nop
 80012b8:	e00a      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ba:	bf00      	nop
 80012bc:	e008      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* string ended unexpectedly */
 80012be:	bf00      	nop
 80012c0:	e006      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* allocation failure */
 80012c2:	bf00      	nop
 80012c4:	e004      	b.n	80012d0 <parse_string+0x260>
                goto fail;
 80012c6:	bf00      	nop
 80012c8:	e002      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ca:	bf00      	nop
 80012cc:	e000      	b.n	80012d0 <parse_string+0x260>
                        goto fail;
 80012ce:	bf00      	nop

fail:
    if (output != NULL)
 80012d0:	69fb      	ldr	r3, [r7, #28]
 80012d2:	2b00      	cmp	r3, #0
 80012d4:	d005      	beq.n	80012e2 <parse_string+0x272>
    {
        input_buffer->hooks.deallocate(output);
 80012d6:	683b      	ldr	r3, [r7, #0]
 80012d8:	695b      	ldr	r3, [r3, #20]
 80012da:	69f8      	ldr	r0, [r7, #28]
 80012dc:	4798      	blx	r3
        output = NULL;
 80012de:	2300      	movs	r3, #0
 80012e0:	61fb      	str	r3, [r7, #28]
    }

    if (input_pointer != NULL)
 80012e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80012e4:	2b00      	cmp	r3, #0
 80012e6:	d006      	beq.n	80012f6 <parse_string+0x286>
    {
        input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
 80012e8:	683b      	ldr	r3, [r7, #0]
 80012ea:	681b      	ldr	r3, [r3, #0]
 80012ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80012ee:	1ad3      	subs	r3, r2, r3
 80012f0:	461a      	mov	r2, r3
 80012f2:	683b      	ldr	r3, [r7, #0]
 80012f4:	609a      	str	r2, [r3, #8]
    }

    return false;
 80012f6:	2300      	movs	r3, #0
}
 80012f8:	4618      	mov	r0, r3
 80012fa:	3728      	adds	r7, #40	@ 0x28
 80012fc:	46bd      	mov	sp, r7
 80012fe:	bd80      	pop	{r7, pc}

08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);

/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
 8001300:	b480      	push	{r7}
 8001302:	b083      	sub	sp, #12
 8001304:	af00      	add	r7, sp, #0
 8001306:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL))
 8001308:	687b      	ldr	r3, [r7, #4]
 800130a:	2b00      	cmp	r3, #0
 800130c:	d003      	beq.n	8001316 <buffer_skip_whitespace+0x16>
 800130e:	687b      	ldr	r3, [r7, #4]
 8001310:	681b      	ldr	r3, [r3, #0]
 8001312:	2b00      	cmp	r3, #0
 8001314:	d101      	bne.n	800131a <buffer_skip_whitespace+0x1a>
    {
        return NULL;
 8001316:	2300      	movs	r3, #0
 8001318:	e02c      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    if (cannot_access_at_index(buffer, 0))
 800131a:	687b      	ldr	r3, [r7, #4]
 800131c:	2b00      	cmp	r3, #0
 800131e:	d005      	beq.n	800132c <buffer_skip_whitespace+0x2c>
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	689a      	ldr	r2, [r3, #8]
 8001324:	687b      	ldr	r3, [r7, #4]
 8001326:	685b      	ldr	r3, [r3, #4]
 8001328:	429a      	cmp	r2, r3
 800132a:	d306      	bcc.n	800133a <buffer_skip_whitespace+0x3a>
    {
        return buffer;
 800132c:	687b      	ldr	r3, [r7, #4]
 800132e:	e021      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
    {
       buffer->offset++;
 8001330:	687b      	ldr	r3, [r7, #4]
 8001332:	689b      	ldr	r3, [r3, #8]
 8001334:	1c5a      	adds	r2, r3, #1
 8001336:	687b      	ldr	r3, [r7, #4]
 8001338:	609a      	str	r2, [r3, #8]
    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
 800133a:	687b      	ldr	r3, [r7, #4]
 800133c:	2b00      	cmp	r3, #0
 800133e:	d00d      	beq.n	800135c <buffer_skip_whitespace+0x5c>
 8001340:	687b      	ldr	r3, [r7, #4]
 8001342:	689a      	ldr	r2, [r3, #8]
 8001344:	687b      	ldr	r3, [r7, #4]
 8001346:	685b      	ldr	r3, [r3, #4]
 8001348:	429a      	cmp	r2, r3
 800134a:	d207      	bcs.n	800135c <buffer_skip_whitespace+0x5c>
 800134c:	687b      	ldr	r3, [r7, #4]
 800134e:	681a      	ldr	r2, [r3, #0]
 8001350:	687b      	ldr	r3, [r7, #4]
 8001352:	689b      	ldr	r3, [r3, #8]
 8001354:	4413      	add	r3, r2
 8001356:	781b      	ldrb	r3, [r3, #0]
 8001358:	2b20      	cmp	r3, #32
 800135a:	d9e9      	bls.n	8001330 <buffer_skip_whitespace+0x30>
    }

    if (buffer->offset == buffer->length)
 800135c:	687b      	ldr	r3, [r7, #4]
 800135e:	689a      	ldr	r2, [r3, #8]
 8001360:	687b      	ldr	r3, [r7, #4]
 8001362:	685b      	ldr	r3, [r3, #4]
 8001364:	429a      	cmp	r2, r3
 8001366:	d104      	bne.n	8001372 <buffer_skip_whitespace+0x72>
    {
        buffer->offset--;
 8001368:	687b      	ldr	r3, [r7, #4]
 800136a:	689b      	ldr	r3, [r3, #8]
 800136c:	1e5a      	subs	r2, r3, #1
 800136e:	687b      	ldr	r3, [r7, #4]
 8001370:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 8001372:	687b      	ldr	r3, [r7, #4]
}
 8001374:	4618      	mov	r0, r3
 8001376:	370c      	adds	r7, #12
 8001378:	46bd      	mov	sp, r7
 800137a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800137e:	4770      	bx	lr

08001380 <skip_utf8_bom>:

/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
 8001380:	b580      	push	{r7, lr}
 8001382:	b082      	sub	sp, #8
 8001384:	af00      	add	r7, sp, #0
 8001386:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
 8001388:	687b      	ldr	r3, [r7, #4]
 800138a:	2b00      	cmp	r3, #0
 800138c:	d007      	beq.n	800139e <skip_utf8_bom+0x1e>
 800138e:	687b      	ldr	r3, [r7, #4]
 8001390:	681b      	ldr	r3, [r3, #0]
 8001392:	2b00      	cmp	r3, #0
 8001394:	d003      	beq.n	800139e <skip_utf8_bom+0x1e>
 8001396:	687b      	ldr	r3, [r7, #4]
 8001398:	689b      	ldr	r3, [r3, #8]
 800139a:	2b00      	cmp	r3, #0
 800139c:	d001      	beq.n	80013a2 <skip_utf8_bom+0x22>
    {
        return NULL;
 800139e:	2300      	movs	r3, #0
 80013a0:	e01c      	b.n	80013dc <skip_utf8_bom+0x5c>
    }

    if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
 80013a2:	687b      	ldr	r3, [r7, #4]
 80013a4:	2b00      	cmp	r3, #0
 80013a6:	d018      	beq.n	80013da <skip_utf8_bom+0x5a>
 80013a8:	687b      	ldr	r3, [r7, #4]
 80013aa:	689b      	ldr	r3, [r3, #8]
 80013ac:	1d1a      	adds	r2, r3, #4
 80013ae:	687b      	ldr	r3, [r7, #4]
 80013b0:	685b      	ldr	r3, [r3, #4]
 80013b2:	429a      	cmp	r2, r3
 80013b4:	d211      	bcs.n	80013da <skip_utf8_bom+0x5a>
 80013b6:	687b      	ldr	r3, [r7, #4]
 80013b8:	681a      	ldr	r2, [r3, #0]
 80013ba:	687b      	ldr	r3, [r7, #4]
 80013bc:	689b      	ldr	r3, [r3, #8]
 80013be:	4413      	add	r3, r2
 80013c0:	2203      	movs	r2, #3
 80013c2:	4908      	ldr	r1, [pc, #32]	@ (80013e4 <skip_utf8_bom+0x64>)
 80013c4:	4618      	mov	r0, r3
 80013c6:	f029 fb63 	bl	802aa90 <strncmp>
 80013ca:	4603      	mov	r3, r0
 80013cc:	2b00      	cmp	r3, #0
 80013ce:	d104      	bne.n	80013da <skip_utf8_bom+0x5a>
    {
        buffer->offset += 3;
 80013d0:	687b      	ldr	r3, [r7, #4]
 80013d2:	689b      	ldr	r3, [r3, #8]
 80013d4:	1cda      	adds	r2, r3, #3
 80013d6:	687b      	ldr	r3, [r7, #4]
 80013d8:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 80013da:	687b      	ldr	r3, [r7, #4]
}
 80013dc:	4618      	mov	r0, r3
 80013de:	3708      	adds	r7, #8
 80013e0:	46bd      	mov	sp, r7
 80013e2:	bd80      	pop	{r7, pc}
 80013e4:	0802d218 	.word	0x0802d218

080013e8 <cJSON_ParseWithOpts>:

CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 80013e8:	b580      	push	{r7, lr}
 80013ea:	b086      	sub	sp, #24
 80013ec:	af00      	add	r7, sp, #0
 80013ee:	60f8      	str	r0, [r7, #12]
 80013f0:	60b9      	str	r1, [r7, #8]
 80013f2:	607a      	str	r2, [r7, #4]
    size_t buffer_length;

    if (NULL == value)
 80013f4:	68fb      	ldr	r3, [r7, #12]
 80013f6:	2b00      	cmp	r3, #0
 80013f8:	d101      	bne.n	80013fe <cJSON_ParseWithOpts+0x16>
    {
        return NULL;
 80013fa:	2300      	movs	r3, #0
 80013fc:	e00c      	b.n	8001418 <cJSON_ParseWithOpts+0x30>
    }

    /* Adding null character size due to require_null_terminated. */
    buffer_length = strlen(value) + sizeof("");
 80013fe:	68f8      	ldr	r0, [r7, #12]
 8001400:	f7fe ffce 	bl	80003a0 <strlen>
 8001404:	4603      	mov	r3, r0
 8001406:	3301      	adds	r3, #1
 8001408:	617b      	str	r3, [r7, #20]

    return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
 800140a:	687b      	ldr	r3, [r7, #4]
 800140c:	68ba      	ldr	r2, [r7, #8]
 800140e:	6979      	ldr	r1, [r7, #20]
 8001410:	68f8      	ldr	r0, [r7, #12]
 8001412:	f000 f805 	bl	8001420 <cJSON_ParseWithLengthOpts>
 8001416:	4603      	mov	r3, r0
}
 8001418:	4618      	mov	r0, r3
 800141a:	3718      	adds	r7, #24
 800141c:	46bd      	mov	sp, r7
 800141e:	bd80      	pop	{r7, pc}

08001420 <cJSON_ParseWithLengthOpts>:

/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 8001420:	b580      	push	{r7, lr}
 8001422:	b08e      	sub	sp, #56	@ 0x38
 8001424:	af00      	add	r7, sp, #0
 8001426:	60f8      	str	r0, [r7, #12]
 8001428:	60b9      	str	r1, [r7, #8]
 800142a:	607a      	str	r2, [r7, #4]
 800142c:	603b      	str	r3, [r7, #0]
    parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
 800142e:	f107 0318 	add.w	r3, r7, #24
 8001432:	2200      	movs	r2, #0
 8001434:	601a      	str	r2, [r3, #0]
 8001436:	605a      	str	r2, [r3, #4]
 8001438:	609a      	str	r2, [r3, #8]
 800143a:	60da      	str	r2, [r3, #12]
 800143c:	611a      	str	r2, [r3, #16]
 800143e:	615a      	str	r2, [r3, #20]
 8001440:	619a      	str	r2, [r3, #24]
    cJSON *item = NULL;
 8001442:	2300      	movs	r3, #0
 8001444:	637b      	str	r3, [r7, #52]	@ 0x34

    /* reset error position */
    global_error.json = NULL;
 8001446:	4b41      	ldr	r3, [pc, #260]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001448:	2200      	movs	r2, #0
 800144a:	601a      	str	r2, [r3, #0]
    global_error.position = 0;
 800144c:	4b3f      	ldr	r3, [pc, #252]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 800144e:	2200      	movs	r2, #0
 8001450:	605a      	str	r2, [r3, #4]

    if (value == NULL || 0 == buffer_length)
 8001452:	68fb      	ldr	r3, [r7, #12]
 8001454:	2b00      	cmp	r3, #0
 8001456:	d042      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
 8001458:	68bb      	ldr	r3, [r7, #8]
 800145a:	2b00      	cmp	r3, #0
 800145c:	d03f      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
    {
        goto fail;
    }

    buffer.content = (const unsigned char*)value;
 800145e:	68fb      	ldr	r3, [r7, #12]
 8001460:	61bb      	str	r3, [r7, #24]
    buffer.length = buffer_length;
 8001462:	68bb      	ldr	r3, [r7, #8]
 8001464:	61fb      	str	r3, [r7, #28]
    buffer.offset = 0;
 8001466:	2300      	movs	r3, #0
 8001468:	623b      	str	r3, [r7, #32]
    buffer.hooks = global_hooks;
 800146a:	4a39      	ldr	r2, [pc, #228]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 800146c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8001470:	ca07      	ldmia	r2, {r0, r1, r2}
 8001472:	e883 0007 	stmia.w	r3, {r0, r1, r2}

    item = cJSON_New_Item(&global_hooks);
 8001476:	4836      	ldr	r0, [pc, #216]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 8001478:	f7ff fb72 	bl	8000b60 <cJSON_New_Item>
 800147c:	6378      	str	r0, [r7, #52]	@ 0x34
    if (item == NULL) /* memory fail */
 800147e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8001480:	2b00      	cmp	r3, #0
 8001482:	d02e      	beq.n	80014e2 <cJSON_ParseWithLengthOpts+0xc2>
    {
        goto fail;
    }

    if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
 8001484:	f107 0318 	add.w	r3, r7, #24
 8001488:	4618      	mov	r0, r3
 800148a:	f7ff ff79 	bl	8001380 <skip_utf8_bom>
 800148e:	4603      	mov	r3, r0
 8001490:	4618      	mov	r0, r3
 8001492:	f7ff ff35 	bl	8001300 <buffer_skip_whitespace>
 8001496:	4603      	mov	r3, r0
 8001498:	4619      	mov	r1, r3
 800149a:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 800149c:	f000 f868 	bl	8001570 <parse_value>
 80014a0:	4603      	mov	r3, r0
 80014a2:	2b00      	cmp	r3, #0
 80014a4:	d01f      	beq.n	80014e6 <cJSON_ParseWithLengthOpts+0xc6>
        /* parse failure. ep is set. */
        goto fail;
    }

    /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
    if (require_null_terminated)
 80014a6:	683b      	ldr	r3, [r7, #0]
 80014a8:	2b00      	cmp	r3, #0
 80014aa:	d00e      	beq.n	80014ca <cJSON_ParseWithLengthOpts+0xaa>
    {
        buffer_skip_whitespace(&buffer);
 80014ac:	f107 0318 	add.w	r3, r7, #24
 80014b0:	4618      	mov	r0, r3
 80014b2:	f7ff ff25 	bl	8001300 <buffer_skip_whitespace>
        if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
 80014b6:	6a3a      	ldr	r2, [r7, #32]
 80014b8:	69fb      	ldr	r3, [r7, #28]
 80014ba:	429a      	cmp	r2, r3
 80014bc:	d215      	bcs.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
 80014be:	69ba      	ldr	r2, [r7, #24]
 80014c0:	6a3b      	ldr	r3, [r7, #32]
 80014c2:	4413      	add	r3, r2
 80014c4:	781b      	ldrb	r3, [r3, #0]
 80014c6:	2b00      	cmp	r3, #0
 80014c8:	d10f      	bne.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
        {
            goto fail;
        }
    }
    if (return_parse_end)
 80014ca:	687b      	ldr	r3, [r7, #4]
 80014cc:	2b00      	cmp	r3, #0
 80014ce:	d004      	beq.n	80014da <cJSON_ParseWithLengthOpts+0xba>
    {
        *return_parse_end = (const char*)buffer_at_offset(&buffer);
 80014d0:	69ba      	ldr	r2, [r7, #24]
 80014d2:	6a3b      	ldr	r3, [r7, #32]
 80014d4:	441a      	add	r2, r3
 80014d6:	687b      	ldr	r3, [r7, #4]
 80014d8:	601a      	str	r2, [r3, #0]
    }

    return item;
 80014da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014dc:	e031      	b.n	8001542 <cJSON_ParseWithLengthOpts+0x122>
        goto fail;
 80014de:	bf00      	nop
 80014e0:	e004      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e2:	bf00      	nop
 80014e4:	e002      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e6:	bf00      	nop
 80014e8:	e000      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
            goto fail;
 80014ea:	bf00      	nop

fail:
    if (item != NULL)
 80014ec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014ee:	2b00      	cmp	r3, #0
 80014f0:	d002      	beq.n	80014f8 <cJSON_ParseWithLengthOpts+0xd8>
    {
        cJSON_Delete(item);
 80014f2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80014f4:	f7ff fb4a 	bl	8000b8c <cJSON_Delete>
    }

    if (value != NULL)
 80014f8:	68fb      	ldr	r3, [r7, #12]
 80014fa:	2b00      	cmp	r3, #0
 80014fc:	d020      	beq.n	8001540 <cJSON_ParseWithLengthOpts+0x120>
    {
        error local_error;
        local_error.json = (const unsigned char*)value;
 80014fe:	68fb      	ldr	r3, [r7, #12]
 8001500:	613b      	str	r3, [r7, #16]
        local_error.position = 0;
 8001502:	2300      	movs	r3, #0
 8001504:	617b      	str	r3, [r7, #20]

        if (buffer.offset < buffer.length)
 8001506:	6a3a      	ldr	r2, [r7, #32]
 8001508:	69fb      	ldr	r3, [r7, #28]
 800150a:	429a      	cmp	r2, r3
 800150c:	d202      	bcs.n	8001514 <cJSON_ParseWithLengthOpts+0xf4>
        {
            local_error.position = buffer.offset;
 800150e:	6a3b      	ldr	r3, [r7, #32]
 8001510:	617b      	str	r3, [r7, #20]
 8001512:	e005      	b.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        }
        else if (buffer.length > 0)
 8001514:	69fb      	ldr	r3, [r7, #28]
 8001516:	2b00      	cmp	r3, #0
 8001518:	d002      	beq.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        {
            local_error.position = buffer.length - 1;
 800151a:	69fb      	ldr	r3, [r7, #28]
 800151c:	3b01      	subs	r3, #1
 800151e:	617b      	str	r3, [r7, #20]
        }

        if (return_parse_end != NULL)
 8001520:	687b      	ldr	r3, [r7, #4]
 8001522:	2b00      	cmp	r3, #0
 8001524:	d004      	beq.n	8001530 <cJSON_ParseWithLengthOpts+0x110>
        {
            *return_parse_end = (const char*)local_error.json + local_error.position;
 8001526:	693a      	ldr	r2, [r7, #16]
 8001528:	697b      	ldr	r3, [r7, #20]
 800152a:	441a      	add	r2, r3
 800152c:	687b      	ldr	r3, [r7, #4]
 800152e:	601a      	str	r2, [r3, #0]
        }

        global_error = local_error;
 8001530:	4b06      	ldr	r3, [pc, #24]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001532:	461a      	mov	r2, r3
 8001534:	f107 0310 	add.w	r3, r7, #16
 8001538:	e893 0003 	ldmia.w	r3, {r0, r1}
 800153c:	e882 0003 	stmia.w	r2, {r0, r1}
    }

    return NULL;
 8001540:	2300      	movs	r3, #0
}
 8001542:	4618      	mov	r0, r3
 8001544:	3738      	adds	r7, #56	@ 0x38
 8001546:	46bd      	mov	sp, r7
 8001548:	bd80      	pop	{r7, pc}
 800154a:	bf00      	nop
 800154c:	24000240 	.word	0x24000240
 8001550:	24000000 	.word	0x24000000

08001554 <cJSON_Parse>:

/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
 8001554:	b580      	push	{r7, lr}
 8001556:	b082      	sub	sp, #8
 8001558:	af00      	add	r7, sp, #0
 800155a:	6078      	str	r0, [r7, #4]
    return cJSON_ParseWithOpts(value, 0, 0);
 800155c:	2200      	movs	r2, #0
 800155e:	2100      	movs	r1, #0
 8001560:	6878      	ldr	r0, [r7, #4]
 8001562:	f7ff ff41 	bl	80013e8 <cJSON_ParseWithOpts>
 8001566:	4603      	mov	r3, r0
}
 8001568:	4618      	mov	r0, r3
 800156a:	3708      	adds	r7, #8
 800156c:	46bd      	mov	sp, r7
 800156e:	bd80      	pop	{r7, pc}

08001570 <parse_value>:
    return print_value(item, &p);
}

/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
 8001570:	b580      	push	{r7, lr}
 8001572:	b082      	sub	sp, #8
 8001574:	af00      	add	r7, sp, #0
 8001576:	6078      	str	r0, [r7, #4]
 8001578:	6039      	str	r1, [r7, #0]
    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 800157a:	683b      	ldr	r3, [r7, #0]
 800157c:	2b00      	cmp	r3, #0
 800157e:	d003      	beq.n	8001588 <parse_value+0x18>
 8001580:	683b      	ldr	r3, [r7, #0]
 8001582:	681b      	ldr	r3, [r3, #0]
 8001584:	2b00      	cmp	r3, #0
 8001586:	d101      	bne.n	800158c <parse_value+0x1c>
    {
        return false; /* no input */
 8001588:	2300      	movs	r3, #0
 800158a:	e0d2      	b.n	8001732 <parse_value+0x1c2>
    }

    /* parse the different types of values */
    /* null */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
 800158c:	683b      	ldr	r3, [r7, #0]
 800158e:	2b00      	cmp	r3, #0
 8001590:	d01d      	beq.n	80015ce <parse_value+0x5e>
 8001592:	683b      	ldr	r3, [r7, #0]
 8001594:	689b      	ldr	r3, [r3, #8]
 8001596:	1d1a      	adds	r2, r3, #4
 8001598:	683b      	ldr	r3, [r7, #0]
 800159a:	685b      	ldr	r3, [r3, #4]
 800159c:	429a      	cmp	r2, r3
 800159e:	d816      	bhi.n	80015ce <parse_value+0x5e>
 80015a0:	683b      	ldr	r3, [r7, #0]
 80015a2:	681a      	ldr	r2, [r3, #0]
 80015a4:	683b      	ldr	r3, [r7, #0]
 80015a6:	689b      	ldr	r3, [r3, #8]
 80015a8:	4413      	add	r3, r2
 80015aa:	2204      	movs	r2, #4
 80015ac:	4963      	ldr	r1, [pc, #396]	@ (800173c <parse_value+0x1cc>)
 80015ae:	4618      	mov	r0, r3
 80015b0:	f029 fa6e 	bl	802aa90 <strncmp>
 80015b4:	4603      	mov	r3, r0
 80015b6:	2b00      	cmp	r3, #0
 80015b8:	d109      	bne.n	80015ce <parse_value+0x5e>
    {
        item->type = cJSON_NULL;
 80015ba:	687b      	ldr	r3, [r7, #4]
 80015bc:	2204      	movs	r2, #4
 80015be:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 4;
 80015c0:	683b      	ldr	r3, [r7, #0]
 80015c2:	689b      	ldr	r3, [r3, #8]
 80015c4:	1d1a      	adds	r2, r3, #4
 80015c6:	683b      	ldr	r3, [r7, #0]
 80015c8:	609a      	str	r2, [r3, #8]
        return true;
 80015ca:	2301      	movs	r3, #1
 80015cc:	e0b1      	b.n	8001732 <parse_value+0x1c2>
    }
    /* false */
    if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
 80015ce:	683b      	ldr	r3, [r7, #0]
 80015d0:	2b00      	cmp	r3, #0
 80015d2:	d01d      	beq.n	8001610 <parse_value+0xa0>
 80015d4:	683b      	ldr	r3, [r7, #0]
 80015d6:	689b      	ldr	r3, [r3, #8]
 80015d8:	1d5a      	adds	r2, r3, #5
 80015da:	683b      	ldr	r3, [r7, #0]
 80015dc:	685b      	ldr	r3, [r3, #4]
 80015de:	429a      	cmp	r2, r3
 80015e0:	d816      	bhi.n	8001610 <parse_value+0xa0>
 80015e2:	683b      	ldr	r3, [r7, #0]
 80015e4:	681a      	ldr	r2, [r3, #0]
 80015e6:	683b      	ldr	r3, [r7, #0]
 80015e8:	689b      	ldr	r3, [r3, #8]
 80015ea:	4413      	add	r3, r2
 80015ec:	2205      	movs	r2, #5
 80015ee:	4954      	ldr	r1, [pc, #336]	@ (8001740 <parse_value+0x1d0>)
 80015f0:	4618      	mov	r0, r3
 80015f2:	f029 fa4d 	bl	802aa90 <strncmp>
 80015f6:	4603      	mov	r3, r0
 80015f8:	2b00      	cmp	r3, #0
 80015fa:	d109      	bne.n	8001610 <parse_value+0xa0>
    {
        item->type = cJSON_False;
 80015fc:	687b      	ldr	r3, [r7, #4]
 80015fe:	2201      	movs	r2, #1
 8001600:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 5;
 8001602:	683b      	ldr	r3, [r7, #0]
 8001604:	689b      	ldr	r3, [r3, #8]
 8001606:	1d5a      	adds	r2, r3, #5
 8001608:	683b      	ldr	r3, [r7, #0]
 800160a:	609a      	str	r2, [r3, #8]
        return true;
 800160c:	2301      	movs	r3, #1
 800160e:	e090      	b.n	8001732 <parse_value+0x1c2>
    }
    /* true */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
 8001610:	683b      	ldr	r3, [r7, #0]
 8001612:	2b00      	cmp	r3, #0
 8001614:	d020      	beq.n	8001658 <parse_value+0xe8>
 8001616:	683b      	ldr	r3, [r7, #0]
 8001618:	689b      	ldr	r3, [r3, #8]
 800161a:	1d1a      	adds	r2, r3, #4
 800161c:	683b      	ldr	r3, [r7, #0]
 800161e:	685b      	ldr	r3, [r3, #4]
 8001620:	429a      	cmp	r2, r3
 8001622:	d819      	bhi.n	8001658 <parse_value+0xe8>
 8001624:	683b      	ldr	r3, [r7, #0]
 8001626:	681a      	ldr	r2, [r3, #0]
 8001628:	683b      	ldr	r3, [r7, #0]
 800162a:	689b      	ldr	r3, [r3, #8]
 800162c:	4413      	add	r3, r2
 800162e:	2204      	movs	r2, #4
 8001630:	4944      	ldr	r1, [pc, #272]	@ (8001744 <parse_value+0x1d4>)
 8001632:	4618      	mov	r0, r3
 8001634:	f029 fa2c 	bl	802aa90 <strncmp>
 8001638:	4603      	mov	r3, r0
 800163a:	2b00      	cmp	r3, #0
 800163c:	d10c      	bne.n	8001658 <parse_value+0xe8>
    {
        item->type = cJSON_True;
 800163e:	687b      	ldr	r3, [r7, #4]
 8001640:	2202      	movs	r2, #2
 8001642:	60da      	str	r2, [r3, #12]
        item->valueint = 1;
 8001644:	687b      	ldr	r3, [r7, #4]
 8001646:	2201      	movs	r2, #1
 8001648:	615a      	str	r2, [r3, #20]
        input_buffer->offset += 4;
 800164a:	683b      	ldr	r3, [r7, #0]
 800164c:	689b      	ldr	r3, [r3, #8]
 800164e:	1d1a      	adds	r2, r3, #4
 8001650:	683b      	ldr	r3, [r7, #0]
 8001652:	609a      	str	r2, [r3, #8]
        return true;
 8001654:	2301      	movs	r3, #1
 8001656:	e06c      	b.n	8001732 <parse_value+0x1c2>
    }
    /* string */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
 8001658:	683b      	ldr	r3, [r7, #0]
 800165a:	2b00      	cmp	r3, #0
 800165c:	d013      	beq.n	8001686 <parse_value+0x116>
 800165e:	683b      	ldr	r3, [r7, #0]
 8001660:	689a      	ldr	r2, [r3, #8]
 8001662:	683b      	ldr	r3, [r7, #0]
 8001664:	685b      	ldr	r3, [r3, #4]
 8001666:	429a      	cmp	r2, r3
 8001668:	d20d      	bcs.n	8001686 <parse_value+0x116>
 800166a:	683b      	ldr	r3, [r7, #0]
 800166c:	681a      	ldr	r2, [r3, #0]
 800166e:	683b      	ldr	r3, [r7, #0]
 8001670:	689b      	ldr	r3, [r3, #8]
 8001672:	4413      	add	r3, r2
 8001674:	781b      	ldrb	r3, [r3, #0]
 8001676:	2b22      	cmp	r3, #34	@ 0x22
 8001678:	d105      	bne.n	8001686 <parse_value+0x116>
    {
        return parse_string(item, input_buffer);
 800167a:	6839      	ldr	r1, [r7, #0]
 800167c:	6878      	ldr	r0, [r7, #4]
 800167e:	f7ff fcf7 	bl	8001070 <parse_string>
 8001682:	4603      	mov	r3, r0
 8001684:	e055      	b.n	8001732 <parse_value+0x1c2>
    }
    /* number */
    if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
 8001686:	683b      	ldr	r3, [r7, #0]
 8001688:	2b00      	cmp	r3, #0
 800168a:	d023      	beq.n	80016d4 <parse_value+0x164>
 800168c:	683b      	ldr	r3, [r7, #0]
 800168e:	689a      	ldr	r2, [r3, #8]
 8001690:	683b      	ldr	r3, [r7, #0]
 8001692:	685b      	ldr	r3, [r3, #4]
 8001694:	429a      	cmp	r2, r3
 8001696:	d21d      	bcs.n	80016d4 <parse_value+0x164>
 8001698:	683b      	ldr	r3, [r7, #0]
 800169a:	681a      	ldr	r2, [r3, #0]
 800169c:	683b      	ldr	r3, [r7, #0]
 800169e:	689b      	ldr	r3, [r3, #8]
 80016a0:	4413      	add	r3, r2
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	2b2d      	cmp	r3, #45	@ 0x2d
 80016a6:	d00f      	beq.n	80016c8 <parse_value+0x158>
 80016a8:	683b      	ldr	r3, [r7, #0]
 80016aa:	681a      	ldr	r2, [r3, #0]
 80016ac:	683b      	ldr	r3, [r7, #0]
 80016ae:	689b      	ldr	r3, [r3, #8]
 80016b0:	4413      	add	r3, r2
 80016b2:	781b      	ldrb	r3, [r3, #0]
 80016b4:	2b2f      	cmp	r3, #47	@ 0x2f
 80016b6:	d90d      	bls.n	80016d4 <parse_value+0x164>
 80016b8:	683b      	ldr	r3, [r7, #0]
 80016ba:	681a      	ldr	r2, [r3, #0]
 80016bc:	683b      	ldr	r3, [r7, #0]
 80016be:	689b      	ldr	r3, [r3, #8]
 80016c0:	4413      	add	r3, r2
 80016c2:	781b      	ldrb	r3, [r3, #0]
 80016c4:	2b39      	cmp	r3, #57	@ 0x39
 80016c6:	d805      	bhi.n	80016d4 <parse_value+0x164>
    {
        return parse_number(item, input_buffer);
 80016c8:	6839      	ldr	r1, [r7, #0]
 80016ca:	6878      	ldr	r0, [r7, #4]
 80016cc:	f7ff fab8 	bl	8000c40 <parse_number>
 80016d0:	4603      	mov	r3, r0
 80016d2:	e02e      	b.n	8001732 <parse_value+0x1c2>
    }
    /* array */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
 80016d4:	683b      	ldr	r3, [r7, #0]
 80016d6:	2b00      	cmp	r3, #0
 80016d8:	d013      	beq.n	8001702 <parse_value+0x192>
 80016da:	683b      	ldr	r3, [r7, #0]
 80016dc:	689a      	ldr	r2, [r3, #8]
 80016de:	683b      	ldr	r3, [r7, #0]
 80016e0:	685b      	ldr	r3, [r3, #4]
 80016e2:	429a      	cmp	r2, r3
 80016e4:	d20d      	bcs.n	8001702 <parse_value+0x192>
 80016e6:	683b      	ldr	r3, [r7, #0]
 80016e8:	681a      	ldr	r2, [r3, #0]
 80016ea:	683b      	ldr	r3, [r7, #0]
 80016ec:	689b      	ldr	r3, [r3, #8]
 80016ee:	4413      	add	r3, r2
 80016f0:	781b      	ldrb	r3, [r3, #0]
 80016f2:	2b5b      	cmp	r3, #91	@ 0x5b
 80016f4:	d105      	bne.n	8001702 <parse_value+0x192>
    {
        return parse_array(item, input_buffer);
 80016f6:	6839      	ldr	r1, [r7, #0]
 80016f8:	6878      	ldr	r0, [r7, #4]
 80016fa:	f000 f825 	bl	8001748 <parse_array>
 80016fe:	4603      	mov	r3, r0
 8001700:	e017      	b.n	8001732 <parse_value+0x1c2>
    }
    /* object */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
 8001702:	683b      	ldr	r3, [r7, #0]
 8001704:	2b00      	cmp	r3, #0
 8001706:	d013      	beq.n	8001730 <parse_value+0x1c0>
 8001708:	683b      	ldr	r3, [r7, #0]
 800170a:	689a      	ldr	r2, [r3, #8]
 800170c:	683b      	ldr	r3, [r7, #0]
 800170e:	685b      	ldr	r3, [r3, #4]
 8001710:	429a      	cmp	r2, r3
 8001712:	d20d      	bcs.n	8001730 <parse_value+0x1c0>
 8001714:	683b      	ldr	r3, [r7, #0]
 8001716:	681a      	ldr	r2, [r3, #0]
 8001718:	683b      	ldr	r3, [r7, #0]
 800171a:	689b      	ldr	r3, [r3, #8]
 800171c:	4413      	add	r3, r2
 800171e:	781b      	ldrb	r3, [r3, #0]
 8001720:	2b7b      	cmp	r3, #123	@ 0x7b
 8001722:	d105      	bne.n	8001730 <parse_value+0x1c0>
    {
        return parse_object(item, input_buffer);
 8001724:	6839      	ldr	r1, [r7, #0]
 8001726:	6878      	ldr	r0, [r7, #4]
 8001728:	f000 f8d2 	bl	80018d0 <parse_object>
 800172c:	4603      	mov	r3, r0
 800172e:	e000      	b.n	8001732 <parse_value+0x1c2>
    }

    return false;
 8001730:	2300      	movs	r3, #0
}
 8001732:	4618      	mov	r0, r3
 8001734:	3708      	adds	r7, #8
 8001736:	46bd      	mov	sp, r7
 8001738:	bd80      	pop	{r7, pc}
 800173a:	bf00      	nop
 800173c:	0802d1ec 	.word	0x0802d1ec
 8001740:	0802d21c 	.word	0x0802d21c
 8001744:	0802d224 	.word	0x0802d224

08001748 <parse_array>:
    }
}

/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
 8001748:	b580      	push	{r7, lr}
 800174a:	b086      	sub	sp, #24
 800174c:	af00      	add	r7, sp, #0
 800174e:	6078      	str	r0, [r7, #4]
 8001750:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* head of the linked list */
 8001752:	2300      	movs	r3, #0
 8001754:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 8001756:	2300      	movs	r3, #0
 8001758:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 800175a:	683b      	ldr	r3, [r7, #0]
 800175c:	68db      	ldr	r3, [r3, #12]
 800175e:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8001762:	d301      	bcc.n	8001768 <parse_array+0x20>
    {
        return false; /* to deeply nested */
 8001764:	2300      	movs	r3, #0
 8001766:	e0af      	b.n	80018c8 <parse_array+0x180>
    }
    input_buffer->depth++;
 8001768:	683b      	ldr	r3, [r7, #0]
 800176a:	68db      	ldr	r3, [r3, #12]
 800176c:	1c5a      	adds	r2, r3, #1
 800176e:	683b      	ldr	r3, [r7, #0]
 8001770:	60da      	str	r2, [r3, #12]

    if (buffer_at_offset(input_buffer)[0] != '[')
 8001772:	683b      	ldr	r3, [r7, #0]
 8001774:	681a      	ldr	r2, [r3, #0]
 8001776:	683b      	ldr	r3, [r7, #0]
 8001778:	689b      	ldr	r3, [r3, #8]
 800177a:	4413      	add	r3, r2
 800177c:	781b      	ldrb	r3, [r3, #0]
 800177e:	2b5b      	cmp	r3, #91	@ 0x5b
 8001780:	f040 8094 	bne.w	80018ac <parse_array+0x164>
    {
        /* not an array */
        goto fail;
    }

    input_buffer->offset++;
 8001784:	683b      	ldr	r3, [r7, #0]
 8001786:	689b      	ldr	r3, [r3, #8]
 8001788:	1c5a      	adds	r2, r3, #1
 800178a:	683b      	ldr	r3, [r7, #0]
 800178c:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800178e:	6838      	ldr	r0, [r7, #0]
 8001790:	f7ff fdb6 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
 8001794:	683b      	ldr	r3, [r7, #0]
 8001796:	2b00      	cmp	r3, #0
 8001798:	d00d      	beq.n	80017b6 <parse_array+0x6e>
 800179a:	683b      	ldr	r3, [r7, #0]
 800179c:	689a      	ldr	r2, [r3, #8]
 800179e:	683b      	ldr	r3, [r7, #0]
 80017a0:	685b      	ldr	r3, [r3, #4]
 80017a2:	429a      	cmp	r2, r3
 80017a4:	d207      	bcs.n	80017b6 <parse_array+0x6e>
 80017a6:	683b      	ldr	r3, [r7, #0]
 80017a8:	681a      	ldr	r2, [r3, #0]
 80017aa:	683b      	ldr	r3, [r7, #0]
 80017ac:	689b      	ldr	r3, [r3, #8]
 80017ae:	4413      	add	r3, r2
 80017b0:	781b      	ldrb	r3, [r3, #0]
 80017b2:	2b5d      	cmp	r3, #93	@ 0x5d
 80017b4:	d061      	beq.n	800187a <parse_array+0x132>
        /* empty array */
        goto success;
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 80017b6:	683b      	ldr	r3, [r7, #0]
 80017b8:	2b00      	cmp	r3, #0
 80017ba:	d005      	beq.n	80017c8 <parse_array+0x80>
 80017bc:	683b      	ldr	r3, [r7, #0]
 80017be:	689a      	ldr	r2, [r3, #8]
 80017c0:	683b      	ldr	r3, [r7, #0]
 80017c2:	685b      	ldr	r3, [r3, #4]
 80017c4:	429a      	cmp	r2, r3
 80017c6:	d305      	bcc.n	80017d4 <parse_array+0x8c>
    {
        input_buffer->offset--;
 80017c8:	683b      	ldr	r3, [r7, #0]
 80017ca:	689b      	ldr	r3, [r3, #8]
 80017cc:	1e5a      	subs	r2, r3, #1
 80017ce:	683b      	ldr	r3, [r7, #0]
 80017d0:	609a      	str	r2, [r3, #8]
        goto fail;
 80017d2:	e072      	b.n	80018ba <parse_array+0x172>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 80017d4:	683b      	ldr	r3, [r7, #0]
 80017d6:	689b      	ldr	r3, [r3, #8]
 80017d8:	1e5a      	subs	r2, r3, #1
 80017da:	683b      	ldr	r3, [r7, #0]
 80017dc:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 80017de:	683b      	ldr	r3, [r7, #0]
 80017e0:	3310      	adds	r3, #16
 80017e2:	4618      	mov	r0, r3
 80017e4:	f7ff f9bc 	bl	8000b60 <cJSON_New_Item>
 80017e8:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 80017ea:	68fb      	ldr	r3, [r7, #12]
 80017ec:	2b00      	cmp	r3, #0
 80017ee:	d05f      	beq.n	80018b0 <parse_array+0x168>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 80017f0:	697b      	ldr	r3, [r7, #20]
 80017f2:	2b00      	cmp	r3, #0
 80017f4:	d104      	bne.n	8001800 <parse_array+0xb8>
        {
            /* start the linked list */
            current_item = head = new_item;
 80017f6:	68fb      	ldr	r3, [r7, #12]
 80017f8:	617b      	str	r3, [r7, #20]
 80017fa:	697b      	ldr	r3, [r7, #20]
 80017fc:	613b      	str	r3, [r7, #16]
 80017fe:	e007      	b.n	8001810 <parse_array+0xc8>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 8001800:	693b      	ldr	r3, [r7, #16]
 8001802:	68fa      	ldr	r2, [r7, #12]
 8001804:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 8001806:	68fb      	ldr	r3, [r7, #12]
 8001808:	693a      	ldr	r2, [r7, #16]
 800180a:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 800180c:	68fb      	ldr	r3, [r7, #12]
 800180e:	613b      	str	r3, [r7, #16]
        }

        /* parse next value */
        input_buffer->offset++;
 8001810:	683b      	ldr	r3, [r7, #0]
 8001812:	689b      	ldr	r3, [r3, #8]
 8001814:	1c5a      	adds	r2, r3, #1
 8001816:	683b      	ldr	r3, [r7, #0]
 8001818:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 800181a:	6838      	ldr	r0, [r7, #0]
 800181c:	f7ff fd70 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001820:	6839      	ldr	r1, [r7, #0]
 8001822:	6938      	ldr	r0, [r7, #16]
 8001824:	f7ff fea4 	bl	8001570 <parse_value>
 8001828:	4603      	mov	r3, r0
 800182a:	2b00      	cmp	r3, #0
 800182c:	d042      	beq.n	80018b4 <parse_array+0x16c>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 800182e:	6838      	ldr	r0, [r7, #0]
 8001830:	f7ff fd66 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001834:	683b      	ldr	r3, [r7, #0]
 8001836:	2b00      	cmp	r3, #0
 8001838:	d00d      	beq.n	8001856 <parse_array+0x10e>
 800183a:	683b      	ldr	r3, [r7, #0]
 800183c:	689a      	ldr	r2, [r3, #8]
 800183e:	683b      	ldr	r3, [r7, #0]
 8001840:	685b      	ldr	r3, [r3, #4]
 8001842:	429a      	cmp	r2, r3
 8001844:	d207      	bcs.n	8001856 <parse_array+0x10e>
 8001846:	683b      	ldr	r3, [r7, #0]
 8001848:	681a      	ldr	r2, [r3, #0]
 800184a:	683b      	ldr	r3, [r7, #0]
 800184c:	689b      	ldr	r3, [r3, #8]
 800184e:	4413      	add	r3, r2
 8001850:	781b      	ldrb	r3, [r3, #0]
 8001852:	2b2c      	cmp	r3, #44	@ 0x2c
 8001854:	d0c3      	beq.n	80017de <parse_array+0x96>

    if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
 8001856:	683b      	ldr	r3, [r7, #0]
 8001858:	2b00      	cmp	r3, #0
 800185a:	d02d      	beq.n	80018b8 <parse_array+0x170>
 800185c:	683b      	ldr	r3, [r7, #0]
 800185e:	689a      	ldr	r2, [r3, #8]
 8001860:	683b      	ldr	r3, [r7, #0]
 8001862:	685b      	ldr	r3, [r3, #4]
 8001864:	429a      	cmp	r2, r3
 8001866:	d227      	bcs.n	80018b8 <parse_array+0x170>
 8001868:	683b      	ldr	r3, [r7, #0]
 800186a:	681a      	ldr	r2, [r3, #0]
 800186c:	683b      	ldr	r3, [r7, #0]
 800186e:	689b      	ldr	r3, [r3, #8]
 8001870:	4413      	add	r3, r2
 8001872:	781b      	ldrb	r3, [r3, #0]
 8001874:	2b5d      	cmp	r3, #93	@ 0x5d
 8001876:	d11f      	bne.n	80018b8 <parse_array+0x170>
    {
        goto fail; /* expected end of array */
    }

success:
 8001878:	e000      	b.n	800187c <parse_array+0x134>
        goto success;
 800187a:	bf00      	nop
    input_buffer->depth--;
 800187c:	683b      	ldr	r3, [r7, #0]
 800187e:	68db      	ldr	r3, [r3, #12]
 8001880:	1e5a      	subs	r2, r3, #1
 8001882:	683b      	ldr	r3, [r7, #0]
 8001884:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001886:	697b      	ldr	r3, [r7, #20]
 8001888:	2b00      	cmp	r3, #0
 800188a:	d002      	beq.n	8001892 <parse_array+0x14a>
        head->prev = current_item;
 800188c:	697b      	ldr	r3, [r7, #20]
 800188e:	693a      	ldr	r2, [r7, #16]
 8001890:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Array;
 8001892:	687b      	ldr	r3, [r7, #4]
 8001894:	2220      	movs	r2, #32
 8001896:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	697a      	ldr	r2, [r7, #20]
 800189c:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 800189e:	683b      	ldr	r3, [r7, #0]
 80018a0:	689b      	ldr	r3, [r3, #8]
 80018a2:	1c5a      	adds	r2, r3, #1
 80018a4:	683b      	ldr	r3, [r7, #0]
 80018a6:	609a      	str	r2, [r3, #8]

    return true;
 80018a8:	2301      	movs	r3, #1
 80018aa:	e00d      	b.n	80018c8 <parse_array+0x180>
        goto fail;
 80018ac:	bf00      	nop
 80018ae:	e004      	b.n	80018ba <parse_array+0x172>
            goto fail; /* allocation failure */
 80018b0:	bf00      	nop
 80018b2:	e002      	b.n	80018ba <parse_array+0x172>
            goto fail; /* failed to parse value */
 80018b4:	bf00      	nop
 80018b6:	e000      	b.n	80018ba <parse_array+0x172>
        goto fail; /* expected end of array */
 80018b8:	bf00      	nop

fail:
    if (head != NULL)
 80018ba:	697b      	ldr	r3, [r7, #20]
 80018bc:	2b00      	cmp	r3, #0
 80018be:	d002      	beq.n	80018c6 <parse_array+0x17e>
    {
        cJSON_Delete(head);
 80018c0:	6978      	ldr	r0, [r7, #20]
 80018c2:	f7ff f963 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 80018c6:	2300      	movs	r3, #0
}
 80018c8:	4618      	mov	r0, r3
 80018ca:	3718      	adds	r7, #24
 80018cc:	46bd      	mov	sp, r7
 80018ce:	bd80      	pop	{r7, pc}

080018d0 <parse_object>:
    return true;
}

/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
 80018d0:	b580      	push	{r7, lr}
 80018d2:	b086      	sub	sp, #24
 80018d4:	af00      	add	r7, sp, #0
 80018d6:	6078      	str	r0, [r7, #4]
 80018d8:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* linked list head */
 80018da:	2300      	movs	r3, #0
 80018dc:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 80018de:	2300      	movs	r3, #0
 80018e0:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 80018e2:	683b      	ldr	r3, [r7, #0]
 80018e4:	68db      	ldr	r3, [r3, #12]
 80018e6:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80018ea:	d301      	bcc.n	80018f0 <parse_object+0x20>
    {
        return false; /* to deeply nested */
 80018ec:	2300      	movs	r3, #0
 80018ee:	e0f7      	b.n	8001ae0 <parse_object+0x210>
    }
    input_buffer->depth++;
 80018f0:	683b      	ldr	r3, [r7, #0]
 80018f2:	68db      	ldr	r3, [r3, #12]
 80018f4:	1c5a      	adds	r2, r3, #1
 80018f6:	683b      	ldr	r3, [r7, #0]
 80018f8:	60da      	str	r2, [r3, #12]

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
 80018fa:	683b      	ldr	r3, [r7, #0]
 80018fc:	2b00      	cmp	r3, #0
 80018fe:	f000 80db 	beq.w	8001ab8 <parse_object+0x1e8>
 8001902:	683b      	ldr	r3, [r7, #0]
 8001904:	689a      	ldr	r2, [r3, #8]
 8001906:	683b      	ldr	r3, [r7, #0]
 8001908:	685b      	ldr	r3, [r3, #4]
 800190a:	429a      	cmp	r2, r3
 800190c:	f080 80d4 	bcs.w	8001ab8 <parse_object+0x1e8>
 8001910:	683b      	ldr	r3, [r7, #0]
 8001912:	681a      	ldr	r2, [r3, #0]
 8001914:	683b      	ldr	r3, [r7, #0]
 8001916:	689b      	ldr	r3, [r3, #8]
 8001918:	4413      	add	r3, r2
 800191a:	781b      	ldrb	r3, [r3, #0]
 800191c:	2b7b      	cmp	r3, #123	@ 0x7b
 800191e:	f040 80cb 	bne.w	8001ab8 <parse_object+0x1e8>
    {
        goto fail; /* not an object */
    }

    input_buffer->offset++;
 8001922:	683b      	ldr	r3, [r7, #0]
 8001924:	689b      	ldr	r3, [r3, #8]
 8001926:	1c5a      	adds	r2, r3, #1
 8001928:	683b      	ldr	r3, [r7, #0]
 800192a:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800192c:	6838      	ldr	r0, [r7, #0]
 800192e:	f7ff fce7 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
 8001932:	683b      	ldr	r3, [r7, #0]
 8001934:	2b00      	cmp	r3, #0
 8001936:	d00e      	beq.n	8001956 <parse_object+0x86>
 8001938:	683b      	ldr	r3, [r7, #0]
 800193a:	689a      	ldr	r2, [r3, #8]
 800193c:	683b      	ldr	r3, [r7, #0]
 800193e:	685b      	ldr	r3, [r3, #4]
 8001940:	429a      	cmp	r2, r3
 8001942:	d208      	bcs.n	8001956 <parse_object+0x86>
 8001944:	683b      	ldr	r3, [r7, #0]
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	683b      	ldr	r3, [r7, #0]
 800194a:	689b      	ldr	r3, [r3, #8]
 800194c:	4413      	add	r3, r2
 800194e:	781b      	ldrb	r3, [r3, #0]
 8001950:	2b7d      	cmp	r3, #125	@ 0x7d
 8001952:	f000 8098 	beq.w	8001a86 <parse_object+0x1b6>
    {
        goto success; /* empty object */
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 8001956:	683b      	ldr	r3, [r7, #0]
 8001958:	2b00      	cmp	r3, #0
 800195a:	d005      	beq.n	8001968 <parse_object+0x98>
 800195c:	683b      	ldr	r3, [r7, #0]
 800195e:	689a      	ldr	r2, [r3, #8]
 8001960:	683b      	ldr	r3, [r7, #0]
 8001962:	685b      	ldr	r3, [r3, #4]
 8001964:	429a      	cmp	r2, r3
 8001966:	d305      	bcc.n	8001974 <parse_object+0xa4>
    {
        input_buffer->offset--;
 8001968:	683b      	ldr	r3, [r7, #0]
 800196a:	689b      	ldr	r3, [r3, #8]
 800196c:	1e5a      	subs	r2, r3, #1
 800196e:	683b      	ldr	r3, [r7, #0]
 8001970:	609a      	str	r2, [r3, #8]
        goto fail;
 8001972:	e0ae      	b.n	8001ad2 <parse_object+0x202>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 8001974:	683b      	ldr	r3, [r7, #0]
 8001976:	689b      	ldr	r3, [r3, #8]
 8001978:	1e5a      	subs	r2, r3, #1
 800197a:	683b      	ldr	r3, [r7, #0]
 800197c:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 800197e:	683b      	ldr	r3, [r7, #0]
 8001980:	3310      	adds	r3, #16
 8001982:	4618      	mov	r0, r3
 8001984:	f7ff f8ec 	bl	8000b60 <cJSON_New_Item>
 8001988:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 800198a:	68fb      	ldr	r3, [r7, #12]
 800198c:	2b00      	cmp	r3, #0
 800198e:	f000 8095 	beq.w	8001abc <parse_object+0x1ec>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 8001992:	697b      	ldr	r3, [r7, #20]
 8001994:	2b00      	cmp	r3, #0
 8001996:	d104      	bne.n	80019a2 <parse_object+0xd2>
        {
            /* start the linked list */
            current_item = head = new_item;
 8001998:	68fb      	ldr	r3, [r7, #12]
 800199a:	617b      	str	r3, [r7, #20]
 800199c:	697b      	ldr	r3, [r7, #20]
 800199e:	613b      	str	r3, [r7, #16]
 80019a0:	e007      	b.n	80019b2 <parse_object+0xe2>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 80019a2:	693b      	ldr	r3, [r7, #16]
 80019a4:	68fa      	ldr	r2, [r7, #12]
 80019a6:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 80019a8:	68fb      	ldr	r3, [r7, #12]
 80019aa:	693a      	ldr	r2, [r7, #16]
 80019ac:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 80019ae:	68fb      	ldr	r3, [r7, #12]
 80019b0:	613b      	str	r3, [r7, #16]
        }

        if (cannot_access_at_index(input_buffer, 1))
 80019b2:	683b      	ldr	r3, [r7, #0]
 80019b4:	2b00      	cmp	r3, #0
 80019b6:	f000 8083 	beq.w	8001ac0 <parse_object+0x1f0>
 80019ba:	683b      	ldr	r3, [r7, #0]
 80019bc:	689b      	ldr	r3, [r3, #8]
 80019be:	1c5a      	adds	r2, r3, #1
 80019c0:	683b      	ldr	r3, [r7, #0]
 80019c2:	685b      	ldr	r3, [r3, #4]
 80019c4:	429a      	cmp	r2, r3
 80019c6:	d27b      	bcs.n	8001ac0 <parse_object+0x1f0>
        {
            goto fail; /* nothing comes after the comma */
        }

        /* parse the name of the child */
        input_buffer->offset++;
 80019c8:	683b      	ldr	r3, [r7, #0]
 80019ca:	689b      	ldr	r3, [r3, #8]
 80019cc:	1c5a      	adds	r2, r3, #1
 80019ce:	683b      	ldr	r3, [r7, #0]
 80019d0:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 80019d2:	6838      	ldr	r0, [r7, #0]
 80019d4:	f7ff fc94 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_string(current_item, input_buffer))
 80019d8:	6839      	ldr	r1, [r7, #0]
 80019da:	6938      	ldr	r0, [r7, #16]
 80019dc:	f7ff fb48 	bl	8001070 <parse_string>
 80019e0:	4603      	mov	r3, r0
 80019e2:	2b00      	cmp	r3, #0
 80019e4:	d06e      	beq.n	8001ac4 <parse_object+0x1f4>
        {
            goto fail; /* failed to parse name */
        }
        buffer_skip_whitespace(input_buffer);
 80019e6:	6838      	ldr	r0, [r7, #0]
 80019e8:	f7ff fc8a 	bl	8001300 <buffer_skip_whitespace>

        /* swap valuestring and string, because we parsed the name */
        current_item->string = current_item->valuestring;
 80019ec:	693b      	ldr	r3, [r7, #16]
 80019ee:	691a      	ldr	r2, [r3, #16]
 80019f0:	693b      	ldr	r3, [r7, #16]
 80019f2:	621a      	str	r2, [r3, #32]
        current_item->valuestring = NULL;
 80019f4:	693b      	ldr	r3, [r7, #16]
 80019f6:	2200      	movs	r2, #0
 80019f8:	611a      	str	r2, [r3, #16]

        if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
 80019fa:	683b      	ldr	r3, [r7, #0]
 80019fc:	2b00      	cmp	r3, #0
 80019fe:	d063      	beq.n	8001ac8 <parse_object+0x1f8>
 8001a00:	683b      	ldr	r3, [r7, #0]
 8001a02:	689a      	ldr	r2, [r3, #8]
 8001a04:	683b      	ldr	r3, [r7, #0]
 8001a06:	685b      	ldr	r3, [r3, #4]
 8001a08:	429a      	cmp	r2, r3
 8001a0a:	d25d      	bcs.n	8001ac8 <parse_object+0x1f8>
 8001a0c:	683b      	ldr	r3, [r7, #0]
 8001a0e:	681a      	ldr	r2, [r3, #0]
 8001a10:	683b      	ldr	r3, [r7, #0]
 8001a12:	689b      	ldr	r3, [r3, #8]
 8001a14:	4413      	add	r3, r2
 8001a16:	781b      	ldrb	r3, [r3, #0]
 8001a18:	2b3a      	cmp	r3, #58	@ 0x3a
 8001a1a:	d155      	bne.n	8001ac8 <parse_object+0x1f8>
        {
            goto fail; /* invalid object */
        }

        /* parse the value */
        input_buffer->offset++;
 8001a1c:	683b      	ldr	r3, [r7, #0]
 8001a1e:	689b      	ldr	r3, [r3, #8]
 8001a20:	1c5a      	adds	r2, r3, #1
 8001a22:	683b      	ldr	r3, [r7, #0]
 8001a24:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 8001a26:	6838      	ldr	r0, [r7, #0]
 8001a28:	f7ff fc6a 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001a2c:	6839      	ldr	r1, [r7, #0]
 8001a2e:	6938      	ldr	r0, [r7, #16]
 8001a30:	f7ff fd9e 	bl	8001570 <parse_value>
 8001a34:	4603      	mov	r3, r0
 8001a36:	2b00      	cmp	r3, #0
 8001a38:	d048      	beq.n	8001acc <parse_object+0x1fc>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 8001a3a:	6838      	ldr	r0, [r7, #0]
 8001a3c:	f7ff fc60 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001a40:	683b      	ldr	r3, [r7, #0]
 8001a42:	2b00      	cmp	r3, #0
 8001a44:	d00d      	beq.n	8001a62 <parse_object+0x192>
 8001a46:	683b      	ldr	r3, [r7, #0]
 8001a48:	689a      	ldr	r2, [r3, #8]
 8001a4a:	683b      	ldr	r3, [r7, #0]
 8001a4c:	685b      	ldr	r3, [r3, #4]
 8001a4e:	429a      	cmp	r2, r3
 8001a50:	d207      	bcs.n	8001a62 <parse_object+0x192>
 8001a52:	683b      	ldr	r3, [r7, #0]
 8001a54:	681a      	ldr	r2, [r3, #0]
 8001a56:	683b      	ldr	r3, [r7, #0]
 8001a58:	689b      	ldr	r3, [r3, #8]
 8001a5a:	4413      	add	r3, r2
 8001a5c:	781b      	ldrb	r3, [r3, #0]
 8001a5e:	2b2c      	cmp	r3, #44	@ 0x2c
 8001a60:	d08d      	beq.n	800197e <parse_object+0xae>

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
 8001a62:	683b      	ldr	r3, [r7, #0]
 8001a64:	2b00      	cmp	r3, #0
 8001a66:	d033      	beq.n	8001ad0 <parse_object+0x200>
 8001a68:	683b      	ldr	r3, [r7, #0]
 8001a6a:	689a      	ldr	r2, [r3, #8]
 8001a6c:	683b      	ldr	r3, [r7, #0]
 8001a6e:	685b      	ldr	r3, [r3, #4]
 8001a70:	429a      	cmp	r2, r3
 8001a72:	d22d      	bcs.n	8001ad0 <parse_object+0x200>
 8001a74:	683b      	ldr	r3, [r7, #0]
 8001a76:	681a      	ldr	r2, [r3, #0]
 8001a78:	683b      	ldr	r3, [r7, #0]
 8001a7a:	689b      	ldr	r3, [r3, #8]
 8001a7c:	4413      	add	r3, r2
 8001a7e:	781b      	ldrb	r3, [r3, #0]
 8001a80:	2b7d      	cmp	r3, #125	@ 0x7d
 8001a82:	d125      	bne.n	8001ad0 <parse_object+0x200>
    {
        goto fail; /* expected end of object */
    }

success:
 8001a84:	e000      	b.n	8001a88 <parse_object+0x1b8>
        goto success; /* empty object */
 8001a86:	bf00      	nop
    input_buffer->depth--;
 8001a88:	683b      	ldr	r3, [r7, #0]
 8001a8a:	68db      	ldr	r3, [r3, #12]
 8001a8c:	1e5a      	subs	r2, r3, #1
 8001a8e:	683b      	ldr	r3, [r7, #0]
 8001a90:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001a92:	697b      	ldr	r3, [r7, #20]
 8001a94:	2b00      	cmp	r3, #0
 8001a96:	d002      	beq.n	8001a9e <parse_object+0x1ce>
        head->prev = current_item;
 8001a98:	697b      	ldr	r3, [r7, #20]
 8001a9a:	693a      	ldr	r2, [r7, #16]
 8001a9c:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Object;
 8001a9e:	687b      	ldr	r3, [r7, #4]
 8001aa0:	2240      	movs	r2, #64	@ 0x40
 8001aa2:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	697a      	ldr	r2, [r7, #20]
 8001aa8:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 8001aaa:	683b      	ldr	r3, [r7, #0]
 8001aac:	689b      	ldr	r3, [r3, #8]
 8001aae:	1c5a      	adds	r2, r3, #1
 8001ab0:	683b      	ldr	r3, [r7, #0]
 8001ab2:	609a      	str	r2, [r3, #8]
    return true;
 8001ab4:	2301      	movs	r3, #1
 8001ab6:	e013      	b.n	8001ae0 <parse_object+0x210>
        goto fail; /* not an object */
 8001ab8:	bf00      	nop
 8001aba:	e00a      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* allocation failure */
 8001abc:	bf00      	nop
 8001abe:	e008      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* nothing comes after the comma */
 8001ac0:	bf00      	nop
 8001ac2:	e006      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse name */
 8001ac4:	bf00      	nop
 8001ac6:	e004      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* invalid object */
 8001ac8:	bf00      	nop
 8001aca:	e002      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse value */
 8001acc:	bf00      	nop
 8001ace:	e000      	b.n	8001ad2 <parse_object+0x202>
        goto fail; /* expected end of object */
 8001ad0:	bf00      	nop

fail:
    if (head != NULL)
 8001ad2:	697b      	ldr	r3, [r7, #20]
 8001ad4:	2b00      	cmp	r3, #0
 8001ad6:	d002      	beq.n	8001ade <parse_object+0x20e>
    {
        cJSON_Delete(head);
 8001ad8:	6978      	ldr	r0, [r7, #20]
 8001ada:	f7ff f857 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 8001ade:	2300      	movs	r3, #0
}
 8001ae0:	4618      	mov	r0, r3
 8001ae2:	3718      	adds	r7, #24
 8001ae4:	46bd      	mov	sp, r7
 8001ae6:	bd80      	pop	{r7, pc}

08001ae8 <cJSON_GetArraySize>:
    return true;
}

/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
 8001ae8:	b480      	push	{r7}
 8001aea:	b085      	sub	sp, #20
 8001aec:	af00      	add	r7, sp, #0
 8001aee:	6078      	str	r0, [r7, #4]
    cJSON *child = NULL;
 8001af0:	2300      	movs	r3, #0
 8001af2:	60fb      	str	r3, [r7, #12]
    size_t size = 0;
 8001af4:	2300      	movs	r3, #0
 8001af6:	60bb      	str	r3, [r7, #8]

    if (array == NULL)
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	2b00      	cmp	r3, #0
 8001afc:	d101      	bne.n	8001b02 <cJSON_GetArraySize+0x1a>
    {
        return 0;
 8001afe:	2300      	movs	r3, #0
 8001b00:	e00d      	b.n	8001b1e <cJSON_GetArraySize+0x36>
    }

    child = array->child;
 8001b02:	687b      	ldr	r3, [r7, #4]
 8001b04:	689b      	ldr	r3, [r3, #8]
 8001b06:	60fb      	str	r3, [r7, #12]

    while(child != NULL)
 8001b08:	e005      	b.n	8001b16 <cJSON_GetArraySize+0x2e>
    {
        size++;
 8001b0a:	68bb      	ldr	r3, [r7, #8]
 8001b0c:	3301      	adds	r3, #1
 8001b0e:	60bb      	str	r3, [r7, #8]
        child = child->next;
 8001b10:	68fb      	ldr	r3, [r7, #12]
 8001b12:	681b      	ldr	r3, [r3, #0]
 8001b14:	60fb      	str	r3, [r7, #12]
    while(child != NULL)
 8001b16:	68fb      	ldr	r3, [r7, #12]
 8001b18:	2b00      	cmp	r3, #0
 8001b1a:	d1f6      	bne.n	8001b0a <cJSON_GetArraySize+0x22>
    }

    /* FIXME: Can overflow here. Cannot be fixed without breaking the API */

    return (int)size;
 8001b1c:	68bb      	ldr	r3, [r7, #8]
}
 8001b1e:	4618      	mov	r0, r3
 8001b20:	3714      	adds	r7, #20
 8001b22:	46bd      	mov	sp, r7
 8001b24:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b28:	4770      	bx	lr

08001b2a <get_array_item>:

static cJSON* get_array_item(const cJSON *array, size_t index)
{
 8001b2a:	b480      	push	{r7}
 8001b2c:	b085      	sub	sp, #20
 8001b2e:	af00      	add	r7, sp, #0
 8001b30:	6078      	str	r0, [r7, #4]
 8001b32:	6039      	str	r1, [r7, #0]
    cJSON *current_child = NULL;
 8001b34:	2300      	movs	r3, #0
 8001b36:	60fb      	str	r3, [r7, #12]

    if (array == NULL)
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	2b00      	cmp	r3, #0
 8001b3c:	d101      	bne.n	8001b42 <get_array_item+0x18>
    {
        return NULL;
 8001b3e:	2300      	movs	r3, #0
 8001b40:	e010      	b.n	8001b64 <get_array_item+0x3a>
    }

    current_child = array->child;
 8001b42:	687b      	ldr	r3, [r7, #4]
 8001b44:	689b      	ldr	r3, [r3, #8]
 8001b46:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b48:	e005      	b.n	8001b56 <get_array_item+0x2c>
    {
        index--;
 8001b4a:	683b      	ldr	r3, [r7, #0]
 8001b4c:	3b01      	subs	r3, #1
 8001b4e:	603b      	str	r3, [r7, #0]
        current_child = current_child->next;
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	681b      	ldr	r3, [r3, #0]
 8001b54:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b56:	68fb      	ldr	r3, [r7, #12]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d002      	beq.n	8001b62 <get_array_item+0x38>
 8001b5c:	683b      	ldr	r3, [r7, #0]
 8001b5e:	2b00      	cmp	r3, #0
 8001b60:	d1f3      	bne.n	8001b4a <get_array_item+0x20>
    }

    return current_child;
 8001b62:	68fb      	ldr	r3, [r7, #12]
}
 8001b64:	4618      	mov	r0, r3
 8001b66:	3714      	adds	r7, #20
 8001b68:	46bd      	mov	sp, r7
 8001b6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b6e:	4770      	bx	lr

08001b70 <cJSON_GetArrayItem>:

CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
 8001b70:	b580      	push	{r7, lr}
 8001b72:	b082      	sub	sp, #8
 8001b74:	af00      	add	r7, sp, #0
 8001b76:	6078      	str	r0, [r7, #4]
 8001b78:	6039      	str	r1, [r7, #0]
    if (index < 0)
 8001b7a:	683b      	ldr	r3, [r7, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	da01      	bge.n	8001b84 <cJSON_GetArrayItem+0x14>
    {
        return NULL;
 8001b80:	2300      	movs	r3, #0
 8001b82:	e005      	b.n	8001b90 <cJSON_GetArrayItem+0x20>
    }

    return get_array_item(array, (size_t)index);
 8001b84:	683b      	ldr	r3, [r7, #0]
 8001b86:	4619      	mov	r1, r3
 8001b88:	6878      	ldr	r0, [r7, #4]
 8001b8a:	f7ff ffce 	bl	8001b2a <get_array_item>
 8001b8e:	4603      	mov	r3, r0
}
 8001b90:	4618      	mov	r0, r3
 8001b92:	3708      	adds	r7, #8
 8001b94:	46bd      	mov	sp, r7
 8001b96:	bd80      	pop	{r7, pc}

08001b98 <get_object_item>:

static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
 8001b98:	b580      	push	{r7, lr}
 8001b9a:	b086      	sub	sp, #24
 8001b9c:	af00      	add	r7, sp, #0
 8001b9e:	60f8      	str	r0, [r7, #12]
 8001ba0:	60b9      	str	r1, [r7, #8]
 8001ba2:	607a      	str	r2, [r7, #4]
    cJSON *current_element = NULL;
 8001ba4:	2300      	movs	r3, #0
 8001ba6:	617b      	str	r3, [r7, #20]

    if ((object == NULL) || (name == NULL))
 8001ba8:	68fb      	ldr	r3, [r7, #12]
 8001baa:	2b00      	cmp	r3, #0
 8001bac:	d002      	beq.n	8001bb4 <get_object_item+0x1c>
 8001bae:	68bb      	ldr	r3, [r7, #8]
 8001bb0:	2b00      	cmp	r3, #0
 8001bb2:	d101      	bne.n	8001bb8 <get_object_item+0x20>
    {
        return NULL;
 8001bb4:	2300      	movs	r3, #0
 8001bb6:	e033      	b.n	8001c20 <get_object_item+0x88>
    }

    current_element = object->child;
 8001bb8:	68fb      	ldr	r3, [r7, #12]
 8001bba:	689b      	ldr	r3, [r3, #8]
 8001bbc:	617b      	str	r3, [r7, #20]
    if (case_sensitive)
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	2b00      	cmp	r3, #0
 8001bc2:	d017      	beq.n	8001bf4 <get_object_item+0x5c>
    {
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bc4:	e002      	b.n	8001bcc <get_object_item+0x34>
        {
            current_element = current_element->next;
 8001bc6:	697b      	ldr	r3, [r7, #20]
 8001bc8:	681b      	ldr	r3, [r3, #0]
 8001bca:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bcc:	697b      	ldr	r3, [r7, #20]
 8001bce:	2b00      	cmp	r3, #0
 8001bd0:	d01c      	beq.n	8001c0c <get_object_item+0x74>
 8001bd2:	697b      	ldr	r3, [r7, #20]
 8001bd4:	6a1b      	ldr	r3, [r3, #32]
 8001bd6:	2b00      	cmp	r3, #0
 8001bd8:	d018      	beq.n	8001c0c <get_object_item+0x74>
 8001bda:	697b      	ldr	r3, [r7, #20]
 8001bdc:	6a1b      	ldr	r3, [r3, #32]
 8001bde:	4619      	mov	r1, r3
 8001be0:	68b8      	ldr	r0, [r7, #8]
 8001be2:	f7fe fb7d 	bl	80002e0 <strcmp>
 8001be6:	4603      	mov	r3, r0
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d1ec      	bne.n	8001bc6 <get_object_item+0x2e>
 8001bec:	e00e      	b.n	8001c0c <get_object_item+0x74>
    }
    else
    {
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
        {
            current_element = current_element->next;
 8001bee:	697b      	ldr	r3, [r7, #20]
 8001bf0:	681b      	ldr	r3, [r3, #0]
 8001bf2:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
 8001bf4:	697b      	ldr	r3, [r7, #20]
 8001bf6:	2b00      	cmp	r3, #0
 8001bf8:	d008      	beq.n	8001c0c <get_object_item+0x74>
 8001bfa:	697b      	ldr	r3, [r7, #20]
 8001bfc:	6a1b      	ldr	r3, [r3, #32]
 8001bfe:	4619      	mov	r1, r3
 8001c00:	68b8      	ldr	r0, [r7, #8]
 8001c02:	f7fe ff41 	bl	8000a88 <case_insensitive_strcmp>
 8001c06:	4603      	mov	r3, r0
 8001c08:	2b00      	cmp	r3, #0
 8001c0a:	d1f0      	bne.n	8001bee <get_object_item+0x56>
        }
    }

    if ((current_element == NULL) || (current_element->string == NULL)) {
 8001c0c:	697b      	ldr	r3, [r7, #20]
 8001c0e:	2b00      	cmp	r3, #0
 8001c10:	d003      	beq.n	8001c1a <get_object_item+0x82>
 8001c12:	697b      	ldr	r3, [r7, #20]
 8001c14:	6a1b      	ldr	r3, [r3, #32]
 8001c16:	2b00      	cmp	r3, #0
 8001c18:	d101      	bne.n	8001c1e <get_object_item+0x86>
        return NULL;
 8001c1a:	2300      	movs	r3, #0
 8001c1c:	e000      	b.n	8001c20 <get_object_item+0x88>
    }

    return current_element;
 8001c1e:	697b      	ldr	r3, [r7, #20]
}
 8001c20:	4618      	mov	r0, r3
 8001c22:	3718      	adds	r7, #24
 8001c24:	46bd      	mov	sp, r7
 8001c26:	bd80      	pop	{r7, pc}

08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
    return get_object_item(object, string, false);
}

CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
 8001c28:	b580      	push	{r7, lr}
 8001c2a:	b082      	sub	sp, #8
 8001c2c:	af00      	add	r7, sp, #0
 8001c2e:	6078      	str	r0, [r7, #4]
 8001c30:	6039      	str	r1, [r7, #0]
    return get_object_item(object, string, true);
 8001c32:	2201      	movs	r2, #1
 8001c34:	6839      	ldr	r1, [r7, #0]
 8001c36:	6878      	ldr	r0, [r7, #4]
 8001c38:	f7ff ffae 	bl	8001b98 <get_object_item>
 8001c3c:	4603      	mov	r3, r0
}
 8001c3e:	4618      	mov	r0, r3
 8001c40:	3708      	adds	r7, #8
 8001c42:	46bd      	mov	sp, r7
 8001c44:	bd80      	pop	{r7, pc}

08001c46 <cJSON_IsNumber>:

    return (item->type & 0xFF) == cJSON_NULL;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
 8001c46:	b480      	push	{r7}
 8001c48:	b083      	sub	sp, #12
 8001c4a:	af00      	add	r7, sp, #0
 8001c4c:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c4e:	687b      	ldr	r3, [r7, #4]
 8001c50:	2b00      	cmp	r3, #0
 8001c52:	d101      	bne.n	8001c58 <cJSON_IsNumber+0x12>
    {
        return false;
 8001c54:	2300      	movs	r3, #0
 8001c56:	e007      	b.n	8001c68 <cJSON_IsNumber+0x22>
    }

    return (item->type & 0xFF) == cJSON_Number;
 8001c58:	687b      	ldr	r3, [r7, #4]
 8001c5a:	68db      	ldr	r3, [r3, #12]
 8001c5c:	b2db      	uxtb	r3, r3
 8001c5e:	2b08      	cmp	r3, #8
 8001c60:	bf0c      	ite	eq
 8001c62:	2301      	moveq	r3, #1
 8001c64:	2300      	movne	r3, #0
 8001c66:	b2db      	uxtb	r3, r3
}
 8001c68:	4618      	mov	r0, r3
 8001c6a:	370c      	adds	r7, #12
 8001c6c:	46bd      	mov	sp, r7
 8001c6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001c72:	4770      	bx	lr

08001c74 <cJSON_IsArray>:

    return (item->type & 0xFF) == cJSON_String;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
 8001c74:	b480      	push	{r7}
 8001c76:	b083      	sub	sp, #12
 8001c78:	af00      	add	r7, sp, #0
 8001c7a:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c7c:	687b      	ldr	r3, [r7, #4]
 8001c7e:	2b00      	cmp	r3, #0
 8001c80:	d101      	bne.n	8001c86 <cJSON_IsArray+0x12>
    {
        return false;
 8001c82:	2300      	movs	r3, #0
 8001c84:	e007      	b.n	8001c96 <cJSON_IsArray+0x22>
    }

    return (item->type & 0xFF) == cJSON_Array;
 8001c86:	687b      	ldr	r3, [r7, #4]
 8001c88:	68db      	ldr	r3, [r3, #12]
 8001c8a:	b2db      	uxtb	r3, r3
 8001c8c:	2b20      	cmp	r3, #32
 8001c8e:	bf0c      	ite	eq
 8001c90:	2301      	moveq	r3, #1
 8001c92:	2300      	movne	r3, #0
 8001c94:	b2db      	uxtb	r3, r3
}
 8001c96:	4618      	mov	r0, r3
 8001c98:	370c      	adds	r7, #12
 8001c9a:	46bd      	mov	sp, r7
 8001c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ca0:	4770      	bx	lr

08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);

/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
 8001ca2:	b480      	push	{r7}
 8001ca4:	b083      	sub	sp, #12
 8001ca6:	af00      	add	r7, sp, #0
 8001ca8:	6078      	str	r0, [r7, #4]
 8001caa:	6039      	str	r1, [r7, #0]
   /* Run time stack overflow checking is performed if
   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
   called if a stack overflow is detected. */
}
 8001cac:	bf00      	nop
 8001cae:	370c      	adds	r7, #12
 8001cb0:	46bd      	mov	sp, r7
 8001cb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001cb6:	4770      	bx	lr

08001cb8 <__io_putchar>:
//{
//	printf("DMA callback\n");
//}

int __io_putchar(int ch)
{
 8001cb8:	b580      	push	{r7, lr}
 8001cba:	b082      	sub	sp, #8
 8001cbc:	af00      	add	r7, sp, #0
 8001cbe:	6078      	str	r0, [r7, #4]
#ifdef UART_TASK_LOGS
  HAL_UART_Transmit(&huart8, (uint8_t *)&ch, 1, 0xFFFF); // Use UART8 as debug interface
 8001cc0:	1d39      	adds	r1, r7, #4
 8001cc2:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8001cc6:	2201      	movs	r2, #1
 8001cc8:	4803      	ldr	r0, [pc, #12]	@ (8001cd8 <__io_putchar+0x20>)
 8001cca:	f00b fd4d 	bl	800d768 <HAL_UART_Transmit>
//  ITM_SendChar(ch);	// Use SWV as debug interface
#endif
  return ch;
 8001cce:	687b      	ldr	r3, [r7, #4]
}
 8001cd0:	4618      	mov	r0, r3
 8001cd2:	3708      	adds	r7, #8
 8001cd4:	46bd      	mov	sp, r7
 8001cd6:	bd80      	pop	{r7, pc}
 8001cd8:	24000280 	.word	0x24000280

08001cdc <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8001cdc:	b580      	push	{r7, lr}
 8001cde:	b084      	sub	sp, #16
 8001ce0:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MPU Configuration--------------------------------------------------------*/
  MPU_Config();
 8001ce2:	f000 fc69 	bl	80025b8 <MPU_Config>
  \details Turns on I-Cache
  */
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001ce6:	4b5e      	ldr	r3, [pc, #376]	@ (8001e60 <main+0x184>)
 8001ce8:	695b      	ldr	r3, [r3, #20]
 8001cea:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8001cee:	2b00      	cmp	r3, #0
 8001cf0:	d11b      	bne.n	8001d2a <main+0x4e>
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8001cf2:	f3bf 8f4f 	dsb	sy
}
 8001cf6:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001cf8:	f3bf 8f6f 	isb	sy
}
 8001cfc:	bf00      	nop

    __DSB();
    __ISB();
    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
 8001cfe:	4b58      	ldr	r3, [pc, #352]	@ (8001e60 <main+0x184>)
 8001d00:	2200      	movs	r2, #0
 8001d02:	f8c3 2250 	str.w	r2, [r3, #592]	@ 0x250
  __ASM volatile ("dsb 0xF":::"memory");
 8001d06:	f3bf 8f4f 	dsb	sy
}
 8001d0a:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d0c:	f3bf 8f6f 	isb	sy
}
 8001d10:	bf00      	nop
    __DSB();
    __ISB();
    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
 8001d12:	4b53      	ldr	r3, [pc, #332]	@ (8001e60 <main+0x184>)
 8001d14:	695b      	ldr	r3, [r3, #20]
 8001d16:	4a52      	ldr	r2, [pc, #328]	@ (8001e60 <main+0x184>)
 8001d18:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8001d1c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d1e:	f3bf 8f4f 	dsb	sy
}
 8001d22:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d24:	f3bf 8f6f 	isb	sy
}
 8001d28:	e000      	b.n	8001d2c <main+0x50>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d2a:	bf00      	nop
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    uint32_t ccsidr;
    uint32_t sets;
    uint32_t ways;

    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d2c:	4b4c      	ldr	r3, [pc, #304]	@ (8001e60 <main+0x184>)
 8001d2e:	695b      	ldr	r3, [r3, #20]
 8001d30:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8001d34:	2b00      	cmp	r3, #0
 8001d36:	d138      	bne.n	8001daa <main+0xce>

    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
 8001d38:	4b49      	ldr	r3, [pc, #292]	@ (8001e60 <main+0x184>)
 8001d3a:	2200      	movs	r2, #0
 8001d3c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  __ASM volatile ("dsb 0xF":::"memory");
 8001d40:	f3bf 8f4f 	dsb	sy
}
 8001d44:	bf00      	nop
    __DSB();

    ccsidr = SCB->CCSIDR;
 8001d46:	4b46      	ldr	r3, [pc, #280]	@ (8001e60 <main+0x184>)
 8001d48:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8001d4c:	60fb      	str	r3, [r7, #12]

                                            /* invalidate D-Cache */
    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
 8001d4e:	68fb      	ldr	r3, [r7, #12]
 8001d50:	0b5b      	lsrs	r3, r3, #13
 8001d52:	f3c3 030e 	ubfx	r3, r3, #0, #15
 8001d56:	60bb      	str	r3, [r7, #8]
    do {
      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
 8001d58:	68fb      	ldr	r3, [r7, #12]
 8001d5a:	08db      	lsrs	r3, r3, #3
 8001d5c:	f3c3 0309 	ubfx	r3, r3, #0, #10
 8001d60:	607b      	str	r3, [r7, #4]
      do {
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d62:	68bb      	ldr	r3, [r7, #8]
 8001d64:	015a      	lsls	r2, r3, #5
 8001d66:	f643 73e0 	movw	r3, #16352	@ 0x3fe0
 8001d6a:	4013      	ands	r3, r2
                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
 8001d6c:	687a      	ldr	r2, [r7, #4]
 8001d6e:	0792      	lsls	r2, r2, #30
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001d70:	493b      	ldr	r1, [pc, #236]	@ (8001e60 <main+0x184>)
 8001d72:	4313      	orrs	r3, r2
 8001d74:	f8c1 3260 	str.w	r3, [r1, #608]	@ 0x260
        #if defined ( __CC_ARM )
          __schedule_barrier();
        #endif
      } while (ways-- != 0U);
 8001d78:	687b      	ldr	r3, [r7, #4]
 8001d7a:	1e5a      	subs	r2, r3, #1
 8001d7c:	607a      	str	r2, [r7, #4]
 8001d7e:	2b00      	cmp	r3, #0
 8001d80:	d1ef      	bne.n	8001d62 <main+0x86>
    } while(sets-- != 0U);
 8001d82:	68bb      	ldr	r3, [r7, #8]
 8001d84:	1e5a      	subs	r2, r3, #1
 8001d86:	60ba      	str	r2, [r7, #8]
 8001d88:	2b00      	cmp	r3, #0
 8001d8a:	d1e5      	bne.n	8001d58 <main+0x7c>
  __ASM volatile ("dsb 0xF":::"memory");
 8001d8c:	f3bf 8f4f 	dsb	sy
}
 8001d90:	bf00      	nop
    __DSB();

    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 8001d92:	4b33      	ldr	r3, [pc, #204]	@ (8001e60 <main+0x184>)
 8001d94:	695b      	ldr	r3, [r3, #20]
 8001d96:	4a32      	ldr	r2, [pc, #200]	@ (8001e60 <main+0x184>)
 8001d98:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8001d9c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d9e:	f3bf 8f4f 	dsb	sy
}
 8001da2:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001da4:	f3bf 8f6f 	isb	sy
}
 8001da8:	e000      	b.n	8001dac <main+0xd0>
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001daa:	bf00      	nop
  SCB_EnableDCache();

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8001dac:	f003 fc22 	bl	80055f4 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8001db0:	f000 f87a 	bl	8001ea8 <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8001db4:	f000 fae8 	bl	8002388 <MX_GPIO_Init>
  MX_DMA_Init();
 8001db8:	f000 fabe 	bl	8002338 <MX_DMA_Init>
  MX_UART8_Init();
 8001dbc:	f000 f930 	bl	8002020 <MX_UART8_Init>
  MX_CRC_Init();
 8001dc0:	f000 f8ee 	bl	8001fa0 <MX_CRC_Init>
  MX_RNG_Init();
 8001dc4:	f000 f916 	bl	8001ff4 <MX_RNG_Init>
  MX_USART1_UART_Init();
 8001dc8:	f000 f976 	bl	80020b8 <MX_USART1_UART_Init>
  MX_USART2_UART_Init();
 8001dcc:	f000 f9c4 	bl	8002158 <MX_USART2_UART_Init>
  MX_USART3_UART_Init();
 8001dd0:	f000 fa12 	bl	80021f8 <MX_USART3_UART_Init>
  MX_USART6_UART_Init();
 8001dd4:	f000 fa60 	bl	8002298 <MX_USART6_UART_Init>

//  HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
  /* USER CODE END 2 */

  /* Init scheduler */
  osKernelInitialize();
 8001dd8:	f00f f9be 	bl	8011158 <osKernelInitialize>

  /* USER CODE BEGIN RTOS_MUTEX */
  /* add mutexes, ... */
  resMeasurementsMutex = osMutexNew (NULL);
 8001ddc:	2000      	movs	r0, #0
 8001dde:	f00f fbca 	bl	8011576 <osMutexNew>
 8001de2:	4603      	mov	r3, r0
 8001de4:	4a1f      	ldr	r2, [pc, #124]	@ (8001e64 <main+0x188>)
 8001de6:	6013      	str	r3, [r2, #0]
  sensorsInfoMutex     = osMutexNew (NULL);
 8001de8:	2000      	movs	r0, #0
 8001dea:	f00f fbc4 	bl	8011576 <osMutexNew>
 8001dee:	4603      	mov	r3, r0
 8001df0:	4a1d      	ldr	r2, [pc, #116]	@ (8001e68 <main+0x18c>)
 8001df2:	6013      	str	r3, [r2, #0]
  /* add semaphores, ... */
  /* USER CODE END RTOS_SEMAPHORES */

  /* Create the timer(s) */
  /* creation of relay1Timer */
  relay1TimerHandle = osTimerNew(relay1TimerCallback, osTimerOnce, NULL, &relay1Timer_attributes);
 8001df4:	4b1d      	ldr	r3, [pc, #116]	@ (8001e6c <main+0x190>)
 8001df6:	2200      	movs	r2, #0
 8001df8:	2100      	movs	r1, #0
 8001dfa:	481d      	ldr	r0, [pc, #116]	@ (8001e70 <main+0x194>)
 8001dfc:	f00f fada 	bl	80113b4 <osTimerNew>
 8001e00:	4603      	mov	r3, r0
 8001e02:	4a1c      	ldr	r2, [pc, #112]	@ (8001e74 <main+0x198>)
 8001e04:	6013      	str	r3, [r2, #0]

  /* creation of relay2Timer */
  relay2TimerHandle = osTimerNew(relay2TimerCallback, osTimerOnce, NULL, &relay2Timer_attributes);
 8001e06:	4b1c      	ldr	r3, [pc, #112]	@ (8001e78 <main+0x19c>)
 8001e08:	2200      	movs	r2, #0
 8001e0a:	2100      	movs	r1, #0
 8001e0c:	481b      	ldr	r0, [pc, #108]	@ (8001e7c <main+0x1a0>)
 8001e0e:	f00f fad1 	bl	80113b4 <osTimerNew>
 8001e12:	4603      	mov	r3, r0
 8001e14:	4a1a      	ldr	r2, [pc, #104]	@ (8001e80 <main+0x1a4>)
 8001e16:	6013      	str	r3, [r2, #0]

  /* creation of relay3Timer */
  relay3TimerHandle = osTimerNew(relay3TimerCallback, osTimerOnce, NULL, &relay3Timer_attributes);
 8001e18:	4b1a      	ldr	r3, [pc, #104]	@ (8001e84 <main+0x1a8>)
 8001e1a:	2200      	movs	r2, #0
 8001e1c:	2100      	movs	r1, #0
 8001e1e:	481a      	ldr	r0, [pc, #104]	@ (8001e88 <main+0x1ac>)
 8001e20:	f00f fac8 	bl	80113b4 <osTimerNew>
 8001e24:	4603      	mov	r3, r0
 8001e26:	4a19      	ldr	r2, [pc, #100]	@ (8001e8c <main+0x1b0>)
 8001e28:	6013      	str	r3, [r2, #0]

  /* creation of relay4Timer */
  relay4TimerHandle = osTimerNew(relay4TimerCallback, osTimerOnce, NULL, &relay4Timer_attributes);
 8001e2a:	4b19      	ldr	r3, [pc, #100]	@ (8001e90 <main+0x1b4>)
 8001e2c:	2200      	movs	r2, #0
 8001e2e:	2100      	movs	r1, #0
 8001e30:	4818      	ldr	r0, [pc, #96]	@ (8001e94 <main+0x1b8>)
 8001e32:	f00f fabf 	bl	80113b4 <osTimerNew>
 8001e36:	4603      	mov	r3, r0
 8001e38:	4a17      	ldr	r2, [pc, #92]	@ (8001e98 <main+0x1bc>)
 8001e3a:	6013      	str	r3, [r2, #0]
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* creation of defaultTask */
  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
 8001e3c:	4a17      	ldr	r2, [pc, #92]	@ (8001e9c <main+0x1c0>)
 8001e3e:	2100      	movs	r1, #0
 8001e40:	4817      	ldr	r0, [pc, #92]	@ (8001ea0 <main+0x1c4>)
 8001e42:	f00f f9e8 	bl	8011216 <osThreadNew>
 8001e46:	4603      	mov	r3, r0
 8001e48:	4a16      	ldr	r2, [pc, #88]	@ (8001ea4 <main+0x1c8>)
 8001e4a:	6013      	str	r3, [r2, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  mqtt_cli_init();
 8001e4c:	f001 fb3c 	bl	80034c8 <mqtt_cli_init>
//  Uart8TasksInit();
  UartTasksInit();
 8001e50:	f002 fa62 	bl	8004318 <UartTasksInit>
#ifdef USER_MOCKS
  MockMeasurmetsTaskInit();
#else
  MeasurmentsReqSchedulerTaskInit();
 8001e54:	f003 fa14 	bl	8005280 <MeasurmentsReqSchedulerTaskInit>
  /* USER CODE BEGIN RTOS_EVENTS */
  /* add events, ... */
  /* USER CODE END RTOS_EVENTS */

  /* Start scheduler */
  osKernelStart();
 8001e58:	f00f f9a2 	bl	80111a0 <osKernelStart>

  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8001e5c:	bf00      	nop
 8001e5e:	e7fd      	b.n	8001e5c <main+0x180>
 8001e60:	e000ed00 	.word	0xe000ed00
 8001e64:	24002248 	.word	0x24002248
 8001e68:	2400224c 	.word	0x2400224c
 8001e6c:	08031898 	.word	0x08031898
 8001e70:	08002539 	.word	0x08002539
 8001e74:	24000658 	.word	0x24000658
 8001e78:	080318a8 	.word	0x080318a8
 8001e7c:	08002559 	.word	0x08002559
 8001e80:	24000688 	.word	0x24000688
 8001e84:	080318b8 	.word	0x080318b8
 8001e88:	08002579 	.word	0x08002579
 8001e8c:	240006b8 	.word	0x240006b8
 8001e90:	080318c8 	.word	0x080318c8
 8001e94:	08002599 	.word	0x08002599
 8001e98:	240006e8 	.word	0x240006e8
 8001e9c:	08031874 	.word	0x08031874
 8001ea0:	08002521 	.word	0x08002521
 8001ea4:	24000654 	.word	0x24000654

08001ea8 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001ea8:	b580      	push	{r7, lr}
 8001eaa:	b09c      	sub	sp, #112	@ 0x70
 8001eac:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001eae:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001eb2:	224c      	movs	r2, #76	@ 0x4c
 8001eb4:	2100      	movs	r1, #0
 8001eb6:	4618      	mov	r0, r3
 8001eb8:	f028 fde2 	bl	802aa80 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001ebc:	1d3b      	adds	r3, r7, #4
 8001ebe:	2220      	movs	r2, #32
 8001ec0:	2100      	movs	r1, #0
 8001ec2:	4618      	mov	r0, r3
 8001ec4:	f028 fddc 	bl	802aa80 <memset>

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 8001ec8:	2002      	movs	r0, #2
 8001eca:	f008 f97f 	bl	800a1cc <HAL_PWREx_ConfigSupply>

  /** Configure the main internal regulator output voltage
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 8001ece:	2300      	movs	r3, #0
 8001ed0:	603b      	str	r3, [r7, #0]
 8001ed2:	4b31      	ldr	r3, [pc, #196]	@ (8001f98 <SystemClock_Config+0xf0>)
 8001ed4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001ed6:	4a30      	ldr	r2, [pc, #192]	@ (8001f98 <SystemClock_Config+0xf0>)
 8001ed8:	f023 0301 	bic.w	r3, r3, #1
 8001edc:	62d3      	str	r3, [r2, #44]	@ 0x2c
 8001ede:	4b2e      	ldr	r3, [pc, #184]	@ (8001f98 <SystemClock_Config+0xf0>)
 8001ee0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001ee2:	f003 0301 	and.w	r3, r3, #1
 8001ee6:	603b      	str	r3, [r7, #0]
 8001ee8:	4b2c      	ldr	r3, [pc, #176]	@ (8001f9c <SystemClock_Config+0xf4>)
 8001eea:	699b      	ldr	r3, [r3, #24]
 8001eec:	4a2b      	ldr	r2, [pc, #172]	@ (8001f9c <SystemClock_Config+0xf4>)
 8001eee:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
 8001ef2:	6193      	str	r3, [r2, #24]
 8001ef4:	4b29      	ldr	r3, [pc, #164]	@ (8001f9c <SystemClock_Config+0xf4>)
 8001ef6:	699b      	ldr	r3, [r3, #24]
 8001ef8:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
 8001efc:	603b      	str	r3, [r7, #0]
 8001efe:	683b      	ldr	r3, [r7, #0]

  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 8001f00:	bf00      	nop
 8001f02:	4b26      	ldr	r3, [pc, #152]	@ (8001f9c <SystemClock_Config+0xf4>)
 8001f04:	699b      	ldr	r3, [r3, #24]
 8001f06:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8001f0a:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8001f0e:	d1f8      	bne.n	8001f02 <SystemClock_Config+0x5a>

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
 8001f10:	2321      	movs	r3, #33	@ 0x21
 8001f12:	627b      	str	r3, [r7, #36]	@ 0x24
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001f14:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
 8001f18:	62bb      	str	r3, [r7, #40]	@ 0x28
  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 8001f1a:	2301      	movs	r3, #1
 8001f1c:	63fb      	str	r3, [r7, #60]	@ 0x3c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001f1e:	2302      	movs	r3, #2
 8001f20:	64bb      	str	r3, [r7, #72]	@ 0x48
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001f22:	2302      	movs	r3, #2
 8001f24:	64fb      	str	r3, [r7, #76]	@ 0x4c
  RCC_OscInitStruct.PLL.PLLM = 5;
 8001f26:	2305      	movs	r3, #5
 8001f28:	653b      	str	r3, [r7, #80]	@ 0x50
  RCC_OscInitStruct.PLL.PLLN = 160;
 8001f2a:	23a0      	movs	r3, #160	@ 0xa0
 8001f2c:	657b      	str	r3, [r7, #84]	@ 0x54
  RCC_OscInitStruct.PLL.PLLP = 2;
 8001f2e:	2302      	movs	r3, #2
 8001f30:	65bb      	str	r3, [r7, #88]	@ 0x58
  RCC_OscInitStruct.PLL.PLLQ = 2;
 8001f32:	2302      	movs	r3, #2
 8001f34:	65fb      	str	r3, [r7, #92]	@ 0x5c
  RCC_OscInitStruct.PLL.PLLR = 2;
 8001f36:	2302      	movs	r3, #2
 8001f38:	663b      	str	r3, [r7, #96]	@ 0x60
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
 8001f3a:	2308      	movs	r3, #8
 8001f3c:	667b      	str	r3, [r7, #100]	@ 0x64
  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 8001f3e:	2300      	movs	r3, #0
 8001f40:	66bb      	str	r3, [r7, #104]	@ 0x68
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
 8001f42:	2300      	movs	r3, #0
 8001f44:	66fb      	str	r3, [r7, #108]	@ 0x6c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001f46:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001f4a:	4618      	mov	r0, r3
 8001f4c:	f008 f9fe 	bl	800a34c <HAL_RCC_OscConfig>
 8001f50:	4603      	mov	r3, r0
 8001f52:	2b00      	cmp	r3, #0
 8001f54:	d001      	beq.n	8001f5a <SystemClock_Config+0xb2>
  {
    Error_Handler();
 8001f56:	f000 fb9f 	bl	8002698 <Error_Handler>
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001f5a:	233f      	movs	r3, #63	@ 0x3f
 8001f5c:	607b      	str	r3, [r7, #4]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001f5e:	2303      	movs	r3, #3
 8001f60:	60bb      	str	r3, [r7, #8]
  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 8001f62:	2300      	movs	r3, #0
 8001f64:	60fb      	str	r3, [r7, #12]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 8001f66:	2308      	movs	r3, #8
 8001f68:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 8001f6a:	2340      	movs	r3, #64	@ 0x40
 8001f6c:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 8001f6e:	2340      	movs	r3, #64	@ 0x40
 8001f70:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 8001f72:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8001f76:	61fb      	str	r3, [r7, #28]
  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 8001f78:	2340      	movs	r3, #64	@ 0x40
 8001f7a:	623b      	str	r3, [r7, #32]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001f7c:	1d3b      	adds	r3, r7, #4
 8001f7e:	2102      	movs	r1, #2
 8001f80:	4618      	mov	r0, r3
 8001f82:	f008 fe3d 	bl	800ac00 <HAL_RCC_ClockConfig>
 8001f86:	4603      	mov	r3, r0
 8001f88:	2b00      	cmp	r3, #0
 8001f8a:	d001      	beq.n	8001f90 <SystemClock_Config+0xe8>
  {
    Error_Handler();
 8001f8c:	f000 fb84 	bl	8002698 <Error_Handler>
  }
}
 8001f90:	bf00      	nop
 8001f92:	3770      	adds	r7, #112	@ 0x70
 8001f94:	46bd      	mov	sp, r7
 8001f96:	bd80      	pop	{r7, pc}
 8001f98:	58000400 	.word	0x58000400
 8001f9c:	58024800 	.word	0x58024800

08001fa0 <MX_CRC_Init>:
  * @brief CRC Initialization Function
  * @param None
  * @retval None
  */
static void MX_CRC_Init(void)
{
 8001fa0:	b580      	push	{r7, lr}
 8001fa2:	af00      	add	r7, sp, #0
  /* USER CODE END CRC_Init 0 */

  /* USER CODE BEGIN CRC_Init 1 */

  /* USER CODE END CRC_Init 1 */
  hcrc.Instance = CRC;
 8001fa4:	4b11      	ldr	r3, [pc, #68]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fa6:	4a12      	ldr	r2, [pc, #72]	@ (8001ff0 <MX_CRC_Init+0x50>)
 8001fa8:	601a      	str	r2, [r3, #0]
  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
 8001faa:	4b10      	ldr	r3, [pc, #64]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fac:	2201      	movs	r2, #1
 8001fae:	711a      	strb	r2, [r3, #4]
  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
 8001fb0:	4b0e      	ldr	r3, [pc, #56]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fb2:	2200      	movs	r2, #0
 8001fb4:	715a      	strb	r2, [r3, #5]
  hcrc.Init.GeneratingPolynomial = 4129;
 8001fb6:	4b0d      	ldr	r3, [pc, #52]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fb8:	f241 0221 	movw	r2, #4129	@ 0x1021
 8001fbc:	609a      	str	r2, [r3, #8]
  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
 8001fbe:	4b0b      	ldr	r3, [pc, #44]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fc0:	2208      	movs	r2, #8
 8001fc2:	60da      	str	r2, [r3, #12]
  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
 8001fc4:	4b09      	ldr	r3, [pc, #36]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fc6:	2200      	movs	r2, #0
 8001fc8:	615a      	str	r2, [r3, #20]
  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
 8001fca:	4b08      	ldr	r3, [pc, #32]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fcc:	2200      	movs	r2, #0
 8001fce:	619a      	str	r2, [r3, #24]
  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
 8001fd0:	4b06      	ldr	r3, [pc, #24]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fd2:	2201      	movs	r2, #1
 8001fd4:	621a      	str	r2, [r3, #32]
  if (HAL_CRC_Init(&hcrc) != HAL_OK)
 8001fd6:	4805      	ldr	r0, [pc, #20]	@ (8001fec <MX_CRC_Init+0x4c>)
 8001fd8:	f003 fd04 	bl	80059e4 <HAL_CRC_Init>
 8001fdc:	4603      	mov	r3, r0
 8001fde:	2b00      	cmp	r3, #0
 8001fe0:	d001      	beq.n	8001fe6 <MX_CRC_Init+0x46>
  {
    Error_Handler();
 8001fe2:	f000 fb59 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN CRC_Init 2 */

  /* USER CODE END CRC_Init 2 */

}
 8001fe6:	bf00      	nop
 8001fe8:	bd80      	pop	{r7, pc}
 8001fea:	bf00      	nop
 8001fec:	24000248 	.word	0x24000248
 8001ff0:	58024c00 	.word	0x58024c00

08001ff4 <MX_RNG_Init>:
  * @brief RNG Initialization Function
  * @param None
  * @retval None
  */
static void MX_RNG_Init(void)
{
 8001ff4:	b580      	push	{r7, lr}
 8001ff6:	af00      	add	r7, sp, #0
  /* USER CODE END RNG_Init 0 */

  /* USER CODE BEGIN RNG_Init 1 */

  /* USER CODE END RNG_Init 1 */
  hrng.Instance = RNG;
 8001ff8:	4b07      	ldr	r3, [pc, #28]	@ (8002018 <MX_RNG_Init+0x24>)
 8001ffa:	4a08      	ldr	r2, [pc, #32]	@ (800201c <MX_RNG_Init+0x28>)
 8001ffc:	601a      	str	r2, [r3, #0]
  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
 8001ffe:	4b06      	ldr	r3, [pc, #24]	@ (8002018 <MX_RNG_Init+0x24>)
 8002000:	2200      	movs	r2, #0
 8002002:	605a      	str	r2, [r3, #4]
  if (HAL_RNG_Init(&hrng) != HAL_OK)
 8002004:	4804      	ldr	r0, [pc, #16]	@ (8002018 <MX_RNG_Init+0x24>)
 8002006:	f00a ffd9 	bl	800cfbc <HAL_RNG_Init>
 800200a:	4603      	mov	r3, r0
 800200c:	2b00      	cmp	r3, #0
 800200e:	d001      	beq.n	8002014 <MX_RNG_Init+0x20>
  {
    Error_Handler();
 8002010:	f000 fb42 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN RNG_Init 2 */

  /* USER CODE END RNG_Init 2 */

}
 8002014:	bf00      	nop
 8002016:	bd80      	pop	{r7, pc}
 8002018:	2400026c 	.word	0x2400026c
 800201c:	48021800 	.word	0x48021800

08002020 <MX_UART8_Init>:
  * @brief UART8 Initialization Function
  * @param None
  * @retval None
  */
static void MX_UART8_Init(void)
{
 8002020:	b580      	push	{r7, lr}
 8002022:	af00      	add	r7, sp, #0
  /* USER CODE END UART8_Init 0 */

  /* USER CODE BEGIN UART8_Init 1 */

  /* USER CODE END UART8_Init 1 */
  huart8.Instance = UART8;
 8002024:	4b22      	ldr	r3, [pc, #136]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002026:	4a23      	ldr	r2, [pc, #140]	@ (80020b4 <MX_UART8_Init+0x94>)
 8002028:	601a      	str	r2, [r3, #0]
  huart8.Init.BaudRate = 115200;
 800202a:	4b21      	ldr	r3, [pc, #132]	@ (80020b0 <MX_UART8_Init+0x90>)
 800202c:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002030:	605a      	str	r2, [r3, #4]
  huart8.Init.WordLength = UART_WORDLENGTH_8B;
 8002032:	4b1f      	ldr	r3, [pc, #124]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002034:	2200      	movs	r2, #0
 8002036:	609a      	str	r2, [r3, #8]
  huart8.Init.StopBits = UART_STOPBITS_1;
 8002038:	4b1d      	ldr	r3, [pc, #116]	@ (80020b0 <MX_UART8_Init+0x90>)
 800203a:	2200      	movs	r2, #0
 800203c:	60da      	str	r2, [r3, #12]
  huart8.Init.Parity = UART_PARITY_NONE;
 800203e:	4b1c      	ldr	r3, [pc, #112]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002040:	2200      	movs	r2, #0
 8002042:	611a      	str	r2, [r3, #16]
  huart8.Init.Mode = UART_MODE_TX_RX;
 8002044:	4b1a      	ldr	r3, [pc, #104]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002046:	220c      	movs	r2, #12
 8002048:	615a      	str	r2, [r3, #20]
  huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800204a:	4b19      	ldr	r3, [pc, #100]	@ (80020b0 <MX_UART8_Init+0x90>)
 800204c:	2200      	movs	r2, #0
 800204e:	619a      	str	r2, [r3, #24]
  huart8.Init.OverSampling = UART_OVERSAMPLING_16;
 8002050:	4b17      	ldr	r3, [pc, #92]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002052:	2200      	movs	r2, #0
 8002054:	61da      	str	r2, [r3, #28]
  huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002056:	4b16      	ldr	r3, [pc, #88]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002058:	2200      	movs	r2, #0
 800205a:	621a      	str	r2, [r3, #32]
  huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 800205c:	4b14      	ldr	r3, [pc, #80]	@ (80020b0 <MX_UART8_Init+0x90>)
 800205e:	2200      	movs	r2, #0
 8002060:	625a      	str	r2, [r3, #36]	@ 0x24
  huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 8002062:	4b13      	ldr	r3, [pc, #76]	@ (80020b0 <MX_UART8_Init+0x90>)
 8002064:	2200      	movs	r2, #0
 8002066:	629a      	str	r2, [r3, #40]	@ 0x28
  if (HAL_UART_Init(&huart8) != HAL_OK)
 8002068:	4811      	ldr	r0, [pc, #68]	@ (80020b0 <MX_UART8_Init+0x90>)
 800206a:	f00b fb2d 	bl	800d6c8 <HAL_UART_Init>
 800206e:	4603      	mov	r3, r0
 8002070:	2b00      	cmp	r3, #0
 8002072:	d001      	beq.n	8002078 <MX_UART8_Init+0x58>
  {
    Error_Handler();
 8002074:	f000 fb10 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002078:	2100      	movs	r1, #0
 800207a:	480d      	ldr	r0, [pc, #52]	@ (80020b0 <MX_UART8_Init+0x90>)
 800207c:	f00e f85b 	bl	8010136 <HAL_UARTEx_SetTxFifoThreshold>
 8002080:	4603      	mov	r3, r0
 8002082:	2b00      	cmp	r3, #0
 8002084:	d001      	beq.n	800208a <MX_UART8_Init+0x6a>
  {
    Error_Handler();
 8002086:	f000 fb07 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800208a:	2100      	movs	r1, #0
 800208c:	4808      	ldr	r0, [pc, #32]	@ (80020b0 <MX_UART8_Init+0x90>)
 800208e:	f00e f890 	bl	80101b2 <HAL_UARTEx_SetRxFifoThreshold>
 8002092:	4603      	mov	r3, r0
 8002094:	2b00      	cmp	r3, #0
 8002096:	d001      	beq.n	800209c <MX_UART8_Init+0x7c>
  {
    Error_Handler();
 8002098:	f000 fafe 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
 800209c:	4804      	ldr	r0, [pc, #16]	@ (80020b0 <MX_UART8_Init+0x90>)
 800209e:	f00e f811 	bl	80100c4 <HAL_UARTEx_DisableFifoMode>
 80020a2:	4603      	mov	r3, r0
 80020a4:	2b00      	cmp	r3, #0
 80020a6:	d001      	beq.n	80020ac <MX_UART8_Init+0x8c>
  {
    Error_Handler();
 80020a8:	f000 faf6 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN UART8_Init 2 */

  /* USER CODE END UART8_Init 2 */

}
 80020ac:	bf00      	nop
 80020ae:	bd80      	pop	{r7, pc}
 80020b0:	24000280 	.word	0x24000280
 80020b4:	40007c00 	.word	0x40007c00

080020b8 <MX_USART1_UART_Init>:
  * @brief USART1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART1_UART_Init(void)
{
 80020b8:	b580      	push	{r7, lr}
 80020ba:	af00      	add	r7, sp, #0
  /* USER CODE END USART1_Init 0 */

  /* USER CODE BEGIN USART1_Init 1 */

  /* USER CODE END USART1_Init 1 */
  huart1.Instance = USART1;
 80020bc:	4b24      	ldr	r3, [pc, #144]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020be:	4a25      	ldr	r2, [pc, #148]	@ (8002154 <MX_USART1_UART_Init+0x9c>)
 80020c0:	601a      	str	r2, [r3, #0]
  huart1.Init.BaudRate = 115200;
 80020c2:	4b23      	ldr	r3, [pc, #140]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020c4:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80020c8:	605a      	str	r2, [r3, #4]
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 80020ca:	4b21      	ldr	r3, [pc, #132]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020cc:	2200      	movs	r2, #0
 80020ce:	609a      	str	r2, [r3, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 80020d0:	4b1f      	ldr	r3, [pc, #124]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020d2:	2200      	movs	r2, #0
 80020d4:	60da      	str	r2, [r3, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 80020d6:	4b1e      	ldr	r3, [pc, #120]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020d8:	2200      	movs	r2, #0
 80020da:	611a      	str	r2, [r3, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 80020dc:	4b1c      	ldr	r3, [pc, #112]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020de:	220c      	movs	r2, #12
 80020e0:	615a      	str	r2, [r3, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80020e2:	4b1b      	ldr	r3, [pc, #108]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020e4:	2200      	movs	r2, #0
 80020e6:	619a      	str	r2, [r3, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 80020e8:	4b19      	ldr	r3, [pc, #100]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020ea:	2200      	movs	r2, #0
 80020ec:	61da      	str	r2, [r3, #28]
  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80020ee:	4b18      	ldr	r3, [pc, #96]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020f0:	2200      	movs	r2, #0
 80020f2:	621a      	str	r2, [r3, #32]
  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80020f4:	4b16      	ldr	r3, [pc, #88]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020f6:	2200      	movs	r2, #0
 80020f8:	625a      	str	r2, [r3, #36]	@ 0x24
  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80020fa:	4b15      	ldr	r3, [pc, #84]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 80020fc:	2201      	movs	r2, #1
 80020fe:	629a      	str	r2, [r3, #40]	@ 0x28
  huart1.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 8002100:	4b13      	ldr	r3, [pc, #76]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 8002102:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002106:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8002108:	4811      	ldr	r0, [pc, #68]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 800210a:	f00b fadd 	bl	800d6c8 <HAL_UART_Init>
 800210e:	4603      	mov	r3, r0
 8002110:	2b00      	cmp	r3, #0
 8002112:	d001      	beq.n	8002118 <MX_USART1_UART_Init+0x60>
  {
    Error_Handler();
 8002114:	f000 fac0 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002118:	2100      	movs	r1, #0
 800211a:	480d      	ldr	r0, [pc, #52]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 800211c:	f00e f80b 	bl	8010136 <HAL_UARTEx_SetTxFifoThreshold>
 8002120:	4603      	mov	r3, r0
 8002122:	2b00      	cmp	r3, #0
 8002124:	d001      	beq.n	800212a <MX_USART1_UART_Init+0x72>
  {
    Error_Handler();
 8002126:	f000 fab7 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800212a:	2100      	movs	r1, #0
 800212c:	4808      	ldr	r0, [pc, #32]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 800212e:	f00e f840 	bl	80101b2 <HAL_UARTEx_SetRxFifoThreshold>
 8002132:	4603      	mov	r3, r0
 8002134:	2b00      	cmp	r3, #0
 8002136:	d001      	beq.n	800213c <MX_USART1_UART_Init+0x84>
  {
    Error_Handler();
 8002138:	f000 faae 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 800213c:	4804      	ldr	r0, [pc, #16]	@ (8002150 <MX_USART1_UART_Init+0x98>)
 800213e:	f00d ffc1 	bl	80100c4 <HAL_UARTEx_DisableFifoMode>
 8002142:	4603      	mov	r3, r0
 8002144:	2b00      	cmp	r3, #0
 8002146:	d001      	beq.n	800214c <MX_USART1_UART_Init+0x94>
  {
    Error_Handler();
 8002148:	f000 faa6 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN USART1_Init 2 */

  /* USER CODE END USART1_Init 2 */

}
 800214c:	bf00      	nop
 800214e:	bd80      	pop	{r7, pc}
 8002150:	24000314 	.word	0x24000314
 8002154:	40011000 	.word	0x40011000

08002158 <MX_USART2_UART_Init>:
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{
 8002158:	b580      	push	{r7, lr}
 800215a:	af00      	add	r7, sp, #0
  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
 800215c:	4b24      	ldr	r3, [pc, #144]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 800215e:	4a25      	ldr	r2, [pc, #148]	@ (80021f4 <MX_USART2_UART_Init+0x9c>)
 8002160:	601a      	str	r2, [r3, #0]
  huart2.Init.BaudRate = 115200;
 8002162:	4b23      	ldr	r3, [pc, #140]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002164:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002168:	605a      	str	r2, [r3, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 800216a:	4b21      	ldr	r3, [pc, #132]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 800216c:	2200      	movs	r2, #0
 800216e:	609a      	str	r2, [r3, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8002170:	4b1f      	ldr	r3, [pc, #124]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002172:	2200      	movs	r2, #0
 8002174:	60da      	str	r2, [r3, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8002176:	4b1e      	ldr	r3, [pc, #120]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002178:	2200      	movs	r2, #0
 800217a:	611a      	str	r2, [r3, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 800217c:	4b1c      	ldr	r3, [pc, #112]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 800217e:	220c      	movs	r2, #12
 8002180:	615a      	str	r2, [r3, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002182:	4b1b      	ldr	r3, [pc, #108]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002184:	2200      	movs	r2, #0
 8002186:	619a      	str	r2, [r3, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8002188:	4b19      	ldr	r3, [pc, #100]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 800218a:	2200      	movs	r2, #0
 800218c:	61da      	str	r2, [r3, #28]
  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800218e:	4b18      	ldr	r3, [pc, #96]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002190:	2200      	movs	r2, #0
 8002192:	621a      	str	r2, [r3, #32]
  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002194:	4b16      	ldr	r3, [pc, #88]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 8002196:	2200      	movs	r2, #0
 8002198:	625a      	str	r2, [r3, #36]	@ 0x24
  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 800219a:	4b15      	ldr	r3, [pc, #84]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 800219c:	2201      	movs	r2, #1
 800219e:	629a      	str	r2, [r3, #40]	@ 0x28
  huart2.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80021a0:	4b13      	ldr	r3, [pc, #76]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 80021a2:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80021a6:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart2) != HAL_OK)
 80021a8:	4811      	ldr	r0, [pc, #68]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 80021aa:	f00b fa8d 	bl	800d6c8 <HAL_UART_Init>
 80021ae:	4603      	mov	r3, r0
 80021b0:	2b00      	cmp	r3, #0
 80021b2:	d001      	beq.n	80021b8 <MX_USART2_UART_Init+0x60>
  {
    Error_Handler();
 80021b4:	f000 fa70 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021b8:	2100      	movs	r1, #0
 80021ba:	480d      	ldr	r0, [pc, #52]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 80021bc:	f00d ffbb 	bl	8010136 <HAL_UARTEx_SetTxFifoThreshold>
 80021c0:	4603      	mov	r3, r0
 80021c2:	2b00      	cmp	r3, #0
 80021c4:	d001      	beq.n	80021ca <MX_USART2_UART_Init+0x72>
  {
    Error_Handler();
 80021c6:	f000 fa67 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021ca:	2100      	movs	r1, #0
 80021cc:	4808      	ldr	r0, [pc, #32]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 80021ce:	f00d fff0 	bl	80101b2 <HAL_UARTEx_SetRxFifoThreshold>
 80021d2:	4603      	mov	r3, r0
 80021d4:	2b00      	cmp	r3, #0
 80021d6:	d001      	beq.n	80021dc <MX_USART2_UART_Init+0x84>
  {
    Error_Handler();
 80021d8:	f000 fa5e 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
 80021dc:	4804      	ldr	r0, [pc, #16]	@ (80021f0 <MX_USART2_UART_Init+0x98>)
 80021de:	f00d ff71 	bl	80100c4 <HAL_UARTEx_DisableFifoMode>
 80021e2:	4603      	mov	r3, r0
 80021e4:	2b00      	cmp	r3, #0
 80021e6:	d001      	beq.n	80021ec <MX_USART2_UART_Init+0x94>
  {
    Error_Handler();
 80021e8:	f000 fa56 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}
 80021ec:	bf00      	nop
 80021ee:	bd80      	pop	{r7, pc}
 80021f0:	240003a8 	.word	0x240003a8
 80021f4:	40004400 	.word	0x40004400

080021f8 <MX_USART3_UART_Init>:
  * @brief USART3 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART3_UART_Init(void)
{
 80021f8:	b580      	push	{r7, lr}
 80021fa:	af00      	add	r7, sp, #0
  /* USER CODE END USART3_Init 0 */

  /* USER CODE BEGIN USART3_Init 1 */

  /* USER CODE END USART3_Init 1 */
  huart3.Instance = USART3;
 80021fc:	4b24      	ldr	r3, [pc, #144]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 80021fe:	4a25      	ldr	r2, [pc, #148]	@ (8002294 <MX_USART3_UART_Init+0x9c>)
 8002200:	601a      	str	r2, [r3, #0]
  huart3.Init.BaudRate = 115200;
 8002202:	4b23      	ldr	r3, [pc, #140]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002204:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002208:	605a      	str	r2, [r3, #4]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 800220a:	4b21      	ldr	r3, [pc, #132]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800220c:	2200      	movs	r2, #0
 800220e:	609a      	str	r2, [r3, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 8002210:	4b1f      	ldr	r3, [pc, #124]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002212:	2200      	movs	r2, #0
 8002214:	60da      	str	r2, [r3, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 8002216:	4b1e      	ldr	r3, [pc, #120]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002218:	2200      	movs	r2, #0
 800221a:	611a      	str	r2, [r3, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 800221c:	4b1c      	ldr	r3, [pc, #112]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800221e:	220c      	movs	r2, #12
 8002220:	615a      	str	r2, [r3, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002222:	4b1b      	ldr	r3, [pc, #108]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002224:	2200      	movs	r2, #0
 8002226:	619a      	str	r2, [r3, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 8002228:	4b19      	ldr	r3, [pc, #100]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800222a:	2200      	movs	r2, #0
 800222c:	61da      	str	r2, [r3, #28]
  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800222e:	4b18      	ldr	r3, [pc, #96]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002230:	2200      	movs	r2, #0
 8002232:	621a      	str	r2, [r3, #32]
  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002234:	4b16      	ldr	r3, [pc, #88]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002236:	2200      	movs	r2, #0
 8002238:	625a      	str	r2, [r3, #36]	@ 0x24
  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 800223a:	4b15      	ldr	r3, [pc, #84]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800223c:	2201      	movs	r2, #1
 800223e:	629a      	str	r2, [r3, #40]	@ 0x28
  huart3.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 8002240:	4b13      	ldr	r3, [pc, #76]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 8002242:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002246:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart3) != HAL_OK)
 8002248:	4811      	ldr	r0, [pc, #68]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800224a:	f00b fa3d 	bl	800d6c8 <HAL_UART_Init>
 800224e:	4603      	mov	r3, r0
 8002250:	2b00      	cmp	r3, #0
 8002252:	d001      	beq.n	8002258 <MX_USART3_UART_Init+0x60>
  {
    Error_Handler();
 8002254:	f000 fa20 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002258:	2100      	movs	r1, #0
 800225a:	480d      	ldr	r0, [pc, #52]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800225c:	f00d ff6b 	bl	8010136 <HAL_UARTEx_SetTxFifoThreshold>
 8002260:	4603      	mov	r3, r0
 8002262:	2b00      	cmp	r3, #0
 8002264:	d001      	beq.n	800226a <MX_USART3_UART_Init+0x72>
  {
    Error_Handler();
 8002266:	f000 fa17 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800226a:	2100      	movs	r1, #0
 800226c:	4808      	ldr	r0, [pc, #32]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800226e:	f00d ffa0 	bl	80101b2 <HAL_UARTEx_SetRxFifoThreshold>
 8002272:	4603      	mov	r3, r0
 8002274:	2b00      	cmp	r3, #0
 8002276:	d001      	beq.n	800227c <MX_USART3_UART_Init+0x84>
  {
    Error_Handler();
 8002278:	f000 fa0e 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
 800227c:	4804      	ldr	r0, [pc, #16]	@ (8002290 <MX_USART3_UART_Init+0x98>)
 800227e:	f00d ff21 	bl	80100c4 <HAL_UARTEx_DisableFifoMode>
 8002282:	4603      	mov	r3, r0
 8002284:	2b00      	cmp	r3, #0
 8002286:	d001      	beq.n	800228c <MX_USART3_UART_Init+0x94>
  {
    Error_Handler();
 8002288:	f000 fa06 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN USART3_Init 2 */

  /* USER CODE END USART3_Init 2 */

}
 800228c:	bf00      	nop
 800228e:	bd80      	pop	{r7, pc}
 8002290:	2400043c 	.word	0x2400043c
 8002294:	40004800 	.word	0x40004800

08002298 <MX_USART6_UART_Init>:
  * @brief USART6 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART6_UART_Init(void)
{
 8002298:	b580      	push	{r7, lr}
 800229a:	af00      	add	r7, sp, #0
  /* USER CODE END USART6_Init 0 */

  /* USER CODE BEGIN USART6_Init 1 */

  /* USER CODE END USART6_Init 1 */
  huart6.Instance = USART6;
 800229c:	4b24      	ldr	r3, [pc, #144]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 800229e:	4a25      	ldr	r2, [pc, #148]	@ (8002334 <MX_USART6_UART_Init+0x9c>)
 80022a0:	601a      	str	r2, [r3, #0]
  huart6.Init.BaudRate = 115200;
 80022a2:	4b23      	ldr	r3, [pc, #140]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022a4:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80022a8:	605a      	str	r2, [r3, #4]
  huart6.Init.WordLength = UART_WORDLENGTH_8B;
 80022aa:	4b21      	ldr	r3, [pc, #132]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022ac:	2200      	movs	r2, #0
 80022ae:	609a      	str	r2, [r3, #8]
  huart6.Init.StopBits = UART_STOPBITS_1;
 80022b0:	4b1f      	ldr	r3, [pc, #124]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022b2:	2200      	movs	r2, #0
 80022b4:	60da      	str	r2, [r3, #12]
  huart6.Init.Parity = UART_PARITY_NONE;
 80022b6:	4b1e      	ldr	r3, [pc, #120]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022b8:	2200      	movs	r2, #0
 80022ba:	611a      	str	r2, [r3, #16]
  huart6.Init.Mode = UART_MODE_TX_RX;
 80022bc:	4b1c      	ldr	r3, [pc, #112]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022be:	220c      	movs	r2, #12
 80022c0:	615a      	str	r2, [r3, #20]
  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80022c2:	4b1b      	ldr	r3, [pc, #108]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022c4:	2200      	movs	r2, #0
 80022c6:	619a      	str	r2, [r3, #24]
  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
 80022c8:	4b19      	ldr	r3, [pc, #100]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022ca:	2200      	movs	r2, #0
 80022cc:	61da      	str	r2, [r3, #28]
  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80022ce:	4b18      	ldr	r3, [pc, #96]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022d0:	2200      	movs	r2, #0
 80022d2:	621a      	str	r2, [r3, #32]
  huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80022d4:	4b16      	ldr	r3, [pc, #88]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022d6:	2200      	movs	r2, #0
 80022d8:	625a      	str	r2, [r3, #36]	@ 0x24
  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80022da:	4b15      	ldr	r3, [pc, #84]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022dc:	2201      	movs	r2, #1
 80022de:	629a      	str	r2, [r3, #40]	@ 0x28
  huart6.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80022e0:	4b13      	ldr	r3, [pc, #76]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022e2:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80022e6:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart6) != HAL_OK)
 80022e8:	4811      	ldr	r0, [pc, #68]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022ea:	f00b f9ed 	bl	800d6c8 <HAL_UART_Init>
 80022ee:	4603      	mov	r3, r0
 80022f0:	2b00      	cmp	r3, #0
 80022f2:	d001      	beq.n	80022f8 <MX_USART6_UART_Init+0x60>
  {
    Error_Handler();
 80022f4:	f000 f9d0 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80022f8:	2100      	movs	r1, #0
 80022fa:	480d      	ldr	r0, [pc, #52]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 80022fc:	f00d ff1b 	bl	8010136 <HAL_UARTEx_SetTxFifoThreshold>
 8002300:	4603      	mov	r3, r0
 8002302:	2b00      	cmp	r3, #0
 8002304:	d001      	beq.n	800230a <MX_USART6_UART_Init+0x72>
  {
    Error_Handler();
 8002306:	f000 f9c7 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800230a:	2100      	movs	r1, #0
 800230c:	4808      	ldr	r0, [pc, #32]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 800230e:	f00d ff50 	bl	80101b2 <HAL_UARTEx_SetRxFifoThreshold>
 8002312:	4603      	mov	r3, r0
 8002314:	2b00      	cmp	r3, #0
 8002316:	d001      	beq.n	800231c <MX_USART6_UART_Init+0x84>
  {
    Error_Handler();
 8002318:	f000 f9be 	bl	8002698 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
 800231c:	4804      	ldr	r0, [pc, #16]	@ (8002330 <MX_USART6_UART_Init+0x98>)
 800231e:	f00d fed1 	bl	80100c4 <HAL_UARTEx_DisableFifoMode>
 8002322:	4603      	mov	r3, r0
 8002324:	2b00      	cmp	r3, #0
 8002326:	d001      	beq.n	800232c <MX_USART6_UART_Init+0x94>
  {
    Error_Handler();
 8002328:	f000 f9b6 	bl	8002698 <Error_Handler>
  }
  /* USER CODE BEGIN USART6_Init 2 */

  /* USER CODE END USART6_Init 2 */

}
 800232c:	bf00      	nop
 800232e:	bd80      	pop	{r7, pc}
 8002330:	240004d0 	.word	0x240004d0
 8002334:	40011400 	.word	0x40011400

08002338 <MX_DMA_Init>:

/**
  * Enable DMA controller clock
  */
static void MX_DMA_Init(void)
{
 8002338:	b580      	push	{r7, lr}
 800233a:	b082      	sub	sp, #8
 800233c:	af00      	add	r7, sp, #0

  /* DMA controller clock enable */
  __HAL_RCC_DMA2_CLK_ENABLE();
 800233e:	4b11      	ldr	r3, [pc, #68]	@ (8002384 <MX_DMA_Init+0x4c>)
 8002340:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002344:	4a0f      	ldr	r2, [pc, #60]	@ (8002384 <MX_DMA_Init+0x4c>)
 8002346:	f043 0302 	orr.w	r3, r3, #2
 800234a:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 800234e:	4b0d      	ldr	r3, [pc, #52]	@ (8002384 <MX_DMA_Init+0x4c>)
 8002350:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002354:	f003 0302 	and.w	r3, r3, #2
 8002358:	607b      	str	r3, [r7, #4]
 800235a:	687b      	ldr	r3, [r7, #4]

  /* DMA interrupt init */
  /* DMA2_Stream6_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
 800235c:	2200      	movs	r2, #0
 800235e:	2105      	movs	r1, #5
 8002360:	2045      	movs	r0, #69	@ 0x45
 8002362:	f003 fa9f 	bl	80058a4 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 8002366:	2045      	movs	r0, #69	@ 0x45
 8002368:	f003 fab6 	bl	80058d8 <HAL_NVIC_EnableIRQ>
  /* DMA2_Stream7_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
 800236c:	2200      	movs	r2, #0
 800236e:	2105      	movs	r1, #5
 8002370:	2046      	movs	r0, #70	@ 0x46
 8002372:	f003 fa97 	bl	80058a4 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 8002376:	2046      	movs	r0, #70	@ 0x46
 8002378:	f003 faae 	bl	80058d8 <HAL_NVIC_EnableIRQ>

}
 800237c:	bf00      	nop
 800237e:	3708      	adds	r7, #8
 8002380:	46bd      	mov	sp, r7
 8002382:	bd80      	pop	{r7, pc}
 8002384:	58024400 	.word	0x58024400

08002388 <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 8002388:	b580      	push	{r7, lr}
 800238a:	b08c      	sub	sp, #48	@ 0x30
 800238c:	af00      	add	r7, sp, #0
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800238e:	f107 031c 	add.w	r3, r7, #28
 8002392:	2200      	movs	r2, #0
 8002394:	601a      	str	r2, [r3, #0]
 8002396:	605a      	str	r2, [r3, #4]
 8002398:	609a      	str	r2, [r3, #8]
 800239a:	60da      	str	r2, [r3, #12]
 800239c:	611a      	str	r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800239e:	4b5d      	ldr	r3, [pc, #372]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023a0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023a4:	4a5b      	ldr	r2, [pc, #364]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023a6:	f043 0310 	orr.w	r3, r3, #16
 80023aa:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023ae:	4b59      	ldr	r3, [pc, #356]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023b0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023b4:	f003 0310 	and.w	r3, r3, #16
 80023b8:	61bb      	str	r3, [r7, #24]
 80023ba:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOH_CLK_ENABLE();
 80023bc:	4b55      	ldr	r3, [pc, #340]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023be:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023c2:	4a54      	ldr	r2, [pc, #336]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023c4:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80023c8:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023cc:	4b51      	ldr	r3, [pc, #324]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023ce:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023d2:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80023d6:	617b      	str	r3, [r7, #20]
 80023d8:	697b      	ldr	r3, [r7, #20]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80023da:	4b4e      	ldr	r3, [pc, #312]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023dc:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023e0:	4a4c      	ldr	r2, [pc, #304]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023e2:	f043 0304 	orr.w	r3, r3, #4
 80023e6:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80023ea:	4b4a      	ldr	r3, [pc, #296]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023ec:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023f0:	f003 0304 	and.w	r3, r3, #4
 80023f4:	613b      	str	r3, [r7, #16]
 80023f6:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80023f8:	4b46      	ldr	r3, [pc, #280]	@ (8002514 <MX_GPIO_Init+0x18c>)
 80023fa:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80023fe:	4a45      	ldr	r2, [pc, #276]	@ (8002514 <MX_GPIO_Init+0x18c>)
 8002400:	f043 0301 	orr.w	r3, r3, #1
 8002404:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002408:	4b42      	ldr	r3, [pc, #264]	@ (8002514 <MX_GPIO_Init+0x18c>)
 800240a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800240e:	f003 0301 	and.w	r3, r3, #1
 8002412:	60fb      	str	r3, [r7, #12]
 8002414:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8002416:	4b3f      	ldr	r3, [pc, #252]	@ (8002514 <MX_GPIO_Init+0x18c>)
 8002418:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800241c:	4a3d      	ldr	r2, [pc, #244]	@ (8002514 <MX_GPIO_Init+0x18c>)
 800241e:	f043 0302 	orr.w	r3, r3, #2
 8002422:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002426:	4b3b      	ldr	r3, [pc, #236]	@ (8002514 <MX_GPIO_Init+0x18c>)
 8002428:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800242c:	f003 0302 	and.w	r3, r3, #2
 8002430:	60bb      	str	r3, [r7, #8]
 8002432:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8002434:	4b37      	ldr	r3, [pc, #220]	@ (8002514 <MX_GPIO_Init+0x18c>)
 8002436:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800243a:	4a36      	ldr	r2, [pc, #216]	@ (8002514 <MX_GPIO_Init+0x18c>)
 800243c:	f043 0308 	orr.w	r3, r3, #8
 8002440:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8002444:	4b33      	ldr	r3, [pc, #204]	@ (8002514 <MX_GPIO_Init+0x18c>)
 8002446:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800244a:	f003 0308 	and.w	r3, r3, #8
 800244e:	607b      	str	r3, [r7, #4]
 8002450:	687b      	ldr	r3, [r7, #4]

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
 8002452:	2200      	movs	r2, #0
 8002454:	213c      	movs	r1, #60	@ 0x3c
 8002456:	4830      	ldr	r0, [pc, #192]	@ (8002518 <MX_GPIO_Init+0x190>)
 8002458:	f007 fe14 	bl	800a084 <HAL_GPIO_WritePin>

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14, GPIO_PIN_RESET);
 800245c:	2200      	movs	r2, #0
 800245e:	f44f 41f0 	mov.w	r1, #30720	@ 0x7800
 8002462:	482e      	ldr	r0, [pc, #184]	@ (800251c <MX_GPIO_Init+0x194>)
 8002464:	f007 fe0e 	bl	800a084 <HAL_GPIO_WritePin>

  /*Configure GPIO pins : PE2 PE3 PE4 PE5 */
  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
 8002468:	233c      	movs	r3, #60	@ 0x3c
 800246a:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800246c:	2301      	movs	r3, #1
 800246e:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8002470:	2300      	movs	r3, #0
 8002472:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002474:	2300      	movs	r3, #0
 8002476:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8002478:	f107 031c 	add.w	r3, r7, #28
 800247c:	4619      	mov	r1, r3
 800247e:	4826      	ldr	r0, [pc, #152]	@ (8002518 <MX_GPIO_Init+0x190>)
 8002480:	f007 fc38 	bl	8009cf4 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD11 PD12 PD13 PD14 */
  GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14;
 8002484:	f44f 43f0 	mov.w	r3, #30720	@ 0x7800
 8002488:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800248a:	2301      	movs	r3, #1
 800248c:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800248e:	2300      	movs	r3, #0
 8002490:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002492:	2300      	movs	r3, #0
 8002494:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8002496:	f107 031c 	add.w	r3, r7, #28
 800249a:	4619      	mov	r1, r3
 800249c:	481f      	ldr	r0, [pc, #124]	@ (800251c <MX_GPIO_Init+0x194>)
 800249e:	f007 fc29 	bl	8009cf4 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD1 PD2 PD4 */
  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4;
 80024a2:	2316      	movs	r3, #22
 80024a4:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80024a6:	2300      	movs	r3, #0
 80024a8:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80024aa:	2300      	movs	r3, #0
 80024ac:	627b      	str	r3, [r7, #36]	@ 0x24
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 80024ae:	f107 031c 	add.w	r3, r7, #28
 80024b2:	4619      	mov	r1, r3
 80024b4:	4819      	ldr	r0, [pc, #100]	@ (800251c <MX_GPIO_Init+0x194>)
 80024b6:	f007 fc1d 	bl	8009cf4 <HAL_GPIO_Init>

/* USER CODE BEGIN MX_GPIO_Init_2 */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
 80024ba:	2200      	movs	r2, #0
 80024bc:	213c      	movs	r1, #60	@ 0x3c
 80024be:	4816      	ldr	r0, [pc, #88]	@ (8002518 <MX_GPIO_Init+0x190>)
 80024c0:	f007 fde0 	bl	800a084 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 80024c4:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 80024c8:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80024ca:	2301      	movs	r3, #1
 80024cc:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_PULLUP;
 80024ce:	2301      	movs	r3, #1
 80024d0:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80024d2:	2300      	movs	r3, #0
 80024d4:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80024d6:	f107 031c 	add.w	r3, r7, #28
 80024da:	4619      	mov	r1, r3
 80024dc:	480e      	ldr	r0, [pc, #56]	@ (8002518 <MX_GPIO_Init+0x190>)
 80024de:	f007 fc09 	bl	8009cf4 <HAL_GPIO_Init>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
 80024e2:	2200      	movs	r2, #0
 80024e4:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80024e8:	480b      	ldr	r0, [pc, #44]	@ (8002518 <MX_GPIO_Init+0x190>)
 80024ea:	f007 fdcb 	bl	800a084 <HAL_GPIO_WritePin>
  HAL_Delay(100);
 80024ee:	2064      	movs	r0, #100	@ 0x64
 80024f0:	f003 f8dc 	bl	80056ac <HAL_Delay>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
 80024f4:	2201      	movs	r2, #1
 80024f6:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80024fa:	4807      	ldr	r0, [pc, #28]	@ (8002518 <MX_GPIO_Init+0x190>)
 80024fc:	f007 fdc2 	bl	800a084 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
 8002500:	2201      	movs	r2, #1
 8002502:	f44f 4100 	mov.w	r1, #32768	@ 0x8000
 8002506:	4804      	ldr	r0, [pc, #16]	@ (8002518 <MX_GPIO_Init+0x190>)
 8002508:	f007 fdbc 	bl	800a084 <HAL_GPIO_WritePin>
/* USER CODE END MX_GPIO_Init_2 */
}
 800250c:	bf00      	nop
 800250e:	3730      	adds	r7, #48	@ 0x30
 8002510:	46bd      	mov	sp, r7
 8002512:	bd80      	pop	{r7, pc}
 8002514:	58024400 	.word	0x58024400
 8002518:	58021000 	.word	0x58021000
 800251c:	58020c00 	.word	0x58020c00

08002520 <StartDefaultTask>:
  * @param  argument: Not used
  * @retval None
  */
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
 8002520:	b580      	push	{r7, lr}
 8002522:	b082      	sub	sp, #8
 8002524:	af00      	add	r7, sp, #0
 8002526:	6078      	str	r0, [r7, #4]
  /* init code for LWIP */
  MX_LWIP_Init();
 8002528:	f00d ff40 	bl	80103ac <MX_LWIP_Init>
  /* USER CODE BEGIN 5 */
  /* Infinite loop */
  for(;;)
  {
    osDelay(pdMS_TO_TICKS(1000));
 800252c:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002530:	f00e ff0f 	bl	8011352 <osDelay>
 8002534:	e7fa      	b.n	800252c <StartDefaultTask+0xc>
	...

08002538 <relay1TimerCallback>:
  /* USER CODE END 5 */
}

/* relay1TimerCallback function */
void relay1TimerCallback(void *argument)
{
 8002538:	b580      	push	{r7, lr}
 800253a:	b082      	sub	sp, #8
 800253c:	af00      	add	r7, sp, #0
 800253e:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay1TimerCallback */
	HAL_GPIO_WritePin(GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
 8002540:	2200      	movs	r2, #0
 8002542:	2120      	movs	r1, #32
 8002544:	4803      	ldr	r0, [pc, #12]	@ (8002554 <relay1TimerCallback+0x1c>)
 8002546:	f007 fd9d 	bl	800a084 <HAL_GPIO_WritePin>
  /* USER CODE END relay1TimerCallback */
}
 800254a:	bf00      	nop
 800254c:	3708      	adds	r7, #8
 800254e:	46bd      	mov	sp, r7
 8002550:	bd80      	pop	{r7, pc}
 8002552:	bf00      	nop
 8002554:	58021000 	.word	0x58021000

08002558 <relay2TimerCallback>:

/* relay2TimerCallback function */
void relay2TimerCallback(void *argument)
{
 8002558:	b580      	push	{r7, lr}
 800255a:	b082      	sub	sp, #8
 800255c:	af00      	add	r7, sp, #0
 800255e:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay2TimerCallback */
	HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
 8002560:	2200      	movs	r2, #0
 8002562:	2108      	movs	r1, #8
 8002564:	4803      	ldr	r0, [pc, #12]	@ (8002574 <relay2TimerCallback+0x1c>)
 8002566:	f007 fd8d 	bl	800a084 <HAL_GPIO_WritePin>
  /* USER CODE END relay2TimerCallback */
}
 800256a:	bf00      	nop
 800256c:	3708      	adds	r7, #8
 800256e:	46bd      	mov	sp, r7
 8002570:	bd80      	pop	{r7, pc}
 8002572:	bf00      	nop
 8002574:	58021000 	.word	0x58021000

08002578 <relay3TimerCallback>:

/* relay3TimerCallback function */
void relay3TimerCallback(void *argument)
{
 8002578:	b580      	push	{r7, lr}
 800257a:	b082      	sub	sp, #8
 800257c:	af00      	add	r7, sp, #0
 800257e:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay3TimerCallback */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
 8002580:	2200      	movs	r2, #0
 8002582:	2110      	movs	r1, #16
 8002584:	4803      	ldr	r0, [pc, #12]	@ (8002594 <relay3TimerCallback+0x1c>)
 8002586:	f007 fd7d 	bl	800a084 <HAL_GPIO_WritePin>
  /* USER CODE END relay3TimerCallback */
}
 800258a:	bf00      	nop
 800258c:	3708      	adds	r7, #8
 800258e:	46bd      	mov	sp, r7
 8002590:	bd80      	pop	{r7, pc}
 8002592:	bf00      	nop
 8002594:	58021000 	.word	0x58021000

08002598 <relay4TimerCallback>:

/* relay4TimerCallback function */
void relay4TimerCallback(void *argument)
{
 8002598:	b580      	push	{r7, lr}
 800259a:	b082      	sub	sp, #8
 800259c:	af00      	add	r7, sp, #0
 800259e:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay4TimerCallback */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
 80025a0:	2200      	movs	r2, #0
 80025a2:	2104      	movs	r1, #4
 80025a4:	4803      	ldr	r0, [pc, #12]	@ (80025b4 <relay4TimerCallback+0x1c>)
 80025a6:	f007 fd6d 	bl	800a084 <HAL_GPIO_WritePin>
  /* USER CODE END relay4TimerCallback */
}
 80025aa:	bf00      	nop
 80025ac:	3708      	adds	r7, #8
 80025ae:	46bd      	mov	sp, r7
 80025b0:	bd80      	pop	{r7, pc}
 80025b2:	bf00      	nop
 80025b4:	58021000 	.word	0x58021000

080025b8 <MPU_Config>:

 /* MPU Configuration */

void MPU_Config(void)
{
 80025b8:	b580      	push	{r7, lr}
 80025ba:	b084      	sub	sp, #16
 80025bc:	af00      	add	r7, sp, #0
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
 80025be:	463b      	mov	r3, r7
 80025c0:	2200      	movs	r2, #0
 80025c2:	601a      	str	r2, [r3, #0]
 80025c4:	605a      	str	r2, [r3, #4]
 80025c6:	609a      	str	r2, [r3, #8]
 80025c8:	60da      	str	r2, [r3, #12]

  /* Disables the MPU */
  HAL_MPU_Disable();
 80025ca:	f003 f993 	bl	80058f4 <HAL_MPU_Disable>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 80025ce:	2301      	movs	r3, #1
 80025d0:	703b      	strb	r3, [r7, #0]
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 80025d2:	2300      	movs	r3, #0
 80025d4:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x0;
 80025d6:	2300      	movs	r3, #0
 80025d8:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 80025da:	231f      	movs	r3, #31
 80025dc:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x87;
 80025de:	2387      	movs	r3, #135	@ 0x87
 80025e0:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80025e2:	2300      	movs	r3, #0
 80025e4:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 80025e6:	2300      	movs	r3, #0
 80025e8:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 80025ea:	2301      	movs	r3, #1
 80025ec:	733b      	strb	r3, [r7, #12]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80025ee:	2301      	movs	r3, #1
 80025f0:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 80025f2:	2300      	movs	r3, #0
 80025f4:	73bb      	strb	r3, [r7, #14]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 80025f6:	2300      	movs	r3, #0
 80025f8:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80025fa:	463b      	mov	r3, r7
 80025fc:	4618      	mov	r0, r3
 80025fe:	f003 f9b1 	bl	8005964 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
 8002602:	2301      	movs	r3, #1
 8002604:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24020000;
 8002606:	4b13      	ldr	r3, [pc, #76]	@ (8002654 <MPU_Config+0x9c>)
 8002608:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
 800260a:	2310      	movs	r3, #16
 800260c:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x0;
 800260e:	2300      	movs	r3, #0
 8002610:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
 8002612:	2301      	movs	r3, #1
 8002614:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 8002616:	2303      	movs	r3, #3
 8002618:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
 800261a:	2300      	movs	r3, #0
 800261c:	737b      	strb	r3, [r7, #13]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 800261e:	463b      	mov	r3, r7
 8002620:	4618      	mov	r0, r3
 8002622:	f003 f99f 	bl	8005964 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
 8002626:	2302      	movs	r3, #2
 8002628:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24040000;
 800262a:	4b0b      	ldr	r3, [pc, #44]	@ (8002658 <MPU_Config+0xa0>)
 800262c:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
 800262e:	2308      	movs	r3, #8
 8002630:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 8002632:	2300      	movs	r3, #0
 8002634:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 8002636:	2301      	movs	r3, #1
 8002638:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 800263a:	2301      	movs	r3, #1
 800263c:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 800263e:	463b      	mov	r3, r7
 8002640:	4618      	mov	r0, r3
 8002642:	f003 f98f 	bl	8005964 <HAL_MPU_ConfigRegion>
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 8002646:	2004      	movs	r0, #4
 8002648:	f003 f96c 	bl	8005924 <HAL_MPU_Enable>

}
 800264c:	bf00      	nop
 800264e:	3710      	adds	r7, #16
 8002650:	46bd      	mov	sp, r7
 8002652:	bd80      	pop	{r7, pc}
 8002654:	24020000 	.word	0x24020000
 8002658:	24040000 	.word	0x24040000

0800265c <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 800265c:	b580      	push	{r7, lr}
 800265e:	b082      	sub	sp, #8
 8002660:	af00      	add	r7, sp, #0
 8002662:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
 8002664:	687b      	ldr	r3, [r7, #4]
 8002666:	681b      	ldr	r3, [r3, #0]
 8002668:	4a09      	ldr	r2, [pc, #36]	@ (8002690 <HAL_TIM_PeriodElapsedCallback+0x34>)
 800266a:	4293      	cmp	r3, r2
 800266c:	d101      	bne.n	8002672 <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 800266e:	f002 fffd 	bl	800566c <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */
  if (htim->Instance == TIM6) {
 8002672:	687b      	ldr	r3, [r7, #4]
 8002674:	681b      	ldr	r3, [r3, #0]
 8002676:	4a06      	ldr	r2, [pc, #24]	@ (8002690 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8002678:	4293      	cmp	r3, r2
 800267a:	d104      	bne.n	8002686 <HAL_TIM_PeriodElapsedCallback+0x2a>
    MilliTimer++;
 800267c:	4b05      	ldr	r3, [pc, #20]	@ (8002694 <HAL_TIM_PeriodElapsedCallback+0x38>)
 800267e:	681b      	ldr	r3, [r3, #0]
 8002680:	3301      	adds	r3, #1
 8002682:	4a04      	ldr	r2, [pc, #16]	@ (8002694 <HAL_TIM_PeriodElapsedCallback+0x38>)
 8002684:	6013      	str	r3, [r2, #0]
  }
  /* USER CODE END Callback 1 */
}
 8002686:	bf00      	nop
 8002688:	3708      	adds	r7, #8
 800268a:	46bd      	mov	sp, r7
 800268c:	bd80      	pop	{r7, pc}
 800268e:	bf00      	nop
 8002690:	40001000 	.word	0x40001000
 8002694:	2402b114 	.word	0x2402b114

08002698 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8002698:	b480      	push	{r7}
 800269a:	af00      	add	r7, sp, #0
  __ASM volatile ("cpsid i" : : : "memory");
 800269c:	b672      	cpsid	i
}
 800269e:	bf00      	nop
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
 80026a0:	bf00      	nop
 80026a2:	e7fd      	b.n	80026a0 <Error_Handler+0x8>

080026a4 <MqttClientSubTask>:
void MqttClientSubTask (void* argument);    // mqtt client subscribe task function
void MqttClientPubTask (void* argument);    // mqtt client publish task function
uint32_t MqttConnectBroker (void);          // mqtt broker connect function
void MqttMessageArrived (MessageData* msg); // mqtt message callback function

void MqttClientSubTask (void* argument) {
 80026a4:	b580      	push	{r7, lr}
 80026a6:	b082      	sub	sp, #8
 80026a8:	af00      	add	r7, sp, #0
 80026aa:	6078      	str	r0, [r7, #4]
    while (1) {
        // waiting for valid ip address
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 80026ac:	4b16      	ldr	r3, [pc, #88]	@ (8002708 <MqttClientSubTask+0x64>)
 80026ae:	685b      	ldr	r3, [r3, #4]
 80026b0:	2b00      	cmp	r3, #0
 80026b2:	d007      	beq.n	80026c4 <MqttClientSubTask+0x20>
 80026b4:	4b14      	ldr	r3, [pc, #80]	@ (8002708 <MqttClientSubTask+0x64>)
 80026b6:	689b      	ldr	r3, [r3, #8]
 80026b8:	2b00      	cmp	r3, #0
 80026ba:	d003      	beq.n	80026c4 <MqttClientSubTask+0x20>
 80026bc:	4b12      	ldr	r3, [pc, #72]	@ (8002708 <MqttClientSubTask+0x64>)
 80026be:	68db      	ldr	r3, [r3, #12]
 80026c0:	2b00      	cmp	r3, #0
 80026c2:	d104      	bne.n	80026ce <MqttClientSubTask+0x2a>
        {
            osDelay (pdMS_TO_TICKS (1000));
 80026c4:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80026c8:	f00e fe43 	bl	8011352 <osDelay>
            continue;
 80026cc:	e003      	b.n	80026d6 <MqttClientSubTask+0x32>
        } else {
            printf ("DHCP/Static IP O.K.\n");
 80026ce:	480f      	ldr	r0, [pc, #60]	@ (800270c <MqttClientSubTask+0x68>)
 80026d0:	f028 f8ac 	bl	802a82c <puts>
            break;
 80026d4:	e000      	b.n	80026d8 <MqttClientSubTask+0x34>
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 80026d6:	e7e9      	b.n	80026ac <MqttClientSubTask+0x8>
        }
    }

    while (1) {
        if (!mqttClient.isconnected) {
 80026d8:	4b0d      	ldr	r3, [pc, #52]	@ (8002710 <MqttClientSubTask+0x6c>)
 80026da:	6a1b      	ldr	r3, [r3, #32]
 80026dc:	2b00      	cmp	r3, #0
 80026de:	d109      	bne.n	80026f4 <MqttClientSubTask+0x50>
            // try to connect to the broker
            if (MqttConnectBroker () != MQTT_SUCCESS) {
 80026e0:	f000 fb92 	bl	8002e08 <MqttConnectBroker>
 80026e4:	4603      	mov	r3, r0
 80026e6:	2b00      	cmp	r3, #0
 80026e8:	d0f6      	beq.n	80026d8 <MqttClientSubTask+0x34>
                osDelay (pdMS_TO_TICKS (1000));
 80026ea:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80026ee:	f00e fe30 	bl	8011352 <osDelay>
 80026f2:	e7f1      	b.n	80026d8 <MqttClientSubTask+0x34>
            }
        } else {
            MQTTYield (&mqttClient, 500); // handle timer
 80026f4:	f44f 71fa 	mov.w	r1, #500	@ 0x1f4
 80026f8:	4805      	ldr	r0, [pc, #20]	@ (8002710 <MqttClientSubTask+0x6c>)
 80026fa:	f025 f999 	bl	8027a30 <MQTTYield>
            osDelay (pdMS_TO_TICKS (100));
 80026fe:	2064      	movs	r0, #100	@ 0x64
 8002700:	f00e fe27 	bl	8011352 <osDelay>
        if (!mqttClient.isconnected) {
 8002704:	e7e8      	b.n	80026d8 <MqttClientSubTask+0x34>
 8002706:	bf00      	nop
 8002708:	24002254 	.word	0x24002254
 800270c:	0802d3bc 	.word	0x0802d3bc
 8002710:	24000730 	.word	0x24000730

08002714 <MqttClientPubTask>:
        }
    }
}

void MqttClientPubTask (void* argument) {
 8002714:	b590      	push	{r4, r7, lr}
 8002716:	f5ad 7d19 	sub.w	sp, sp, #612	@ 0x264
 800271a:	af04      	add	r7, sp, #16
 800271c:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002720:	f5a3 7313 	sub.w	r3, r3, #588	@ 0x24c
 8002724:	6018      	str	r0, [r3, #0]
    char messageBuffer[512]  = { 0x00 };
 8002726:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 800272a:	f5a3 7305 	sub.w	r3, r3, #532	@ 0x214
 800272e:	2200      	movs	r2, #0
 8002730:	601a      	str	r2, [r3, #0]
 8002732:	3304      	adds	r3, #4
 8002734:	f44f 72fe 	mov.w	r2, #508	@ 0x1fc
 8002738:	2100      	movs	r1, #0
 800273a:	4618      	mov	r0, r3
 800273c:	f028 f9a0 	bl	802aa80 <memset>
    char topicTextBuffer[32] = { 0x00 };
 8002740:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002744:	f5a3 730d 	sub.w	r3, r3, #564	@ 0x234
 8002748:	2200      	movs	r2, #0
 800274a:	601a      	str	r2, [r3, #0]
 800274c:	3304      	adds	r3, #4
 800274e:	2200      	movs	r2, #0
 8002750:	601a      	str	r2, [r3, #0]
 8002752:	605a      	str	r2, [r3, #4]
 8002754:	609a      	str	r2, [r3, #8]
 8002756:	60da      	str	r2, [r3, #12]
 8002758:	611a      	str	r2, [r3, #16]
 800275a:	615a      	str	r2, [r3, #20]
 800275c:	619a      	str	r2, [r3, #24]
    uint32_t bytesInBuffer   = 0;
 800275e:	2300      	movs	r3, #0
 8002760:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
    uint8_t boardNumber      = 0;
 8002764:	2300      	movs	r3, #0
 8002766:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
    MQTTMessage message;

    while (1) {
        if (mqttClient.isconnected) {
 800276a:	4b93      	ldr	r3, [pc, #588]	@ (80029b8 <MqttClientPubTask+0x2a4>)
 800276c:	6a1b      	ldr	r3, [r3, #32]
 800276e:	2b00      	cmp	r3, #0
 8002770:	f000 833d 	beq.w	8002dee <MqttClientPubTask+0x6da>
            if (is_link_up ()) {
 8002774:	f00d fe0a 	bl	801038c <is_link_up>
 8002778:	4603      	mov	r3, r0
 800277a:	2b00      	cmp	r3, #0
 800277c:	f000 8337 	beq.w	8002dee <MqttClientPubTask+0x6da>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002780:	2300      	movs	r3, #0
 8002782:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002786:	e10e      	b.n	80029a6 <MqttClientPubTask+0x292>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8002788:	4b8c      	ldr	r3, [pc, #560]	@ (80029bc <MqttClientPubTask+0x2a8>)
 800278a:	681b      	ldr	r3, [r3, #0]
 800278c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002790:	4618      	mov	r0, r3
 8002792:	f00e ff76 	bl	8011682 <osMutexAcquire>
                    RESMeasurements* resMeas = &resMeasurements[boardNumber];
 8002796:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 800279a:	4613      	mov	r3, r2
 800279c:	011b      	lsls	r3, r3, #4
 800279e:	1a9b      	subs	r3, r3, r2
 80027a0:	009b      	lsls	r3, r3, #2
 80027a2:	4a87      	ldr	r2, [pc, #540]	@ (80029c0 <MqttClientPubTask+0x2ac>)
 80027a4:	4413      	add	r3, r2
 80027a6:	f8c7 323c 	str.w	r3, [r7, #572]	@ 0x23c
                    sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
 80027aa:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 80027ae:	1c5a      	adds	r2, r3, #1
 80027b0:	f107 031c 	add.w	r3, r7, #28
 80027b4:	4983      	ldr	r1, [pc, #524]	@ (80029c4 <MqttClientPubTask+0x2b0>)
 80027b6:	4618      	mov	r0, r3
 80027b8:	f028 f840 	bl	802a83c <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
 80027bc:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80027c0:	edd3 7a00 	vldr	s15, [r3]
 80027c4:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80027c8:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80027cc:	edd3 7a01 	vldr	s15, [r3, #4]
 80027d0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80027d4:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80027d8:	edd3 6a02 	vldr	s13, [r3, #8]
 80027dc:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80027e0:	f107 003c 	add.w	r0, r7, #60	@ 0x3c
 80027e4:	ed8d 6b02 	vstr	d6, [sp, #8]
 80027e8:	ed8d 7b00 	vstr	d7, [sp]
 80027ec:	ec53 2b15 	vmov	r2, r3, d5
 80027f0:	4975      	ldr	r1, [pc, #468]	@ (80029c8 <MqttClientPubTask+0x2b4>)
 80027f2:	f028 f823 	bl	802a83c <siprintf>
 80027f6:	4603      	mov	r3, r0
 80027f8:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
 80027fc:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002800:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002804:	18d0      	adds	r0, r2, r3
 8002806:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800280a:	edd3 7a03 	vldr	s15, [r3, #12]
 800280e:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002812:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002816:	edd3 7a04 	vldr	s15, [r3, #16]
 800281a:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800281e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002822:	edd3 6a05 	vldr	s13, [r3, #20]
 8002826:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 800282a:	ed8d 6b02 	vstr	d6, [sp, #8]
 800282e:	ed8d 7b00 	vstr	d7, [sp]
 8002832:	ec53 2b15 	vmov	r2, r3, d5
 8002836:	4965      	ldr	r1, [pc, #404]	@ (80029cc <MqttClientPubTask+0x2b8>)
 8002838:	f028 f800 	bl	802a83c <siprintf>
 800283c:	4603      	mov	r3, r0
 800283e:	461a      	mov	r2, r3
 8002840:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002844:	4413      	add	r3, r2
 8002846:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
 800284a:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 800284e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002852:	18d0      	adds	r0, r2, r3
 8002854:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002858:	edd3 7a06 	vldr	s15, [r3, #24]
 800285c:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 8002860:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002864:	edd3 7a07 	vldr	s15, [r3, #28]
 8002868:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800286c:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002870:	edd3 6a08 	vldr	s13, [r3, #32]
 8002874:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002878:	ed8d 6b02 	vstr	d6, [sp, #8]
 800287c:	ed8d 7b00 	vstr	d7, [sp]
 8002880:	ec53 2b15 	vmov	r2, r3, d5
 8002884:	4952      	ldr	r1, [pc, #328]	@ (80029d0 <MqttClientPubTask+0x2bc>)
 8002886:	f027 ffd9 	bl	802a83c <siprintf>
 800288a:	4603      	mov	r3, r0
 800288c:	461a      	mov	r2, r3
 800288e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002892:	4413      	add	r3, r2
 8002894:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
 8002898:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 800289c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 80028a0:	18d0      	adds	r0, r2, r3
 80028a2:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028a6:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 80028aa:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80028ae:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028b2:	edd3 7a0a 	vldr	s15, [r3, #40]	@ 0x28
 80028b6:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028ba:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028be:	edd3 6a0b 	vldr	s13, [r3, #44]	@ 0x2c
 80028c2:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80028c6:	ed8d 6b02 	vstr	d6, [sp, #8]
 80028ca:	ed8d 7b00 	vstr	d7, [sp]
 80028ce:	ec53 2b15 	vmov	r2, r3, d5
 80028d2:	4940      	ldr	r1, [pc, #256]	@ (80029d4 <MqttClientPubTask+0x2c0>)
 80028d4:	f027 ffb2 	bl	802a83c <siprintf>
 80028d8:	4603      	mov	r3, r0
 80028da:	461a      	mov	r2, r3
 80028dc:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 80028e0:	4413      	add	r3, r2
 80028e2:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
 80028e6:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 80028ea:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 80028ee:	18d0      	adds	r0, r2, r3
 80028f0:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028f4:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 80028f8:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80028fc:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002900:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 8002904:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002908:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800290c:	edd3 6a0e 	vldr	s13, [r3, #56]	@ 0x38
 8002910:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002914:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002918:	ed8d 7b00 	vstr	d7, [sp]
 800291c:	ec53 2b15 	vmov	r2, r3, d5
 8002920:	492d      	ldr	r1, [pc, #180]	@ (80029d8 <MqttClientPubTask+0x2c4>)
 8002922:	f027 ff8b 	bl	802a83c <siprintf>
 8002926:	4603      	mov	r3, r0
 8002928:	461a      	mov	r2, r3
 800292a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 800292e:	4413      	add	r3, r2
 8002930:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", slaveLastSeen[boardNumber]);
 8002934:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002938:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 800293c:	18d0      	adds	r0, r2, r3
 800293e:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002942:	4a26      	ldr	r2, [pc, #152]	@ (80029dc <MqttClientPubTask+0x2c8>)
 8002944:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8002948:	461a      	mov	r2, r3
 800294a:	4925      	ldr	r1, [pc, #148]	@ (80029e0 <MqttClientPubTask+0x2cc>)
 800294c:	f027 ff76 	bl	802a83c <siprintf>
 8002950:	4603      	mov	r3, r0
 8002952:	461a      	mov	r2, r3
 8002954:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002958:	4413      	add	r3, r2
 800295a:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    osMutexRelease (resMeasurementsMutex);
 800295e:	4b17      	ldr	r3, [pc, #92]	@ (80029bc <MqttClientPubTask+0x2a8>)
 8002960:	681b      	ldr	r3, [r3, #0]
 8002962:	4618      	mov	r0, r3
 8002964:	f00e fed8 	bl	8011718 <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002968:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 800296c:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002970:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002974:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002976:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 800297a:	4618      	mov	r0, r3
 800297c:	f7fd fd10 	bl	80003a0 <strlen>
 8002980:	4602      	mov	r2, r0
 8002982:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002986:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 800298a:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 800298c:	f107 020c 	add.w	r2, r7, #12
 8002990:	f107 031c 	add.w	r3, r7, #28
 8002994:	4619      	mov	r1, r3
 8002996:	4808      	ldr	r0, [pc, #32]	@ (80029b8 <MqttClientPubTask+0x2a4>)
 8002998:	f025 fa69 	bl	8027e6e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 800299c:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 80029a0:	3301      	adds	r3, #1
 80029a2:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 80029a6:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 80029aa:	2b03      	cmp	r3, #3
 80029ac:	f67f aeec 	bls.w	8002788 <MqttClientPubTask+0x74>
                }

                for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
 80029b0:	2300      	movs	r3, #0
 80029b2:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 80029b6:	e215      	b.n	8002de4 <MqttClientPubTask+0x6d0>
 80029b8:	24000730 	.word	0x24000730
 80029bc:	24002248 	.word	0x24002248
 80029c0:	24002088 	.word	0x24002088
 80029c4:	0802d3d0 	.word	0x0802d3d0
 80029c8:	0802d3e4 	.word	0x0802d3e4
 80029cc:	0802d408 	.word	0x0802d408
 80029d0:	0802d42c 	.word	0x0802d42c
 80029d4:	0802d450 	.word	0x0802d450
 80029d8:	0802d474 	.word	0x0802d474
 80029dc:	24002238 	.word	0x24002238
 80029e0:	0802d494 	.word	0x0802d494
                    if (boardNumber > 0) {
 80029e4:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 80029e8:	2b00      	cmp	r3, #0
 80029ea:	f000 81b3 	beq.w	8002d54 <MqttClientPubTask+0x640>
                        osMutexAcquire (sensorsInfoMutex, osWaitForever);
 80029ee:	4bc5      	ldr	r3, [pc, #788]	@ (8002d04 <MqttClientPubTask+0x5f0>)
 80029f0:	681b      	ldr	r3, [r3, #0]
 80029f2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80029f6:	4618      	mov	r0, r3
 80029f8:	f00e fe43 	bl	8011682 <osMutexAcquire>
                        SesnorsInfo* sensors = &sensorsInfo[boardNumber - 1];
 80029fc:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002a00:	1e5a      	subs	r2, r3, #1
 8002a02:	4613      	mov	r3, r2
 8002a04:	005b      	lsls	r3, r3, #1
 8002a06:	4413      	add	r3, r2
 8002a08:	011b      	lsls	r3, r3, #4
 8002a0a:	4abf      	ldr	r2, [pc, #764]	@ (8002d08 <MqttClientPubTask+0x5f4>)
 8002a0c:	4413      	add	r3, r2
 8002a0e:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                        sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
 8002a12:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 8002a16:	f107 031c 	add.w	r3, r7, #28
 8002a1a:	49bc      	ldr	r1, [pc, #752]	@ (8002d0c <MqttClientPubTask+0x5f8>)
 8002a1c:	4618      	mov	r0, r3
 8002a1e:	f027 ff0d 	bl	802a83c <siprintf>
                        bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
 8002a22:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a26:	edd3 7a00 	vldr	s15, [r3]
 8002a2a:	eeb7 6ae7 	vcvt.f64.f32	d6, s15
 8002a2e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a32:	edd3 7a01 	vldr	s15, [r3, #4]
 8002a36:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a3a:	f107 003c 	add.w	r0, r7, #60	@ 0x3c
 8002a3e:	ed8d 7b00 	vstr	d7, [sp]
 8002a42:	ec53 2b16 	vmov	r2, r3, d6
 8002a46:	49b2      	ldr	r1, [pc, #712]	@ (8002d10 <MqttClientPubTask+0x5fc>)
 8002a48:	f027 fef8 	bl	802a83c <siprintf>
 8002a4c:	4603      	mov	r3, r0
 8002a4e:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
 8002a52:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002a56:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a5a:	18d0      	adds	r0, r2, r3
 8002a5c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a60:	edd3 7a02 	vldr	s15, [r3, #8]
 8002a64:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a68:	ec53 2b17 	vmov	r2, r3, d7
 8002a6c:	49a9      	ldr	r1, [pc, #676]	@ (8002d14 <MqttClientPubTask+0x600>)
 8002a6e:	f027 fee5 	bl	802a83c <siprintf>
 8002a72:	4603      	mov	r3, r0
 8002a74:	461a      	mov	r2, r3
 8002a76:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a7a:	4413      	add	r3, r2
 8002a7c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderX\":%.2f, ", sensors->pvEncoderX);
 8002a80:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002a84:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a88:	18d0      	adds	r0, r2, r3
 8002a8a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002a8e:	edd3 7a03 	vldr	s15, [r3, #12]
 8002a92:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a96:	ec53 2b17 	vmov	r2, r3, d7
 8002a9a:	499f      	ldr	r1, [pc, #636]	@ (8002d18 <MqttClientPubTask+0x604>)
 8002a9c:	f027 fece 	bl	802a83c <siprintf>
 8002aa0:	4603      	mov	r3, r0
 8002aa2:	461a      	mov	r2, r3
 8002aa4:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002aa8:	4413      	add	r3, r2
 8002aaa:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderY\":%.2f, ", sensors->pvEncoderY);
 8002aae:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002ab2:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ab6:	18d0      	adds	r0, r2, r3
 8002ab8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002abc:	edd3 7a04 	vldr	s15, [r3, #16]
 8002ac0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002ac4:	ec53 2b17 	vmov	r2, r3, d7
 8002ac8:	4994      	ldr	r1, [pc, #592]	@ (8002d1c <MqttClientPubTask+0x608>)
 8002aca:	f027 feb7 	bl	802a83c <siprintf>
 8002ace:	4603      	mov	r3, r0
 8002ad0:	461a      	mov	r2, r3
 8002ad2:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ad6:	4413      	add	r3, r2
 8002ad8:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
 8002adc:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002ae0:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ae4:	18d0      	adds	r0, r2, r3
 8002ae6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002aea:	7d1b      	ldrb	r3, [r3, #20]
 8002aec:	461a      	mov	r2, r3
 8002aee:	498c      	ldr	r1, [pc, #560]	@ (8002d20 <MqttClientPubTask+0x60c>)
 8002af0:	f027 fea4 	bl	802a83c <siprintf>
 8002af4:	4603      	mov	r3, r0
 8002af6:	461a      	mov	r2, r3
 8002af8:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002afc:	4413      	add	r3, r2
 8002afe:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
 8002b02:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b06:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b0a:	18d0      	adds	r0, r2, r3
 8002b0c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b10:	7d5b      	ldrb	r3, [r3, #21]
 8002b12:	461a      	mov	r2, r3
 8002b14:	4983      	ldr	r1, [pc, #524]	@ (8002d24 <MqttClientPubTask+0x610>)
 8002b16:	f027 fe91 	bl	802a83c <siprintf>
 8002b1a:	4603      	mov	r3, r0
 8002b1c:	461a      	mov	r2, r3
 8002b1e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b22:	4413      	add	r3, r2
 8002b24:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
 8002b28:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b2c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b30:	18d0      	adds	r0, r2, r3
 8002b32:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b36:	edd3 7a06 	vldr	s15, [r3, #24]
 8002b3a:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b3e:	ec53 2b17 	vmov	r2, r3, d7
 8002b42:	4979      	ldr	r1, [pc, #484]	@ (8002d28 <MqttClientPubTask+0x614>)
 8002b44:	f027 fe7a 	bl	802a83c <siprintf>
 8002b48:	4603      	mov	r3, r0
 8002b4a:	461a      	mov	r2, r3
 8002b4c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b50:	4413      	add	r3, r2
 8002b52:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
 8002b56:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b5a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b5e:	18d0      	adds	r0, r2, r3
 8002b60:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b64:	edd3 7a07 	vldr	s15, [r3, #28]
 8002b68:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b6c:	ec53 2b17 	vmov	r2, r3, d7
 8002b70:	496e      	ldr	r1, [pc, #440]	@ (8002d2c <MqttClientPubTask+0x618>)
 8002b72:	f027 fe63 	bl	802a83c <siprintf>
 8002b76:	4603      	mov	r3, r0
 8002b78:	461a      	mov	r2, r3
 8002b7a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b7e:	4413      	add	r3, r2
 8002b80:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
 8002b84:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b88:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b8c:	18d0      	adds	r0, r2, r3
 8002b8e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b92:	edd3 7a08 	vldr	s15, [r3, #32]
 8002b96:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b9a:	ec53 2b17 	vmov	r2, r3, d7
 8002b9e:	4964      	ldr	r1, [pc, #400]	@ (8002d30 <MqttClientPubTask+0x61c>)
 8002ba0:	f027 fe4c 	bl	802a83c <siprintf>
 8002ba4:	4603      	mov	r3, r0
 8002ba6:	461a      	mov	r2, r3
 8002ba8:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bac:	4413      	add	r3, r2
 8002bae:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
 8002bb2:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002bb6:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bba:	18d0      	adds	r0, r2, r3
 8002bbc:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bc0:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 8002bc4:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002bc8:	ec53 2b17 	vmov	r2, r3, d7
 8002bcc:	4959      	ldr	r1, [pc, #356]	@ (8002d34 <MqttClientPubTask+0x620>)
 8002bce:	f027 fe35 	bl	802a83c <siprintf>
 8002bd2:	4603      	mov	r3, r0
 8002bd4:	461a      	mov	r2, r3
 8002bd6:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bda:	4413      	add	r3, r2
 8002bdc:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchUp\":%d, ", sensors->limitXSwitchUp);
 8002be0:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002be4:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002be8:	18d0      	adds	r0, r2, r3
 8002bea:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bee:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8002bf2:	461a      	mov	r2, r3
 8002bf4:	4950      	ldr	r1, [pc, #320]	@ (8002d38 <MqttClientPubTask+0x624>)
 8002bf6:	f027 fe21 	bl	802a83c <siprintf>
 8002bfa:	4603      	mov	r3, r0
 8002bfc:	461a      	mov	r2, r3
 8002bfe:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c02:	4413      	add	r3, r2
 8002c04:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchDown\":%d, ", sensors->limitXSwitchDown);
 8002c08:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c0c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c10:	18d0      	adds	r0, r2, r3
 8002c12:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c16:	f893 3029 	ldrb.w	r3, [r3, #41]	@ 0x29
 8002c1a:	461a      	mov	r2, r3
 8002c1c:	4947      	ldr	r1, [pc, #284]	@ (8002d3c <MqttClientPubTask+0x628>)
 8002c1e:	f027 fe0d 	bl	802a83c <siprintf>
 8002c22:	4603      	mov	r3, r0
 8002c24:	461a      	mov	r2, r3
 8002c26:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c2a:	4413      	add	r3, r2
 8002c2c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchCenter\":%d, ", sensors->limitXSwitchCenter);
 8002c30:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c34:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c38:	18d0      	adds	r0, r2, r3
 8002c3a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c3e:	f893 302a 	ldrb.w	r3, [r3, #42]	@ 0x2a
 8002c42:	461a      	mov	r2, r3
 8002c44:	493e      	ldr	r1, [pc, #248]	@ (8002d40 <MqttClientPubTask+0x62c>)
 8002c46:	f027 fdf9 	bl	802a83c <siprintf>
 8002c4a:	4603      	mov	r3, r0
 8002c4c:	461a      	mov	r2, r3
 8002c4e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c52:	4413      	add	r3, r2
 8002c54:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchUp\":%d, ", sensors->limitYSwitchUp);
 8002c58:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c5c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c60:	18d0      	adds	r0, r2, r3
 8002c62:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c66:	f893 302b 	ldrb.w	r3, [r3, #43]	@ 0x2b
 8002c6a:	461a      	mov	r2, r3
 8002c6c:	4935      	ldr	r1, [pc, #212]	@ (8002d44 <MqttClientPubTask+0x630>)
 8002c6e:	f027 fde5 	bl	802a83c <siprintf>
 8002c72:	4603      	mov	r3, r0
 8002c74:	461a      	mov	r2, r3
 8002c76:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c7a:	4413      	add	r3, r2
 8002c7c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchDown\":%d, ", sensors->limitYSwitchDown);
 8002c80:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c84:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c88:	18d0      	adds	r0, r2, r3
 8002c8a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c8e:	f893 302c 	ldrb.w	r3, [r3, #44]	@ 0x2c
 8002c92:	461a      	mov	r2, r3
 8002c94:	492c      	ldr	r1, [pc, #176]	@ (8002d48 <MqttClientPubTask+0x634>)
 8002c96:	f027 fdd1 	bl	802a83c <siprintf>
 8002c9a:	4603      	mov	r3, r0
 8002c9c:	461a      	mov	r2, r3
 8002c9e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ca2:	4413      	add	r3, r2
 8002ca4:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchCenter\":%d, ", sensors->limitYSwitchCenter);
 8002ca8:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002cac:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cb0:	18d0      	adds	r0, r2, r3
 8002cb2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cb6:	f893 302d 	ldrb.w	r3, [r3, #45]	@ 0x2d
 8002cba:	461a      	mov	r2, r3
 8002cbc:	4923      	ldr	r1, [pc, #140]	@ (8002d4c <MqttClientPubTask+0x638>)
 8002cbe:	f027 fdbd 	bl	802a83c <siprintf>
 8002cc2:	4603      	mov	r3, r0
 8002cc4:	461a      	mov	r2, r3
 8002cc6:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cca:	4413      	add	r3, r2
 8002ccc:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
 8002cd0:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002cd4:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cd8:	18d0      	adds	r0, r2, r3
 8002cda:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cde:	f893 302e 	ldrb.w	r3, [r3, #46]	@ 0x2e
 8002ce2:	461a      	mov	r2, r3
 8002ce4:	491a      	ldr	r1, [pc, #104]	@ (8002d50 <MqttClientPubTask+0x63c>)
 8002ce6:	f027 fda9 	bl	802a83c <siprintf>
 8002cea:	4603      	mov	r3, r0
 8002cec:	461a      	mov	r2, r3
 8002cee:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cf2:	4413      	add	r3, r2
 8002cf4:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        osMutexRelease (sensorsInfoMutex);
 8002cf8:	4b02      	ldr	r3, [pc, #8]	@ (8002d04 <MqttClientPubTask+0x5f0>)
 8002cfa:	681b      	ldr	r3, [r3, #0]
 8002cfc:	4618      	mov	r0, r3
 8002cfe:	f00e fd0b 	bl	8011718 <osMutexRelease>
 8002d02:	e050      	b.n	8002da6 <MqttClientPubTask+0x692>
 8002d04:	2400224c 	.word	0x2400224c
 8002d08:	24002178 	.word	0x24002178
 8002d0c:	0802d4a8 	.word	0x0802d4a8
 8002d10:	0802d4b4 	.word	0x0802d4b4
 8002d14:	0802d4d4 	.word	0x0802d4d4
 8002d18:	0802d4e8 	.word	0x0802d4e8
 8002d1c:	0802d4fc 	.word	0x0802d4fc
 8002d20:	0802d510 	.word	0x0802d510
 8002d24:	0802d524 	.word	0x0802d524
 8002d28:	0802d538 	.word	0x0802d538
 8002d2c:	0802d554 	.word	0x0802d554
 8002d30:	0802d570 	.word	0x0802d570
 8002d34:	0802d58c 	.word	0x0802d58c
 8002d38:	0802d5a8 	.word	0x0802d5a8
 8002d3c:	0802d5c0 	.word	0x0802d5c0
 8002d40:	0802d5d8 	.word	0x0802d5d8
 8002d44:	0802d5f4 	.word	0x0802d5f4
 8002d48:	0802d60c 	.word	0x0802d60c
 8002d4c:	0802d624 	.word	0x0802d624
 8002d50:	0802d640 	.word	0x0802d640
                    } else {
                        sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
 8002d54:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 8002d58:	f107 031c 	add.w	r3, r7, #28
 8002d5c:	4926      	ldr	r1, [pc, #152]	@ (8002df8 <MqttClientPubTask+0x6e4>)
 8002d5e:	4618      	mov	r0, r3
 8002d60:	f027 fd6c 	bl	802a83c <siprintf>
                        uint8_t mainBoardPowerSupplyFailMask = ~((HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_4) << 1) | HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_2)) & 0x3;
 8002d64:	2110      	movs	r1, #16
 8002d66:	4825      	ldr	r0, [pc, #148]	@ (8002dfc <MqttClientPubTask+0x6e8>)
 8002d68:	f007 f974 	bl	800a054 <HAL_GPIO_ReadPin>
 8002d6c:	4603      	mov	r3, r0
 8002d6e:	005b      	lsls	r3, r3, #1
 8002d70:	b25c      	sxtb	r4, r3
 8002d72:	2104      	movs	r1, #4
 8002d74:	4821      	ldr	r0, [pc, #132]	@ (8002dfc <MqttClientPubTask+0x6e8>)
 8002d76:	f007 f96d 	bl	800a054 <HAL_GPIO_ReadPin>
 8002d7a:	4603      	mov	r3, r0
 8002d7c:	b25b      	sxtb	r3, r3
 8002d7e:	4323      	orrs	r3, r4
 8002d80:	b25b      	sxtb	r3, r3
 8002d82:	43db      	mvns	r3, r3
 8002d84:	b25b      	sxtb	r3, r3
 8002d86:	b2db      	uxtb	r3, r3
 8002d88:	f003 0303 	and.w	r3, r3, #3
 8002d8c:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
                        bytesInBuffer = sprintf (messageBuffer, "{\"powerSupplyFailMask\":%d}", mainBoardPowerSupplyFailMask);
 8002d90:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 8002d94:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8002d98:	4919      	ldr	r1, [pc, #100]	@ (8002e00 <MqttClientPubTask+0x6ec>)
 8002d9a:	4618      	mov	r0, r3
 8002d9c:	f027 fd4e 	bl	802a83c <siprintf>
 8002da0:	4603      	mov	r3, r0
 8002da2:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    }
                    message.payload    = (void*)messageBuffer;
 8002da6:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002daa:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002dae:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002db2:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002db4:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8002db8:	4618      	mov	r0, r3
 8002dba:	f7fd faf1 	bl	80003a0 <strlen>
 8002dbe:	4602      	mov	r2, r0
 8002dc0:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002dc4:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002dc8:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002dca:	f107 020c 	add.w	r2, r7, #12
 8002dce:	f107 031c 	add.w	r3, r7, #28
 8002dd2:	4619      	mov	r1, r3
 8002dd4:	480b      	ldr	r0, [pc, #44]	@ (8002e04 <MqttClientPubTask+0x6f0>)
 8002dd6:	f025 f84a 	bl	8027e6e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
 8002dda:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002dde:	3301      	adds	r3, #1
 8002de0:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002de4:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002de8:	2b04      	cmp	r3, #4
 8002dea:	f67f adfb 	bls.w	80029e4 <MqttClientPubTask+0x2d0>
                }
            }
        }

        osDelay (pdMS_TO_TICKS (1000));
 8002dee:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002df2:	f00e faae 	bl	8011352 <osDelay>
        if (mqttClient.isconnected) {
 8002df6:	e4b8      	b.n	800276a <MqttClientPubTask+0x56>
 8002df8:	0802d4a8 	.word	0x0802d4a8
 8002dfc:	58020c00 	.word	0x58020c00
 8002e00:	0802d65c 	.word	0x0802d65c
 8002e04:	24000730 	.word	0x24000730

08002e08 <MqttConnectBroker>:
    }
}

uint32_t MqttConnectBroker () {
 8002e08:	b580      	push	{r7, lr}
 8002e0a:	b09c      	sub	sp, #112	@ 0x70
 8002e0c:	af04      	add	r7, sp, #16
    uint8_t boardNumber = 0;
 8002e0e:	2300      	movs	r3, #0
 8002e10:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
    int ret;

    NewNetwork (&net);
 8002e14:	4839      	ldr	r0, [pc, #228]	@ (8002efc <MqttConnectBroker+0xf4>)
 8002e16:	f025 f963 	bl	80280e0 <NewNetwork>
    ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
 8002e1a:	f240 725b 	movw	r2, #1883	@ 0x75b
 8002e1e:	4938      	ldr	r1, [pc, #224]	@ (8002f00 <MqttConnectBroker+0xf8>)
 8002e20:	4836      	ldr	r0, [pc, #216]	@ (8002efc <MqttConnectBroker+0xf4>)
 8002e22:	f025 f979 	bl	8028118 <ConnectNetwork>
 8002e26:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002e28:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002e2a:	2b00      	cmp	r3, #0
 8002e2c:	d005      	beq.n	8002e3a <MqttConnectBroker+0x32>
        printf ("ConnectNetwork failed.\n");
 8002e2e:	4835      	ldr	r0, [pc, #212]	@ (8002f04 <MqttConnectBroker+0xfc>)
 8002e30:	f027 fcfc 	bl	802a82c <puts>
        return -1;
 8002e34:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8002e38:	e05c      	b.n	8002ef4 <MqttConnectBroker+0xec>
    }

    MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
 8002e3a:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002e3e:	9302      	str	r3, [sp, #8]
 8002e40:	4b31      	ldr	r3, [pc, #196]	@ (8002f08 <MqttConnectBroker+0x100>)
 8002e42:	9301      	str	r3, [sp, #4]
 8002e44:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002e48:	9300      	str	r3, [sp, #0]
 8002e4a:	4b30      	ldr	r3, [pc, #192]	@ (8002f0c <MqttConnectBroker+0x104>)
 8002e4c:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8002e50:	492a      	ldr	r1, [pc, #168]	@ (8002efc <MqttConnectBroker+0xf4>)
 8002e52:	482f      	ldr	r0, [pc, #188]	@ (8002f10 <MqttConnectBroker+0x108>)
 8002e54:	f024 fa7e 	bl	8027354 <MQTTClientInit>

    MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
 8002e58:	4a2e      	ldr	r2, [pc, #184]	@ (8002f14 <MqttConnectBroker+0x10c>)
 8002e5a:	463b      	mov	r3, r7
 8002e5c:	4611      	mov	r1, r2
 8002e5e:	2258      	movs	r2, #88	@ 0x58
 8002e60:	4618      	mov	r0, r3
 8002e62:	f027 ff04 	bl	802ac6e <memcpy>
    data.willFlag               = 0;
 8002e66:	2300      	movs	r3, #0
 8002e68:	76fb      	strb	r3, [r7, #27]
    data.MQTTVersion            = 3;
 8002e6a:	2303      	movs	r3, #3
 8002e6c:	723b      	strb	r3, [r7, #8]
    data.clientID.cstring       = "test_user1";
 8002e6e:	4b2a      	ldr	r3, [pc, #168]	@ (8002f18 <MqttConnectBroker+0x110>)
 8002e70:	60fb      	str	r3, [r7, #12]
    data.username.cstring       = "test_user1";
 8002e72:	4b29      	ldr	r3, [pc, #164]	@ (8002f18 <MqttConnectBroker+0x110>)
 8002e74:	643b      	str	r3, [r7, #64]	@ 0x40
    data.password.cstring       = "1234";
 8002e76:	4b29      	ldr	r3, [pc, #164]	@ (8002f1c <MqttConnectBroker+0x114>)
 8002e78:	64fb      	str	r3, [r7, #76]	@ 0x4c
    data.keepAliveInterval      = 100;
 8002e7a:	2364      	movs	r3, #100	@ 0x64
 8002e7c:	833b      	strh	r3, [r7, #24]
    data.cleansession           = 1;
 8002e7e:	2301      	movs	r3, #1
 8002e80:	76bb      	strb	r3, [r7, #26]

    ret = MQTTConnect (&mqttClient, &data);
 8002e82:	463b      	mov	r3, r7
 8002e84:	4619      	mov	r1, r3
 8002e86:	4822      	ldr	r0, [pc, #136]	@ (8002f10 <MqttConnectBroker+0x108>)
 8002e88:	f024 fec0 	bl	8027c0c <MQTTConnect>
 8002e8c:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002e8e:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002e90:	2b00      	cmp	r3, #0
 8002e92:	d008      	beq.n	8002ea6 <MqttConnectBroker+0x9e>
        net_disconnect (&net);
 8002e94:	4819      	ldr	r0, [pc, #100]	@ (8002efc <MqttConnectBroker+0xf4>)
 8002e96:	f025 f9c8 	bl	802822a <net_disconnect>
        printf ("MQTTConnect failed. Code %d\n", ret);
 8002e9a:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8002e9c:	4820      	ldr	r0, [pc, #128]	@ (8002f20 <MqttConnectBroker+0x118>)
 8002e9e:	f027 fc5d 	bl	802a75c <iprintf>
        return ret;
 8002ea2:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002ea4:	e026      	b.n	8002ef4 <MqttConnectBroker+0xec>
    }

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002ea6:	2300      	movs	r3, #0
 8002ea8:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002eac:	e01a      	b.n	8002ee4 <MqttConnectBroker+0xdc>
        ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
 8002eae:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002eb2:	4a1c      	ldr	r2, [pc, #112]	@ (8002f24 <MqttConnectBroker+0x11c>)
 8002eb4:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
 8002eb8:	4b1b      	ldr	r3, [pc, #108]	@ (8002f28 <MqttConnectBroker+0x120>)
 8002eba:	2200      	movs	r2, #0
 8002ebc:	4814      	ldr	r0, [pc, #80]	@ (8002f10 <MqttConnectBroker+0x108>)
 8002ebe:	f024 ffc0 	bl	8027e42 <MQTTSubscribe>
 8002ec2:	65b8      	str	r0, [r7, #88]	@ 0x58
        if (ret != MQTT_SUCCESS) {
 8002ec4:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002ec6:	2b00      	cmp	r3, #0
 8002ec8:	d007      	beq.n	8002eda <MqttConnectBroker+0xd2>
            net_disconnect (&net);
 8002eca:	480c      	ldr	r0, [pc, #48]	@ (8002efc <MqttConnectBroker+0xf4>)
 8002ecc:	f025 f9ad 	bl	802822a <net_disconnect>
            printf ("MQTTSubscribe failed.\n");
 8002ed0:	4816      	ldr	r0, [pc, #88]	@ (8002f2c <MqttConnectBroker+0x124>)
 8002ed2:	f027 fcab 	bl	802a82c <puts>
            return ret;
 8002ed6:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002ed8:	e00c      	b.n	8002ef4 <MqttConnectBroker+0xec>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002eda:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002ede:	3301      	adds	r3, #1
 8002ee0:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8002ee4:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 8002ee8:	2b03      	cmp	r3, #3
 8002eea:	d9e0      	bls.n	8002eae <MqttConnectBroker+0xa6>
        }
    }
    printf ("MQTT_ConnectBroker O.K.\n");
 8002eec:	4810      	ldr	r0, [pc, #64]	@ (8002f30 <MqttConnectBroker+0x128>)
 8002eee:	f027 fc9d 	bl	802a82c <puts>

    return MQTT_SUCCESS;
 8002ef2:	2300      	movs	r3, #0
}
 8002ef4:	4618      	mov	r0, r3
 8002ef6:	3760      	adds	r7, #96	@ 0x60
 8002ef8:	46bd      	mov	sp, r7
 8002efa:	bd80      	pop	{r7, pc}
 8002efc:	24000720 	.word	0x24000720
 8002f00:	0802d678 	.word	0x0802d678
 8002f04:	0802d688 	.word	0x0802d688
 8002f08:	24000b9c 	.word	0x24000b9c
 8002f0c:	2400079c 	.word	0x2400079c
 8002f10:	24000730 	.word	0x24000730
 8002f14:	0802d704 	.word	0x0802d704
 8002f18:	0802d6a0 	.word	0x0802d6a0
 8002f1c:	0802d6ac 	.word	0x0802d6ac
 8002f20:	0802d6b4 	.word	0x0802d6b4
 8002f24:	080318d8 	.word	0x080318d8
 8002f28:	08003099 	.word	0x08003099
 8002f2c:	0802d6d4 	.word	0x0802d6d4
 8002f30:	0802d6ec 	.word	0x0802d6ec

08002f34 <RelayCtrl>:

void RelayCtrl (int32_t relayNumber, int32_t relayTimeOn) {
 8002f34:	b580      	push	{r7, lr}
 8002f36:	b082      	sub	sp, #8
 8002f38:	af00      	add	r7, sp, #0
 8002f3a:	6078      	str	r0, [r7, #4]
 8002f3c:	6039      	str	r1, [r7, #0]
    switch (relayNumber) {
 8002f3e:	687b      	ldr	r3, [r7, #4]
 8002f40:	3b01      	subs	r3, #1
 8002f42:	2b03      	cmp	r3, #3
 8002f44:	f200 8098 	bhi.w	8003078 <RelayCtrl+0x144>
 8002f48:	a201      	add	r2, pc, #4	@ (adr r2, 8002f50 <RelayCtrl+0x1c>)
 8002f4a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8002f4e:	bf00      	nop
 8002f50:	08002f61 	.word	0x08002f61
 8002f54:	08002fa7 	.word	0x08002fa7
 8002f58:	08002fed 	.word	0x08002fed
 8002f5c:	08003033 	.word	0x08003033
    case 1:
        if (relayTimeOn > 0) {
 8002f60:	683b      	ldr	r3, [r7, #0]
 8002f62:	2b00      	cmp	r3, #0
 8002f64:	dd0b      	ble.n	8002f7e <RelayCtrl+0x4a>
            osTimerStart (relay1TimerHandle, relayTimeOn * 1000);
 8002f66:	4b47      	ldr	r3, [pc, #284]	@ (8003084 <RelayCtrl+0x150>)
 8002f68:	681a      	ldr	r2, [r3, #0]
 8002f6a:	683b      	ldr	r3, [r7, #0]
 8002f6c:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8002f70:	fb01 f303 	mul.w	r3, r1, r3
 8002f74:	4619      	mov	r1, r3
 8002f76:	4610      	mov	r0, r2
 8002f78:	f00e fa98 	bl	80114ac <osTimerStart>
 8002f7c:	e004      	b.n	8002f88 <RelayCtrl+0x54>
        } else {
            osTimerStop (relay1TimerHandle);
 8002f7e:	4b41      	ldr	r3, [pc, #260]	@ (8003084 <RelayCtrl+0x150>)
 8002f80:	681b      	ldr	r3, [r3, #0]
 8002f82:	4618      	mov	r0, r3
 8002f84:	f00e fac0 	bl	8011508 <osTimerStop>
        }
        if (relayTimeOn != 0) {
 8002f88:	683b      	ldr	r3, [r7, #0]
 8002f8a:	2b00      	cmp	r3, #0
 8002f8c:	d005      	beq.n	8002f9a <RelayCtrl+0x66>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_SET);
 8002f8e:	2201      	movs	r2, #1
 8002f90:	2120      	movs	r1, #32
 8002f92:	483d      	ldr	r0, [pc, #244]	@ (8003088 <RelayCtrl+0x154>)
 8002f94:	f007 f876 	bl	800a084 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
        }
        break;
 8002f98:	e06f      	b.n	800307a <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
 8002f9a:	2200      	movs	r2, #0
 8002f9c:	2120      	movs	r1, #32
 8002f9e:	483a      	ldr	r0, [pc, #232]	@ (8003088 <RelayCtrl+0x154>)
 8002fa0:	f007 f870 	bl	800a084 <HAL_GPIO_WritePin>
        break;
 8002fa4:	e069      	b.n	800307a <RelayCtrl+0x146>
    case 2:
        if (relayTimeOn > 0) {
 8002fa6:	683b      	ldr	r3, [r7, #0]
 8002fa8:	2b00      	cmp	r3, #0
 8002faa:	dd0b      	ble.n	8002fc4 <RelayCtrl+0x90>
            osTimerStart (relay2TimerHandle, relayTimeOn * 1000);
 8002fac:	4b37      	ldr	r3, [pc, #220]	@ (800308c <RelayCtrl+0x158>)
 8002fae:	681a      	ldr	r2, [r3, #0]
 8002fb0:	683b      	ldr	r3, [r7, #0]
 8002fb2:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8002fb6:	fb01 f303 	mul.w	r3, r1, r3
 8002fba:	4619      	mov	r1, r3
 8002fbc:	4610      	mov	r0, r2
 8002fbe:	f00e fa75 	bl	80114ac <osTimerStart>
 8002fc2:	e004      	b.n	8002fce <RelayCtrl+0x9a>
        } else {
            osTimerStop (relay2TimerHandle);
 8002fc4:	4b31      	ldr	r3, [pc, #196]	@ (800308c <RelayCtrl+0x158>)
 8002fc6:	681b      	ldr	r3, [r3, #0]
 8002fc8:	4618      	mov	r0, r3
 8002fca:	f00e fa9d 	bl	8011508 <osTimerStop>
        }
        if (relayTimeOn != 0) {
 8002fce:	683b      	ldr	r3, [r7, #0]
 8002fd0:	2b00      	cmp	r3, #0
 8002fd2:	d005      	beq.n	8002fe0 <RelayCtrl+0xac>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_SET);
 8002fd4:	2201      	movs	r2, #1
 8002fd6:	2108      	movs	r1, #8
 8002fd8:	482b      	ldr	r0, [pc, #172]	@ (8003088 <RelayCtrl+0x154>)
 8002fda:	f007 f853 	bl	800a084 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
        }
        break;
 8002fde:	e04c      	b.n	800307a <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
 8002fe0:	2200      	movs	r2, #0
 8002fe2:	2108      	movs	r1, #8
 8002fe4:	4828      	ldr	r0, [pc, #160]	@ (8003088 <RelayCtrl+0x154>)
 8002fe6:	f007 f84d 	bl	800a084 <HAL_GPIO_WritePin>
        break;
 8002fea:	e046      	b.n	800307a <RelayCtrl+0x146>
    case 3:
        if (relayTimeOn > 0) {
 8002fec:	683b      	ldr	r3, [r7, #0]
 8002fee:	2b00      	cmp	r3, #0
 8002ff0:	dd0b      	ble.n	800300a <RelayCtrl+0xd6>
            osTimerStart (relay3TimerHandle, relayTimeOn * 1000);
 8002ff2:	4b27      	ldr	r3, [pc, #156]	@ (8003090 <RelayCtrl+0x15c>)
 8002ff4:	681a      	ldr	r2, [r3, #0]
 8002ff6:	683b      	ldr	r3, [r7, #0]
 8002ff8:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8002ffc:	fb01 f303 	mul.w	r3, r1, r3
 8003000:	4619      	mov	r1, r3
 8003002:	4610      	mov	r0, r2
 8003004:	f00e fa52 	bl	80114ac <osTimerStart>
 8003008:	e004      	b.n	8003014 <RelayCtrl+0xe0>
        } else {
            osTimerStop (relay3TimerHandle);
 800300a:	4b21      	ldr	r3, [pc, #132]	@ (8003090 <RelayCtrl+0x15c>)
 800300c:	681b      	ldr	r3, [r3, #0]
 800300e:	4618      	mov	r0, r3
 8003010:	f00e fa7a 	bl	8011508 <osTimerStop>
        }
        if (relayTimeOn != 0) {
 8003014:	683b      	ldr	r3, [r7, #0]
 8003016:	2b00      	cmp	r3, #0
 8003018:	d005      	beq.n	8003026 <RelayCtrl+0xf2>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_SET);
 800301a:	2201      	movs	r2, #1
 800301c:	2110      	movs	r1, #16
 800301e:	481a      	ldr	r0, [pc, #104]	@ (8003088 <RelayCtrl+0x154>)
 8003020:	f007 f830 	bl	800a084 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
        }
        break;
 8003024:	e029      	b.n	800307a <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
 8003026:	2200      	movs	r2, #0
 8003028:	2110      	movs	r1, #16
 800302a:	4817      	ldr	r0, [pc, #92]	@ (8003088 <RelayCtrl+0x154>)
 800302c:	f007 f82a 	bl	800a084 <HAL_GPIO_WritePin>
        break;
 8003030:	e023      	b.n	800307a <RelayCtrl+0x146>
    case 4:
        if (relayTimeOn > 0) {
 8003032:	683b      	ldr	r3, [r7, #0]
 8003034:	2b00      	cmp	r3, #0
 8003036:	dd0b      	ble.n	8003050 <RelayCtrl+0x11c>
            osTimerStart (relay4TimerHandle, relayTimeOn * 1000);
 8003038:	4b16      	ldr	r3, [pc, #88]	@ (8003094 <RelayCtrl+0x160>)
 800303a:	681a      	ldr	r2, [r3, #0]
 800303c:	683b      	ldr	r3, [r7, #0]
 800303e:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8003042:	fb01 f303 	mul.w	r3, r1, r3
 8003046:	4619      	mov	r1, r3
 8003048:	4610      	mov	r0, r2
 800304a:	f00e fa2f 	bl	80114ac <osTimerStart>
 800304e:	e004      	b.n	800305a <RelayCtrl+0x126>
        } else {
            osTimerStop (relay4TimerHandle);
 8003050:	4b10      	ldr	r3, [pc, #64]	@ (8003094 <RelayCtrl+0x160>)
 8003052:	681b      	ldr	r3, [r3, #0]
 8003054:	4618      	mov	r0, r3
 8003056:	f00e fa57 	bl	8011508 <osTimerStop>
        }
        if (relayTimeOn != 0) {
 800305a:	683b      	ldr	r3, [r7, #0]
 800305c:	2b00      	cmp	r3, #0
 800305e:	d005      	beq.n	800306c <RelayCtrl+0x138>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_SET);
 8003060:	2201      	movs	r2, #1
 8003062:	2104      	movs	r1, #4
 8003064:	4808      	ldr	r0, [pc, #32]	@ (8003088 <RelayCtrl+0x154>)
 8003066:	f007 f80d 	bl	800a084 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
        }
        break;
 800306a:	e006      	b.n	800307a <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
 800306c:	2200      	movs	r2, #0
 800306e:	2104      	movs	r1, #4
 8003070:	4805      	ldr	r0, [pc, #20]	@ (8003088 <RelayCtrl+0x154>)
 8003072:	f007 f807 	bl	800a084 <HAL_GPIO_WritePin>
        break;
 8003076:	e000      	b.n	800307a <RelayCtrl+0x146>
    default: break;
 8003078:	bf00      	nop
    }
}
 800307a:	bf00      	nop
 800307c:	3708      	adds	r7, #8
 800307e:	46bd      	mov	sp, r7
 8003080:	bd80      	pop	{r7, pc}
 8003082:	bf00      	nop
 8003084:	24000658 	.word	0x24000658
 8003088:	58021000 	.word	0x58021000
 800308c:	24000688 	.word	0x24000688
 8003090:	240006b8 	.word	0x240006b8
 8003094:	240006e8 	.word	0x240006e8

08003098 <MqttMessageArrived>:

void MqttMessageArrived (MessageData* msg) {
 8003098:	b580      	push	{r7, lr}
 800309a:	b09c      	sub	sp, #112	@ 0x70
 800309c:	af00      	add	r7, sp, #0
 800309e:	6078      	str	r0, [r7, #4]
    SerialProtocolCommands spCommand = spUnknown;
 80030a0:	230f      	movs	r3, #15
 80030a2:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
    BoardNoOverTopic topicForBoard   = unknownBoard;
 80030a6:	2305      	movs	r3, #5
 80030a8:	f887 306e 	strb.w	r3, [r7, #110]	@ 0x6e
    uint8_t boardNumber              = 0;
 80030ac:	2300      	movs	r3, #0
 80030ae:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
    MQTTMessage* message             = msg->message;
 80030b2:	687b      	ldr	r3, [r7, #4]
 80030b4:	681b      	ldr	r3, [r3, #0]
 80030b6:	657b      	str	r3, [r7, #84]	@ 0x54
    char topicName[32]               = { 0 };
 80030b8:	2300      	movs	r3, #0
 80030ba:	61fb      	str	r3, [r7, #28]
 80030bc:	f107 0320 	add.w	r3, r7, #32
 80030c0:	2200      	movs	r2, #0
 80030c2:	601a      	str	r2, [r3, #0]
 80030c4:	605a      	str	r2, [r3, #4]
 80030c6:	609a      	str	r2, [r3, #8]
 80030c8:	60da      	str	r2, [r3, #12]
 80030ca:	611a      	str	r2, [r3, #16]
 80030cc:	615a      	str	r2, [r3, #20]
 80030ce:	619a      	str	r2, [r3, #24]
    memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
 80030d0:	687b      	ldr	r3, [r7, #4]
 80030d2:	685b      	ldr	r3, [r3, #4]
 80030d4:	6899      	ldr	r1, [r3, #8]
 80030d6:	687b      	ldr	r3, [r7, #4]
 80030d8:	685b      	ldr	r3, [r3, #4]
 80030da:	685b      	ldr	r3, [r3, #4]
 80030dc:	461a      	mov	r2, r3
 80030de:	f107 031c 	add.w	r3, r7, #28
 80030e2:	4618      	mov	r0, r3
 80030e4:	f027 fdc3 	bl	802ac6e <memcpy>

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80030e8:	2300      	movs	r3, #0
 80030ea:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
 80030ee:	e017      	b.n	8003120 <MqttMessageArrived+0x88>
        if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
 80030f0:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 80030f4:	4ab3      	ldr	r2, [pc, #716]	@ (80033c4 <MqttMessageArrived+0x32c>)
 80030f6:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80030fa:	f107 031c 	add.w	r3, r7, #28
 80030fe:	4611      	mov	r1, r2
 8003100:	4618      	mov	r0, r3
 8003102:	f7fd f8ed 	bl	80002e0 <strcmp>
 8003106:	4603      	mov	r3, r0
 8003108:	2b00      	cmp	r3, #0
 800310a:	d104      	bne.n	8003116 <MqttMessageArrived+0x7e>
            topicForBoard = (BoardNoOverTopic)(boardNumber);
 800310c:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 8003110:	f887 306e 	strb.w	r3, [r7, #110]	@ 0x6e
            break;
 8003114:	e008      	b.n	8003128 <MqttMessageArrived+0x90>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8003116:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 800311a:	3301      	adds	r3, #1
 800311c:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
 8003120:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 8003124:	2b03      	cmp	r3, #3
 8003126:	d9e3      	bls.n	80030f0 <MqttMessageArrived+0x58>
        }
    }

    cJSON* json             = cJSON_Parse (message->payload);
 8003128:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800312a:	689b      	ldr	r3, [r3, #8]
 800312c:	4618      	mov	r0, r3
 800312e:	f7fe fa11 	bl	8001554 <cJSON_Parse>
 8003132:	6538      	str	r0, [r7, #80]	@ 0x50
    const cJSON* objectItem = NULL;
 8003134:	2300      	movs	r3, #0
 8003136:	64fb      	str	r3, [r7, #76]	@ 0x4c
    InterProcessData data   = { 0 };
 8003138:	f107 030c 	add.w	r3, r7, #12
 800313c:	2200      	movs	r2, #0
 800313e:	601a      	str	r2, [r3, #0]
 8003140:	605a      	str	r2, [r3, #4]
 8003142:	609a      	str	r2, [r3, #8]
 8003144:	60da      	str	r2, [r3, #12]
    uint32_t arraySize      = 0;
 8003146:	2300      	movs	r3, #0
 8003148:	64bb      	str	r3, [r7, #72]	@ 0x48
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 800314a:	2300      	movs	r3, #0
 800314c:	66bb      	str	r3, [r7, #104]	@ 0x68
 800314e:	e193      	b.n	8003478 <MqttMessageArrived+0x3e0>
        spCommand  = spUnknown;
 8003150:	230f      	movs	r3, #15
 8003152:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
        objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8003156:	4a9c      	ldr	r2, [pc, #624]	@ (80033c8 <MqttMessageArrived+0x330>)
 8003158:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800315a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 800315e:	4619      	mov	r1, r3
 8003160:	6d38      	ldr	r0, [r7, #80]	@ 0x50
 8003162:	f7fe fd61 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8003166:	64f8      	str	r0, [r7, #76]	@ 0x4c
        if (objectItem != NULL) {
 8003168:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800316a:	2b00      	cmp	r3, #0
 800316c:	f000 8181 	beq.w	8003472 <MqttMessageArrived+0x3da>
            switch (topicCmdNumber) {
 8003170:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 8003172:	2b0d      	cmp	r3, #13
 8003174:	f200 8120 	bhi.w	80033b8 <MqttMessageArrived+0x320>
 8003178:	a201      	add	r2, pc, #4	@ (adr r2, 8003180 <MqttMessageArrived+0xe8>)
 800317a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800317e:	bf00      	nop
 8003180:	080031b9 	.word	0x080031b9
 8003184:	080031bf 	.word	0x080031bf
 8003188:	080031cd 	.word	0x080031cd
 800318c:	0800323d 	.word	0x0800323d
 8003190:	0800324d 	.word	0x0800324d
 8003194:	08003253 	.word	0x08003253
 8003198:	0800327d 	.word	0x0800327d
 800319c:	08003283 	.word	0x08003283
 80031a0:	080032ef 	.word	0x080032ef
 80031a4:	08003309 	.word	0x08003309
 80031a8:	08003323 	.word	0x08003323
 80031ac:	08003329 	.word	0x08003329
 80031b0:	08003337 	.word	0x08003337
 80031b4:	08003345 	.word	0x08003345
            case fanSpeedTopic: spCommand = spSetFanSpeed;
 80031b8:	2302      	movs	r3, #2
 80031ba:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
            case motorXonTopic:
                if (spCommand == spUnknown) {
 80031be:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 80031c2:	2b0f      	cmp	r3, #15
 80031c4:	d102      	bne.n	80031cc <MqttMessageArrived+0x134>
                    spCommand = spSetMotorXOn;
 80031c6:	2303      	movs	r3, #3
 80031c8:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
            case motorYonTopic:
                if (spCommand == spUnknown) {
 80031cc:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 80031d0:	2b0f      	cmp	r3, #15
 80031d2:	d102      	bne.n	80031da <MqttMessageArrived+0x142>
                    spCommand = spSetMotorYOn;
 80031d4:	2304      	movs	r3, #4
 80031d6:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
                if (cJSON_IsArray (objectItem)) {
 80031da:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80031dc:	f7fe fd4a 	bl	8001c74 <cJSON_IsArray>
 80031e0:	4603      	mov	r3, r0
 80031e2:	2b00      	cmp	r3, #0
 80031e4:	f000 80ea 	beq.w	80033bc <MqttMessageArrived+0x324>
                    data.spCommand = spCommand;
 80031e8:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 80031ec:	733b      	strb	r3, [r7, #12]
                    arraySize      = cJSON_GetArraySize (objectItem);
 80031ee:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80031f0:	f7fe fc7a 	bl	8001ae8 <cJSON_GetArraySize>
 80031f4:	4603      	mov	r3, r0
 80031f6:	64bb      	str	r3, [r7, #72]	@ 0x48
                    if (arraySize == 2) {
 80031f8:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80031fa:	2b02      	cmp	r3, #2
 80031fc:	f040 80de 	bne.w	80033bc <MqttMessageArrived+0x324>
                        for (int i = 0; i < arraySize; i++) {
 8003200:	2300      	movs	r3, #0
 8003202:	667b      	str	r3, [r7, #100]	@ 0x64
 8003204:	e015      	b.n	8003232 <MqttMessageArrived+0x19a>
                            cJSON* item = cJSON_GetArrayItem (objectItem, i);
 8003206:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 8003208:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 800320a:	f7fe fcb1 	bl	8001b70 <cJSON_GetArrayItem>
 800320e:	63f8      	str	r0, [r7, #60]	@ 0x3c
                            if (cJSON_IsNumber (item)) {
 8003210:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 8003212:	f7fe fd18 	bl	8001c46 <cJSON_IsNumber>
 8003216:	4603      	mov	r3, r0
 8003218:	2b00      	cmp	r3, #0
 800321a:	d007      	beq.n	800322c <MqttMessageArrived+0x194>
                                data.values.integerValues.value[i] = item->valueint;
 800321c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800321e:	695a      	ldr	r2, [r3, #20]
 8003220:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 8003222:	009b      	lsls	r3, r3, #2
 8003224:	3370      	adds	r3, #112	@ 0x70
 8003226:	443b      	add	r3, r7
 8003228:	f843 2c60 	str.w	r2, [r3, #-96]
                        for (int i = 0; i < arraySize; i++) {
 800322c:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800322e:	3301      	adds	r3, #1
 8003230:	667b      	str	r3, [r7, #100]	@ 0x64
 8003232:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 8003234:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8003236:	429a      	cmp	r2, r3
 8003238:	d8e5      	bhi.n	8003206 <MqttMessageArrived+0x16e>
                            }
                        }
                    }
                }
                break;
 800323a:	e0bf      	b.n	80033bc <MqttMessageArrived+0x324>
            case diodeTopic:
                data.spCommand                     = spSetDiodeOn;
 800323c:	2307      	movs	r3, #7
 800323e:	733b      	strb	r3, [r7, #12]
                data.values.integerValues.value[0] = objectItem->valueint;
 8003240:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8003242:	695b      	ldr	r3, [r3, #20]
 8003244:	613b      	str	r3, [r7, #16]
                data.values.integerValues.value[1] = 0;
 8003246:	2300      	movs	r3, #0
 8003248:	617b      	str	r3, [r7, #20]
                break;
 800324a:	e0c0      	b.n	80033ce <MqttMessageArrived+0x336>
            case motorXMaxCurrentTopic: spCommand = spSetmotorXMaxCurrent;
 800324c:	2305      	movs	r3, #5
 800324e:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
            case motorYMaxCurrentTopic:
                if (spCommand == spUnknown) {
 8003252:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003256:	2b0f      	cmp	r3, #15
 8003258:	d102      	bne.n	8003260 <MqttMessageArrived+0x1c8>
                    spCommand = spSetmotorYMaxCurrent;
 800325a:	2306      	movs	r3, #6
 800325c:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
                data.spCommand                   = spCommand;
 8003260:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003264:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003266:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8003268:	ed93 7b06 	vldr	d7, [r3, #24]
 800326c:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8003270:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0.0;
 8003274:	f04f 0300 	mov.w	r3, #0
 8003278:	617b      	str	r3, [r7, #20]
                break;
 800327a:	e0a8      	b.n	80033ce <MqttMessageArrived+0x336>
            case clearPeakElectricalMeasurementsTopic: data.spCommand = spClearPeakMeasurments; break;
 800327c:	2308      	movs	r3, #8
 800327e:	733b      	strb	r3, [r7, #12]
 8003280:	e0a5      	b.n	80033ce <MqttMessageArrived+0x336>
            case mainBoardRelayTopic:
                if (cJSON_IsArray (objectItem)) {
 8003282:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003284:	f7fe fcf6 	bl	8001c74 <cJSON_IsArray>
 8003288:	4603      	mov	r3, r0
 800328a:	2b00      	cmp	r3, #0
 800328c:	f000 8098 	beq.w	80033c0 <MqttMessageArrived+0x328>
                    arraySize = cJSON_GetArraySize (objectItem);
 8003290:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003292:	f7fe fc29 	bl	8001ae8 <cJSON_GetArraySize>
 8003296:	4603      	mov	r3, r0
 8003298:	64bb      	str	r3, [r7, #72]	@ 0x48
                    if (arraySize == 2) {
 800329a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800329c:	2b02      	cmp	r3, #2
 800329e:	f040 808f 	bne.w	80033c0 <MqttMessageArrived+0x328>
                        int32_t relayNumber = -1;
 80032a2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80032a6:	663b      	str	r3, [r7, #96]	@ 0x60
                        cJSON* item         = cJSON_GetArrayItem (objectItem, 0);
 80032a8:	2100      	movs	r1, #0
 80032aa:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80032ac:	f7fe fc60 	bl	8001b70 <cJSON_GetArrayItem>
 80032b0:	6438      	str	r0, [r7, #64]	@ 0x40
                        if (cJSON_IsNumber (item)) {
 80032b2:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 80032b4:	f7fe fcc7 	bl	8001c46 <cJSON_IsNumber>
 80032b8:	4603      	mov	r3, r0
 80032ba:	2b00      	cmp	r3, #0
 80032bc:	d002      	beq.n	80032c4 <MqttMessageArrived+0x22c>
                            relayNumber = item->valueint;
 80032be:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80032c0:	695b      	ldr	r3, [r3, #20]
 80032c2:	663b      	str	r3, [r7, #96]	@ 0x60
                        }
                        int32_t relayTimeOn = 0;
 80032c4:	2300      	movs	r3, #0
 80032c6:	65fb      	str	r3, [r7, #92]	@ 0x5c
                        item                = cJSON_GetArrayItem (objectItem, 1);
 80032c8:	2101      	movs	r1, #1
 80032ca:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80032cc:	f7fe fc50 	bl	8001b70 <cJSON_GetArrayItem>
 80032d0:	6438      	str	r0, [r7, #64]	@ 0x40
                        if (cJSON_IsNumber (item)) {
 80032d2:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 80032d4:	f7fe fcb7 	bl	8001c46 <cJSON_IsNumber>
 80032d8:	4603      	mov	r3, r0
 80032da:	2b00      	cmp	r3, #0
 80032dc:	d002      	beq.n	80032e4 <MqttMessageArrived+0x24c>
                            relayTimeOn = item->valueint;
 80032de:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80032e0:	695b      	ldr	r3, [r3, #20]
 80032e2:	65fb      	str	r3, [r7, #92]	@ 0x5c
                        }
                        RelayCtrl (relayNumber, relayTimeOn);
 80032e4:	6df9      	ldr	r1, [r7, #92]	@ 0x5c
 80032e6:	6e38      	ldr	r0, [r7, #96]	@ 0x60
 80032e8:	f7ff fe24 	bl	8002f34 <RelayCtrl>
                    }
                }
                break;
 80032ec:	e068      	b.n	80033c0 <MqttMessageArrived+0x328>
            case setEncoderXValue:
                data.spCommand                   = spSetEncoderXValue;
 80032ee:	2309      	movs	r3, #9
 80032f0:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 80032f2:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 80032f4:	ed93 7b06 	vldr	d7, [r3, #24]
 80032f8:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80032fc:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0;
 8003300:	f04f 0300 	mov.w	r3, #0
 8003304:	617b      	str	r3, [r7, #20]
                break;
 8003306:	e062      	b.n	80033ce <MqttMessageArrived+0x336>
            case setEncoderYValue:
                data.spCommand                   = spSetEncoderYValue;
 8003308:	230a      	movs	r3, #10
 800330a:	733b      	strb	r3, [r7, #12]
                data.values.flaotValues.value[0] = objectItem->valuedouble;
 800330c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800330e:	ed93 7b06 	vldr	d7, [r3, #24]
 8003312:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8003316:	edc7 7a04 	vstr	s15, [r7, #16]
                data.values.flaotValues.value[1] = 0;
 800331a:	f04f 0300 	mov.w	r3, #0
 800331e:	617b      	str	r3, [r7, #20]
                break;
 8003320:	e055      	b.n	80033ce <MqttMessageArrived+0x336>
            case setVoltageMeasGains:
            	spCommand = spSetVoltageMeasGains;
 8003322:	230b      	movs	r3, #11
 8003324:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
            case setVoltageMeasOffsets:
                if (spCommand == spUnknown) {
 8003328:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 800332c:	2b0f      	cmp	r3, #15
 800332e:	d102      	bne.n	8003336 <MqttMessageArrived+0x29e>
                    spCommand = spSetVoltageMeasOffsets;
 8003330:	230c      	movs	r3, #12
 8003332:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
            case setCurrentMeasGains:
                if (spCommand == spUnknown) {
 8003336:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 800333a:	2b0f      	cmp	r3, #15
 800333c:	d102      	bne.n	8003344 <MqttMessageArrived+0x2ac>
                    spCommand = spSetCurrentMeasGains;
 800333e:	230d      	movs	r3, #13
 8003340:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
            case setCurrentMeasOffsets:
                if (spCommand == spUnknown) {
 8003344:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003348:	2b0f      	cmp	r3, #15
 800334a:	d102      	bne.n	8003352 <MqttMessageArrived+0x2ba>
                    spCommand = spSetCurrentMeasOffsets;
 800334c:	230e      	movs	r3, #14
 800334e:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                }
                if (cJSON_IsArray (objectItem)) {
 8003352:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003354:	f7fe fc8e 	bl	8001c74 <cJSON_IsArray>
 8003358:	4603      	mov	r3, r0
 800335a:	2b00      	cmp	r3, #0
 800335c:	d036      	beq.n	80033cc <MqttMessageArrived+0x334>
                    data.spCommand = spCommand;
 800335e:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003362:	733b      	strb	r3, [r7, #12]
                    arraySize      = cJSON_GetArraySize (objectItem);
 8003364:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003366:	f7fe fbbf 	bl	8001ae8 <cJSON_GetArraySize>
 800336a:	4603      	mov	r3, r0
 800336c:	64bb      	str	r3, [r7, #72]	@ 0x48
                    if (arraySize == 3) {
 800336e:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8003370:	2b03      	cmp	r3, #3
 8003372:	d12b      	bne.n	80033cc <MqttMessageArrived+0x334>
                        for (int i = 0; i < arraySize; i++) {
 8003374:	2300      	movs	r3, #0
 8003376:	65bb      	str	r3, [r7, #88]	@ 0x58
 8003378:	e019      	b.n	80033ae <MqttMessageArrived+0x316>
                            cJSON* item = cJSON_GetArrayItem (objectItem, i);
 800337a:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800337c:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 800337e:	f7fe fbf7 	bl	8001b70 <cJSON_GetArrayItem>
 8003382:	6478      	str	r0, [r7, #68]	@ 0x44
                            if (cJSON_IsNumber (item)) {
 8003384:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 8003386:	f7fe fc5e 	bl	8001c46 <cJSON_IsNumber>
 800338a:	4603      	mov	r3, r0
 800338c:	2b00      	cmp	r3, #0
 800338e:	d00b      	beq.n	80033a8 <MqttMessageArrived+0x310>
                                data.values.flaotValues.value[i] = item->valuedouble;
 8003390:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8003392:	ed93 7b06 	vldr	d7, [r3, #24]
 8003396:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800339a:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800339c:	009b      	lsls	r3, r3, #2
 800339e:	3370      	adds	r3, #112	@ 0x70
 80033a0:	443b      	add	r3, r7
 80033a2:	3b60      	subs	r3, #96	@ 0x60
 80033a4:	edc3 7a00 	vstr	s15, [r3]
                        for (int i = 0; i < arraySize; i++) {
 80033a8:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 80033aa:	3301      	adds	r3, #1
 80033ac:	65bb      	str	r3, [r7, #88]	@ 0x58
 80033ae:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 80033b0:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 80033b2:	429a      	cmp	r2, r3
 80033b4:	d8e1      	bhi.n	800337a <MqttMessageArrived+0x2e2>
                            }
                        }
                    }
                }
            	break;
 80033b6:	e009      	b.n	80033cc <MqttMessageArrived+0x334>
            default: break;
 80033b8:	bf00      	nop
 80033ba:	e008      	b.n	80033ce <MqttMessageArrived+0x336>
                break;
 80033bc:	bf00      	nop
 80033be:	e006      	b.n	80033ce <MqttMessageArrived+0x336>
                break;
 80033c0:	bf00      	nop
 80033c2:	e004      	b.n	80033ce <MqttMessageArrived+0x336>
 80033c4:	080318d8 	.word	0x080318d8
 80033c8:	080318ec 	.word	0x080318ec
            	break;
 80033cc:	bf00      	nop
            }

            switch (topicForBoard) {
 80033ce:	f897 306e 	ldrb.w	r3, [r7, #110]	@ 0x6e
 80033d2:	2b04      	cmp	r3, #4
 80033d4:	d84c      	bhi.n	8003470 <MqttMessageArrived+0x3d8>
 80033d6:	a201      	add	r2, pc, #4	@ (adr r2, 80033dc <MqttMessageArrived+0x344>)
 80033d8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80033dc:	08003471 	.word	0x08003471
 80033e0:	080033f1 	.word	0x080033f1
 80033e4:	08003411 	.word	0x08003411
 80033e8:	08003431 	.word	0x08003431
 80033ec:	08003451 	.word	0x08003451
            case main_board: break;
            case board_1:
                if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
 80033f0:	4b2c      	ldr	r3, [pc, #176]	@ (80034a4 <MqttMessageArrived+0x40c>)
 80033f2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80033f4:	2b00      	cmp	r3, #0
 80033f6:	d007      	beq.n	8003408 <MqttMessageArrived+0x370>
                    osMessageQueuePut (uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 80033f8:	4b2a      	ldr	r3, [pc, #168]	@ (80034a4 <MqttMessageArrived+0x40c>)
 80033fa:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80033fc:	f107 010c 	add.w	r1, r7, #12
 8003400:	2364      	movs	r3, #100	@ 0x64
 8003402:	2200      	movs	r2, #0
 8003404:	f00e fb7c 	bl	8011b00 <osMessageQueuePut>
                }
                printf ("Send cmd to board 1\n");
 8003408:	4827      	ldr	r0, [pc, #156]	@ (80034a8 <MqttMessageArrived+0x410>)
 800340a:	f027 fa0f 	bl	802a82c <puts>
                break;
 800340e:	e030      	b.n	8003472 <MqttMessageArrived+0x3da>
            case board_2:
                if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
 8003410:	4b26      	ldr	r3, [pc, #152]	@ (80034ac <MqttMessageArrived+0x414>)
 8003412:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003414:	2b00      	cmp	r3, #0
 8003416:	d007      	beq.n	8003428 <MqttMessageArrived+0x390>
                    osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003418:	4b24      	ldr	r3, [pc, #144]	@ (80034ac <MqttMessageArrived+0x414>)
 800341a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800341c:	f107 010c 	add.w	r1, r7, #12
 8003420:	2364      	movs	r3, #100	@ 0x64
 8003422:	2200      	movs	r2, #0
 8003424:	f00e fb6c 	bl	8011b00 <osMessageQueuePut>
                }
                printf ("Send cmd to board 2\n");
 8003428:	4821      	ldr	r0, [pc, #132]	@ (80034b0 <MqttMessageArrived+0x418>)
 800342a:	f027 f9ff 	bl	802a82c <puts>
                break;
 800342e:	e020      	b.n	8003472 <MqttMessageArrived+0x3da>
            case board_3:
                if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
 8003430:	4b20      	ldr	r3, [pc, #128]	@ (80034b4 <MqttMessageArrived+0x41c>)
 8003432:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003434:	2b00      	cmp	r3, #0
 8003436:	d007      	beq.n	8003448 <MqttMessageArrived+0x3b0>
                    osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003438:	4b1e      	ldr	r3, [pc, #120]	@ (80034b4 <MqttMessageArrived+0x41c>)
 800343a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800343c:	f107 010c 	add.w	r1, r7, #12
 8003440:	2364      	movs	r3, #100	@ 0x64
 8003442:	2200      	movs	r2, #0
 8003444:	f00e fb5c 	bl	8011b00 <osMessageQueuePut>
                }
                printf ("Send cmd to board 3\n");
 8003448:	481b      	ldr	r0, [pc, #108]	@ (80034b8 <MqttMessageArrived+0x420>)
 800344a:	f027 f9ef 	bl	802a82c <puts>
                break;
 800344e:	e010      	b.n	8003472 <MqttMessageArrived+0x3da>
            case board_4:
                if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
 8003450:	4b1a      	ldr	r3, [pc, #104]	@ (80034bc <MqttMessageArrived+0x424>)
 8003452:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8003454:	2b00      	cmp	r3, #0
 8003456:	d007      	beq.n	8003468 <MqttMessageArrived+0x3d0>
                    osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003458:	4b18      	ldr	r3, [pc, #96]	@ (80034bc <MqttMessageArrived+0x424>)
 800345a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800345c:	f107 010c 	add.w	r1, r7, #12
 8003460:	2364      	movs	r3, #100	@ 0x64
 8003462:	2200      	movs	r2, #0
 8003464:	f00e fb4c 	bl	8011b00 <osMessageQueuePut>
                }
                printf ("Send cmd to board 4\n");
 8003468:	4815      	ldr	r0, [pc, #84]	@ (80034c0 <MqttMessageArrived+0x428>)
 800346a:	f027 f9df 	bl	802a82c <puts>
                break;
 800346e:	e000      	b.n	8003472 <MqttMessageArrived+0x3da>
            default: break;
 8003470:	bf00      	nop
    for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 8003472:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 8003474:	3301      	adds	r3, #1
 8003476:	66bb      	str	r3, [r7, #104]	@ 0x68
 8003478:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800347a:	2b0d      	cmp	r3, #13
 800347c:	f77f ae68 	ble.w	8003150 <MqttMessageArrived+0xb8>
            }
        }
    }
    cJSON_Delete (json);
 8003480:	6d38      	ldr	r0, [r7, #80]	@ 0x50
 8003482:	f7fd fb83 	bl	8000b8c <cJSON_Delete>
    printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
 8003486:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8003488:	68db      	ldr	r3, [r3, #12]
 800348a:	461a      	mov	r2, r3
 800348c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800348e:	689b      	ldr	r3, [r3, #8]
 8003490:	f107 011c 	add.w	r1, r7, #28
 8003494:	480b      	ldr	r0, [pc, #44]	@ (80034c4 <MqttMessageArrived+0x42c>)
 8003496:	f027 f961 	bl	802a75c <iprintf>
}
 800349a:	bf00      	nop
 800349c:	3770      	adds	r7, #112	@ 0x70
 800349e:	46bd      	mov	sp, r7
 80034a0:	bd80      	pop	{r7, pc}
 80034a2:	bf00      	nop
 80034a4:	24001eec 	.word	0x24001eec
 80034a8:	0802d75c 	.word	0x0802d75c
 80034ac:	24001f24 	.word	0x24001f24
 80034b0:	0802d770 	.word	0x0802d770
 80034b4:	24001f5c 	.word	0x24001f5c
 80034b8:	0802d784 	.word	0x0802d784
 80034bc:	24001f94 	.word	0x24001f94
 80034c0:	0802d798 	.word	0x0802d798
 80034c4:	0802d7ac 	.word	0x0802d7ac

080034c8 <mqtt_cli_init>:

void mqtt_cli_init (void) {
 80034c8:	b580      	push	{r7, lr}
 80034ca:	af00      	add	r7, sp, #0
    mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
 80034cc:	4a08      	ldr	r2, [pc, #32]	@ (80034f0 <mqtt_cli_init+0x28>)
 80034ce:	2100      	movs	r1, #0
 80034d0:	4808      	ldr	r0, [pc, #32]	@ (80034f4 <mqtt_cli_init+0x2c>)
 80034d2:	f00d fea0 	bl	8011216 <osThreadNew>
 80034d6:	4603      	mov	r3, r0
 80034d8:	4a07      	ldr	r2, [pc, #28]	@ (80034f8 <mqtt_cli_init+0x30>)
 80034da:	6013      	str	r3, [r2, #0]
    mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
 80034dc:	4a07      	ldr	r2, [pc, #28]	@ (80034fc <mqtt_cli_init+0x34>)
 80034de:	2100      	movs	r1, #0
 80034e0:	4807      	ldr	r0, [pc, #28]	@ (8003500 <mqtt_cli_init+0x38>)
 80034e2:	f00d fe98 	bl	8011216 <osThreadNew>
 80034e6:	4603      	mov	r3, r0
 80034e8:	4a06      	ldr	r2, [pc, #24]	@ (8003504 <mqtt_cli_init+0x3c>)
 80034ea:	6013      	str	r3, [r2, #0]
}
 80034ec:	bf00      	nop
 80034ee:	bd80      	pop	{r7, pc}
 80034f0:	08031924 	.word	0x08031924
 80034f4:	080026a5 	.word	0x080026a5
 80034f8:	24000718 	.word	0x24000718
 80034fc:	08031948 	.word	0x08031948
 8003500:	08002715 	.word	0x08002715
 8003504:	2400071c 	.word	0x2400071c

08003508 <WriteDataToBuffer>:
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
    }
    *buffPos = newBuffPos;
}

void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
 8003508:	b480      	push	{r7}
 800350a:	b089      	sub	sp, #36	@ 0x24
 800350c:	af00      	add	r7, sp, #0
 800350e:	60f8      	str	r0, [r7, #12]
 8003510:	60b9      	str	r1, [r7, #8]
 8003512:	607a      	str	r2, [r7, #4]
 8003514:	70fb      	strb	r3, [r7, #3]
    uint32_t* uDataPtr = data;
 8003516:	687b      	ldr	r3, [r7, #4]
 8003518:	61bb      	str	r3, [r7, #24]
    uint32_t uData     = *uDataPtr;
 800351a:	69bb      	ldr	r3, [r7, #24]
 800351c:	681b      	ldr	r3, [r3, #0]
 800351e:	617b      	str	r3, [r7, #20]
    uint8_t i          = 0;
 8003520:	2300      	movs	r3, #0
 8003522:	77fb      	strb	r3, [r7, #31]
    uint8_t newBuffPos = *buffPos;
 8003524:	68bb      	ldr	r3, [r7, #8]
 8003526:	881b      	ldrh	r3, [r3, #0]
 8003528:	77bb      	strb	r3, [r7, #30]
    for (i = 0; i < dataSize; i++) {
 800352a:	2300      	movs	r3, #0
 800352c:	77fb      	strb	r3, [r7, #31]
 800352e:	e00e      	b.n	800354e <WriteDataToBuffer+0x46>
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
 8003530:	7ffb      	ldrb	r3, [r7, #31]
 8003532:	00db      	lsls	r3, r3, #3
 8003534:	697a      	ldr	r2, [r7, #20]
 8003536:	40da      	lsrs	r2, r3
 8003538:	7fbb      	ldrb	r3, [r7, #30]
 800353a:	1c59      	adds	r1, r3, #1
 800353c:	77b9      	strb	r1, [r7, #30]
 800353e:	4619      	mov	r1, r3
 8003540:	68fb      	ldr	r3, [r7, #12]
 8003542:	440b      	add	r3, r1
 8003544:	b2d2      	uxtb	r2, r2
 8003546:	701a      	strb	r2, [r3, #0]
    for (i = 0; i < dataSize; i++) {
 8003548:	7ffb      	ldrb	r3, [r7, #31]
 800354a:	3301      	adds	r3, #1
 800354c:	77fb      	strb	r3, [r7, #31]
 800354e:	7ffa      	ldrb	r2, [r7, #31]
 8003550:	78fb      	ldrb	r3, [r7, #3]
 8003552:	429a      	cmp	r2, r3
 8003554:	d3ec      	bcc.n	8003530 <WriteDataToBuffer+0x28>
    }
    *buffPos = newBuffPos;
 8003556:	7fbb      	ldrb	r3, [r7, #30]
 8003558:	b29a      	uxth	r2, r3
 800355a:	68bb      	ldr	r3, [r7, #8]
 800355c:	801a      	strh	r2, [r3, #0]
}
 800355e:	bf00      	nop
 8003560:	3724      	adds	r7, #36	@ 0x24
 8003562:	46bd      	mov	sp, r7
 8003564:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003568:	4770      	bx	lr

0800356a <ReadFloatFromBuffer>:

void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
 800356a:	b480      	push	{r7}
 800356c:	b087      	sub	sp, #28
 800356e:	af00      	add	r7, sp, #0
 8003570:	60f8      	str	r0, [r7, #12]
 8003572:	60b9      	str	r1, [r7, #8]
 8003574:	607a      	str	r2, [r7, #4]
	uint32_t* word =  (uint32_t *)data;
 8003576:	687b      	ldr	r3, [r7, #4]
 8003578:	617b      	str	r3, [r7, #20]
	*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
 800357a:	68bb      	ldr	r3, [r7, #8]
 800357c:	881b      	ldrh	r3, [r3, #0]
 800357e:	3303      	adds	r3, #3
 8003580:	68fa      	ldr	r2, [r7, #12]
 8003582:	4413      	add	r3, r2
 8003584:	781b      	ldrb	r3, [r3, #0]
 8003586:	061a      	lsls	r2, r3, #24
 8003588:	68bb      	ldr	r3, [r7, #8]
 800358a:	881b      	ldrh	r3, [r3, #0]
 800358c:	3302      	adds	r3, #2
 800358e:	68f9      	ldr	r1, [r7, #12]
 8003590:	440b      	add	r3, r1
 8003592:	781b      	ldrb	r3, [r3, #0]
 8003594:	041b      	lsls	r3, r3, #16
 8003596:	431a      	orrs	r2, r3
 8003598:	68bb      	ldr	r3, [r7, #8]
 800359a:	881b      	ldrh	r3, [r3, #0]
 800359c:	3301      	adds	r3, #1
 800359e:	68f9      	ldr	r1, [r7, #12]
 80035a0:	440b      	add	r3, r1
 80035a2:	781b      	ldrb	r3, [r3, #0]
 80035a4:	021b      	lsls	r3, r3, #8
 80035a6:	4313      	orrs	r3, r2
 80035a8:	68ba      	ldr	r2, [r7, #8]
 80035aa:	8812      	ldrh	r2, [r2, #0]
 80035ac:	4611      	mov	r1, r2
 80035ae:	68fa      	ldr	r2, [r7, #12]
 80035b0:	440a      	add	r2, r1
 80035b2:	7812      	ldrb	r2, [r2, #0]
 80035b4:	4313      	orrs	r3, r2
 80035b6:	461a      	mov	r2, r3
 80035b8:	697b      	ldr	r3, [r7, #20]
 80035ba:	601a      	str	r2, [r3, #0]
	*buffPos += sizeof(float);
 80035bc:	68bb      	ldr	r3, [r7, #8]
 80035be:	881b      	ldrh	r3, [r3, #0]
 80035c0:	3304      	adds	r3, #4
 80035c2:	b29a      	uxth	r2, r3
 80035c4:	68bb      	ldr	r3, [r7, #8]
 80035c6:	801a      	strh	r2, [r3, #0]
}
 80035c8:	bf00      	nop
 80035ca:	371c      	adds	r7, #28
 80035cc:	46bd      	mov	sp, r7
 80035ce:	f85d 7b04 	ldr.w	r7, [sp], #4
 80035d2:	4770      	bx	lr

080035d4 <ReadByteFromBufer>:
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
	*buffPos += sizeof(uint32_t);
}

void ReadByteFromBufer(uint8_t* buff, uint16_t* buffPos, uint8_t* data)
{
 80035d4:	b480      	push	{r7}
 80035d6:	b085      	sub	sp, #20
 80035d8:	af00      	add	r7, sp, #0
 80035da:	60f8      	str	r0, [r7, #12]
 80035dc:	60b9      	str	r1, [r7, #8]
 80035de:	607a      	str	r2, [r7, #4]
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
 80035e0:	68bb      	ldr	r3, [r7, #8]
 80035e2:	881b      	ldrh	r3, [r3, #0]
 80035e4:	3301      	adds	r3, #1
 80035e6:	68fa      	ldr	r2, [r7, #12]
 80035e8:	4413      	add	r3, r2
 80035ea:	781b      	ldrb	r3, [r3, #0]
 80035ec:	021b      	lsls	r3, r3, #8
 80035ee:	b25a      	sxtb	r2, r3
 80035f0:	68bb      	ldr	r3, [r7, #8]
 80035f2:	881b      	ldrh	r3, [r3, #0]
 80035f4:	4619      	mov	r1, r3
 80035f6:	68fb      	ldr	r3, [r7, #12]
 80035f8:	440b      	add	r3, r1
 80035fa:	781b      	ldrb	r3, [r3, #0]
 80035fc:	b25b      	sxtb	r3, r3
 80035fe:	4313      	orrs	r3, r2
 8003600:	b25b      	sxtb	r3, r3
 8003602:	b2da      	uxtb	r2, r3
 8003604:	687b      	ldr	r3, [r7, #4]
 8003606:	701a      	strb	r2, [r3, #0]
	*buffPos += sizeof(uint8_t);
 8003608:	68bb      	ldr	r3, [r7, #8]
 800360a:	881b      	ldrh	r3, [r3, #0]
 800360c:	3301      	adds	r3, #1
 800360e:	b29a      	uxth	r2, r3
 8003610:	68bb      	ldr	r3, [r7, #8]
 8003612:	801a      	strh	r2, [r3, #0]
}
 8003614:	bf00      	nop
 8003616:	3714      	adds	r7, #20
 8003618:	46bd      	mov	sp, r7
 800361a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800361e:	4770      	bx	lr

08003620 <PrepareReqFrame>:

uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
 8003620:	b580      	push	{r7, lr}
 8003622:	b086      	sub	sp, #24
 8003624:	af00      	add	r7, sp, #0
 8003626:	60f8      	str	r0, [r7, #12]
 8003628:	607b      	str	r3, [r7, #4]
 800362a:	460b      	mov	r3, r1
 800362c:	817b      	strh	r3, [r7, #10]
 800362e:	4613      	mov	r3, r2
 8003630:	727b      	strb	r3, [r7, #9]
    uint16_t crc         = 0;
 8003632:	2300      	movs	r3, #0
 8003634:	82bb      	strh	r3, [r7, #20]
    uint16_t txBufferPos = 0;
 8003636:	2300      	movs	r3, #0
 8003638:	82fb      	strh	r3, [r7, #22]
    uint16_t frameCmd    = ((uint16_t)frameCommand);
 800363a:	7a7b      	ldrb	r3, [r7, #9]
 800363c:	827b      	strh	r3, [r7, #18]

    memset (txBuffer, 0x00, dataLength);
 800363e:	8c3b      	ldrh	r3, [r7, #32]
 8003640:	461a      	mov	r2, r3
 8003642:	2100      	movs	r1, #0
 8003644:	68f8      	ldr	r0, [r7, #12]
 8003646:	f027 fa1b 	bl	802aa80 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 800364a:	8afb      	ldrh	r3, [r7, #22]
 800364c:	1c5a      	adds	r2, r3, #1
 800364e:	82fa      	strh	r2, [r7, #22]
 8003650:	461a      	mov	r2, r3
 8003652:	68fb      	ldr	r3, [r7, #12]
 8003654:	4413      	add	r3, r2
 8003656:	22aa      	movs	r2, #170	@ 0xaa
 8003658:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 800365a:	8afb      	ldrh	r3, [r7, #22]
 800365c:	1c5a      	adds	r2, r3, #1
 800365e:	82fa      	strh	r2, [r7, #22]
 8003660:	461a      	mov	r2, r3
 8003662:	68fb      	ldr	r3, [r7, #12]
 8003664:	4413      	add	r3, r2
 8003666:	897a      	ldrh	r2, [r7, #10]
 8003668:	b2d2      	uxtb	r2, r2
 800366a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 800366c:	897b      	ldrh	r3, [r7, #10]
 800366e:	0a1b      	lsrs	r3, r3, #8
 8003670:	b29a      	uxth	r2, r3
 8003672:	8afb      	ldrh	r3, [r7, #22]
 8003674:	1c59      	adds	r1, r3, #1
 8003676:	82f9      	strh	r1, [r7, #22]
 8003678:	4619      	mov	r1, r3
 800367a:	68fb      	ldr	r3, [r7, #12]
 800367c:	440b      	add	r3, r1
 800367e:	b2d2      	uxtb	r2, r2
 8003680:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 8003682:	8afb      	ldrh	r3, [r7, #22]
 8003684:	1c5a      	adds	r2, r3, #1
 8003686:	82fa      	strh	r2, [r7, #22]
 8003688:	461a      	mov	r2, r3
 800368a:	68fb      	ldr	r3, [r7, #12]
 800368c:	4413      	add	r3, r2
 800368e:	8a7a      	ldrh	r2, [r7, #18]
 8003690:	b2d2      	uxtb	r2, r2
 8003692:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 8003694:	8a7b      	ldrh	r3, [r7, #18]
 8003696:	0a1b      	lsrs	r3, r3, #8
 8003698:	b29a      	uxth	r2, r3
 800369a:	8afb      	ldrh	r3, [r7, #22]
 800369c:	1c59      	adds	r1, r3, #1
 800369e:	82f9      	strh	r1, [r7, #22]
 80036a0:	4619      	mov	r1, r3
 80036a2:	68fb      	ldr	r3, [r7, #12]
 80036a4:	440b      	add	r3, r1
 80036a6:	b2d2      	uxtb	r2, r2
 80036a8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 80036aa:	8afb      	ldrh	r3, [r7, #22]
 80036ac:	1c5a      	adds	r2, r3, #1
 80036ae:	82fa      	strh	r2, [r7, #22]
 80036b0:	461a      	mov	r2, r3
 80036b2:	68fb      	ldr	r3, [r7, #12]
 80036b4:	4413      	add	r3, r2
 80036b6:	8c3a      	ldrh	r2, [r7, #32]
 80036b8:	b2d2      	uxtb	r2, r2
 80036ba:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 80036bc:	8c3b      	ldrh	r3, [r7, #32]
 80036be:	0a1b      	lsrs	r3, r3, #8
 80036c0:	b29a      	uxth	r2, r3
 80036c2:	8afb      	ldrh	r3, [r7, #22]
 80036c4:	1c59      	adds	r1, r3, #1
 80036c6:	82f9      	strh	r1, [r7, #22]
 80036c8:	4619      	mov	r1, r3
 80036ca:	68fb      	ldr	r3, [r7, #12]
 80036cc:	440b      	add	r3, r1
 80036ce:	b2d2      	uxtb	r2, r2
 80036d0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = 0x00;
 80036d2:	8afb      	ldrh	r3, [r7, #22]
 80036d4:	1c5a      	adds	r2, r3, #1
 80036d6:	82fa      	strh	r2, [r7, #22]
 80036d8:	461a      	mov	r2, r3
 80036da:	68fb      	ldr	r3, [r7, #12]
 80036dc:	4413      	add	r3, r2
 80036de:	2200      	movs	r2, #0
 80036e0:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 80036e2:	8c3b      	ldrh	r3, [r7, #32]
 80036e4:	2b00      	cmp	r3, #0
 80036e6:	d00b      	beq.n	8003700 <PrepareReqFrame+0xe0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 80036e8:	8afb      	ldrh	r3, [r7, #22]
 80036ea:	68fa      	ldr	r2, [r7, #12]
 80036ec:	4413      	add	r3, r2
 80036ee:	8c3a      	ldrh	r2, [r7, #32]
 80036f0:	6879      	ldr	r1, [r7, #4]
 80036f2:	4618      	mov	r0, r3
 80036f4:	f027 fabb 	bl	802ac6e <memcpy>
        txBufferPos += dataLength;
 80036f8:	8afa      	ldrh	r2, [r7, #22]
 80036fa:	8c3b      	ldrh	r3, [r7, #32]
 80036fc:	4413      	add	r3, r2
 80036fe:	82fb      	strh	r3, [r7, #22]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003700:	8afb      	ldrh	r3, [r7, #22]
 8003702:	461a      	mov	r2, r3
 8003704:	68f9      	ldr	r1, [r7, #12]
 8003706:	480f      	ldr	r0, [pc, #60]	@ (8003744 <PrepareReqFrame+0x124>)
 8003708:	f002 f9d0 	bl	8005aac <HAL_CRC_Calculate>
 800370c:	4603      	mov	r3, r0
 800370e:	82bb      	strh	r3, [r7, #20]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003710:	8afb      	ldrh	r3, [r7, #22]
 8003712:	1c5a      	adds	r2, r3, #1
 8003714:	82fa      	strh	r2, [r7, #22]
 8003716:	461a      	mov	r2, r3
 8003718:	68fb      	ldr	r3, [r7, #12]
 800371a:	4413      	add	r3, r2
 800371c:	8aba      	ldrh	r2, [r7, #20]
 800371e:	b2d2      	uxtb	r2, r2
 8003720:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 8003722:	8abb      	ldrh	r3, [r7, #20]
 8003724:	0a1b      	lsrs	r3, r3, #8
 8003726:	b29a      	uxth	r2, r3
 8003728:	8afb      	ldrh	r3, [r7, #22]
 800372a:	1c59      	adds	r1, r3, #1
 800372c:	82f9      	strh	r1, [r7, #22]
 800372e:	4619      	mov	r1, r3
 8003730:	68fb      	ldr	r3, [r7, #12]
 8003732:	440b      	add	r3, r1
 8003734:	b2d2      	uxtb	r2, r2
 8003736:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003738:	8afb      	ldrh	r3, [r7, #22]
}
 800373a:	4618      	mov	r0, r3
 800373c:	3718      	adds	r7, #24
 800373e:	46bd      	mov	sp, r7
 8003740:	bd80      	pop	{r7, pc}
 8003742:	bf00      	nop
 8003744:	24000248 	.word	0x24000248

08003748 <PrepareRespFrame>:

uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
 8003748:	b580      	push	{r7, lr}
 800374a:	b084      	sub	sp, #16
 800374c:	af00      	add	r7, sp, #0
 800374e:	6078      	str	r0, [r7, #4]
 8003750:	4608      	mov	r0, r1
 8003752:	4611      	mov	r1, r2
 8003754:	461a      	mov	r2, r3
 8003756:	4603      	mov	r3, r0
 8003758:	807b      	strh	r3, [r7, #2]
 800375a:	460b      	mov	r3, r1
 800375c:	707b      	strb	r3, [r7, #1]
 800375e:	4613      	mov	r3, r2
 8003760:	703b      	strb	r3, [r7, #0]
    uint16_t crc         = 0;
 8003762:	2300      	movs	r3, #0
 8003764:	81bb      	strh	r3, [r7, #12]
    uint16_t txBufferPos = 0;
 8003766:	2300      	movs	r3, #0
 8003768:	81fb      	strh	r3, [r7, #14]
    uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
 800376a:	787b      	ldrb	r3, [r7, #1]
 800376c:	b21a      	sxth	r2, r3
 800376e:	4b43      	ldr	r3, [pc, #268]	@ (800387c <PrepareRespFrame+0x134>)
 8003770:	4313      	orrs	r3, r2
 8003772:	b21b      	sxth	r3, r3
 8003774:	817b      	strh	r3, [r7, #10]

    memset (txBuffer, 0x00, dataLength);
 8003776:	8bbb      	ldrh	r3, [r7, #28]
 8003778:	461a      	mov	r2, r3
 800377a:	2100      	movs	r1, #0
 800377c:	6878      	ldr	r0, [r7, #4]
 800377e:	f027 f97f 	bl	802aa80 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 8003782:	89fb      	ldrh	r3, [r7, #14]
 8003784:	1c5a      	adds	r2, r3, #1
 8003786:	81fa      	strh	r2, [r7, #14]
 8003788:	461a      	mov	r2, r3
 800378a:	687b      	ldr	r3, [r7, #4]
 800378c:	4413      	add	r3, r2
 800378e:	22aa      	movs	r2, #170	@ 0xaa
 8003790:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 8003792:	89fb      	ldrh	r3, [r7, #14]
 8003794:	1c5a      	adds	r2, r3, #1
 8003796:	81fa      	strh	r2, [r7, #14]
 8003798:	461a      	mov	r2, r3
 800379a:	687b      	ldr	r3, [r7, #4]
 800379c:	4413      	add	r3, r2
 800379e:	887a      	ldrh	r2, [r7, #2]
 80037a0:	b2d2      	uxtb	r2, r2
 80037a2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 80037a4:	887b      	ldrh	r3, [r7, #2]
 80037a6:	0a1b      	lsrs	r3, r3, #8
 80037a8:	b29a      	uxth	r2, r3
 80037aa:	89fb      	ldrh	r3, [r7, #14]
 80037ac:	1c59      	adds	r1, r3, #1
 80037ae:	81f9      	strh	r1, [r7, #14]
 80037b0:	4619      	mov	r1, r3
 80037b2:	687b      	ldr	r3, [r7, #4]
 80037b4:	440b      	add	r3, r1
 80037b6:	b2d2      	uxtb	r2, r2
 80037b8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 80037ba:	89fb      	ldrh	r3, [r7, #14]
 80037bc:	1c5a      	adds	r2, r3, #1
 80037be:	81fa      	strh	r2, [r7, #14]
 80037c0:	461a      	mov	r2, r3
 80037c2:	687b      	ldr	r3, [r7, #4]
 80037c4:	4413      	add	r3, r2
 80037c6:	897a      	ldrh	r2, [r7, #10]
 80037c8:	b2d2      	uxtb	r2, r2
 80037ca:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 80037cc:	897b      	ldrh	r3, [r7, #10]
 80037ce:	0a1b      	lsrs	r3, r3, #8
 80037d0:	b29a      	uxth	r2, r3
 80037d2:	89fb      	ldrh	r3, [r7, #14]
 80037d4:	1c59      	adds	r1, r3, #1
 80037d6:	81f9      	strh	r1, [r7, #14]
 80037d8:	4619      	mov	r1, r3
 80037da:	687b      	ldr	r3, [r7, #4]
 80037dc:	440b      	add	r3, r1
 80037de:	b2d2      	uxtb	r2, r2
 80037e0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 80037e2:	89fb      	ldrh	r3, [r7, #14]
 80037e4:	1c5a      	adds	r2, r3, #1
 80037e6:	81fa      	strh	r2, [r7, #14]
 80037e8:	461a      	mov	r2, r3
 80037ea:	687b      	ldr	r3, [r7, #4]
 80037ec:	4413      	add	r3, r2
 80037ee:	8bba      	ldrh	r2, [r7, #28]
 80037f0:	b2d2      	uxtb	r2, r2
 80037f2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 80037f4:	8bbb      	ldrh	r3, [r7, #28]
 80037f6:	0a1b      	lsrs	r3, r3, #8
 80037f8:	b29a      	uxth	r2, r3
 80037fa:	89fb      	ldrh	r3, [r7, #14]
 80037fc:	1c59      	adds	r1, r3, #1
 80037fe:	81f9      	strh	r1, [r7, #14]
 8003800:	4619      	mov	r1, r3
 8003802:	687b      	ldr	r3, [r7, #4]
 8003804:	440b      	add	r3, r1
 8003806:	b2d2      	uxtb	r2, r2
 8003808:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = (uint8_t)respStatus;
 800380a:	89fb      	ldrh	r3, [r7, #14]
 800380c:	1c5a      	adds	r2, r3, #1
 800380e:	81fa      	strh	r2, [r7, #14]
 8003810:	461a      	mov	r2, r3
 8003812:	687b      	ldr	r3, [r7, #4]
 8003814:	4413      	add	r3, r2
 8003816:	783a      	ldrb	r2, [r7, #0]
 8003818:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 800381a:	8bbb      	ldrh	r3, [r7, #28]
 800381c:	2b00      	cmp	r3, #0
 800381e:	d00b      	beq.n	8003838 <PrepareRespFrame+0xf0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 8003820:	89fb      	ldrh	r3, [r7, #14]
 8003822:	687a      	ldr	r2, [r7, #4]
 8003824:	4413      	add	r3, r2
 8003826:	8bba      	ldrh	r2, [r7, #28]
 8003828:	69b9      	ldr	r1, [r7, #24]
 800382a:	4618      	mov	r0, r3
 800382c:	f027 fa1f 	bl	802ac6e <memcpy>
        txBufferPos += dataLength;
 8003830:	89fa      	ldrh	r2, [r7, #14]
 8003832:	8bbb      	ldrh	r3, [r7, #28]
 8003834:	4413      	add	r3, r2
 8003836:	81fb      	strh	r3, [r7, #14]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003838:	89fb      	ldrh	r3, [r7, #14]
 800383a:	461a      	mov	r2, r3
 800383c:	6879      	ldr	r1, [r7, #4]
 800383e:	4810      	ldr	r0, [pc, #64]	@ (8003880 <PrepareRespFrame+0x138>)
 8003840:	f002 f934 	bl	8005aac <HAL_CRC_Calculate>
 8003844:	4603      	mov	r3, r0
 8003846:	81bb      	strh	r3, [r7, #12]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003848:	89fb      	ldrh	r3, [r7, #14]
 800384a:	1c5a      	adds	r2, r3, #1
 800384c:	81fa      	strh	r2, [r7, #14]
 800384e:	461a      	mov	r2, r3
 8003850:	687b      	ldr	r3, [r7, #4]
 8003852:	4413      	add	r3, r2
 8003854:	89ba      	ldrh	r2, [r7, #12]
 8003856:	b2d2      	uxtb	r2, r2
 8003858:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 800385a:	89bb      	ldrh	r3, [r7, #12]
 800385c:	0a1b      	lsrs	r3, r3, #8
 800385e:	b29a      	uxth	r2, r3
 8003860:	89fb      	ldrh	r3, [r7, #14]
 8003862:	1c59      	adds	r1, r3, #1
 8003864:	81f9      	strh	r1, [r7, #14]
 8003866:	4619      	mov	r1, r3
 8003868:	687b      	ldr	r3, [r7, #4]
 800386a:	440b      	add	r3, r1
 800386c:	b2d2      	uxtb	r2, r2
 800386e:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003870:	89fb      	ldrh	r3, [r7, #14]
}
 8003872:	4618      	mov	r0, r3
 8003874:	3710      	adds	r7, #16
 8003876:	46bd      	mov	sp, r7
 8003878:	bd80      	pop	{r7, pc}
 800387a:	bf00      	nop
 800387c:	ffff8000 	.word	0xffff8000
 8003880:	24000248 	.word	0x24000248

08003884 <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 8003884:	b580      	push	{r7, lr}
 8003886:	b086      	sub	sp, #24
 8003888:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */
  PWREx_AVDTypeDef sConfigAVD = {0};
 800388a:	f107 0310 	add.w	r3, r7, #16
 800388e:	2200      	movs	r2, #0
 8003890:	601a      	str	r2, [r3, #0]
 8003892:	605a      	str	r2, [r3, #4]
  PWR_PVDTypeDef sConfigPVD = {0};
 8003894:	f107 0308 	add.w	r3, r7, #8
 8003898:	2200      	movs	r2, #0
 800389a:	601a      	str	r2, [r3, #0]
 800389c:	605a      	str	r2, [r3, #4]

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 800389e:	4b1c      	ldr	r3, [pc, #112]	@ (8003910 <HAL_MspInit+0x8c>)
 80038a0:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80038a4:	4a1a      	ldr	r2, [pc, #104]	@ (8003910 <HAL_MspInit+0x8c>)
 80038a6:	f043 0302 	orr.w	r3, r3, #2
 80038aa:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 80038ae:	4b18      	ldr	r3, [pc, #96]	@ (8003910 <HAL_MspInit+0x8c>)
 80038b0:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80038b4:	f003 0302 	and.w	r3, r3, #2
 80038b8:	607b      	str	r3, [r7, #4]
 80038ba:	687b      	ldr	r3, [r7, #4]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 80038bc:	2200      	movs	r2, #0
 80038be:	210f      	movs	r1, #15
 80038c0:	f06f 0001 	mvn.w	r0, #1
 80038c4:	f001 ffee 	bl	80058a4 <HAL_NVIC_SetPriority>

  /* Peripheral interrupt init */
  /* RCC_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
 80038c8:	2200      	movs	r2, #0
 80038ca:	2105      	movs	r1, #5
 80038cc:	2005      	movs	r0, #5
 80038ce:	f001 ffe9 	bl	80058a4 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(RCC_IRQn);
 80038d2:	2005      	movs	r0, #5
 80038d4:	f002 f800 	bl	80058d8 <HAL_NVIC_EnableIRQ>

  /** AVD Configuration
  */
  sConfigAVD.AVDLevel = PWR_AVDLEVEL_3;
 80038d8:	f44f 23c0 	mov.w	r3, #393216	@ 0x60000
 80038dc:	613b      	str	r3, [r7, #16]
  sConfigAVD.Mode = PWR_AVD_MODE_NORMAL;
 80038de:	2300      	movs	r3, #0
 80038e0:	617b      	str	r3, [r7, #20]
  HAL_PWREx_ConfigAVD(&sConfigAVD);
 80038e2:	f107 0310 	add.w	r3, r7, #16
 80038e6:	4618      	mov	r0, r3
 80038e8:	f006 fcaa 	bl	800a240 <HAL_PWREx_ConfigAVD>

  /** Enable the AVD Output
  */
  HAL_PWREx_EnableAVD();
 80038ec:	f006 fd1e 	bl	800a32c <HAL_PWREx_EnableAVD>

  /** PVD Configuration
  */
  sConfigPVD.PVDLevel = PWR_PVDLEVEL_6;
 80038f0:	23c0      	movs	r3, #192	@ 0xc0
 80038f2:	60bb      	str	r3, [r7, #8]
  sConfigPVD.Mode = PWR_PVD_MODE_NORMAL;
 80038f4:	2300      	movs	r3, #0
 80038f6:	60fb      	str	r3, [r7, #12]
  HAL_PWR_ConfigPVD(&sConfigPVD);
 80038f8:	f107 0308 	add.w	r3, r7, #8
 80038fc:	4618      	mov	r0, r3
 80038fe:	f006 fbdb 	bl	800a0b8 <HAL_PWR_ConfigPVD>

  /** Enable the PVD Output
  */
  HAL_PWR_EnablePVD();
 8003902:	f006 fc53 	bl	800a1ac <HAL_PWR_EnablePVD>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8003906:	bf00      	nop
 8003908:	3718      	adds	r7, #24
 800390a:	46bd      	mov	sp, r7
 800390c:	bd80      	pop	{r7, pc}
 800390e:	bf00      	nop
 8003910:	58024400 	.word	0x58024400

08003914 <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
 8003914:	b480      	push	{r7}
 8003916:	b085      	sub	sp, #20
 8003918:	af00      	add	r7, sp, #0
 800391a:	6078      	str	r0, [r7, #4]
  if(hcrc->Instance==CRC)
 800391c:	687b      	ldr	r3, [r7, #4]
 800391e:	681b      	ldr	r3, [r3, #0]
 8003920:	4a0b      	ldr	r2, [pc, #44]	@ (8003950 <HAL_CRC_MspInit+0x3c>)
 8003922:	4293      	cmp	r3, r2
 8003924:	d10e      	bne.n	8003944 <HAL_CRC_MspInit+0x30>
  {
  /* USER CODE BEGIN CRC_MspInit 0 */

  /* USER CODE END CRC_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_CRC_CLK_ENABLE();
 8003926:	4b0b      	ldr	r3, [pc, #44]	@ (8003954 <HAL_CRC_MspInit+0x40>)
 8003928:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800392c:	4a09      	ldr	r2, [pc, #36]	@ (8003954 <HAL_CRC_MspInit+0x40>)
 800392e:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8003932:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003936:	4b07      	ldr	r3, [pc, #28]	@ (8003954 <HAL_CRC_MspInit+0x40>)
 8003938:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 800393c:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8003940:	60fb      	str	r3, [r7, #12]
 8003942:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN CRC_MspInit 1 */

  /* USER CODE END CRC_MspInit 1 */
  }

}
 8003944:	bf00      	nop
 8003946:	3714      	adds	r7, #20
 8003948:	46bd      	mov	sp, r7
 800394a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800394e:	4770      	bx	lr
 8003950:	58024c00 	.word	0x58024c00
 8003954:	58024400 	.word	0x58024400

08003958 <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
 8003958:	b580      	push	{r7, lr}
 800395a:	b0b4      	sub	sp, #208	@ 0xd0
 800395c:	af00      	add	r7, sp, #0
 800395e:	6078      	str	r0, [r7, #4]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003960:	f107 0310 	add.w	r3, r7, #16
 8003964:	22c0      	movs	r2, #192	@ 0xc0
 8003966:	2100      	movs	r1, #0
 8003968:	4618      	mov	r0, r3
 800396a:	f027 f889 	bl	802aa80 <memset>
  if(hrng->Instance==RNG)
 800396e:	687b      	ldr	r3, [r7, #4]
 8003970:	681b      	ldr	r3, [r3, #0]
 8003972:	4a14      	ldr	r2, [pc, #80]	@ (80039c4 <HAL_RNG_MspInit+0x6c>)
 8003974:	4293      	cmp	r3, r2
 8003976:	d121      	bne.n	80039bc <HAL_RNG_MspInit+0x64>

  /* USER CODE END RNG_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
 8003978:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 800397c:	f04f 0300 	mov.w	r3, #0
 8003980:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
 8003984:	2300      	movs	r3, #0
 8003986:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 800398a:	f107 0310 	add.w	r3, r7, #16
 800398e:	4618      	mov	r0, r3
 8003990:	f007 fd04 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003994:	4603      	mov	r3, r0
 8003996:	2b00      	cmp	r3, #0
 8003998:	d001      	beq.n	800399e <HAL_RNG_MspInit+0x46>
    {
      Error_Handler();
 800399a:	f7fe fe7d 	bl	8002698 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_RNG_CLK_ENABLE();
 800399e:	4b0a      	ldr	r3, [pc, #40]	@ (80039c8 <HAL_RNG_MspInit+0x70>)
 80039a0:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 80039a4:	4a08      	ldr	r2, [pc, #32]	@ (80039c8 <HAL_RNG_MspInit+0x70>)
 80039a6:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 80039aa:	f8c2 30dc 	str.w	r3, [r2, #220]	@ 0xdc
 80039ae:	4b06      	ldr	r3, [pc, #24]	@ (80039c8 <HAL_RNG_MspInit+0x70>)
 80039b0:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 80039b4:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80039b8:	60fb      	str	r3, [r7, #12]
 80039ba:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN RNG_MspInit 1 */

  /* USER CODE END RNG_MspInit 1 */
  }

}
 80039bc:	bf00      	nop
 80039be:	37d0      	adds	r7, #208	@ 0xd0
 80039c0:	46bd      	mov	sp, r7
 80039c2:	bd80      	pop	{r7, pc}
 80039c4:	48021800 	.word	0x48021800
 80039c8:	58024400 	.word	0x58024400

080039cc <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 80039cc:	b580      	push	{r7, lr}
 80039ce:	b0c2      	sub	sp, #264	@ 0x108
 80039d0:	af00      	add	r7, sp, #0
 80039d2:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80039d6:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 80039da:	6018      	str	r0, [r3, #0]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80039dc:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 80039e0:	2200      	movs	r2, #0
 80039e2:	601a      	str	r2, [r3, #0]
 80039e4:	605a      	str	r2, [r3, #4]
 80039e6:	609a      	str	r2, [r3, #8]
 80039e8:	60da      	str	r2, [r3, #12]
 80039ea:	611a      	str	r2, [r3, #16]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 80039ec:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80039f0:	22c0      	movs	r2, #192	@ 0xc0
 80039f2:	2100      	movs	r1, #0
 80039f4:	4618      	mov	r0, r3
 80039f6:	f027 f843 	bl	802aa80 <memset>
  if(huart->Instance==UART8)
 80039fa:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 80039fe:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003a02:	681b      	ldr	r3, [r3, #0]
 8003a04:	681b      	ldr	r3, [r3, #0]
 8003a06:	4ab8      	ldr	r2, [pc, #736]	@ (8003ce8 <HAL_UART_MspInit+0x31c>)
 8003a08:	4293      	cmp	r3, r2
 8003a0a:	f040 80bc 	bne.w	8003b86 <HAL_UART_MspInit+0x1ba>

  /* USER CODE END UART8_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
 8003a0e:	f04f 0202 	mov.w	r2, #2
 8003a12:	f04f 0300 	mov.w	r3, #0
 8003a16:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003a1a:	2300      	movs	r3, #0
 8003a1c:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003a20:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003a24:	4618      	mov	r0, r3
 8003a26:	f007 fcb9 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003a2a:	4603      	mov	r3, r0
 8003a2c:	2b00      	cmp	r3, #0
 8003a2e:	d001      	beq.n	8003a34 <HAL_UART_MspInit+0x68>
    {
      Error_Handler();
 8003a30:	f7fe fe32 	bl	8002698 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_UART8_CLK_ENABLE();
 8003a34:	4bad      	ldr	r3, [pc, #692]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a36:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003a3a:	4aac      	ldr	r2, [pc, #688]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a3c:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
 8003a40:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003a44:	4ba9      	ldr	r3, [pc, #676]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a46:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003a4a:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8003a4e:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8003a50:	6afb      	ldr	r3, [r7, #44]	@ 0x2c

    __HAL_RCC_GPIOE_CLK_ENABLE();
 8003a52:	4ba6      	ldr	r3, [pc, #664]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a54:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003a58:	4aa4      	ldr	r2, [pc, #656]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a5a:	f043 0310 	orr.w	r3, r3, #16
 8003a5e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003a62:	4ba2      	ldr	r3, [pc, #648]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003a64:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003a68:	f003 0310 	and.w	r3, r3, #16
 8003a6c:	62bb      	str	r3, [r7, #40]	@ 0x28
 8003a6e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
    /**UART8 GPIO Configuration
    PE0     ------> UART8_RX
    PE1     ------> UART8_TX
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
 8003a70:	2303      	movs	r3, #3
 8003a72:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003a76:	2302      	movs	r3, #2
 8003a78:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003a7c:	2300      	movs	r3, #0
 8003a7e:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8003a82:	2300      	movs	r3, #0
 8003a84:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
 8003a88:	2308      	movs	r3, #8
 8003a8a:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8003a8e:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003a92:	4619      	mov	r1, r3
 8003a94:	4896      	ldr	r0, [pc, #600]	@ (8003cf0 <HAL_UART_MspInit+0x324>)
 8003a96:	f006 f92d 	bl	8009cf4 <HAL_GPIO_Init>

    /* UART8 DMA Init */
    /* UART8_RX Init */
    hdma_uart8_rx.Instance = DMA2_Stream7;
 8003a9a:	4b96      	ldr	r3, [pc, #600]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003a9c:	4a96      	ldr	r2, [pc, #600]	@ (8003cf8 <HAL_UART_MspInit+0x32c>)
 8003a9e:	601a      	str	r2, [r3, #0]
    hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
 8003aa0:	4b94      	ldr	r3, [pc, #592]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003aa2:	2251      	movs	r2, #81	@ 0x51
 8003aa4:	605a      	str	r2, [r3, #4]
    hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8003aa6:	4b93      	ldr	r3, [pc, #588]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003aa8:	2200      	movs	r2, #0
 8003aaa:	609a      	str	r2, [r3, #8]
    hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003aac:	4b91      	ldr	r3, [pc, #580]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003aae:	2200      	movs	r2, #0
 8003ab0:	60da      	str	r2, [r3, #12]
    hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
 8003ab2:	4b90      	ldr	r3, [pc, #576]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003ab4:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003ab8:	611a      	str	r2, [r3, #16]
    hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003aba:	4b8e      	ldr	r3, [pc, #568]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003abc:	2200      	movs	r2, #0
 8003abe:	615a      	str	r2, [r3, #20]
    hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003ac0:	4b8c      	ldr	r3, [pc, #560]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003ac2:	2200      	movs	r2, #0
 8003ac4:	619a      	str	r2, [r3, #24]
    hdma_uart8_rx.Init.Mode = DMA_NORMAL;
 8003ac6:	4b8b      	ldr	r3, [pc, #556]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003ac8:	2200      	movs	r2, #0
 8003aca:	61da      	str	r2, [r3, #28]
    hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003acc:	4b89      	ldr	r3, [pc, #548]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003ace:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003ad2:	621a      	str	r2, [r3, #32]
    hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003ad4:	4b87      	ldr	r3, [pc, #540]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003ad6:	2200      	movs	r2, #0
 8003ad8:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
 8003ada:	4886      	ldr	r0, [pc, #536]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003adc:	f002 f988 	bl	8005df0 <HAL_DMA_Init>
 8003ae0:	4603      	mov	r3, r0
 8003ae2:	2b00      	cmp	r3, #0
 8003ae4:	d001      	beq.n	8003aea <HAL_UART_MspInit+0x11e>
    {
      Error_Handler();
 8003ae6:	f7fe fdd7 	bl	8002698 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
 8003aea:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003aee:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003af2:	681b      	ldr	r3, [r3, #0]
 8003af4:	4a7f      	ldr	r2, [pc, #508]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003af6:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
 8003afa:	4a7e      	ldr	r2, [pc, #504]	@ (8003cf4 <HAL_UART_MspInit+0x328>)
 8003afc:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003b00:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003b04:	681b      	ldr	r3, [r3, #0]
 8003b06:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8_TX Init */
    hdma_uart8_tx.Instance = DMA2_Stream6;
 8003b08:	4b7c      	ldr	r3, [pc, #496]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b0a:	4a7d      	ldr	r2, [pc, #500]	@ (8003d00 <HAL_UART_MspInit+0x334>)
 8003b0c:	601a      	str	r2, [r3, #0]
    hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
 8003b0e:	4b7b      	ldr	r3, [pc, #492]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b10:	2252      	movs	r2, #82	@ 0x52
 8003b12:	605a      	str	r2, [r3, #4]
    hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8003b14:	4b79      	ldr	r3, [pc, #484]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b16:	2240      	movs	r2, #64	@ 0x40
 8003b18:	609a      	str	r2, [r3, #8]
    hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003b1a:	4b78      	ldr	r3, [pc, #480]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b1c:	2200      	movs	r2, #0
 8003b1e:	60da      	str	r2, [r3, #12]
    hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
 8003b20:	4b76      	ldr	r3, [pc, #472]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b22:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003b26:	611a      	str	r2, [r3, #16]
    hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003b28:	4b74      	ldr	r3, [pc, #464]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b2a:	2200      	movs	r2, #0
 8003b2c:	615a      	str	r2, [r3, #20]
    hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003b2e:	4b73      	ldr	r3, [pc, #460]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b30:	2200      	movs	r2, #0
 8003b32:	619a      	str	r2, [r3, #24]
    hdma_uart8_tx.Init.Mode = DMA_NORMAL;
 8003b34:	4b71      	ldr	r3, [pc, #452]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b36:	2200      	movs	r2, #0
 8003b38:	61da      	str	r2, [r3, #28]
    hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003b3a:	4b70      	ldr	r3, [pc, #448]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b3c:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003b40:	621a      	str	r2, [r3, #32]
    hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003b42:	4b6e      	ldr	r3, [pc, #440]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b44:	2200      	movs	r2, #0
 8003b46:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
 8003b48:	486c      	ldr	r0, [pc, #432]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b4a:	f002 f951 	bl	8005df0 <HAL_DMA_Init>
 8003b4e:	4603      	mov	r3, r0
 8003b50:	2b00      	cmp	r3, #0
 8003b52:	d001      	beq.n	8003b58 <HAL_UART_MspInit+0x18c>
    {
      Error_Handler();
 8003b54:	f7fe fda0 	bl	8002698 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
 8003b58:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003b5c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003b60:	681b      	ldr	r3, [r3, #0]
 8003b62:	4a66      	ldr	r2, [pc, #408]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b64:	67da      	str	r2, [r3, #124]	@ 0x7c
 8003b66:	4a65      	ldr	r2, [pc, #404]	@ (8003cfc <HAL_UART_MspInit+0x330>)
 8003b68:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003b6c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003b70:	681b      	ldr	r3, [r3, #0]
 8003b72:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8 interrupt Init */
    HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
 8003b74:	2200      	movs	r2, #0
 8003b76:	2105      	movs	r1, #5
 8003b78:	2053      	movs	r0, #83	@ 0x53
 8003b7a:	f001 fe93 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(UART8_IRQn);
 8003b7e:	2053      	movs	r0, #83	@ 0x53
 8003b80:	f001 feaa 	bl	80058d8 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN USART6_MspInit 1 */

  /* USER CODE END USART6_MspInit 1 */
  }

}
 8003b84:	e17e      	b.n	8003e84 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART1)
 8003b86:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003b8a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003b8e:	681b      	ldr	r3, [r3, #0]
 8003b90:	681b      	ldr	r3, [r3, #0]
 8003b92:	4a5c      	ldr	r2, [pc, #368]	@ (8003d04 <HAL_UART_MspInit+0x338>)
 8003b94:	4293      	cmp	r3, r2
 8003b96:	d14f      	bne.n	8003c38 <HAL_UART_MspInit+0x26c>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
 8003b98:	f04f 0201 	mov.w	r2, #1
 8003b9c:	f04f 0300 	mov.w	r3, #0
 8003ba0:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 8003ba4:	2300      	movs	r3, #0
 8003ba6:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003baa:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003bae:	4618      	mov	r0, r3
 8003bb0:	f007 fbf4 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003bb4:	4603      	mov	r3, r0
 8003bb6:	2b00      	cmp	r3, #0
 8003bb8:	d001      	beq.n	8003bbe <HAL_UART_MspInit+0x1f2>
      Error_Handler();
 8003bba:	f7fe fd6d 	bl	8002698 <Error_Handler>
    __HAL_RCC_USART1_CLK_ENABLE();
 8003bbe:	4b4b      	ldr	r3, [pc, #300]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003bc0:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003bc4:	4a49      	ldr	r2, [pc, #292]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003bc6:	f043 0310 	orr.w	r3, r3, #16
 8003bca:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003bce:	4b47      	ldr	r3, [pc, #284]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003bd0:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003bd4:	f003 0310 	and.w	r3, r3, #16
 8003bd8:	627b      	str	r3, [r7, #36]	@ 0x24
 8003bda:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8003bdc:	4b43      	ldr	r3, [pc, #268]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003bde:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003be2:	4a42      	ldr	r2, [pc, #264]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003be4:	f043 0302 	orr.w	r3, r3, #2
 8003be8:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003bec:	4b3f      	ldr	r3, [pc, #252]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003bee:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003bf2:	f003 0302 	and.w	r3, r3, #2
 8003bf6:	623b      	str	r3, [r7, #32]
 8003bf8:	6a3b      	ldr	r3, [r7, #32]
    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 8003bfa:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 8003bfe:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003c02:	2302      	movs	r3, #2
 8003c04:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003c08:	2300      	movs	r3, #0
 8003c0a:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003c0e:	2302      	movs	r3, #2
 8003c10:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
 8003c14:	2304      	movs	r3, #4
 8003c16:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8003c1a:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003c1e:	4619      	mov	r1, r3
 8003c20:	4839      	ldr	r0, [pc, #228]	@ (8003d08 <HAL_UART_MspInit+0x33c>)
 8003c22:	f006 f867 	bl	8009cf4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
 8003c26:	2200      	movs	r2, #0
 8003c28:	2105      	movs	r1, #5
 8003c2a:	2025      	movs	r0, #37	@ 0x25
 8003c2c:	f001 fe3a 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART1_IRQn);
 8003c30:	2025      	movs	r0, #37	@ 0x25
 8003c32:	f001 fe51 	bl	80058d8 <HAL_NVIC_EnableIRQ>
}
 8003c36:	e125      	b.n	8003e84 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART2)
 8003c38:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003c3c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003c40:	681b      	ldr	r3, [r3, #0]
 8003c42:	681b      	ldr	r3, [r3, #0]
 8003c44:	4a31      	ldr	r2, [pc, #196]	@ (8003d0c <HAL_UART_MspInit+0x340>)
 8003c46:	4293      	cmp	r3, r2
 8003c48:	d164      	bne.n	8003d14 <HAL_UART_MspInit+0x348>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
 8003c4a:	f04f 0202 	mov.w	r2, #2
 8003c4e:	f04f 0300 	mov.w	r3, #0
 8003c52:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003c56:	2300      	movs	r3, #0
 8003c58:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003c5c:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003c60:	4618      	mov	r0, r3
 8003c62:	f007 fb9b 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003c66:	4603      	mov	r3, r0
 8003c68:	2b00      	cmp	r3, #0
 8003c6a:	d001      	beq.n	8003c70 <HAL_UART_MspInit+0x2a4>
      Error_Handler();
 8003c6c:	f7fe fd14 	bl	8002698 <Error_Handler>
    __HAL_RCC_USART2_CLK_ENABLE();
 8003c70:	4b1e      	ldr	r3, [pc, #120]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003c72:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003c76:	4a1d      	ldr	r2, [pc, #116]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003c78:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8003c7c:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003c80:	4b1a      	ldr	r3, [pc, #104]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003c82:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003c86:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8003c8a:	61fb      	str	r3, [r7, #28]
 8003c8c:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 8003c8e:	4b17      	ldr	r3, [pc, #92]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003c90:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003c94:	4a15      	ldr	r2, [pc, #84]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003c96:	f043 0308 	orr.w	r3, r3, #8
 8003c9a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003c9e:	4b13      	ldr	r3, [pc, #76]	@ (8003cec <HAL_UART_MspInit+0x320>)
 8003ca0:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003ca4:	f003 0308 	and.w	r3, r3, #8
 8003ca8:	61bb      	str	r3, [r7, #24]
 8003caa:	69bb      	ldr	r3, [r7, #24]
    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
 8003cac:	2360      	movs	r3, #96	@ 0x60
 8003cae:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003cb2:	2302      	movs	r3, #2
 8003cb4:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003cb8:	2300      	movs	r3, #0
 8003cba:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003cbe:	2302      	movs	r3, #2
 8003cc0:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 8003cc4:	2307      	movs	r3, #7
 8003cc6:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8003cca:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003cce:	4619      	mov	r1, r3
 8003cd0:	480f      	ldr	r0, [pc, #60]	@ (8003d10 <HAL_UART_MspInit+0x344>)
 8003cd2:	f006 f80f 	bl	8009cf4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
 8003cd6:	2200      	movs	r2, #0
 8003cd8:	2105      	movs	r1, #5
 8003cda:	2026      	movs	r0, #38	@ 0x26
 8003cdc:	f001 fde2 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART2_IRQn);
 8003ce0:	2026      	movs	r0, #38	@ 0x26
 8003ce2:	f001 fdf9 	bl	80058d8 <HAL_NVIC_EnableIRQ>
}
 8003ce6:	e0cd      	b.n	8003e84 <HAL_UART_MspInit+0x4b8>
 8003ce8:	40007c00 	.word	0x40007c00
 8003cec:	58024400 	.word	0x58024400
 8003cf0:	58021000 	.word	0x58021000
 8003cf4:	24000564 	.word	0x24000564
 8003cf8:	400204b8 	.word	0x400204b8
 8003cfc:	240005dc 	.word	0x240005dc
 8003d00:	400204a0 	.word	0x400204a0
 8003d04:	40011000 	.word	0x40011000
 8003d08:	58020400 	.word	0x58020400
 8003d0c:	40004400 	.word	0x40004400
 8003d10:	58020c00 	.word	0x58020c00
  else if(huart->Instance==USART3)
 8003d14:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003d18:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003d1c:	681b      	ldr	r3, [r3, #0]
 8003d1e:	681b      	ldr	r3, [r3, #0]
 8003d20:	4a5b      	ldr	r2, [pc, #364]	@ (8003e90 <HAL_UART_MspInit+0x4c4>)
 8003d22:	4293      	cmp	r3, r2
 8003d24:	d14f      	bne.n	8003dc6 <HAL_UART_MspInit+0x3fa>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
 8003d26:	f04f 0202 	mov.w	r2, #2
 8003d2a:	f04f 0300 	mov.w	r3, #0
 8003d2e:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003d32:	2300      	movs	r3, #0
 8003d34:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003d38:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003d3c:	4618      	mov	r0, r3
 8003d3e:	f007 fb2d 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003d42:	4603      	mov	r3, r0
 8003d44:	2b00      	cmp	r3, #0
 8003d46:	d001      	beq.n	8003d4c <HAL_UART_MspInit+0x380>
      Error_Handler();
 8003d48:	f7fe fca6 	bl	8002698 <Error_Handler>
    __HAL_RCC_USART3_CLK_ENABLE();
 8003d4c:	4b51      	ldr	r3, [pc, #324]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d4e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003d52:	4a50      	ldr	r2, [pc, #320]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d54:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 8003d58:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003d5c:	4b4d      	ldr	r3, [pc, #308]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d5e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003d62:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8003d66:	617b      	str	r3, [r7, #20]
 8003d68:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 8003d6a:	4b4a      	ldr	r3, [pc, #296]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d6c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003d70:	4a48      	ldr	r2, [pc, #288]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d72:	f043 0308 	orr.w	r3, r3, #8
 8003d76:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003d7a:	4b46      	ldr	r3, [pc, #280]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003d7c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003d80:	f003 0308 	and.w	r3, r3, #8
 8003d84:	613b      	str	r3, [r7, #16]
 8003d86:	693b      	ldr	r3, [r7, #16]
    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
 8003d88:	f44f 7340 	mov.w	r3, #768	@ 0x300
 8003d8c:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003d90:	2302      	movs	r3, #2
 8003d92:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003d96:	2300      	movs	r3, #0
 8003d98:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003d9c:	2302      	movs	r3, #2
 8003d9e:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
 8003da2:	2307      	movs	r3, #7
 8003da4:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8003da8:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003dac:	4619      	mov	r1, r3
 8003dae:	483a      	ldr	r0, [pc, #232]	@ (8003e98 <HAL_UART_MspInit+0x4cc>)
 8003db0:	f005 ffa0 	bl	8009cf4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
 8003db4:	2200      	movs	r2, #0
 8003db6:	2105      	movs	r1, #5
 8003db8:	2027      	movs	r0, #39	@ 0x27
 8003dba:	f001 fd73 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART3_IRQn);
 8003dbe:	2027      	movs	r0, #39	@ 0x27
 8003dc0:	f001 fd8a 	bl	80058d8 <HAL_NVIC_EnableIRQ>
}
 8003dc4:	e05e      	b.n	8003e84 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART6)
 8003dc6:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003dca:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003dce:	681b      	ldr	r3, [r3, #0]
 8003dd0:	681b      	ldr	r3, [r3, #0]
 8003dd2:	4a32      	ldr	r2, [pc, #200]	@ (8003e9c <HAL_UART_MspInit+0x4d0>)
 8003dd4:	4293      	cmp	r3, r2
 8003dd6:	d155      	bne.n	8003e84 <HAL_UART_MspInit+0x4b8>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
 8003dd8:	f04f 0201 	mov.w	r2, #1
 8003ddc:	f04f 0300 	mov.w	r3, #0
 8003de0:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 8003de4:	2300      	movs	r3, #0
 8003de6:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003dea:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003dee:	4618      	mov	r0, r3
 8003df0:	f007 fad4 	bl	800b39c <HAL_RCCEx_PeriphCLKConfig>
 8003df4:	4603      	mov	r3, r0
 8003df6:	2b00      	cmp	r3, #0
 8003df8:	d001      	beq.n	8003dfe <HAL_UART_MspInit+0x432>
      Error_Handler();
 8003dfa:	f7fe fc4d 	bl	8002698 <Error_Handler>
    __HAL_RCC_USART6_CLK_ENABLE();
 8003dfe:	4b25      	ldr	r3, [pc, #148]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e00:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003e04:	4a23      	ldr	r2, [pc, #140]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e06:	f043 0320 	orr.w	r3, r3, #32
 8003e0a:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003e0e:	4b21      	ldr	r3, [pc, #132]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e10:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003e14:	f003 0320 	and.w	r3, r3, #32
 8003e18:	60fb      	str	r3, [r7, #12]
 8003e1a:	68fb      	ldr	r3, [r7, #12]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 8003e1c:	4b1d      	ldr	r3, [pc, #116]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e1e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003e22:	4a1c      	ldr	r2, [pc, #112]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e24:	f043 0304 	orr.w	r3, r3, #4
 8003e28:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003e2c:	4b19      	ldr	r3, [pc, #100]	@ (8003e94 <HAL_UART_MspInit+0x4c8>)
 8003e2e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003e32:	f003 0204 	and.w	r2, r3, #4
 8003e36:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003e3a:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8003e3e:	601a      	str	r2, [r3, #0]
 8003e40:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003e44:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8003e48:	681b      	ldr	r3, [r3, #0]
    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
 8003e4a:	23c0      	movs	r3, #192	@ 0xc0
 8003e4c:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003e50:	2302      	movs	r3, #2
 8003e52:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003e56:	2300      	movs	r3, #0
 8003e58:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003e5c:	2302      	movs	r3, #2
 8003e5e:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
 8003e62:	2307      	movs	r3, #7
 8003e64:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8003e68:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003e6c:	4619      	mov	r1, r3
 8003e6e:	480c      	ldr	r0, [pc, #48]	@ (8003ea0 <HAL_UART_MspInit+0x4d4>)
 8003e70:	f005 ff40 	bl	8009cf4 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
 8003e74:	2200      	movs	r2, #0
 8003e76:	2105      	movs	r1, #5
 8003e78:	2047      	movs	r0, #71	@ 0x47
 8003e7a:	f001 fd13 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART6_IRQn);
 8003e7e:	2047      	movs	r0, #71	@ 0x47
 8003e80:	f001 fd2a 	bl	80058d8 <HAL_NVIC_EnableIRQ>
}
 8003e84:	bf00      	nop
 8003e86:	f507 7784 	add.w	r7, r7, #264	@ 0x108
 8003e8a:	46bd      	mov	sp, r7
 8003e8c:	bd80      	pop	{r7, pc}
 8003e8e:	bf00      	nop
 8003e90:	40004800 	.word	0x40004800
 8003e94:	58024400 	.word	0x58024400
 8003e98:	58020c00 	.word	0x58020c00
 8003e9c:	40011400 	.word	0x40011400
 8003ea0:	58020800 	.word	0x58020800

08003ea4 <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8003ea4:	b580      	push	{r7, lr}
 8003ea6:	b090      	sub	sp, #64	@ 0x40
 8003ea8:	af00      	add	r7, sp, #0
 8003eaa:	6078      	str	r0, [r7, #4]
  uint32_t              uwTimclock, uwAPB1Prescaler;

  uint32_t              uwPrescalerValue;
  uint32_t              pFLatency;
/*Configure the TIM6 IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8003eac:	687b      	ldr	r3, [r7, #4]
 8003eae:	2b0f      	cmp	r3, #15
 8003eb0:	d827      	bhi.n	8003f02 <HAL_InitTick+0x5e>
  {
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
 8003eb2:	2200      	movs	r2, #0
 8003eb4:	6879      	ldr	r1, [r7, #4]
 8003eb6:	2036      	movs	r0, #54	@ 0x36
 8003eb8:	f001 fcf4 	bl	80058a4 <HAL_NVIC_SetPriority>

  /* Enable the TIM6 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 8003ebc:	2036      	movs	r0, #54	@ 0x36
 8003ebe:	f001 fd0b 	bl	80058d8 <HAL_NVIC_EnableIRQ>
    uwTickPrio = TickPriority;
 8003ec2:	4a29      	ldr	r2, [pc, #164]	@ (8003f68 <HAL_InitTick+0xc4>)
 8003ec4:	687b      	ldr	r3, [r7, #4]
 8003ec6:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Enable TIM6 clock */
  __HAL_RCC_TIM6_CLK_ENABLE();
 8003ec8:	4b28      	ldr	r3, [pc, #160]	@ (8003f6c <HAL_InitTick+0xc8>)
 8003eca:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003ece:	4a27      	ldr	r2, [pc, #156]	@ (8003f6c <HAL_InitTick+0xc8>)
 8003ed0:	f043 0310 	orr.w	r3, r3, #16
 8003ed4:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003ed8:	4b24      	ldr	r3, [pc, #144]	@ (8003f6c <HAL_InitTick+0xc8>)
 8003eda:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003ede:	f003 0310 	and.w	r3, r3, #16
 8003ee2:	60fb      	str	r3, [r7, #12]
 8003ee4:	68fb      	ldr	r3, [r7, #12]

  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 8003ee6:	f107 0210 	add.w	r2, r7, #16
 8003eea:	f107 0314 	add.w	r3, r7, #20
 8003eee:	4611      	mov	r1, r2
 8003ef0:	4618      	mov	r0, r3
 8003ef2:	f007 fa11 	bl	800b318 <HAL_RCC_GetClockConfig>

  /* Get APB1 prescaler */
  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
 8003ef6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8003ef8:	63bb      	str	r3, [r7, #56]	@ 0x38
  /* Compute TIM6 clock */
  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
 8003efa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8003efc:	2b00      	cmp	r3, #0
 8003efe:	d106      	bne.n	8003f0e <HAL_InitTick+0x6a>
 8003f00:	e001      	b.n	8003f06 <HAL_InitTick+0x62>
    return HAL_ERROR;
 8003f02:	2301      	movs	r3, #1
 8003f04:	e02b      	b.n	8003f5e <HAL_InitTick+0xba>
  {
    uwTimclock = HAL_RCC_GetPCLK1Freq();
 8003f06:	f007 f9db 	bl	800b2c0 <HAL_RCC_GetPCLK1Freq>
 8003f0a:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8003f0c:	e004      	b.n	8003f18 <HAL_InitTick+0x74>
  }
  else
  {
    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
 8003f0e:	f007 f9d7 	bl	800b2c0 <HAL_RCC_GetPCLK1Freq>
 8003f12:	4603      	mov	r3, r0
 8003f14:	005b      	lsls	r3, r3, #1
 8003f16:	63fb      	str	r3, [r7, #60]	@ 0x3c
  }

  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 8003f18:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8003f1a:	4a15      	ldr	r2, [pc, #84]	@ (8003f70 <HAL_InitTick+0xcc>)
 8003f1c:	fba2 2303 	umull	r2, r3, r2, r3
 8003f20:	0c9b      	lsrs	r3, r3, #18
 8003f22:	3b01      	subs	r3, #1
 8003f24:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Initialize TIM6 */
  htim6.Instance = TIM6;
 8003f26:	4b13      	ldr	r3, [pc, #76]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f28:	4a13      	ldr	r2, [pc, #76]	@ (8003f78 <HAL_InitTick+0xd4>)
 8003f2a:	601a      	str	r2, [r3, #0]
  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim6.Init.Period = (1000000U / 1000U) - 1U;
 8003f2c:	4b11      	ldr	r3, [pc, #68]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f2e:	f240 32e7 	movw	r2, #999	@ 0x3e7
 8003f32:	60da      	str	r2, [r3, #12]
  htim6.Init.Prescaler = uwPrescalerValue;
 8003f34:	4a0f      	ldr	r2, [pc, #60]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f36:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8003f38:	6053      	str	r3, [r2, #4]
  htim6.Init.ClockDivision = 0;
 8003f3a:	4b0e      	ldr	r3, [pc, #56]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f3c:	2200      	movs	r2, #0
 8003f3e:	611a      	str	r2, [r3, #16]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8003f40:	4b0c      	ldr	r3, [pc, #48]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f42:	2200      	movs	r2, #0
 8003f44:	609a      	str	r2, [r3, #8]

  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
 8003f46:	480b      	ldr	r0, [pc, #44]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f48:	f009 f8f0 	bl	800d12c <HAL_TIM_Base_Init>
 8003f4c:	4603      	mov	r3, r0
 8003f4e:	2b00      	cmp	r3, #0
 8003f50:	d104      	bne.n	8003f5c <HAL_InitTick+0xb8>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim6);
 8003f52:	4808      	ldr	r0, [pc, #32]	@ (8003f74 <HAL_InitTick+0xd0>)
 8003f54:	f009 f94c 	bl	800d1f0 <HAL_TIM_Base_Start_IT>
 8003f58:	4603      	mov	r3, r0
 8003f5a:	e000      	b.n	8003f5e <HAL_InitTick+0xba>
  }

  /* Return function status */
  return HAL_ERROR;
 8003f5c:	2301      	movs	r3, #1
}
 8003f5e:	4618      	mov	r0, r3
 8003f60:	3740      	adds	r7, #64	@ 0x40
 8003f62:	46bd      	mov	sp, r7
 8003f64:	bd80      	pop	{r7, pc}
 8003f66:	bf00      	nop
 8003f68:	2400002c 	.word	0x2400002c
 8003f6c:	58024400 	.word	0x58024400
 8003f70:	431bde83 	.word	0x431bde83
 8003f74:	24000f9c 	.word	0x24000f9c
 8003f78:	40001000 	.word	0x40001000

08003f7c <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 8003f7c:	b480      	push	{r7}
 8003f7e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
 8003f80:	bf00      	nop
 8003f82:	e7fd      	b.n	8003f80 <NMI_Handler+0x4>

08003f84 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8003f84:	b480      	push	{r7}
 8003f86:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 8003f88:	bf00      	nop
 8003f8a:	e7fd      	b.n	8003f88 <HardFault_Handler+0x4>

08003f8c <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8003f8c:	b480      	push	{r7}
 8003f8e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 8003f90:	bf00      	nop
 8003f92:	e7fd      	b.n	8003f90 <MemManage_Handler+0x4>

08003f94 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8003f94:	b480      	push	{r7}
 8003f96:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 8003f98:	bf00      	nop
 8003f9a:	e7fd      	b.n	8003f98 <BusFault_Handler+0x4>

08003f9c <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8003f9c:	b480      	push	{r7}
 8003f9e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 8003fa0:	bf00      	nop
 8003fa2:	e7fd      	b.n	8003fa0 <UsageFault_Handler+0x4>

08003fa4 <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 8003fa4:	b480      	push	{r7}
 8003fa6:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 8003fa8:	bf00      	nop
 8003faa:	46bd      	mov	sp, r7
 8003fac:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003fb0:	4770      	bx	lr

08003fb2 <RCC_IRQHandler>:

/**
  * @brief This function handles RCC global interrupt.
  */
void RCC_IRQHandler(void)
{
 8003fb2:	b480      	push	{r7}
 8003fb4:	af00      	add	r7, sp, #0

  /* USER CODE END RCC_IRQn 0 */
  /* USER CODE BEGIN RCC_IRQn 1 */

  /* USER CODE END RCC_IRQn 1 */
}
 8003fb6:	bf00      	nop
 8003fb8:	46bd      	mov	sp, r7
 8003fba:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003fbe:	4770      	bx	lr

08003fc0 <USART1_IRQHandler>:

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
 8003fc0:	b580      	push	{r7, lr}
 8003fc2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8003fc4:	4802      	ldr	r0, [pc, #8]	@ (8003fd0 <USART1_IRQHandler+0x10>)
 8003fc6:	f009 fcf1 	bl	800d9ac <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}
 8003fca:	bf00      	nop
 8003fcc:	bd80      	pop	{r7, pc}
 8003fce:	bf00      	nop
 8003fd0:	24000314 	.word	0x24000314

08003fd4 <USART2_IRQHandler>:

/**
  * @brief This function handles USART2 global interrupt.
  */
void USART2_IRQHandler(void)
{
 8003fd4:	b580      	push	{r7, lr}
 8003fd6:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 8003fd8:	4802      	ldr	r0, [pc, #8]	@ (8003fe4 <USART2_IRQHandler+0x10>)
 8003fda:	f009 fce7 	bl	800d9ac <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART2_IRQn 1 */

  /* USER CODE END USART2_IRQn 1 */
}
 8003fde:	bf00      	nop
 8003fe0:	bd80      	pop	{r7, pc}
 8003fe2:	bf00      	nop
 8003fe4:	240003a8 	.word	0x240003a8

08003fe8 <USART3_IRQHandler>:

/**
  * @brief This function handles USART3 global interrupt.
  */
void USART3_IRQHandler(void)
{
 8003fe8:	b580      	push	{r7, lr}
 8003fea:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 8003fec:	4802      	ldr	r0, [pc, #8]	@ (8003ff8 <USART3_IRQHandler+0x10>)
 8003fee:	f009 fcdd 	bl	800d9ac <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART3_IRQn 1 */

  /* USER CODE END USART3_IRQn 1 */
}
 8003ff2:	bf00      	nop
 8003ff4:	bd80      	pop	{r7, pc}
 8003ff6:	bf00      	nop
 8003ff8:	2400043c 	.word	0x2400043c

08003ffc <TIM6_DAC_IRQHandler>:

/**
  * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
 8003ffc:	b580      	push	{r7, lr}
 8003ffe:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 8004000:	4802      	ldr	r0, [pc, #8]	@ (800400c <TIM6_DAC_IRQHandler+0x10>)
 8004002:	f009 f96d 	bl	800d2e0 <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */

  /* USER CODE END TIM6_DAC_IRQn 1 */
}
 8004006:	bf00      	nop
 8004008:	bd80      	pop	{r7, pc}
 800400a:	bf00      	nop
 800400c:	24000f9c 	.word	0x24000f9c

08004010 <ETH_IRQHandler>:

/**
  * @brief This function handles Ethernet global interrupt.
  */
void ETH_IRQHandler(void)
{
 8004010:	b580      	push	{r7, lr}
 8004012:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ETH_IRQn 0 */

  /* USER CODE END ETH_IRQn 0 */
  HAL_ETH_IRQHandler(&heth);
 8004014:	4802      	ldr	r0, [pc, #8]	@ (8004020 <ETH_IRQHandler+0x10>)
 8004016:	f004 fce5 	bl	80089e4 <HAL_ETH_IRQHandler>
  /* USER CODE BEGIN ETH_IRQn 1 */

  /* USER CODE END ETH_IRQn 1 */
}
 800401a:	bf00      	nop
 800401c:	bd80      	pop	{r7, pc}
 800401e:	bf00      	nop
 8004020:	240022cc 	.word	0x240022cc

08004024 <DMA2_Stream6_IRQHandler>:

/**
  * @brief This function handles DMA2 stream6 global interrupt.
  */
void DMA2_Stream6_IRQHandler(void)
{
 8004024:	b580      	push	{r7, lr}
 8004026:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */

  /* USER CODE END DMA2_Stream6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_tx);
 8004028:	4802      	ldr	r0, [pc, #8]	@ (8004034 <DMA2_Stream6_IRQHandler+0x10>)
 800402a:	f002 ffa1 	bl	8006f70 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */

  /* USER CODE END DMA2_Stream6_IRQn 1 */
}
 800402e:	bf00      	nop
 8004030:	bd80      	pop	{r7, pc}
 8004032:	bf00      	nop
 8004034:	240005dc 	.word	0x240005dc

08004038 <DMA2_Stream7_IRQHandler>:

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
 8004038:	b580      	push	{r7, lr}
 800403a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */

  /* USER CODE END DMA2_Stream7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_rx);
 800403c:	4802      	ldr	r0, [pc, #8]	@ (8004048 <DMA2_Stream7_IRQHandler+0x10>)
 800403e:	f002 ff97 	bl	8006f70 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}
 8004042:	bf00      	nop
 8004044:	bd80      	pop	{r7, pc}
 8004046:	bf00      	nop
 8004048:	24000564 	.word	0x24000564

0800404c <USART6_IRQHandler>:

/**
  * @brief This function handles USART6 global interrupt.
  */
void USART6_IRQHandler(void)
{
 800404c:	b580      	push	{r7, lr}
 800404e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART6_IRQn 0 */

  /* USER CODE END USART6_IRQn 0 */
  HAL_UART_IRQHandler(&huart6);
 8004050:	4802      	ldr	r0, [pc, #8]	@ (800405c <USART6_IRQHandler+0x10>)
 8004052:	f009 fcab 	bl	800d9ac <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART6_IRQn 1 */

  /* USER CODE END USART6_IRQn 1 */
}
 8004056:	bf00      	nop
 8004058:	bd80      	pop	{r7, pc}
 800405a:	bf00      	nop
 800405c:	240004d0 	.word	0x240004d0

08004060 <UART8_IRQHandler>:

/**
  * @brief This function handles UART8 global interrupt.
  */
void UART8_IRQHandler(void)
{
 8004060:	b580      	push	{r7, lr}
 8004062:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UART8_IRQn 0 */

  /* USER CODE END UART8_IRQn 0 */
  HAL_UART_IRQHandler(&huart8);
 8004064:	4802      	ldr	r0, [pc, #8]	@ (8004070 <UART8_IRQHandler+0x10>)
 8004066:	f009 fca1 	bl	800d9ac <HAL_UART_IRQHandler>
  /* USER CODE BEGIN UART8_IRQn 1 */

  /* USER CODE END UART8_IRQn 1 */
}
 800406a:	bf00      	nop
 800406c:	bd80      	pop	{r7, pc}
 800406e:	bf00      	nop
 8004070:	24000280 	.word	0x24000280

08004074 <_getpid>:
void initialise_monitor_handles()
{
}

int _getpid(void)
{
 8004074:	b480      	push	{r7}
 8004076:	af00      	add	r7, sp, #0
  return 1;
 8004078:	2301      	movs	r3, #1
}
 800407a:	4618      	mov	r0, r3
 800407c:	46bd      	mov	sp, r7
 800407e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004082:	4770      	bx	lr

08004084 <_kill>:

int _kill(int pid, int sig)
{
 8004084:	b480      	push	{r7}
 8004086:	b083      	sub	sp, #12
 8004088:	af00      	add	r7, sp, #0
 800408a:	6078      	str	r0, [r7, #4]
 800408c:	6039      	str	r1, [r7, #0]
  (void)pid;
  (void)sig;
  errno = EINVAL;
 800408e:	4b05      	ldr	r3, [pc, #20]	@ (80040a4 <_kill+0x20>)
 8004090:	2216      	movs	r2, #22
 8004092:	601a      	str	r2, [r3, #0]
  return -1;
 8004094:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8004098:	4618      	mov	r0, r3
 800409a:	370c      	adds	r7, #12
 800409c:	46bd      	mov	sp, r7
 800409e:	f85d 7b04 	ldr.w	r7, [sp], #4
 80040a2:	4770      	bx	lr
 80040a4:	2402b260 	.word	0x2402b260

080040a8 <_exit>:

void _exit (int status)
{
 80040a8:	b580      	push	{r7, lr}
 80040aa:	b082      	sub	sp, #8
 80040ac:	af00      	add	r7, sp, #0
 80040ae:	6078      	str	r0, [r7, #4]
  _kill(status, -1);
 80040b0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80040b4:	6878      	ldr	r0, [r7, #4]
 80040b6:	f7ff ffe5 	bl	8004084 <_kill>
  while (1) {}    /* Make sure we hang here */
 80040ba:	bf00      	nop
 80040bc:	e7fd      	b.n	80040ba <_exit+0x12>

080040be <_read>:
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 80040be:	b580      	push	{r7, lr}
 80040c0:	b086      	sub	sp, #24
 80040c2:	af00      	add	r7, sp, #0
 80040c4:	60f8      	str	r0, [r7, #12]
 80040c6:	60b9      	str	r1, [r7, #8]
 80040c8:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 80040ca:	2300      	movs	r3, #0
 80040cc:	617b      	str	r3, [r7, #20]
 80040ce:	e00a      	b.n	80040e6 <_read+0x28>
  {
    *ptr++ = __io_getchar();
 80040d0:	f3af 8000 	nop.w
 80040d4:	4601      	mov	r1, r0
 80040d6:	68bb      	ldr	r3, [r7, #8]
 80040d8:	1c5a      	adds	r2, r3, #1
 80040da:	60ba      	str	r2, [r7, #8]
 80040dc:	b2ca      	uxtb	r2, r1
 80040de:	701a      	strb	r2, [r3, #0]
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 80040e0:	697b      	ldr	r3, [r7, #20]
 80040e2:	3301      	adds	r3, #1
 80040e4:	617b      	str	r3, [r7, #20]
 80040e6:	697a      	ldr	r2, [r7, #20]
 80040e8:	687b      	ldr	r3, [r7, #4]
 80040ea:	429a      	cmp	r2, r3
 80040ec:	dbf0      	blt.n	80040d0 <_read+0x12>
  }

  return len;
 80040ee:	687b      	ldr	r3, [r7, #4]
}
 80040f0:	4618      	mov	r0, r3
 80040f2:	3718      	adds	r7, #24
 80040f4:	46bd      	mov	sp, r7
 80040f6:	bd80      	pop	{r7, pc}

080040f8 <_write>:

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
 80040f8:	b580      	push	{r7, lr}
 80040fa:	b086      	sub	sp, #24
 80040fc:	af00      	add	r7, sp, #0
 80040fe:	60f8      	str	r0, [r7, #12]
 8004100:	60b9      	str	r1, [r7, #8]
 8004102:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8004104:	2300      	movs	r3, #0
 8004106:	617b      	str	r3, [r7, #20]
 8004108:	e009      	b.n	800411e <_write+0x26>
  {
    __io_putchar(*ptr++);
 800410a:	68bb      	ldr	r3, [r7, #8]
 800410c:	1c5a      	adds	r2, r3, #1
 800410e:	60ba      	str	r2, [r7, #8]
 8004110:	781b      	ldrb	r3, [r3, #0]
 8004112:	4618      	mov	r0, r3
 8004114:	f7fd fdd0 	bl	8001cb8 <__io_putchar>
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 8004118:	697b      	ldr	r3, [r7, #20]
 800411a:	3301      	adds	r3, #1
 800411c:	617b      	str	r3, [r7, #20]
 800411e:	697a      	ldr	r2, [r7, #20]
 8004120:	687b      	ldr	r3, [r7, #4]
 8004122:	429a      	cmp	r2, r3
 8004124:	dbf1      	blt.n	800410a <_write+0x12>
//	  ITM_SendChar(*ptr++);
  }
  return len;
 8004126:	687b      	ldr	r3, [r7, #4]
}
 8004128:	4618      	mov	r0, r3
 800412a:	3718      	adds	r7, #24
 800412c:	46bd      	mov	sp, r7
 800412e:	bd80      	pop	{r7, pc}

08004130 <_close>:

int _close(int file)
{
 8004130:	b480      	push	{r7}
 8004132:	b083      	sub	sp, #12
 8004134:	af00      	add	r7, sp, #0
 8004136:	6078      	str	r0, [r7, #4]
  (void)file;
  return -1;
 8004138:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 800413c:	4618      	mov	r0, r3
 800413e:	370c      	adds	r7, #12
 8004140:	46bd      	mov	sp, r7
 8004142:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004146:	4770      	bx	lr

08004148 <_fstat>:


int _fstat(int file, struct stat *st)
{
 8004148:	b480      	push	{r7}
 800414a:	b083      	sub	sp, #12
 800414c:	af00      	add	r7, sp, #0
 800414e:	6078      	str	r0, [r7, #4]
 8004150:	6039      	str	r1, [r7, #0]
  (void)file;
  st->st_mode = S_IFCHR;
 8004152:	683b      	ldr	r3, [r7, #0]
 8004154:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
 8004158:	605a      	str	r2, [r3, #4]
  return 0;
 800415a:	2300      	movs	r3, #0
}
 800415c:	4618      	mov	r0, r3
 800415e:	370c      	adds	r7, #12
 8004160:	46bd      	mov	sp, r7
 8004162:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004166:	4770      	bx	lr

08004168 <_isatty>:

int _isatty(int file)
{
 8004168:	b480      	push	{r7}
 800416a:	b083      	sub	sp, #12
 800416c:	af00      	add	r7, sp, #0
 800416e:	6078      	str	r0, [r7, #4]
  (void)file;
  return 1;
 8004170:	2301      	movs	r3, #1
}
 8004172:	4618      	mov	r0, r3
 8004174:	370c      	adds	r7, #12
 8004176:	46bd      	mov	sp, r7
 8004178:	f85d 7b04 	ldr.w	r7, [sp], #4
 800417c:	4770      	bx	lr

0800417e <_lseek>:

int _lseek(int file, int ptr, int dir)
{
 800417e:	b480      	push	{r7}
 8004180:	b085      	sub	sp, #20
 8004182:	af00      	add	r7, sp, #0
 8004184:	60f8      	str	r0, [r7, #12]
 8004186:	60b9      	str	r1, [r7, #8]
 8004188:	607a      	str	r2, [r7, #4]
  (void)file;
  (void)ptr;
  (void)dir;
  return 0;
 800418a:	2300      	movs	r3, #0
}
 800418c:	4618      	mov	r0, r3
 800418e:	3714      	adds	r7, #20
 8004190:	46bd      	mov	sp, r7
 8004192:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004196:	4770      	bx	lr

08004198 <_sbrk>:
 *
 * @param incr Memory size
 * @return Pointer to allocated memory
 */
void *_sbrk(ptrdiff_t incr)
{
 8004198:	b480      	push	{r7}
 800419a:	b087      	sub	sp, #28
 800419c:	af00      	add	r7, sp, #0
 800419e:	6078      	str	r0, [r7, #4]
  extern uint8_t _end; /* Symbol defined in the linker script */
  extern uint8_t _estack; /* Symbol defined in the linker script */
  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
 80041a0:	4a14      	ldr	r2, [pc, #80]	@ (80041f4 <_sbrk+0x5c>)
 80041a2:	4b15      	ldr	r3, [pc, #84]	@ (80041f8 <_sbrk+0x60>)
 80041a4:	1ad3      	subs	r3, r2, r3
 80041a6:	617b      	str	r3, [r7, #20]
  const uint8_t *max_heap = (uint8_t *)stack_limit;
 80041a8:	697b      	ldr	r3, [r7, #20]
 80041aa:	613b      	str	r3, [r7, #16]
  uint8_t *prev_heap_end;

  /* Initialize heap end at first call */
  if (NULL == __sbrk_heap_end)
 80041ac:	4b13      	ldr	r3, [pc, #76]	@ (80041fc <_sbrk+0x64>)
 80041ae:	681b      	ldr	r3, [r3, #0]
 80041b0:	2b00      	cmp	r3, #0
 80041b2:	d102      	bne.n	80041ba <_sbrk+0x22>
  {
    __sbrk_heap_end = &_end;
 80041b4:	4b11      	ldr	r3, [pc, #68]	@ (80041fc <_sbrk+0x64>)
 80041b6:	4a12      	ldr	r2, [pc, #72]	@ (8004200 <_sbrk+0x68>)
 80041b8:	601a      	str	r2, [r3, #0]
  }

  /* Protect heap from growing into the reserved MSP stack */
  if (__sbrk_heap_end + incr > max_heap)
 80041ba:	4b10      	ldr	r3, [pc, #64]	@ (80041fc <_sbrk+0x64>)
 80041bc:	681a      	ldr	r2, [r3, #0]
 80041be:	687b      	ldr	r3, [r7, #4]
 80041c0:	4413      	add	r3, r2
 80041c2:	693a      	ldr	r2, [r7, #16]
 80041c4:	429a      	cmp	r2, r3
 80041c6:	d205      	bcs.n	80041d4 <_sbrk+0x3c>
  {
    errno = ENOMEM;
 80041c8:	4b0e      	ldr	r3, [pc, #56]	@ (8004204 <_sbrk+0x6c>)
 80041ca:	220c      	movs	r2, #12
 80041cc:	601a      	str	r2, [r3, #0]
    return (void *)-1;
 80041ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80041d2:	e009      	b.n	80041e8 <_sbrk+0x50>
  }

  prev_heap_end = __sbrk_heap_end;
 80041d4:	4b09      	ldr	r3, [pc, #36]	@ (80041fc <_sbrk+0x64>)
 80041d6:	681b      	ldr	r3, [r3, #0]
 80041d8:	60fb      	str	r3, [r7, #12]
  __sbrk_heap_end += incr;
 80041da:	4b08      	ldr	r3, [pc, #32]	@ (80041fc <_sbrk+0x64>)
 80041dc:	681a      	ldr	r2, [r3, #0]
 80041de:	687b      	ldr	r3, [r7, #4]
 80041e0:	4413      	add	r3, r2
 80041e2:	4a06      	ldr	r2, [pc, #24]	@ (80041fc <_sbrk+0x64>)
 80041e4:	6013      	str	r3, [r2, #0]

  return (void *)prev_heap_end;
 80041e6:	68fb      	ldr	r3, [r7, #12]
}
 80041e8:	4618      	mov	r0, r3
 80041ea:	371c      	adds	r7, #28
 80041ec:	46bd      	mov	sp, r7
 80041ee:	f85d 7b04 	ldr.w	r7, [sp], #4
 80041f2:	4770      	bx	lr
 80041f4:	24060000 	.word	0x24060000
 80041f8:	00000400 	.word	0x00000400
 80041fc:	24000fe8 	.word	0x24000fe8
 8004200:	2402b268 	.word	0x2402b268
 8004204:	2402b260 	.word	0x2402b260

08004208 <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{
 8004208:	b480      	push	{r7}
 800420a:	af00      	add	r7, sp, #0
 __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */

  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
 800420c:	4b37      	ldr	r3, [pc, #220]	@ (80042ec <SystemInit+0xe4>)
 800420e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8004212:	4a36      	ldr	r2, [pc, #216]	@ (80042ec <SystemInit+0xe4>)
 8004214:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8004218:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/

   /* Increasing the CPU frequency */
  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 800421c:	4b34      	ldr	r3, [pc, #208]	@ (80042f0 <SystemInit+0xe8>)
 800421e:	681b      	ldr	r3, [r3, #0]
 8004220:	f003 030f 	and.w	r3, r3, #15
 8004224:	2b06      	cmp	r3, #6
 8004226:	d807      	bhi.n	8004238 <SystemInit+0x30>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8004228:	4b31      	ldr	r3, [pc, #196]	@ (80042f0 <SystemInit+0xe8>)
 800422a:	681b      	ldr	r3, [r3, #0]
 800422c:	f023 030f 	bic.w	r3, r3, #15
 8004230:	4a2f      	ldr	r2, [pc, #188]	@ (80042f0 <SystemInit+0xe8>)
 8004232:	f043 0307 	orr.w	r3, r3, #7
 8004236:	6013      	str	r3, [r2, #0]
  }

  /* Set HSION bit */
  RCC->CR |= RCC_CR_HSION;
 8004238:	4b2e      	ldr	r3, [pc, #184]	@ (80042f4 <SystemInit+0xec>)
 800423a:	681b      	ldr	r3, [r3, #0]
 800423c:	4a2d      	ldr	r2, [pc, #180]	@ (80042f4 <SystemInit+0xec>)
 800423e:	f043 0301 	orr.w	r3, r3, #1
 8004242:	6013      	str	r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8004244:	4b2b      	ldr	r3, [pc, #172]	@ (80042f4 <SystemInit+0xec>)
 8004246:	2200      	movs	r2, #0
 8004248:	611a      	str	r2, [r3, #16]

  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
  RCC->CR &= 0xEAF6ED7FU;
 800424a:	4b2a      	ldr	r3, [pc, #168]	@ (80042f4 <SystemInit+0xec>)
 800424c:	681a      	ldr	r2, [r3, #0]
 800424e:	4929      	ldr	r1, [pc, #164]	@ (80042f4 <SystemInit+0xec>)
 8004250:	4b29      	ldr	r3, [pc, #164]	@ (80042f8 <SystemInit+0xf0>)
 8004252:	4013      	ands	r3, r2
 8004254:	600b      	str	r3, [r1, #0]

   /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8004256:	4b26      	ldr	r3, [pc, #152]	@ (80042f0 <SystemInit+0xe8>)
 8004258:	681b      	ldr	r3, [r3, #0]
 800425a:	f003 0308 	and.w	r3, r3, #8
 800425e:	2b00      	cmp	r3, #0
 8004260:	d007      	beq.n	8004272 <SystemInit+0x6a>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8004262:	4b23      	ldr	r3, [pc, #140]	@ (80042f0 <SystemInit+0xe8>)
 8004264:	681b      	ldr	r3, [r3, #0]
 8004266:	f023 030f 	bic.w	r3, r3, #15
 800426a:	4a21      	ldr	r2, [pc, #132]	@ (80042f0 <SystemInit+0xe8>)
 800426c:	f043 0307 	orr.w	r3, r3, #7
 8004270:	6013      	str	r3, [r2, #0]
  }

#if defined(D3_SRAM_BASE)
  /* Reset D1CFGR register */
  RCC->D1CFGR = 0x00000000;
 8004272:	4b20      	ldr	r3, [pc, #128]	@ (80042f4 <SystemInit+0xec>)
 8004274:	2200      	movs	r2, #0
 8004276:	619a      	str	r2, [r3, #24]

  /* Reset D2CFGR register */
  RCC->D2CFGR = 0x00000000;
 8004278:	4b1e      	ldr	r3, [pc, #120]	@ (80042f4 <SystemInit+0xec>)
 800427a:	2200      	movs	r2, #0
 800427c:	61da      	str	r2, [r3, #28]

  /* Reset D3CFGR register */
  RCC->D3CFGR = 0x00000000;
 800427e:	4b1d      	ldr	r3, [pc, #116]	@ (80042f4 <SystemInit+0xec>)
 8004280:	2200      	movs	r2, #0
 8004282:	621a      	str	r2, [r3, #32]

  /* Reset SRDCFGR register */
  RCC->SRDCFGR = 0x00000000;
#endif
  /* Reset PLLCKSELR register */
  RCC->PLLCKSELR = 0x02020200;
 8004284:	4b1b      	ldr	r3, [pc, #108]	@ (80042f4 <SystemInit+0xec>)
 8004286:	4a1d      	ldr	r2, [pc, #116]	@ (80042fc <SystemInit+0xf4>)
 8004288:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x01FF0000;
 800428a:	4b1a      	ldr	r3, [pc, #104]	@ (80042f4 <SystemInit+0xec>)
 800428c:	4a1c      	ldr	r2, [pc, #112]	@ (8004300 <SystemInit+0xf8>)
 800428e:	62da      	str	r2, [r3, #44]	@ 0x2c
  /* Reset PLL1DIVR register */
  RCC->PLL1DIVR = 0x01010280;
 8004290:	4b18      	ldr	r3, [pc, #96]	@ (80042f4 <SystemInit+0xec>)
 8004292:	4a1c      	ldr	r2, [pc, #112]	@ (8004304 <SystemInit+0xfc>)
 8004294:	631a      	str	r2, [r3, #48]	@ 0x30
  /* Reset PLL1FRACR register */
  RCC->PLL1FRACR = 0x00000000;
 8004296:	4b17      	ldr	r3, [pc, #92]	@ (80042f4 <SystemInit+0xec>)
 8004298:	2200      	movs	r2, #0
 800429a:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Reset PLL2DIVR register */
  RCC->PLL2DIVR = 0x01010280;
 800429c:	4b15      	ldr	r3, [pc, #84]	@ (80042f4 <SystemInit+0xec>)
 800429e:	4a19      	ldr	r2, [pc, #100]	@ (8004304 <SystemInit+0xfc>)
 80042a0:	639a      	str	r2, [r3, #56]	@ 0x38

  /* Reset PLL2FRACR register */

  RCC->PLL2FRACR = 0x00000000;
 80042a2:	4b14      	ldr	r3, [pc, #80]	@ (80042f4 <SystemInit+0xec>)
 80042a4:	2200      	movs	r2, #0
 80042a6:	63da      	str	r2, [r3, #60]	@ 0x3c
  /* Reset PLL3DIVR register */
  RCC->PLL3DIVR = 0x01010280;
 80042a8:	4b12      	ldr	r3, [pc, #72]	@ (80042f4 <SystemInit+0xec>)
 80042aa:	4a16      	ldr	r2, [pc, #88]	@ (8004304 <SystemInit+0xfc>)
 80042ac:	641a      	str	r2, [r3, #64]	@ 0x40

  /* Reset PLL3FRACR register */
  RCC->PLL3FRACR = 0x00000000;
 80042ae:	4b11      	ldr	r3, [pc, #68]	@ (80042f4 <SystemInit+0xec>)
 80042b0:	2200      	movs	r2, #0
 80042b2:	645a      	str	r2, [r3, #68]	@ 0x44

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 80042b4:	4b0f      	ldr	r3, [pc, #60]	@ (80042f4 <SystemInit+0xec>)
 80042b6:	681b      	ldr	r3, [r3, #0]
 80042b8:	4a0e      	ldr	r2, [pc, #56]	@ (80042f4 <SystemInit+0xec>)
 80042ba:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 80042be:	6013      	str	r3, [r2, #0]

  /* Disable all interrupts */
  RCC->CIER = 0x00000000;
 80042c0:	4b0c      	ldr	r3, [pc, #48]	@ (80042f4 <SystemInit+0xec>)
 80042c2:	2200      	movs	r2, #0
 80042c4:	661a      	str	r2, [r3, #96]	@ 0x60

#if (STM32H7_DEV_ID == 0x450UL)
  /* dual core CM7 or single core line */
  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
 80042c6:	4b10      	ldr	r3, [pc, #64]	@ (8004308 <SystemInit+0x100>)
 80042c8:	681a      	ldr	r2, [r3, #0]
 80042ca:	4b10      	ldr	r3, [pc, #64]	@ (800430c <SystemInit+0x104>)
 80042cc:	4013      	ands	r3, r2
 80042ce:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 80042d2:	d202      	bcs.n	80042da <SystemInit+0xd2>
  {
    /* if stm32h7 revY*/
    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
    *((__IO uint32_t*)0x51008108) = 0x000000001U;
 80042d4:	4b0e      	ldr	r3, [pc, #56]	@ (8004310 <SystemInit+0x108>)
 80042d6:	2201      	movs	r2, #1
 80042d8:	601a      	str	r2, [r3, #0]
  /*
   * Disable the FMC bank1 (enabled after reset).
   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
   */
  FMC_Bank1_R->BTCR[0] = 0x000030D2;
 80042da:	4b0e      	ldr	r3, [pc, #56]	@ (8004314 <SystemInit+0x10c>)
 80042dc:	f243 02d2 	movw	r2, #12498	@ 0x30d2
 80042e0:	601a      	str	r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */

#endif /*DUAL_CORE && CORE_CM4*/
}
 80042e2:	bf00      	nop
 80042e4:	46bd      	mov	sp, r7
 80042e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80042ea:	4770      	bx	lr
 80042ec:	e000ed00 	.word	0xe000ed00
 80042f0:	52002000 	.word	0x52002000
 80042f4:	58024400 	.word	0x58024400
 80042f8:	eaf6ed7f 	.word	0xeaf6ed7f
 80042fc:	02020200 	.word	0x02020200
 8004300:	01ff0000 	.word	0x01ff0000
 8004304:	01010280 	.word	0x01010280
 8004308:	5c001000 	.word	0x5c001000
 800430c:	ffff0000 	.word	0xffff0000
 8004310:	51008108 	.word	0x51008108
 8004314:	52004000 	.word	0x52004000

08004318 <UartTasksInit>:
osMutexId_t resMeasurementsMutex;
osMutexId_t sensorsInfoMutex;

extern RNG_HandleTypeDef hrng;

void UartTasksInit (void) {
 8004318:	b580      	push	{r7, lr}
 800431a:	af00      	add	r7, sp, #0
    uart1TaskData.uartRxBuffer    = uart1RxBuffer;
 800431c:	4b4e      	ldr	r3, [pc, #312]	@ (8004458 <UartTasksInit+0x140>)
 800431e:	4a4f      	ldr	r2, [pc, #316]	@ (800445c <UartTasksInit+0x144>)
 8004320:	601a      	str	r2, [r3, #0]
    uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
 8004322:	4b4d      	ldr	r3, [pc, #308]	@ (8004458 <UartTasksInit+0x140>)
 8004324:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004328:	809a      	strh	r2, [r3, #4]
    uart1TaskData.uartTxBuffer    = uart1TxBuffer;
 800432a:	4b4b      	ldr	r3, [pc, #300]	@ (8004458 <UartTasksInit+0x140>)
 800432c:	4a4c      	ldr	r2, [pc, #304]	@ (8004460 <UartTasksInit+0x148>)
 800432e:	609a      	str	r2, [r3, #8]
    uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
 8004330:	4b49      	ldr	r3, [pc, #292]	@ (8004458 <UartTasksInit+0x140>)
 8004332:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004336:	809a      	strh	r2, [r3, #4]
    uart1TaskData.frameData       = uart1TaskFrameData;
 8004338:	4b47      	ldr	r3, [pc, #284]	@ (8004458 <UartTasksInit+0x140>)
 800433a:	4a4a      	ldr	r2, [pc, #296]	@ (8004464 <UartTasksInit+0x14c>)
 800433c:	611a      	str	r2, [r3, #16]
    uart1TaskData.frameDataLen    = UART1_RX_BUFF_SIZE;
 800433e:	4b46      	ldr	r3, [pc, #280]	@ (8004458 <UartTasksInit+0x140>)
 8004340:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004344:	829a      	strh	r2, [r3, #20]
    uart1TaskData.huart           = &huart1;
 8004346:	4b44      	ldr	r3, [pc, #272]	@ (8004458 <UartTasksInit+0x140>)
 8004348:	4a47      	ldr	r2, [pc, #284]	@ (8004468 <UartTasksInit+0x150>)
 800434a:	631a      	str	r2, [r3, #48]	@ 0x30
    uart1TaskData.uartNumber      = 1;
 800434c:	4b42      	ldr	r3, [pc, #264]	@ (8004458 <UartTasksInit+0x140>)
 800434e:	2201      	movs	r2, #1
 8004350:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart2TaskData.uartRxBuffer    = uart2RxBuffer;
 8004354:	4b45      	ldr	r3, [pc, #276]	@ (800446c <UartTasksInit+0x154>)
 8004356:	4a46      	ldr	r2, [pc, #280]	@ (8004470 <UartTasksInit+0x158>)
 8004358:	601a      	str	r2, [r3, #0]
    uart2TaskData.uartRxBufferLen = UART2_RX_BUFF_SIZE;
 800435a:	4b44      	ldr	r3, [pc, #272]	@ (800446c <UartTasksInit+0x154>)
 800435c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004360:	809a      	strh	r2, [r3, #4]
    uart2TaskData.uartTxBuffer    = uart2TxBuffer;
 8004362:	4b42      	ldr	r3, [pc, #264]	@ (800446c <UartTasksInit+0x154>)
 8004364:	4a43      	ldr	r2, [pc, #268]	@ (8004474 <UartTasksInit+0x15c>)
 8004366:	609a      	str	r2, [r3, #8]
    uart2TaskData.uartRxBufferLen = UART2_TX_BUFF_SIZE;
 8004368:	4b40      	ldr	r3, [pc, #256]	@ (800446c <UartTasksInit+0x154>)
 800436a:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800436e:	809a      	strh	r2, [r3, #4]
    uart2TaskData.frameData       = uart2TaskFrameData;
 8004370:	4b3e      	ldr	r3, [pc, #248]	@ (800446c <UartTasksInit+0x154>)
 8004372:	4a41      	ldr	r2, [pc, #260]	@ (8004478 <UartTasksInit+0x160>)
 8004374:	611a      	str	r2, [r3, #16]
    uart2TaskData.frameDataLen    = UART2_RX_BUFF_SIZE;
 8004376:	4b3d      	ldr	r3, [pc, #244]	@ (800446c <UartTasksInit+0x154>)
 8004378:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800437c:	829a      	strh	r2, [r3, #20]
    uart2TaskData.huart           = &huart2;
 800437e:	4b3b      	ldr	r3, [pc, #236]	@ (800446c <UartTasksInit+0x154>)
 8004380:	4a3e      	ldr	r2, [pc, #248]	@ (800447c <UartTasksInit+0x164>)
 8004382:	631a      	str	r2, [r3, #48]	@ 0x30
    uart2TaskData.uartNumber      = 2;
 8004384:	4b39      	ldr	r3, [pc, #228]	@ (800446c <UartTasksInit+0x154>)
 8004386:	2202      	movs	r2, #2
 8004388:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart3TaskData.uartRxBuffer    = uart3RxBuffer;
 800438c:	4b3c      	ldr	r3, [pc, #240]	@ (8004480 <UartTasksInit+0x168>)
 800438e:	4a3d      	ldr	r2, [pc, #244]	@ (8004484 <UartTasksInit+0x16c>)
 8004390:	601a      	str	r2, [r3, #0]
    uart3TaskData.uartRxBufferLen = UART3_RX_BUFF_SIZE;
 8004392:	4b3b      	ldr	r3, [pc, #236]	@ (8004480 <UartTasksInit+0x168>)
 8004394:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004398:	809a      	strh	r2, [r3, #4]
    uart3TaskData.uartTxBuffer    = uart3TxBuffer;
 800439a:	4b39      	ldr	r3, [pc, #228]	@ (8004480 <UartTasksInit+0x168>)
 800439c:	4a3a      	ldr	r2, [pc, #232]	@ (8004488 <UartTasksInit+0x170>)
 800439e:	609a      	str	r2, [r3, #8]
    uart3TaskData.uartRxBufferLen = UART3_TX_BUFF_SIZE;
 80043a0:	4b37      	ldr	r3, [pc, #220]	@ (8004480 <UartTasksInit+0x168>)
 80043a2:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80043a6:	809a      	strh	r2, [r3, #4]
    uart3TaskData.frameData       = uart3TaskFrameData;
 80043a8:	4b35      	ldr	r3, [pc, #212]	@ (8004480 <UartTasksInit+0x168>)
 80043aa:	4a38      	ldr	r2, [pc, #224]	@ (800448c <UartTasksInit+0x174>)
 80043ac:	611a      	str	r2, [r3, #16]
    uart3TaskData.frameDataLen    = UART3_RX_BUFF_SIZE;
 80043ae:	4b34      	ldr	r3, [pc, #208]	@ (8004480 <UartTasksInit+0x168>)
 80043b0:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80043b4:	829a      	strh	r2, [r3, #20]
    uart3TaskData.huart           = &huart3;
 80043b6:	4b32      	ldr	r3, [pc, #200]	@ (8004480 <UartTasksInit+0x168>)
 80043b8:	4a35      	ldr	r2, [pc, #212]	@ (8004490 <UartTasksInit+0x178>)
 80043ba:	631a      	str	r2, [r3, #48]	@ 0x30
    uart3TaskData.uartNumber      = 3;
 80043bc:	4b30      	ldr	r3, [pc, #192]	@ (8004480 <UartTasksInit+0x168>)
 80043be:	2203      	movs	r2, #3
 80043c0:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart6TaskData.uartRxBuffer    = uart6RxBuffer;
 80043c4:	4b33      	ldr	r3, [pc, #204]	@ (8004494 <UartTasksInit+0x17c>)
 80043c6:	4a34      	ldr	r2, [pc, #208]	@ (8004498 <UartTasksInit+0x180>)
 80043c8:	601a      	str	r2, [r3, #0]
    uart6TaskData.uartRxBufferLen = UART6_RX_BUFF_SIZE;
 80043ca:	4b32      	ldr	r3, [pc, #200]	@ (8004494 <UartTasksInit+0x17c>)
 80043cc:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80043d0:	809a      	strh	r2, [r3, #4]
    uart6TaskData.uartTxBuffer    = uart6TxBuffer;
 80043d2:	4b30      	ldr	r3, [pc, #192]	@ (8004494 <UartTasksInit+0x17c>)
 80043d4:	4a31      	ldr	r2, [pc, #196]	@ (800449c <UartTasksInit+0x184>)
 80043d6:	609a      	str	r2, [r3, #8]
    uart6TaskData.uartRxBufferLen = UART6_TX_BUFF_SIZE;
 80043d8:	4b2e      	ldr	r3, [pc, #184]	@ (8004494 <UartTasksInit+0x17c>)
 80043da:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80043de:	809a      	strh	r2, [r3, #4]
    uart6TaskData.frameData       = uart6TaskFrameData;
 80043e0:	4b2c      	ldr	r3, [pc, #176]	@ (8004494 <UartTasksInit+0x17c>)
 80043e2:	4a2f      	ldr	r2, [pc, #188]	@ (80044a0 <UartTasksInit+0x188>)
 80043e4:	611a      	str	r2, [r3, #16]
    uart6TaskData.frameDataLen    = UART6_RX_BUFF_SIZE;
 80043e6:	4b2b      	ldr	r3, [pc, #172]	@ (8004494 <UartTasksInit+0x17c>)
 80043e8:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80043ec:	829a      	strh	r2, [r3, #20]
    uart6TaskData.huart           = &huart6;
 80043ee:	4b29      	ldr	r3, [pc, #164]	@ (8004494 <UartTasksInit+0x17c>)
 80043f0:	4a2c      	ldr	r2, [pc, #176]	@ (80044a4 <UartTasksInit+0x18c>)
 80043f2:	631a      	str	r2, [r3, #48]	@ 0x30
    uart6TaskData.uartNumber      = 6;
 80043f4:	4b27      	ldr	r3, [pc, #156]	@ (8004494 <UartTasksInit+0x17c>)
 80043f6:	2206      	movs	r2, #6
 80043f8:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart8TaskData.uartRxBuffer    = uart8RxBuffer;
 80043fc:	4b2a      	ldr	r3, [pc, #168]	@ (80044a8 <UartTasksInit+0x190>)
 80043fe:	4a2b      	ldr	r2, [pc, #172]	@ (80044ac <UartTasksInit+0x194>)
 8004400:	601a      	str	r2, [r3, #0]
    uart8TaskData.uartRxBufferLen = UART8_RX_BUFF_SIZE;
 8004402:	4b29      	ldr	r3, [pc, #164]	@ (80044a8 <UartTasksInit+0x190>)
 8004404:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004408:	809a      	strh	r2, [r3, #4]
    uart8TaskData.uartTxBuffer    = uart8TxBuffer;
 800440a:	4b27      	ldr	r3, [pc, #156]	@ (80044a8 <UartTasksInit+0x190>)
 800440c:	4a28      	ldr	r2, [pc, #160]	@ (80044b0 <UartTasksInit+0x198>)
 800440e:	609a      	str	r2, [r3, #8]
    uart8TaskData.uartRxBufferLen = UART8_TX_BUFF_SIZE;
 8004410:	4b25      	ldr	r3, [pc, #148]	@ (80044a8 <UartTasksInit+0x190>)
 8004412:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004416:	809a      	strh	r2, [r3, #4]
    uart8TaskData.frameData       = uart8TaskFrameData;
 8004418:	4b23      	ldr	r3, [pc, #140]	@ (80044a8 <UartTasksInit+0x190>)
 800441a:	4a26      	ldr	r2, [pc, #152]	@ (80044b4 <UartTasksInit+0x19c>)
 800441c:	611a      	str	r2, [r3, #16]
    uart8TaskData.frameDataLen    = UART8_RX_BUFF_SIZE;
 800441e:	4b22      	ldr	r3, [pc, #136]	@ (80044a8 <UartTasksInit+0x190>)
 8004420:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004424:	829a      	strh	r2, [r3, #20]
    uart8TaskData.huart           = &huart8;
 8004426:	4b20      	ldr	r3, [pc, #128]	@ (80044a8 <UartTasksInit+0x190>)
 8004428:	4a23      	ldr	r2, [pc, #140]	@ (80044b8 <UartTasksInit+0x1a0>)
 800442a:	631a      	str	r2, [r3, #48]	@ 0x30
    uart8TaskData.uartNumber      = 8;
 800442c:	4b1e      	ldr	r3, [pc, #120]	@ (80044a8 <UartTasksInit+0x190>)
 800442e:	2208      	movs	r2, #8
 8004430:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    UartTaskCreate (&uart1TaskData);
 8004434:	4808      	ldr	r0, [pc, #32]	@ (8004458 <UartTasksInit+0x140>)
 8004436:	f000 f841 	bl	80044bc <UartTaskCreate>
    UartTaskCreate (&uart2TaskData);
 800443a:	480c      	ldr	r0, [pc, #48]	@ (800446c <UartTasksInit+0x154>)
 800443c:	f000 f83e 	bl	80044bc <UartTaskCreate>
    UartTaskCreate (&uart3TaskData);
 8004440:	480f      	ldr	r0, [pc, #60]	@ (8004480 <UartTasksInit+0x168>)
 8004442:	f000 f83b 	bl	80044bc <UartTaskCreate>
    UartTaskCreate (&uart6TaskData);
 8004446:	4813      	ldr	r0, [pc, #76]	@ (8004494 <UartTasksInit+0x17c>)
 8004448:	f000 f838 	bl	80044bc <UartTaskCreate>
    UartTaskCreate (&uart8TaskData);
 800444c:	4816      	ldr	r0, [pc, #88]	@ (80044a8 <UartTasksInit+0x190>)
 800444e:	f000 f835 	bl	80044bc <UartTaskCreate>
}
 8004452:	bf00      	nop
 8004454:	bd80      	pop	{r7, pc}
 8004456:	bf00      	nop
 8004458:	24001eec 	.word	0x24001eec
 800445c:	24000fec 	.word	0x24000fec
 8004460:	240010ec 	.word	0x240010ec
 8004464:	240011ec 	.word	0x240011ec
 8004468:	24000314 	.word	0x24000314
 800446c:	24001f94 	.word	0x24001f94
 8004470:	240012ec 	.word	0x240012ec
 8004474:	240013ec 	.word	0x240013ec
 8004478:	240014ec 	.word	0x240014ec
 800447c:	240003a8 	.word	0x240003a8
 8004480:	24001f24 	.word	0x24001f24
 8004484:	240015ec 	.word	0x240015ec
 8004488:	240016ec 	.word	0x240016ec
 800448c:	240017ec 	.word	0x240017ec
 8004490:	2400043c 	.word	0x2400043c
 8004494:	24001f5c 	.word	0x24001f5c
 8004498:	240018ec 	.word	0x240018ec
 800449c:	240019ec 	.word	0x240019ec
 80044a0:	24001aec 	.word	0x24001aec
 80044a4:	240004d0 	.word	0x240004d0
 80044a8:	24001fcc 	.word	0x24001fcc
 80044ac:	24001bec 	.word	0x24001bec
 80044b0:	24001cec 	.word	0x24001cec
 80044b4:	24001dec 	.word	0x24001dec
 80044b8:	24000280 	.word	0x24000280

080044bc <UartTaskCreate>:

void UartTaskCreate (UartTaskData* uartTaskData) {
 80044bc:	b580      	push	{r7, lr}
 80044be:	b09a      	sub	sp, #104	@ 0x68
 80044c0:	af00      	add	r7, sp, #0
 80044c2:	6078      	str	r0, [r7, #4]
    osThreadAttr_t osThreadAttrRxUart = { 0 };
 80044c4:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 80044c8:	2224      	movs	r2, #36	@ 0x24
 80044ca:	2100      	movs	r1, #0
 80044cc:	4618      	mov	r0, r3
 80044ce:	f026 fad7 	bl	802aa80 <memset>
    osThreadAttr_t osThreadAttrTxUart = { 0 };
 80044d2:	f107 0320 	add.w	r3, r7, #32
 80044d6:	2224      	movs	r2, #36	@ 0x24
 80044d8:	2100      	movs	r1, #0
 80044da:	4618      	mov	r0, r3
 80044dc:	f026 fad0 	bl	802aa80 <memset>

    uartTaskData->processRxDataMsgBuffer = xMessageBufferCreate (INPUT_DATA_BUFF_SIZE);
 80044e0:	2201      	movs	r2, #1
 80044e2:	2100      	movs	r1, #0
 80044e4:	f44f 7080 	mov.w	r0, #256	@ 0x100
 80044e8:	f00e fe16 	bl	8013118 <xStreamBufferGenericCreate>
 80044ec:	4602      	mov	r2, r0
 80044ee:	687b      	ldr	r3, [r7, #4]
 80044f0:	625a      	str	r2, [r3, #36]	@ 0x24
    uartTaskData->processDataCb          = NULL;
 80044f2:	687b      	ldr	r3, [r7, #4]
 80044f4:	2200      	movs	r2, #0
 80044f6:	629a      	str	r2, [r3, #40]	@ 0x28

    //    osThreadAttrRxUart.name       = "os_thread_uart1_rx";
    osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
 80044f8:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 80044fc:	65bb      	str	r3, [r7, #88]	@ 0x58
    osThreadAttrRxUart.priority   = (osPriority_t)osPriorityHigh;
 80044fe:	2328      	movs	r3, #40	@ 0x28
 8004500:	65fb      	str	r3, [r7, #92]	@ 0x5c


    uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
 8004502:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8004506:	461a      	mov	r2, r3
 8004508:	6879      	ldr	r1, [r7, #4]
 800450a:	4816      	ldr	r0, [pc, #88]	@ (8004564 <UartTaskCreate+0xa8>)
 800450c:	f00c fe83 	bl	8011216 <osThreadNew>
 8004510:	4602      	mov	r2, r0
 8004512:	687b      	ldr	r3, [r7, #4]
 8004514:	619a      	str	r2, [r3, #24]


    osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
 8004516:	f107 0308 	add.w	r3, r7, #8
 800451a:	2200      	movs	r2, #0
 800451c:	601a      	str	r2, [r3, #0]
 800451e:	605a      	str	r2, [r3, #4]
 8004520:	609a      	str	r2, [r3, #8]
 8004522:	60da      	str	r2, [r3, #12]
 8004524:	611a      	str	r2, [r3, #16]
 8004526:	615a      	str	r2, [r3, #20]
    //    uartTxMsgQueueAttr.name                 = "uart1TxMsgQueue";
    uartTaskData->sendCmdToSlaveQueue = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
 8004528:	f107 0308 	add.w	r3, r7, #8
 800452c:	461a      	mov	r2, r3
 800452e:	2110      	movs	r1, #16
 8004530:	2010      	movs	r0, #16
 8004532:	f00d fa71 	bl	8011a18 <osMessageQueueNew>
 8004536:	4602      	mov	r2, r0
 8004538:	687b      	ldr	r3, [r7, #4]
 800453a:	62da      	str	r2, [r3, #44]	@ 0x2c

    //    osThreadAttrTxUart.name              = "os_thread_uart1_tx";
    osThreadAttrTxUart.stack_size        = configMINIMAL_STACK_SIZE * 4;
 800453c:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8004540:	637b      	str	r3, [r7, #52]	@ 0x34
    osThreadAttrTxUart.priority          = (osPriority_t)osPriorityNormal;
 8004542:	2318      	movs	r3, #24
 8004544:	63bb      	str	r3, [r7, #56]	@ 0x38
    uartTaskData->uartTransmitTaskHandle = osThreadNew (UartTxTask, uartTaskData, &osThreadAttrTxUart);
 8004546:	f107 0320 	add.w	r3, r7, #32
 800454a:	461a      	mov	r2, r3
 800454c:	6879      	ldr	r1, [r7, #4]
 800454e:	4806      	ldr	r0, [pc, #24]	@ (8004568 <UartTaskCreate+0xac>)
 8004550:	f00c fe61 	bl	8011216 <osThreadNew>
 8004554:	4602      	mov	r2, r0
 8004556:	687b      	ldr	r3, [r7, #4]
 8004558:	61da      	str	r2, [r3, #28]
}
 800455a:	bf00      	nop
 800455c:	3768      	adds	r7, #104	@ 0x68
 800455e:	46bd      	mov	sp, r7
 8004560:	bd80      	pop	{r7, pc}
 8004562:	bf00      	nop
 8004564:	080046e1 	.word	0x080046e1
 8004568:	08004ccd 	.word	0x08004ccd

0800456c <HAL_UART_RxCpltCallback>:

void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
 800456c:	b480      	push	{r7}
 800456e:	b083      	sub	sp, #12
 8004570:	af00      	add	r7, sp, #0
 8004572:	6078      	str	r0, [r7, #4]
    //	osSemaphoreRelease(uart8RxSemaphore);
}
 8004574:	bf00      	nop
 8004576:	370c      	adds	r7, #12
 8004578:	46bd      	mov	sp, r7
 800457a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800457e:	4770      	bx	lr

08004580 <HAL_UARTEx_RxEventCallback>:

void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
 8004580:	b580      	push	{r7, lr}
 8004582:	b082      	sub	sp, #8
 8004584:	af00      	add	r7, sp, #0
 8004586:	6078      	str	r0, [r7, #4]
 8004588:	460b      	mov	r3, r1
 800458a:	807b      	strh	r3, [r7, #2]
    if (huart->Instance == USART1) {
 800458c:	687b      	ldr	r3, [r7, #4]
 800458e:	681b      	ldr	r3, [r3, #0]
 8004590:	4a1e      	ldr	r2, [pc, #120]	@ (800460c <HAL_UARTEx_RxEventCallback+0x8c>)
 8004592:	4293      	cmp	r3, r2
 8004594:	d106      	bne.n	80045a4 <HAL_UARTEx_RxEventCallback+0x24>
        HandleUartRxCallback (&uart1TaskData, huart, Size);
 8004596:	887b      	ldrh	r3, [r7, #2]
 8004598:	461a      	mov	r2, r3
 800459a:	6879      	ldr	r1, [r7, #4]
 800459c:	481c      	ldr	r0, [pc, #112]	@ (8004610 <HAL_UARTEx_RxEventCallback+0x90>)
 800459e:	f000 f853 	bl	8004648 <HandleUartRxCallback>
    } else if (huart->Instance == USART6) {
        HandleUartRxCallback (&uart6TaskData, huart, Size);
    } else if (huart->Instance == UART8) {
        HandleUartRxCallback (&uart8TaskData, huart, Size);
    }
}
 80045a2:	e02e      	b.n	8004602 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART2) {
 80045a4:	687b      	ldr	r3, [r7, #4]
 80045a6:	681b      	ldr	r3, [r3, #0]
 80045a8:	4a1a      	ldr	r2, [pc, #104]	@ (8004614 <HAL_UARTEx_RxEventCallback+0x94>)
 80045aa:	4293      	cmp	r3, r2
 80045ac:	d106      	bne.n	80045bc <HAL_UARTEx_RxEventCallback+0x3c>
        HandleUartRxCallback (&uart2TaskData, huart, Size);
 80045ae:	887b      	ldrh	r3, [r7, #2]
 80045b0:	461a      	mov	r2, r3
 80045b2:	6879      	ldr	r1, [r7, #4]
 80045b4:	4818      	ldr	r0, [pc, #96]	@ (8004618 <HAL_UARTEx_RxEventCallback+0x98>)
 80045b6:	f000 f847 	bl	8004648 <HandleUartRxCallback>
}
 80045ba:	e022      	b.n	8004602 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART3) {
 80045bc:	687b      	ldr	r3, [r7, #4]
 80045be:	681b      	ldr	r3, [r3, #0]
 80045c0:	4a16      	ldr	r2, [pc, #88]	@ (800461c <HAL_UARTEx_RxEventCallback+0x9c>)
 80045c2:	4293      	cmp	r3, r2
 80045c4:	d106      	bne.n	80045d4 <HAL_UARTEx_RxEventCallback+0x54>
        HandleUartRxCallback (&uart3TaskData, huart, Size);
 80045c6:	887b      	ldrh	r3, [r7, #2]
 80045c8:	461a      	mov	r2, r3
 80045ca:	6879      	ldr	r1, [r7, #4]
 80045cc:	4814      	ldr	r0, [pc, #80]	@ (8004620 <HAL_UARTEx_RxEventCallback+0xa0>)
 80045ce:	f000 f83b 	bl	8004648 <HandleUartRxCallback>
}
 80045d2:	e016      	b.n	8004602 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART6) {
 80045d4:	687b      	ldr	r3, [r7, #4]
 80045d6:	681b      	ldr	r3, [r3, #0]
 80045d8:	4a12      	ldr	r2, [pc, #72]	@ (8004624 <HAL_UARTEx_RxEventCallback+0xa4>)
 80045da:	4293      	cmp	r3, r2
 80045dc:	d106      	bne.n	80045ec <HAL_UARTEx_RxEventCallback+0x6c>
        HandleUartRxCallback (&uart6TaskData, huart, Size);
 80045de:	887b      	ldrh	r3, [r7, #2]
 80045e0:	461a      	mov	r2, r3
 80045e2:	6879      	ldr	r1, [r7, #4]
 80045e4:	4810      	ldr	r0, [pc, #64]	@ (8004628 <HAL_UARTEx_RxEventCallback+0xa8>)
 80045e6:	f000 f82f 	bl	8004648 <HandleUartRxCallback>
}
 80045ea:	e00a      	b.n	8004602 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == UART8) {
 80045ec:	687b      	ldr	r3, [r7, #4]
 80045ee:	681b      	ldr	r3, [r3, #0]
 80045f0:	4a0e      	ldr	r2, [pc, #56]	@ (800462c <HAL_UARTEx_RxEventCallback+0xac>)
 80045f2:	4293      	cmp	r3, r2
 80045f4:	d105      	bne.n	8004602 <HAL_UARTEx_RxEventCallback+0x82>
        HandleUartRxCallback (&uart8TaskData, huart, Size);
 80045f6:	887b      	ldrh	r3, [r7, #2]
 80045f8:	461a      	mov	r2, r3
 80045fa:	6879      	ldr	r1, [r7, #4]
 80045fc:	480c      	ldr	r0, [pc, #48]	@ (8004630 <HAL_UARTEx_RxEventCallback+0xb0>)
 80045fe:	f000 f823 	bl	8004648 <HandleUartRxCallback>
}
 8004602:	bf00      	nop
 8004604:	3708      	adds	r7, #8
 8004606:	46bd      	mov	sp, r7
 8004608:	bd80      	pop	{r7, pc}
 800460a:	bf00      	nop
 800460c:	40011000 	.word	0x40011000
 8004610:	24001eec 	.word	0x24001eec
 8004614:	40004400 	.word	0x40004400
 8004618:	24001f94 	.word	0x24001f94
 800461c:	40004800 	.word	0x40004800
 8004620:	24001f24 	.word	0x24001f24
 8004624:	40011400 	.word	0x40011400
 8004628:	24001f5c 	.word	0x24001f5c
 800462c:	40007c00 	.word	0x40007c00
 8004630:	24001fcc 	.word	0x24001fcc

08004634 <HAL_UART_TxCpltCallback>:

void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
 8004634:	b480      	push	{r7}
 8004636:	b083      	sub	sp, #12
 8004638:	af00      	add	r7, sp, #0
 800463a:	6078      	str	r0, [r7, #4]
    if (huart->Instance == UART8) {
    }
}
 800463c:	bf00      	nop
 800463e:	370c      	adds	r7, #12
 8004640:	46bd      	mov	sp, r7
 8004642:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004646:	4770      	bx	lr

08004648 <HandleUartRxCallback>:

void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
 8004648:	b580      	push	{r7, lr}
 800464a:	b088      	sub	sp, #32
 800464c:	af02      	add	r7, sp, #8
 800464e:	60f8      	str	r0, [r7, #12]
 8004650:	60b9      	str	r1, [r7, #8]
 8004652:	4613      	mov	r3, r2
 8004654:	80fb      	strh	r3, [r7, #6]
    BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
 8004656:	2300      	movs	r3, #0
 8004658:	617b      	str	r3, [r7, #20]
    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 800465a:	68fb      	ldr	r3, [r7, #12]
 800465c:	6a1b      	ldr	r3, [r3, #32]
 800465e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004662:	4618      	mov	r0, r3
 8004664:	f00d f80d 	bl	8011682 <osMutexAcquire>
    memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
 8004668:	68fb      	ldr	r3, [r7, #12]
 800466a:	691b      	ldr	r3, [r3, #16]
 800466c:	68fa      	ldr	r2, [r7, #12]
 800466e:	8ad2      	ldrh	r2, [r2, #22]
 8004670:	1898      	adds	r0, r3, r2
 8004672:	68fb      	ldr	r3, [r7, #12]
 8004674:	681b      	ldr	r3, [r3, #0]
 8004676:	88fa      	ldrh	r2, [r7, #6]
 8004678:	4619      	mov	r1, r3
 800467a:	f026 faf8 	bl	802ac6e <memcpy>
    uartTaskData->frameBytesCount += Size;
 800467e:	68fb      	ldr	r3, [r7, #12]
 8004680:	8ada      	ldrh	r2, [r3, #22]
 8004682:	88fb      	ldrh	r3, [r7, #6]
 8004684:	4413      	add	r3, r2
 8004686:	b29a      	uxth	r2, r3
 8004688:	68fb      	ldr	r3, [r7, #12]
 800468a:	82da      	strh	r2, [r3, #22]
    osMutexRelease (uartTaskData->rxDataBufferMutex);
 800468c:	68fb      	ldr	r3, [r7, #12]
 800468e:	6a1b      	ldr	r3, [r3, #32]
 8004690:	4618      	mov	r0, r3
 8004692:	f00d f841 	bl	8011718 <osMutexRelease>
    xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
 8004696:	68fb      	ldr	r3, [r7, #12]
 8004698:	6998      	ldr	r0, [r3, #24]
 800469a:	88f9      	ldrh	r1, [r7, #6]
 800469c:	f107 0314 	add.w	r3, r7, #20
 80046a0:	9300      	str	r3, [sp, #0]
 80046a2:	2300      	movs	r3, #0
 80046a4:	2203      	movs	r2, #3
 80046a6:	f010 fa2f 	bl	8014b08 <xTaskGenericNotifyFromISR>
    //	HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
    //	__HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 80046aa:	68fb      	ldr	r3, [r7, #12]
 80046ac:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80046ae:	68fb      	ldr	r3, [r7, #12]
 80046b0:	6819      	ldr	r1, [r3, #0]
 80046b2:	68fb      	ldr	r3, [r7, #12]
 80046b4:	889b      	ldrh	r3, [r3, #4]
 80046b6:	461a      	mov	r2, r3
 80046b8:	f00b fdb9 	bl	801022e <HAL_UARTEx_ReceiveToIdle_IT>
    portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
 80046bc:	697b      	ldr	r3, [r7, #20]
 80046be:	2b00      	cmp	r3, #0
 80046c0:	d007      	beq.n	80046d2 <HandleUartRxCallback+0x8a>
 80046c2:	4b06      	ldr	r3, [pc, #24]	@ (80046dc <HandleUartRxCallback+0x94>)
 80046c4:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80046c8:	601a      	str	r2, [r3, #0]
 80046ca:	f3bf 8f4f 	dsb	sy
 80046ce:	f3bf 8f6f 	isb	sy
}
 80046d2:	bf00      	nop
 80046d4:	3718      	adds	r7, #24
 80046d6:	46bd      	mov	sp, r7
 80046d8:	bd80      	pop	{r7, pc}
 80046da:	bf00      	nop
 80046dc:	e000ed04 	.word	0xe000ed04

080046e0 <UartRxTask>:

void UartRxTask (void* argument) {
 80046e0:	b580      	push	{r7, lr}
 80046e2:	b0d2      	sub	sp, #328	@ 0x148
 80046e4:	af02      	add	r7, sp, #8
 80046e6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80046ea:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 80046ee:	6018      	str	r0, [r3, #0]
    UartTaskData* uartTaskData             = (UartTaskData*)argument;
 80046f0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80046f4:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 80046f8:	681b      	ldr	r3, [r3, #0]
 80046fa:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
    SerialProtocolFrameData spFrameData    = { 0 };
 80046fe:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004702:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004706:	4618      	mov	r0, r3
 8004708:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 800470c:	461a      	mov	r2, r3
 800470e:	2100      	movs	r1, #0
 8004710:	f026 f9b6 	bl	802aa80 <memset>
    uint32_t bytesRec                      = 0;
 8004714:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004718:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 800471c:	2200      	movs	r2, #0
 800471e:	601a      	str	r2, [r3, #0]
    uint32_t crc                           = 0;
 8004720:	2300      	movs	r3, #0
 8004722:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
    uint16_t frameCommandRaw               = 0x0000;
 8004726:	2300      	movs	r3, #0
 8004728:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
    uint16_t frameBytesCount               = 0;
 800472c:	2300      	movs	r3, #0
 800472e:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
    uint16_t frameCrc                      = 0;
 8004732:	2300      	movs	r3, #0
 8004734:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
    uint16_t frameTotalLength              = 0;
 8004738:	2300      	movs	r3, #0
 800473a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint16_t dataToSend                    = 0;
 800473e:	2300      	movs	r3, #0
 8004740:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    portBASE_TYPE crcPass                  = pdFAIL;
 8004744:	2300      	movs	r3, #0
 8004746:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    portBASE_TYPE proceed                  = pdFALSE;
 800474a:	2300      	movs	r3, #0
 800474c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
    portBASE_TYPE frameTimeout             = pdFAIL;
 8004750:	2300      	movs	r3, #0
 8004752:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
    enum SerialReceiverStates receverState = srWaitForHeader;
 8004756:	2300      	movs	r3, #0
 8004758:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133

    uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
 800475c:	2000      	movs	r0, #0
 800475e:	f00c ff0a 	bl	8011576 <osMutexNew>
 8004762:	4602      	mov	r2, r0
 8004764:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004768:	621a      	str	r2, [r3, #32]
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 800476a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800476e:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004770:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004774:	6819      	ldr	r1, [r3, #0]
 8004776:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800477a:	889b      	ldrh	r3, [r3, #4]
 800477c:	461a      	mov	r2, r3
 800477e:	f00b fd56 	bl	801022e <HAL_UARTEx_ReceiveToIdle_IT>
    while (pdTRUE) {
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004782:	f107 020c 	add.w	r2, r7, #12
 8004786:	f44f 63fa 	mov.w	r3, #2000	@ 0x7d0
 800478a:	2100      	movs	r1, #0
 800478c:	2000      	movs	r0, #0
 800478e:	f010 f899 	bl	80148c4 <xTaskNotifyWait>
 8004792:	4603      	mov	r3, r0
 8004794:	2b00      	cmp	r3, #0
 8004796:	bf0c      	ite	eq
 8004798:	2301      	moveq	r3, #1
 800479a:	2300      	movne	r3, #0
 800479c:	b2db      	uxtb	r3, r3
 800479e:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c

        osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80047a2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047a6:	6a1b      	ldr	r3, [r3, #32]
 80047a8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80047ac:	4618      	mov	r0, r3
 80047ae:	f00c ff68 	bl	8011682 <osMutexAcquire>
        frameBytesCount = uartTaskData->frameBytesCount;
 80047b2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047b6:	8adb      	ldrh	r3, [r3, #22]
 80047b8:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
        osMutexRelease (uartTaskData->rxDataBufferMutex);
 80047bc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047c0:	6a1b      	ldr	r3, [r3, #32]
 80047c2:	4618      	mov	r0, r3
 80047c4:	f00c ffa8 	bl	8011718 <osMutexRelease>
        if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
 80047c8:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 80047cc:	2b01      	cmp	r3, #1
 80047ce:	d10a      	bne.n	80047e6 <UartRxTask+0x106>
 80047d0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80047d4:	2b00      	cmp	r3, #0
 80047d6:	d006      	beq.n	80047e6 <UartRxTask+0x106>
            receverState = srFail;
 80047d8:	2304      	movs	r3, #4
 80047da:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            proceed      = pdTRUE;
 80047de:	2301      	movs	r3, #1
 80047e0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 80047e4:	e029      	b.n	800483a <UartRxTask+0x15a>
        } else {
            if (frameTimeout == pdFALSE) {
 80047e6:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 80047ea:	2b00      	cmp	r3, #0
 80047ec:	d111      	bne.n	8004812 <UartRxTask+0x132>
                proceed = pdTRUE;
 80047ee:	2301      	movs	r3, #1
 80047f0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
 80047f4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80047f8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80047fc:	4619      	mov	r1, r3
 80047fe:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004802:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004806:	681b      	ldr	r3, [r3, #0]
 8004808:	461a      	mov	r2, r3
 800480a:	48c1      	ldr	r0, [pc, #772]	@ (8004b10 <UartRxTask+0x430>)
 800480c:	f025 ffa6 	bl	802a75c <iprintf>
 8004810:	e22f      	b.n	8004c72 <UartRxTask+0x592>
            } else {
                if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
 8004812:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004816:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8004818:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800481c:	2b20      	cmp	r3, #32
 800481e:	f040 8228 	bne.w	8004c72 <UartRxTask+0x592>
                    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 8004822:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004826:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004828:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800482c:	6819      	ldr	r1, [r3, #0]
 800482e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004832:	889b      	ldrh	r3, [r3, #4]
 8004834:	461a      	mov	r2, r3
 8004836:	f00b fcfa 	bl	801022e <HAL_UARTEx_ReceiveToIdle_IT>
                }
            }
        }

        while (proceed) {
 800483a:	e21a      	b.n	8004c72 <UartRxTask+0x592>
            switch (receverState) {
 800483c:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 8004840:	2b04      	cmp	r3, #4
 8004842:	f200 81f1 	bhi.w	8004c28 <UartRxTask+0x548>
 8004846:	a201      	add	r2, pc, #4	@ (adr r2, 800484c <UartRxTask+0x16c>)
 8004848:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800484c:	08004861 	.word	0x08004861
 8004850:	080049c3 	.word	0x080049c3
 8004854:	080049a7 	.word	0x080049a7
 8004858:	08004a63 	.word	0x08004a63
 800485c:	08004b1d 	.word	0x08004b1d
            case srWaitForHeader:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004860:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004864:	6a1b      	ldr	r3, [r3, #32]
 8004866:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800486a:	4618      	mov	r0, r3
 800486c:	f00c ff09 	bl	8011682 <osMutexAcquire>
                if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
 8004870:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004874:	691b      	ldr	r3, [r3, #16]
 8004876:	781b      	ldrb	r3, [r3, #0]
 8004878:	2baa      	cmp	r3, #170	@ 0xaa
 800487a:	f040 8082 	bne.w	8004982 <UartRxTask+0x2a2>
                    if (frameBytesCount > FRAME_ID_LENGTH) {
 800487e:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004882:	2b02      	cmp	r3, #2
 8004884:	d914      	bls.n	80048b0 <UartRxTask+0x1d0>
                        spFrameData.frameHeader.frameId =
                        CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
 8004886:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800488a:	691b      	ldr	r3, [r3, #16]
 800488c:	3302      	adds	r3, #2
 800488e:	781b      	ldrb	r3, [r3, #0]
 8004890:	021b      	lsls	r3, r3, #8
 8004892:	b21a      	sxth	r2, r3
 8004894:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004898:	691b      	ldr	r3, [r3, #16]
 800489a:	3301      	adds	r3, #1
 800489c:	781b      	ldrb	r3, [r3, #0]
 800489e:	b21b      	sxth	r3, r3
 80048a0:	4313      	orrs	r3, r2
 80048a2:	b21b      	sxth	r3, r3
 80048a4:	b29a      	uxth	r2, r3
                        spFrameData.frameHeader.frameId =
 80048a6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80048aa:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80048ae:	801a      	strh	r2, [r3, #0]
                    }
                    if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
 80048b0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 80048b4:	2b04      	cmp	r3, #4
 80048b6:	d923      	bls.n	8004900 <UartRxTask+0x220>
                        frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
 80048b8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80048bc:	691b      	ldr	r3, [r3, #16]
 80048be:	3304      	adds	r3, #4
 80048c0:	781b      	ldrb	r3, [r3, #0]
 80048c2:	021b      	lsls	r3, r3, #8
 80048c4:	b21a      	sxth	r2, r3
 80048c6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80048ca:	691b      	ldr	r3, [r3, #16]
 80048cc:	3303      	adds	r3, #3
 80048ce:	781b      	ldrb	r3, [r3, #0]
 80048d0:	b21b      	sxth	r3, r3
 80048d2:	4313      	orrs	r3, r2
 80048d4:	b21b      	sxth	r3, r3
 80048d6:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
                        spFrameData.frameHeader.frameCommand    = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
 80048da:	f8b7 3126 	ldrh.w	r3, [r7, #294]	@ 0x126
 80048de:	b2da      	uxtb	r2, r3
 80048e0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80048e4:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80048e8:	709a      	strb	r2, [r3, #2]
                        spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
 80048ea:	f9b7 3126 	ldrsh.w	r3, [r7, #294]	@ 0x126
 80048ee:	13db      	asrs	r3, r3, #15
 80048f0:	b21b      	sxth	r3, r3
 80048f2:	f003 0201 	and.w	r2, r3, #1
 80048f6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80048fa:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80048fe:	609a      	str	r2, [r3, #8]
                    }
                    if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
 8004900:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004904:	2b05      	cmp	r3, #5
 8004906:	d913      	bls.n	8004930 <UartRxTask+0x250>
 8004908:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800490c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004910:	789b      	ldrb	r3, [r3, #2]
 8004912:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8004916:	2b00      	cmp	r3, #0
 8004918:	d00a      	beq.n	8004930 <UartRxTask+0x250>
                        spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
 800491a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800491e:	691b      	ldr	r3, [r3, #16]
 8004920:	3305      	adds	r3, #5
 8004922:	781b      	ldrb	r3, [r3, #0]
 8004924:	b25a      	sxtb	r2, r3
 8004926:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800492a:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800492e:	70da      	strb	r2, [r3, #3]
                    }
                    if (frameBytesCount >= FRAME_HEADER_LENGTH) {
 8004930:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004934:	2b07      	cmp	r3, #7
 8004936:	d920      	bls.n	800497a <UartRxTask+0x29a>
                        spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
 8004938:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800493c:	691b      	ldr	r3, [r3, #16]
 800493e:	3306      	adds	r3, #6
 8004940:	781b      	ldrb	r3, [r3, #0]
 8004942:	021b      	lsls	r3, r3, #8
 8004944:	b21a      	sxth	r2, r3
 8004946:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800494a:	691b      	ldr	r3, [r3, #16]
 800494c:	3305      	adds	r3, #5
 800494e:	781b      	ldrb	r3, [r3, #0]
 8004950:	b21b      	sxth	r3, r3
 8004952:	4313      	orrs	r3, r2
 8004954:	b21b      	sxth	r3, r3
 8004956:	b29a      	uxth	r2, r3
 8004958:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 800495c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004960:	809a      	strh	r2, [r3, #4]
                        frameTotalLength                        = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
 8004962:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004966:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 800496a:	889b      	ldrh	r3, [r3, #4]
 800496c:	330a      	adds	r3, #10
 800496e:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                        receverState                            = srRecieveData;
 8004972:	2302      	movs	r3, #2
 8004974:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004978:	e00e      	b.n	8004998 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 800497a:	2300      	movs	r3, #0
 800497c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004980:	e00a      	b.n	8004998 <UartRxTask+0x2b8>
                    }
                } else {
                    if (frameBytesCount > 0) {
 8004982:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004986:	2b00      	cmp	r3, #0
 8004988:	d003      	beq.n	8004992 <UartRxTask+0x2b2>
                        receverState = srFail;
 800498a:	2304      	movs	r3, #4
 800498c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004990:	e002      	b.n	8004998 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 8004992:	2300      	movs	r3, #0
 8004994:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                    }
                }
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004998:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800499c:	6a1b      	ldr	r3, [r3, #32]
 800499e:	4618      	mov	r0, r3
 80049a0:	f00c feba 	bl	8011718 <osMutexRelease>
                break;
 80049a4:	e165      	b.n	8004c72 <UartRxTask+0x592>
            case srRecieveData:
                if (frameBytesCount >= frameTotalLength) {
 80049a6:	f8b7 2124 	ldrh.w	r2, [r7, #292]	@ 0x124
 80049aa:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80049ae:	429a      	cmp	r2, r3
 80049b0:	d303      	bcc.n	80049ba <UartRxTask+0x2da>
                    receverState = srCheckCrc;
 80049b2:	2301      	movs	r3, #1
 80049b4:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    proceed = pdFALSE;
                }
                break;
 80049b8:	e15b      	b.n	8004c72 <UartRxTask+0x592>
                    proceed = pdFALSE;
 80049ba:	2300      	movs	r3, #0
 80049bc:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 80049c0:	e157      	b.n	8004c72 <UartRxTask+0x592>
            case srCheckCrc:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 80049c2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80049c6:	6a1b      	ldr	r3, [r3, #32]
 80049c8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80049cc:	4618      	mov	r0, r3
 80049ce:	f00c fe58 	bl	8011682 <osMutexAcquire>
                frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
 80049d2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80049d6:	691a      	ldr	r2, [r3, #16]
 80049d8:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80049dc:	3b01      	subs	r3, #1
 80049de:	4413      	add	r3, r2
 80049e0:	781b      	ldrb	r3, [r3, #0]
 80049e2:	021b      	lsls	r3, r3, #8
 80049e4:	b21a      	sxth	r2, r3
 80049e6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80049ea:	6919      	ldr	r1, [r3, #16]
 80049ec:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 80049f0:	3b02      	subs	r3, #2
 80049f2:	440b      	add	r3, r1
 80049f4:	781b      	ldrb	r3, [r3, #0]
 80049f6:	b21b      	sxth	r3, r3
 80049f8:	4313      	orrs	r3, r2
 80049fa:	b21b      	sxth	r3, r3
 80049fc:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
                crc      = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
 8004a00:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a04:	6919      	ldr	r1, [r3, #16]
 8004a06:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004a0a:	3b02      	subs	r3, #2
 8004a0c:	461a      	mov	r2, r3
 8004a0e:	4841      	ldr	r0, [pc, #260]	@ (8004b14 <UartRxTask+0x434>)
 8004a10:	f001 f84c 	bl	8005aac <HAL_CRC_Calculate>
 8004a14:	f8c7 0128 	str.w	r0, [r7, #296]	@ 0x128
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004a18:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a1c:	6a1b      	ldr	r3, [r3, #32]
 8004a1e:	4618      	mov	r0, r3
 8004a20:	f00c fe7a 	bl	8011718 <osMutexRelease>
                crcPass = frameCrc == crc;
 8004a24:	f8b7 3122 	ldrh.w	r3, [r7, #290]	@ 0x122
 8004a28:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 8004a2c:	429a      	cmp	r2, r3
 8004a2e:	bf0c      	ite	eq
 8004a30:	2301      	moveq	r3, #1
 8004a32:	2300      	movne	r3, #0
 8004a34:	b2db      	uxtb	r3, r3
 8004a36:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
                if (crcPass) {
 8004a3a:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004a3e:	2b00      	cmp	r3, #0
 8004a40:	d00b      	beq.n	8004a5a <UartRxTask+0x37a>
                    printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
 8004a42:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a46:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004a4a:	4619      	mov	r1, r3
 8004a4c:	4832      	ldr	r0, [pc, #200]	@ (8004b18 <UartRxTask+0x438>)
 8004a4e:	f025 fe85 	bl	802a75c <iprintf>
                    receverState = srExecuteCmd;
 8004a52:	2303      	movs	r3, #3
 8004a54:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    receverState = srFail;
                }
                break;
 8004a58:	e10b      	b.n	8004c72 <UartRxTask+0x592>
                    receverState = srFail;
 8004a5a:	2304      	movs	r3, #4
 8004a5c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004a60:	e107      	b.n	8004c72 <UartRxTask+0x592>
            case srExecuteCmd:
                if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
 8004a62:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a66:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004a68:	2b00      	cmp	r3, #0
 8004a6a:	d104      	bne.n	8004a76 <UartRxTask+0x396>
 8004a6c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a70:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004a72:	2b00      	cmp	r3, #0
 8004a74:	d01e      	beq.n	8004ab4 <UartRxTask+0x3d4>
                    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004a76:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a7a:	6a1b      	ldr	r3, [r3, #32]
 8004a7c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004a80:	4618      	mov	r0, r3
 8004a82:	f00c fdfe 	bl	8011682 <osMutexAcquire>
                    memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
 8004a86:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a8a:	691b      	ldr	r3, [r3, #16]
 8004a8c:	f103 0108 	add.w	r1, r3, #8
 8004a90:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004a94:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004a98:	889b      	ldrh	r3, [r3, #4]
 8004a9a:	461a      	mov	r2, r3
 8004a9c:	f107 0310 	add.w	r3, r7, #16
 8004aa0:	330c      	adds	r3, #12
 8004aa2:	4618      	mov	r0, r3
 8004aa4:	f026 f8e3 	bl	802ac6e <memcpy>
                    osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004aa8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004aac:	6a1b      	ldr	r3, [r3, #32]
 8004aae:	4618      	mov	r0, r3
 8004ab0:	f00c fe32 	bl	8011718 <osMutexRelease>
                }
                if (uartTaskData->processRxDataMsgBuffer != NULL) {
 8004ab4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ab8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004aba:	2b00      	cmp	r3, #0
 8004abc:	d015      	beq.n	8004aea <UartRxTask+0x40a>
                    if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
 8004abe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ac2:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004ac4:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004ac8:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004acc:	889b      	ldrh	r3, [r3, #4]
 8004ace:	f103 020c 	add.w	r2, r3, #12
 8004ad2:	f107 0110 	add.w	r1, r7, #16
 8004ad6:	23c8      	movs	r3, #200	@ 0xc8
 8004ad8:	f00e fbb0 	bl	801323c <xStreamBufferSend>
 8004adc:	4603      	mov	r3, r0
 8004ade:	2b00      	cmp	r3, #0
 8004ae0:	d103      	bne.n	8004aea <UartRxTask+0x40a>
                    {
                    	receverState = srFail;
 8004ae2:	2304      	movs	r3, #4
 8004ae4:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                    	break;
 8004ae8:	e0c3      	b.n	8004c72 <UartRxTask+0x592>
                    }
                }
                if (uartTaskData->processDataCb != NULL) {
 8004aea:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004aee:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004af0:	2b00      	cmp	r3, #0
 8004af2:	d008      	beq.n	8004b06 <UartRxTask+0x426>
                    uartTaskData->processDataCb (uartTaskData, &spFrameData);
 8004af4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004af8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004afa:	f107 0210 	add.w	r2, r7, #16
 8004afe:	4611      	mov	r1, r2
 8004b00:	f8d7 012c 	ldr.w	r0, [r7, #300]	@ 0x12c
 8004b04:	4798      	blx	r3
                }
                receverState = srFinish;
 8004b06:	2305      	movs	r3, #5
 8004b08:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004b0c:	e0b1      	b.n	8004c72 <UartRxTask+0x592>
 8004b0e:	bf00      	nop
 8004b10:	0802d7c8 	.word	0x0802d7c8
 8004b14:	24000248 	.word	0x24000248
 8004b18:	0802d7e8 	.word	0x0802d7e8
            case srFail:
                dataToSend = 0;
 8004b1c:	2300      	movs	r3, #0
 8004b1e:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
 8004b22:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004b26:	2b01      	cmp	r3, #1
 8004b28:	d124      	bne.n	8004b74 <UartRxTask+0x494>
 8004b2a:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004b2e:	2b02      	cmp	r3, #2
 8004b30:	d920      	bls.n	8004b74 <UartRxTask+0x494>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
 8004b32:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b36:	6898      	ldr	r0, [r3, #8]
 8004b38:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004b3c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004b40:	8819      	ldrh	r1, [r3, #0]
 8004b42:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004b46:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004b4a:	789a      	ldrb	r2, [r3, #2]
 8004b4c:	2300      	movs	r3, #0
 8004b4e:	9301      	str	r3, [sp, #4]
 8004b50:	2300      	movs	r3, #0
 8004b52:	9300      	str	r3, [sp, #0]
 8004b54:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004b58:	f7fe fdf6 	bl	8003748 <PrepareRespFrame>
 8004b5c:	4603      	mov	r3, r0
 8004b5e:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                    printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
 8004b62:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b66:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004b6a:	4619      	mov	r1, r3
 8004b6c:	4844      	ldr	r0, [pc, #272]	@ (8004c80 <UartRxTask+0x5a0>)
 8004b6e:	f025 fdf5 	bl	802a75c <iprintf>
 8004b72:	e03c      	b.n	8004bee <UartRxTask+0x50e>
                } else if (!crcPass) {
 8004b74:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004b78:	2b00      	cmp	r3, #0
 8004b7a:	d120      	bne.n	8004bbe <UartRxTask+0x4de>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
 8004b7c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b80:	6898      	ldr	r0, [r3, #8]
 8004b82:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004b86:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004b8a:	8819      	ldrh	r1, [r3, #0]
 8004b8c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004b90:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004b94:	789a      	ldrb	r2, [r3, #2]
 8004b96:	2300      	movs	r3, #0
 8004b98:	9301      	str	r3, [sp, #4]
 8004b9a:	2300      	movs	r3, #0
 8004b9c:	9300      	str	r3, [sp, #0]
 8004b9e:	f06f 0301 	mvn.w	r3, #1
 8004ba2:	f7fe fdd1 	bl	8003748 <PrepareRespFrame>
 8004ba6:	4603      	mov	r3, r0
 8004ba8:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                    printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
 8004bac:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004bb0:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004bb4:	4619      	mov	r1, r3
 8004bb6:	4833      	ldr	r0, [pc, #204]	@ (8004c84 <UartRxTask+0x5a4>)
 8004bb8:	f025 fdd0 	bl	802a75c <iprintf>
 8004bbc:	e017      	b.n	8004bee <UartRxTask+0x50e>
                }
                else
                {
                	dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
 8004bbe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004bc2:	6898      	ldr	r0, [r3, #8]
 8004bc4:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bc8:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004bcc:	8819      	ldrh	r1, [r3, #0]
 8004bce:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bd2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004bd6:	789a      	ldrb	r2, [r3, #2]
 8004bd8:	2300      	movs	r3, #0
 8004bda:	9301      	str	r3, [sp, #4]
 8004bdc:	2300      	movs	r3, #0
 8004bde:	9300      	str	r3, [sp, #0]
 8004be0:	f06f 0303 	mvn.w	r3, #3
 8004be4:	f7fe fdb0 	bl	8003748 <PrepareRespFrame>
 8004be8:	4603      	mov	r3, r0
 8004bea:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                }
                if (dataToSend > 0) {
 8004bee:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 8004bf2:	2b00      	cmp	r3, #0
 8004bf4:	d00a      	beq.n	8004c0c <UartRxTask+0x52c>
                    HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
 8004bf6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004bfa:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004bfc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c00:	689b      	ldr	r3, [r3, #8]
 8004c02:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 8004c06:	4619      	mov	r1, r3
 8004c08:	f008 fe3c 	bl	800d884 <HAL_UART_Transmit_IT>
                }
                printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
 8004c0c:	f8b7 113c 	ldrh.w	r1, [r7, #316]	@ 0x13c
 8004c10:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c14:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004c18:	461a      	mov	r2, r3
 8004c1a:	481b      	ldr	r0, [pc, #108]	@ (8004c88 <UartRxTask+0x5a8>)
 8004c1c:	f025 fd9e 	bl	802a75c <iprintf>
                receverState = srFinish;
 8004c20:	2305      	movs	r3, #5
 8004c22:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004c26:	e024      	b.n	8004c72 <UartRxTask+0x592>
            case srFinish:
            default:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004c28:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c2c:	6a1b      	ldr	r3, [r3, #32]
 8004c2e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004c32:	4618      	mov	r0, r3
 8004c34:	f00c fd25 	bl	8011682 <osMutexAcquire>
                uartTaskData->frameBytesCount = 0;
 8004c38:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c3c:	2200      	movs	r2, #0
 8004c3e:	82da      	strh	r2, [r3, #22]
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004c40:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c44:	6a1b      	ldr	r3, [r3, #32]
 8004c46:	4618      	mov	r0, r3
 8004c48:	f00c fd66 	bl	8011718 <osMutexRelease>
                spFrameData.frameHeader.frameCommand = spUnknown;
 8004c4c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004c50:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004c54:	220f      	movs	r2, #15
 8004c56:	709a      	strb	r2, [r3, #2]
                frameTotalLength                     = 0;
 8004c58:	2300      	movs	r3, #0
 8004c5a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                outputDataBufferPos                  = 0;
 8004c5e:	4b0b      	ldr	r3, [pc, #44]	@ (8004c8c <UartRxTask+0x5ac>)
 8004c60:	2200      	movs	r2, #0
 8004c62:	801a      	strh	r2, [r3, #0]
                receverState                         = srWaitForHeader;
 8004c64:	2300      	movs	r3, #0
 8004c66:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                proceed                              = pdFALSE;
 8004c6a:	2300      	movs	r3, #0
 8004c6c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004c70:	bf00      	nop
        while (proceed) {
 8004c72:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004c76:	2b00      	cmp	r3, #0
 8004c78:	f47f ade0 	bne.w	800483c <UartRxTask+0x15c>
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004c7c:	e581      	b.n	8004782 <UartRxTask+0xa2>
 8004c7e:	bf00      	nop
 8004c80:	0802d800 	.word	0x0802d800
 8004c84:	0802d824 	.word	0x0802d824
 8004c88:	0802d83c 	.word	0x0802d83c
 8004c8c:	24002084 	.word	0x24002084

08004c90 <ReadMeasSetFromBuffer>:
        }
    }
}

void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
 8004c90:	b580      	push	{r7, lr}
 8004c92:	b086      	sub	sp, #24
 8004c94:	af00      	add	r7, sp, #0
 8004c96:	60f8      	str	r0, [r7, #12]
 8004c98:	60b9      	str	r1, [r7, #8]
 8004c9a:	607a      	str	r2, [r7, #4]
	for(uint8_t i = 0; i < 3; i++)
 8004c9c:	2300      	movs	r3, #0
 8004c9e:	75fb      	strb	r3, [r7, #23]
 8004ca0:	e00b      	b.n	8004cba <ReadMeasSetFromBuffer+0x2a>
	{
		ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
 8004ca2:	7dfb      	ldrb	r3, [r7, #23]
 8004ca4:	009b      	lsls	r3, r3, #2
 8004ca6:	687a      	ldr	r2, [r7, #4]
 8004ca8:	4413      	add	r3, r2
 8004caa:	461a      	mov	r2, r3
 8004cac:	68b9      	ldr	r1, [r7, #8]
 8004cae:	68f8      	ldr	r0, [r7, #12]
 8004cb0:	f7fe fc5b 	bl	800356a <ReadFloatFromBuffer>
	for(uint8_t i = 0; i < 3; i++)
 8004cb4:	7dfb      	ldrb	r3, [r7, #23]
 8004cb6:	3301      	adds	r3, #1
 8004cb8:	75fb      	strb	r3, [r7, #23]
 8004cba:	7dfb      	ldrb	r3, [r7, #23]
 8004cbc:	2b02      	cmp	r3, #2
 8004cbe:	d9f0      	bls.n	8004ca2 <ReadMeasSetFromBuffer+0x12>
	}
}
 8004cc0:	bf00      	nop
 8004cc2:	bf00      	nop
 8004cc4:	3718      	adds	r7, #24
 8004cc6:	46bd      	mov	sp, r7
 8004cc8:	bd80      	pop	{r7, pc}
	...

08004ccc <UartTxTask>:

void UartTxTask (void* argument) {
 8004ccc:	b580      	push	{r7, lr}
 8004cce:	b0d4      	sub	sp, #336	@ 0x150
 8004cd0:	af02      	add	r7, sp, #8
 8004cd2:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004cd6:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004cda:	6018      	str	r0, [r3, #0]
    UartTaskData* const uartTaskData  = (UartTaskData*)argument;
 8004cdc:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004ce0:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004ce4:	681b      	ldr	r3, [r3, #0]
 8004ce6:	f8c7 3140 	str.w	r3, [r7, #320]	@ 0x140
    InterProcessData data             = { 0 };
 8004cea:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004cee:	2200      	movs	r2, #0
 8004cf0:	601a      	str	r2, [r3, #0]
 8004cf2:	605a      	str	r2, [r3, #4]
 8004cf4:	609a      	str	r2, [r3, #8]
 8004cf6:	60da      	str	r2, [r3, #12]
    SerialProtocolFrameData frameData = { 0 };
 8004cf8:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004cfc:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004d00:	4618      	mov	r0, r3
 8004d02:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8004d06:	461a      	mov	r2, r3
 8004d08:	2100      	movs	r1, #0
 8004d0a:	f025 feb9 	bl	802aa80 <memset>
    size_t bytesInMsg;
    uint16_t frameId                    = 0;
 8004d0e:	2300      	movs	r3, #0
 8004d10:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint32_t rndVal                     = 0;
 8004d14:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004d18:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8004d1c:	2200      	movs	r2, #0
 8004d1e:	601a      	str	r2, [r3, #0]
    uint16_t bytesToSend                = 0;
 8004d20:	2300      	movs	r3, #0
 8004d22:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    SerialProtocolCommands frameCommand = spUnknown;
 8004d26:	230f      	movs	r3, #15
 8004d28:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
    uint16_t inputDataBufferPos = 0;
 8004d2c:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004d30:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 8004d34:	2200      	movs	r2, #0
 8004d36:	801a      	strh	r2, [r3, #0]
    uint8_t boardNumber = 0;
 8004d38:	2300      	movs	r3, #0
 8004d3a:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147

    while (pdTRUE) {
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8004d3e:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004d42:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8004d44:	2b00      	cmp	r3, #0
 8004d46:	f000 828f 	beq.w	8005268 <UartTxTask+0x59c>
            osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
 8004d4a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004d4e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8004d50:	f507 718e 	add.w	r1, r7, #284	@ 0x11c
 8004d54:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004d58:	2200      	movs	r2, #0
 8004d5a:	f00c ff31 	bl	8011bc0 <osMessageQueueGet>
            HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
 8004d5e:	f107 030c 	add.w	r3, r7, #12
 8004d62:	4619      	mov	r1, r3
 8004d64:	48be      	ldr	r0, [pc, #760]	@ (8005060 <UartTxTask+0x394>)
 8004d66:	f008 f98b 	bl	800d080 <HAL_RNG_GenerateRandomNumber>
            frameId             = (uint16_t)(rndVal & 0xFFFF);
 8004d6a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004d6e:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8004d72:	681b      	ldr	r3, [r3, #0]
 8004d74:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
            frameCommand        = data.spCommand;
 8004d78:	f897 311c 	ldrb.w	r3, [r7, #284]	@ 0x11c
 8004d7c:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
            outputDataBufferPos = 0;
 8004d80:	4bb8      	ldr	r3, [pc, #736]	@ (8005064 <UartTxTask+0x398>)
 8004d82:	2200      	movs	r2, #0
 8004d84:	801a      	strh	r2, [r3, #0]
            memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
 8004d86:	2280      	movs	r2, #128	@ 0x80
 8004d88:	2100      	movs	r1, #0
 8004d8a:	48b7      	ldr	r0, [pc, #732]	@ (8005068 <UartTxTask+0x39c>)
 8004d8c:	f025 fe78 	bl	802aa80 <memset>
            switch (frameCommand) {
 8004d90:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8004d94:	2b0e      	cmp	r3, #14
 8004d96:	f200 826c 	bhi.w	8005272 <UartTxTask+0x5a6>
 8004d9a:	a201      	add	r2, pc, #4	@ (adr r2, 8004da0 <UartTxTask+0xd4>)
 8004d9c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8004da0:	08004e7f 	.word	0x08004e7f
 8004da4:	08004e7f 	.word	0x08004e7f
 8004da8:	08004ddd 	.word	0x08004ddd
 8004dac:	08004ddd 	.word	0x08004ddd
 8004db0:	08004ddd 	.word	0x08004ddd
 8004db4:	08004e13 	.word	0x08004e13
 8004db8:	08004e13 	.word	0x08004e13
 8004dbc:	08004e01 	.word	0x08004e01
 8004dc0:	08004e7f 	.word	0x08004e7f
 8004dc4:	08004e25 	.word	0x08004e25
 8004dc8:	08004e37 	.word	0x08004e37
 8004dcc:	08004e49 	.word	0x08004e49
 8004dd0:	08004e49 	.word	0x08004e49
 8004dd4:	08004e49 	.word	0x08004e49
 8004dd8:	08004e49 	.word	0x08004e49
            case spSetFanSpeed:
            case spSetMotorXOn:
            case spSetMotorYOn:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t));
 8004ddc:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004de0:	1d1a      	adds	r2, r3, #4
 8004de2:	2304      	movs	r3, #4
 8004de4:	499f      	ldr	r1, [pc, #636]	@ (8005064 <UartTxTask+0x398>)
 8004de6:	48a0      	ldr	r0, [pc, #640]	@ (8005068 <UartTxTask+0x39c>)
 8004de8:	f7fe fb8e 	bl	8003508 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (uint32_t));
 8004dec:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004df0:	f103 0208 	add.w	r2, r3, #8
 8004df4:	2304      	movs	r3, #4
 8004df6:	499b      	ldr	r1, [pc, #620]	@ (8005064 <UartTxTask+0x398>)
 8004df8:	489b      	ldr	r0, [pc, #620]	@ (8005068 <UartTxTask+0x39c>)
 8004dfa:	f7fe fb85 	bl	8003508 <WriteDataToBuffer>
                break;
 8004dfe:	e03f      	b.n	8004e80 <UartTxTask+0x1b4>
            case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t)); break;
 8004e00:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e04:	1d1a      	adds	r2, r3, #4
 8004e06:	2304      	movs	r3, #4
 8004e08:	4996      	ldr	r1, [pc, #600]	@ (8005064 <UartTxTask+0x398>)
 8004e0a:	4897      	ldr	r0, [pc, #604]	@ (8005068 <UartTxTask+0x39c>)
 8004e0c:	f7fe fb7c 	bl	8003508 <WriteDataToBuffer>
 8004e10:	e036      	b.n	8004e80 <UartTxTask+0x1b4>
            case spSetmotorXMaxCurrent:
            case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8004e12:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e16:	1d1a      	adds	r2, r3, #4
 8004e18:	2304      	movs	r3, #4
 8004e1a:	4992      	ldr	r1, [pc, #584]	@ (8005064 <UartTxTask+0x398>)
 8004e1c:	4892      	ldr	r0, [pc, #584]	@ (8005068 <UartTxTask+0x39c>)
 8004e1e:	f7fe fb73 	bl	8003508 <WriteDataToBuffer>
 8004e22:	e02d      	b.n	8004e80 <UartTxTask+0x1b4>
            case spGetElectricalMeasurments:
            case spGetSensorMeasurments: break;
            case spClearPeakMeasurments: break;
            case spSetEncoderXValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8004e24:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e28:	1d1a      	adds	r2, r3, #4
 8004e2a:	2304      	movs	r3, #4
 8004e2c:	498d      	ldr	r1, [pc, #564]	@ (8005064 <UartTxTask+0x398>)
 8004e2e:	488e      	ldr	r0, [pc, #568]	@ (8005068 <UartTxTask+0x39c>)
 8004e30:	f7fe fb6a 	bl	8003508 <WriteDataToBuffer>
 8004e34:	e024      	b.n	8004e80 <UartTxTask+0x1b4>
            case spSetEncoderYValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8004e36:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e3a:	1d1a      	adds	r2, r3, #4
 8004e3c:	2304      	movs	r3, #4
 8004e3e:	4989      	ldr	r1, [pc, #548]	@ (8005064 <UartTxTask+0x398>)
 8004e40:	4889      	ldr	r0, [pc, #548]	@ (8005068 <UartTxTask+0x39c>)
 8004e42:	f7fe fb61 	bl	8003508 <WriteDataToBuffer>
 8004e46:	e01b      	b.n	8004e80 <UartTxTask+0x1b4>
            case spSetVoltageMeasGains:
            case spSetVoltageMeasOffsets:
            case spSetCurrentMeasGains:
            case spSetCurrentMeasOffsets:
            	WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float));
 8004e48:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e4c:	1d1a      	adds	r2, r3, #4
 8004e4e:	2304      	movs	r3, #4
 8004e50:	4984      	ldr	r1, [pc, #528]	@ (8005064 <UartTxTask+0x398>)
 8004e52:	4885      	ldr	r0, [pc, #532]	@ (8005068 <UartTxTask+0x39c>)
 8004e54:	f7fe fb58 	bl	8003508 <WriteDataToBuffer>
            	WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[1], sizeof (float));
 8004e58:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e5c:	f103 0208 	add.w	r2, r3, #8
 8004e60:	2304      	movs	r3, #4
 8004e62:	4980      	ldr	r1, [pc, #512]	@ (8005064 <UartTxTask+0x398>)
 8004e64:	4880      	ldr	r0, [pc, #512]	@ (8005068 <UartTxTask+0x39c>)
 8004e66:	f7fe fb4f 	bl	8003508 <WriteDataToBuffer>
            	WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[2], sizeof (float));
 8004e6a:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004e6e:	f103 020c 	add.w	r2, r3, #12
 8004e72:	2304      	movs	r3, #4
 8004e74:	497b      	ldr	r1, [pc, #492]	@ (8005064 <UartTxTask+0x398>)
 8004e76:	487c      	ldr	r0, [pc, #496]	@ (8005068 <UartTxTask+0x39c>)
 8004e78:	f7fe fb46 	bl	8003508 <WriteDataToBuffer>
            	break;
 8004e7c:	e000      	b.n	8004e80 <UartTxTask+0x1b4>
            case spGetSensorMeasurments: break;
 8004e7e:	bf00      	nop
            default: continue; break;
            }

            bytesToSend = PrepareReqFrame (uartTaskData->uartTxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
 8004e80:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004e84:	6898      	ldr	r0, [r3, #8]
 8004e86:	4b77      	ldr	r3, [pc, #476]	@ (8005064 <UartTxTask+0x398>)
 8004e88:	881b      	ldrh	r3, [r3, #0]
 8004e8a:	f897 213b 	ldrb.w	r2, [r7, #315]	@ 0x13b
 8004e8e:	f8b7 113e 	ldrh.w	r1, [r7, #318]	@ 0x13e
 8004e92:	9300      	str	r3, [sp, #0]
 8004e94:	4b74      	ldr	r3, [pc, #464]	@ (8005068 <UartTxTask+0x39c>)
 8004e96:	f7fe fbc3 	bl	8003620 <PrepareReqFrame>
 8004e9a:	4603      	mov	r3, r0
 8004e9c:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
            HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, bytesToSend);
 8004ea0:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004ea4:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004ea6:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004eaa:	689b      	ldr	r3, [r3, #8]
 8004eac:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 8004eb0:	4619      	mov	r1, r3
 8004eb2:	f008 fce7 	bl	800d884 <HAL_UART_Transmit_IT>
            bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
 8004eb6:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004eba:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004ebc:	f107 0110 	add.w	r1, r7, #16
 8004ec0:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
 8004ec4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004ec8:	f00e faae 	bl	8013428 <xStreamBufferReceive>
 8004ecc:	f8c7 0134 	str.w	r0, [r7, #308]	@ 0x134
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004ed0:	2300      	movs	r3, #0
 8004ed2:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 8004ed6:	e00e      	b.n	8004ef6 <UartTxTask+0x22a>
        	{
        		if(boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber)
 8004ed8:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004edc:	4a63      	ldr	r2, [pc, #396]	@ (800506c <UartTxTask+0x3a0>)
 8004ede:	5cd2      	ldrb	r2, [r2, r3]
 8004ee0:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004ee4:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004ee8:	429a      	cmp	r2, r3
 8004eea:	d009      	beq.n	8004f00 <UartTxTask+0x234>
        	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8004eec:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004ef0:	3301      	adds	r3, #1
 8004ef2:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 8004ef6:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004efa:	2b03      	cmp	r3, #3
 8004efc:	d9ec      	bls.n	8004ed8 <UartTxTask+0x20c>
 8004efe:	e000      	b.n	8004f02 <UartTxTask+0x236>
        		{
        			break;
 8004f00:	bf00      	nop
        		}
        	}
            if (bytesInMsg == 0) {
 8004f02:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004f06:	2b00      	cmp	r3, #0
 8004f08:	d124      	bne.n	8004f54 <UartTxTask+0x288>
                if (frameCommand == spGetElectricalMeasurments)
 8004f0a:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8004f0e:	2b00      	cmp	r3, #0
 8004f10:	d114      	bne.n	8004f3c <UartTxTask+0x270>
                {
                	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004f12:	4b57      	ldr	r3, [pc, #348]	@ (8005070 <UartTxTask+0x3a4>)
 8004f14:	681b      	ldr	r3, [r3, #0]
 8004f16:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004f1a:	4618      	mov	r0, r3
 8004f1c:	f00c fbb1 	bl	8011682 <osMutexAcquire>
                	slaveLastSeen[boardNumber]++;
 8004f20:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004f24:	4a53      	ldr	r2, [pc, #332]	@ (8005074 <UartTxTask+0x3a8>)
 8004f26:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8004f2a:	3201      	adds	r2, #1
 8004f2c:	4951      	ldr	r1, [pc, #324]	@ (8005074 <UartTxTask+0x3a8>)
 8004f2e:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
                	osMutexRelease(resMeasurementsMutex);
 8004f32:	4b4f      	ldr	r3, [pc, #316]	@ (8005070 <UartTxTask+0x3a4>)
 8004f34:	681b      	ldr	r3, [r3, #0]
 8004f36:	4618      	mov	r0, r3
 8004f38:	f00c fbee 	bl	8011718 <osMutexRelease>
                }
                printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
 8004f3c:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004f40:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004f44:	4619      	mov	r1, r3
 8004f46:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004f4a:	461a      	mov	r2, r3
 8004f4c:	484a      	ldr	r0, [pc, #296]	@ (8005078 <UartTxTask+0x3ac>)
 8004f4e:	f025 fc05 	bl	802a75c <iprintf>
 8004f52:	e6f4      	b.n	8004d3e <UartTxTask+0x72>
            } else {
                if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
 8004f54:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004f58:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004f5c:	881b      	ldrh	r3, [r3, #0]
 8004f5e:	f8b7 213e 	ldrh.w	r2, [r7, #318]	@ 0x13e
 8004f62:	429a      	cmp	r2, r3
 8004f64:	f47f aeeb 	bne.w	8004d3e <UartTxTask+0x72>
 8004f68:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004f6c:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004f70:	f993 3003 	ldrsb.w	r3, [r3, #3]
 8004f74:	2b00      	cmp	r3, #0
 8004f76:	f47f aee2 	bne.w	8004d3e <UartTxTask+0x72>
                    printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
 8004f7a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8004f7e:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004f82:	4619      	mov	r1, r3
 8004f84:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004f88:	461a      	mov	r2, r3
 8004f8a:	483c      	ldr	r0, [pc, #240]	@ (800507c <UartTxTask+0x3b0>)
 8004f8c:	f025 fbe6 	bl	802a75c <iprintf>
                    slaveLastSeen[boardNumber] = 0;
 8004f90:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8004f94:	4a37      	ldr	r2, [pc, #220]	@ (8005074 <UartTxTask+0x3a8>)
 8004f96:	2100      	movs	r1, #0
 8004f98:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
                    switch(frameData.frameHeader.frameCommand)
 8004f9c:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fa0:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004fa4:	789b      	ldrb	r3, [r3, #2]
 8004fa6:	2b00      	cmp	r3, #0
 8004fa8:	d002      	beq.n	8004fb0 <UartTxTask+0x2e4>
 8004faa:	2b01      	cmp	r3, #1
 8004fac:	d06a      	beq.n	8005084 <UartTxTask+0x3b8>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
                    	osMutexRelease(sensorsInfoMutex);
                    	break;
                    default:
                    	break;
 8004fae:	e161      	b.n	8005274 <UartTxTask+0x5a8>
                    	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8004fb0:	4b2f      	ldr	r3, [pc, #188]	@ (8005070 <UartTxTask+0x3a4>)
 8004fb2:	681b      	ldr	r3, [r3, #0]
 8004fb4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004fb8:	4618      	mov	r0, r3
 8004fba:	f00c fb62 	bl	8011682 <osMutexAcquire>
            			RESMeasurements *resMeas = &resMeasurements[boardNumber];
 8004fbe:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 8004fc2:	4613      	mov	r3, r2
 8004fc4:	011b      	lsls	r3, r3, #4
 8004fc6:	1a9b      	subs	r3, r3, r2
 8004fc8:	009b      	lsls	r3, r3, #2
 8004fca:	4a2d      	ldr	r2, [pc, #180]	@ (8005080 <UartTxTask+0x3b4>)
 8004fcc:	4413      	add	r3, r2
 8004fce:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
                    	inputDataBufferPos = 0;
 8004fd2:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fd6:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 8004fda:	2200      	movs	r2, #0
 8004fdc:	801a      	strh	r2, [r3, #0]
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
 8004fde:	f8d7 212c 	ldr.w	r2, [r7, #300]	@ 0x12c
 8004fe2:	f107 010a 	add.w	r1, r7, #10
 8004fe6:	f107 0310 	add.w	r3, r7, #16
 8004fea:	330c      	adds	r3, #12
 8004fec:	4618      	mov	r0, r3
 8004fee:	f7ff fe4f 	bl	8004c90 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
 8004ff2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ff6:	f103 020c 	add.w	r2, r3, #12
 8004ffa:	f107 010a 	add.w	r1, r7, #10
 8004ffe:	f107 0310 	add.w	r3, r7, #16
 8005002:	330c      	adds	r3, #12
 8005004:	4618      	mov	r0, r3
 8005006:	f7ff fe43 	bl	8004c90 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
 800500a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800500e:	f103 0218 	add.w	r2, r3, #24
 8005012:	f107 010a 	add.w	r1, r7, #10
 8005016:	f107 0310 	add.w	r3, r7, #16
 800501a:	330c      	adds	r3, #12
 800501c:	4618      	mov	r0, r3
 800501e:	f7ff fe37 	bl	8004c90 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
 8005022:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8005026:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 800502a:	f107 010a 	add.w	r1, r7, #10
 800502e:	f107 0310 	add.w	r3, r7, #16
 8005032:	330c      	adds	r3, #12
 8005034:	4618      	mov	r0, r3
 8005036:	f7ff fe2b 	bl	8004c90 <ReadMeasSetFromBuffer>
                    	ReadMeasSetFromBuffer(frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
 800503a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800503e:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 8005042:	f107 010a 	add.w	r1, r7, #10
 8005046:	f107 0310 	add.w	r3, r7, #16
 800504a:	330c      	adds	r3, #12
 800504c:	4618      	mov	r0, r3
 800504e:	f7ff fe1f 	bl	8004c90 <ReadMeasSetFromBuffer>
                    	osMutexRelease(resMeasurementsMutex);
 8005052:	4b07      	ldr	r3, [pc, #28]	@ (8005070 <UartTxTask+0x3a4>)
 8005054:	681b      	ldr	r3, [r3, #0]
 8005056:	4618      	mov	r0, r3
 8005058:	f00c fb5e 	bl	8011718 <osMutexRelease>
                    	break;
 800505c:	e10a      	b.n	8005274 <UartTxTask+0x5a8>
 800505e:	bf00      	nop
 8005060:	2400026c 	.word	0x2400026c
 8005064:	24002084 	.word	0x24002084
 8005068:	24002004 	.word	0x24002004
 800506c:	24000014 	.word	0x24000014
 8005070:	24002248 	.word	0x24002248
 8005074:	24002238 	.word	0x24002238
 8005078:	0802d858 	.word	0x0802d858
 800507c:	0802d884 	.word	0x0802d884
 8005080:	24002088 	.word	0x24002088
                    	osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8005084:	4b7c      	ldr	r3, [pc, #496]	@ (8005278 <UartTxTask+0x5ac>)
 8005086:	681b      	ldr	r3, [r3, #0]
 8005088:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800508c:	4618      	mov	r0, r3
 800508e:	f00c faf8 	bl	8011682 <osMutexAcquire>
                    	inputDataBufferPos = 0;
 8005092:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8005096:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 800509a:	2200      	movs	r2, #0
 800509c:	801a      	strh	r2, [r3, #0]
                    	SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 800509e:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 80050a2:	4613      	mov	r3, r2
 80050a4:	005b      	lsls	r3, r3, #1
 80050a6:	4413      	add	r3, r2
 80050a8:	011b      	lsls	r3, r3, #4
 80050aa:	4a74      	ldr	r2, [pc, #464]	@ (800527c <UartTxTask+0x5b0>)
 80050ac:	4413      	add	r3, r2
 80050ae:	f8c7 3130 	str.w	r3, [r7, #304]	@ 0x130
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[0]);
 80050b2:	f8d7 2130 	ldr.w	r2, [r7, #304]	@ 0x130
 80050b6:	f107 010a 	add.w	r1, r7, #10
 80050ba:	f107 0310 	add.w	r3, r7, #16
 80050be:	330c      	adds	r3, #12
 80050c0:	4618      	mov	r0, r3
 80050c2:	f7fe fa52 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[1]);
 80050c6:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80050ca:	1d1a      	adds	r2, r3, #4
 80050cc:	f107 010a 	add.w	r1, r7, #10
 80050d0:	f107 0310 	add.w	r3, r7, #16
 80050d4:	330c      	adds	r3, #12
 80050d6:	4618      	mov	r0, r3
 80050d8:	f7fe fa47 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->fanVoltage);
 80050dc:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80050e0:	f103 0208 	add.w	r2, r3, #8
 80050e4:	f107 010a 	add.w	r1, r7, #10
 80050e8:	f107 0310 	add.w	r3, r7, #16
 80050ec:	330c      	adds	r3, #12
 80050ee:	4618      	mov	r0, r3
 80050f0:	f7fe fa3b 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderX);
 80050f4:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80050f8:	f103 020c 	add.w	r2, r3, #12
 80050fc:	f107 010a 	add.w	r1, r7, #10
 8005100:	f107 0310 	add.w	r3, r7, #16
 8005104:	330c      	adds	r3, #12
 8005106:	4618      	mov	r0, r3
 8005108:	f7fe fa2f 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderY);
 800510c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005110:	f103 0210 	add.w	r2, r3, #16
 8005114:	f107 010a 	add.w	r1, r7, #10
 8005118:	f107 0310 	add.w	r3, r7, #16
 800511c:	330c      	adds	r3, #12
 800511e:	4618      	mov	r0, r3
 8005120:	f7fe fa23 	bl	800356a <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXStatus);
 8005124:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005128:	f103 0214 	add.w	r2, r3, #20
 800512c:	f107 010a 	add.w	r1, r7, #10
 8005130:	f107 0310 	add.w	r3, r7, #16
 8005134:	330c      	adds	r3, #12
 8005136:	4618      	mov	r0, r3
 8005138:	f7fe fa4c 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYStatus);
 800513c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005140:	f103 0215 	add.w	r2, r3, #21
 8005144:	f107 010a 	add.w	r1, r7, #10
 8005148:	f107 0310 	add.w	r3, r7, #16
 800514c:	330c      	adds	r3, #12
 800514e:	4618      	mov	r0, r3
 8005150:	f7fe fa40 	bl	80035d4 <ReadByteFromBufer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXAveCurrent);
 8005154:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005158:	f103 0218 	add.w	r2, r3, #24
 800515c:	f107 010a 	add.w	r1, r7, #10
 8005160:	f107 0310 	add.w	r3, r7, #16
 8005164:	330c      	adds	r3, #12
 8005166:	4618      	mov	r0, r3
 8005168:	f7fe f9ff 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYAveCurrent);
 800516c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005170:	f103 021c 	add.w	r2, r3, #28
 8005174:	f107 010a 	add.w	r1, r7, #10
 8005178:	f107 0310 	add.w	r3, r7, #16
 800517c:	330c      	adds	r3, #12
 800517e:	4618      	mov	r0, r3
 8005180:	f7fe f9f3 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXPeakCurrent);
 8005184:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005188:	f103 0220 	add.w	r2, r3, #32
 800518c:	f107 010a 	add.w	r1, r7, #10
 8005190:	f107 0310 	add.w	r3, r7, #16
 8005194:	330c      	adds	r3, #12
 8005196:	4618      	mov	r0, r3
 8005198:	f7fe f9e7 	bl	800356a <ReadFloatFromBuffer>
                    	ReadFloatFromBuffer(frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYPeakCurrent);
 800519c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80051a0:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 80051a4:	f107 010a 	add.w	r1, r7, #10
 80051a8:	f107 0310 	add.w	r3, r7, #16
 80051ac:	330c      	adds	r3, #12
 80051ae:	4618      	mov	r0, r3
 80051b0:	f7fe f9db 	bl	800356a <ReadFloatFromBuffer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchUp);
 80051b4:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80051b8:	f103 0228 	add.w	r2, r3, #40	@ 0x28
 80051bc:	f107 010a 	add.w	r1, r7, #10
 80051c0:	f107 0310 	add.w	r3, r7, #16
 80051c4:	330c      	adds	r3, #12
 80051c6:	4618      	mov	r0, r3
 80051c8:	f7fe fa04 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchDown);
 80051cc:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80051d0:	f103 0229 	add.w	r2, r3, #41	@ 0x29
 80051d4:	f107 010a 	add.w	r1, r7, #10
 80051d8:	f107 0310 	add.w	r3, r7, #16
 80051dc:	330c      	adds	r3, #12
 80051de:	4618      	mov	r0, r3
 80051e0:	f7fe f9f8 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchCenter);
 80051e4:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80051e8:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 80051ec:	f107 010a 	add.w	r1, r7, #10
 80051f0:	f107 0310 	add.w	r3, r7, #16
 80051f4:	330c      	adds	r3, #12
 80051f6:	4618      	mov	r0, r3
 80051f8:	f7fe f9ec 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchUp);
 80051fc:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005200:	f103 022b 	add.w	r2, r3, #43	@ 0x2b
 8005204:	f107 010a 	add.w	r1, r7, #10
 8005208:	f107 0310 	add.w	r3, r7, #16
 800520c:	330c      	adds	r3, #12
 800520e:	4618      	mov	r0, r3
 8005210:	f7fe f9e0 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchDown);
 8005214:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005218:	f103 022c 	add.w	r2, r3, #44	@ 0x2c
 800521c:	f107 010a 	add.w	r1, r7, #10
 8005220:	f107 0310 	add.w	r3, r7, #16
 8005224:	330c      	adds	r3, #12
 8005226:	4618      	mov	r0, r3
 8005228:	f7fe f9d4 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
 800522c:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005230:	f103 022d 	add.w	r2, r3, #45	@ 0x2d
 8005234:	f107 010a 	add.w	r1, r7, #10
 8005238:	f107 0310 	add.w	r3, r7, #16
 800523c:	330c      	adds	r3, #12
 800523e:	4618      	mov	r0, r3
 8005240:	f7fe f9c8 	bl	80035d4 <ReadByteFromBufer>
                    	ReadByteFromBufer(frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
 8005244:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005248:	f103 022e 	add.w	r2, r3, #46	@ 0x2e
 800524c:	f107 010a 	add.w	r1, r7, #10
 8005250:	f107 0310 	add.w	r3, r7, #16
 8005254:	330c      	adds	r3, #12
 8005256:	4618      	mov	r0, r3
 8005258:	f7fe f9bc 	bl	80035d4 <ReadByteFromBufer>
                    	osMutexRelease(sensorsInfoMutex);
 800525c:	4b06      	ldr	r3, [pc, #24]	@ (8005278 <UartTxTask+0x5ac>)
 800525e:	681b      	ldr	r3, [r3, #0]
 8005260:	4618      	mov	r0, r3
 8005262:	f00c fa59 	bl	8011718 <osMutexRelease>
                    	break;
 8005266:	e005      	b.n	8005274 <UartTxTask+0x5a8>
                    }
                }
            }
        } else {
            osDelay (pdMS_TO_TICKS (1000));
 8005268:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 800526c:	f00c f871 	bl	8011352 <osDelay>
 8005270:	e565      	b.n	8004d3e <UartTxTask+0x72>
            default: continue; break;
 8005272:	bf00      	nop
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 8005274:	e563      	b.n	8004d3e <UartTxTask+0x72>
 8005276:	bf00      	nop
 8005278:	2400224c 	.word	0x2400224c
 800527c:	24002178 	.word	0x24002178

08005280 <MeasurmentsReqSchedulerTaskInit>:
        }
    }
}

void MeasurmentsReqSchedulerTaskInit (void) {
 8005280:	b580      	push	{r7, lr}
 8005282:	b08a      	sub	sp, #40	@ 0x28
 8005284:	af00      	add	r7, sp, #0
    osThreadAttr_t osThreadAttrMeasurmentsReqSchedulerTask = { 0 };
 8005286:	1d3b      	adds	r3, r7, #4
 8005288:	2224      	movs	r2, #36	@ 0x24
 800528a:	2100      	movs	r1, #0
 800528c:	4618      	mov	r0, r3
 800528e:	f025 fbf7 	bl	802aa80 <memset>

    osThreadAttrMeasurmentsReqSchedulerTask.name       = "os_thread_XXX";
 8005292:	4b08      	ldr	r3, [pc, #32]	@ (80052b4 <MeasurmentsReqSchedulerTaskInit+0x34>)
 8005294:	607b      	str	r3, [r7, #4]
    osThreadAttrMeasurmentsReqSchedulerTask.stack_size = configMINIMAL_STACK_SIZE * 2;
 8005296:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 800529a:	61bb      	str	r3, [r7, #24]
    osThreadAttrMeasurmentsReqSchedulerTask.priority   = (osPriority_t)osPriorityNormal;
 800529c:	2318      	movs	r3, #24
 800529e:	61fb      	str	r3, [r7, #28]

    osThreadNew (MeasurmentsReqSchedulerTask, uartTasks, &osThreadAttrMeasurmentsReqSchedulerTask);
 80052a0:	1d3b      	adds	r3, r7, #4
 80052a2:	461a      	mov	r2, r3
 80052a4:	4904      	ldr	r1, [pc, #16]	@ (80052b8 <MeasurmentsReqSchedulerTaskInit+0x38>)
 80052a6:	4805      	ldr	r0, [pc, #20]	@ (80052bc <MeasurmentsReqSchedulerTaskInit+0x3c>)
 80052a8:	f00b ffb5 	bl	8011216 <osThreadNew>
}
 80052ac:	bf00      	nop
 80052ae:	3728      	adds	r7, #40	@ 0x28
 80052b0:	46bd      	mov	sp, r7
 80052b2:	bd80      	pop	{r7, pc}
 80052b4:	0802d8ac 	.word	0x0802d8ac
 80052b8:	24000018 	.word	0x24000018
 80052bc:	080052c1 	.word	0x080052c1

080052c0 <MeasurmentsReqSchedulerTask>:

void MeasurmentsReqSchedulerTask (void* argument) {
 80052c0:	b580      	push	{r7, lr}
 80052c2:	b08a      	sub	sp, #40	@ 0x28
 80052c4:	af00      	add	r7, sp, #0
 80052c6:	6078      	str	r0, [r7, #4]
    while (pdTRUE) {
        __uintptr_t* ptr = (__uintptr_t*)argument;
 80052c8:	687b      	ldr	r3, [r7, #4]
 80052ca:	627b      	str	r3, [r7, #36]	@ 0x24
        while (*ptr != 0) {
 80052cc:	e052      	b.n	8005374 <MeasurmentsReqSchedulerTask+0xb4>
            UartTaskData* uartTask = (UartTaskData*)*ptr;
 80052ce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80052d0:	681b      	ldr	r3, [r3, #0]
 80052d2:	61fb      	str	r3, [r7, #28]
            if (uartTask->sendCmdToSlaveQueue != NULL) {
 80052d4:	69fb      	ldr	r3, [r7, #28]
 80052d6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80052d8:	2b00      	cmp	r3, #0
 80052da:	d048      	beq.n	800536e <MeasurmentsReqSchedulerTask+0xae>
                InterProcessData data = { 0 };
 80052dc:	f107 030c 	add.w	r3, r7, #12
 80052e0:	2200      	movs	r2, #0
 80052e2:	601a      	str	r2, [r3, #0]
 80052e4:	605a      	str	r2, [r3, #4]
 80052e6:	609a      	str	r2, [r3, #8]
 80052e8:	60da      	str	r2, [r3, #12]
                uint8_t boardNumber = 0;
 80052ea:	2300      	movs	r3, #0
 80052ec:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 80052f0:	2300      	movs	r3, #0
 80052f2:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 80052f6:	e00d      	b.n	8005314 <MeasurmentsReqSchedulerTask+0x54>
            	{
            		if(boardToUartNumberMap[boardNumber] == uartTask->uartNumber)
 80052f8:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80052fc:	4a22      	ldr	r2, [pc, #136]	@ (8005388 <MeasurmentsReqSchedulerTask+0xc8>)
 80052fe:	5cd2      	ldrb	r2, [r2, r3]
 8005300:	69fb      	ldr	r3, [r7, #28]
 8005302:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8005306:	429a      	cmp	r2, r3
 8005308:	d009      	beq.n	800531e <MeasurmentsReqSchedulerTask+0x5e>
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 800530a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800530e:	3301      	adds	r3, #1
 8005310:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8005314:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8005318:	2b03      	cmp	r3, #3
 800531a:	d9ed      	bls.n	80052f8 <MeasurmentsReqSchedulerTask+0x38>
 800531c:	e000      	b.n	8005320 <MeasurmentsReqSchedulerTask+0x60>
            		{
            			break;
 800531e:	bf00      	nop
            		}
            	}
                data.spCommand        = spGetElectricalMeasurments;
 8005320:	2300      	movs	r3, #0
 8005322:	733b      	strb	r3, [r7, #12]
                osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8005324:	69fb      	ldr	r3, [r7, #28]
 8005326:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8005328:	f107 010c 	add.w	r1, r7, #12
 800532c:	2364      	movs	r3, #100	@ 0x64
 800532e:	2200      	movs	r2, #0
 8005330:	f00c fbe6 	bl	8011b00 <osMessageQueuePut>
            	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8005334:	4b15      	ldr	r3, [pc, #84]	@ (800538c <MeasurmentsReqSchedulerTask+0xcc>)
 8005336:	681b      	ldr	r3, [r3, #0]
 8005338:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800533c:	4618      	mov	r0, r3
 800533e:	f00c f9a0 	bl	8011682 <osMutexAcquire>
            	if(slaveLastSeen[boardNumber] == 0)
 8005342:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8005346:	4a12      	ldr	r2, [pc, #72]	@ (8005390 <MeasurmentsReqSchedulerTask+0xd0>)
 8005348:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 800534c:	2b00      	cmp	r3, #0
 800534e:	d109      	bne.n	8005364 <MeasurmentsReqSchedulerTask+0xa4>
            	{
            		data.spCommand = spGetSensorMeasurments;
 8005350:	2301      	movs	r3, #1
 8005352:	733b      	strb	r3, [r7, #12]
            		osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8005354:	69fb      	ldr	r3, [r7, #28]
 8005356:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8005358:	f107 010c 	add.w	r1, r7, #12
 800535c:	2364      	movs	r3, #100	@ 0x64
 800535e:	2200      	movs	r2, #0
 8005360:	f00c fbce 	bl	8011b00 <osMessageQueuePut>
            	}
            	osMutexRelease(resMeasurementsMutex);
 8005364:	4b09      	ldr	r3, [pc, #36]	@ (800538c <MeasurmentsReqSchedulerTask+0xcc>)
 8005366:	681b      	ldr	r3, [r3, #0]
 8005368:	4618      	mov	r0, r3
 800536a:	f00c f9d5 	bl	8011718 <osMutexRelease>
            }
            ptr++;
 800536e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8005370:	3304      	adds	r3, #4
 8005372:	627b      	str	r3, [r7, #36]	@ 0x24
        while (*ptr != 0) {
 8005374:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8005376:	681b      	ldr	r3, [r3, #0]
 8005378:	2b00      	cmp	r3, #0
 800537a:	d1a8      	bne.n	80052ce <MeasurmentsReqSchedulerTask+0xe>
        }
        osDelay (pdMS_TO_TICKS (MEASURMENTS_SCHEDULER_INTERVAL_MS));
 800537c:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8005380:	f00b ffe7 	bl	8011352 <osDelay>
    while (pdTRUE) {
 8005384:	e7a0      	b.n	80052c8 <MeasurmentsReqSchedulerTask+0x8>
 8005386:	bf00      	nop
 8005388:	24000014 	.word	0x24000014
 800538c:	24002248 	.word	0x24002248
 8005390:	24002238 	.word	0x24002238

08005394 <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:
  ldr   sp, =_estack      /* set stack pointer */
 8005394:	f8df d034 	ldr.w	sp, [pc, #52]	@ 80053cc <LoopFillZerobss+0xe>

/* Call the clock system initialization function.*/
  bl  SystemInit
 8005398:	f7fe ff36 	bl	8004208 <SystemInit>

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 800539c:	480c      	ldr	r0, [pc, #48]	@ (80053d0 <LoopFillZerobss+0x12>)
  ldr r1, =_edata
 800539e:	490d      	ldr	r1, [pc, #52]	@ (80053d4 <LoopFillZerobss+0x16>)
  ldr r2, =_sidata
 80053a0:	4a0d      	ldr	r2, [pc, #52]	@ (80053d8 <LoopFillZerobss+0x1a>)
  movs r3, #0
 80053a2:	2300      	movs	r3, #0
  b LoopCopyDataInit
 80053a4:	e002      	b.n	80053ac <LoopCopyDataInit>

080053a6 <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 80053a6:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 80053a8:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 80053aa:	3304      	adds	r3, #4

080053ac <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 80053ac:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 80053ae:	428c      	cmp	r4, r1
  bcc CopyDataInit
 80053b0:	d3f9      	bcc.n	80053a6 <CopyDataInit>
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 80053b2:	4a0a      	ldr	r2, [pc, #40]	@ (80053dc <LoopFillZerobss+0x1e>)
  ldr r4, =_ebss
 80053b4:	4c0a      	ldr	r4, [pc, #40]	@ (80053e0 <LoopFillZerobss+0x22>)
  movs r3, #0
 80053b6:	2300      	movs	r3, #0
  b LoopFillZerobss
 80053b8:	e001      	b.n	80053be <LoopFillZerobss>

080053ba <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 80053ba:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 80053bc:	3204      	adds	r2, #4

080053be <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 80053be:	42a2      	cmp	r2, r4
  bcc FillZerobss
 80053c0:	d3fb      	bcc.n	80053ba <FillZerobss>

/* Call static constructors */
    bl __libc_init_array
 80053c2:	f025 fc2d 	bl	802ac20 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 80053c6:	f7fc fc89 	bl	8001cdc <main>
  bx  lr
 80053ca:	4770      	bx	lr
  ldr   sp, =_estack      /* set stack pointer */
 80053cc:	24060000 	.word	0x24060000
  ldr r0, =_sdata
 80053d0:	24000000 	.word	0x24000000
  ldr r1, =_edata
 80053d4:	24000224 	.word	0x24000224
  ldr r2, =_sidata
 80053d8:	08031ffc 	.word	0x08031ffc
  ldr r2, =_sbss
 80053dc:	24000224 	.word	0x24000224
  ldr r4, =_ebss
 80053e0:	2402b268 	.word	0x2402b268

080053e4 <ADC3_IRQHandler>:
 * @retval None
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 80053e4:	e7fe      	b.n	80053e4 <ADC3_IRQHandler>

080053e6 <DP83848_RegisterBusIO>:
  * @param  ioctx: holds device IO functions.
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ERROR if missing mandatory function
  */
int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
 80053e6:	b480      	push	{r7}
 80053e8:	b083      	sub	sp, #12
 80053ea:	af00      	add	r7, sp, #0
 80053ec:	6078      	str	r0, [r7, #4]
 80053ee:	6039      	str	r1, [r7, #0]
  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
 80053f0:	687b      	ldr	r3, [r7, #4]
 80053f2:	2b00      	cmp	r3, #0
 80053f4:	d00b      	beq.n	800540e <DP83848_RegisterBusIO+0x28>
 80053f6:	683b      	ldr	r3, [r7, #0]
 80053f8:	68db      	ldr	r3, [r3, #12]
 80053fa:	2b00      	cmp	r3, #0
 80053fc:	d007      	beq.n	800540e <DP83848_RegisterBusIO+0x28>
 80053fe:	683b      	ldr	r3, [r7, #0]
 8005400:	689b      	ldr	r3, [r3, #8]
 8005402:	2b00      	cmp	r3, #0
 8005404:	d003      	beq.n	800540e <DP83848_RegisterBusIO+0x28>
 8005406:	683b      	ldr	r3, [r7, #0]
 8005408:	691b      	ldr	r3, [r3, #16]
 800540a:	2b00      	cmp	r3, #0
 800540c:	d102      	bne.n	8005414 <DP83848_RegisterBusIO+0x2e>
  {
    return DP83848_STATUS_ERROR;
 800540e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8005412:	e014      	b.n	800543e <DP83848_RegisterBusIO+0x58>
  }

  pObj->IO.Init = ioctx->Init;
 8005414:	683b      	ldr	r3, [r7, #0]
 8005416:	681a      	ldr	r2, [r3, #0]
 8005418:	687b      	ldr	r3, [r7, #4]
 800541a:	609a      	str	r2, [r3, #8]
  pObj->IO.DeInit = ioctx->DeInit;
 800541c:	683b      	ldr	r3, [r7, #0]
 800541e:	685a      	ldr	r2, [r3, #4]
 8005420:	687b      	ldr	r3, [r7, #4]
 8005422:	60da      	str	r2, [r3, #12]
  pObj->IO.ReadReg = ioctx->ReadReg;
 8005424:	683b      	ldr	r3, [r7, #0]
 8005426:	68da      	ldr	r2, [r3, #12]
 8005428:	687b      	ldr	r3, [r7, #4]
 800542a:	615a      	str	r2, [r3, #20]
  pObj->IO.WriteReg = ioctx->WriteReg;
 800542c:	683b      	ldr	r3, [r7, #0]
 800542e:	689a      	ldr	r2, [r3, #8]
 8005430:	687b      	ldr	r3, [r7, #4]
 8005432:	611a      	str	r2, [r3, #16]
  pObj->IO.GetTick = ioctx->GetTick;
 8005434:	683b      	ldr	r3, [r7, #0]
 8005436:	691a      	ldr	r2, [r3, #16]
 8005438:	687b      	ldr	r3, [r7, #4]
 800543a:	619a      	str	r2, [r3, #24]

  return DP83848_STATUS_OK;
 800543c:	2300      	movs	r3, #0
}
 800543e:	4618      	mov	r0, r3
 8005440:	370c      	adds	r7, #12
 8005442:	46bd      	mov	sp, r7
 8005444:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005448:	4770      	bx	lr

0800544a <DP83848_Init>:
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ADDRESS_ERROR if cannot find device address
  *         DP83848_STATUS_READ_ERROR if connot read register
  */
 int32_t DP83848_Init(dp83848_Object_t *pObj)
 {
 800544a:	b580      	push	{r7, lr}
 800544c:	b086      	sub	sp, #24
 800544e:	af00      	add	r7, sp, #0
 8005450:	6078      	str	r0, [r7, #4]
   uint32_t regvalue = 0, addr = 0;
 8005452:	2300      	movs	r3, #0
 8005454:	60fb      	str	r3, [r7, #12]
 8005456:	2300      	movs	r3, #0
 8005458:	617b      	str	r3, [r7, #20]
   int32_t status = DP83848_STATUS_OK;
 800545a:	2300      	movs	r3, #0
 800545c:	613b      	str	r3, [r7, #16]

   if(pObj->Is_Initialized == 0)
 800545e:	687b      	ldr	r3, [r7, #4]
 8005460:	685b      	ldr	r3, [r3, #4]
 8005462:	2b00      	cmp	r3, #0
 8005464:	d139      	bne.n	80054da <DP83848_Init+0x90>
   {
     if(pObj->IO.Init != 0)
 8005466:	687b      	ldr	r3, [r7, #4]
 8005468:	689b      	ldr	r3, [r3, #8]
 800546a:	2b00      	cmp	r3, #0
 800546c:	d002      	beq.n	8005474 <DP83848_Init+0x2a>
     {
       /* GPIO and Clocks initialization */
       pObj->IO.Init();
 800546e:	687b      	ldr	r3, [r7, #4]
 8005470:	689b      	ldr	r3, [r3, #8]
 8005472:	4798      	blx	r3
     }

     /* for later check */
     pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
 8005474:	687b      	ldr	r3, [r7, #4]
 8005476:	2220      	movs	r2, #32
 8005478:	601a      	str	r2, [r3, #0]

     /* Get the device address from special mode register */
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 800547a:	2300      	movs	r3, #0
 800547c:	617b      	str	r3, [r7, #20]
 800547e:	e01c      	b.n	80054ba <DP83848_Init+0x70>
     {
       if(pObj->IO.ReadReg(addr, DP83848_SMR, &regvalue) < 0)
 8005480:	687b      	ldr	r3, [r7, #4]
 8005482:	695b      	ldr	r3, [r3, #20]
 8005484:	f107 020c 	add.w	r2, r7, #12
 8005488:	2119      	movs	r1, #25
 800548a:	6978      	ldr	r0, [r7, #20]
 800548c:	4798      	blx	r3
 800548e:	4603      	mov	r3, r0
 8005490:	2b00      	cmp	r3, #0
 8005492:	da03      	bge.n	800549c <DP83848_Init+0x52>
       {
         status = DP83848_STATUS_READ_ERROR;
 8005494:	f06f 0304 	mvn.w	r3, #4
 8005498:	613b      	str	r3, [r7, #16]
         /* Can't read from this device address
            continue with next address */
         continue;
 800549a:	e00b      	b.n	80054b4 <DP83848_Init+0x6a>
       }

       if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
 800549c:	68fb      	ldr	r3, [r7, #12]
 800549e:	f003 031f 	and.w	r3, r3, #31
 80054a2:	697a      	ldr	r2, [r7, #20]
 80054a4:	429a      	cmp	r2, r3
 80054a6:	d105      	bne.n	80054b4 <DP83848_Init+0x6a>
       {
         pObj->DevAddr = addr;
 80054a8:	687b      	ldr	r3, [r7, #4]
 80054aa:	697a      	ldr	r2, [r7, #20]
 80054ac:	601a      	str	r2, [r3, #0]
         status = DP83848_STATUS_OK;
 80054ae:	2300      	movs	r3, #0
 80054b0:	613b      	str	r3, [r7, #16]
         break;
 80054b2:	e005      	b.n	80054c0 <DP83848_Init+0x76>
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 80054b4:	697b      	ldr	r3, [r7, #20]
 80054b6:	3301      	adds	r3, #1
 80054b8:	617b      	str	r3, [r7, #20]
 80054ba:	697b      	ldr	r3, [r7, #20]
 80054bc:	2b1f      	cmp	r3, #31
 80054be:	d9df      	bls.n	8005480 <DP83848_Init+0x36>
       }
     }

     if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
 80054c0:	687b      	ldr	r3, [r7, #4]
 80054c2:	681b      	ldr	r3, [r3, #0]
 80054c4:	2b1f      	cmp	r3, #31
 80054c6:	d902      	bls.n	80054ce <DP83848_Init+0x84>
     {
       status = DP83848_STATUS_ADDRESS_ERROR;
 80054c8:	f06f 0302 	mvn.w	r3, #2
 80054cc:	613b      	str	r3, [r7, #16]
     }

     /* if device address is matched */
     if(status == DP83848_STATUS_OK)
 80054ce:	693b      	ldr	r3, [r7, #16]
 80054d0:	2b00      	cmp	r3, #0
 80054d2:	d102      	bne.n	80054da <DP83848_Init+0x90>
     {
       pObj->Is_Initialized = 1;
 80054d4:	687b      	ldr	r3, [r7, #4]
 80054d6:	2201      	movs	r2, #1
 80054d8:	605a      	str	r2, [r3, #4]
     }
   }

   return status;
 80054da:	693b      	ldr	r3, [r7, #16]
 }
 80054dc:	4618      	mov	r0, r3
 80054de:	3718      	adds	r7, #24
 80054e0:	46bd      	mov	sp, r7
 80054e2:	bd80      	pop	{r7, pc}

080054e4 <DP83848_GetLinkState>:
  *         DP83848_STATUS_10MBITS_HALFDUPLEX  if 10Mb/s HD
  *         DP83848_STATUS_READ_ERROR if connot read register
  *         DP83848_STATUS_WRITE_ERROR if connot write to register
  */
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
 80054e4:	b580      	push	{r7, lr}
 80054e6:	b084      	sub	sp, #16
 80054e8:	af00      	add	r7, sp, #0
 80054ea:	6078      	str	r0, [r7, #4]
  uint32_t readval = 0;
 80054ec:	2300      	movs	r3, #0
 80054ee:	60fb      	str	r3, [r7, #12]

  /* Read Status register  */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 80054f0:	687b      	ldr	r3, [r7, #4]
 80054f2:	695b      	ldr	r3, [r3, #20]
 80054f4:	687a      	ldr	r2, [r7, #4]
 80054f6:	6810      	ldr	r0, [r2, #0]
 80054f8:	f107 020c 	add.w	r2, r7, #12
 80054fc:	2101      	movs	r1, #1
 80054fe:	4798      	blx	r3
 8005500:	4603      	mov	r3, r0
 8005502:	2b00      	cmp	r3, #0
 8005504:	da02      	bge.n	800550c <DP83848_GetLinkState+0x28>
  {
    return DP83848_STATUS_READ_ERROR;
 8005506:	f06f 0304 	mvn.w	r3, #4
 800550a:	e06e      	b.n	80055ea <DP83848_GetLinkState+0x106>
  }

  /* Read Status register again */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 800550c:	687b      	ldr	r3, [r7, #4]
 800550e:	695b      	ldr	r3, [r3, #20]
 8005510:	687a      	ldr	r2, [r7, #4]
 8005512:	6810      	ldr	r0, [r2, #0]
 8005514:	f107 020c 	add.w	r2, r7, #12
 8005518:	2101      	movs	r1, #1
 800551a:	4798      	blx	r3
 800551c:	4603      	mov	r3, r0
 800551e:	2b00      	cmp	r3, #0
 8005520:	da02      	bge.n	8005528 <DP83848_GetLinkState+0x44>
  {
    return DP83848_STATUS_READ_ERROR;
 8005522:	f06f 0304 	mvn.w	r3, #4
 8005526:	e060      	b.n	80055ea <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BSR_LINK_STATUS) == 0)
 8005528:	68fb      	ldr	r3, [r7, #12]
 800552a:	f003 0304 	and.w	r3, r3, #4
 800552e:	2b00      	cmp	r3, #0
 8005530:	d101      	bne.n	8005536 <DP83848_GetLinkState+0x52>
  {
    /* Return Link Down status */
    return DP83848_STATUS_LINK_DOWN;
 8005532:	2301      	movs	r3, #1
 8005534:	e059      	b.n	80055ea <DP83848_GetLinkState+0x106>
  }

  /* Check Auto negotiaition */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
 8005536:	687b      	ldr	r3, [r7, #4]
 8005538:	695b      	ldr	r3, [r3, #20]
 800553a:	687a      	ldr	r2, [r7, #4]
 800553c:	6810      	ldr	r0, [r2, #0]
 800553e:	f107 020c 	add.w	r2, r7, #12
 8005542:	2100      	movs	r1, #0
 8005544:	4798      	blx	r3
 8005546:	4603      	mov	r3, r0
 8005548:	2b00      	cmp	r3, #0
 800554a:	da02      	bge.n	8005552 <DP83848_GetLinkState+0x6e>
  {
    return DP83848_STATUS_READ_ERROR;
 800554c:	f06f 0304 	mvn.w	r3, #4
 8005550:	e04b      	b.n	80055ea <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
 8005552:	68fb      	ldr	r3, [r7, #12]
 8005554:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8005558:	2b00      	cmp	r3, #0
 800555a:	d11b      	bne.n	8005594 <DP83848_GetLinkState+0xb0>
  {
    if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
 800555c:	68fb      	ldr	r3, [r7, #12]
 800555e:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8005562:	2b00      	cmp	r3, #0
 8005564:	d006      	beq.n	8005574 <DP83848_GetLinkState+0x90>
 8005566:	68fb      	ldr	r3, [r7, #12]
 8005568:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800556c:	2b00      	cmp	r3, #0
 800556e:	d001      	beq.n	8005574 <DP83848_GetLinkState+0x90>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 8005570:	2302      	movs	r3, #2
 8005572:	e03a      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
 8005574:	68fb      	ldr	r3, [r7, #12]
 8005576:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800557a:	2b00      	cmp	r3, #0
 800557c:	d001      	beq.n	8005582 <DP83848_GetLinkState+0x9e>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 800557e:	2303      	movs	r3, #3
 8005580:	e033      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
 8005582:	68fb      	ldr	r3, [r7, #12]
 8005584:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8005588:	2b00      	cmp	r3, #0
 800558a:	d001      	beq.n	8005590 <DP83848_GetLinkState+0xac>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 800558c:	2304      	movs	r3, #4
 800558e:	e02c      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 8005590:	2305      	movs	r3, #5
 8005592:	e02a      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
  }
  else /* Auto Nego enabled */
  {
    if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
 8005594:	687b      	ldr	r3, [r7, #4]
 8005596:	695b      	ldr	r3, [r3, #20]
 8005598:	687a      	ldr	r2, [r7, #4]
 800559a:	6810      	ldr	r0, [r2, #0]
 800559c:	f107 020c 	add.w	r2, r7, #12
 80055a0:	2110      	movs	r1, #16
 80055a2:	4798      	blx	r3
 80055a4:	4603      	mov	r3, r0
 80055a6:	2b00      	cmp	r3, #0
 80055a8:	da02      	bge.n	80055b0 <DP83848_GetLinkState+0xcc>
    {
      return DP83848_STATUS_READ_ERROR;
 80055aa:	f06f 0304 	mvn.w	r3, #4
 80055ae:	e01c      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }

    /* Check if auto nego not done */
    if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
 80055b0:	68fb      	ldr	r3, [r7, #12]
 80055b2:	f003 0310 	and.w	r3, r3, #16
 80055b6:	2b00      	cmp	r3, #0
 80055b8:	d101      	bne.n	80055be <DP83848_GetLinkState+0xda>
    {
      return DP83848_STATUS_AUTONEGO_NOTDONE;
 80055ba:	2306      	movs	r3, #6
 80055bc:	e015      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }

    if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
 80055be:	68fb      	ldr	r3, [r7, #12]
 80055c0:	f003 0306 	and.w	r3, r3, #6
 80055c4:	2b04      	cmp	r3, #4
 80055c6:	d101      	bne.n	80055cc <DP83848_GetLinkState+0xe8>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 80055c8:	2302      	movs	r3, #2
 80055ca:	e00e      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
 80055cc:	68fb      	ldr	r3, [r7, #12]
 80055ce:	f003 0306 	and.w	r3, r3, #6
 80055d2:	2b00      	cmp	r3, #0
 80055d4:	d101      	bne.n	80055da <DP83848_GetLinkState+0xf6>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 80055d6:	2303      	movs	r3, #3
 80055d8:	e007      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
 80055da:	68fb      	ldr	r3, [r7, #12]
 80055dc:	f003 0306 	and.w	r3, r3, #6
 80055e0:	2b06      	cmp	r3, #6
 80055e2:	d101      	bne.n	80055e8 <DP83848_GetLinkState+0x104>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 80055e4:	2304      	movs	r3, #4
 80055e6:	e000      	b.n	80055ea <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 80055e8:	2305      	movs	r3, #5
    }
  }
}
 80055ea:	4618      	mov	r0, r3
 80055ec:	3710      	adds	r7, #16
 80055ee:	46bd      	mov	sp, r7
 80055f0:	bd80      	pop	{r7, pc}
	...

080055f4 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 80055f4:	b580      	push	{r7, lr}
 80055f6:	b082      	sub	sp, #8
 80055f8:	af00      	add	r7, sp, #0
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 80055fa:	2003      	movs	r0, #3
 80055fc:	f000 f947 	bl	800588e <HAL_NVIC_SetPriorityGrouping>

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 8005600:	f005 fcb4 	bl	800af6c <HAL_RCC_GetSysClockFreq>
 8005604:	4602      	mov	r2, r0
 8005606:	4b15      	ldr	r3, [pc, #84]	@ (800565c <HAL_Init+0x68>)
 8005608:	699b      	ldr	r3, [r3, #24]
 800560a:	0a1b      	lsrs	r3, r3, #8
 800560c:	f003 030f 	and.w	r3, r3, #15
 8005610:	4913      	ldr	r1, [pc, #76]	@ (8005660 <HAL_Init+0x6c>)
 8005612:	5ccb      	ldrb	r3, [r1, r3]
 8005614:	f003 031f 	and.w	r3, r3, #31
 8005618:	fa22 f303 	lsr.w	r3, r2, r3
 800561c:	607b      	str	r3, [r7, #4]
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

  /* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800561e:	4b0f      	ldr	r3, [pc, #60]	@ (800565c <HAL_Init+0x68>)
 8005620:	699b      	ldr	r3, [r3, #24]
 8005622:	f003 030f 	and.w	r3, r3, #15
 8005626:	4a0e      	ldr	r2, [pc, #56]	@ (8005660 <HAL_Init+0x6c>)
 8005628:	5cd3      	ldrb	r3, [r2, r3]
 800562a:	f003 031f 	and.w	r3, r3, #31
 800562e:	687a      	ldr	r2, [r7, #4]
 8005630:	fa22 f303 	lsr.w	r3, r2, r3
 8005634:	4a0b      	ldr	r2, [pc, #44]	@ (8005664 <HAL_Init+0x70>)
 8005636:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 8005638:	4a0b      	ldr	r2, [pc, #44]	@ (8005668 <HAL_Init+0x74>)
 800563a:	687b      	ldr	r3, [r7, #4]
 800563c:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
 800563e:	200f      	movs	r0, #15
 8005640:	f7fe fc30 	bl	8003ea4 <HAL_InitTick>
 8005644:	4603      	mov	r3, r0
 8005646:	2b00      	cmp	r3, #0
 8005648:	d001      	beq.n	800564e <HAL_Init+0x5a>
  {
    return HAL_ERROR;
 800564a:	2301      	movs	r3, #1
 800564c:	e002      	b.n	8005654 <HAL_Init+0x60>
  }

  /* Init the low level hardware */
  HAL_MspInit();
 800564e:	f7fe f919 	bl	8003884 <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 8005652:	2300      	movs	r3, #0
}
 8005654:	4618      	mov	r0, r3
 8005656:	3708      	adds	r7, #8
 8005658:	46bd      	mov	sp, r7
 800565a:	bd80      	pop	{r7, pc}
 800565c:	58024400 	.word	0x58024400
 8005660:	0803196c 	.word	0x0803196c
 8005664:	24000010 	.word	0x24000010
 8005668:	2400000c 	.word	0x2400000c

0800566c <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 800566c:	b480      	push	{r7}
 800566e:	af00      	add	r7, sp, #0
  uwTick += (uint32_t)uwTickFreq;
 8005670:	4b06      	ldr	r3, [pc, #24]	@ (800568c <HAL_IncTick+0x20>)
 8005672:	781b      	ldrb	r3, [r3, #0]
 8005674:	461a      	mov	r2, r3
 8005676:	4b06      	ldr	r3, [pc, #24]	@ (8005690 <HAL_IncTick+0x24>)
 8005678:	681b      	ldr	r3, [r3, #0]
 800567a:	4413      	add	r3, r2
 800567c:	4a04      	ldr	r2, [pc, #16]	@ (8005690 <HAL_IncTick+0x24>)
 800567e:	6013      	str	r3, [r2, #0]
}
 8005680:	bf00      	nop
 8005682:	46bd      	mov	sp, r7
 8005684:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005688:	4770      	bx	lr
 800568a:	bf00      	nop
 800568c:	24000030 	.word	0x24000030
 8005690:	24002250 	.word	0x24002250

08005694 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 8005694:	b480      	push	{r7}
 8005696:	af00      	add	r7, sp, #0
  return uwTick;
 8005698:	4b03      	ldr	r3, [pc, #12]	@ (80056a8 <HAL_GetTick+0x14>)
 800569a:	681b      	ldr	r3, [r3, #0]
}
 800569c:	4618      	mov	r0, r3
 800569e:	46bd      	mov	sp, r7
 80056a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80056a4:	4770      	bx	lr
 80056a6:	bf00      	nop
 80056a8:	24002250 	.word	0x24002250

080056ac <HAL_Delay>:
  *       implementations in user file.
  * @param Delay  specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80056ac:	b580      	push	{r7, lr}
 80056ae:	b084      	sub	sp, #16
 80056b0:	af00      	add	r7, sp, #0
 80056b2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 80056b4:	f7ff ffee 	bl	8005694 <HAL_GetTick>
 80056b8:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 80056ba:	687b      	ldr	r3, [r7, #4]
 80056bc:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80056be:	68fb      	ldr	r3, [r7, #12]
 80056c0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80056c4:	d005      	beq.n	80056d2 <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 80056c6:	4b0a      	ldr	r3, [pc, #40]	@ (80056f0 <HAL_Delay+0x44>)
 80056c8:	781b      	ldrb	r3, [r3, #0]
 80056ca:	461a      	mov	r2, r3
 80056cc:	68fb      	ldr	r3, [r7, #12]
 80056ce:	4413      	add	r3, r2
 80056d0:	60fb      	str	r3, [r7, #12]
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80056d2:	bf00      	nop
 80056d4:	f7ff ffde 	bl	8005694 <HAL_GetTick>
 80056d8:	4602      	mov	r2, r0
 80056da:	68bb      	ldr	r3, [r7, #8]
 80056dc:	1ad3      	subs	r3, r2, r3
 80056de:	68fa      	ldr	r2, [r7, #12]
 80056e0:	429a      	cmp	r2, r3
 80056e2:	d8f7      	bhi.n	80056d4 <HAL_Delay+0x28>
  {
  }
}
 80056e4:	bf00      	nop
 80056e6:	bf00      	nop
 80056e8:	3710      	adds	r7, #16
 80056ea:	46bd      	mov	sp, r7
 80056ec:	bd80      	pop	{r7, pc}
 80056ee:	bf00      	nop
 80056f0:	24000030 	.word	0x24000030

080056f4 <HAL_GetREVID>:
/**
  * @brief  Returns the device revision identifier.
  * @retval Device revision identifier
  */
uint32_t HAL_GetREVID(void)
{
 80056f4:	b480      	push	{r7}
 80056f6:	af00      	add	r7, sp, #0
   return((DBGMCU->IDCODE) >> 16);
 80056f8:	4b03      	ldr	r3, [pc, #12]	@ (8005708 <HAL_GetREVID+0x14>)
 80056fa:	681b      	ldr	r3, [r3, #0]
 80056fc:	0c1b      	lsrs	r3, r3, #16
}
 80056fe:	4618      	mov	r0, r3
 8005700:	46bd      	mov	sp, r7
 8005702:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005706:	4770      	bx	lr
 8005708:	5c001000 	.word	0x5c001000

0800570c <HAL_SYSCFG_ETHInterfaceSelect>:
  *   @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  *   @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  * @retval None
  */
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
 800570c:	b480      	push	{r7}
 800570e:	b083      	sub	sp, #12
 8005710:	af00      	add	r7, sp, #0
 8005712:	6078      	str	r0, [r7, #4]
  /* Check the parameter */
  assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));

  MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
 8005714:	4b06      	ldr	r3, [pc, #24]	@ (8005730 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 8005716:	685b      	ldr	r3, [r3, #4]
 8005718:	f423 0260 	bic.w	r2, r3, #14680064	@ 0xe00000
 800571c:	4904      	ldr	r1, [pc, #16]	@ (8005730 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 800571e:	687b      	ldr	r3, [r7, #4]
 8005720:	4313      	orrs	r3, r2
 8005722:	604b      	str	r3, [r1, #4]
}
 8005724:	bf00      	nop
 8005726:	370c      	adds	r7, #12
 8005728:	46bd      	mov	sp, r7
 800572a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800572e:	4770      	bx	lr
 8005730:	58000400 	.word	0x58000400

08005734 <__NVIC_SetPriorityGrouping>:
{
 8005734:	b480      	push	{r7}
 8005736:	b085      	sub	sp, #20
 8005738:	af00      	add	r7, sp, #0
 800573a:	6078      	str	r0, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 800573c:	687b      	ldr	r3, [r7, #4]
 800573e:	f003 0307 	and.w	r3, r3, #7
 8005742:	60fb      	str	r3, [r7, #12]
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005744:	4b0b      	ldr	r3, [pc, #44]	@ (8005774 <__NVIC_SetPriorityGrouping+0x40>)
 8005746:	68db      	ldr	r3, [r3, #12]
 8005748:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 800574a:	68ba      	ldr	r2, [r7, #8]
 800574c:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
 8005750:	4013      	ands	r3, r2
 8005752:	60bb      	str	r3, [r7, #8]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8005754:	68fb      	ldr	r3, [r7, #12]
 8005756:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 8005758:	68bb      	ldr	r3, [r7, #8]
 800575a:	431a      	orrs	r2, r3
  reg_value  =  (reg_value                                   |
 800575c:	4b06      	ldr	r3, [pc, #24]	@ (8005778 <__NVIC_SetPriorityGrouping+0x44>)
 800575e:	4313      	orrs	r3, r2
 8005760:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 8005762:	4a04      	ldr	r2, [pc, #16]	@ (8005774 <__NVIC_SetPriorityGrouping+0x40>)
 8005764:	68bb      	ldr	r3, [r7, #8]
 8005766:	60d3      	str	r3, [r2, #12]
}
 8005768:	bf00      	nop
 800576a:	3714      	adds	r7, #20
 800576c:	46bd      	mov	sp, r7
 800576e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005772:	4770      	bx	lr
 8005774:	e000ed00 	.word	0xe000ed00
 8005778:	05fa0000 	.word	0x05fa0000

0800577c <__NVIC_GetPriorityGrouping>:
{
 800577c:	b480      	push	{r7}
 800577e:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005780:	4b04      	ldr	r3, [pc, #16]	@ (8005794 <__NVIC_GetPriorityGrouping+0x18>)
 8005782:	68db      	ldr	r3, [r3, #12]
 8005784:	0a1b      	lsrs	r3, r3, #8
 8005786:	f003 0307 	and.w	r3, r3, #7
}
 800578a:	4618      	mov	r0, r3
 800578c:	46bd      	mov	sp, r7
 800578e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005792:	4770      	bx	lr
 8005794:	e000ed00 	.word	0xe000ed00

08005798 <__NVIC_EnableIRQ>:
{
 8005798:	b480      	push	{r7}
 800579a:	b083      	sub	sp, #12
 800579c:	af00      	add	r7, sp, #0
 800579e:	4603      	mov	r3, r0
 80057a0:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 80057a2:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80057a6:	2b00      	cmp	r3, #0
 80057a8:	db0b      	blt.n	80057c2 <__NVIC_EnableIRQ+0x2a>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 80057aa:	88fb      	ldrh	r3, [r7, #6]
 80057ac:	f003 021f 	and.w	r2, r3, #31
 80057b0:	4907      	ldr	r1, [pc, #28]	@ (80057d0 <__NVIC_EnableIRQ+0x38>)
 80057b2:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80057b6:	095b      	lsrs	r3, r3, #5
 80057b8:	2001      	movs	r0, #1
 80057ba:	fa00 f202 	lsl.w	r2, r0, r2
 80057be:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
}
 80057c2:	bf00      	nop
 80057c4:	370c      	adds	r7, #12
 80057c6:	46bd      	mov	sp, r7
 80057c8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80057cc:	4770      	bx	lr
 80057ce:	bf00      	nop
 80057d0:	e000e100 	.word	0xe000e100

080057d4 <__NVIC_SetPriority>:
{
 80057d4:	b480      	push	{r7}
 80057d6:	b083      	sub	sp, #12
 80057d8:	af00      	add	r7, sp, #0
 80057da:	4603      	mov	r3, r0
 80057dc:	6039      	str	r1, [r7, #0]
 80057de:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 80057e0:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80057e4:	2b00      	cmp	r3, #0
 80057e6:	db0a      	blt.n	80057fe <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057e8:	683b      	ldr	r3, [r7, #0]
 80057ea:	b2da      	uxtb	r2, r3
 80057ec:	490c      	ldr	r1, [pc, #48]	@ (8005820 <__NVIC_SetPriority+0x4c>)
 80057ee:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80057f2:	0112      	lsls	r2, r2, #4
 80057f4:	b2d2      	uxtb	r2, r2
 80057f6:	440b      	add	r3, r1
 80057f8:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 80057fc:	e00a      	b.n	8005814 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80057fe:	683b      	ldr	r3, [r7, #0]
 8005800:	b2da      	uxtb	r2, r3
 8005802:	4908      	ldr	r1, [pc, #32]	@ (8005824 <__NVIC_SetPriority+0x50>)
 8005804:	88fb      	ldrh	r3, [r7, #6]
 8005806:	f003 030f 	and.w	r3, r3, #15
 800580a:	3b04      	subs	r3, #4
 800580c:	0112      	lsls	r2, r2, #4
 800580e:	b2d2      	uxtb	r2, r2
 8005810:	440b      	add	r3, r1
 8005812:	761a      	strb	r2, [r3, #24]
}
 8005814:	bf00      	nop
 8005816:	370c      	adds	r7, #12
 8005818:	46bd      	mov	sp, r7
 800581a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800581e:	4770      	bx	lr
 8005820:	e000e100 	.word	0xe000e100
 8005824:	e000ed00 	.word	0xe000ed00

08005828 <NVIC_EncodePriority>:
{
 8005828:	b480      	push	{r7}
 800582a:	b089      	sub	sp, #36	@ 0x24
 800582c:	af00      	add	r7, sp, #0
 800582e:	60f8      	str	r0, [r7, #12]
 8005830:	60b9      	str	r1, [r7, #8]
 8005832:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 8005834:	68fb      	ldr	r3, [r7, #12]
 8005836:	f003 0307 	and.w	r3, r3, #7
 800583a:	61fb      	str	r3, [r7, #28]
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 800583c:	69fb      	ldr	r3, [r7, #28]
 800583e:	f1c3 0307 	rsb	r3, r3, #7
 8005842:	2b04      	cmp	r3, #4
 8005844:	bf28      	it	cs
 8005846:	2304      	movcs	r3, #4
 8005848:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800584a:	69fb      	ldr	r3, [r7, #28]
 800584c:	3304      	adds	r3, #4
 800584e:	2b06      	cmp	r3, #6
 8005850:	d902      	bls.n	8005858 <NVIC_EncodePriority+0x30>
 8005852:	69fb      	ldr	r3, [r7, #28]
 8005854:	3b03      	subs	r3, #3
 8005856:	e000      	b.n	800585a <NVIC_EncodePriority+0x32>
 8005858:	2300      	movs	r3, #0
 800585a:	617b      	str	r3, [r7, #20]
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800585c:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8005860:	69bb      	ldr	r3, [r7, #24]
 8005862:	fa02 f303 	lsl.w	r3, r2, r3
 8005866:	43da      	mvns	r2, r3
 8005868:	68bb      	ldr	r3, [r7, #8]
 800586a:	401a      	ands	r2, r3
 800586c:	697b      	ldr	r3, [r7, #20]
 800586e:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8005870:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005874:	697b      	ldr	r3, [r7, #20]
 8005876:	fa01 f303 	lsl.w	r3, r1, r3
 800587a:	43d9      	mvns	r1, r3
 800587c:	687b      	ldr	r3, [r7, #4]
 800587e:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005880:	4313      	orrs	r3, r2
}
 8005882:	4618      	mov	r0, r3
 8005884:	3724      	adds	r7, #36	@ 0x24
 8005886:	46bd      	mov	sp, r7
 8005888:	f85d 7b04 	ldr.w	r7, [sp], #4
 800588c:	4770      	bx	lr

0800588e <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
  *         The pending IRQ priority will be managed only by the subpriority.
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 800588e:	b580      	push	{r7, lr}
 8005890:	b082      	sub	sp, #8
 8005892:	af00      	add	r7, sp, #0
 8005894:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 8005896:	6878      	ldr	r0, [r7, #4]
 8005898:	f7ff ff4c 	bl	8005734 <__NVIC_SetPriorityGrouping>
}
 800589c:	bf00      	nop
 800589e:	3708      	adds	r7, #8
 80058a0:	46bd      	mov	sp, r7
 80058a2:	bd80      	pop	{r7, pc}

080058a4 <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
 80058a4:	b580      	push	{r7, lr}
 80058a6:	b086      	sub	sp, #24
 80058a8:	af00      	add	r7, sp, #0
 80058aa:	4603      	mov	r3, r0
 80058ac:	60b9      	str	r1, [r7, #8]
 80058ae:	607a      	str	r2, [r7, #4]
 80058b0:	81fb      	strh	r3, [r7, #14]

  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));

  prioritygroup = NVIC_GetPriorityGrouping();
 80058b2:	f7ff ff63 	bl	800577c <__NVIC_GetPriorityGrouping>
 80058b6:	6178      	str	r0, [r7, #20]

  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 80058b8:	687a      	ldr	r2, [r7, #4]
 80058ba:	68b9      	ldr	r1, [r7, #8]
 80058bc:	6978      	ldr	r0, [r7, #20]
 80058be:	f7ff ffb3 	bl	8005828 <NVIC_EncodePriority>
 80058c2:	4602      	mov	r2, r0
 80058c4:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 80058c8:	4611      	mov	r1, r2
 80058ca:	4618      	mov	r0, r3
 80058cc:	f7ff ff82 	bl	80057d4 <__NVIC_SetPriority>
}
 80058d0:	bf00      	nop
 80058d2:	3718      	adds	r7, #24
 80058d4:	46bd      	mov	sp, r7
 80058d6:	bd80      	pop	{r7, pc}

080058d8 <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 80058d8:	b580      	push	{r7, lr}
 80058da:	b082      	sub	sp, #8
 80058dc:	af00      	add	r7, sp, #0
 80058de:	4603      	mov	r3, r0
 80058e0:	80fb      	strh	r3, [r7, #6]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 80058e2:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80058e6:	4618      	mov	r0, r3
 80058e8:	f7ff ff56 	bl	8005798 <__NVIC_EnableIRQ>
}
 80058ec:	bf00      	nop
 80058ee:	3708      	adds	r7, #8
 80058f0:	46bd      	mov	sp, r7
 80058f2:	bd80      	pop	{r7, pc}

080058f4 <HAL_MPU_Disable>:
/**
  * @brief  Disables the MPU
  * @retval None
  */
void HAL_MPU_Disable(void)
{
 80058f4:	b480      	push	{r7}
 80058f6:	af00      	add	r7, sp, #0
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
 80058f8:	f3bf 8f5f 	dmb	sy
}
 80058fc:	bf00      	nop
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 80058fe:	4b07      	ldr	r3, [pc, #28]	@ (800591c <HAL_MPU_Disable+0x28>)
 8005900:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005902:	4a06      	ldr	r2, [pc, #24]	@ (800591c <HAL_MPU_Disable+0x28>)
 8005904:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8005908:	6253      	str	r3, [r2, #36]	@ 0x24

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0;
 800590a:	4b05      	ldr	r3, [pc, #20]	@ (8005920 <HAL_MPU_Disable+0x2c>)
 800590c:	2200      	movs	r2, #0
 800590e:	605a      	str	r2, [r3, #4]
}
 8005910:	bf00      	nop
 8005912:	46bd      	mov	sp, r7
 8005914:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005918:	4770      	bx	lr
 800591a:	bf00      	nop
 800591c:	e000ed00 	.word	0xe000ed00
 8005920:	e000ed90 	.word	0xe000ed90

08005924 <HAL_MPU_Enable>:
  *            @arg MPU_PRIVILEGED_DEFAULT
  *            @arg MPU_HFNMI_PRIVDEF
  * @retval None
  */
void HAL_MPU_Enable(uint32_t MPU_Control)
{
 8005924:	b480      	push	{r7}
 8005926:	b083      	sub	sp, #12
 8005928:	af00      	add	r7, sp, #0
 800592a:	6078      	str	r0, [r7, #4]
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 800592c:	4a0b      	ldr	r2, [pc, #44]	@ (800595c <HAL_MPU_Enable+0x38>)
 800592e:	687b      	ldr	r3, [r7, #4]
 8005930:	f043 0301 	orr.w	r3, r3, #1
 8005934:	6053      	str	r3, [r2, #4]

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 8005936:	4b0a      	ldr	r3, [pc, #40]	@ (8005960 <HAL_MPU_Enable+0x3c>)
 8005938:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800593a:	4a09      	ldr	r2, [pc, #36]	@ (8005960 <HAL_MPU_Enable+0x3c>)
 800593c:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8005940:	6253      	str	r3, [r2, #36]	@ 0x24
  __ASM volatile ("dsb 0xF":::"memory");
 8005942:	f3bf 8f4f 	dsb	sy
}
 8005946:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8005948:	f3bf 8f6f 	isb	sy
}
 800594c:	bf00      	nop

  /* Ensure MPU setting take effects */
  __DSB();
  __ISB();
}
 800594e:	bf00      	nop
 8005950:	370c      	adds	r7, #12
 8005952:	46bd      	mov	sp, r7
 8005954:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005958:	4770      	bx	lr
 800595a:	bf00      	nop
 800595c:	e000ed90 	.word	0xe000ed90
 8005960:	e000ed00 	.word	0xe000ed00

08005964 <HAL_MPU_ConfigRegion>:
  * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
  *                the initialization and configuration information.
  * @retval None
  */
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
 8005964:	b480      	push	{r7}
 8005966:	b083      	sub	sp, #12
 8005968:	af00      	add	r7, sp, #0
 800596a:	6078      	str	r0, [r7, #4]
  assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
  assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
  assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;
 800596c:	687b      	ldr	r3, [r7, #4]
 800596e:	785a      	ldrb	r2, [r3, #1]
 8005970:	4b1b      	ldr	r3, [pc, #108]	@ (80059e0 <HAL_MPU_ConfigRegion+0x7c>)
 8005972:	609a      	str	r2, [r3, #8]

  /* Disable the Region */
  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
 8005974:	4b1a      	ldr	r3, [pc, #104]	@ (80059e0 <HAL_MPU_ConfigRegion+0x7c>)
 8005976:	691b      	ldr	r3, [r3, #16]
 8005978:	4a19      	ldr	r2, [pc, #100]	@ (80059e0 <HAL_MPU_ConfigRegion+0x7c>)
 800597a:	f023 0301 	bic.w	r3, r3, #1
 800597e:	6113      	str	r3, [r2, #16]

  /* Apply configuration */
  MPU->RBAR = MPU_Init->BaseAddress;
 8005980:	4a17      	ldr	r2, [pc, #92]	@ (80059e0 <HAL_MPU_ConfigRegion+0x7c>)
 8005982:	687b      	ldr	r3, [r7, #4]
 8005984:	685b      	ldr	r3, [r3, #4]
 8005986:	60d3      	str	r3, [r2, #12]
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005988:	687b      	ldr	r3, [r7, #4]
 800598a:	7b1b      	ldrb	r3, [r3, #12]
 800598c:	071a      	lsls	r2, r3, #28
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 800598e:	687b      	ldr	r3, [r7, #4]
 8005990:	7adb      	ldrb	r3, [r3, #11]
 8005992:	061b      	lsls	r3, r3, #24
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005994:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005996:	687b      	ldr	r3, [r7, #4]
 8005998:	7a9b      	ldrb	r3, [r3, #10]
 800599a:	04db      	lsls	r3, r3, #19
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 800599c:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 800599e:	687b      	ldr	r3, [r7, #4]
 80059a0:	7b5b      	ldrb	r3, [r3, #13]
 80059a2:	049b      	lsls	r3, r3, #18
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 80059a4:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 80059a6:	687b      	ldr	r3, [r7, #4]
 80059a8:	7b9b      	ldrb	r3, [r3, #14]
 80059aa:	045b      	lsls	r3, r3, #17
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 80059ac:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 80059ae:	687b      	ldr	r3, [r7, #4]
 80059b0:	7bdb      	ldrb	r3, [r3, #15]
 80059b2:	041b      	lsls	r3, r3, #16
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 80059b4:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 80059b6:	687b      	ldr	r3, [r7, #4]
 80059b8:	7a5b      	ldrb	r3, [r3, #9]
 80059ba:	021b      	lsls	r3, r3, #8
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 80059bc:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 80059be:	687b      	ldr	r3, [r7, #4]
 80059c0:	7a1b      	ldrb	r3, [r3, #8]
 80059c2:	005b      	lsls	r3, r3, #1
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 80059c4:	4313      	orrs	r3, r2
              ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
 80059c6:	687a      	ldr	r2, [r7, #4]
 80059c8:	7812      	ldrb	r2, [r2, #0]
 80059ca:	4611      	mov	r1, r2
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 80059cc:	4a04      	ldr	r2, [pc, #16]	@ (80059e0 <HAL_MPU_ConfigRegion+0x7c>)
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 80059ce:	430b      	orrs	r3, r1
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 80059d0:	6113      	str	r3, [r2, #16]
}
 80059d2:	bf00      	nop
 80059d4:	370c      	adds	r7, #12
 80059d6:	46bd      	mov	sp, r7
 80059d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80059dc:	4770      	bx	lr
 80059de:	bf00      	nop
 80059e0:	e000ed90 	.word	0xe000ed90

080059e4 <HAL_CRC_Init>:
  *         parameters in the CRC_InitTypeDef and create the associated handle.
  * @param  hcrc CRC handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
 80059e4:	b580      	push	{r7, lr}
 80059e6:	b082      	sub	sp, #8
 80059e8:	af00      	add	r7, sp, #0
 80059ea:	6078      	str	r0, [r7, #4]
  /* Check the CRC handle allocation */
  if (hcrc == NULL)
 80059ec:	687b      	ldr	r3, [r7, #4]
 80059ee:	2b00      	cmp	r3, #0
 80059f0:	d101      	bne.n	80059f6 <HAL_CRC_Init+0x12>
  {
    return HAL_ERROR;
 80059f2:	2301      	movs	r3, #1
 80059f4:	e054      	b.n	8005aa0 <HAL_CRC_Init+0xbc>
  }

  /* Check the parameters */
  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));

  if (hcrc->State == HAL_CRC_STATE_RESET)
 80059f6:	687b      	ldr	r3, [r7, #4]
 80059f8:	7f5b      	ldrb	r3, [r3, #29]
 80059fa:	b2db      	uxtb	r3, r3
 80059fc:	2b00      	cmp	r3, #0
 80059fe:	d105      	bne.n	8005a0c <HAL_CRC_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hcrc->Lock = HAL_UNLOCKED;
 8005a00:	687b      	ldr	r3, [r7, #4]
 8005a02:	2200      	movs	r2, #0
 8005a04:	771a      	strb	r2, [r3, #28]
    /* Init the low level hardware */
    HAL_CRC_MspInit(hcrc);
 8005a06:	6878      	ldr	r0, [r7, #4]
 8005a08:	f7fd ff84 	bl	8003914 <HAL_CRC_MspInit>
  }

  hcrc->State = HAL_CRC_STATE_BUSY;
 8005a0c:	687b      	ldr	r3, [r7, #4]
 8005a0e:	2202      	movs	r2, #2
 8005a10:	775a      	strb	r2, [r3, #29]

  /* check whether or not non-default generating polynomial has been
   * picked up by user */
  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
 8005a12:	687b      	ldr	r3, [r7, #4]
 8005a14:	791b      	ldrb	r3, [r3, #4]
 8005a16:	2b00      	cmp	r3, #0
 8005a18:	d10c      	bne.n	8005a34 <HAL_CRC_Init+0x50>
  {
    /* initialize peripheral with default generating polynomial */
    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
 8005a1a:	687b      	ldr	r3, [r7, #4]
 8005a1c:	681b      	ldr	r3, [r3, #0]
 8005a1e:	4a22      	ldr	r2, [pc, #136]	@ (8005aa8 <HAL_CRC_Init+0xc4>)
 8005a20:	615a      	str	r2, [r3, #20]
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
 8005a22:	687b      	ldr	r3, [r7, #4]
 8005a24:	681b      	ldr	r3, [r3, #0]
 8005a26:	689a      	ldr	r2, [r3, #8]
 8005a28:	687b      	ldr	r3, [r7, #4]
 8005a2a:	681b      	ldr	r3, [r3, #0]
 8005a2c:	f022 0218 	bic.w	r2, r2, #24
 8005a30:	609a      	str	r2, [r3, #8]
 8005a32:	e00c      	b.n	8005a4e <HAL_CRC_Init+0x6a>
  }
  else
  {
    /* initialize CRC peripheral with generating polynomial defined by user */
    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
 8005a34:	687b      	ldr	r3, [r7, #4]
 8005a36:	6899      	ldr	r1, [r3, #8]
 8005a38:	687b      	ldr	r3, [r7, #4]
 8005a3a:	68db      	ldr	r3, [r3, #12]
 8005a3c:	461a      	mov	r2, r3
 8005a3e:	6878      	ldr	r0, [r7, #4]
 8005a40:	f000 f948 	bl	8005cd4 <HAL_CRCEx_Polynomial_Set>
 8005a44:	4603      	mov	r3, r0
 8005a46:	2b00      	cmp	r3, #0
 8005a48:	d001      	beq.n	8005a4e <HAL_CRC_Init+0x6a>
    {
      return HAL_ERROR;
 8005a4a:	2301      	movs	r3, #1
 8005a4c:	e028      	b.n	8005aa0 <HAL_CRC_Init+0xbc>
  }

  /* check whether or not non-default CRC initial value has been
   * picked up by user */
  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
 8005a4e:	687b      	ldr	r3, [r7, #4]
 8005a50:	795b      	ldrb	r3, [r3, #5]
 8005a52:	2b00      	cmp	r3, #0
 8005a54:	d105      	bne.n	8005a62 <HAL_CRC_Init+0x7e>
  {
    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
 8005a56:	687b      	ldr	r3, [r7, #4]
 8005a58:	681b      	ldr	r3, [r3, #0]
 8005a5a:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8005a5e:	611a      	str	r2, [r3, #16]
 8005a60:	e004      	b.n	8005a6c <HAL_CRC_Init+0x88>
  }
  else
  {
    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
 8005a62:	687b      	ldr	r3, [r7, #4]
 8005a64:	681b      	ldr	r3, [r3, #0]
 8005a66:	687a      	ldr	r2, [r7, #4]
 8005a68:	6912      	ldr	r2, [r2, #16]
 8005a6a:	611a      	str	r2, [r3, #16]
  }


  /* set input data inversion mode */
  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
 8005a6c:	687b      	ldr	r3, [r7, #4]
 8005a6e:	681b      	ldr	r3, [r3, #0]
 8005a70:	689b      	ldr	r3, [r3, #8]
 8005a72:	f023 0160 	bic.w	r1, r3, #96	@ 0x60
 8005a76:	687b      	ldr	r3, [r7, #4]
 8005a78:	695a      	ldr	r2, [r3, #20]
 8005a7a:	687b      	ldr	r3, [r7, #4]
 8005a7c:	681b      	ldr	r3, [r3, #0]
 8005a7e:	430a      	orrs	r2, r1
 8005a80:	609a      	str	r2, [r3, #8]

  /* set output data inversion mode */
  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
 8005a82:	687b      	ldr	r3, [r7, #4]
 8005a84:	681b      	ldr	r3, [r3, #0]
 8005a86:	689b      	ldr	r3, [r3, #8]
 8005a88:	f023 0180 	bic.w	r1, r3, #128	@ 0x80
 8005a8c:	687b      	ldr	r3, [r7, #4]
 8005a8e:	699a      	ldr	r2, [r3, #24]
 8005a90:	687b      	ldr	r3, [r7, #4]
 8005a92:	681b      	ldr	r3, [r3, #0]
 8005a94:	430a      	orrs	r2, r1
 8005a96:	609a      	str	r2, [r3, #8]
  /* makes sure the input data format (bytes, halfwords or words stream)
   * is properly specified by user */
  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005a98:	687b      	ldr	r3, [r7, #4]
 8005a9a:	2201      	movs	r2, #1
 8005a9c:	775a      	strb	r2, [r3, #29]

  /* Return function status */
  return HAL_OK;
 8005a9e:	2300      	movs	r3, #0
}
 8005aa0:	4618      	mov	r0, r3
 8005aa2:	3708      	adds	r7, #8
 8005aa4:	46bd      	mov	sp, r7
 8005aa6:	bd80      	pop	{r7, pc}
 8005aa8:	04c11db7 	.word	0x04c11db7

08005aac <HAL_CRC_Calculate>:
  *        and the API will internally adjust its input data processing based on the
  *        handle field hcrc->InputDataFormat.
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
 8005aac:	b580      	push	{r7, lr}
 8005aae:	b086      	sub	sp, #24
 8005ab0:	af00      	add	r7, sp, #0
 8005ab2:	60f8      	str	r0, [r7, #12]
 8005ab4:	60b9      	str	r1, [r7, #8]
 8005ab6:	607a      	str	r2, [r7, #4]
  uint32_t index;      /* CRC input data buffer index */
  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
 8005ab8:	2300      	movs	r3, #0
 8005aba:	613b      	str	r3, [r7, #16]

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_BUSY;
 8005abc:	68fb      	ldr	r3, [r7, #12]
 8005abe:	2202      	movs	r2, #2
 8005ac0:	775a      	strb	r2, [r3, #29]

  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
  *  written in hcrc->Instance->DR) */
  __HAL_CRC_DR_RESET(hcrc);
 8005ac2:	68fb      	ldr	r3, [r7, #12]
 8005ac4:	681b      	ldr	r3, [r3, #0]
 8005ac6:	689a      	ldr	r2, [r3, #8]
 8005ac8:	68fb      	ldr	r3, [r7, #12]
 8005aca:	681b      	ldr	r3, [r3, #0]
 8005acc:	f042 0201 	orr.w	r2, r2, #1
 8005ad0:	609a      	str	r2, [r3, #8]

  switch (hcrc->InputDataFormat)
 8005ad2:	68fb      	ldr	r3, [r7, #12]
 8005ad4:	6a1b      	ldr	r3, [r3, #32]
 8005ad6:	2b03      	cmp	r3, #3
 8005ad8:	d006      	beq.n	8005ae8 <HAL_CRC_Calculate+0x3c>
 8005ada:	2b03      	cmp	r3, #3
 8005adc:	d829      	bhi.n	8005b32 <HAL_CRC_Calculate+0x86>
 8005ade:	2b01      	cmp	r3, #1
 8005ae0:	d019      	beq.n	8005b16 <HAL_CRC_Calculate+0x6a>
 8005ae2:	2b02      	cmp	r3, #2
 8005ae4:	d01e      	beq.n	8005b24 <HAL_CRC_Calculate+0x78>
      /* Specific 16-bit input data handling  */
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
      break;

    default:
      break;
 8005ae6:	e024      	b.n	8005b32 <HAL_CRC_Calculate+0x86>
      for (index = 0U; index < BufferLength; index++)
 8005ae8:	2300      	movs	r3, #0
 8005aea:	617b      	str	r3, [r7, #20]
 8005aec:	e00a      	b.n	8005b04 <HAL_CRC_Calculate+0x58>
        hcrc->Instance->DR = pBuffer[index];
 8005aee:	697b      	ldr	r3, [r7, #20]
 8005af0:	009b      	lsls	r3, r3, #2
 8005af2:	68ba      	ldr	r2, [r7, #8]
 8005af4:	441a      	add	r2, r3
 8005af6:	68fb      	ldr	r3, [r7, #12]
 8005af8:	681b      	ldr	r3, [r3, #0]
 8005afa:	6812      	ldr	r2, [r2, #0]
 8005afc:	601a      	str	r2, [r3, #0]
      for (index = 0U; index < BufferLength; index++)
 8005afe:	697b      	ldr	r3, [r7, #20]
 8005b00:	3301      	adds	r3, #1
 8005b02:	617b      	str	r3, [r7, #20]
 8005b04:	697a      	ldr	r2, [r7, #20]
 8005b06:	687b      	ldr	r3, [r7, #4]
 8005b08:	429a      	cmp	r2, r3
 8005b0a:	d3f0      	bcc.n	8005aee <HAL_CRC_Calculate+0x42>
      temp = hcrc->Instance->DR;
 8005b0c:	68fb      	ldr	r3, [r7, #12]
 8005b0e:	681b      	ldr	r3, [r3, #0]
 8005b10:	681b      	ldr	r3, [r3, #0]
 8005b12:	613b      	str	r3, [r7, #16]
      break;
 8005b14:	e00e      	b.n	8005b34 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
 8005b16:	687a      	ldr	r2, [r7, #4]
 8005b18:	68b9      	ldr	r1, [r7, #8]
 8005b1a:	68f8      	ldr	r0, [r7, #12]
 8005b1c:	f000 f812 	bl	8005b44 <CRC_Handle_8>
 8005b20:	6138      	str	r0, [r7, #16]
      break;
 8005b22:	e007      	b.n	8005b34 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
 8005b24:	687a      	ldr	r2, [r7, #4]
 8005b26:	68b9      	ldr	r1, [r7, #8]
 8005b28:	68f8      	ldr	r0, [r7, #12]
 8005b2a:	f000 f899 	bl	8005c60 <CRC_Handle_16>
 8005b2e:	6138      	str	r0, [r7, #16]
      break;
 8005b30:	e000      	b.n	8005b34 <HAL_CRC_Calculate+0x88>
      break;
 8005b32:	bf00      	nop
  }

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005b34:	68fb      	ldr	r3, [r7, #12]
 8005b36:	2201      	movs	r2, #1
 8005b38:	775a      	strb	r2, [r3, #29]

  /* Return the CRC computed value */
  return temp;
 8005b3a:	693b      	ldr	r3, [r7, #16]
}
 8005b3c:	4618      	mov	r0, r3
 8005b3e:	3718      	adds	r7, #24
 8005b40:	46bd      	mov	sp, r7
 8005b42:	bd80      	pop	{r7, pc}

08005b44 <CRC_Handle_8>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
 8005b44:	b480      	push	{r7}
 8005b46:	b089      	sub	sp, #36	@ 0x24
 8005b48:	af00      	add	r7, sp, #0
 8005b4a:	60f8      	str	r0, [r7, #12]
 8005b4c:	60b9      	str	r1, [r7, #8]
 8005b4e:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 4 bytes are entered in a row with a single word write,
   * last bytes must be carefully fed to the CRC calculator to ensure a correct type
   * handling by the peripheral */
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005b50:	2300      	movs	r3, #0
 8005b52:	61fb      	str	r3, [r7, #28]
 8005b54:	e023      	b.n	8005b9e <CRC_Handle_8+0x5a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005b56:	69fb      	ldr	r3, [r7, #28]
 8005b58:	009b      	lsls	r3, r3, #2
 8005b5a:	68ba      	ldr	r2, [r7, #8]
 8005b5c:	4413      	add	r3, r2
 8005b5e:	781b      	ldrb	r3, [r3, #0]
 8005b60:	061a      	lsls	r2, r3, #24
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005b62:	69fb      	ldr	r3, [r7, #28]
 8005b64:	009b      	lsls	r3, r3, #2
 8005b66:	3301      	adds	r3, #1
 8005b68:	68b9      	ldr	r1, [r7, #8]
 8005b6a:	440b      	add	r3, r1
 8005b6c:	781b      	ldrb	r3, [r3, #0]
 8005b6e:	041b      	lsls	r3, r3, #16
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005b70:	431a      	orrs	r2, r3
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005b72:	69fb      	ldr	r3, [r7, #28]
 8005b74:	009b      	lsls	r3, r3, #2
 8005b76:	3302      	adds	r3, #2
 8005b78:	68b9      	ldr	r1, [r7, #8]
 8005b7a:	440b      	add	r3, r1
 8005b7c:	781b      	ldrb	r3, [r3, #0]
 8005b7e:	021b      	lsls	r3, r3, #8
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005b80:	431a      	orrs	r2, r3
                         (uint32_t)pBuffer[(4U * i) + 3U];
 8005b82:	69fb      	ldr	r3, [r7, #28]
 8005b84:	009b      	lsls	r3, r3, #2
 8005b86:	3303      	adds	r3, #3
 8005b88:	68b9      	ldr	r1, [r7, #8]
 8005b8a:	440b      	add	r3, r1
 8005b8c:	781b      	ldrb	r3, [r3, #0]
 8005b8e:	4619      	mov	r1, r3
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005b90:	68fb      	ldr	r3, [r7, #12]
 8005b92:	681b      	ldr	r3, [r3, #0]
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005b94:	430a      	orrs	r2, r1
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005b96:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005b98:	69fb      	ldr	r3, [r7, #28]
 8005b9a:	3301      	adds	r3, #1
 8005b9c:	61fb      	str	r3, [r7, #28]
 8005b9e:	687b      	ldr	r3, [r7, #4]
 8005ba0:	089b      	lsrs	r3, r3, #2
 8005ba2:	69fa      	ldr	r2, [r7, #28]
 8005ba4:	429a      	cmp	r2, r3
 8005ba6:	d3d6      	bcc.n	8005b56 <CRC_Handle_8+0x12>
  }
  /* last bytes specific handling */
  if ((BufferLength % 4U) != 0U)
 8005ba8:	687b      	ldr	r3, [r7, #4]
 8005baa:	f003 0303 	and.w	r3, r3, #3
 8005bae:	2b00      	cmp	r3, #0
 8005bb0:	d04d      	beq.n	8005c4e <CRC_Handle_8+0x10a>
  {
    if ((BufferLength % 4U) == 1U)
 8005bb2:	687b      	ldr	r3, [r7, #4]
 8005bb4:	f003 0303 	and.w	r3, r3, #3
 8005bb8:	2b01      	cmp	r3, #1
 8005bba:	d107      	bne.n	8005bcc <CRC_Handle_8+0x88>
    {
      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
 8005bbc:	69fb      	ldr	r3, [r7, #28]
 8005bbe:	009b      	lsls	r3, r3, #2
 8005bc0:	68ba      	ldr	r2, [r7, #8]
 8005bc2:	4413      	add	r3, r2
 8005bc4:	68fa      	ldr	r2, [r7, #12]
 8005bc6:	6812      	ldr	r2, [r2, #0]
 8005bc8:	781b      	ldrb	r3, [r3, #0]
 8005bca:	7013      	strb	r3, [r2, #0]
    }
    if ((BufferLength % 4U) == 2U)
 8005bcc:	687b      	ldr	r3, [r7, #4]
 8005bce:	f003 0303 	and.w	r3, r3, #3
 8005bd2:	2b02      	cmp	r3, #2
 8005bd4:	d116      	bne.n	8005c04 <CRC_Handle_8+0xc0>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005bd6:	69fb      	ldr	r3, [r7, #28]
 8005bd8:	009b      	lsls	r3, r3, #2
 8005bda:	68ba      	ldr	r2, [r7, #8]
 8005bdc:	4413      	add	r3, r2
 8005bde:	781b      	ldrb	r3, [r3, #0]
 8005be0:	021b      	lsls	r3, r3, #8
 8005be2:	b21a      	sxth	r2, r3
 8005be4:	69fb      	ldr	r3, [r7, #28]
 8005be6:	009b      	lsls	r3, r3, #2
 8005be8:	3301      	adds	r3, #1
 8005bea:	68b9      	ldr	r1, [r7, #8]
 8005bec:	440b      	add	r3, r1
 8005bee:	781b      	ldrb	r3, [r3, #0]
 8005bf0:	b21b      	sxth	r3, r3
 8005bf2:	4313      	orrs	r3, r2
 8005bf4:	b21b      	sxth	r3, r3
 8005bf6:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 8005bf8:	68fb      	ldr	r3, [r7, #12]
 8005bfa:	681b      	ldr	r3, [r3, #0]
 8005bfc:	617b      	str	r3, [r7, #20]
      *pReg = data;
 8005bfe:	697b      	ldr	r3, [r7, #20]
 8005c00:	8b7a      	ldrh	r2, [r7, #26]
 8005c02:	801a      	strh	r2, [r3, #0]
    }
    if ((BufferLength % 4U) == 3U)
 8005c04:	687b      	ldr	r3, [r7, #4]
 8005c06:	f003 0303 	and.w	r3, r3, #3
 8005c0a:	2b03      	cmp	r3, #3
 8005c0c:	d11f      	bne.n	8005c4e <CRC_Handle_8+0x10a>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005c0e:	69fb      	ldr	r3, [r7, #28]
 8005c10:	009b      	lsls	r3, r3, #2
 8005c12:	68ba      	ldr	r2, [r7, #8]
 8005c14:	4413      	add	r3, r2
 8005c16:	781b      	ldrb	r3, [r3, #0]
 8005c18:	021b      	lsls	r3, r3, #8
 8005c1a:	b21a      	sxth	r2, r3
 8005c1c:	69fb      	ldr	r3, [r7, #28]
 8005c1e:	009b      	lsls	r3, r3, #2
 8005c20:	3301      	adds	r3, #1
 8005c22:	68b9      	ldr	r1, [r7, #8]
 8005c24:	440b      	add	r3, r1
 8005c26:	781b      	ldrb	r3, [r3, #0]
 8005c28:	b21b      	sxth	r3, r3
 8005c2a:	4313      	orrs	r3, r2
 8005c2c:	b21b      	sxth	r3, r3
 8005c2e:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 8005c30:	68fb      	ldr	r3, [r7, #12]
 8005c32:	681b      	ldr	r3, [r3, #0]
 8005c34:	617b      	str	r3, [r7, #20]
      *pReg = data;
 8005c36:	697b      	ldr	r3, [r7, #20]
 8005c38:	8b7a      	ldrh	r2, [r7, #26]
 8005c3a:	801a      	strh	r2, [r3, #0]

      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
 8005c3c:	69fb      	ldr	r3, [r7, #28]
 8005c3e:	009b      	lsls	r3, r3, #2
 8005c40:	3302      	adds	r3, #2
 8005c42:	68ba      	ldr	r2, [r7, #8]
 8005c44:	4413      	add	r3, r2
 8005c46:	68fa      	ldr	r2, [r7, #12]
 8005c48:	6812      	ldr	r2, [r2, #0]
 8005c4a:	781b      	ldrb	r3, [r3, #0]
 8005c4c:	7013      	strb	r3, [r2, #0]
    }
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 8005c4e:	68fb      	ldr	r3, [r7, #12]
 8005c50:	681b      	ldr	r3, [r3, #0]
 8005c52:	681b      	ldr	r3, [r3, #0]
}
 8005c54:	4618      	mov	r0, r3
 8005c56:	3724      	adds	r7, #36	@ 0x24
 8005c58:	46bd      	mov	sp, r7
 8005c5a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005c5e:	4770      	bx	lr

08005c60 <CRC_Handle_16>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
 8005c60:	b480      	push	{r7}
 8005c62:	b087      	sub	sp, #28
 8005c64:	af00      	add	r7, sp, #0
 8005c66:	60f8      	str	r0, [r7, #12]
 8005c68:	60b9      	str	r1, [r7, #8]
 8005c6a:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
   * a correct type handling by the peripheral */
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005c6c:	2300      	movs	r3, #0
 8005c6e:	617b      	str	r3, [r7, #20]
 8005c70:	e013      	b.n	8005c9a <CRC_Handle_16+0x3a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
 8005c72:	697b      	ldr	r3, [r7, #20]
 8005c74:	009b      	lsls	r3, r3, #2
 8005c76:	68ba      	ldr	r2, [r7, #8]
 8005c78:	4413      	add	r3, r2
 8005c7a:	881b      	ldrh	r3, [r3, #0]
 8005c7c:	041a      	lsls	r2, r3, #16
 8005c7e:	697b      	ldr	r3, [r7, #20]
 8005c80:	009b      	lsls	r3, r3, #2
 8005c82:	3302      	adds	r3, #2
 8005c84:	68b9      	ldr	r1, [r7, #8]
 8005c86:	440b      	add	r3, r1
 8005c88:	881b      	ldrh	r3, [r3, #0]
 8005c8a:	4619      	mov	r1, r3
 8005c8c:	68fb      	ldr	r3, [r7, #12]
 8005c8e:	681b      	ldr	r3, [r3, #0]
 8005c90:	430a      	orrs	r2, r1
 8005c92:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005c94:	697b      	ldr	r3, [r7, #20]
 8005c96:	3301      	adds	r3, #1
 8005c98:	617b      	str	r3, [r7, #20]
 8005c9a:	687b      	ldr	r3, [r7, #4]
 8005c9c:	085b      	lsrs	r3, r3, #1
 8005c9e:	697a      	ldr	r2, [r7, #20]
 8005ca0:	429a      	cmp	r2, r3
 8005ca2:	d3e6      	bcc.n	8005c72 <CRC_Handle_16+0x12>
  }
  if ((BufferLength % 2U) != 0U)
 8005ca4:	687b      	ldr	r3, [r7, #4]
 8005ca6:	f003 0301 	and.w	r3, r3, #1
 8005caa:	2b00      	cmp	r3, #0
 8005cac:	d009      	beq.n	8005cc2 <CRC_Handle_16+0x62>
  {
    pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                 /* Derogation MisraC2012 R.11.5 */
 8005cae:	68fb      	ldr	r3, [r7, #12]
 8005cb0:	681b      	ldr	r3, [r3, #0]
 8005cb2:	613b      	str	r3, [r7, #16]
    *pReg = pBuffer[2U * i];
 8005cb4:	697b      	ldr	r3, [r7, #20]
 8005cb6:	009b      	lsls	r3, r3, #2
 8005cb8:	68ba      	ldr	r2, [r7, #8]
 8005cba:	4413      	add	r3, r2
 8005cbc:	881a      	ldrh	r2, [r3, #0]
 8005cbe:	693b      	ldr	r3, [r7, #16]
 8005cc0:	801a      	strh	r2, [r3, #0]
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 8005cc2:	68fb      	ldr	r3, [r7, #12]
 8005cc4:	681b      	ldr	r3, [r3, #0]
 8005cc6:	681b      	ldr	r3, [r3, #0]
}
 8005cc8:	4618      	mov	r0, r3
 8005cca:	371c      	adds	r7, #28
 8005ccc:	46bd      	mov	sp, r7
 8005cce:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005cd2:	4770      	bx	lr

08005cd4 <HAL_CRCEx_Polynomial_Set>:
  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
 8005cd4:	b480      	push	{r7}
 8005cd6:	b087      	sub	sp, #28
 8005cd8:	af00      	add	r7, sp, #0
 8005cda:	60f8      	str	r0, [r7, #12]
 8005cdc:	60b9      	str	r1, [r7, #8]
 8005cde:	607a      	str	r2, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8005ce0:	2300      	movs	r3, #0
 8005ce2:	75fb      	strb	r3, [r7, #23]
  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
 8005ce4:	231f      	movs	r3, #31
 8005ce6:	613b      	str	r3, [r7, #16]

  /* Check the parameters */
  assert_param(IS_CRC_POL_LENGTH(PolyLength));

  /* Ensure that the generating polynomial is odd */
  if ((Pol & (uint32_t)(0x1U)) ==  0U)
 8005ce8:	68bb      	ldr	r3, [r7, #8]
 8005cea:	f003 0301 	and.w	r3, r3, #1
 8005cee:	2b00      	cmp	r3, #0
 8005cf0:	d102      	bne.n	8005cf8 <HAL_CRCEx_Polynomial_Set+0x24>
  {
    status =  HAL_ERROR;
 8005cf2:	2301      	movs	r3, #1
 8005cf4:	75fb      	strb	r3, [r7, #23]
 8005cf6:	e063      	b.n	8005dc0 <HAL_CRCEx_Polynomial_Set+0xec>
     * definition. HAL_ERROR is reported if Pol degree is
     * larger than that indicated by PolyLength.
     * Look for MSB position: msb will contain the degree of
     *  the second to the largest polynomial member. E.g., for
     *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
    while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
 8005cf8:	bf00      	nop
 8005cfa:	693b      	ldr	r3, [r7, #16]
 8005cfc:	1e5a      	subs	r2, r3, #1
 8005cfe:	613a      	str	r2, [r7, #16]
 8005d00:	2b00      	cmp	r3, #0
 8005d02:	d009      	beq.n	8005d18 <HAL_CRCEx_Polynomial_Set+0x44>
 8005d04:	693b      	ldr	r3, [r7, #16]
 8005d06:	f003 031f 	and.w	r3, r3, #31
 8005d0a:	68ba      	ldr	r2, [r7, #8]
 8005d0c:	fa22 f303 	lsr.w	r3, r2, r3
 8005d10:	f003 0301 	and.w	r3, r3, #1
 8005d14:	2b00      	cmp	r3, #0
 8005d16:	d0f0      	beq.n	8005cfa <HAL_CRCEx_Polynomial_Set+0x26>
    {
    }

    switch (PolyLength)
 8005d18:	687b      	ldr	r3, [r7, #4]
 8005d1a:	2b18      	cmp	r3, #24
 8005d1c:	d846      	bhi.n	8005dac <HAL_CRCEx_Polynomial_Set+0xd8>
 8005d1e:	a201      	add	r2, pc, #4	@ (adr r2, 8005d24 <HAL_CRCEx_Polynomial_Set+0x50>)
 8005d20:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8005d24:	08005db3 	.word	0x08005db3
 8005d28:	08005dad 	.word	0x08005dad
 8005d2c:	08005dad 	.word	0x08005dad
 8005d30:	08005dad 	.word	0x08005dad
 8005d34:	08005dad 	.word	0x08005dad
 8005d38:	08005dad 	.word	0x08005dad
 8005d3c:	08005dad 	.word	0x08005dad
 8005d40:	08005dad 	.word	0x08005dad
 8005d44:	08005da1 	.word	0x08005da1
 8005d48:	08005dad 	.word	0x08005dad
 8005d4c:	08005dad 	.word	0x08005dad
 8005d50:	08005dad 	.word	0x08005dad
 8005d54:	08005dad 	.word	0x08005dad
 8005d58:	08005dad 	.word	0x08005dad
 8005d5c:	08005dad 	.word	0x08005dad
 8005d60:	08005dad 	.word	0x08005dad
 8005d64:	08005d95 	.word	0x08005d95
 8005d68:	08005dad 	.word	0x08005dad
 8005d6c:	08005dad 	.word	0x08005dad
 8005d70:	08005dad 	.word	0x08005dad
 8005d74:	08005dad 	.word	0x08005dad
 8005d78:	08005dad 	.word	0x08005dad
 8005d7c:	08005dad 	.word	0x08005dad
 8005d80:	08005dad 	.word	0x08005dad
 8005d84:	08005d89 	.word	0x08005d89
    {

      case CRC_POLYLENGTH_7B:
        if (msb >= HAL_CRC_LENGTH_7B)
 8005d88:	693b      	ldr	r3, [r7, #16]
 8005d8a:	2b06      	cmp	r3, #6
 8005d8c:	d913      	bls.n	8005db6 <HAL_CRCEx_Polynomial_Set+0xe2>
        {
          status =   HAL_ERROR;
 8005d8e:	2301      	movs	r3, #1
 8005d90:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8005d92:	e010      	b.n	8005db6 <HAL_CRCEx_Polynomial_Set+0xe2>
      case CRC_POLYLENGTH_8B:
        if (msb >= HAL_CRC_LENGTH_8B)
 8005d94:	693b      	ldr	r3, [r7, #16]
 8005d96:	2b07      	cmp	r3, #7
 8005d98:	d90f      	bls.n	8005dba <HAL_CRCEx_Polynomial_Set+0xe6>
        {
          status =   HAL_ERROR;
 8005d9a:	2301      	movs	r3, #1
 8005d9c:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8005d9e:	e00c      	b.n	8005dba <HAL_CRCEx_Polynomial_Set+0xe6>
      case CRC_POLYLENGTH_16B:
        if (msb >= HAL_CRC_LENGTH_16B)
 8005da0:	693b      	ldr	r3, [r7, #16]
 8005da2:	2b0f      	cmp	r3, #15
 8005da4:	d90b      	bls.n	8005dbe <HAL_CRCEx_Polynomial_Set+0xea>
        {
          status =   HAL_ERROR;
 8005da6:	2301      	movs	r3, #1
 8005da8:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8005daa:	e008      	b.n	8005dbe <HAL_CRCEx_Polynomial_Set+0xea>

      case CRC_POLYLENGTH_32B:
        /* no polynomial definition vs. polynomial length issue possible */
        break;
      default:
        status =  HAL_ERROR;
 8005dac:	2301      	movs	r3, #1
 8005dae:	75fb      	strb	r3, [r7, #23]
        break;
 8005db0:	e006      	b.n	8005dc0 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005db2:	bf00      	nop
 8005db4:	e004      	b.n	8005dc0 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005db6:	bf00      	nop
 8005db8:	e002      	b.n	8005dc0 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005dba:	bf00      	nop
 8005dbc:	e000      	b.n	8005dc0 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8005dbe:	bf00      	nop
    }
  }
  if (status == HAL_OK)
 8005dc0:	7dfb      	ldrb	r3, [r7, #23]
 8005dc2:	2b00      	cmp	r3, #0
 8005dc4:	d10d      	bne.n	8005de2 <HAL_CRCEx_Polynomial_Set+0x10e>
  {
    /* set generating polynomial */
    WRITE_REG(hcrc->Instance->POL, Pol);
 8005dc6:	68fb      	ldr	r3, [r7, #12]
 8005dc8:	681b      	ldr	r3, [r3, #0]
 8005dca:	68ba      	ldr	r2, [r7, #8]
 8005dcc:	615a      	str	r2, [r3, #20]

    /* set generating polynomial size */
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
 8005dce:	68fb      	ldr	r3, [r7, #12]
 8005dd0:	681b      	ldr	r3, [r3, #0]
 8005dd2:	689b      	ldr	r3, [r3, #8]
 8005dd4:	f023 0118 	bic.w	r1, r3, #24
 8005dd8:	68fb      	ldr	r3, [r7, #12]
 8005dda:	681b      	ldr	r3, [r3, #0]
 8005ddc:	687a      	ldr	r2, [r7, #4]
 8005dde:	430a      	orrs	r2, r1
 8005de0:	609a      	str	r2, [r3, #8]
  }
  /* Return function status */
  return status;
 8005de2:	7dfb      	ldrb	r3, [r7, #23]
}
 8005de4:	4618      	mov	r0, r3
 8005de6:	371c      	adds	r7, #28
 8005de8:	46bd      	mov	sp, r7
 8005dea:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005dee:	4770      	bx	lr

08005df0 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8005df0:	b580      	push	{r7, lr}
 8005df2:	b086      	sub	sp, #24
 8005df4:	af00      	add	r7, sp, #0
 8005df6:	6078      	str	r0, [r7, #4]
  uint32_t registerValue;
  uint32_t tickstart = HAL_GetTick();
 8005df8:	f7ff fc4c 	bl	8005694 <HAL_GetTick>
 8005dfc:	6138      	str	r0, [r7, #16]
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8005dfe:	687b      	ldr	r3, [r7, #4]
 8005e00:	2b00      	cmp	r3, #0
 8005e02:	d101      	bne.n	8005e08 <HAL_DMA_Init+0x18>
  {
    return HAL_ERROR;
 8005e04:	2301      	movs	r3, #1
 8005e06:	e316      	b.n	8006436 <HAL_DMA_Init+0x646>
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8005e08:	687b      	ldr	r3, [r7, #4]
 8005e0a:	681b      	ldr	r3, [r3, #0]
 8005e0c:	4a66      	ldr	r2, [pc, #408]	@ (8005fa8 <HAL_DMA_Init+0x1b8>)
 8005e0e:	4293      	cmp	r3, r2
 8005e10:	d04a      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e12:	687b      	ldr	r3, [r7, #4]
 8005e14:	681b      	ldr	r3, [r3, #0]
 8005e16:	4a65      	ldr	r2, [pc, #404]	@ (8005fac <HAL_DMA_Init+0x1bc>)
 8005e18:	4293      	cmp	r3, r2
 8005e1a:	d045      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e1c:	687b      	ldr	r3, [r7, #4]
 8005e1e:	681b      	ldr	r3, [r3, #0]
 8005e20:	4a63      	ldr	r2, [pc, #396]	@ (8005fb0 <HAL_DMA_Init+0x1c0>)
 8005e22:	4293      	cmp	r3, r2
 8005e24:	d040      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e26:	687b      	ldr	r3, [r7, #4]
 8005e28:	681b      	ldr	r3, [r3, #0]
 8005e2a:	4a62      	ldr	r2, [pc, #392]	@ (8005fb4 <HAL_DMA_Init+0x1c4>)
 8005e2c:	4293      	cmp	r3, r2
 8005e2e:	d03b      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e30:	687b      	ldr	r3, [r7, #4]
 8005e32:	681b      	ldr	r3, [r3, #0]
 8005e34:	4a60      	ldr	r2, [pc, #384]	@ (8005fb8 <HAL_DMA_Init+0x1c8>)
 8005e36:	4293      	cmp	r3, r2
 8005e38:	d036      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e3a:	687b      	ldr	r3, [r7, #4]
 8005e3c:	681b      	ldr	r3, [r3, #0]
 8005e3e:	4a5f      	ldr	r2, [pc, #380]	@ (8005fbc <HAL_DMA_Init+0x1cc>)
 8005e40:	4293      	cmp	r3, r2
 8005e42:	d031      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e44:	687b      	ldr	r3, [r7, #4]
 8005e46:	681b      	ldr	r3, [r3, #0]
 8005e48:	4a5d      	ldr	r2, [pc, #372]	@ (8005fc0 <HAL_DMA_Init+0x1d0>)
 8005e4a:	4293      	cmp	r3, r2
 8005e4c:	d02c      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e4e:	687b      	ldr	r3, [r7, #4]
 8005e50:	681b      	ldr	r3, [r3, #0]
 8005e52:	4a5c      	ldr	r2, [pc, #368]	@ (8005fc4 <HAL_DMA_Init+0x1d4>)
 8005e54:	4293      	cmp	r3, r2
 8005e56:	d027      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e58:	687b      	ldr	r3, [r7, #4]
 8005e5a:	681b      	ldr	r3, [r3, #0]
 8005e5c:	4a5a      	ldr	r2, [pc, #360]	@ (8005fc8 <HAL_DMA_Init+0x1d8>)
 8005e5e:	4293      	cmp	r3, r2
 8005e60:	d022      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e62:	687b      	ldr	r3, [r7, #4]
 8005e64:	681b      	ldr	r3, [r3, #0]
 8005e66:	4a59      	ldr	r2, [pc, #356]	@ (8005fcc <HAL_DMA_Init+0x1dc>)
 8005e68:	4293      	cmp	r3, r2
 8005e6a:	d01d      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e6c:	687b      	ldr	r3, [r7, #4]
 8005e6e:	681b      	ldr	r3, [r3, #0]
 8005e70:	4a57      	ldr	r2, [pc, #348]	@ (8005fd0 <HAL_DMA_Init+0x1e0>)
 8005e72:	4293      	cmp	r3, r2
 8005e74:	d018      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e76:	687b      	ldr	r3, [r7, #4]
 8005e78:	681b      	ldr	r3, [r3, #0]
 8005e7a:	4a56      	ldr	r2, [pc, #344]	@ (8005fd4 <HAL_DMA_Init+0x1e4>)
 8005e7c:	4293      	cmp	r3, r2
 8005e7e:	d013      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e80:	687b      	ldr	r3, [r7, #4]
 8005e82:	681b      	ldr	r3, [r3, #0]
 8005e84:	4a54      	ldr	r2, [pc, #336]	@ (8005fd8 <HAL_DMA_Init+0x1e8>)
 8005e86:	4293      	cmp	r3, r2
 8005e88:	d00e      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e8a:	687b      	ldr	r3, [r7, #4]
 8005e8c:	681b      	ldr	r3, [r3, #0]
 8005e8e:	4a53      	ldr	r2, [pc, #332]	@ (8005fdc <HAL_DMA_Init+0x1ec>)
 8005e90:	4293      	cmp	r3, r2
 8005e92:	d009      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e94:	687b      	ldr	r3, [r7, #4]
 8005e96:	681b      	ldr	r3, [r3, #0]
 8005e98:	4a51      	ldr	r2, [pc, #324]	@ (8005fe0 <HAL_DMA_Init+0x1f0>)
 8005e9a:	4293      	cmp	r3, r2
 8005e9c:	d004      	beq.n	8005ea8 <HAL_DMA_Init+0xb8>
 8005e9e:	687b      	ldr	r3, [r7, #4]
 8005ea0:	681b      	ldr	r3, [r3, #0]
 8005ea2:	4a50      	ldr	r2, [pc, #320]	@ (8005fe4 <HAL_DMA_Init+0x1f4>)
 8005ea4:	4293      	cmp	r3, r2
 8005ea6:	d101      	bne.n	8005eac <HAL_DMA_Init+0xbc>
 8005ea8:	2301      	movs	r3, #1
 8005eaa:	e000      	b.n	8005eae <HAL_DMA_Init+0xbe>
 8005eac:	2300      	movs	r3, #0
 8005eae:	2b00      	cmp	r3, #0
 8005eb0:	f000 813b 	beq.w	800612a <HAL_DMA_Init+0x33a>
      assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
      assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8005eb4:	687b      	ldr	r3, [r7, #4]
 8005eb6:	2202      	movs	r2, #2
 8005eb8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8005ebc:	687b      	ldr	r3, [r7, #4]
 8005ebe:	2200      	movs	r2, #0
 8005ec0:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 8005ec4:	687b      	ldr	r3, [r7, #4]
 8005ec6:	681b      	ldr	r3, [r3, #0]
 8005ec8:	4a37      	ldr	r2, [pc, #220]	@ (8005fa8 <HAL_DMA_Init+0x1b8>)
 8005eca:	4293      	cmp	r3, r2
 8005ecc:	d04a      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005ece:	687b      	ldr	r3, [r7, #4]
 8005ed0:	681b      	ldr	r3, [r3, #0]
 8005ed2:	4a36      	ldr	r2, [pc, #216]	@ (8005fac <HAL_DMA_Init+0x1bc>)
 8005ed4:	4293      	cmp	r3, r2
 8005ed6:	d045      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005ed8:	687b      	ldr	r3, [r7, #4]
 8005eda:	681b      	ldr	r3, [r3, #0]
 8005edc:	4a34      	ldr	r2, [pc, #208]	@ (8005fb0 <HAL_DMA_Init+0x1c0>)
 8005ede:	4293      	cmp	r3, r2
 8005ee0:	d040      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005ee2:	687b      	ldr	r3, [r7, #4]
 8005ee4:	681b      	ldr	r3, [r3, #0]
 8005ee6:	4a33      	ldr	r2, [pc, #204]	@ (8005fb4 <HAL_DMA_Init+0x1c4>)
 8005ee8:	4293      	cmp	r3, r2
 8005eea:	d03b      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005eec:	687b      	ldr	r3, [r7, #4]
 8005eee:	681b      	ldr	r3, [r3, #0]
 8005ef0:	4a31      	ldr	r2, [pc, #196]	@ (8005fb8 <HAL_DMA_Init+0x1c8>)
 8005ef2:	4293      	cmp	r3, r2
 8005ef4:	d036      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005ef6:	687b      	ldr	r3, [r7, #4]
 8005ef8:	681b      	ldr	r3, [r3, #0]
 8005efa:	4a30      	ldr	r2, [pc, #192]	@ (8005fbc <HAL_DMA_Init+0x1cc>)
 8005efc:	4293      	cmp	r3, r2
 8005efe:	d031      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f00:	687b      	ldr	r3, [r7, #4]
 8005f02:	681b      	ldr	r3, [r3, #0]
 8005f04:	4a2e      	ldr	r2, [pc, #184]	@ (8005fc0 <HAL_DMA_Init+0x1d0>)
 8005f06:	4293      	cmp	r3, r2
 8005f08:	d02c      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f0a:	687b      	ldr	r3, [r7, #4]
 8005f0c:	681b      	ldr	r3, [r3, #0]
 8005f0e:	4a2d      	ldr	r2, [pc, #180]	@ (8005fc4 <HAL_DMA_Init+0x1d4>)
 8005f10:	4293      	cmp	r3, r2
 8005f12:	d027      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f14:	687b      	ldr	r3, [r7, #4]
 8005f16:	681b      	ldr	r3, [r3, #0]
 8005f18:	4a2b      	ldr	r2, [pc, #172]	@ (8005fc8 <HAL_DMA_Init+0x1d8>)
 8005f1a:	4293      	cmp	r3, r2
 8005f1c:	d022      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f1e:	687b      	ldr	r3, [r7, #4]
 8005f20:	681b      	ldr	r3, [r3, #0]
 8005f22:	4a2a      	ldr	r2, [pc, #168]	@ (8005fcc <HAL_DMA_Init+0x1dc>)
 8005f24:	4293      	cmp	r3, r2
 8005f26:	d01d      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f28:	687b      	ldr	r3, [r7, #4]
 8005f2a:	681b      	ldr	r3, [r3, #0]
 8005f2c:	4a28      	ldr	r2, [pc, #160]	@ (8005fd0 <HAL_DMA_Init+0x1e0>)
 8005f2e:	4293      	cmp	r3, r2
 8005f30:	d018      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f32:	687b      	ldr	r3, [r7, #4]
 8005f34:	681b      	ldr	r3, [r3, #0]
 8005f36:	4a27      	ldr	r2, [pc, #156]	@ (8005fd4 <HAL_DMA_Init+0x1e4>)
 8005f38:	4293      	cmp	r3, r2
 8005f3a:	d013      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f3c:	687b      	ldr	r3, [r7, #4]
 8005f3e:	681b      	ldr	r3, [r3, #0]
 8005f40:	4a25      	ldr	r2, [pc, #148]	@ (8005fd8 <HAL_DMA_Init+0x1e8>)
 8005f42:	4293      	cmp	r3, r2
 8005f44:	d00e      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f46:	687b      	ldr	r3, [r7, #4]
 8005f48:	681b      	ldr	r3, [r3, #0]
 8005f4a:	4a24      	ldr	r2, [pc, #144]	@ (8005fdc <HAL_DMA_Init+0x1ec>)
 8005f4c:	4293      	cmp	r3, r2
 8005f4e:	d009      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f50:	687b      	ldr	r3, [r7, #4]
 8005f52:	681b      	ldr	r3, [r3, #0]
 8005f54:	4a22      	ldr	r2, [pc, #136]	@ (8005fe0 <HAL_DMA_Init+0x1f0>)
 8005f56:	4293      	cmp	r3, r2
 8005f58:	d004      	beq.n	8005f64 <HAL_DMA_Init+0x174>
 8005f5a:	687b      	ldr	r3, [r7, #4]
 8005f5c:	681b      	ldr	r3, [r3, #0]
 8005f5e:	4a21      	ldr	r2, [pc, #132]	@ (8005fe4 <HAL_DMA_Init+0x1f4>)
 8005f60:	4293      	cmp	r3, r2
 8005f62:	d108      	bne.n	8005f76 <HAL_DMA_Init+0x186>
 8005f64:	687b      	ldr	r3, [r7, #4]
 8005f66:	681b      	ldr	r3, [r3, #0]
 8005f68:	681a      	ldr	r2, [r3, #0]
 8005f6a:	687b      	ldr	r3, [r7, #4]
 8005f6c:	681b      	ldr	r3, [r3, #0]
 8005f6e:	f022 0201 	bic.w	r2, r2, #1
 8005f72:	601a      	str	r2, [r3, #0]
 8005f74:	e007      	b.n	8005f86 <HAL_DMA_Init+0x196>
 8005f76:	687b      	ldr	r3, [r7, #4]
 8005f78:	681b      	ldr	r3, [r3, #0]
 8005f7a:	681a      	ldr	r2, [r3, #0]
 8005f7c:	687b      	ldr	r3, [r7, #4]
 8005f7e:	681b      	ldr	r3, [r3, #0]
 8005f80:	f022 0201 	bic.w	r2, r2, #1
 8005f84:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005f86:	e02f      	b.n	8005fe8 <HAL_DMA_Init+0x1f8>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8005f88:	f7ff fb84 	bl	8005694 <HAL_GetTick>
 8005f8c:	4602      	mov	r2, r0
 8005f8e:	693b      	ldr	r3, [r7, #16]
 8005f90:	1ad3      	subs	r3, r2, r3
 8005f92:	2b05      	cmp	r3, #5
 8005f94:	d928      	bls.n	8005fe8 <HAL_DMA_Init+0x1f8>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8005f96:	687b      	ldr	r3, [r7, #4]
 8005f98:	2220      	movs	r2, #32
 8005f9a:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8005f9c:	687b      	ldr	r3, [r7, #4]
 8005f9e:	2203      	movs	r2, #3
 8005fa0:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        return HAL_ERROR;
 8005fa4:	2301      	movs	r3, #1
 8005fa6:	e246      	b.n	8006436 <HAL_DMA_Init+0x646>
 8005fa8:	40020010 	.word	0x40020010
 8005fac:	40020028 	.word	0x40020028
 8005fb0:	40020040 	.word	0x40020040
 8005fb4:	40020058 	.word	0x40020058
 8005fb8:	40020070 	.word	0x40020070
 8005fbc:	40020088 	.word	0x40020088
 8005fc0:	400200a0 	.word	0x400200a0
 8005fc4:	400200b8 	.word	0x400200b8
 8005fc8:	40020410 	.word	0x40020410
 8005fcc:	40020428 	.word	0x40020428
 8005fd0:	40020440 	.word	0x40020440
 8005fd4:	40020458 	.word	0x40020458
 8005fd8:	40020470 	.word	0x40020470
 8005fdc:	40020488 	.word	0x40020488
 8005fe0:	400204a0 	.word	0x400204a0
 8005fe4:	400204b8 	.word	0x400204b8
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8005fe8:	687b      	ldr	r3, [r7, #4]
 8005fea:	681b      	ldr	r3, [r3, #0]
 8005fec:	681b      	ldr	r3, [r3, #0]
 8005fee:	f003 0301 	and.w	r3, r3, #1
 8005ff2:	2b00      	cmp	r3, #0
 8005ff4:	d1c8      	bne.n	8005f88 <HAL_DMA_Init+0x198>
      }
    }

    /* Get the CR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->CR;
 8005ff6:	687b      	ldr	r3, [r7, #4]
 8005ff8:	681b      	ldr	r3, [r3, #0]
 8005ffa:	681b      	ldr	r3, [r3, #0]
 8005ffc:	617b      	str	r3, [r7, #20]

    /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
    registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
 8005ffe:	697a      	ldr	r2, [r7, #20]
 8006000:	4b83      	ldr	r3, [pc, #524]	@ (8006210 <HAL_DMA_Init+0x420>)
 8006002:	4013      	ands	r3, r2
 8006004:	617b      	str	r3, [r7, #20]
                        DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
                        DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
                        DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));

    /* Prepare the DMA Stream configuration */
    registerValue |=  hdma->Init.Direction           |
 8006006:	687b      	ldr	r3, [r7, #4]
 8006008:	689a      	ldr	r2, [r3, #8]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800600a:	687b      	ldr	r3, [r7, #4]
 800600c:	68db      	ldr	r3, [r3, #12]
    registerValue |=  hdma->Init.Direction           |
 800600e:	431a      	orrs	r2, r3
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8006010:	687b      	ldr	r3, [r7, #4]
 8006012:	691b      	ldr	r3, [r3, #16]
 8006014:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8006016:	687b      	ldr	r3, [r7, #4]
 8006018:	695b      	ldr	r3, [r3, #20]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800601a:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 800601c:	687b      	ldr	r3, [r7, #4]
 800601e:	699b      	ldr	r3, [r3, #24]
 8006020:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8006022:	687b      	ldr	r3, [r7, #4]
 8006024:	69db      	ldr	r3, [r3, #28]
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8006026:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8006028:	687b      	ldr	r3, [r7, #4]
 800602a:	6a1b      	ldr	r3, [r3, #32]
 800602c:	4313      	orrs	r3, r2
    registerValue |=  hdma->Init.Direction           |
 800602e:	697a      	ldr	r2, [r7, #20]
 8006030:	4313      	orrs	r3, r2
 8006032:	617b      	str	r3, [r7, #20]

    /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8006034:	687b      	ldr	r3, [r7, #4]
 8006036:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8006038:	2b04      	cmp	r3, #4
 800603a:	d107      	bne.n	800604c <HAL_DMA_Init+0x25c>
    {
      /* Get memory burst and peripheral burst */
      registerValue |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
 800603c:	687b      	ldr	r3, [r7, #4]
 800603e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8006040:	687b      	ldr	r3, [r7, #4]
 8006042:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8006044:	4313      	orrs	r3, r2
 8006046:	697a      	ldr	r2, [r7, #20]
 8006048:	4313      	orrs	r3, r2
 800604a:	617b      	str	r3, [r7, #20]
    }

    /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
                                    lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
    if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
 800604c:	4b71      	ldr	r3, [pc, #452]	@ (8006214 <HAL_DMA_Init+0x424>)
 800604e:	681a      	ldr	r2, [r3, #0]
 8006050:	4b71      	ldr	r3, [pc, #452]	@ (8006218 <HAL_DMA_Init+0x428>)
 8006052:	4013      	ands	r3, r2
 8006054:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 8006058:	d328      	bcc.n	80060ac <HAL_DMA_Init+0x2bc>
    {
#endif /* STM32H7_DEV_ID == 0x450UL */
      if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
 800605a:	687b      	ldr	r3, [r7, #4]
 800605c:	685b      	ldr	r3, [r3, #4]
 800605e:	2b28      	cmp	r3, #40	@ 0x28
 8006060:	d903      	bls.n	800606a <HAL_DMA_Init+0x27a>
 8006062:	687b      	ldr	r3, [r7, #4]
 8006064:	685b      	ldr	r3, [r3, #4]
 8006066:	2b2e      	cmp	r3, #46	@ 0x2e
 8006068:	d917      	bls.n	800609a <HAL_DMA_Init+0x2aa>
 800606a:	687b      	ldr	r3, [r7, #4]
 800606c:	685b      	ldr	r3, [r3, #4]
 800606e:	2b3e      	cmp	r3, #62	@ 0x3e
 8006070:	d903      	bls.n	800607a <HAL_DMA_Init+0x28a>
 8006072:	687b      	ldr	r3, [r7, #4]
 8006074:	685b      	ldr	r3, [r3, #4]
 8006076:	2b42      	cmp	r3, #66	@ 0x42
 8006078:	d90f      	bls.n	800609a <HAL_DMA_Init+0x2aa>
 800607a:	687b      	ldr	r3, [r7, #4]
 800607c:	685b      	ldr	r3, [r3, #4]
 800607e:	2b46      	cmp	r3, #70	@ 0x46
 8006080:	d903      	bls.n	800608a <HAL_DMA_Init+0x29a>
 8006082:	687b      	ldr	r3, [r7, #4]
 8006084:	685b      	ldr	r3, [r3, #4]
 8006086:	2b48      	cmp	r3, #72	@ 0x48
 8006088:	d907      	bls.n	800609a <HAL_DMA_Init+0x2aa>
 800608a:	687b      	ldr	r3, [r7, #4]
 800608c:	685b      	ldr	r3, [r3, #4]
 800608e:	2b4e      	cmp	r3, #78	@ 0x4e
 8006090:	d905      	bls.n	800609e <HAL_DMA_Init+0x2ae>
 8006092:	687b      	ldr	r3, [r7, #4]
 8006094:	685b      	ldr	r3, [r3, #4]
 8006096:	2b52      	cmp	r3, #82	@ 0x52
 8006098:	d801      	bhi.n	800609e <HAL_DMA_Init+0x2ae>
 800609a:	2301      	movs	r3, #1
 800609c:	e000      	b.n	80060a0 <HAL_DMA_Init+0x2b0>
 800609e:	2300      	movs	r3, #0
 80060a0:	2b00      	cmp	r3, #0
 80060a2:	d003      	beq.n	80060ac <HAL_DMA_Init+0x2bc>
      {
        registerValue |= DMA_SxCR_TRBUFF;
 80060a4:	697b      	ldr	r3, [r7, #20]
 80060a6:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 80060aa:	617b      	str	r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
    }
#endif /* STM32H7_DEV_ID == 0x450UL */

    /* Write to DMA Stream CR register */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->CR = registerValue;
 80060ac:	687b      	ldr	r3, [r7, #4]
 80060ae:	681b      	ldr	r3, [r3, #0]
 80060b0:	697a      	ldr	r2, [r7, #20]
 80060b2:	601a      	str	r2, [r3, #0]

    /* Get the FCR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR;
 80060b4:	687b      	ldr	r3, [r7, #4]
 80060b6:	681b      	ldr	r3, [r3, #0]
 80060b8:	695b      	ldr	r3, [r3, #20]
 80060ba:	617b      	str	r3, [r7, #20]

    /* Clear Direct mode and FIFO threshold bits */
    registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
 80060bc:	697b      	ldr	r3, [r7, #20]
 80060be:	f023 0307 	bic.w	r3, r3, #7
 80060c2:	617b      	str	r3, [r7, #20]

    /* Prepare the DMA Stream FIFO configuration */
    registerValue |= hdma->Init.FIFOMode;
 80060c4:	687b      	ldr	r3, [r7, #4]
 80060c6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80060c8:	697a      	ldr	r2, [r7, #20]
 80060ca:	4313      	orrs	r3, r2
 80060cc:	617b      	str	r3, [r7, #20]

    /* the FIFO threshold is not used when the FIFO mode is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 80060ce:	687b      	ldr	r3, [r7, #4]
 80060d0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80060d2:	2b04      	cmp	r3, #4
 80060d4:	d117      	bne.n	8006106 <HAL_DMA_Init+0x316>
    {
      /* Get the FIFO threshold */
      registerValue |= hdma->Init.FIFOThreshold;
 80060d6:	687b      	ldr	r3, [r7, #4]
 80060d8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80060da:	697a      	ldr	r2, [r7, #20]
 80060dc:	4313      	orrs	r3, r2
 80060de:	617b      	str	r3, [r7, #20]

      /* Check compatibility between FIFO threshold level and size of the memory burst */
      /* for INCR4, INCR8, INCR16 */
      if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
 80060e0:	687b      	ldr	r3, [r7, #4]
 80060e2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80060e4:	2b00      	cmp	r3, #0
 80060e6:	d00e      	beq.n	8006106 <HAL_DMA_Init+0x316>
      {
        if (DMA_CheckFifoParam(hdma) != HAL_OK)
 80060e8:	6878      	ldr	r0, [r7, #4]
 80060ea:	f001 ff1d 	bl	8007f28 <DMA_CheckFifoParam>
 80060ee:	4603      	mov	r3, r0
 80060f0:	2b00      	cmp	r3, #0
 80060f2:	d008      	beq.n	8006106 <HAL_DMA_Init+0x316>
        {
          /* Update error code */
          hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 80060f4:	687b      	ldr	r3, [r7, #4]
 80060f6:	2240      	movs	r2, #64	@ 0x40
 80060f8:	655a      	str	r2, [r3, #84]	@ 0x54

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 80060fa:	687b      	ldr	r3, [r7, #4]
 80060fc:	2201      	movs	r2, #1
 80060fe:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          return HAL_ERROR;
 8006102:	2301      	movs	r3, #1
 8006104:	e197      	b.n	8006436 <HAL_DMA_Init+0x646>
        }
      }
    }

    /* Write to DMA Stream FCR */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR = registerValue;
 8006106:	687b      	ldr	r3, [r7, #4]
 8006108:	681b      	ldr	r3, [r3, #0]
 800610a:	697a      	ldr	r2, [r7, #20]
 800610c:	615a      	str	r2, [r3, #20]

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
       DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 800610e:	6878      	ldr	r0, [r7, #4]
 8006110:	f001 fe58 	bl	8007dc4 <DMA_CalcBaseAndBitshift>
 8006114:	4603      	mov	r3, r0
 8006116:	60bb      	str	r3, [r7, #8]

    /* Clear all interrupt flags */
    regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8006118:	687b      	ldr	r3, [r7, #4]
 800611a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800611c:	f003 031f 	and.w	r3, r3, #31
 8006120:	223f      	movs	r2, #63	@ 0x3f
 8006122:	409a      	lsls	r2, r3
 8006124:	68bb      	ldr	r3, [r7, #8]
 8006126:	609a      	str	r2, [r3, #8]
 8006128:	e0cd      	b.n	80062c6 <HAL_DMA_Init+0x4d6>
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
 800612a:	687b      	ldr	r3, [r7, #4]
 800612c:	681b      	ldr	r3, [r3, #0]
 800612e:	4a3b      	ldr	r2, [pc, #236]	@ (800621c <HAL_DMA_Init+0x42c>)
 8006130:	4293      	cmp	r3, r2
 8006132:	d022      	beq.n	800617a <HAL_DMA_Init+0x38a>
 8006134:	687b      	ldr	r3, [r7, #4]
 8006136:	681b      	ldr	r3, [r3, #0]
 8006138:	4a39      	ldr	r2, [pc, #228]	@ (8006220 <HAL_DMA_Init+0x430>)
 800613a:	4293      	cmp	r3, r2
 800613c:	d01d      	beq.n	800617a <HAL_DMA_Init+0x38a>
 800613e:	687b      	ldr	r3, [r7, #4]
 8006140:	681b      	ldr	r3, [r3, #0]
 8006142:	4a38      	ldr	r2, [pc, #224]	@ (8006224 <HAL_DMA_Init+0x434>)
 8006144:	4293      	cmp	r3, r2
 8006146:	d018      	beq.n	800617a <HAL_DMA_Init+0x38a>
 8006148:	687b      	ldr	r3, [r7, #4]
 800614a:	681b      	ldr	r3, [r3, #0]
 800614c:	4a36      	ldr	r2, [pc, #216]	@ (8006228 <HAL_DMA_Init+0x438>)
 800614e:	4293      	cmp	r3, r2
 8006150:	d013      	beq.n	800617a <HAL_DMA_Init+0x38a>
 8006152:	687b      	ldr	r3, [r7, #4]
 8006154:	681b      	ldr	r3, [r3, #0]
 8006156:	4a35      	ldr	r2, [pc, #212]	@ (800622c <HAL_DMA_Init+0x43c>)
 8006158:	4293      	cmp	r3, r2
 800615a:	d00e      	beq.n	800617a <HAL_DMA_Init+0x38a>
 800615c:	687b      	ldr	r3, [r7, #4]
 800615e:	681b      	ldr	r3, [r3, #0]
 8006160:	4a33      	ldr	r2, [pc, #204]	@ (8006230 <HAL_DMA_Init+0x440>)
 8006162:	4293      	cmp	r3, r2
 8006164:	d009      	beq.n	800617a <HAL_DMA_Init+0x38a>
 8006166:	687b      	ldr	r3, [r7, #4]
 8006168:	681b      	ldr	r3, [r3, #0]
 800616a:	4a32      	ldr	r2, [pc, #200]	@ (8006234 <HAL_DMA_Init+0x444>)
 800616c:	4293      	cmp	r3, r2
 800616e:	d004      	beq.n	800617a <HAL_DMA_Init+0x38a>
 8006170:	687b      	ldr	r3, [r7, #4]
 8006172:	681b      	ldr	r3, [r3, #0]
 8006174:	4a30      	ldr	r2, [pc, #192]	@ (8006238 <HAL_DMA_Init+0x448>)
 8006176:	4293      	cmp	r3, r2
 8006178:	d101      	bne.n	800617e <HAL_DMA_Init+0x38e>
 800617a:	2301      	movs	r3, #1
 800617c:	e000      	b.n	8006180 <HAL_DMA_Init+0x390>
 800617e:	2300      	movs	r3, #0
 8006180:	2b00      	cmp	r3, #0
 8006182:	f000 8097 	beq.w	80062b4 <HAL_DMA_Init+0x4c4>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8006186:	687b      	ldr	r3, [r7, #4]
 8006188:	681b      	ldr	r3, [r3, #0]
 800618a:	4a24      	ldr	r2, [pc, #144]	@ (800621c <HAL_DMA_Init+0x42c>)
 800618c:	4293      	cmp	r3, r2
 800618e:	d021      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 8006190:	687b      	ldr	r3, [r7, #4]
 8006192:	681b      	ldr	r3, [r3, #0]
 8006194:	4a22      	ldr	r2, [pc, #136]	@ (8006220 <HAL_DMA_Init+0x430>)
 8006196:	4293      	cmp	r3, r2
 8006198:	d01c      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 800619a:	687b      	ldr	r3, [r7, #4]
 800619c:	681b      	ldr	r3, [r3, #0]
 800619e:	4a21      	ldr	r2, [pc, #132]	@ (8006224 <HAL_DMA_Init+0x434>)
 80061a0:	4293      	cmp	r3, r2
 80061a2:	d017      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 80061a4:	687b      	ldr	r3, [r7, #4]
 80061a6:	681b      	ldr	r3, [r3, #0]
 80061a8:	4a1f      	ldr	r2, [pc, #124]	@ (8006228 <HAL_DMA_Init+0x438>)
 80061aa:	4293      	cmp	r3, r2
 80061ac:	d012      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 80061ae:	687b      	ldr	r3, [r7, #4]
 80061b0:	681b      	ldr	r3, [r3, #0]
 80061b2:	4a1e      	ldr	r2, [pc, #120]	@ (800622c <HAL_DMA_Init+0x43c>)
 80061b4:	4293      	cmp	r3, r2
 80061b6:	d00d      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 80061b8:	687b      	ldr	r3, [r7, #4]
 80061ba:	681b      	ldr	r3, [r3, #0]
 80061bc:	4a1c      	ldr	r2, [pc, #112]	@ (8006230 <HAL_DMA_Init+0x440>)
 80061be:	4293      	cmp	r3, r2
 80061c0:	d008      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 80061c2:	687b      	ldr	r3, [r7, #4]
 80061c4:	681b      	ldr	r3, [r3, #0]
 80061c6:	4a1b      	ldr	r2, [pc, #108]	@ (8006234 <HAL_DMA_Init+0x444>)
 80061c8:	4293      	cmp	r3, r2
 80061ca:	d003      	beq.n	80061d4 <HAL_DMA_Init+0x3e4>
 80061cc:	687b      	ldr	r3, [r7, #4]
 80061ce:	681b      	ldr	r3, [r3, #0]
 80061d0:	4a19      	ldr	r2, [pc, #100]	@ (8006238 <HAL_DMA_Init+0x448>)
 80061d2:	4293      	cmp	r3, r2
      /* Check the request parameter */
      assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 80061d4:	687b      	ldr	r3, [r7, #4]
 80061d6:	2202      	movs	r2, #2
 80061d8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 80061dc:	687b      	ldr	r3, [r7, #4]
 80061de:	2200      	movs	r2, #0
 80061e0:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Get the CR register value */
    registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
 80061e4:	687b      	ldr	r3, [r7, #4]
 80061e6:	681b      	ldr	r3, [r3, #0]
 80061e8:	681b      	ldr	r3, [r3, #0]
 80061ea:	617b      	str	r3, [r7, #20]

    /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
    registerValue &= ((uint32_t)~(BDMA_CCR_PL    | BDMA_CCR_MSIZE   | BDMA_CCR_PSIZE  | \
 80061ec:	697a      	ldr	r2, [r7, #20]
 80061ee:	4b13      	ldr	r3, [pc, #76]	@ (800623c <HAL_DMA_Init+0x44c>)
 80061f0:	4013      	ands	r3, r2
 80061f2:	617b      	str	r3, [r7, #20]
                                  BDMA_CCR_MINC  | BDMA_CCR_PINC    | BDMA_CCR_CIRC   | \
                                  BDMA_CCR_DIR   | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM    | \
                                  BDMA_CCR_CT));

    /* Prepare the DMA Channel configuration */
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 80061f4:	687b      	ldr	r3, [r7, #4]
 80061f6:	689b      	ldr	r3, [r3, #8]
 80061f8:	2b40      	cmp	r3, #64	@ 0x40
 80061fa:	d021      	beq.n	8006240 <HAL_DMA_Init+0x450>
 80061fc:	687b      	ldr	r3, [r7, #4]
 80061fe:	689b      	ldr	r3, [r3, #8]
 8006200:	2b80      	cmp	r3, #128	@ 0x80
 8006202:	d102      	bne.n	800620a <HAL_DMA_Init+0x41a>
 8006204:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8006208:	e01b      	b.n	8006242 <HAL_DMA_Init+0x452>
 800620a:	2300      	movs	r3, #0
 800620c:	e019      	b.n	8006242 <HAL_DMA_Init+0x452>
 800620e:	bf00      	nop
 8006210:	fe10803f 	.word	0xfe10803f
 8006214:	5c001000 	.word	0x5c001000
 8006218:	ffff0000 	.word	0xffff0000
 800621c:	58025408 	.word	0x58025408
 8006220:	5802541c 	.word	0x5802541c
 8006224:	58025430 	.word	0x58025430
 8006228:	58025444 	.word	0x58025444
 800622c:	58025458 	.word	0x58025458
 8006230:	5802546c 	.word	0x5802546c
 8006234:	58025480 	.word	0x58025480
 8006238:	58025494 	.word	0x58025494
 800623c:	fffe000f 	.word	0xfffe000f
 8006240:	2310      	movs	r3, #16
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8006242:	687a      	ldr	r2, [r7, #4]
 8006244:	68d2      	ldr	r2, [r2, #12]
 8006246:	08d2      	lsrs	r2, r2, #3
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8006248:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 800624a:	687b      	ldr	r3, [r7, #4]
 800624c:	691b      	ldr	r3, [r3, #16]
 800624e:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 8006250:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8006252:	687b      	ldr	r3, [r7, #4]
 8006254:	695b      	ldr	r3, [r3, #20]
 8006256:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 8006258:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 800625a:	687b      	ldr	r3, [r7, #4]
 800625c:	699b      	ldr	r3, [r3, #24]
 800625e:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 8006260:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8006262:	687b      	ldr	r3, [r7, #4]
 8006264:	69db      	ldr	r3, [r3, #28]
 8006266:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 8006268:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
 800626a:	687b      	ldr	r3, [r7, #4]
 800626c:	6a1b      	ldr	r3, [r3, #32]
 800626e:	091b      	lsrs	r3, r3, #4
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 8006270:	4313      	orrs	r3, r2
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8006272:	697a      	ldr	r2, [r7, #20]
 8006274:	4313      	orrs	r3, r2
 8006276:	617b      	str	r3, [r7, #20]

    /* Write to DMA Channel CR register */
    ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
 8006278:	687b      	ldr	r3, [r7, #4]
 800627a:	681b      	ldr	r3, [r3, #0]
 800627c:	697a      	ldr	r2, [r7, #20]
 800627e:	601a      	str	r2, [r3, #0]

    /* calculation of the channel index */
    hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
 8006280:	687b      	ldr	r3, [r7, #4]
 8006282:	681b      	ldr	r3, [r3, #0]
 8006284:	461a      	mov	r2, r3
 8006286:	4b6e      	ldr	r3, [pc, #440]	@ (8006440 <HAL_DMA_Init+0x650>)
 8006288:	4413      	add	r3, r2
 800628a:	4a6e      	ldr	r2, [pc, #440]	@ (8006444 <HAL_DMA_Init+0x654>)
 800628c:	fba2 2303 	umull	r2, r3, r2, r3
 8006290:	091b      	lsrs	r3, r3, #4
 8006292:	009a      	lsls	r2, r3, #2
 8006294:	687b      	ldr	r3, [r7, #4]
 8006296:	65da      	str	r2, [r3, #92]	@ 0x5c

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
    DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8006298:	6878      	ldr	r0, [r7, #4]
 800629a:	f001 fd93 	bl	8007dc4 <DMA_CalcBaseAndBitshift>
 800629e:	4603      	mov	r3, r0
 80062a0:	60fb      	str	r3, [r7, #12]

    /* Clear all interrupt flags */
    regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 80062a2:	687b      	ldr	r3, [r7, #4]
 80062a4:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80062a6:	f003 031f 	and.w	r3, r3, #31
 80062aa:	2201      	movs	r2, #1
 80062ac:	409a      	lsls	r2, r3
 80062ae:	68fb      	ldr	r3, [r7, #12]
 80062b0:	605a      	str	r2, [r3, #4]
 80062b2:	e008      	b.n	80062c6 <HAL_DMA_Init+0x4d6>
  }
  else
  {
    hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 80062b4:	687b      	ldr	r3, [r7, #4]
 80062b6:	2240      	movs	r2, #64	@ 0x40
 80062b8:	655a      	str	r2, [r3, #84]	@ 0x54
    hdma->State     = HAL_DMA_STATE_ERROR;
 80062ba:	687b      	ldr	r3, [r7, #4]
 80062bc:	2203      	movs	r2, #3
 80062be:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    return HAL_ERROR;
 80062c2:	2301      	movs	r3, #1
 80062c4:	e0b7      	b.n	8006436 <HAL_DMA_Init+0x646>
  }

  if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80062c6:	687b      	ldr	r3, [r7, #4]
 80062c8:	681b      	ldr	r3, [r3, #0]
 80062ca:	4a5f      	ldr	r2, [pc, #380]	@ (8006448 <HAL_DMA_Init+0x658>)
 80062cc:	4293      	cmp	r3, r2
 80062ce:	d072      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80062d0:	687b      	ldr	r3, [r7, #4]
 80062d2:	681b      	ldr	r3, [r3, #0]
 80062d4:	4a5d      	ldr	r2, [pc, #372]	@ (800644c <HAL_DMA_Init+0x65c>)
 80062d6:	4293      	cmp	r3, r2
 80062d8:	d06d      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80062da:	687b      	ldr	r3, [r7, #4]
 80062dc:	681b      	ldr	r3, [r3, #0]
 80062de:	4a5c      	ldr	r2, [pc, #368]	@ (8006450 <HAL_DMA_Init+0x660>)
 80062e0:	4293      	cmp	r3, r2
 80062e2:	d068      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80062e4:	687b      	ldr	r3, [r7, #4]
 80062e6:	681b      	ldr	r3, [r3, #0]
 80062e8:	4a5a      	ldr	r2, [pc, #360]	@ (8006454 <HAL_DMA_Init+0x664>)
 80062ea:	4293      	cmp	r3, r2
 80062ec:	d063      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80062ee:	687b      	ldr	r3, [r7, #4]
 80062f0:	681b      	ldr	r3, [r3, #0]
 80062f2:	4a59      	ldr	r2, [pc, #356]	@ (8006458 <HAL_DMA_Init+0x668>)
 80062f4:	4293      	cmp	r3, r2
 80062f6:	d05e      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80062f8:	687b      	ldr	r3, [r7, #4]
 80062fa:	681b      	ldr	r3, [r3, #0]
 80062fc:	4a57      	ldr	r2, [pc, #348]	@ (800645c <HAL_DMA_Init+0x66c>)
 80062fe:	4293      	cmp	r3, r2
 8006300:	d059      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006302:	687b      	ldr	r3, [r7, #4]
 8006304:	681b      	ldr	r3, [r3, #0]
 8006306:	4a56      	ldr	r2, [pc, #344]	@ (8006460 <HAL_DMA_Init+0x670>)
 8006308:	4293      	cmp	r3, r2
 800630a:	d054      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800630c:	687b      	ldr	r3, [r7, #4]
 800630e:	681b      	ldr	r3, [r3, #0]
 8006310:	4a54      	ldr	r2, [pc, #336]	@ (8006464 <HAL_DMA_Init+0x674>)
 8006312:	4293      	cmp	r3, r2
 8006314:	d04f      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006316:	687b      	ldr	r3, [r7, #4]
 8006318:	681b      	ldr	r3, [r3, #0]
 800631a:	4a53      	ldr	r2, [pc, #332]	@ (8006468 <HAL_DMA_Init+0x678>)
 800631c:	4293      	cmp	r3, r2
 800631e:	d04a      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006320:	687b      	ldr	r3, [r7, #4]
 8006322:	681b      	ldr	r3, [r3, #0]
 8006324:	4a51      	ldr	r2, [pc, #324]	@ (800646c <HAL_DMA_Init+0x67c>)
 8006326:	4293      	cmp	r3, r2
 8006328:	d045      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800632a:	687b      	ldr	r3, [r7, #4]
 800632c:	681b      	ldr	r3, [r3, #0]
 800632e:	4a50      	ldr	r2, [pc, #320]	@ (8006470 <HAL_DMA_Init+0x680>)
 8006330:	4293      	cmp	r3, r2
 8006332:	d040      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006334:	687b      	ldr	r3, [r7, #4]
 8006336:	681b      	ldr	r3, [r3, #0]
 8006338:	4a4e      	ldr	r2, [pc, #312]	@ (8006474 <HAL_DMA_Init+0x684>)
 800633a:	4293      	cmp	r3, r2
 800633c:	d03b      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800633e:	687b      	ldr	r3, [r7, #4]
 8006340:	681b      	ldr	r3, [r3, #0]
 8006342:	4a4d      	ldr	r2, [pc, #308]	@ (8006478 <HAL_DMA_Init+0x688>)
 8006344:	4293      	cmp	r3, r2
 8006346:	d036      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006348:	687b      	ldr	r3, [r7, #4]
 800634a:	681b      	ldr	r3, [r3, #0]
 800634c:	4a4b      	ldr	r2, [pc, #300]	@ (800647c <HAL_DMA_Init+0x68c>)
 800634e:	4293      	cmp	r3, r2
 8006350:	d031      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006352:	687b      	ldr	r3, [r7, #4]
 8006354:	681b      	ldr	r3, [r3, #0]
 8006356:	4a4a      	ldr	r2, [pc, #296]	@ (8006480 <HAL_DMA_Init+0x690>)
 8006358:	4293      	cmp	r3, r2
 800635a:	d02c      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800635c:	687b      	ldr	r3, [r7, #4]
 800635e:	681b      	ldr	r3, [r3, #0]
 8006360:	4a48      	ldr	r2, [pc, #288]	@ (8006484 <HAL_DMA_Init+0x694>)
 8006362:	4293      	cmp	r3, r2
 8006364:	d027      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006366:	687b      	ldr	r3, [r7, #4]
 8006368:	681b      	ldr	r3, [r3, #0]
 800636a:	4a47      	ldr	r2, [pc, #284]	@ (8006488 <HAL_DMA_Init+0x698>)
 800636c:	4293      	cmp	r3, r2
 800636e:	d022      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006370:	687b      	ldr	r3, [r7, #4]
 8006372:	681b      	ldr	r3, [r3, #0]
 8006374:	4a45      	ldr	r2, [pc, #276]	@ (800648c <HAL_DMA_Init+0x69c>)
 8006376:	4293      	cmp	r3, r2
 8006378:	d01d      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800637a:	687b      	ldr	r3, [r7, #4]
 800637c:	681b      	ldr	r3, [r3, #0]
 800637e:	4a44      	ldr	r2, [pc, #272]	@ (8006490 <HAL_DMA_Init+0x6a0>)
 8006380:	4293      	cmp	r3, r2
 8006382:	d018      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006384:	687b      	ldr	r3, [r7, #4]
 8006386:	681b      	ldr	r3, [r3, #0]
 8006388:	4a42      	ldr	r2, [pc, #264]	@ (8006494 <HAL_DMA_Init+0x6a4>)
 800638a:	4293      	cmp	r3, r2
 800638c:	d013      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 800638e:	687b      	ldr	r3, [r7, #4]
 8006390:	681b      	ldr	r3, [r3, #0]
 8006392:	4a41      	ldr	r2, [pc, #260]	@ (8006498 <HAL_DMA_Init+0x6a8>)
 8006394:	4293      	cmp	r3, r2
 8006396:	d00e      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 8006398:	687b      	ldr	r3, [r7, #4]
 800639a:	681b      	ldr	r3, [r3, #0]
 800639c:	4a3f      	ldr	r2, [pc, #252]	@ (800649c <HAL_DMA_Init+0x6ac>)
 800639e:	4293      	cmp	r3, r2
 80063a0:	d009      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80063a2:	687b      	ldr	r3, [r7, #4]
 80063a4:	681b      	ldr	r3, [r3, #0]
 80063a6:	4a3e      	ldr	r2, [pc, #248]	@ (80064a0 <HAL_DMA_Init+0x6b0>)
 80063a8:	4293      	cmp	r3, r2
 80063aa:	d004      	beq.n	80063b6 <HAL_DMA_Init+0x5c6>
 80063ac:	687b      	ldr	r3, [r7, #4]
 80063ae:	681b      	ldr	r3, [r3, #0]
 80063b0:	4a3c      	ldr	r2, [pc, #240]	@ (80064a4 <HAL_DMA_Init+0x6b4>)
 80063b2:	4293      	cmp	r3, r2
 80063b4:	d101      	bne.n	80063ba <HAL_DMA_Init+0x5ca>
 80063b6:	2301      	movs	r3, #1
 80063b8:	e000      	b.n	80063bc <HAL_DMA_Init+0x5cc>
 80063ba:	2300      	movs	r3, #0
 80063bc:	2b00      	cmp	r3, #0
 80063be:	d032      	beq.n	8006426 <HAL_DMA_Init+0x636>
  {
    /* Initialize parameters for DMAMUX channel :
    DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
    */
    DMA_CalcDMAMUXChannelBaseAndMask(hdma);
 80063c0:	6878      	ldr	r0, [r7, #4]
 80063c2:	f001 fe2d 	bl	8008020 <DMA_CalcDMAMUXChannelBaseAndMask>

    if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
 80063c6:	687b      	ldr	r3, [r7, #4]
 80063c8:	689b      	ldr	r3, [r3, #8]
 80063ca:	2b80      	cmp	r3, #128	@ 0x80
 80063cc:	d102      	bne.n	80063d4 <HAL_DMA_Init+0x5e4>
    {
      /* if memory to memory force the request to 0*/
      hdma->Init.Request = DMA_REQUEST_MEM2MEM;
 80063ce:	687b      	ldr	r3, [r7, #4]
 80063d0:	2200      	movs	r2, #0
 80063d2:	605a      	str	r2, [r3, #4]
    }

    /* Set peripheral request  to DMAMUX channel */
    hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
 80063d4:	687b      	ldr	r3, [r7, #4]
 80063d6:	685a      	ldr	r2, [r3, #4]
 80063d8:	687b      	ldr	r3, [r7, #4]
 80063da:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 80063dc:	b2d2      	uxtb	r2, r2
 80063de:	601a      	str	r2, [r3, #0]

    /* Clear the DMAMUX synchro overrun flag */
    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 80063e0:	687b      	ldr	r3, [r7, #4]
 80063e2:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80063e4:	687a      	ldr	r2, [r7, #4]
 80063e6:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 80063e8:	605a      	str	r2, [r3, #4]

    /* Initialize parameters for DMAMUX request generator :
    if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
    */
    if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
 80063ea:	687b      	ldr	r3, [r7, #4]
 80063ec:	685b      	ldr	r3, [r3, #4]
 80063ee:	2b00      	cmp	r3, #0
 80063f0:	d010      	beq.n	8006414 <HAL_DMA_Init+0x624>
 80063f2:	687b      	ldr	r3, [r7, #4]
 80063f4:	685b      	ldr	r3, [r3, #4]
 80063f6:	2b08      	cmp	r3, #8
 80063f8:	d80c      	bhi.n	8006414 <HAL_DMA_Init+0x624>
    {
      /* Initialize parameters for DMAMUX request generator :
      DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
      DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
 80063fa:	6878      	ldr	r0, [r7, #4]
 80063fc:	f001 feaa 	bl	8008154 <DMA_CalcDMAMUXRequestGenBaseAndMask>

      /* Reset the DMAMUX request generator register */
      hdma->DMAmuxRequestGen->RGCR = 0U;
 8006400:	687b      	ldr	r3, [r7, #4]
 8006402:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006404:	2200      	movs	r2, #0
 8006406:	601a      	str	r2, [r3, #0]

      /* Clear the DMAMUX request generator overrun flag */
      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006408:	687b      	ldr	r3, [r7, #4]
 800640a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800640c:	687a      	ldr	r2, [r7, #4]
 800640e:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006410:	605a      	str	r2, [r3, #4]
 8006412:	e008      	b.n	8006426 <HAL_DMA_Init+0x636>
    }
    else
    {
      hdma->DMAmuxRequestGen = 0U;
 8006414:	687b      	ldr	r3, [r7, #4]
 8006416:	2200      	movs	r2, #0
 8006418:	66da      	str	r2, [r3, #108]	@ 0x6c
      hdma->DMAmuxRequestGenStatus = 0U;
 800641a:	687b      	ldr	r3, [r7, #4]
 800641c:	2200      	movs	r2, #0
 800641e:	671a      	str	r2, [r3, #112]	@ 0x70
      hdma->DMAmuxRequestGenStatusMask = 0U;
 8006420:	687b      	ldr	r3, [r7, #4]
 8006422:	2200      	movs	r2, #0
 8006424:	675a      	str	r2, [r3, #116]	@ 0x74
    }
  }

  /* Initialize the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8006426:	687b      	ldr	r3, [r7, #4]
 8006428:	2200      	movs	r2, #0
 800642a:	655a      	str	r2, [r3, #84]	@ 0x54

  /* Initialize the DMA state */
  hdma->State = HAL_DMA_STATE_READY;
 800642c:	687b      	ldr	r3, [r7, #4]
 800642e:	2201      	movs	r2, #1
 8006430:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

  return HAL_OK;
 8006434:	2300      	movs	r3, #0
}
 8006436:	4618      	mov	r0, r3
 8006438:	3718      	adds	r7, #24
 800643a:	46bd      	mov	sp, r7
 800643c:	bd80      	pop	{r7, pc}
 800643e:	bf00      	nop
 8006440:	a7fdabf8 	.word	0xa7fdabf8
 8006444:	cccccccd 	.word	0xcccccccd
 8006448:	40020010 	.word	0x40020010
 800644c:	40020028 	.word	0x40020028
 8006450:	40020040 	.word	0x40020040
 8006454:	40020058 	.word	0x40020058
 8006458:	40020070 	.word	0x40020070
 800645c:	40020088 	.word	0x40020088
 8006460:	400200a0 	.word	0x400200a0
 8006464:	400200b8 	.word	0x400200b8
 8006468:	40020410 	.word	0x40020410
 800646c:	40020428 	.word	0x40020428
 8006470:	40020440 	.word	0x40020440
 8006474:	40020458 	.word	0x40020458
 8006478:	40020470 	.word	0x40020470
 800647c:	40020488 	.word	0x40020488
 8006480:	400204a0 	.word	0x400204a0
 8006484:	400204b8 	.word	0x400204b8
 8006488:	58025408 	.word	0x58025408
 800648c:	5802541c 	.word	0x5802541c
 8006490:	58025430 	.word	0x58025430
 8006494:	58025444 	.word	0x58025444
 8006498:	58025458 	.word	0x58025458
 800649c:	5802546c 	.word	0x5802546c
 80064a0:	58025480 	.word	0x58025480
 80064a4:	58025494 	.word	0x58025494

080064a8 <HAL_DMA_Abort>:
  *        and the Stream will be effectively disabled only after the transfer of
  *        this single data is finished.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
 80064a8:	b580      	push	{r7, lr}
 80064aa:	b086      	sub	sp, #24
 80064ac:	af00      	add	r7, sp, #0
 80064ae:	6078      	str	r0, [r7, #4]
  /* calculate DMA base and stream number */
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;
  const __IO uint32_t *enableRegister;

  uint32_t tickstart = HAL_GetTick();
 80064b0:	f7ff f8f0 	bl	8005694 <HAL_GetTick>
 80064b4:	6138      	str	r0, [r7, #16]

 /* Check the DMA peripheral handle */
  if(hdma == NULL)
 80064b6:	687b      	ldr	r3, [r7, #4]
 80064b8:	2b00      	cmp	r3, #0
 80064ba:	d101      	bne.n	80064c0 <HAL_DMA_Abort+0x18>
  {
    return HAL_ERROR;
 80064bc:	2301      	movs	r3, #1
 80064be:	e2dc      	b.n	8006a7a <HAL_DMA_Abort+0x5d2>
  }

  /* Check the DMA peripheral state */
  if(hdma->State != HAL_DMA_STATE_BUSY)
 80064c0:	687b      	ldr	r3, [r7, #4]
 80064c2:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 80064c6:	b2db      	uxtb	r3, r3
 80064c8:	2b02      	cmp	r3, #2
 80064ca:	d008      	beq.n	80064de <HAL_DMA_Abort+0x36>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80064cc:	687b      	ldr	r3, [r7, #4]
 80064ce:	2280      	movs	r2, #128	@ 0x80
 80064d0:	655a      	str	r2, [r3, #84]	@ 0x54

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 80064d2:	687b      	ldr	r3, [r7, #4]
 80064d4:	2200      	movs	r2, #0
 80064d6:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    return HAL_ERROR;
 80064da:	2301      	movs	r3, #1
 80064dc:	e2cd      	b.n	8006a7a <HAL_DMA_Abort+0x5d2>
  }
  else
  {
    /* Disable all the transfer interrupts */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 80064de:	687b      	ldr	r3, [r7, #4]
 80064e0:	681b      	ldr	r3, [r3, #0]
 80064e2:	4a76      	ldr	r2, [pc, #472]	@ (80066bc <HAL_DMA_Abort+0x214>)
 80064e4:	4293      	cmp	r3, r2
 80064e6:	d04a      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 80064e8:	687b      	ldr	r3, [r7, #4]
 80064ea:	681b      	ldr	r3, [r3, #0]
 80064ec:	4a74      	ldr	r2, [pc, #464]	@ (80066c0 <HAL_DMA_Abort+0x218>)
 80064ee:	4293      	cmp	r3, r2
 80064f0:	d045      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 80064f2:	687b      	ldr	r3, [r7, #4]
 80064f4:	681b      	ldr	r3, [r3, #0]
 80064f6:	4a73      	ldr	r2, [pc, #460]	@ (80066c4 <HAL_DMA_Abort+0x21c>)
 80064f8:	4293      	cmp	r3, r2
 80064fa:	d040      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 80064fc:	687b      	ldr	r3, [r7, #4]
 80064fe:	681b      	ldr	r3, [r3, #0]
 8006500:	4a71      	ldr	r2, [pc, #452]	@ (80066c8 <HAL_DMA_Abort+0x220>)
 8006502:	4293      	cmp	r3, r2
 8006504:	d03b      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006506:	687b      	ldr	r3, [r7, #4]
 8006508:	681b      	ldr	r3, [r3, #0]
 800650a:	4a70      	ldr	r2, [pc, #448]	@ (80066cc <HAL_DMA_Abort+0x224>)
 800650c:	4293      	cmp	r3, r2
 800650e:	d036      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006510:	687b      	ldr	r3, [r7, #4]
 8006512:	681b      	ldr	r3, [r3, #0]
 8006514:	4a6e      	ldr	r2, [pc, #440]	@ (80066d0 <HAL_DMA_Abort+0x228>)
 8006516:	4293      	cmp	r3, r2
 8006518:	d031      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 800651a:	687b      	ldr	r3, [r7, #4]
 800651c:	681b      	ldr	r3, [r3, #0]
 800651e:	4a6d      	ldr	r2, [pc, #436]	@ (80066d4 <HAL_DMA_Abort+0x22c>)
 8006520:	4293      	cmp	r3, r2
 8006522:	d02c      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006524:	687b      	ldr	r3, [r7, #4]
 8006526:	681b      	ldr	r3, [r3, #0]
 8006528:	4a6b      	ldr	r2, [pc, #428]	@ (80066d8 <HAL_DMA_Abort+0x230>)
 800652a:	4293      	cmp	r3, r2
 800652c:	d027      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 800652e:	687b      	ldr	r3, [r7, #4]
 8006530:	681b      	ldr	r3, [r3, #0]
 8006532:	4a6a      	ldr	r2, [pc, #424]	@ (80066dc <HAL_DMA_Abort+0x234>)
 8006534:	4293      	cmp	r3, r2
 8006536:	d022      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006538:	687b      	ldr	r3, [r7, #4]
 800653a:	681b      	ldr	r3, [r3, #0]
 800653c:	4a68      	ldr	r2, [pc, #416]	@ (80066e0 <HAL_DMA_Abort+0x238>)
 800653e:	4293      	cmp	r3, r2
 8006540:	d01d      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006542:	687b      	ldr	r3, [r7, #4]
 8006544:	681b      	ldr	r3, [r3, #0]
 8006546:	4a67      	ldr	r2, [pc, #412]	@ (80066e4 <HAL_DMA_Abort+0x23c>)
 8006548:	4293      	cmp	r3, r2
 800654a:	d018      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 800654c:	687b      	ldr	r3, [r7, #4]
 800654e:	681b      	ldr	r3, [r3, #0]
 8006550:	4a65      	ldr	r2, [pc, #404]	@ (80066e8 <HAL_DMA_Abort+0x240>)
 8006552:	4293      	cmp	r3, r2
 8006554:	d013      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006556:	687b      	ldr	r3, [r7, #4]
 8006558:	681b      	ldr	r3, [r3, #0]
 800655a:	4a64      	ldr	r2, [pc, #400]	@ (80066ec <HAL_DMA_Abort+0x244>)
 800655c:	4293      	cmp	r3, r2
 800655e:	d00e      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006560:	687b      	ldr	r3, [r7, #4]
 8006562:	681b      	ldr	r3, [r3, #0]
 8006564:	4a62      	ldr	r2, [pc, #392]	@ (80066f0 <HAL_DMA_Abort+0x248>)
 8006566:	4293      	cmp	r3, r2
 8006568:	d009      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 800656a:	687b      	ldr	r3, [r7, #4]
 800656c:	681b      	ldr	r3, [r3, #0]
 800656e:	4a61      	ldr	r2, [pc, #388]	@ (80066f4 <HAL_DMA_Abort+0x24c>)
 8006570:	4293      	cmp	r3, r2
 8006572:	d004      	beq.n	800657e <HAL_DMA_Abort+0xd6>
 8006574:	687b      	ldr	r3, [r7, #4]
 8006576:	681b      	ldr	r3, [r3, #0]
 8006578:	4a5f      	ldr	r2, [pc, #380]	@ (80066f8 <HAL_DMA_Abort+0x250>)
 800657a:	4293      	cmp	r3, r2
 800657c:	d101      	bne.n	8006582 <HAL_DMA_Abort+0xda>
 800657e:	2301      	movs	r3, #1
 8006580:	e000      	b.n	8006584 <HAL_DMA_Abort+0xdc>
 8006582:	2300      	movs	r3, #0
 8006584:	2b00      	cmp	r3, #0
 8006586:	d013      	beq.n	80065b0 <HAL_DMA_Abort+0x108>
    {
       /* Disable DMA All Interrupts  */
      ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
 8006588:	687b      	ldr	r3, [r7, #4]
 800658a:	681b      	ldr	r3, [r3, #0]
 800658c:	681a      	ldr	r2, [r3, #0]
 800658e:	687b      	ldr	r3, [r7, #4]
 8006590:	681b      	ldr	r3, [r3, #0]
 8006592:	f022 021e 	bic.w	r2, r2, #30
 8006596:	601a      	str	r2, [r3, #0]
      ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8006598:	687b      	ldr	r3, [r7, #4]
 800659a:	681b      	ldr	r3, [r3, #0]
 800659c:	695a      	ldr	r2, [r3, #20]
 800659e:	687b      	ldr	r3, [r7, #4]
 80065a0:	681b      	ldr	r3, [r3, #0]
 80065a2:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 80065a6:	615a      	str	r2, [r3, #20]

      enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef   *)hdma->Instance)->CR));
 80065a8:	687b      	ldr	r3, [r7, #4]
 80065aa:	681b      	ldr	r3, [r3, #0]
 80065ac:	617b      	str	r3, [r7, #20]
 80065ae:	e00a      	b.n	80065c6 <HAL_DMA_Abort+0x11e>
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 80065b0:	687b      	ldr	r3, [r7, #4]
 80065b2:	681b      	ldr	r3, [r3, #0]
 80065b4:	681a      	ldr	r2, [r3, #0]
 80065b6:	687b      	ldr	r3, [r7, #4]
 80065b8:	681b      	ldr	r3, [r3, #0]
 80065ba:	f022 020e 	bic.w	r2, r2, #14
 80065be:	601a      	str	r2, [r3, #0]

      enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR));
 80065c0:	687b      	ldr	r3, [r7, #4]
 80065c2:	681b      	ldr	r3, [r3, #0]
 80065c4:	617b      	str	r3, [r7, #20]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80065c6:	687b      	ldr	r3, [r7, #4]
 80065c8:	681b      	ldr	r3, [r3, #0]
 80065ca:	4a3c      	ldr	r2, [pc, #240]	@ (80066bc <HAL_DMA_Abort+0x214>)
 80065cc:	4293      	cmp	r3, r2
 80065ce:	d072      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80065d0:	687b      	ldr	r3, [r7, #4]
 80065d2:	681b      	ldr	r3, [r3, #0]
 80065d4:	4a3a      	ldr	r2, [pc, #232]	@ (80066c0 <HAL_DMA_Abort+0x218>)
 80065d6:	4293      	cmp	r3, r2
 80065d8:	d06d      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80065da:	687b      	ldr	r3, [r7, #4]
 80065dc:	681b      	ldr	r3, [r3, #0]
 80065de:	4a39      	ldr	r2, [pc, #228]	@ (80066c4 <HAL_DMA_Abort+0x21c>)
 80065e0:	4293      	cmp	r3, r2
 80065e2:	d068      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80065e4:	687b      	ldr	r3, [r7, #4]
 80065e6:	681b      	ldr	r3, [r3, #0]
 80065e8:	4a37      	ldr	r2, [pc, #220]	@ (80066c8 <HAL_DMA_Abort+0x220>)
 80065ea:	4293      	cmp	r3, r2
 80065ec:	d063      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80065ee:	687b      	ldr	r3, [r7, #4]
 80065f0:	681b      	ldr	r3, [r3, #0]
 80065f2:	4a36      	ldr	r2, [pc, #216]	@ (80066cc <HAL_DMA_Abort+0x224>)
 80065f4:	4293      	cmp	r3, r2
 80065f6:	d05e      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80065f8:	687b      	ldr	r3, [r7, #4]
 80065fa:	681b      	ldr	r3, [r3, #0]
 80065fc:	4a34      	ldr	r2, [pc, #208]	@ (80066d0 <HAL_DMA_Abort+0x228>)
 80065fe:	4293      	cmp	r3, r2
 8006600:	d059      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006602:	687b      	ldr	r3, [r7, #4]
 8006604:	681b      	ldr	r3, [r3, #0]
 8006606:	4a33      	ldr	r2, [pc, #204]	@ (80066d4 <HAL_DMA_Abort+0x22c>)
 8006608:	4293      	cmp	r3, r2
 800660a:	d054      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800660c:	687b      	ldr	r3, [r7, #4]
 800660e:	681b      	ldr	r3, [r3, #0]
 8006610:	4a31      	ldr	r2, [pc, #196]	@ (80066d8 <HAL_DMA_Abort+0x230>)
 8006612:	4293      	cmp	r3, r2
 8006614:	d04f      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006616:	687b      	ldr	r3, [r7, #4]
 8006618:	681b      	ldr	r3, [r3, #0]
 800661a:	4a30      	ldr	r2, [pc, #192]	@ (80066dc <HAL_DMA_Abort+0x234>)
 800661c:	4293      	cmp	r3, r2
 800661e:	d04a      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006620:	687b      	ldr	r3, [r7, #4]
 8006622:	681b      	ldr	r3, [r3, #0]
 8006624:	4a2e      	ldr	r2, [pc, #184]	@ (80066e0 <HAL_DMA_Abort+0x238>)
 8006626:	4293      	cmp	r3, r2
 8006628:	d045      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800662a:	687b      	ldr	r3, [r7, #4]
 800662c:	681b      	ldr	r3, [r3, #0]
 800662e:	4a2d      	ldr	r2, [pc, #180]	@ (80066e4 <HAL_DMA_Abort+0x23c>)
 8006630:	4293      	cmp	r3, r2
 8006632:	d040      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006634:	687b      	ldr	r3, [r7, #4]
 8006636:	681b      	ldr	r3, [r3, #0]
 8006638:	4a2b      	ldr	r2, [pc, #172]	@ (80066e8 <HAL_DMA_Abort+0x240>)
 800663a:	4293      	cmp	r3, r2
 800663c:	d03b      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800663e:	687b      	ldr	r3, [r7, #4]
 8006640:	681b      	ldr	r3, [r3, #0]
 8006642:	4a2a      	ldr	r2, [pc, #168]	@ (80066ec <HAL_DMA_Abort+0x244>)
 8006644:	4293      	cmp	r3, r2
 8006646:	d036      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006648:	687b      	ldr	r3, [r7, #4]
 800664a:	681b      	ldr	r3, [r3, #0]
 800664c:	4a28      	ldr	r2, [pc, #160]	@ (80066f0 <HAL_DMA_Abort+0x248>)
 800664e:	4293      	cmp	r3, r2
 8006650:	d031      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006652:	687b      	ldr	r3, [r7, #4]
 8006654:	681b      	ldr	r3, [r3, #0]
 8006656:	4a27      	ldr	r2, [pc, #156]	@ (80066f4 <HAL_DMA_Abort+0x24c>)
 8006658:	4293      	cmp	r3, r2
 800665a:	d02c      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800665c:	687b      	ldr	r3, [r7, #4]
 800665e:	681b      	ldr	r3, [r3, #0]
 8006660:	4a25      	ldr	r2, [pc, #148]	@ (80066f8 <HAL_DMA_Abort+0x250>)
 8006662:	4293      	cmp	r3, r2
 8006664:	d027      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006666:	687b      	ldr	r3, [r7, #4]
 8006668:	681b      	ldr	r3, [r3, #0]
 800666a:	4a24      	ldr	r2, [pc, #144]	@ (80066fc <HAL_DMA_Abort+0x254>)
 800666c:	4293      	cmp	r3, r2
 800666e:	d022      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006670:	687b      	ldr	r3, [r7, #4]
 8006672:	681b      	ldr	r3, [r3, #0]
 8006674:	4a22      	ldr	r2, [pc, #136]	@ (8006700 <HAL_DMA_Abort+0x258>)
 8006676:	4293      	cmp	r3, r2
 8006678:	d01d      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800667a:	687b      	ldr	r3, [r7, #4]
 800667c:	681b      	ldr	r3, [r3, #0]
 800667e:	4a21      	ldr	r2, [pc, #132]	@ (8006704 <HAL_DMA_Abort+0x25c>)
 8006680:	4293      	cmp	r3, r2
 8006682:	d018      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006684:	687b      	ldr	r3, [r7, #4]
 8006686:	681b      	ldr	r3, [r3, #0]
 8006688:	4a1f      	ldr	r2, [pc, #124]	@ (8006708 <HAL_DMA_Abort+0x260>)
 800668a:	4293      	cmp	r3, r2
 800668c:	d013      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 800668e:	687b      	ldr	r3, [r7, #4]
 8006690:	681b      	ldr	r3, [r3, #0]
 8006692:	4a1e      	ldr	r2, [pc, #120]	@ (800670c <HAL_DMA_Abort+0x264>)
 8006694:	4293      	cmp	r3, r2
 8006696:	d00e      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 8006698:	687b      	ldr	r3, [r7, #4]
 800669a:	681b      	ldr	r3, [r3, #0]
 800669c:	4a1c      	ldr	r2, [pc, #112]	@ (8006710 <HAL_DMA_Abort+0x268>)
 800669e:	4293      	cmp	r3, r2
 80066a0:	d009      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80066a2:	687b      	ldr	r3, [r7, #4]
 80066a4:	681b      	ldr	r3, [r3, #0]
 80066a6:	4a1b      	ldr	r2, [pc, #108]	@ (8006714 <HAL_DMA_Abort+0x26c>)
 80066a8:	4293      	cmp	r3, r2
 80066aa:	d004      	beq.n	80066b6 <HAL_DMA_Abort+0x20e>
 80066ac:	687b      	ldr	r3, [r7, #4]
 80066ae:	681b      	ldr	r3, [r3, #0]
 80066b0:	4a19      	ldr	r2, [pc, #100]	@ (8006718 <HAL_DMA_Abort+0x270>)
 80066b2:	4293      	cmp	r3, r2
 80066b4:	d132      	bne.n	800671c <HAL_DMA_Abort+0x274>
 80066b6:	2301      	movs	r3, #1
 80066b8:	e031      	b.n	800671e <HAL_DMA_Abort+0x276>
 80066ba:	bf00      	nop
 80066bc:	40020010 	.word	0x40020010
 80066c0:	40020028 	.word	0x40020028
 80066c4:	40020040 	.word	0x40020040
 80066c8:	40020058 	.word	0x40020058
 80066cc:	40020070 	.word	0x40020070
 80066d0:	40020088 	.word	0x40020088
 80066d4:	400200a0 	.word	0x400200a0
 80066d8:	400200b8 	.word	0x400200b8
 80066dc:	40020410 	.word	0x40020410
 80066e0:	40020428 	.word	0x40020428
 80066e4:	40020440 	.word	0x40020440
 80066e8:	40020458 	.word	0x40020458
 80066ec:	40020470 	.word	0x40020470
 80066f0:	40020488 	.word	0x40020488
 80066f4:	400204a0 	.word	0x400204a0
 80066f8:	400204b8 	.word	0x400204b8
 80066fc:	58025408 	.word	0x58025408
 8006700:	5802541c 	.word	0x5802541c
 8006704:	58025430 	.word	0x58025430
 8006708:	58025444 	.word	0x58025444
 800670c:	58025458 	.word	0x58025458
 8006710:	5802546c 	.word	0x5802546c
 8006714:	58025480 	.word	0x58025480
 8006718:	58025494 	.word	0x58025494
 800671c:	2300      	movs	r3, #0
 800671e:	2b00      	cmp	r3, #0
 8006720:	d007      	beq.n	8006732 <HAL_DMA_Abort+0x28a>
    {
      /* disable the DMAMUX sync overrun IT */
      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8006722:	687b      	ldr	r3, [r7, #4]
 8006724:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006726:	681a      	ldr	r2, [r3, #0]
 8006728:	687b      	ldr	r3, [r7, #4]
 800672a:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800672c:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006730:	601a      	str	r2, [r3, #0]
    }

    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 8006732:	687b      	ldr	r3, [r7, #4]
 8006734:	681b      	ldr	r3, [r3, #0]
 8006736:	4a6d      	ldr	r2, [pc, #436]	@ (80068ec <HAL_DMA_Abort+0x444>)
 8006738:	4293      	cmp	r3, r2
 800673a:	d04a      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 800673c:	687b      	ldr	r3, [r7, #4]
 800673e:	681b      	ldr	r3, [r3, #0]
 8006740:	4a6b      	ldr	r2, [pc, #428]	@ (80068f0 <HAL_DMA_Abort+0x448>)
 8006742:	4293      	cmp	r3, r2
 8006744:	d045      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006746:	687b      	ldr	r3, [r7, #4]
 8006748:	681b      	ldr	r3, [r3, #0]
 800674a:	4a6a      	ldr	r2, [pc, #424]	@ (80068f4 <HAL_DMA_Abort+0x44c>)
 800674c:	4293      	cmp	r3, r2
 800674e:	d040      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006750:	687b      	ldr	r3, [r7, #4]
 8006752:	681b      	ldr	r3, [r3, #0]
 8006754:	4a68      	ldr	r2, [pc, #416]	@ (80068f8 <HAL_DMA_Abort+0x450>)
 8006756:	4293      	cmp	r3, r2
 8006758:	d03b      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 800675a:	687b      	ldr	r3, [r7, #4]
 800675c:	681b      	ldr	r3, [r3, #0]
 800675e:	4a67      	ldr	r2, [pc, #412]	@ (80068fc <HAL_DMA_Abort+0x454>)
 8006760:	4293      	cmp	r3, r2
 8006762:	d036      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006764:	687b      	ldr	r3, [r7, #4]
 8006766:	681b      	ldr	r3, [r3, #0]
 8006768:	4a65      	ldr	r2, [pc, #404]	@ (8006900 <HAL_DMA_Abort+0x458>)
 800676a:	4293      	cmp	r3, r2
 800676c:	d031      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 800676e:	687b      	ldr	r3, [r7, #4]
 8006770:	681b      	ldr	r3, [r3, #0]
 8006772:	4a64      	ldr	r2, [pc, #400]	@ (8006904 <HAL_DMA_Abort+0x45c>)
 8006774:	4293      	cmp	r3, r2
 8006776:	d02c      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006778:	687b      	ldr	r3, [r7, #4]
 800677a:	681b      	ldr	r3, [r3, #0]
 800677c:	4a62      	ldr	r2, [pc, #392]	@ (8006908 <HAL_DMA_Abort+0x460>)
 800677e:	4293      	cmp	r3, r2
 8006780:	d027      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006782:	687b      	ldr	r3, [r7, #4]
 8006784:	681b      	ldr	r3, [r3, #0]
 8006786:	4a61      	ldr	r2, [pc, #388]	@ (800690c <HAL_DMA_Abort+0x464>)
 8006788:	4293      	cmp	r3, r2
 800678a:	d022      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 800678c:	687b      	ldr	r3, [r7, #4]
 800678e:	681b      	ldr	r3, [r3, #0]
 8006790:	4a5f      	ldr	r2, [pc, #380]	@ (8006910 <HAL_DMA_Abort+0x468>)
 8006792:	4293      	cmp	r3, r2
 8006794:	d01d      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 8006796:	687b      	ldr	r3, [r7, #4]
 8006798:	681b      	ldr	r3, [r3, #0]
 800679a:	4a5e      	ldr	r2, [pc, #376]	@ (8006914 <HAL_DMA_Abort+0x46c>)
 800679c:	4293      	cmp	r3, r2
 800679e:	d018      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 80067a0:	687b      	ldr	r3, [r7, #4]
 80067a2:	681b      	ldr	r3, [r3, #0]
 80067a4:	4a5c      	ldr	r2, [pc, #368]	@ (8006918 <HAL_DMA_Abort+0x470>)
 80067a6:	4293      	cmp	r3, r2
 80067a8:	d013      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 80067aa:	687b      	ldr	r3, [r7, #4]
 80067ac:	681b      	ldr	r3, [r3, #0]
 80067ae:	4a5b      	ldr	r2, [pc, #364]	@ (800691c <HAL_DMA_Abort+0x474>)
 80067b0:	4293      	cmp	r3, r2
 80067b2:	d00e      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 80067b4:	687b      	ldr	r3, [r7, #4]
 80067b6:	681b      	ldr	r3, [r3, #0]
 80067b8:	4a59      	ldr	r2, [pc, #356]	@ (8006920 <HAL_DMA_Abort+0x478>)
 80067ba:	4293      	cmp	r3, r2
 80067bc:	d009      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 80067be:	687b      	ldr	r3, [r7, #4]
 80067c0:	681b      	ldr	r3, [r3, #0]
 80067c2:	4a58      	ldr	r2, [pc, #352]	@ (8006924 <HAL_DMA_Abort+0x47c>)
 80067c4:	4293      	cmp	r3, r2
 80067c6:	d004      	beq.n	80067d2 <HAL_DMA_Abort+0x32a>
 80067c8:	687b      	ldr	r3, [r7, #4]
 80067ca:	681b      	ldr	r3, [r3, #0]
 80067cc:	4a56      	ldr	r2, [pc, #344]	@ (8006928 <HAL_DMA_Abort+0x480>)
 80067ce:	4293      	cmp	r3, r2
 80067d0:	d108      	bne.n	80067e4 <HAL_DMA_Abort+0x33c>
 80067d2:	687b      	ldr	r3, [r7, #4]
 80067d4:	681b      	ldr	r3, [r3, #0]
 80067d6:	681a      	ldr	r2, [r3, #0]
 80067d8:	687b      	ldr	r3, [r7, #4]
 80067da:	681b      	ldr	r3, [r3, #0]
 80067dc:	f022 0201 	bic.w	r2, r2, #1
 80067e0:	601a      	str	r2, [r3, #0]
 80067e2:	e007      	b.n	80067f4 <HAL_DMA_Abort+0x34c>
 80067e4:	687b      	ldr	r3, [r7, #4]
 80067e6:	681b      	ldr	r3, [r3, #0]
 80067e8:	681a      	ldr	r2, [r3, #0]
 80067ea:	687b      	ldr	r3, [r7, #4]
 80067ec:	681b      	ldr	r3, [r3, #0]
 80067ee:	f022 0201 	bic.w	r2, r2, #1
 80067f2:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 80067f4:	e013      	b.n	800681e <HAL_DMA_Abort+0x376>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 80067f6:	f7fe ff4d 	bl	8005694 <HAL_GetTick>
 80067fa:	4602      	mov	r2, r0
 80067fc:	693b      	ldr	r3, [r7, #16]
 80067fe:	1ad3      	subs	r3, r2, r3
 8006800:	2b05      	cmp	r3, #5
 8006802:	d90c      	bls.n	800681e <HAL_DMA_Abort+0x376>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8006804:	687b      	ldr	r3, [r7, #4]
 8006806:	2220      	movs	r2, #32
 8006808:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 800680a:	687b      	ldr	r3, [r7, #4]
 800680c:	2203      	movs	r2, #3
 800680e:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8006812:	687b      	ldr	r3, [r7, #4]
 8006814:	2200      	movs	r2, #0
 8006816:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

        return HAL_ERROR;
 800681a:	2301      	movs	r3, #1
 800681c:	e12d      	b.n	8006a7a <HAL_DMA_Abort+0x5d2>
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 800681e:	697b      	ldr	r3, [r7, #20]
 8006820:	681b      	ldr	r3, [r3, #0]
 8006822:	f003 0301 	and.w	r3, r3, #1
 8006826:	2b00      	cmp	r3, #0
 8006828:	d1e5      	bne.n	80067f6 <HAL_DMA_Abort+0x34e>
      }
    }

    /* Clear all interrupt flags at correct offset within the register */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 800682a:	687b      	ldr	r3, [r7, #4]
 800682c:	681b      	ldr	r3, [r3, #0]
 800682e:	4a2f      	ldr	r2, [pc, #188]	@ (80068ec <HAL_DMA_Abort+0x444>)
 8006830:	4293      	cmp	r3, r2
 8006832:	d04a      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006834:	687b      	ldr	r3, [r7, #4]
 8006836:	681b      	ldr	r3, [r3, #0]
 8006838:	4a2d      	ldr	r2, [pc, #180]	@ (80068f0 <HAL_DMA_Abort+0x448>)
 800683a:	4293      	cmp	r3, r2
 800683c:	d045      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 800683e:	687b      	ldr	r3, [r7, #4]
 8006840:	681b      	ldr	r3, [r3, #0]
 8006842:	4a2c      	ldr	r2, [pc, #176]	@ (80068f4 <HAL_DMA_Abort+0x44c>)
 8006844:	4293      	cmp	r3, r2
 8006846:	d040      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006848:	687b      	ldr	r3, [r7, #4]
 800684a:	681b      	ldr	r3, [r3, #0]
 800684c:	4a2a      	ldr	r2, [pc, #168]	@ (80068f8 <HAL_DMA_Abort+0x450>)
 800684e:	4293      	cmp	r3, r2
 8006850:	d03b      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006852:	687b      	ldr	r3, [r7, #4]
 8006854:	681b      	ldr	r3, [r3, #0]
 8006856:	4a29      	ldr	r2, [pc, #164]	@ (80068fc <HAL_DMA_Abort+0x454>)
 8006858:	4293      	cmp	r3, r2
 800685a:	d036      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 800685c:	687b      	ldr	r3, [r7, #4]
 800685e:	681b      	ldr	r3, [r3, #0]
 8006860:	4a27      	ldr	r2, [pc, #156]	@ (8006900 <HAL_DMA_Abort+0x458>)
 8006862:	4293      	cmp	r3, r2
 8006864:	d031      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006866:	687b      	ldr	r3, [r7, #4]
 8006868:	681b      	ldr	r3, [r3, #0]
 800686a:	4a26      	ldr	r2, [pc, #152]	@ (8006904 <HAL_DMA_Abort+0x45c>)
 800686c:	4293      	cmp	r3, r2
 800686e:	d02c      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006870:	687b      	ldr	r3, [r7, #4]
 8006872:	681b      	ldr	r3, [r3, #0]
 8006874:	4a24      	ldr	r2, [pc, #144]	@ (8006908 <HAL_DMA_Abort+0x460>)
 8006876:	4293      	cmp	r3, r2
 8006878:	d027      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 800687a:	687b      	ldr	r3, [r7, #4]
 800687c:	681b      	ldr	r3, [r3, #0]
 800687e:	4a23      	ldr	r2, [pc, #140]	@ (800690c <HAL_DMA_Abort+0x464>)
 8006880:	4293      	cmp	r3, r2
 8006882:	d022      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006884:	687b      	ldr	r3, [r7, #4]
 8006886:	681b      	ldr	r3, [r3, #0]
 8006888:	4a21      	ldr	r2, [pc, #132]	@ (8006910 <HAL_DMA_Abort+0x468>)
 800688a:	4293      	cmp	r3, r2
 800688c:	d01d      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 800688e:	687b      	ldr	r3, [r7, #4]
 8006890:	681b      	ldr	r3, [r3, #0]
 8006892:	4a20      	ldr	r2, [pc, #128]	@ (8006914 <HAL_DMA_Abort+0x46c>)
 8006894:	4293      	cmp	r3, r2
 8006896:	d018      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 8006898:	687b      	ldr	r3, [r7, #4]
 800689a:	681b      	ldr	r3, [r3, #0]
 800689c:	4a1e      	ldr	r2, [pc, #120]	@ (8006918 <HAL_DMA_Abort+0x470>)
 800689e:	4293      	cmp	r3, r2
 80068a0:	d013      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 80068a2:	687b      	ldr	r3, [r7, #4]
 80068a4:	681b      	ldr	r3, [r3, #0]
 80068a6:	4a1d      	ldr	r2, [pc, #116]	@ (800691c <HAL_DMA_Abort+0x474>)
 80068a8:	4293      	cmp	r3, r2
 80068aa:	d00e      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 80068ac:	687b      	ldr	r3, [r7, #4]
 80068ae:	681b      	ldr	r3, [r3, #0]
 80068b0:	4a1b      	ldr	r2, [pc, #108]	@ (8006920 <HAL_DMA_Abort+0x478>)
 80068b2:	4293      	cmp	r3, r2
 80068b4:	d009      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 80068b6:	687b      	ldr	r3, [r7, #4]
 80068b8:	681b      	ldr	r3, [r3, #0]
 80068ba:	4a1a      	ldr	r2, [pc, #104]	@ (8006924 <HAL_DMA_Abort+0x47c>)
 80068bc:	4293      	cmp	r3, r2
 80068be:	d004      	beq.n	80068ca <HAL_DMA_Abort+0x422>
 80068c0:	687b      	ldr	r3, [r7, #4]
 80068c2:	681b      	ldr	r3, [r3, #0]
 80068c4:	4a18      	ldr	r2, [pc, #96]	@ (8006928 <HAL_DMA_Abort+0x480>)
 80068c6:	4293      	cmp	r3, r2
 80068c8:	d101      	bne.n	80068ce <HAL_DMA_Abort+0x426>
 80068ca:	2301      	movs	r3, #1
 80068cc:	e000      	b.n	80068d0 <HAL_DMA_Abort+0x428>
 80068ce:	2300      	movs	r3, #0
 80068d0:	2b00      	cmp	r3, #0
 80068d2:	d02b      	beq.n	800692c <HAL_DMA_Abort+0x484>
    {
      regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 80068d4:	687b      	ldr	r3, [r7, #4]
 80068d6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80068d8:	60bb      	str	r3, [r7, #8]
      regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 80068da:	687b      	ldr	r3, [r7, #4]
 80068dc:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80068de:	f003 031f 	and.w	r3, r3, #31
 80068e2:	223f      	movs	r2, #63	@ 0x3f
 80068e4:	409a      	lsls	r2, r3
 80068e6:	68bb      	ldr	r3, [r7, #8]
 80068e8:	609a      	str	r2, [r3, #8]
 80068ea:	e02a      	b.n	8006942 <HAL_DMA_Abort+0x49a>
 80068ec:	40020010 	.word	0x40020010
 80068f0:	40020028 	.word	0x40020028
 80068f4:	40020040 	.word	0x40020040
 80068f8:	40020058 	.word	0x40020058
 80068fc:	40020070 	.word	0x40020070
 8006900:	40020088 	.word	0x40020088
 8006904:	400200a0 	.word	0x400200a0
 8006908:	400200b8 	.word	0x400200b8
 800690c:	40020410 	.word	0x40020410
 8006910:	40020428 	.word	0x40020428
 8006914:	40020440 	.word	0x40020440
 8006918:	40020458 	.word	0x40020458
 800691c:	40020470 	.word	0x40020470
 8006920:	40020488 	.word	0x40020488
 8006924:	400204a0 	.word	0x400204a0
 8006928:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 800692c:	687b      	ldr	r3, [r7, #4]
 800692e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006930:	60fb      	str	r3, [r7, #12]
      regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006932:	687b      	ldr	r3, [r7, #4]
 8006934:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006936:	f003 031f 	and.w	r3, r3, #31
 800693a:	2201      	movs	r2, #1
 800693c:	409a      	lsls	r2, r3
 800693e:	68fb      	ldr	r3, [r7, #12]
 8006940:	605a      	str	r2, [r3, #4]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006942:	687b      	ldr	r3, [r7, #4]
 8006944:	681b      	ldr	r3, [r3, #0]
 8006946:	4a4f      	ldr	r2, [pc, #316]	@ (8006a84 <HAL_DMA_Abort+0x5dc>)
 8006948:	4293      	cmp	r3, r2
 800694a:	d072      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 800694c:	687b      	ldr	r3, [r7, #4]
 800694e:	681b      	ldr	r3, [r3, #0]
 8006950:	4a4d      	ldr	r2, [pc, #308]	@ (8006a88 <HAL_DMA_Abort+0x5e0>)
 8006952:	4293      	cmp	r3, r2
 8006954:	d06d      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006956:	687b      	ldr	r3, [r7, #4]
 8006958:	681b      	ldr	r3, [r3, #0]
 800695a:	4a4c      	ldr	r2, [pc, #304]	@ (8006a8c <HAL_DMA_Abort+0x5e4>)
 800695c:	4293      	cmp	r3, r2
 800695e:	d068      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006960:	687b      	ldr	r3, [r7, #4]
 8006962:	681b      	ldr	r3, [r3, #0]
 8006964:	4a4a      	ldr	r2, [pc, #296]	@ (8006a90 <HAL_DMA_Abort+0x5e8>)
 8006966:	4293      	cmp	r3, r2
 8006968:	d063      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 800696a:	687b      	ldr	r3, [r7, #4]
 800696c:	681b      	ldr	r3, [r3, #0]
 800696e:	4a49      	ldr	r2, [pc, #292]	@ (8006a94 <HAL_DMA_Abort+0x5ec>)
 8006970:	4293      	cmp	r3, r2
 8006972:	d05e      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006974:	687b      	ldr	r3, [r7, #4]
 8006976:	681b      	ldr	r3, [r3, #0]
 8006978:	4a47      	ldr	r2, [pc, #284]	@ (8006a98 <HAL_DMA_Abort+0x5f0>)
 800697a:	4293      	cmp	r3, r2
 800697c:	d059      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 800697e:	687b      	ldr	r3, [r7, #4]
 8006980:	681b      	ldr	r3, [r3, #0]
 8006982:	4a46      	ldr	r2, [pc, #280]	@ (8006a9c <HAL_DMA_Abort+0x5f4>)
 8006984:	4293      	cmp	r3, r2
 8006986:	d054      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006988:	687b      	ldr	r3, [r7, #4]
 800698a:	681b      	ldr	r3, [r3, #0]
 800698c:	4a44      	ldr	r2, [pc, #272]	@ (8006aa0 <HAL_DMA_Abort+0x5f8>)
 800698e:	4293      	cmp	r3, r2
 8006990:	d04f      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006992:	687b      	ldr	r3, [r7, #4]
 8006994:	681b      	ldr	r3, [r3, #0]
 8006996:	4a43      	ldr	r2, [pc, #268]	@ (8006aa4 <HAL_DMA_Abort+0x5fc>)
 8006998:	4293      	cmp	r3, r2
 800699a:	d04a      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 800699c:	687b      	ldr	r3, [r7, #4]
 800699e:	681b      	ldr	r3, [r3, #0]
 80069a0:	4a41      	ldr	r2, [pc, #260]	@ (8006aa8 <HAL_DMA_Abort+0x600>)
 80069a2:	4293      	cmp	r3, r2
 80069a4:	d045      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069a6:	687b      	ldr	r3, [r7, #4]
 80069a8:	681b      	ldr	r3, [r3, #0]
 80069aa:	4a40      	ldr	r2, [pc, #256]	@ (8006aac <HAL_DMA_Abort+0x604>)
 80069ac:	4293      	cmp	r3, r2
 80069ae:	d040      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069b0:	687b      	ldr	r3, [r7, #4]
 80069b2:	681b      	ldr	r3, [r3, #0]
 80069b4:	4a3e      	ldr	r2, [pc, #248]	@ (8006ab0 <HAL_DMA_Abort+0x608>)
 80069b6:	4293      	cmp	r3, r2
 80069b8:	d03b      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069ba:	687b      	ldr	r3, [r7, #4]
 80069bc:	681b      	ldr	r3, [r3, #0]
 80069be:	4a3d      	ldr	r2, [pc, #244]	@ (8006ab4 <HAL_DMA_Abort+0x60c>)
 80069c0:	4293      	cmp	r3, r2
 80069c2:	d036      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069c4:	687b      	ldr	r3, [r7, #4]
 80069c6:	681b      	ldr	r3, [r3, #0]
 80069c8:	4a3b      	ldr	r2, [pc, #236]	@ (8006ab8 <HAL_DMA_Abort+0x610>)
 80069ca:	4293      	cmp	r3, r2
 80069cc:	d031      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069ce:	687b      	ldr	r3, [r7, #4]
 80069d0:	681b      	ldr	r3, [r3, #0]
 80069d2:	4a3a      	ldr	r2, [pc, #232]	@ (8006abc <HAL_DMA_Abort+0x614>)
 80069d4:	4293      	cmp	r3, r2
 80069d6:	d02c      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069d8:	687b      	ldr	r3, [r7, #4]
 80069da:	681b      	ldr	r3, [r3, #0]
 80069dc:	4a38      	ldr	r2, [pc, #224]	@ (8006ac0 <HAL_DMA_Abort+0x618>)
 80069de:	4293      	cmp	r3, r2
 80069e0:	d027      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069e2:	687b      	ldr	r3, [r7, #4]
 80069e4:	681b      	ldr	r3, [r3, #0]
 80069e6:	4a37      	ldr	r2, [pc, #220]	@ (8006ac4 <HAL_DMA_Abort+0x61c>)
 80069e8:	4293      	cmp	r3, r2
 80069ea:	d022      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069ec:	687b      	ldr	r3, [r7, #4]
 80069ee:	681b      	ldr	r3, [r3, #0]
 80069f0:	4a35      	ldr	r2, [pc, #212]	@ (8006ac8 <HAL_DMA_Abort+0x620>)
 80069f2:	4293      	cmp	r3, r2
 80069f4:	d01d      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 80069f6:	687b      	ldr	r3, [r7, #4]
 80069f8:	681b      	ldr	r3, [r3, #0]
 80069fa:	4a34      	ldr	r2, [pc, #208]	@ (8006acc <HAL_DMA_Abort+0x624>)
 80069fc:	4293      	cmp	r3, r2
 80069fe:	d018      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006a00:	687b      	ldr	r3, [r7, #4]
 8006a02:	681b      	ldr	r3, [r3, #0]
 8006a04:	4a32      	ldr	r2, [pc, #200]	@ (8006ad0 <HAL_DMA_Abort+0x628>)
 8006a06:	4293      	cmp	r3, r2
 8006a08:	d013      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006a0a:	687b      	ldr	r3, [r7, #4]
 8006a0c:	681b      	ldr	r3, [r3, #0]
 8006a0e:	4a31      	ldr	r2, [pc, #196]	@ (8006ad4 <HAL_DMA_Abort+0x62c>)
 8006a10:	4293      	cmp	r3, r2
 8006a12:	d00e      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006a14:	687b      	ldr	r3, [r7, #4]
 8006a16:	681b      	ldr	r3, [r3, #0]
 8006a18:	4a2f      	ldr	r2, [pc, #188]	@ (8006ad8 <HAL_DMA_Abort+0x630>)
 8006a1a:	4293      	cmp	r3, r2
 8006a1c:	d009      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006a1e:	687b      	ldr	r3, [r7, #4]
 8006a20:	681b      	ldr	r3, [r3, #0]
 8006a22:	4a2e      	ldr	r2, [pc, #184]	@ (8006adc <HAL_DMA_Abort+0x634>)
 8006a24:	4293      	cmp	r3, r2
 8006a26:	d004      	beq.n	8006a32 <HAL_DMA_Abort+0x58a>
 8006a28:	687b      	ldr	r3, [r7, #4]
 8006a2a:	681b      	ldr	r3, [r3, #0]
 8006a2c:	4a2c      	ldr	r2, [pc, #176]	@ (8006ae0 <HAL_DMA_Abort+0x638>)
 8006a2e:	4293      	cmp	r3, r2
 8006a30:	d101      	bne.n	8006a36 <HAL_DMA_Abort+0x58e>
 8006a32:	2301      	movs	r3, #1
 8006a34:	e000      	b.n	8006a38 <HAL_DMA_Abort+0x590>
 8006a36:	2300      	movs	r3, #0
 8006a38:	2b00      	cmp	r3, #0
 8006a3a:	d015      	beq.n	8006a68 <HAL_DMA_Abort+0x5c0>
    {
      /* Clear the DMAMUX synchro overrun flag */
      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006a3c:	687b      	ldr	r3, [r7, #4]
 8006a3e:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006a40:	687a      	ldr	r2, [r7, #4]
 8006a42:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8006a44:	605a      	str	r2, [r3, #4]

      if(hdma->DMAmuxRequestGen != 0U)
 8006a46:	687b      	ldr	r3, [r7, #4]
 8006a48:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006a4a:	2b00      	cmp	r3, #0
 8006a4c:	d00c      	beq.n	8006a68 <HAL_DMA_Abort+0x5c0>
      {
        /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
        /* disable the request gen overrun IT */
        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8006a4e:	687b      	ldr	r3, [r7, #4]
 8006a50:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006a52:	681a      	ldr	r2, [r3, #0]
 8006a54:	687b      	ldr	r3, [r7, #4]
 8006a56:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006a58:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006a5c:	601a      	str	r2, [r3, #0]

        /* Clear the DMAMUX request generator overrun flag */
        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006a5e:	687b      	ldr	r3, [r7, #4]
 8006a60:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006a62:	687a      	ldr	r2, [r7, #4]
 8006a64:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006a66:	605a      	str	r2, [r3, #4]
      }
    }

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8006a68:	687b      	ldr	r3, [r7, #4]
 8006a6a:	2201      	movs	r2, #1
 8006a6c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8006a70:	687b      	ldr	r3, [r7, #4]
 8006a72:	2200      	movs	r2, #0
 8006a74:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  }

  return HAL_OK;
 8006a78:	2300      	movs	r3, #0
}
 8006a7a:	4618      	mov	r0, r3
 8006a7c:	3718      	adds	r7, #24
 8006a7e:	46bd      	mov	sp, r7
 8006a80:	bd80      	pop	{r7, pc}
 8006a82:	bf00      	nop
 8006a84:	40020010 	.word	0x40020010
 8006a88:	40020028 	.word	0x40020028
 8006a8c:	40020040 	.word	0x40020040
 8006a90:	40020058 	.word	0x40020058
 8006a94:	40020070 	.word	0x40020070
 8006a98:	40020088 	.word	0x40020088
 8006a9c:	400200a0 	.word	0x400200a0
 8006aa0:	400200b8 	.word	0x400200b8
 8006aa4:	40020410 	.word	0x40020410
 8006aa8:	40020428 	.word	0x40020428
 8006aac:	40020440 	.word	0x40020440
 8006ab0:	40020458 	.word	0x40020458
 8006ab4:	40020470 	.word	0x40020470
 8006ab8:	40020488 	.word	0x40020488
 8006abc:	400204a0 	.word	0x400204a0
 8006ac0:	400204b8 	.word	0x400204b8
 8006ac4:	58025408 	.word	0x58025408
 8006ac8:	5802541c 	.word	0x5802541c
 8006acc:	58025430 	.word	0x58025430
 8006ad0:	58025444 	.word	0x58025444
 8006ad4:	58025458 	.word	0x58025458
 8006ad8:	5802546c 	.word	0x5802546c
 8006adc:	58025480 	.word	0x58025480
 8006ae0:	58025494 	.word	0x58025494

08006ae4 <HAL_DMA_Abort_IT>:
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
 8006ae4:	b580      	push	{r7, lr}
 8006ae6:	b084      	sub	sp, #16
 8006ae8:	af00      	add	r7, sp, #0
 8006aea:	6078      	str	r0, [r7, #4]
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8006aec:	687b      	ldr	r3, [r7, #4]
 8006aee:	2b00      	cmp	r3, #0
 8006af0:	d101      	bne.n	8006af6 <HAL_DMA_Abort_IT+0x12>
  {
    return HAL_ERROR;
 8006af2:	2301      	movs	r3, #1
 8006af4:	e237      	b.n	8006f66 <HAL_DMA_Abort_IT+0x482>
  }

  if(hdma->State != HAL_DMA_STATE_BUSY)
 8006af6:	687b      	ldr	r3, [r7, #4]
 8006af8:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8006afc:	b2db      	uxtb	r3, r3
 8006afe:	2b02      	cmp	r3, #2
 8006b00:	d004      	beq.n	8006b0c <HAL_DMA_Abort_IT+0x28>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8006b02:	687b      	ldr	r3, [r7, #4]
 8006b04:	2280      	movs	r2, #128	@ 0x80
 8006b06:	655a      	str	r2, [r3, #84]	@ 0x54
    return HAL_ERROR;
 8006b08:	2301      	movs	r3, #1
 8006b0a:	e22c      	b.n	8006f66 <HAL_DMA_Abort_IT+0x482>
  }
  else
  {
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8006b0c:	687b      	ldr	r3, [r7, #4]
 8006b0e:	681b      	ldr	r3, [r3, #0]
 8006b10:	4a5c      	ldr	r2, [pc, #368]	@ (8006c84 <HAL_DMA_Abort_IT+0x1a0>)
 8006b12:	4293      	cmp	r3, r2
 8006b14:	d04a      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b16:	687b      	ldr	r3, [r7, #4]
 8006b18:	681b      	ldr	r3, [r3, #0]
 8006b1a:	4a5b      	ldr	r2, [pc, #364]	@ (8006c88 <HAL_DMA_Abort_IT+0x1a4>)
 8006b1c:	4293      	cmp	r3, r2
 8006b1e:	d045      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b20:	687b      	ldr	r3, [r7, #4]
 8006b22:	681b      	ldr	r3, [r3, #0]
 8006b24:	4a59      	ldr	r2, [pc, #356]	@ (8006c8c <HAL_DMA_Abort_IT+0x1a8>)
 8006b26:	4293      	cmp	r3, r2
 8006b28:	d040      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b2a:	687b      	ldr	r3, [r7, #4]
 8006b2c:	681b      	ldr	r3, [r3, #0]
 8006b2e:	4a58      	ldr	r2, [pc, #352]	@ (8006c90 <HAL_DMA_Abort_IT+0x1ac>)
 8006b30:	4293      	cmp	r3, r2
 8006b32:	d03b      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b34:	687b      	ldr	r3, [r7, #4]
 8006b36:	681b      	ldr	r3, [r3, #0]
 8006b38:	4a56      	ldr	r2, [pc, #344]	@ (8006c94 <HAL_DMA_Abort_IT+0x1b0>)
 8006b3a:	4293      	cmp	r3, r2
 8006b3c:	d036      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b3e:	687b      	ldr	r3, [r7, #4]
 8006b40:	681b      	ldr	r3, [r3, #0]
 8006b42:	4a55      	ldr	r2, [pc, #340]	@ (8006c98 <HAL_DMA_Abort_IT+0x1b4>)
 8006b44:	4293      	cmp	r3, r2
 8006b46:	d031      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b48:	687b      	ldr	r3, [r7, #4]
 8006b4a:	681b      	ldr	r3, [r3, #0]
 8006b4c:	4a53      	ldr	r2, [pc, #332]	@ (8006c9c <HAL_DMA_Abort_IT+0x1b8>)
 8006b4e:	4293      	cmp	r3, r2
 8006b50:	d02c      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b52:	687b      	ldr	r3, [r7, #4]
 8006b54:	681b      	ldr	r3, [r3, #0]
 8006b56:	4a52      	ldr	r2, [pc, #328]	@ (8006ca0 <HAL_DMA_Abort_IT+0x1bc>)
 8006b58:	4293      	cmp	r3, r2
 8006b5a:	d027      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b5c:	687b      	ldr	r3, [r7, #4]
 8006b5e:	681b      	ldr	r3, [r3, #0]
 8006b60:	4a50      	ldr	r2, [pc, #320]	@ (8006ca4 <HAL_DMA_Abort_IT+0x1c0>)
 8006b62:	4293      	cmp	r3, r2
 8006b64:	d022      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b66:	687b      	ldr	r3, [r7, #4]
 8006b68:	681b      	ldr	r3, [r3, #0]
 8006b6a:	4a4f      	ldr	r2, [pc, #316]	@ (8006ca8 <HAL_DMA_Abort_IT+0x1c4>)
 8006b6c:	4293      	cmp	r3, r2
 8006b6e:	d01d      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b70:	687b      	ldr	r3, [r7, #4]
 8006b72:	681b      	ldr	r3, [r3, #0]
 8006b74:	4a4d      	ldr	r2, [pc, #308]	@ (8006cac <HAL_DMA_Abort_IT+0x1c8>)
 8006b76:	4293      	cmp	r3, r2
 8006b78:	d018      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b7a:	687b      	ldr	r3, [r7, #4]
 8006b7c:	681b      	ldr	r3, [r3, #0]
 8006b7e:	4a4c      	ldr	r2, [pc, #304]	@ (8006cb0 <HAL_DMA_Abort_IT+0x1cc>)
 8006b80:	4293      	cmp	r3, r2
 8006b82:	d013      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b84:	687b      	ldr	r3, [r7, #4]
 8006b86:	681b      	ldr	r3, [r3, #0]
 8006b88:	4a4a      	ldr	r2, [pc, #296]	@ (8006cb4 <HAL_DMA_Abort_IT+0x1d0>)
 8006b8a:	4293      	cmp	r3, r2
 8006b8c:	d00e      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b8e:	687b      	ldr	r3, [r7, #4]
 8006b90:	681b      	ldr	r3, [r3, #0]
 8006b92:	4a49      	ldr	r2, [pc, #292]	@ (8006cb8 <HAL_DMA_Abort_IT+0x1d4>)
 8006b94:	4293      	cmp	r3, r2
 8006b96:	d009      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006b98:	687b      	ldr	r3, [r7, #4]
 8006b9a:	681b      	ldr	r3, [r3, #0]
 8006b9c:	4a47      	ldr	r2, [pc, #284]	@ (8006cbc <HAL_DMA_Abort_IT+0x1d8>)
 8006b9e:	4293      	cmp	r3, r2
 8006ba0:	d004      	beq.n	8006bac <HAL_DMA_Abort_IT+0xc8>
 8006ba2:	687b      	ldr	r3, [r7, #4]
 8006ba4:	681b      	ldr	r3, [r3, #0]
 8006ba6:	4a46      	ldr	r2, [pc, #280]	@ (8006cc0 <HAL_DMA_Abort_IT+0x1dc>)
 8006ba8:	4293      	cmp	r3, r2
 8006baa:	d101      	bne.n	8006bb0 <HAL_DMA_Abort_IT+0xcc>
 8006bac:	2301      	movs	r3, #1
 8006bae:	e000      	b.n	8006bb2 <HAL_DMA_Abort_IT+0xce>
 8006bb0:	2300      	movs	r3, #0
 8006bb2:	2b00      	cmp	r3, #0
 8006bb4:	f000 8086 	beq.w	8006cc4 <HAL_DMA_Abort_IT+0x1e0>
    {
      /* Set Abort State  */
      hdma->State = HAL_DMA_STATE_ABORT;
 8006bb8:	687b      	ldr	r3, [r7, #4]
 8006bba:	2204      	movs	r2, #4
 8006bbc:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Disable the stream */
      __HAL_DMA_DISABLE(hdma);
 8006bc0:	687b      	ldr	r3, [r7, #4]
 8006bc2:	681b      	ldr	r3, [r3, #0]
 8006bc4:	4a2f      	ldr	r2, [pc, #188]	@ (8006c84 <HAL_DMA_Abort_IT+0x1a0>)
 8006bc6:	4293      	cmp	r3, r2
 8006bc8:	d04a      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006bca:	687b      	ldr	r3, [r7, #4]
 8006bcc:	681b      	ldr	r3, [r3, #0]
 8006bce:	4a2e      	ldr	r2, [pc, #184]	@ (8006c88 <HAL_DMA_Abort_IT+0x1a4>)
 8006bd0:	4293      	cmp	r3, r2
 8006bd2:	d045      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006bd4:	687b      	ldr	r3, [r7, #4]
 8006bd6:	681b      	ldr	r3, [r3, #0]
 8006bd8:	4a2c      	ldr	r2, [pc, #176]	@ (8006c8c <HAL_DMA_Abort_IT+0x1a8>)
 8006bda:	4293      	cmp	r3, r2
 8006bdc:	d040      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006bde:	687b      	ldr	r3, [r7, #4]
 8006be0:	681b      	ldr	r3, [r3, #0]
 8006be2:	4a2b      	ldr	r2, [pc, #172]	@ (8006c90 <HAL_DMA_Abort_IT+0x1ac>)
 8006be4:	4293      	cmp	r3, r2
 8006be6:	d03b      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006be8:	687b      	ldr	r3, [r7, #4]
 8006bea:	681b      	ldr	r3, [r3, #0]
 8006bec:	4a29      	ldr	r2, [pc, #164]	@ (8006c94 <HAL_DMA_Abort_IT+0x1b0>)
 8006bee:	4293      	cmp	r3, r2
 8006bf0:	d036      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006bf2:	687b      	ldr	r3, [r7, #4]
 8006bf4:	681b      	ldr	r3, [r3, #0]
 8006bf6:	4a28      	ldr	r2, [pc, #160]	@ (8006c98 <HAL_DMA_Abort_IT+0x1b4>)
 8006bf8:	4293      	cmp	r3, r2
 8006bfa:	d031      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006bfc:	687b      	ldr	r3, [r7, #4]
 8006bfe:	681b      	ldr	r3, [r3, #0]
 8006c00:	4a26      	ldr	r2, [pc, #152]	@ (8006c9c <HAL_DMA_Abort_IT+0x1b8>)
 8006c02:	4293      	cmp	r3, r2
 8006c04:	d02c      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c06:	687b      	ldr	r3, [r7, #4]
 8006c08:	681b      	ldr	r3, [r3, #0]
 8006c0a:	4a25      	ldr	r2, [pc, #148]	@ (8006ca0 <HAL_DMA_Abort_IT+0x1bc>)
 8006c0c:	4293      	cmp	r3, r2
 8006c0e:	d027      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c10:	687b      	ldr	r3, [r7, #4]
 8006c12:	681b      	ldr	r3, [r3, #0]
 8006c14:	4a23      	ldr	r2, [pc, #140]	@ (8006ca4 <HAL_DMA_Abort_IT+0x1c0>)
 8006c16:	4293      	cmp	r3, r2
 8006c18:	d022      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c1a:	687b      	ldr	r3, [r7, #4]
 8006c1c:	681b      	ldr	r3, [r3, #0]
 8006c1e:	4a22      	ldr	r2, [pc, #136]	@ (8006ca8 <HAL_DMA_Abort_IT+0x1c4>)
 8006c20:	4293      	cmp	r3, r2
 8006c22:	d01d      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c24:	687b      	ldr	r3, [r7, #4]
 8006c26:	681b      	ldr	r3, [r3, #0]
 8006c28:	4a20      	ldr	r2, [pc, #128]	@ (8006cac <HAL_DMA_Abort_IT+0x1c8>)
 8006c2a:	4293      	cmp	r3, r2
 8006c2c:	d018      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c2e:	687b      	ldr	r3, [r7, #4]
 8006c30:	681b      	ldr	r3, [r3, #0]
 8006c32:	4a1f      	ldr	r2, [pc, #124]	@ (8006cb0 <HAL_DMA_Abort_IT+0x1cc>)
 8006c34:	4293      	cmp	r3, r2
 8006c36:	d013      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c38:	687b      	ldr	r3, [r7, #4]
 8006c3a:	681b      	ldr	r3, [r3, #0]
 8006c3c:	4a1d      	ldr	r2, [pc, #116]	@ (8006cb4 <HAL_DMA_Abort_IT+0x1d0>)
 8006c3e:	4293      	cmp	r3, r2
 8006c40:	d00e      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c42:	687b      	ldr	r3, [r7, #4]
 8006c44:	681b      	ldr	r3, [r3, #0]
 8006c46:	4a1c      	ldr	r2, [pc, #112]	@ (8006cb8 <HAL_DMA_Abort_IT+0x1d4>)
 8006c48:	4293      	cmp	r3, r2
 8006c4a:	d009      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c4c:	687b      	ldr	r3, [r7, #4]
 8006c4e:	681b      	ldr	r3, [r3, #0]
 8006c50:	4a1a      	ldr	r2, [pc, #104]	@ (8006cbc <HAL_DMA_Abort_IT+0x1d8>)
 8006c52:	4293      	cmp	r3, r2
 8006c54:	d004      	beq.n	8006c60 <HAL_DMA_Abort_IT+0x17c>
 8006c56:	687b      	ldr	r3, [r7, #4]
 8006c58:	681b      	ldr	r3, [r3, #0]
 8006c5a:	4a19      	ldr	r2, [pc, #100]	@ (8006cc0 <HAL_DMA_Abort_IT+0x1dc>)
 8006c5c:	4293      	cmp	r3, r2
 8006c5e:	d108      	bne.n	8006c72 <HAL_DMA_Abort_IT+0x18e>
 8006c60:	687b      	ldr	r3, [r7, #4]
 8006c62:	681b      	ldr	r3, [r3, #0]
 8006c64:	681a      	ldr	r2, [r3, #0]
 8006c66:	687b      	ldr	r3, [r7, #4]
 8006c68:	681b      	ldr	r3, [r3, #0]
 8006c6a:	f022 0201 	bic.w	r2, r2, #1
 8006c6e:	601a      	str	r2, [r3, #0]
 8006c70:	e178      	b.n	8006f64 <HAL_DMA_Abort_IT+0x480>
 8006c72:	687b      	ldr	r3, [r7, #4]
 8006c74:	681b      	ldr	r3, [r3, #0]
 8006c76:	681a      	ldr	r2, [r3, #0]
 8006c78:	687b      	ldr	r3, [r7, #4]
 8006c7a:	681b      	ldr	r3, [r3, #0]
 8006c7c:	f022 0201 	bic.w	r2, r2, #1
 8006c80:	601a      	str	r2, [r3, #0]
 8006c82:	e16f      	b.n	8006f64 <HAL_DMA_Abort_IT+0x480>
 8006c84:	40020010 	.word	0x40020010
 8006c88:	40020028 	.word	0x40020028
 8006c8c:	40020040 	.word	0x40020040
 8006c90:	40020058 	.word	0x40020058
 8006c94:	40020070 	.word	0x40020070
 8006c98:	40020088 	.word	0x40020088
 8006c9c:	400200a0 	.word	0x400200a0
 8006ca0:	400200b8 	.word	0x400200b8
 8006ca4:	40020410 	.word	0x40020410
 8006ca8:	40020428 	.word	0x40020428
 8006cac:	40020440 	.word	0x40020440
 8006cb0:	40020458 	.word	0x40020458
 8006cb4:	40020470 	.word	0x40020470
 8006cb8:	40020488 	.word	0x40020488
 8006cbc:	400204a0 	.word	0x400204a0
 8006cc0:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts  */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8006cc4:	687b      	ldr	r3, [r7, #4]
 8006cc6:	681b      	ldr	r3, [r3, #0]
 8006cc8:	681a      	ldr	r2, [r3, #0]
 8006cca:	687b      	ldr	r3, [r7, #4]
 8006ccc:	681b      	ldr	r3, [r3, #0]
 8006cce:	f022 020e 	bic.w	r2, r2, #14
 8006cd2:	601a      	str	r2, [r3, #0]

      /* Disable the channel */
      __HAL_DMA_DISABLE(hdma);
 8006cd4:	687b      	ldr	r3, [r7, #4]
 8006cd6:	681b      	ldr	r3, [r3, #0]
 8006cd8:	4a6c      	ldr	r2, [pc, #432]	@ (8006e8c <HAL_DMA_Abort_IT+0x3a8>)
 8006cda:	4293      	cmp	r3, r2
 8006cdc:	d04a      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006cde:	687b      	ldr	r3, [r7, #4]
 8006ce0:	681b      	ldr	r3, [r3, #0]
 8006ce2:	4a6b      	ldr	r2, [pc, #428]	@ (8006e90 <HAL_DMA_Abort_IT+0x3ac>)
 8006ce4:	4293      	cmp	r3, r2
 8006ce6:	d045      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006ce8:	687b      	ldr	r3, [r7, #4]
 8006cea:	681b      	ldr	r3, [r3, #0]
 8006cec:	4a69      	ldr	r2, [pc, #420]	@ (8006e94 <HAL_DMA_Abort_IT+0x3b0>)
 8006cee:	4293      	cmp	r3, r2
 8006cf0:	d040      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006cf2:	687b      	ldr	r3, [r7, #4]
 8006cf4:	681b      	ldr	r3, [r3, #0]
 8006cf6:	4a68      	ldr	r2, [pc, #416]	@ (8006e98 <HAL_DMA_Abort_IT+0x3b4>)
 8006cf8:	4293      	cmp	r3, r2
 8006cfa:	d03b      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006cfc:	687b      	ldr	r3, [r7, #4]
 8006cfe:	681b      	ldr	r3, [r3, #0]
 8006d00:	4a66      	ldr	r2, [pc, #408]	@ (8006e9c <HAL_DMA_Abort_IT+0x3b8>)
 8006d02:	4293      	cmp	r3, r2
 8006d04:	d036      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d06:	687b      	ldr	r3, [r7, #4]
 8006d08:	681b      	ldr	r3, [r3, #0]
 8006d0a:	4a65      	ldr	r2, [pc, #404]	@ (8006ea0 <HAL_DMA_Abort_IT+0x3bc>)
 8006d0c:	4293      	cmp	r3, r2
 8006d0e:	d031      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d10:	687b      	ldr	r3, [r7, #4]
 8006d12:	681b      	ldr	r3, [r3, #0]
 8006d14:	4a63      	ldr	r2, [pc, #396]	@ (8006ea4 <HAL_DMA_Abort_IT+0x3c0>)
 8006d16:	4293      	cmp	r3, r2
 8006d18:	d02c      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d1a:	687b      	ldr	r3, [r7, #4]
 8006d1c:	681b      	ldr	r3, [r3, #0]
 8006d1e:	4a62      	ldr	r2, [pc, #392]	@ (8006ea8 <HAL_DMA_Abort_IT+0x3c4>)
 8006d20:	4293      	cmp	r3, r2
 8006d22:	d027      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d24:	687b      	ldr	r3, [r7, #4]
 8006d26:	681b      	ldr	r3, [r3, #0]
 8006d28:	4a60      	ldr	r2, [pc, #384]	@ (8006eac <HAL_DMA_Abort_IT+0x3c8>)
 8006d2a:	4293      	cmp	r3, r2
 8006d2c:	d022      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d2e:	687b      	ldr	r3, [r7, #4]
 8006d30:	681b      	ldr	r3, [r3, #0]
 8006d32:	4a5f      	ldr	r2, [pc, #380]	@ (8006eb0 <HAL_DMA_Abort_IT+0x3cc>)
 8006d34:	4293      	cmp	r3, r2
 8006d36:	d01d      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d38:	687b      	ldr	r3, [r7, #4]
 8006d3a:	681b      	ldr	r3, [r3, #0]
 8006d3c:	4a5d      	ldr	r2, [pc, #372]	@ (8006eb4 <HAL_DMA_Abort_IT+0x3d0>)
 8006d3e:	4293      	cmp	r3, r2
 8006d40:	d018      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d42:	687b      	ldr	r3, [r7, #4]
 8006d44:	681b      	ldr	r3, [r3, #0]
 8006d46:	4a5c      	ldr	r2, [pc, #368]	@ (8006eb8 <HAL_DMA_Abort_IT+0x3d4>)
 8006d48:	4293      	cmp	r3, r2
 8006d4a:	d013      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d4c:	687b      	ldr	r3, [r7, #4]
 8006d4e:	681b      	ldr	r3, [r3, #0]
 8006d50:	4a5a      	ldr	r2, [pc, #360]	@ (8006ebc <HAL_DMA_Abort_IT+0x3d8>)
 8006d52:	4293      	cmp	r3, r2
 8006d54:	d00e      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d56:	687b      	ldr	r3, [r7, #4]
 8006d58:	681b      	ldr	r3, [r3, #0]
 8006d5a:	4a59      	ldr	r2, [pc, #356]	@ (8006ec0 <HAL_DMA_Abort_IT+0x3dc>)
 8006d5c:	4293      	cmp	r3, r2
 8006d5e:	d009      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d60:	687b      	ldr	r3, [r7, #4]
 8006d62:	681b      	ldr	r3, [r3, #0]
 8006d64:	4a57      	ldr	r2, [pc, #348]	@ (8006ec4 <HAL_DMA_Abort_IT+0x3e0>)
 8006d66:	4293      	cmp	r3, r2
 8006d68:	d004      	beq.n	8006d74 <HAL_DMA_Abort_IT+0x290>
 8006d6a:	687b      	ldr	r3, [r7, #4]
 8006d6c:	681b      	ldr	r3, [r3, #0]
 8006d6e:	4a56      	ldr	r2, [pc, #344]	@ (8006ec8 <HAL_DMA_Abort_IT+0x3e4>)
 8006d70:	4293      	cmp	r3, r2
 8006d72:	d108      	bne.n	8006d86 <HAL_DMA_Abort_IT+0x2a2>
 8006d74:	687b      	ldr	r3, [r7, #4]
 8006d76:	681b      	ldr	r3, [r3, #0]
 8006d78:	681a      	ldr	r2, [r3, #0]
 8006d7a:	687b      	ldr	r3, [r7, #4]
 8006d7c:	681b      	ldr	r3, [r3, #0]
 8006d7e:	f022 0201 	bic.w	r2, r2, #1
 8006d82:	601a      	str	r2, [r3, #0]
 8006d84:	e007      	b.n	8006d96 <HAL_DMA_Abort_IT+0x2b2>
 8006d86:	687b      	ldr	r3, [r7, #4]
 8006d88:	681b      	ldr	r3, [r3, #0]
 8006d8a:	681a      	ldr	r2, [r3, #0]
 8006d8c:	687b      	ldr	r3, [r7, #4]
 8006d8e:	681b      	ldr	r3, [r3, #0]
 8006d90:	f022 0201 	bic.w	r2, r2, #1
 8006d94:	601a      	str	r2, [r3, #0]

      if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006d96:	687b      	ldr	r3, [r7, #4]
 8006d98:	681b      	ldr	r3, [r3, #0]
 8006d9a:	4a3c      	ldr	r2, [pc, #240]	@ (8006e8c <HAL_DMA_Abort_IT+0x3a8>)
 8006d9c:	4293      	cmp	r3, r2
 8006d9e:	d072      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006da0:	687b      	ldr	r3, [r7, #4]
 8006da2:	681b      	ldr	r3, [r3, #0]
 8006da4:	4a3a      	ldr	r2, [pc, #232]	@ (8006e90 <HAL_DMA_Abort_IT+0x3ac>)
 8006da6:	4293      	cmp	r3, r2
 8006da8:	d06d      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006daa:	687b      	ldr	r3, [r7, #4]
 8006dac:	681b      	ldr	r3, [r3, #0]
 8006dae:	4a39      	ldr	r2, [pc, #228]	@ (8006e94 <HAL_DMA_Abort_IT+0x3b0>)
 8006db0:	4293      	cmp	r3, r2
 8006db2:	d068      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006db4:	687b      	ldr	r3, [r7, #4]
 8006db6:	681b      	ldr	r3, [r3, #0]
 8006db8:	4a37      	ldr	r2, [pc, #220]	@ (8006e98 <HAL_DMA_Abort_IT+0x3b4>)
 8006dba:	4293      	cmp	r3, r2
 8006dbc:	d063      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006dbe:	687b      	ldr	r3, [r7, #4]
 8006dc0:	681b      	ldr	r3, [r3, #0]
 8006dc2:	4a36      	ldr	r2, [pc, #216]	@ (8006e9c <HAL_DMA_Abort_IT+0x3b8>)
 8006dc4:	4293      	cmp	r3, r2
 8006dc6:	d05e      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006dc8:	687b      	ldr	r3, [r7, #4]
 8006dca:	681b      	ldr	r3, [r3, #0]
 8006dcc:	4a34      	ldr	r2, [pc, #208]	@ (8006ea0 <HAL_DMA_Abort_IT+0x3bc>)
 8006dce:	4293      	cmp	r3, r2
 8006dd0:	d059      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006dd2:	687b      	ldr	r3, [r7, #4]
 8006dd4:	681b      	ldr	r3, [r3, #0]
 8006dd6:	4a33      	ldr	r2, [pc, #204]	@ (8006ea4 <HAL_DMA_Abort_IT+0x3c0>)
 8006dd8:	4293      	cmp	r3, r2
 8006dda:	d054      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006ddc:	687b      	ldr	r3, [r7, #4]
 8006dde:	681b      	ldr	r3, [r3, #0]
 8006de0:	4a31      	ldr	r2, [pc, #196]	@ (8006ea8 <HAL_DMA_Abort_IT+0x3c4>)
 8006de2:	4293      	cmp	r3, r2
 8006de4:	d04f      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006de6:	687b      	ldr	r3, [r7, #4]
 8006de8:	681b      	ldr	r3, [r3, #0]
 8006dea:	4a30      	ldr	r2, [pc, #192]	@ (8006eac <HAL_DMA_Abort_IT+0x3c8>)
 8006dec:	4293      	cmp	r3, r2
 8006dee:	d04a      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006df0:	687b      	ldr	r3, [r7, #4]
 8006df2:	681b      	ldr	r3, [r3, #0]
 8006df4:	4a2e      	ldr	r2, [pc, #184]	@ (8006eb0 <HAL_DMA_Abort_IT+0x3cc>)
 8006df6:	4293      	cmp	r3, r2
 8006df8:	d045      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006dfa:	687b      	ldr	r3, [r7, #4]
 8006dfc:	681b      	ldr	r3, [r3, #0]
 8006dfe:	4a2d      	ldr	r2, [pc, #180]	@ (8006eb4 <HAL_DMA_Abort_IT+0x3d0>)
 8006e00:	4293      	cmp	r3, r2
 8006e02:	d040      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e04:	687b      	ldr	r3, [r7, #4]
 8006e06:	681b      	ldr	r3, [r3, #0]
 8006e08:	4a2b      	ldr	r2, [pc, #172]	@ (8006eb8 <HAL_DMA_Abort_IT+0x3d4>)
 8006e0a:	4293      	cmp	r3, r2
 8006e0c:	d03b      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e0e:	687b      	ldr	r3, [r7, #4]
 8006e10:	681b      	ldr	r3, [r3, #0]
 8006e12:	4a2a      	ldr	r2, [pc, #168]	@ (8006ebc <HAL_DMA_Abort_IT+0x3d8>)
 8006e14:	4293      	cmp	r3, r2
 8006e16:	d036      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e18:	687b      	ldr	r3, [r7, #4]
 8006e1a:	681b      	ldr	r3, [r3, #0]
 8006e1c:	4a28      	ldr	r2, [pc, #160]	@ (8006ec0 <HAL_DMA_Abort_IT+0x3dc>)
 8006e1e:	4293      	cmp	r3, r2
 8006e20:	d031      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e22:	687b      	ldr	r3, [r7, #4]
 8006e24:	681b      	ldr	r3, [r3, #0]
 8006e26:	4a27      	ldr	r2, [pc, #156]	@ (8006ec4 <HAL_DMA_Abort_IT+0x3e0>)
 8006e28:	4293      	cmp	r3, r2
 8006e2a:	d02c      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e2c:	687b      	ldr	r3, [r7, #4]
 8006e2e:	681b      	ldr	r3, [r3, #0]
 8006e30:	4a25      	ldr	r2, [pc, #148]	@ (8006ec8 <HAL_DMA_Abort_IT+0x3e4>)
 8006e32:	4293      	cmp	r3, r2
 8006e34:	d027      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e36:	687b      	ldr	r3, [r7, #4]
 8006e38:	681b      	ldr	r3, [r3, #0]
 8006e3a:	4a24      	ldr	r2, [pc, #144]	@ (8006ecc <HAL_DMA_Abort_IT+0x3e8>)
 8006e3c:	4293      	cmp	r3, r2
 8006e3e:	d022      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e40:	687b      	ldr	r3, [r7, #4]
 8006e42:	681b      	ldr	r3, [r3, #0]
 8006e44:	4a22      	ldr	r2, [pc, #136]	@ (8006ed0 <HAL_DMA_Abort_IT+0x3ec>)
 8006e46:	4293      	cmp	r3, r2
 8006e48:	d01d      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e4a:	687b      	ldr	r3, [r7, #4]
 8006e4c:	681b      	ldr	r3, [r3, #0]
 8006e4e:	4a21      	ldr	r2, [pc, #132]	@ (8006ed4 <HAL_DMA_Abort_IT+0x3f0>)
 8006e50:	4293      	cmp	r3, r2
 8006e52:	d018      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e54:	687b      	ldr	r3, [r7, #4]
 8006e56:	681b      	ldr	r3, [r3, #0]
 8006e58:	4a1f      	ldr	r2, [pc, #124]	@ (8006ed8 <HAL_DMA_Abort_IT+0x3f4>)
 8006e5a:	4293      	cmp	r3, r2
 8006e5c:	d013      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e5e:	687b      	ldr	r3, [r7, #4]
 8006e60:	681b      	ldr	r3, [r3, #0]
 8006e62:	4a1e      	ldr	r2, [pc, #120]	@ (8006edc <HAL_DMA_Abort_IT+0x3f8>)
 8006e64:	4293      	cmp	r3, r2
 8006e66:	d00e      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e68:	687b      	ldr	r3, [r7, #4]
 8006e6a:	681b      	ldr	r3, [r3, #0]
 8006e6c:	4a1c      	ldr	r2, [pc, #112]	@ (8006ee0 <HAL_DMA_Abort_IT+0x3fc>)
 8006e6e:	4293      	cmp	r3, r2
 8006e70:	d009      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e72:	687b      	ldr	r3, [r7, #4]
 8006e74:	681b      	ldr	r3, [r3, #0]
 8006e76:	4a1b      	ldr	r2, [pc, #108]	@ (8006ee4 <HAL_DMA_Abort_IT+0x400>)
 8006e78:	4293      	cmp	r3, r2
 8006e7a:	d004      	beq.n	8006e86 <HAL_DMA_Abort_IT+0x3a2>
 8006e7c:	687b      	ldr	r3, [r7, #4]
 8006e7e:	681b      	ldr	r3, [r3, #0]
 8006e80:	4a19      	ldr	r2, [pc, #100]	@ (8006ee8 <HAL_DMA_Abort_IT+0x404>)
 8006e82:	4293      	cmp	r3, r2
 8006e84:	d132      	bne.n	8006eec <HAL_DMA_Abort_IT+0x408>
 8006e86:	2301      	movs	r3, #1
 8006e88:	e031      	b.n	8006eee <HAL_DMA_Abort_IT+0x40a>
 8006e8a:	bf00      	nop
 8006e8c:	40020010 	.word	0x40020010
 8006e90:	40020028 	.word	0x40020028
 8006e94:	40020040 	.word	0x40020040
 8006e98:	40020058 	.word	0x40020058
 8006e9c:	40020070 	.word	0x40020070
 8006ea0:	40020088 	.word	0x40020088
 8006ea4:	400200a0 	.word	0x400200a0
 8006ea8:	400200b8 	.word	0x400200b8
 8006eac:	40020410 	.word	0x40020410
 8006eb0:	40020428 	.word	0x40020428
 8006eb4:	40020440 	.word	0x40020440
 8006eb8:	40020458 	.word	0x40020458
 8006ebc:	40020470 	.word	0x40020470
 8006ec0:	40020488 	.word	0x40020488
 8006ec4:	400204a0 	.word	0x400204a0
 8006ec8:	400204b8 	.word	0x400204b8
 8006ecc:	58025408 	.word	0x58025408
 8006ed0:	5802541c 	.word	0x5802541c
 8006ed4:	58025430 	.word	0x58025430
 8006ed8:	58025444 	.word	0x58025444
 8006edc:	58025458 	.word	0x58025458
 8006ee0:	5802546c 	.word	0x5802546c
 8006ee4:	58025480 	.word	0x58025480
 8006ee8:	58025494 	.word	0x58025494
 8006eec:	2300      	movs	r3, #0
 8006eee:	2b00      	cmp	r3, #0
 8006ef0:	d028      	beq.n	8006f44 <HAL_DMA_Abort_IT+0x460>
      {
        /* disable the DMAMUX sync overrun IT */
        hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8006ef2:	687b      	ldr	r3, [r7, #4]
 8006ef4:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006ef6:	681a      	ldr	r2, [r3, #0]
 8006ef8:	687b      	ldr	r3, [r7, #4]
 8006efa:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006efc:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006f00:	601a      	str	r2, [r3, #0]

        /* Clear all flags */
        regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006f02:	687b      	ldr	r3, [r7, #4]
 8006f04:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006f06:	60fb      	str	r3, [r7, #12]
        regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006f08:	687b      	ldr	r3, [r7, #4]
 8006f0a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006f0c:	f003 031f 	and.w	r3, r3, #31
 8006f10:	2201      	movs	r2, #1
 8006f12:	409a      	lsls	r2, r3
 8006f14:	68fb      	ldr	r3, [r7, #12]
 8006f16:	605a      	str	r2, [r3, #4]

        /* Clear the DMAMUX synchro overrun flag */
        hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006f18:	687b      	ldr	r3, [r7, #4]
 8006f1a:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006f1c:	687a      	ldr	r2, [r7, #4]
 8006f1e:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8006f20:	605a      	str	r2, [r3, #4]

        if(hdma->DMAmuxRequestGen != 0U)
 8006f22:	687b      	ldr	r3, [r7, #4]
 8006f24:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006f26:	2b00      	cmp	r3, #0
 8006f28:	d00c      	beq.n	8006f44 <HAL_DMA_Abort_IT+0x460>
        {
          /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
          /* disable the request gen overrun IT */
          hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8006f2a:	687b      	ldr	r3, [r7, #4]
 8006f2c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006f2e:	681a      	ldr	r2, [r3, #0]
 8006f30:	687b      	ldr	r3, [r7, #4]
 8006f32:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006f34:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006f38:	601a      	str	r2, [r3, #0]

          /* Clear the DMAMUX request generator overrun flag */
          hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006f3a:	687b      	ldr	r3, [r7, #4]
 8006f3c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006f3e:	687a      	ldr	r2, [r7, #4]
 8006f40:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006f42:	605a      	str	r2, [r3, #4]
        }
      }

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 8006f44:	687b      	ldr	r3, [r7, #4]
 8006f46:	2201      	movs	r2, #1
 8006f48:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8006f4c:	687b      	ldr	r3, [r7, #4]
 8006f4e:	2200      	movs	r2, #0
 8006f50:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      /* Call User Abort callback */
      if(hdma->XferAbortCallback != NULL)
 8006f54:	687b      	ldr	r3, [r7, #4]
 8006f56:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006f58:	2b00      	cmp	r3, #0
 8006f5a:	d003      	beq.n	8006f64 <HAL_DMA_Abort_IT+0x480>
      {
        hdma->XferAbortCallback(hdma);
 8006f5c:	687b      	ldr	r3, [r7, #4]
 8006f5e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8006f60:	6878      	ldr	r0, [r7, #4]
 8006f62:	4798      	blx	r3
      }
    }
  }

  return HAL_OK;
 8006f64:	2300      	movs	r3, #0
}
 8006f66:	4618      	mov	r0, r3
 8006f68:	3710      	adds	r7, #16
 8006f6a:	46bd      	mov	sp, r7
 8006f6c:	bd80      	pop	{r7, pc}
 8006f6e:	bf00      	nop

08006f70 <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 8006f70:	b580      	push	{r7, lr}
 8006f72:	b08a      	sub	sp, #40	@ 0x28
 8006f74:	af00      	add	r7, sp, #0
 8006f76:	6078      	str	r0, [r7, #4]
  uint32_t tmpisr_dma, tmpisr_bdma;
  uint32_t ccr_reg;
  __IO uint32_t count = 0U;
 8006f78:	2300      	movs	r3, #0
 8006f7a:	60fb      	str	r3, [r7, #12]
  uint32_t timeout = SystemCoreClock / 9600U;
 8006f7c:	4b67      	ldr	r3, [pc, #412]	@ (800711c <HAL_DMA_IRQHandler+0x1ac>)
 8006f7e:	681b      	ldr	r3, [r3, #0]
 8006f80:	4a67      	ldr	r2, [pc, #412]	@ (8007120 <HAL_DMA_IRQHandler+0x1b0>)
 8006f82:	fba2 2303 	umull	r2, r3, r2, r3
 8006f86:	0a9b      	lsrs	r3, r3, #10
 8006f88:	627b      	str	r3, [r7, #36]	@ 0x24

  /* calculate DMA base and stream number */
  DMA_Base_Registers  *regs_dma  = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006f8a:	687b      	ldr	r3, [r7, #4]
 8006f8c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006f8e:	623b      	str	r3, [r7, #32]
  BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006f90:	687b      	ldr	r3, [r7, #4]
 8006f92:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006f94:	61fb      	str	r3, [r7, #28]

  tmpisr_dma  = regs_dma->ISR;
 8006f96:	6a3b      	ldr	r3, [r7, #32]
 8006f98:	681b      	ldr	r3, [r3, #0]
 8006f9a:	61bb      	str	r3, [r7, #24]
  tmpisr_bdma = regs_bdma->ISR;
 8006f9c:	69fb      	ldr	r3, [r7, #28]
 8006f9e:	681b      	ldr	r3, [r3, #0]
 8006fa0:	617b      	str	r3, [r7, #20]

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U)  /* DMA1 or DMA2 instance */
 8006fa2:	687b      	ldr	r3, [r7, #4]
 8006fa4:	681b      	ldr	r3, [r3, #0]
 8006fa6:	4a5f      	ldr	r2, [pc, #380]	@ (8007124 <HAL_DMA_IRQHandler+0x1b4>)
 8006fa8:	4293      	cmp	r3, r2
 8006faa:	d04a      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fac:	687b      	ldr	r3, [r7, #4]
 8006fae:	681b      	ldr	r3, [r3, #0]
 8006fb0:	4a5d      	ldr	r2, [pc, #372]	@ (8007128 <HAL_DMA_IRQHandler+0x1b8>)
 8006fb2:	4293      	cmp	r3, r2
 8006fb4:	d045      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fb6:	687b      	ldr	r3, [r7, #4]
 8006fb8:	681b      	ldr	r3, [r3, #0]
 8006fba:	4a5c      	ldr	r2, [pc, #368]	@ (800712c <HAL_DMA_IRQHandler+0x1bc>)
 8006fbc:	4293      	cmp	r3, r2
 8006fbe:	d040      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fc0:	687b      	ldr	r3, [r7, #4]
 8006fc2:	681b      	ldr	r3, [r3, #0]
 8006fc4:	4a5a      	ldr	r2, [pc, #360]	@ (8007130 <HAL_DMA_IRQHandler+0x1c0>)
 8006fc6:	4293      	cmp	r3, r2
 8006fc8:	d03b      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fca:	687b      	ldr	r3, [r7, #4]
 8006fcc:	681b      	ldr	r3, [r3, #0]
 8006fce:	4a59      	ldr	r2, [pc, #356]	@ (8007134 <HAL_DMA_IRQHandler+0x1c4>)
 8006fd0:	4293      	cmp	r3, r2
 8006fd2:	d036      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fd4:	687b      	ldr	r3, [r7, #4]
 8006fd6:	681b      	ldr	r3, [r3, #0]
 8006fd8:	4a57      	ldr	r2, [pc, #348]	@ (8007138 <HAL_DMA_IRQHandler+0x1c8>)
 8006fda:	4293      	cmp	r3, r2
 8006fdc:	d031      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fde:	687b      	ldr	r3, [r7, #4]
 8006fe0:	681b      	ldr	r3, [r3, #0]
 8006fe2:	4a56      	ldr	r2, [pc, #344]	@ (800713c <HAL_DMA_IRQHandler+0x1cc>)
 8006fe4:	4293      	cmp	r3, r2
 8006fe6:	d02c      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006fe8:	687b      	ldr	r3, [r7, #4]
 8006fea:	681b      	ldr	r3, [r3, #0]
 8006fec:	4a54      	ldr	r2, [pc, #336]	@ (8007140 <HAL_DMA_IRQHandler+0x1d0>)
 8006fee:	4293      	cmp	r3, r2
 8006ff0:	d027      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006ff2:	687b      	ldr	r3, [r7, #4]
 8006ff4:	681b      	ldr	r3, [r3, #0]
 8006ff6:	4a53      	ldr	r2, [pc, #332]	@ (8007144 <HAL_DMA_IRQHandler+0x1d4>)
 8006ff8:	4293      	cmp	r3, r2
 8006ffa:	d022      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8006ffc:	687b      	ldr	r3, [r7, #4]
 8006ffe:	681b      	ldr	r3, [r3, #0]
 8007000:	4a51      	ldr	r2, [pc, #324]	@ (8007148 <HAL_DMA_IRQHandler+0x1d8>)
 8007002:	4293      	cmp	r3, r2
 8007004:	d01d      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8007006:	687b      	ldr	r3, [r7, #4]
 8007008:	681b      	ldr	r3, [r3, #0]
 800700a:	4a50      	ldr	r2, [pc, #320]	@ (800714c <HAL_DMA_IRQHandler+0x1dc>)
 800700c:	4293      	cmp	r3, r2
 800700e:	d018      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8007010:	687b      	ldr	r3, [r7, #4]
 8007012:	681b      	ldr	r3, [r3, #0]
 8007014:	4a4e      	ldr	r2, [pc, #312]	@ (8007150 <HAL_DMA_IRQHandler+0x1e0>)
 8007016:	4293      	cmp	r3, r2
 8007018:	d013      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 800701a:	687b      	ldr	r3, [r7, #4]
 800701c:	681b      	ldr	r3, [r3, #0]
 800701e:	4a4d      	ldr	r2, [pc, #308]	@ (8007154 <HAL_DMA_IRQHandler+0x1e4>)
 8007020:	4293      	cmp	r3, r2
 8007022:	d00e      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8007024:	687b      	ldr	r3, [r7, #4]
 8007026:	681b      	ldr	r3, [r3, #0]
 8007028:	4a4b      	ldr	r2, [pc, #300]	@ (8007158 <HAL_DMA_IRQHandler+0x1e8>)
 800702a:	4293      	cmp	r3, r2
 800702c:	d009      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 800702e:	687b      	ldr	r3, [r7, #4]
 8007030:	681b      	ldr	r3, [r3, #0]
 8007032:	4a4a      	ldr	r2, [pc, #296]	@ (800715c <HAL_DMA_IRQHandler+0x1ec>)
 8007034:	4293      	cmp	r3, r2
 8007036:	d004      	beq.n	8007042 <HAL_DMA_IRQHandler+0xd2>
 8007038:	687b      	ldr	r3, [r7, #4]
 800703a:	681b      	ldr	r3, [r3, #0]
 800703c:	4a48      	ldr	r2, [pc, #288]	@ (8007160 <HAL_DMA_IRQHandler+0x1f0>)
 800703e:	4293      	cmp	r3, r2
 8007040:	d101      	bne.n	8007046 <HAL_DMA_IRQHandler+0xd6>
 8007042:	2301      	movs	r3, #1
 8007044:	e000      	b.n	8007048 <HAL_DMA_IRQHandler+0xd8>
 8007046:	2300      	movs	r3, #0
 8007048:	2b00      	cmp	r3, #0
 800704a:	f000 842b 	beq.w	80078a4 <HAL_DMA_IRQHandler+0x934>
  {
    /* Transfer Error Interrupt management ***************************************/
    if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 800704e:	687b      	ldr	r3, [r7, #4]
 8007050:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007052:	f003 031f 	and.w	r3, r3, #31
 8007056:	2208      	movs	r2, #8
 8007058:	409a      	lsls	r2, r3
 800705a:	69bb      	ldr	r3, [r7, #24]
 800705c:	4013      	ands	r3, r2
 800705e:	2b00      	cmp	r3, #0
 8007060:	f000 80a2 	beq.w	80071a8 <HAL_DMA_IRQHandler+0x238>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
 8007064:	687b      	ldr	r3, [r7, #4]
 8007066:	681b      	ldr	r3, [r3, #0]
 8007068:	4a2e      	ldr	r2, [pc, #184]	@ (8007124 <HAL_DMA_IRQHandler+0x1b4>)
 800706a:	4293      	cmp	r3, r2
 800706c:	d04a      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 800706e:	687b      	ldr	r3, [r7, #4]
 8007070:	681b      	ldr	r3, [r3, #0]
 8007072:	4a2d      	ldr	r2, [pc, #180]	@ (8007128 <HAL_DMA_IRQHandler+0x1b8>)
 8007074:	4293      	cmp	r3, r2
 8007076:	d045      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 8007078:	687b      	ldr	r3, [r7, #4]
 800707a:	681b      	ldr	r3, [r3, #0]
 800707c:	4a2b      	ldr	r2, [pc, #172]	@ (800712c <HAL_DMA_IRQHandler+0x1bc>)
 800707e:	4293      	cmp	r3, r2
 8007080:	d040      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 8007082:	687b      	ldr	r3, [r7, #4]
 8007084:	681b      	ldr	r3, [r3, #0]
 8007086:	4a2a      	ldr	r2, [pc, #168]	@ (8007130 <HAL_DMA_IRQHandler+0x1c0>)
 8007088:	4293      	cmp	r3, r2
 800708a:	d03b      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 800708c:	687b      	ldr	r3, [r7, #4]
 800708e:	681b      	ldr	r3, [r3, #0]
 8007090:	4a28      	ldr	r2, [pc, #160]	@ (8007134 <HAL_DMA_IRQHandler+0x1c4>)
 8007092:	4293      	cmp	r3, r2
 8007094:	d036      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 8007096:	687b      	ldr	r3, [r7, #4]
 8007098:	681b      	ldr	r3, [r3, #0]
 800709a:	4a27      	ldr	r2, [pc, #156]	@ (8007138 <HAL_DMA_IRQHandler+0x1c8>)
 800709c:	4293      	cmp	r3, r2
 800709e:	d031      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070a0:	687b      	ldr	r3, [r7, #4]
 80070a2:	681b      	ldr	r3, [r3, #0]
 80070a4:	4a25      	ldr	r2, [pc, #148]	@ (800713c <HAL_DMA_IRQHandler+0x1cc>)
 80070a6:	4293      	cmp	r3, r2
 80070a8:	d02c      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070aa:	687b      	ldr	r3, [r7, #4]
 80070ac:	681b      	ldr	r3, [r3, #0]
 80070ae:	4a24      	ldr	r2, [pc, #144]	@ (8007140 <HAL_DMA_IRQHandler+0x1d0>)
 80070b0:	4293      	cmp	r3, r2
 80070b2:	d027      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070b4:	687b      	ldr	r3, [r7, #4]
 80070b6:	681b      	ldr	r3, [r3, #0]
 80070b8:	4a22      	ldr	r2, [pc, #136]	@ (8007144 <HAL_DMA_IRQHandler+0x1d4>)
 80070ba:	4293      	cmp	r3, r2
 80070bc:	d022      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070be:	687b      	ldr	r3, [r7, #4]
 80070c0:	681b      	ldr	r3, [r3, #0]
 80070c2:	4a21      	ldr	r2, [pc, #132]	@ (8007148 <HAL_DMA_IRQHandler+0x1d8>)
 80070c4:	4293      	cmp	r3, r2
 80070c6:	d01d      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070c8:	687b      	ldr	r3, [r7, #4]
 80070ca:	681b      	ldr	r3, [r3, #0]
 80070cc:	4a1f      	ldr	r2, [pc, #124]	@ (800714c <HAL_DMA_IRQHandler+0x1dc>)
 80070ce:	4293      	cmp	r3, r2
 80070d0:	d018      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070d2:	687b      	ldr	r3, [r7, #4]
 80070d4:	681b      	ldr	r3, [r3, #0]
 80070d6:	4a1e      	ldr	r2, [pc, #120]	@ (8007150 <HAL_DMA_IRQHandler+0x1e0>)
 80070d8:	4293      	cmp	r3, r2
 80070da:	d013      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070dc:	687b      	ldr	r3, [r7, #4]
 80070de:	681b      	ldr	r3, [r3, #0]
 80070e0:	4a1c      	ldr	r2, [pc, #112]	@ (8007154 <HAL_DMA_IRQHandler+0x1e4>)
 80070e2:	4293      	cmp	r3, r2
 80070e4:	d00e      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070e6:	687b      	ldr	r3, [r7, #4]
 80070e8:	681b      	ldr	r3, [r3, #0]
 80070ea:	4a1b      	ldr	r2, [pc, #108]	@ (8007158 <HAL_DMA_IRQHandler+0x1e8>)
 80070ec:	4293      	cmp	r3, r2
 80070ee:	d009      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070f0:	687b      	ldr	r3, [r7, #4]
 80070f2:	681b      	ldr	r3, [r3, #0]
 80070f4:	4a19      	ldr	r2, [pc, #100]	@ (800715c <HAL_DMA_IRQHandler+0x1ec>)
 80070f6:	4293      	cmp	r3, r2
 80070f8:	d004      	beq.n	8007104 <HAL_DMA_IRQHandler+0x194>
 80070fa:	687b      	ldr	r3, [r7, #4]
 80070fc:	681b      	ldr	r3, [r3, #0]
 80070fe:	4a18      	ldr	r2, [pc, #96]	@ (8007160 <HAL_DMA_IRQHandler+0x1f0>)
 8007100:	4293      	cmp	r3, r2
 8007102:	d12f      	bne.n	8007164 <HAL_DMA_IRQHandler+0x1f4>
 8007104:	687b      	ldr	r3, [r7, #4]
 8007106:	681b      	ldr	r3, [r3, #0]
 8007108:	681b      	ldr	r3, [r3, #0]
 800710a:	f003 0304 	and.w	r3, r3, #4
 800710e:	2b00      	cmp	r3, #0
 8007110:	bf14      	ite	ne
 8007112:	2301      	movne	r3, #1
 8007114:	2300      	moveq	r3, #0
 8007116:	b2db      	uxtb	r3, r3
 8007118:	e02e      	b.n	8007178 <HAL_DMA_IRQHandler+0x208>
 800711a:	bf00      	nop
 800711c:	2400000c 	.word	0x2400000c
 8007120:	1b4e81b5 	.word	0x1b4e81b5
 8007124:	40020010 	.word	0x40020010
 8007128:	40020028 	.word	0x40020028
 800712c:	40020040 	.word	0x40020040
 8007130:	40020058 	.word	0x40020058
 8007134:	40020070 	.word	0x40020070
 8007138:	40020088 	.word	0x40020088
 800713c:	400200a0 	.word	0x400200a0
 8007140:	400200b8 	.word	0x400200b8
 8007144:	40020410 	.word	0x40020410
 8007148:	40020428 	.word	0x40020428
 800714c:	40020440 	.word	0x40020440
 8007150:	40020458 	.word	0x40020458
 8007154:	40020470 	.word	0x40020470
 8007158:	40020488 	.word	0x40020488
 800715c:	400204a0 	.word	0x400204a0
 8007160:	400204b8 	.word	0x400204b8
 8007164:	687b      	ldr	r3, [r7, #4]
 8007166:	681b      	ldr	r3, [r3, #0]
 8007168:	681b      	ldr	r3, [r3, #0]
 800716a:	f003 0308 	and.w	r3, r3, #8
 800716e:	2b00      	cmp	r3, #0
 8007170:	bf14      	ite	ne
 8007172:	2301      	movne	r3, #1
 8007174:	2300      	moveq	r3, #0
 8007176:	b2db      	uxtb	r3, r3
 8007178:	2b00      	cmp	r3, #0
 800717a:	d015      	beq.n	80071a8 <HAL_DMA_IRQHandler+0x238>
      {
        /* Disable the transfer error interrupt */
        ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TE);
 800717c:	687b      	ldr	r3, [r7, #4]
 800717e:	681b      	ldr	r3, [r3, #0]
 8007180:	681a      	ldr	r2, [r3, #0]
 8007182:	687b      	ldr	r3, [r7, #4]
 8007184:	681b      	ldr	r3, [r3, #0]
 8007186:	f022 0204 	bic.w	r2, r2, #4
 800718a:	601a      	str	r2, [r3, #0]

        /* Clear the transfer error flag */
        regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
 800718c:	687b      	ldr	r3, [r7, #4]
 800718e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007190:	f003 031f 	and.w	r3, r3, #31
 8007194:	2208      	movs	r2, #8
 8007196:	409a      	lsls	r2, r3
 8007198:	6a3b      	ldr	r3, [r7, #32]
 800719a:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_TE;
 800719c:	687b      	ldr	r3, [r7, #4]
 800719e:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80071a0:	f043 0201 	orr.w	r2, r3, #1
 80071a4:	687b      	ldr	r3, [r7, #4]
 80071a6:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* FIFO Error Interrupt management ******************************************/
    if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80071a8:	687b      	ldr	r3, [r7, #4]
 80071aa:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80071ac:	f003 031f 	and.w	r3, r3, #31
 80071b0:	69ba      	ldr	r2, [r7, #24]
 80071b2:	fa22 f303 	lsr.w	r3, r2, r3
 80071b6:	f003 0301 	and.w	r3, r3, #1
 80071ba:	2b00      	cmp	r3, #0
 80071bc:	d06e      	beq.n	800729c <HAL_DMA_IRQHandler+0x32c>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
 80071be:	687b      	ldr	r3, [r7, #4]
 80071c0:	681b      	ldr	r3, [r3, #0]
 80071c2:	4a69      	ldr	r2, [pc, #420]	@ (8007368 <HAL_DMA_IRQHandler+0x3f8>)
 80071c4:	4293      	cmp	r3, r2
 80071c6:	d04a      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071c8:	687b      	ldr	r3, [r7, #4]
 80071ca:	681b      	ldr	r3, [r3, #0]
 80071cc:	4a67      	ldr	r2, [pc, #412]	@ (800736c <HAL_DMA_IRQHandler+0x3fc>)
 80071ce:	4293      	cmp	r3, r2
 80071d0:	d045      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071d2:	687b      	ldr	r3, [r7, #4]
 80071d4:	681b      	ldr	r3, [r3, #0]
 80071d6:	4a66      	ldr	r2, [pc, #408]	@ (8007370 <HAL_DMA_IRQHandler+0x400>)
 80071d8:	4293      	cmp	r3, r2
 80071da:	d040      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071dc:	687b      	ldr	r3, [r7, #4]
 80071de:	681b      	ldr	r3, [r3, #0]
 80071e0:	4a64      	ldr	r2, [pc, #400]	@ (8007374 <HAL_DMA_IRQHandler+0x404>)
 80071e2:	4293      	cmp	r3, r2
 80071e4:	d03b      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071e6:	687b      	ldr	r3, [r7, #4]
 80071e8:	681b      	ldr	r3, [r3, #0]
 80071ea:	4a63      	ldr	r2, [pc, #396]	@ (8007378 <HAL_DMA_IRQHandler+0x408>)
 80071ec:	4293      	cmp	r3, r2
 80071ee:	d036      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071f0:	687b      	ldr	r3, [r7, #4]
 80071f2:	681b      	ldr	r3, [r3, #0]
 80071f4:	4a61      	ldr	r2, [pc, #388]	@ (800737c <HAL_DMA_IRQHandler+0x40c>)
 80071f6:	4293      	cmp	r3, r2
 80071f8:	d031      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 80071fa:	687b      	ldr	r3, [r7, #4]
 80071fc:	681b      	ldr	r3, [r3, #0]
 80071fe:	4a60      	ldr	r2, [pc, #384]	@ (8007380 <HAL_DMA_IRQHandler+0x410>)
 8007200:	4293      	cmp	r3, r2
 8007202:	d02c      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007204:	687b      	ldr	r3, [r7, #4]
 8007206:	681b      	ldr	r3, [r3, #0]
 8007208:	4a5e      	ldr	r2, [pc, #376]	@ (8007384 <HAL_DMA_IRQHandler+0x414>)
 800720a:	4293      	cmp	r3, r2
 800720c:	d027      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 800720e:	687b      	ldr	r3, [r7, #4]
 8007210:	681b      	ldr	r3, [r3, #0]
 8007212:	4a5d      	ldr	r2, [pc, #372]	@ (8007388 <HAL_DMA_IRQHandler+0x418>)
 8007214:	4293      	cmp	r3, r2
 8007216:	d022      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007218:	687b      	ldr	r3, [r7, #4]
 800721a:	681b      	ldr	r3, [r3, #0]
 800721c:	4a5b      	ldr	r2, [pc, #364]	@ (800738c <HAL_DMA_IRQHandler+0x41c>)
 800721e:	4293      	cmp	r3, r2
 8007220:	d01d      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007222:	687b      	ldr	r3, [r7, #4]
 8007224:	681b      	ldr	r3, [r3, #0]
 8007226:	4a5a      	ldr	r2, [pc, #360]	@ (8007390 <HAL_DMA_IRQHandler+0x420>)
 8007228:	4293      	cmp	r3, r2
 800722a:	d018      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 800722c:	687b      	ldr	r3, [r7, #4]
 800722e:	681b      	ldr	r3, [r3, #0]
 8007230:	4a58      	ldr	r2, [pc, #352]	@ (8007394 <HAL_DMA_IRQHandler+0x424>)
 8007232:	4293      	cmp	r3, r2
 8007234:	d013      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007236:	687b      	ldr	r3, [r7, #4]
 8007238:	681b      	ldr	r3, [r3, #0]
 800723a:	4a57      	ldr	r2, [pc, #348]	@ (8007398 <HAL_DMA_IRQHandler+0x428>)
 800723c:	4293      	cmp	r3, r2
 800723e:	d00e      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007240:	687b      	ldr	r3, [r7, #4]
 8007242:	681b      	ldr	r3, [r3, #0]
 8007244:	4a55      	ldr	r2, [pc, #340]	@ (800739c <HAL_DMA_IRQHandler+0x42c>)
 8007246:	4293      	cmp	r3, r2
 8007248:	d009      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 800724a:	687b      	ldr	r3, [r7, #4]
 800724c:	681b      	ldr	r3, [r3, #0]
 800724e:	4a54      	ldr	r2, [pc, #336]	@ (80073a0 <HAL_DMA_IRQHandler+0x430>)
 8007250:	4293      	cmp	r3, r2
 8007252:	d004      	beq.n	800725e <HAL_DMA_IRQHandler+0x2ee>
 8007254:	687b      	ldr	r3, [r7, #4]
 8007256:	681b      	ldr	r3, [r3, #0]
 8007258:	4a52      	ldr	r2, [pc, #328]	@ (80073a4 <HAL_DMA_IRQHandler+0x434>)
 800725a:	4293      	cmp	r3, r2
 800725c:	d10a      	bne.n	8007274 <HAL_DMA_IRQHandler+0x304>
 800725e:	687b      	ldr	r3, [r7, #4]
 8007260:	681b      	ldr	r3, [r3, #0]
 8007262:	695b      	ldr	r3, [r3, #20]
 8007264:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8007268:	2b00      	cmp	r3, #0
 800726a:	bf14      	ite	ne
 800726c:	2301      	movne	r3, #1
 800726e:	2300      	moveq	r3, #0
 8007270:	b2db      	uxtb	r3, r3
 8007272:	e003      	b.n	800727c <HAL_DMA_IRQHandler+0x30c>
 8007274:	687b      	ldr	r3, [r7, #4]
 8007276:	681b      	ldr	r3, [r3, #0]
 8007278:	681b      	ldr	r3, [r3, #0]
 800727a:	2300      	movs	r3, #0
 800727c:	2b00      	cmp	r3, #0
 800727e:	d00d      	beq.n	800729c <HAL_DMA_IRQHandler+0x32c>
      {
        /* Clear the FIFO error flag */
        regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8007280:	687b      	ldr	r3, [r7, #4]
 8007282:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007284:	f003 031f 	and.w	r3, r3, #31
 8007288:	2201      	movs	r2, #1
 800728a:	409a      	lsls	r2, r3
 800728c:	6a3b      	ldr	r3, [r7, #32]
 800728e:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_FE;
 8007290:	687b      	ldr	r3, [r7, #4]
 8007292:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007294:	f043 0202 	orr.w	r2, r3, #2
 8007298:	687b      	ldr	r3, [r7, #4]
 800729a:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Direct Mode Error Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 800729c:	687b      	ldr	r3, [r7, #4]
 800729e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80072a0:	f003 031f 	and.w	r3, r3, #31
 80072a4:	2204      	movs	r2, #4
 80072a6:	409a      	lsls	r2, r3
 80072a8:	69bb      	ldr	r3, [r7, #24]
 80072aa:	4013      	ands	r3, r2
 80072ac:	2b00      	cmp	r3, #0
 80072ae:	f000 808f 	beq.w	80073d0 <HAL_DMA_IRQHandler+0x460>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
 80072b2:	687b      	ldr	r3, [r7, #4]
 80072b4:	681b      	ldr	r3, [r3, #0]
 80072b6:	4a2c      	ldr	r2, [pc, #176]	@ (8007368 <HAL_DMA_IRQHandler+0x3f8>)
 80072b8:	4293      	cmp	r3, r2
 80072ba:	d04a      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072bc:	687b      	ldr	r3, [r7, #4]
 80072be:	681b      	ldr	r3, [r3, #0]
 80072c0:	4a2a      	ldr	r2, [pc, #168]	@ (800736c <HAL_DMA_IRQHandler+0x3fc>)
 80072c2:	4293      	cmp	r3, r2
 80072c4:	d045      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072c6:	687b      	ldr	r3, [r7, #4]
 80072c8:	681b      	ldr	r3, [r3, #0]
 80072ca:	4a29      	ldr	r2, [pc, #164]	@ (8007370 <HAL_DMA_IRQHandler+0x400>)
 80072cc:	4293      	cmp	r3, r2
 80072ce:	d040      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072d0:	687b      	ldr	r3, [r7, #4]
 80072d2:	681b      	ldr	r3, [r3, #0]
 80072d4:	4a27      	ldr	r2, [pc, #156]	@ (8007374 <HAL_DMA_IRQHandler+0x404>)
 80072d6:	4293      	cmp	r3, r2
 80072d8:	d03b      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072da:	687b      	ldr	r3, [r7, #4]
 80072dc:	681b      	ldr	r3, [r3, #0]
 80072de:	4a26      	ldr	r2, [pc, #152]	@ (8007378 <HAL_DMA_IRQHandler+0x408>)
 80072e0:	4293      	cmp	r3, r2
 80072e2:	d036      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072e4:	687b      	ldr	r3, [r7, #4]
 80072e6:	681b      	ldr	r3, [r3, #0]
 80072e8:	4a24      	ldr	r2, [pc, #144]	@ (800737c <HAL_DMA_IRQHandler+0x40c>)
 80072ea:	4293      	cmp	r3, r2
 80072ec:	d031      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072ee:	687b      	ldr	r3, [r7, #4]
 80072f0:	681b      	ldr	r3, [r3, #0]
 80072f2:	4a23      	ldr	r2, [pc, #140]	@ (8007380 <HAL_DMA_IRQHandler+0x410>)
 80072f4:	4293      	cmp	r3, r2
 80072f6:	d02c      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 80072f8:	687b      	ldr	r3, [r7, #4]
 80072fa:	681b      	ldr	r3, [r3, #0]
 80072fc:	4a21      	ldr	r2, [pc, #132]	@ (8007384 <HAL_DMA_IRQHandler+0x414>)
 80072fe:	4293      	cmp	r3, r2
 8007300:	d027      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 8007302:	687b      	ldr	r3, [r7, #4]
 8007304:	681b      	ldr	r3, [r3, #0]
 8007306:	4a20      	ldr	r2, [pc, #128]	@ (8007388 <HAL_DMA_IRQHandler+0x418>)
 8007308:	4293      	cmp	r3, r2
 800730a:	d022      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 800730c:	687b      	ldr	r3, [r7, #4]
 800730e:	681b      	ldr	r3, [r3, #0]
 8007310:	4a1e      	ldr	r2, [pc, #120]	@ (800738c <HAL_DMA_IRQHandler+0x41c>)
 8007312:	4293      	cmp	r3, r2
 8007314:	d01d      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 8007316:	687b      	ldr	r3, [r7, #4]
 8007318:	681b      	ldr	r3, [r3, #0]
 800731a:	4a1d      	ldr	r2, [pc, #116]	@ (8007390 <HAL_DMA_IRQHandler+0x420>)
 800731c:	4293      	cmp	r3, r2
 800731e:	d018      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 8007320:	687b      	ldr	r3, [r7, #4]
 8007322:	681b      	ldr	r3, [r3, #0]
 8007324:	4a1b      	ldr	r2, [pc, #108]	@ (8007394 <HAL_DMA_IRQHandler+0x424>)
 8007326:	4293      	cmp	r3, r2
 8007328:	d013      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 800732a:	687b      	ldr	r3, [r7, #4]
 800732c:	681b      	ldr	r3, [r3, #0]
 800732e:	4a1a      	ldr	r2, [pc, #104]	@ (8007398 <HAL_DMA_IRQHandler+0x428>)
 8007330:	4293      	cmp	r3, r2
 8007332:	d00e      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 8007334:	687b      	ldr	r3, [r7, #4]
 8007336:	681b      	ldr	r3, [r3, #0]
 8007338:	4a18      	ldr	r2, [pc, #96]	@ (800739c <HAL_DMA_IRQHandler+0x42c>)
 800733a:	4293      	cmp	r3, r2
 800733c:	d009      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 800733e:	687b      	ldr	r3, [r7, #4]
 8007340:	681b      	ldr	r3, [r3, #0]
 8007342:	4a17      	ldr	r2, [pc, #92]	@ (80073a0 <HAL_DMA_IRQHandler+0x430>)
 8007344:	4293      	cmp	r3, r2
 8007346:	d004      	beq.n	8007352 <HAL_DMA_IRQHandler+0x3e2>
 8007348:	687b      	ldr	r3, [r7, #4]
 800734a:	681b      	ldr	r3, [r3, #0]
 800734c:	4a15      	ldr	r2, [pc, #84]	@ (80073a4 <HAL_DMA_IRQHandler+0x434>)
 800734e:	4293      	cmp	r3, r2
 8007350:	d12a      	bne.n	80073a8 <HAL_DMA_IRQHandler+0x438>
 8007352:	687b      	ldr	r3, [r7, #4]
 8007354:	681b      	ldr	r3, [r3, #0]
 8007356:	681b      	ldr	r3, [r3, #0]
 8007358:	f003 0302 	and.w	r3, r3, #2
 800735c:	2b00      	cmp	r3, #0
 800735e:	bf14      	ite	ne
 8007360:	2301      	movne	r3, #1
 8007362:	2300      	moveq	r3, #0
 8007364:	b2db      	uxtb	r3, r3
 8007366:	e023      	b.n	80073b0 <HAL_DMA_IRQHandler+0x440>
 8007368:	40020010 	.word	0x40020010
 800736c:	40020028 	.word	0x40020028
 8007370:	40020040 	.word	0x40020040
 8007374:	40020058 	.word	0x40020058
 8007378:	40020070 	.word	0x40020070
 800737c:	40020088 	.word	0x40020088
 8007380:	400200a0 	.word	0x400200a0
 8007384:	400200b8 	.word	0x400200b8
 8007388:	40020410 	.word	0x40020410
 800738c:	40020428 	.word	0x40020428
 8007390:	40020440 	.word	0x40020440
 8007394:	40020458 	.word	0x40020458
 8007398:	40020470 	.word	0x40020470
 800739c:	40020488 	.word	0x40020488
 80073a0:	400204a0 	.word	0x400204a0
 80073a4:	400204b8 	.word	0x400204b8
 80073a8:	687b      	ldr	r3, [r7, #4]
 80073aa:	681b      	ldr	r3, [r3, #0]
 80073ac:	681b      	ldr	r3, [r3, #0]
 80073ae:	2300      	movs	r3, #0
 80073b0:	2b00      	cmp	r3, #0
 80073b2:	d00d      	beq.n	80073d0 <HAL_DMA_IRQHandler+0x460>
      {
        /* Clear the direct mode error flag */
        regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
 80073b4:	687b      	ldr	r3, [r7, #4]
 80073b6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80073b8:	f003 031f 	and.w	r3, r3, #31
 80073bc:	2204      	movs	r2, #4
 80073be:	409a      	lsls	r2, r3
 80073c0:	6a3b      	ldr	r3, [r7, #32]
 80073c2:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_DME;
 80073c4:	687b      	ldr	r3, [r7, #4]
 80073c6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80073c8:	f043 0204 	orr.w	r2, r3, #4
 80073cc:	687b      	ldr	r3, [r7, #4]
 80073ce:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Half Transfer Complete Interrupt management ******************************/
    if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80073d0:	687b      	ldr	r3, [r7, #4]
 80073d2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80073d4:	f003 031f 	and.w	r3, r3, #31
 80073d8:	2210      	movs	r2, #16
 80073da:	409a      	lsls	r2, r3
 80073dc:	69bb      	ldr	r3, [r7, #24]
 80073de:	4013      	ands	r3, r2
 80073e0:	2b00      	cmp	r3, #0
 80073e2:	f000 80a6 	beq.w	8007532 <HAL_DMA_IRQHandler+0x5c2>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
 80073e6:	687b      	ldr	r3, [r7, #4]
 80073e8:	681b      	ldr	r3, [r3, #0]
 80073ea:	4a85      	ldr	r2, [pc, #532]	@ (8007600 <HAL_DMA_IRQHandler+0x690>)
 80073ec:	4293      	cmp	r3, r2
 80073ee:	d04a      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 80073f0:	687b      	ldr	r3, [r7, #4]
 80073f2:	681b      	ldr	r3, [r3, #0]
 80073f4:	4a83      	ldr	r2, [pc, #524]	@ (8007604 <HAL_DMA_IRQHandler+0x694>)
 80073f6:	4293      	cmp	r3, r2
 80073f8:	d045      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 80073fa:	687b      	ldr	r3, [r7, #4]
 80073fc:	681b      	ldr	r3, [r3, #0]
 80073fe:	4a82      	ldr	r2, [pc, #520]	@ (8007608 <HAL_DMA_IRQHandler+0x698>)
 8007400:	4293      	cmp	r3, r2
 8007402:	d040      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007404:	687b      	ldr	r3, [r7, #4]
 8007406:	681b      	ldr	r3, [r3, #0]
 8007408:	4a80      	ldr	r2, [pc, #512]	@ (800760c <HAL_DMA_IRQHandler+0x69c>)
 800740a:	4293      	cmp	r3, r2
 800740c:	d03b      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 800740e:	687b      	ldr	r3, [r7, #4]
 8007410:	681b      	ldr	r3, [r3, #0]
 8007412:	4a7f      	ldr	r2, [pc, #508]	@ (8007610 <HAL_DMA_IRQHandler+0x6a0>)
 8007414:	4293      	cmp	r3, r2
 8007416:	d036      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007418:	687b      	ldr	r3, [r7, #4]
 800741a:	681b      	ldr	r3, [r3, #0]
 800741c:	4a7d      	ldr	r2, [pc, #500]	@ (8007614 <HAL_DMA_IRQHandler+0x6a4>)
 800741e:	4293      	cmp	r3, r2
 8007420:	d031      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007422:	687b      	ldr	r3, [r7, #4]
 8007424:	681b      	ldr	r3, [r3, #0]
 8007426:	4a7c      	ldr	r2, [pc, #496]	@ (8007618 <HAL_DMA_IRQHandler+0x6a8>)
 8007428:	4293      	cmp	r3, r2
 800742a:	d02c      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 800742c:	687b      	ldr	r3, [r7, #4]
 800742e:	681b      	ldr	r3, [r3, #0]
 8007430:	4a7a      	ldr	r2, [pc, #488]	@ (800761c <HAL_DMA_IRQHandler+0x6ac>)
 8007432:	4293      	cmp	r3, r2
 8007434:	d027      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007436:	687b      	ldr	r3, [r7, #4]
 8007438:	681b      	ldr	r3, [r3, #0]
 800743a:	4a79      	ldr	r2, [pc, #484]	@ (8007620 <HAL_DMA_IRQHandler+0x6b0>)
 800743c:	4293      	cmp	r3, r2
 800743e:	d022      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007440:	687b      	ldr	r3, [r7, #4]
 8007442:	681b      	ldr	r3, [r3, #0]
 8007444:	4a77      	ldr	r2, [pc, #476]	@ (8007624 <HAL_DMA_IRQHandler+0x6b4>)
 8007446:	4293      	cmp	r3, r2
 8007448:	d01d      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 800744a:	687b      	ldr	r3, [r7, #4]
 800744c:	681b      	ldr	r3, [r3, #0]
 800744e:	4a76      	ldr	r2, [pc, #472]	@ (8007628 <HAL_DMA_IRQHandler+0x6b8>)
 8007450:	4293      	cmp	r3, r2
 8007452:	d018      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007454:	687b      	ldr	r3, [r7, #4]
 8007456:	681b      	ldr	r3, [r3, #0]
 8007458:	4a74      	ldr	r2, [pc, #464]	@ (800762c <HAL_DMA_IRQHandler+0x6bc>)
 800745a:	4293      	cmp	r3, r2
 800745c:	d013      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 800745e:	687b      	ldr	r3, [r7, #4]
 8007460:	681b      	ldr	r3, [r3, #0]
 8007462:	4a73      	ldr	r2, [pc, #460]	@ (8007630 <HAL_DMA_IRQHandler+0x6c0>)
 8007464:	4293      	cmp	r3, r2
 8007466:	d00e      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007468:	687b      	ldr	r3, [r7, #4]
 800746a:	681b      	ldr	r3, [r3, #0]
 800746c:	4a71      	ldr	r2, [pc, #452]	@ (8007634 <HAL_DMA_IRQHandler+0x6c4>)
 800746e:	4293      	cmp	r3, r2
 8007470:	d009      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 8007472:	687b      	ldr	r3, [r7, #4]
 8007474:	681b      	ldr	r3, [r3, #0]
 8007476:	4a70      	ldr	r2, [pc, #448]	@ (8007638 <HAL_DMA_IRQHandler+0x6c8>)
 8007478:	4293      	cmp	r3, r2
 800747a:	d004      	beq.n	8007486 <HAL_DMA_IRQHandler+0x516>
 800747c:	687b      	ldr	r3, [r7, #4]
 800747e:	681b      	ldr	r3, [r3, #0]
 8007480:	4a6e      	ldr	r2, [pc, #440]	@ (800763c <HAL_DMA_IRQHandler+0x6cc>)
 8007482:	4293      	cmp	r3, r2
 8007484:	d10a      	bne.n	800749c <HAL_DMA_IRQHandler+0x52c>
 8007486:	687b      	ldr	r3, [r7, #4]
 8007488:	681b      	ldr	r3, [r3, #0]
 800748a:	681b      	ldr	r3, [r3, #0]
 800748c:	f003 0308 	and.w	r3, r3, #8
 8007490:	2b00      	cmp	r3, #0
 8007492:	bf14      	ite	ne
 8007494:	2301      	movne	r3, #1
 8007496:	2300      	moveq	r3, #0
 8007498:	b2db      	uxtb	r3, r3
 800749a:	e009      	b.n	80074b0 <HAL_DMA_IRQHandler+0x540>
 800749c:	687b      	ldr	r3, [r7, #4]
 800749e:	681b      	ldr	r3, [r3, #0]
 80074a0:	681b      	ldr	r3, [r3, #0]
 80074a2:	f003 0304 	and.w	r3, r3, #4
 80074a6:	2b00      	cmp	r3, #0
 80074a8:	bf14      	ite	ne
 80074aa:	2301      	movne	r3, #1
 80074ac:	2300      	moveq	r3, #0
 80074ae:	b2db      	uxtb	r3, r3
 80074b0:	2b00      	cmp	r3, #0
 80074b2:	d03e      	beq.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
      {
        /* Clear the half transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
 80074b4:	687b      	ldr	r3, [r7, #4]
 80074b6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80074b8:	f003 031f 	and.w	r3, r3, #31
 80074bc:	2210      	movs	r2, #16
 80074be:	409a      	lsls	r2, r3
 80074c0:	6a3b      	ldr	r3, [r7, #32]
 80074c2:	609a      	str	r2, [r3, #8]

        /* Multi_Buffering mode enabled */
        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 80074c4:	687b      	ldr	r3, [r7, #4]
 80074c6:	681b      	ldr	r3, [r3, #0]
 80074c8:	681b      	ldr	r3, [r3, #0]
 80074ca:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80074ce:	2b00      	cmp	r3, #0
 80074d0:	d018      	beq.n	8007504 <HAL_DMA_IRQHandler+0x594>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 80074d2:	687b      	ldr	r3, [r7, #4]
 80074d4:	681b      	ldr	r3, [r3, #0]
 80074d6:	681b      	ldr	r3, [r3, #0]
 80074d8:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 80074dc:	2b00      	cmp	r3, #0
 80074de:	d108      	bne.n	80074f2 <HAL_DMA_IRQHandler+0x582>
          {
            if(hdma->XferHalfCpltCallback != NULL)
 80074e0:	687b      	ldr	r3, [r7, #4]
 80074e2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80074e4:	2b00      	cmp	r3, #0
 80074e6:	d024      	beq.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferHalfCpltCallback(hdma);
 80074e8:	687b      	ldr	r3, [r7, #4]
 80074ea:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80074ec:	6878      	ldr	r0, [r7, #4]
 80074ee:	4798      	blx	r3
 80074f0:	e01f      	b.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferM1HalfCpltCallback != NULL)
 80074f2:	687b      	ldr	r3, [r7, #4]
 80074f4:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80074f6:	2b00      	cmp	r3, #0
 80074f8:	d01b      	beq.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferM1HalfCpltCallback(hdma);
 80074fa:	687b      	ldr	r3, [r7, #4]
 80074fc:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80074fe:	6878      	ldr	r0, [r7, #4]
 8007500:	4798      	blx	r3
 8007502:	e016      	b.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
          }
        }
        else
        {
          /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8007504:	687b      	ldr	r3, [r7, #4]
 8007506:	681b      	ldr	r3, [r3, #0]
 8007508:	681b      	ldr	r3, [r3, #0]
 800750a:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800750e:	2b00      	cmp	r3, #0
 8007510:	d107      	bne.n	8007522 <HAL_DMA_IRQHandler+0x5b2>
          {
            /* Disable the half transfer interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8007512:	687b      	ldr	r3, [r7, #4]
 8007514:	681b      	ldr	r3, [r3, #0]
 8007516:	681a      	ldr	r2, [r3, #0]
 8007518:	687b      	ldr	r3, [r7, #4]
 800751a:	681b      	ldr	r3, [r3, #0]
 800751c:	f022 0208 	bic.w	r2, r2, #8
 8007520:	601a      	str	r2, [r3, #0]
          }

          if(hdma->XferHalfCpltCallback != NULL)
 8007522:	687b      	ldr	r3, [r7, #4]
 8007524:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007526:	2b00      	cmp	r3, #0
 8007528:	d003      	beq.n	8007532 <HAL_DMA_IRQHandler+0x5c2>
          {
            /* Half transfer callback */
            hdma->XferHalfCpltCallback(hdma);
 800752a:	687b      	ldr	r3, [r7, #4]
 800752c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800752e:	6878      	ldr	r0, [r7, #4]
 8007530:	4798      	blx	r3
          }
        }
      }
    }
    /* Transfer Complete Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8007532:	687b      	ldr	r3, [r7, #4]
 8007534:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007536:	f003 031f 	and.w	r3, r3, #31
 800753a:	2220      	movs	r2, #32
 800753c:	409a      	lsls	r2, r3
 800753e:	69bb      	ldr	r3, [r7, #24]
 8007540:	4013      	ands	r3, r2
 8007542:	2b00      	cmp	r3, #0
 8007544:	f000 8110 	beq.w	8007768 <HAL_DMA_IRQHandler+0x7f8>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
 8007548:	687b      	ldr	r3, [r7, #4]
 800754a:	681b      	ldr	r3, [r3, #0]
 800754c:	4a2c      	ldr	r2, [pc, #176]	@ (8007600 <HAL_DMA_IRQHandler+0x690>)
 800754e:	4293      	cmp	r3, r2
 8007550:	d04a      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 8007552:	687b      	ldr	r3, [r7, #4]
 8007554:	681b      	ldr	r3, [r3, #0]
 8007556:	4a2b      	ldr	r2, [pc, #172]	@ (8007604 <HAL_DMA_IRQHandler+0x694>)
 8007558:	4293      	cmp	r3, r2
 800755a:	d045      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 800755c:	687b      	ldr	r3, [r7, #4]
 800755e:	681b      	ldr	r3, [r3, #0]
 8007560:	4a29      	ldr	r2, [pc, #164]	@ (8007608 <HAL_DMA_IRQHandler+0x698>)
 8007562:	4293      	cmp	r3, r2
 8007564:	d040      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 8007566:	687b      	ldr	r3, [r7, #4]
 8007568:	681b      	ldr	r3, [r3, #0]
 800756a:	4a28      	ldr	r2, [pc, #160]	@ (800760c <HAL_DMA_IRQHandler+0x69c>)
 800756c:	4293      	cmp	r3, r2
 800756e:	d03b      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 8007570:	687b      	ldr	r3, [r7, #4]
 8007572:	681b      	ldr	r3, [r3, #0]
 8007574:	4a26      	ldr	r2, [pc, #152]	@ (8007610 <HAL_DMA_IRQHandler+0x6a0>)
 8007576:	4293      	cmp	r3, r2
 8007578:	d036      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 800757a:	687b      	ldr	r3, [r7, #4]
 800757c:	681b      	ldr	r3, [r3, #0]
 800757e:	4a25      	ldr	r2, [pc, #148]	@ (8007614 <HAL_DMA_IRQHandler+0x6a4>)
 8007580:	4293      	cmp	r3, r2
 8007582:	d031      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 8007584:	687b      	ldr	r3, [r7, #4]
 8007586:	681b      	ldr	r3, [r3, #0]
 8007588:	4a23      	ldr	r2, [pc, #140]	@ (8007618 <HAL_DMA_IRQHandler+0x6a8>)
 800758a:	4293      	cmp	r3, r2
 800758c:	d02c      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 800758e:	687b      	ldr	r3, [r7, #4]
 8007590:	681b      	ldr	r3, [r3, #0]
 8007592:	4a22      	ldr	r2, [pc, #136]	@ (800761c <HAL_DMA_IRQHandler+0x6ac>)
 8007594:	4293      	cmp	r3, r2
 8007596:	d027      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 8007598:	687b      	ldr	r3, [r7, #4]
 800759a:	681b      	ldr	r3, [r3, #0]
 800759c:	4a20      	ldr	r2, [pc, #128]	@ (8007620 <HAL_DMA_IRQHandler+0x6b0>)
 800759e:	4293      	cmp	r3, r2
 80075a0:	d022      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075a2:	687b      	ldr	r3, [r7, #4]
 80075a4:	681b      	ldr	r3, [r3, #0]
 80075a6:	4a1f      	ldr	r2, [pc, #124]	@ (8007624 <HAL_DMA_IRQHandler+0x6b4>)
 80075a8:	4293      	cmp	r3, r2
 80075aa:	d01d      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075ac:	687b      	ldr	r3, [r7, #4]
 80075ae:	681b      	ldr	r3, [r3, #0]
 80075b0:	4a1d      	ldr	r2, [pc, #116]	@ (8007628 <HAL_DMA_IRQHandler+0x6b8>)
 80075b2:	4293      	cmp	r3, r2
 80075b4:	d018      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075b6:	687b      	ldr	r3, [r7, #4]
 80075b8:	681b      	ldr	r3, [r3, #0]
 80075ba:	4a1c      	ldr	r2, [pc, #112]	@ (800762c <HAL_DMA_IRQHandler+0x6bc>)
 80075bc:	4293      	cmp	r3, r2
 80075be:	d013      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075c0:	687b      	ldr	r3, [r7, #4]
 80075c2:	681b      	ldr	r3, [r3, #0]
 80075c4:	4a1a      	ldr	r2, [pc, #104]	@ (8007630 <HAL_DMA_IRQHandler+0x6c0>)
 80075c6:	4293      	cmp	r3, r2
 80075c8:	d00e      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075ca:	687b      	ldr	r3, [r7, #4]
 80075cc:	681b      	ldr	r3, [r3, #0]
 80075ce:	4a19      	ldr	r2, [pc, #100]	@ (8007634 <HAL_DMA_IRQHandler+0x6c4>)
 80075d0:	4293      	cmp	r3, r2
 80075d2:	d009      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075d4:	687b      	ldr	r3, [r7, #4]
 80075d6:	681b      	ldr	r3, [r3, #0]
 80075d8:	4a17      	ldr	r2, [pc, #92]	@ (8007638 <HAL_DMA_IRQHandler+0x6c8>)
 80075da:	4293      	cmp	r3, r2
 80075dc:	d004      	beq.n	80075e8 <HAL_DMA_IRQHandler+0x678>
 80075de:	687b      	ldr	r3, [r7, #4]
 80075e0:	681b      	ldr	r3, [r3, #0]
 80075e2:	4a16      	ldr	r2, [pc, #88]	@ (800763c <HAL_DMA_IRQHandler+0x6cc>)
 80075e4:	4293      	cmp	r3, r2
 80075e6:	d12b      	bne.n	8007640 <HAL_DMA_IRQHandler+0x6d0>
 80075e8:	687b      	ldr	r3, [r7, #4]
 80075ea:	681b      	ldr	r3, [r3, #0]
 80075ec:	681b      	ldr	r3, [r3, #0]
 80075ee:	f003 0310 	and.w	r3, r3, #16
 80075f2:	2b00      	cmp	r3, #0
 80075f4:	bf14      	ite	ne
 80075f6:	2301      	movne	r3, #1
 80075f8:	2300      	moveq	r3, #0
 80075fa:	b2db      	uxtb	r3, r3
 80075fc:	e02a      	b.n	8007654 <HAL_DMA_IRQHandler+0x6e4>
 80075fe:	bf00      	nop
 8007600:	40020010 	.word	0x40020010
 8007604:	40020028 	.word	0x40020028
 8007608:	40020040 	.word	0x40020040
 800760c:	40020058 	.word	0x40020058
 8007610:	40020070 	.word	0x40020070
 8007614:	40020088 	.word	0x40020088
 8007618:	400200a0 	.word	0x400200a0
 800761c:	400200b8 	.word	0x400200b8
 8007620:	40020410 	.word	0x40020410
 8007624:	40020428 	.word	0x40020428
 8007628:	40020440 	.word	0x40020440
 800762c:	40020458 	.word	0x40020458
 8007630:	40020470 	.word	0x40020470
 8007634:	40020488 	.word	0x40020488
 8007638:	400204a0 	.word	0x400204a0
 800763c:	400204b8 	.word	0x400204b8
 8007640:	687b      	ldr	r3, [r7, #4]
 8007642:	681b      	ldr	r3, [r3, #0]
 8007644:	681b      	ldr	r3, [r3, #0]
 8007646:	f003 0302 	and.w	r3, r3, #2
 800764a:	2b00      	cmp	r3, #0
 800764c:	bf14      	ite	ne
 800764e:	2301      	movne	r3, #1
 8007650:	2300      	moveq	r3, #0
 8007652:	b2db      	uxtb	r3, r3
 8007654:	2b00      	cmp	r3, #0
 8007656:	f000 8087 	beq.w	8007768 <HAL_DMA_IRQHandler+0x7f8>
      {
        /* Clear the transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
 800765a:	687b      	ldr	r3, [r7, #4]
 800765c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800765e:	f003 031f 	and.w	r3, r3, #31
 8007662:	2220      	movs	r2, #32
 8007664:	409a      	lsls	r2, r3
 8007666:	6a3b      	ldr	r3, [r7, #32]
 8007668:	609a      	str	r2, [r3, #8]

        if(HAL_DMA_STATE_ABORT == hdma->State)
 800766a:	687b      	ldr	r3, [r7, #4]
 800766c:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8007670:	b2db      	uxtb	r3, r3
 8007672:	2b04      	cmp	r3, #4
 8007674:	d139      	bne.n	80076ea <HAL_DMA_IRQHandler+0x77a>
        {
          /* Disable all the transfer interrupts */
          ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
 8007676:	687b      	ldr	r3, [r7, #4]
 8007678:	681b      	ldr	r3, [r3, #0]
 800767a:	681a      	ldr	r2, [r3, #0]
 800767c:	687b      	ldr	r3, [r7, #4]
 800767e:	681b      	ldr	r3, [r3, #0]
 8007680:	f022 0216 	bic.w	r2, r2, #22
 8007684:	601a      	str	r2, [r3, #0]
          ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 8007686:	687b      	ldr	r3, [r7, #4]
 8007688:	681b      	ldr	r3, [r3, #0]
 800768a:	695a      	ldr	r2, [r3, #20]
 800768c:	687b      	ldr	r3, [r7, #4]
 800768e:	681b      	ldr	r3, [r3, #0]
 8007690:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 8007694:	615a      	str	r2, [r3, #20]

          if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
 8007696:	687b      	ldr	r3, [r7, #4]
 8007698:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800769a:	2b00      	cmp	r3, #0
 800769c:	d103      	bne.n	80076a6 <HAL_DMA_IRQHandler+0x736>
 800769e:	687b      	ldr	r3, [r7, #4]
 80076a0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80076a2:	2b00      	cmp	r3, #0
 80076a4:	d007      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x746>
          {
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 80076a6:	687b      	ldr	r3, [r7, #4]
 80076a8:	681b      	ldr	r3, [r3, #0]
 80076aa:	681a      	ldr	r2, [r3, #0]
 80076ac:	687b      	ldr	r3, [r7, #4]
 80076ae:	681b      	ldr	r3, [r3, #0]
 80076b0:	f022 0208 	bic.w	r2, r2, #8
 80076b4:	601a      	str	r2, [r3, #0]
          }

          /* Clear all interrupt flags at correct offset within the register */
          regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 80076b6:	687b      	ldr	r3, [r7, #4]
 80076b8:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80076ba:	f003 031f 	and.w	r3, r3, #31
 80076be:	223f      	movs	r2, #63	@ 0x3f
 80076c0:	409a      	lsls	r2, r3
 80076c2:	6a3b      	ldr	r3, [r7, #32]
 80076c4:	609a      	str	r2, [r3, #8]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 80076c6:	687b      	ldr	r3, [r7, #4]
 80076c8:	2201      	movs	r2, #1
 80076ca:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 80076ce:	687b      	ldr	r3, [r7, #4]
 80076d0:	2200      	movs	r2, #0
 80076d2:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

          if(hdma->XferAbortCallback != NULL)
 80076d6:	687b      	ldr	r3, [r7, #4]
 80076d8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80076da:	2b00      	cmp	r3, #0
 80076dc:	f000 834a 	beq.w	8007d74 <HAL_DMA_IRQHandler+0xe04>
          {
            hdma->XferAbortCallback(hdma);
 80076e0:	687b      	ldr	r3, [r7, #4]
 80076e2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80076e4:	6878      	ldr	r0, [r7, #4]
 80076e6:	4798      	blx	r3
          }
          return;
 80076e8:	e344      	b.n	8007d74 <HAL_DMA_IRQHandler+0xe04>
        }

        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 80076ea:	687b      	ldr	r3, [r7, #4]
 80076ec:	681b      	ldr	r3, [r3, #0]
 80076ee:	681b      	ldr	r3, [r3, #0]
 80076f0:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80076f4:	2b00      	cmp	r3, #0
 80076f6:	d018      	beq.n	800772a <HAL_DMA_IRQHandler+0x7ba>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 80076f8:	687b      	ldr	r3, [r7, #4]
 80076fa:	681b      	ldr	r3, [r3, #0]
 80076fc:	681b      	ldr	r3, [r3, #0]
 80076fe:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8007702:	2b00      	cmp	r3, #0
 8007704:	d108      	bne.n	8007718 <HAL_DMA_IRQHandler+0x7a8>
          {
            if(hdma->XferM1CpltCallback != NULL)
 8007706:	687b      	ldr	r3, [r7, #4]
 8007708:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800770a:	2b00      	cmp	r3, #0
 800770c:	d02c      	beq.n	8007768 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory1 */
              hdma->XferM1CpltCallback(hdma);
 800770e:	687b      	ldr	r3, [r7, #4]
 8007710:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007712:	6878      	ldr	r0, [r7, #4]
 8007714:	4798      	blx	r3
 8007716:	e027      	b.n	8007768 <HAL_DMA_IRQHandler+0x7f8>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferCpltCallback != NULL)
 8007718:	687b      	ldr	r3, [r7, #4]
 800771a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800771c:	2b00      	cmp	r3, #0
 800771e:	d023      	beq.n	8007768 <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory0 */
              hdma->XferCpltCallback(hdma);
 8007720:	687b      	ldr	r3, [r7, #4]
 8007722:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007724:	6878      	ldr	r0, [r7, #4]
 8007726:	4798      	blx	r3
 8007728:	e01e      	b.n	8007768 <HAL_DMA_IRQHandler+0x7f8>
          }
        }
        /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
        else
        {
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 800772a:	687b      	ldr	r3, [r7, #4]
 800772c:	681b      	ldr	r3, [r3, #0]
 800772e:	681b      	ldr	r3, [r3, #0]
 8007730:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8007734:	2b00      	cmp	r3, #0
 8007736:	d10f      	bne.n	8007758 <HAL_DMA_IRQHandler+0x7e8>
          {
            /* Disable the transfer complete interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC);
 8007738:	687b      	ldr	r3, [r7, #4]
 800773a:	681b      	ldr	r3, [r3, #0]
 800773c:	681a      	ldr	r2, [r3, #0]
 800773e:	687b      	ldr	r3, [r7, #4]
 8007740:	681b      	ldr	r3, [r3, #0]
 8007742:	f022 0210 	bic.w	r2, r2, #16
 8007746:	601a      	str	r2, [r3, #0]

            /* Change the DMA state */
            hdma->State = HAL_DMA_STATE_READY;
 8007748:	687b      	ldr	r3, [r7, #4]
 800774a:	2201      	movs	r2, #1
 800774c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

            /* Process Unlocked */
            __HAL_UNLOCK(hdma);
 8007750:	687b      	ldr	r3, [r7, #4]
 8007752:	2200      	movs	r2, #0
 8007754:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          }

          if(hdma->XferCpltCallback != NULL)
 8007758:	687b      	ldr	r3, [r7, #4]
 800775a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800775c:	2b00      	cmp	r3, #0
 800775e:	d003      	beq.n	8007768 <HAL_DMA_IRQHandler+0x7f8>
          {
            /* Transfer complete callback */
            hdma->XferCpltCallback(hdma);
 8007760:	687b      	ldr	r3, [r7, #4]
 8007762:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007764:	6878      	ldr	r0, [r7, #4]
 8007766:	4798      	blx	r3
        }
      }
    }

    /* manage error case */
    if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
 8007768:	687b      	ldr	r3, [r7, #4]
 800776a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800776c:	2b00      	cmp	r3, #0
 800776e:	f000 8306 	beq.w	8007d7e <HAL_DMA_IRQHandler+0xe0e>
    {
      if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
 8007772:	687b      	ldr	r3, [r7, #4]
 8007774:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007776:	f003 0301 	and.w	r3, r3, #1
 800777a:	2b00      	cmp	r3, #0
 800777c:	f000 8088 	beq.w	8007890 <HAL_DMA_IRQHandler+0x920>
      {
        hdma->State = HAL_DMA_STATE_ABORT;
 8007780:	687b      	ldr	r3, [r7, #4]
 8007782:	2204      	movs	r2, #4
 8007784:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Disable the stream */
        __HAL_DMA_DISABLE(hdma);
 8007788:	687b      	ldr	r3, [r7, #4]
 800778a:	681b      	ldr	r3, [r3, #0]
 800778c:	4a7a      	ldr	r2, [pc, #488]	@ (8007978 <HAL_DMA_IRQHandler+0xa08>)
 800778e:	4293      	cmp	r3, r2
 8007790:	d04a      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 8007792:	687b      	ldr	r3, [r7, #4]
 8007794:	681b      	ldr	r3, [r3, #0]
 8007796:	4a79      	ldr	r2, [pc, #484]	@ (800797c <HAL_DMA_IRQHandler+0xa0c>)
 8007798:	4293      	cmp	r3, r2
 800779a:	d045      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 800779c:	687b      	ldr	r3, [r7, #4]
 800779e:	681b      	ldr	r3, [r3, #0]
 80077a0:	4a77      	ldr	r2, [pc, #476]	@ (8007980 <HAL_DMA_IRQHandler+0xa10>)
 80077a2:	4293      	cmp	r3, r2
 80077a4:	d040      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077a6:	687b      	ldr	r3, [r7, #4]
 80077a8:	681b      	ldr	r3, [r3, #0]
 80077aa:	4a76      	ldr	r2, [pc, #472]	@ (8007984 <HAL_DMA_IRQHandler+0xa14>)
 80077ac:	4293      	cmp	r3, r2
 80077ae:	d03b      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077b0:	687b      	ldr	r3, [r7, #4]
 80077b2:	681b      	ldr	r3, [r3, #0]
 80077b4:	4a74      	ldr	r2, [pc, #464]	@ (8007988 <HAL_DMA_IRQHandler+0xa18>)
 80077b6:	4293      	cmp	r3, r2
 80077b8:	d036      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077ba:	687b      	ldr	r3, [r7, #4]
 80077bc:	681b      	ldr	r3, [r3, #0]
 80077be:	4a73      	ldr	r2, [pc, #460]	@ (800798c <HAL_DMA_IRQHandler+0xa1c>)
 80077c0:	4293      	cmp	r3, r2
 80077c2:	d031      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077c4:	687b      	ldr	r3, [r7, #4]
 80077c6:	681b      	ldr	r3, [r3, #0]
 80077c8:	4a71      	ldr	r2, [pc, #452]	@ (8007990 <HAL_DMA_IRQHandler+0xa20>)
 80077ca:	4293      	cmp	r3, r2
 80077cc:	d02c      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077ce:	687b      	ldr	r3, [r7, #4]
 80077d0:	681b      	ldr	r3, [r3, #0]
 80077d2:	4a70      	ldr	r2, [pc, #448]	@ (8007994 <HAL_DMA_IRQHandler+0xa24>)
 80077d4:	4293      	cmp	r3, r2
 80077d6:	d027      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077d8:	687b      	ldr	r3, [r7, #4]
 80077da:	681b      	ldr	r3, [r3, #0]
 80077dc:	4a6e      	ldr	r2, [pc, #440]	@ (8007998 <HAL_DMA_IRQHandler+0xa28>)
 80077de:	4293      	cmp	r3, r2
 80077e0:	d022      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077e2:	687b      	ldr	r3, [r7, #4]
 80077e4:	681b      	ldr	r3, [r3, #0]
 80077e6:	4a6d      	ldr	r2, [pc, #436]	@ (800799c <HAL_DMA_IRQHandler+0xa2c>)
 80077e8:	4293      	cmp	r3, r2
 80077ea:	d01d      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077ec:	687b      	ldr	r3, [r7, #4]
 80077ee:	681b      	ldr	r3, [r3, #0]
 80077f0:	4a6b      	ldr	r2, [pc, #428]	@ (80079a0 <HAL_DMA_IRQHandler+0xa30>)
 80077f2:	4293      	cmp	r3, r2
 80077f4:	d018      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 80077f6:	687b      	ldr	r3, [r7, #4]
 80077f8:	681b      	ldr	r3, [r3, #0]
 80077fa:	4a6a      	ldr	r2, [pc, #424]	@ (80079a4 <HAL_DMA_IRQHandler+0xa34>)
 80077fc:	4293      	cmp	r3, r2
 80077fe:	d013      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 8007800:	687b      	ldr	r3, [r7, #4]
 8007802:	681b      	ldr	r3, [r3, #0]
 8007804:	4a68      	ldr	r2, [pc, #416]	@ (80079a8 <HAL_DMA_IRQHandler+0xa38>)
 8007806:	4293      	cmp	r3, r2
 8007808:	d00e      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 800780a:	687b      	ldr	r3, [r7, #4]
 800780c:	681b      	ldr	r3, [r3, #0]
 800780e:	4a67      	ldr	r2, [pc, #412]	@ (80079ac <HAL_DMA_IRQHandler+0xa3c>)
 8007810:	4293      	cmp	r3, r2
 8007812:	d009      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 8007814:	687b      	ldr	r3, [r7, #4]
 8007816:	681b      	ldr	r3, [r3, #0]
 8007818:	4a65      	ldr	r2, [pc, #404]	@ (80079b0 <HAL_DMA_IRQHandler+0xa40>)
 800781a:	4293      	cmp	r3, r2
 800781c:	d004      	beq.n	8007828 <HAL_DMA_IRQHandler+0x8b8>
 800781e:	687b      	ldr	r3, [r7, #4]
 8007820:	681b      	ldr	r3, [r3, #0]
 8007822:	4a64      	ldr	r2, [pc, #400]	@ (80079b4 <HAL_DMA_IRQHandler+0xa44>)
 8007824:	4293      	cmp	r3, r2
 8007826:	d108      	bne.n	800783a <HAL_DMA_IRQHandler+0x8ca>
 8007828:	687b      	ldr	r3, [r7, #4]
 800782a:	681b      	ldr	r3, [r3, #0]
 800782c:	681a      	ldr	r2, [r3, #0]
 800782e:	687b      	ldr	r3, [r7, #4]
 8007830:	681b      	ldr	r3, [r3, #0]
 8007832:	f022 0201 	bic.w	r2, r2, #1
 8007836:	601a      	str	r2, [r3, #0]
 8007838:	e007      	b.n	800784a <HAL_DMA_IRQHandler+0x8da>
 800783a:	687b      	ldr	r3, [r7, #4]
 800783c:	681b      	ldr	r3, [r3, #0]
 800783e:	681a      	ldr	r2, [r3, #0]
 8007840:	687b      	ldr	r3, [r7, #4]
 8007842:	681b      	ldr	r3, [r3, #0]
 8007844:	f022 0201 	bic.w	r2, r2, #1
 8007848:	601a      	str	r2, [r3, #0]

        do
        {
          if (++count > timeout)
 800784a:	68fb      	ldr	r3, [r7, #12]
 800784c:	3301      	adds	r3, #1
 800784e:	60fb      	str	r3, [r7, #12]
 8007850:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8007852:	429a      	cmp	r2, r3
 8007854:	d307      	bcc.n	8007866 <HAL_DMA_IRQHandler+0x8f6>
          {
            break;
          }
        }
        while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
 8007856:	687b      	ldr	r3, [r7, #4]
 8007858:	681b      	ldr	r3, [r3, #0]
 800785a:	681b      	ldr	r3, [r3, #0]
 800785c:	f003 0301 	and.w	r3, r3, #1
 8007860:	2b00      	cmp	r3, #0
 8007862:	d1f2      	bne.n	800784a <HAL_DMA_IRQHandler+0x8da>
 8007864:	e000      	b.n	8007868 <HAL_DMA_IRQHandler+0x8f8>
            break;
 8007866:	bf00      	nop

        if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8007868:	687b      	ldr	r3, [r7, #4]
 800786a:	681b      	ldr	r3, [r3, #0]
 800786c:	681b      	ldr	r3, [r3, #0]
 800786e:	f003 0301 	and.w	r3, r3, #1
 8007872:	2b00      	cmp	r3, #0
 8007874:	d004      	beq.n	8007880 <HAL_DMA_IRQHandler+0x910>
        {
          /* Change the DMA state to error if DMA disable fails */
          hdma->State = HAL_DMA_STATE_ERROR;
 8007876:	687b      	ldr	r3, [r7, #4]
 8007878:	2203      	movs	r2, #3
 800787a:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
 800787e:	e003      	b.n	8007888 <HAL_DMA_IRQHandler+0x918>
        }
        else
        {
          /* Change the DMA state to Ready if DMA disable success */
          hdma->State = HAL_DMA_STATE_READY;
 8007880:	687b      	ldr	r3, [r7, #4]
 8007882:	2201      	movs	r2, #1
 8007884:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
        }

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8007888:	687b      	ldr	r3, [r7, #4]
 800788a:	2200      	movs	r2, #0
 800788c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }

      if(hdma->XferErrorCallback != NULL)
 8007890:	687b      	ldr	r3, [r7, #4]
 8007892:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007894:	2b00      	cmp	r3, #0
 8007896:	f000 8272 	beq.w	8007d7e <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 800789a:	687b      	ldr	r3, [r7, #4]
 800789c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800789e:	6878      	ldr	r0, [r7, #4]
 80078a0:	4798      	blx	r3
 80078a2:	e26c      	b.n	8007d7e <HAL_DMA_IRQHandler+0xe0e>
      }
    }
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U)  /* BDMA instance(s) */
 80078a4:	687b      	ldr	r3, [r7, #4]
 80078a6:	681b      	ldr	r3, [r3, #0]
 80078a8:	4a43      	ldr	r2, [pc, #268]	@ (80079b8 <HAL_DMA_IRQHandler+0xa48>)
 80078aa:	4293      	cmp	r3, r2
 80078ac:	d022      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078ae:	687b      	ldr	r3, [r7, #4]
 80078b0:	681b      	ldr	r3, [r3, #0]
 80078b2:	4a42      	ldr	r2, [pc, #264]	@ (80079bc <HAL_DMA_IRQHandler+0xa4c>)
 80078b4:	4293      	cmp	r3, r2
 80078b6:	d01d      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078b8:	687b      	ldr	r3, [r7, #4]
 80078ba:	681b      	ldr	r3, [r3, #0]
 80078bc:	4a40      	ldr	r2, [pc, #256]	@ (80079c0 <HAL_DMA_IRQHandler+0xa50>)
 80078be:	4293      	cmp	r3, r2
 80078c0:	d018      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078c2:	687b      	ldr	r3, [r7, #4]
 80078c4:	681b      	ldr	r3, [r3, #0]
 80078c6:	4a3f      	ldr	r2, [pc, #252]	@ (80079c4 <HAL_DMA_IRQHandler+0xa54>)
 80078c8:	4293      	cmp	r3, r2
 80078ca:	d013      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078cc:	687b      	ldr	r3, [r7, #4]
 80078ce:	681b      	ldr	r3, [r3, #0]
 80078d0:	4a3d      	ldr	r2, [pc, #244]	@ (80079c8 <HAL_DMA_IRQHandler+0xa58>)
 80078d2:	4293      	cmp	r3, r2
 80078d4:	d00e      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078d6:	687b      	ldr	r3, [r7, #4]
 80078d8:	681b      	ldr	r3, [r3, #0]
 80078da:	4a3c      	ldr	r2, [pc, #240]	@ (80079cc <HAL_DMA_IRQHandler+0xa5c>)
 80078dc:	4293      	cmp	r3, r2
 80078de:	d009      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078e0:	687b      	ldr	r3, [r7, #4]
 80078e2:	681b      	ldr	r3, [r3, #0]
 80078e4:	4a3a      	ldr	r2, [pc, #232]	@ (80079d0 <HAL_DMA_IRQHandler+0xa60>)
 80078e6:	4293      	cmp	r3, r2
 80078e8:	d004      	beq.n	80078f4 <HAL_DMA_IRQHandler+0x984>
 80078ea:	687b      	ldr	r3, [r7, #4]
 80078ec:	681b      	ldr	r3, [r3, #0]
 80078ee:	4a39      	ldr	r2, [pc, #228]	@ (80079d4 <HAL_DMA_IRQHandler+0xa64>)
 80078f0:	4293      	cmp	r3, r2
 80078f2:	d101      	bne.n	80078f8 <HAL_DMA_IRQHandler+0x988>
 80078f4:	2301      	movs	r3, #1
 80078f6:	e000      	b.n	80078fa <HAL_DMA_IRQHandler+0x98a>
 80078f8:	2300      	movs	r3, #0
 80078fa:	2b00      	cmp	r3, #0
 80078fc:	f000 823f 	beq.w	8007d7e <HAL_DMA_IRQHandler+0xe0e>
  {
    ccr_reg = (((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR);
 8007900:	687b      	ldr	r3, [r7, #4]
 8007902:	681b      	ldr	r3, [r3, #0]
 8007904:	681b      	ldr	r3, [r3, #0]
 8007906:	613b      	str	r3, [r7, #16]

    /* Half Transfer Complete Interrupt management ******************************/
    if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
 8007908:	687b      	ldr	r3, [r7, #4]
 800790a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800790c:	f003 031f 	and.w	r3, r3, #31
 8007910:	2204      	movs	r2, #4
 8007912:	409a      	lsls	r2, r3
 8007914:	697b      	ldr	r3, [r7, #20]
 8007916:	4013      	ands	r3, r2
 8007918:	2b00      	cmp	r3, #0
 800791a:	f000 80cd 	beq.w	8007ab8 <HAL_DMA_IRQHandler+0xb48>
 800791e:	693b      	ldr	r3, [r7, #16]
 8007920:	f003 0304 	and.w	r3, r3, #4
 8007924:	2b00      	cmp	r3, #0
 8007926:	f000 80c7 	beq.w	8007ab8 <HAL_DMA_IRQHandler+0xb48>
    {
      /* Clear the half transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
 800792a:	687b      	ldr	r3, [r7, #4]
 800792c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800792e:	f003 031f 	and.w	r3, r3, #31
 8007932:	2204      	movs	r2, #4
 8007934:	409a      	lsls	r2, r3
 8007936:	69fb      	ldr	r3, [r7, #28]
 8007938:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 800793a:	693b      	ldr	r3, [r7, #16]
 800793c:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8007940:	2b00      	cmp	r3, #0
 8007942:	d049      	beq.n	80079d8 <HAL_DMA_IRQHandler+0xa68>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8007944:	693b      	ldr	r3, [r7, #16]
 8007946:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800794a:	2b00      	cmp	r3, #0
 800794c:	d109      	bne.n	8007962 <HAL_DMA_IRQHandler+0x9f2>
        {
          if(hdma->XferM1HalfCpltCallback != NULL)
 800794e:	687b      	ldr	r3, [r7, #4]
 8007950:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007952:	2b00      	cmp	r3, #0
 8007954:	f000 8210 	beq.w	8007d78 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 1 */
            hdma->XferM1HalfCpltCallback(hdma);
 8007958:	687b      	ldr	r3, [r7, #4]
 800795a:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800795c:	6878      	ldr	r0, [r7, #4]
 800795e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007960:	e20a      	b.n	8007d78 <HAL_DMA_IRQHandler+0xe08>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferHalfCpltCallback != NULL)
 8007962:	687b      	ldr	r3, [r7, #4]
 8007964:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007966:	2b00      	cmp	r3, #0
 8007968:	f000 8206 	beq.w	8007d78 <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 0 */
            hdma->XferHalfCpltCallback(hdma);
 800796c:	687b      	ldr	r3, [r7, #4]
 800796e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007970:	6878      	ldr	r0, [r7, #4]
 8007972:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007974:	e200      	b.n	8007d78 <HAL_DMA_IRQHandler+0xe08>
 8007976:	bf00      	nop
 8007978:	40020010 	.word	0x40020010
 800797c:	40020028 	.word	0x40020028
 8007980:	40020040 	.word	0x40020040
 8007984:	40020058 	.word	0x40020058
 8007988:	40020070 	.word	0x40020070
 800798c:	40020088 	.word	0x40020088
 8007990:	400200a0 	.word	0x400200a0
 8007994:	400200b8 	.word	0x400200b8
 8007998:	40020410 	.word	0x40020410
 800799c:	40020428 	.word	0x40020428
 80079a0:	40020440 	.word	0x40020440
 80079a4:	40020458 	.word	0x40020458
 80079a8:	40020470 	.word	0x40020470
 80079ac:	40020488 	.word	0x40020488
 80079b0:	400204a0 	.word	0x400204a0
 80079b4:	400204b8 	.word	0x400204b8
 80079b8:	58025408 	.word	0x58025408
 80079bc:	5802541c 	.word	0x5802541c
 80079c0:	58025430 	.word	0x58025430
 80079c4:	58025444 	.word	0x58025444
 80079c8:	58025458 	.word	0x58025458
 80079cc:	5802546c 	.word	0x5802546c
 80079d0:	58025480 	.word	0x58025480
 80079d4:	58025494 	.word	0x58025494
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 80079d8:	693b      	ldr	r3, [r7, #16]
 80079da:	f003 0320 	and.w	r3, r3, #32
 80079de:	2b00      	cmp	r3, #0
 80079e0:	d160      	bne.n	8007aa4 <HAL_DMA_IRQHandler+0xb34>
        {
          /* Disable the half transfer interrupt */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 80079e2:	687b      	ldr	r3, [r7, #4]
 80079e4:	681b      	ldr	r3, [r3, #0]
 80079e6:	4a7f      	ldr	r2, [pc, #508]	@ (8007be4 <HAL_DMA_IRQHandler+0xc74>)
 80079e8:	4293      	cmp	r3, r2
 80079ea:	d04a      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 80079ec:	687b      	ldr	r3, [r7, #4]
 80079ee:	681b      	ldr	r3, [r3, #0]
 80079f0:	4a7d      	ldr	r2, [pc, #500]	@ (8007be8 <HAL_DMA_IRQHandler+0xc78>)
 80079f2:	4293      	cmp	r3, r2
 80079f4:	d045      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 80079f6:	687b      	ldr	r3, [r7, #4]
 80079f8:	681b      	ldr	r3, [r3, #0]
 80079fa:	4a7c      	ldr	r2, [pc, #496]	@ (8007bec <HAL_DMA_IRQHandler+0xc7c>)
 80079fc:	4293      	cmp	r3, r2
 80079fe:	d040      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a00:	687b      	ldr	r3, [r7, #4]
 8007a02:	681b      	ldr	r3, [r3, #0]
 8007a04:	4a7a      	ldr	r2, [pc, #488]	@ (8007bf0 <HAL_DMA_IRQHandler+0xc80>)
 8007a06:	4293      	cmp	r3, r2
 8007a08:	d03b      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a0a:	687b      	ldr	r3, [r7, #4]
 8007a0c:	681b      	ldr	r3, [r3, #0]
 8007a0e:	4a79      	ldr	r2, [pc, #484]	@ (8007bf4 <HAL_DMA_IRQHandler+0xc84>)
 8007a10:	4293      	cmp	r3, r2
 8007a12:	d036      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a14:	687b      	ldr	r3, [r7, #4]
 8007a16:	681b      	ldr	r3, [r3, #0]
 8007a18:	4a77      	ldr	r2, [pc, #476]	@ (8007bf8 <HAL_DMA_IRQHandler+0xc88>)
 8007a1a:	4293      	cmp	r3, r2
 8007a1c:	d031      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a1e:	687b      	ldr	r3, [r7, #4]
 8007a20:	681b      	ldr	r3, [r3, #0]
 8007a22:	4a76      	ldr	r2, [pc, #472]	@ (8007bfc <HAL_DMA_IRQHandler+0xc8c>)
 8007a24:	4293      	cmp	r3, r2
 8007a26:	d02c      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a28:	687b      	ldr	r3, [r7, #4]
 8007a2a:	681b      	ldr	r3, [r3, #0]
 8007a2c:	4a74      	ldr	r2, [pc, #464]	@ (8007c00 <HAL_DMA_IRQHandler+0xc90>)
 8007a2e:	4293      	cmp	r3, r2
 8007a30:	d027      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a32:	687b      	ldr	r3, [r7, #4]
 8007a34:	681b      	ldr	r3, [r3, #0]
 8007a36:	4a73      	ldr	r2, [pc, #460]	@ (8007c04 <HAL_DMA_IRQHandler+0xc94>)
 8007a38:	4293      	cmp	r3, r2
 8007a3a:	d022      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a3c:	687b      	ldr	r3, [r7, #4]
 8007a3e:	681b      	ldr	r3, [r3, #0]
 8007a40:	4a71      	ldr	r2, [pc, #452]	@ (8007c08 <HAL_DMA_IRQHandler+0xc98>)
 8007a42:	4293      	cmp	r3, r2
 8007a44:	d01d      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a46:	687b      	ldr	r3, [r7, #4]
 8007a48:	681b      	ldr	r3, [r3, #0]
 8007a4a:	4a70      	ldr	r2, [pc, #448]	@ (8007c0c <HAL_DMA_IRQHandler+0xc9c>)
 8007a4c:	4293      	cmp	r3, r2
 8007a4e:	d018      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a50:	687b      	ldr	r3, [r7, #4]
 8007a52:	681b      	ldr	r3, [r3, #0]
 8007a54:	4a6e      	ldr	r2, [pc, #440]	@ (8007c10 <HAL_DMA_IRQHandler+0xca0>)
 8007a56:	4293      	cmp	r3, r2
 8007a58:	d013      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a5a:	687b      	ldr	r3, [r7, #4]
 8007a5c:	681b      	ldr	r3, [r3, #0]
 8007a5e:	4a6d      	ldr	r2, [pc, #436]	@ (8007c14 <HAL_DMA_IRQHandler+0xca4>)
 8007a60:	4293      	cmp	r3, r2
 8007a62:	d00e      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a64:	687b      	ldr	r3, [r7, #4]
 8007a66:	681b      	ldr	r3, [r3, #0]
 8007a68:	4a6b      	ldr	r2, [pc, #428]	@ (8007c18 <HAL_DMA_IRQHandler+0xca8>)
 8007a6a:	4293      	cmp	r3, r2
 8007a6c:	d009      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a6e:	687b      	ldr	r3, [r7, #4]
 8007a70:	681b      	ldr	r3, [r3, #0]
 8007a72:	4a6a      	ldr	r2, [pc, #424]	@ (8007c1c <HAL_DMA_IRQHandler+0xcac>)
 8007a74:	4293      	cmp	r3, r2
 8007a76:	d004      	beq.n	8007a82 <HAL_DMA_IRQHandler+0xb12>
 8007a78:	687b      	ldr	r3, [r7, #4]
 8007a7a:	681b      	ldr	r3, [r3, #0]
 8007a7c:	4a68      	ldr	r2, [pc, #416]	@ (8007c20 <HAL_DMA_IRQHandler+0xcb0>)
 8007a7e:	4293      	cmp	r3, r2
 8007a80:	d108      	bne.n	8007a94 <HAL_DMA_IRQHandler+0xb24>
 8007a82:	687b      	ldr	r3, [r7, #4]
 8007a84:	681b      	ldr	r3, [r3, #0]
 8007a86:	681a      	ldr	r2, [r3, #0]
 8007a88:	687b      	ldr	r3, [r7, #4]
 8007a8a:	681b      	ldr	r3, [r3, #0]
 8007a8c:	f022 0208 	bic.w	r2, r2, #8
 8007a90:	601a      	str	r2, [r3, #0]
 8007a92:	e007      	b.n	8007aa4 <HAL_DMA_IRQHandler+0xb34>
 8007a94:	687b      	ldr	r3, [r7, #4]
 8007a96:	681b      	ldr	r3, [r3, #0]
 8007a98:	681a      	ldr	r2, [r3, #0]
 8007a9a:	687b      	ldr	r3, [r7, #4]
 8007a9c:	681b      	ldr	r3, [r3, #0]
 8007a9e:	f022 0204 	bic.w	r2, r2, #4
 8007aa2:	601a      	str	r2, [r3, #0]
        }

        /* DMA peripheral state is not updated in Half Transfer */
        /* but in Transfer Complete case */

       if(hdma->XferHalfCpltCallback != NULL)
 8007aa4:	687b      	ldr	r3, [r7, #4]
 8007aa6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007aa8:	2b00      	cmp	r3, #0
 8007aaa:	f000 8165 	beq.w	8007d78 <HAL_DMA_IRQHandler+0xe08>
        {
          /* Half transfer callback */
          hdma->XferHalfCpltCallback(hdma);
 8007aae:	687b      	ldr	r3, [r7, #4]
 8007ab0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007ab2:	6878      	ldr	r0, [r7, #4]
 8007ab4:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007ab6:	e15f      	b.n	8007d78 <HAL_DMA_IRQHandler+0xe08>
        }
      }
    }

    /* Transfer Complete Interrupt management ***********************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
 8007ab8:	687b      	ldr	r3, [r7, #4]
 8007aba:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007abc:	f003 031f 	and.w	r3, r3, #31
 8007ac0:	2202      	movs	r2, #2
 8007ac2:	409a      	lsls	r2, r3
 8007ac4:	697b      	ldr	r3, [r7, #20]
 8007ac6:	4013      	ands	r3, r2
 8007ac8:	2b00      	cmp	r3, #0
 8007aca:	f000 80c5 	beq.w	8007c58 <HAL_DMA_IRQHandler+0xce8>
 8007ace:	693b      	ldr	r3, [r7, #16]
 8007ad0:	f003 0302 	and.w	r3, r3, #2
 8007ad4:	2b00      	cmp	r3, #0
 8007ad6:	f000 80bf 	beq.w	8007c58 <HAL_DMA_IRQHandler+0xce8>
    {
      /* Clear the transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
 8007ada:	687b      	ldr	r3, [r7, #4]
 8007adc:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007ade:	f003 031f 	and.w	r3, r3, #31
 8007ae2:	2202      	movs	r2, #2
 8007ae4:	409a      	lsls	r2, r3
 8007ae6:	69fb      	ldr	r3, [r7, #28]
 8007ae8:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007aea:	693b      	ldr	r3, [r7, #16]
 8007aec:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8007af0:	2b00      	cmp	r3, #0
 8007af2:	d018      	beq.n	8007b26 <HAL_DMA_IRQHandler+0xbb6>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8007af4:	693b      	ldr	r3, [r7, #16]
 8007af6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8007afa:	2b00      	cmp	r3, #0
 8007afc:	d109      	bne.n	8007b12 <HAL_DMA_IRQHandler+0xba2>
        {
          if(hdma->XferM1CpltCallback != NULL)
 8007afe:	687b      	ldr	r3, [r7, #4]
 8007b00:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007b02:	2b00      	cmp	r3, #0
 8007b04:	f000 813a 	beq.w	8007d7c <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 1 */
            hdma->XferM1CpltCallback(hdma);
 8007b08:	687b      	ldr	r3, [r7, #4]
 8007b0a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007b0c:	6878      	ldr	r0, [r7, #4]
 8007b0e:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007b10:	e134      	b.n	8007d7c <HAL_DMA_IRQHandler+0xe0c>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferCpltCallback != NULL)
 8007b12:	687b      	ldr	r3, [r7, #4]
 8007b14:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007b16:	2b00      	cmp	r3, #0
 8007b18:	f000 8130 	beq.w	8007d7c <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 0 */
            hdma->XferCpltCallback(hdma);
 8007b1c:	687b      	ldr	r3, [r7, #4]
 8007b1e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007b20:	6878      	ldr	r0, [r7, #4]
 8007b22:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007b24:	e12a      	b.n	8007d7c <HAL_DMA_IRQHandler+0xe0c>
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007b26:	693b      	ldr	r3, [r7, #16]
 8007b28:	f003 0320 	and.w	r3, r3, #32
 8007b2c:	2b00      	cmp	r3, #0
 8007b2e:	f040 8089 	bne.w	8007c44 <HAL_DMA_IRQHandler+0xcd4>
        {
          /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 8007b32:	687b      	ldr	r3, [r7, #4]
 8007b34:	681b      	ldr	r3, [r3, #0]
 8007b36:	4a2b      	ldr	r2, [pc, #172]	@ (8007be4 <HAL_DMA_IRQHandler+0xc74>)
 8007b38:	4293      	cmp	r3, r2
 8007b3a:	d04a      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b3c:	687b      	ldr	r3, [r7, #4]
 8007b3e:	681b      	ldr	r3, [r3, #0]
 8007b40:	4a29      	ldr	r2, [pc, #164]	@ (8007be8 <HAL_DMA_IRQHandler+0xc78>)
 8007b42:	4293      	cmp	r3, r2
 8007b44:	d045      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b46:	687b      	ldr	r3, [r7, #4]
 8007b48:	681b      	ldr	r3, [r3, #0]
 8007b4a:	4a28      	ldr	r2, [pc, #160]	@ (8007bec <HAL_DMA_IRQHandler+0xc7c>)
 8007b4c:	4293      	cmp	r3, r2
 8007b4e:	d040      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b50:	687b      	ldr	r3, [r7, #4]
 8007b52:	681b      	ldr	r3, [r3, #0]
 8007b54:	4a26      	ldr	r2, [pc, #152]	@ (8007bf0 <HAL_DMA_IRQHandler+0xc80>)
 8007b56:	4293      	cmp	r3, r2
 8007b58:	d03b      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b5a:	687b      	ldr	r3, [r7, #4]
 8007b5c:	681b      	ldr	r3, [r3, #0]
 8007b5e:	4a25      	ldr	r2, [pc, #148]	@ (8007bf4 <HAL_DMA_IRQHandler+0xc84>)
 8007b60:	4293      	cmp	r3, r2
 8007b62:	d036      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b64:	687b      	ldr	r3, [r7, #4]
 8007b66:	681b      	ldr	r3, [r3, #0]
 8007b68:	4a23      	ldr	r2, [pc, #140]	@ (8007bf8 <HAL_DMA_IRQHandler+0xc88>)
 8007b6a:	4293      	cmp	r3, r2
 8007b6c:	d031      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b6e:	687b      	ldr	r3, [r7, #4]
 8007b70:	681b      	ldr	r3, [r3, #0]
 8007b72:	4a22      	ldr	r2, [pc, #136]	@ (8007bfc <HAL_DMA_IRQHandler+0xc8c>)
 8007b74:	4293      	cmp	r3, r2
 8007b76:	d02c      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b78:	687b      	ldr	r3, [r7, #4]
 8007b7a:	681b      	ldr	r3, [r3, #0]
 8007b7c:	4a20      	ldr	r2, [pc, #128]	@ (8007c00 <HAL_DMA_IRQHandler+0xc90>)
 8007b7e:	4293      	cmp	r3, r2
 8007b80:	d027      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b82:	687b      	ldr	r3, [r7, #4]
 8007b84:	681b      	ldr	r3, [r3, #0]
 8007b86:	4a1f      	ldr	r2, [pc, #124]	@ (8007c04 <HAL_DMA_IRQHandler+0xc94>)
 8007b88:	4293      	cmp	r3, r2
 8007b8a:	d022      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b8c:	687b      	ldr	r3, [r7, #4]
 8007b8e:	681b      	ldr	r3, [r3, #0]
 8007b90:	4a1d      	ldr	r2, [pc, #116]	@ (8007c08 <HAL_DMA_IRQHandler+0xc98>)
 8007b92:	4293      	cmp	r3, r2
 8007b94:	d01d      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007b96:	687b      	ldr	r3, [r7, #4]
 8007b98:	681b      	ldr	r3, [r3, #0]
 8007b9a:	4a1c      	ldr	r2, [pc, #112]	@ (8007c0c <HAL_DMA_IRQHandler+0xc9c>)
 8007b9c:	4293      	cmp	r3, r2
 8007b9e:	d018      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007ba0:	687b      	ldr	r3, [r7, #4]
 8007ba2:	681b      	ldr	r3, [r3, #0]
 8007ba4:	4a1a      	ldr	r2, [pc, #104]	@ (8007c10 <HAL_DMA_IRQHandler+0xca0>)
 8007ba6:	4293      	cmp	r3, r2
 8007ba8:	d013      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007baa:	687b      	ldr	r3, [r7, #4]
 8007bac:	681b      	ldr	r3, [r3, #0]
 8007bae:	4a19      	ldr	r2, [pc, #100]	@ (8007c14 <HAL_DMA_IRQHandler+0xca4>)
 8007bb0:	4293      	cmp	r3, r2
 8007bb2:	d00e      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007bb4:	687b      	ldr	r3, [r7, #4]
 8007bb6:	681b      	ldr	r3, [r3, #0]
 8007bb8:	4a17      	ldr	r2, [pc, #92]	@ (8007c18 <HAL_DMA_IRQHandler+0xca8>)
 8007bba:	4293      	cmp	r3, r2
 8007bbc:	d009      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007bbe:	687b      	ldr	r3, [r7, #4]
 8007bc0:	681b      	ldr	r3, [r3, #0]
 8007bc2:	4a16      	ldr	r2, [pc, #88]	@ (8007c1c <HAL_DMA_IRQHandler+0xcac>)
 8007bc4:	4293      	cmp	r3, r2
 8007bc6:	d004      	beq.n	8007bd2 <HAL_DMA_IRQHandler+0xc62>
 8007bc8:	687b      	ldr	r3, [r7, #4]
 8007bca:	681b      	ldr	r3, [r3, #0]
 8007bcc:	4a14      	ldr	r2, [pc, #80]	@ (8007c20 <HAL_DMA_IRQHandler+0xcb0>)
 8007bce:	4293      	cmp	r3, r2
 8007bd0:	d128      	bne.n	8007c24 <HAL_DMA_IRQHandler+0xcb4>
 8007bd2:	687b      	ldr	r3, [r7, #4]
 8007bd4:	681b      	ldr	r3, [r3, #0]
 8007bd6:	681a      	ldr	r2, [r3, #0]
 8007bd8:	687b      	ldr	r3, [r7, #4]
 8007bda:	681b      	ldr	r3, [r3, #0]
 8007bdc:	f022 0214 	bic.w	r2, r2, #20
 8007be0:	601a      	str	r2, [r3, #0]
 8007be2:	e027      	b.n	8007c34 <HAL_DMA_IRQHandler+0xcc4>
 8007be4:	40020010 	.word	0x40020010
 8007be8:	40020028 	.word	0x40020028
 8007bec:	40020040 	.word	0x40020040
 8007bf0:	40020058 	.word	0x40020058
 8007bf4:	40020070 	.word	0x40020070
 8007bf8:	40020088 	.word	0x40020088
 8007bfc:	400200a0 	.word	0x400200a0
 8007c00:	400200b8 	.word	0x400200b8
 8007c04:	40020410 	.word	0x40020410
 8007c08:	40020428 	.word	0x40020428
 8007c0c:	40020440 	.word	0x40020440
 8007c10:	40020458 	.word	0x40020458
 8007c14:	40020470 	.word	0x40020470
 8007c18:	40020488 	.word	0x40020488
 8007c1c:	400204a0 	.word	0x400204a0
 8007c20:	400204b8 	.word	0x400204b8
 8007c24:	687b      	ldr	r3, [r7, #4]
 8007c26:	681b      	ldr	r3, [r3, #0]
 8007c28:	681a      	ldr	r2, [r3, #0]
 8007c2a:	687b      	ldr	r3, [r7, #4]
 8007c2c:	681b      	ldr	r3, [r3, #0]
 8007c2e:	f022 020a 	bic.w	r2, r2, #10
 8007c32:	601a      	str	r2, [r3, #0]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007c34:	687b      	ldr	r3, [r7, #4]
 8007c36:	2201      	movs	r2, #1
 8007c38:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 8007c3c:	687b      	ldr	r3, [r7, #4]
 8007c3e:	2200      	movs	r2, #0
 8007c40:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
        }

        if(hdma->XferCpltCallback != NULL)
 8007c44:	687b      	ldr	r3, [r7, #4]
 8007c46:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007c48:	2b00      	cmp	r3, #0
 8007c4a:	f000 8097 	beq.w	8007d7c <HAL_DMA_IRQHandler+0xe0c>
        {
          /* Transfer complete callback */
          hdma->XferCpltCallback(hdma);
 8007c4e:	687b      	ldr	r3, [r7, #4]
 8007c50:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007c52:	6878      	ldr	r0, [r7, #4]
 8007c54:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007c56:	e091      	b.n	8007d7c <HAL_DMA_IRQHandler+0xe0c>
        }
      }
    }
    /* Transfer Error Interrupt management **************************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
 8007c58:	687b      	ldr	r3, [r7, #4]
 8007c5a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007c5c:	f003 031f 	and.w	r3, r3, #31
 8007c60:	2208      	movs	r2, #8
 8007c62:	409a      	lsls	r2, r3
 8007c64:	697b      	ldr	r3, [r7, #20]
 8007c66:	4013      	ands	r3, r2
 8007c68:	2b00      	cmp	r3, #0
 8007c6a:	f000 8088 	beq.w	8007d7e <HAL_DMA_IRQHandler+0xe0e>
 8007c6e:	693b      	ldr	r3, [r7, #16]
 8007c70:	f003 0308 	and.w	r3, r3, #8
 8007c74:	2b00      	cmp	r3, #0
 8007c76:	f000 8082 	beq.w	8007d7e <HAL_DMA_IRQHandler+0xe0e>
    {
      /* When a DMA transfer error occurs */
      /* A hardware clear of its EN bits is performed */
      /* Disable ALL DMA IT */
      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8007c7a:	687b      	ldr	r3, [r7, #4]
 8007c7c:	681b      	ldr	r3, [r3, #0]
 8007c7e:	4a41      	ldr	r2, [pc, #260]	@ (8007d84 <HAL_DMA_IRQHandler+0xe14>)
 8007c80:	4293      	cmp	r3, r2
 8007c82:	d04a      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007c84:	687b      	ldr	r3, [r7, #4]
 8007c86:	681b      	ldr	r3, [r3, #0]
 8007c88:	4a3f      	ldr	r2, [pc, #252]	@ (8007d88 <HAL_DMA_IRQHandler+0xe18>)
 8007c8a:	4293      	cmp	r3, r2
 8007c8c:	d045      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007c8e:	687b      	ldr	r3, [r7, #4]
 8007c90:	681b      	ldr	r3, [r3, #0]
 8007c92:	4a3e      	ldr	r2, [pc, #248]	@ (8007d8c <HAL_DMA_IRQHandler+0xe1c>)
 8007c94:	4293      	cmp	r3, r2
 8007c96:	d040      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007c98:	687b      	ldr	r3, [r7, #4]
 8007c9a:	681b      	ldr	r3, [r3, #0]
 8007c9c:	4a3c      	ldr	r2, [pc, #240]	@ (8007d90 <HAL_DMA_IRQHandler+0xe20>)
 8007c9e:	4293      	cmp	r3, r2
 8007ca0:	d03b      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007ca2:	687b      	ldr	r3, [r7, #4]
 8007ca4:	681b      	ldr	r3, [r3, #0]
 8007ca6:	4a3b      	ldr	r2, [pc, #236]	@ (8007d94 <HAL_DMA_IRQHandler+0xe24>)
 8007ca8:	4293      	cmp	r3, r2
 8007caa:	d036      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cac:	687b      	ldr	r3, [r7, #4]
 8007cae:	681b      	ldr	r3, [r3, #0]
 8007cb0:	4a39      	ldr	r2, [pc, #228]	@ (8007d98 <HAL_DMA_IRQHandler+0xe28>)
 8007cb2:	4293      	cmp	r3, r2
 8007cb4:	d031      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cb6:	687b      	ldr	r3, [r7, #4]
 8007cb8:	681b      	ldr	r3, [r3, #0]
 8007cba:	4a38      	ldr	r2, [pc, #224]	@ (8007d9c <HAL_DMA_IRQHandler+0xe2c>)
 8007cbc:	4293      	cmp	r3, r2
 8007cbe:	d02c      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cc0:	687b      	ldr	r3, [r7, #4]
 8007cc2:	681b      	ldr	r3, [r3, #0]
 8007cc4:	4a36      	ldr	r2, [pc, #216]	@ (8007da0 <HAL_DMA_IRQHandler+0xe30>)
 8007cc6:	4293      	cmp	r3, r2
 8007cc8:	d027      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cca:	687b      	ldr	r3, [r7, #4]
 8007ccc:	681b      	ldr	r3, [r3, #0]
 8007cce:	4a35      	ldr	r2, [pc, #212]	@ (8007da4 <HAL_DMA_IRQHandler+0xe34>)
 8007cd0:	4293      	cmp	r3, r2
 8007cd2:	d022      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cd4:	687b      	ldr	r3, [r7, #4]
 8007cd6:	681b      	ldr	r3, [r3, #0]
 8007cd8:	4a33      	ldr	r2, [pc, #204]	@ (8007da8 <HAL_DMA_IRQHandler+0xe38>)
 8007cda:	4293      	cmp	r3, r2
 8007cdc:	d01d      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cde:	687b      	ldr	r3, [r7, #4]
 8007ce0:	681b      	ldr	r3, [r3, #0]
 8007ce2:	4a32      	ldr	r2, [pc, #200]	@ (8007dac <HAL_DMA_IRQHandler+0xe3c>)
 8007ce4:	4293      	cmp	r3, r2
 8007ce6:	d018      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007ce8:	687b      	ldr	r3, [r7, #4]
 8007cea:	681b      	ldr	r3, [r3, #0]
 8007cec:	4a30      	ldr	r2, [pc, #192]	@ (8007db0 <HAL_DMA_IRQHandler+0xe40>)
 8007cee:	4293      	cmp	r3, r2
 8007cf0:	d013      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cf2:	687b      	ldr	r3, [r7, #4]
 8007cf4:	681b      	ldr	r3, [r3, #0]
 8007cf6:	4a2f      	ldr	r2, [pc, #188]	@ (8007db4 <HAL_DMA_IRQHandler+0xe44>)
 8007cf8:	4293      	cmp	r3, r2
 8007cfa:	d00e      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007cfc:	687b      	ldr	r3, [r7, #4]
 8007cfe:	681b      	ldr	r3, [r3, #0]
 8007d00:	4a2d      	ldr	r2, [pc, #180]	@ (8007db8 <HAL_DMA_IRQHandler+0xe48>)
 8007d02:	4293      	cmp	r3, r2
 8007d04:	d009      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007d06:	687b      	ldr	r3, [r7, #4]
 8007d08:	681b      	ldr	r3, [r3, #0]
 8007d0a:	4a2c      	ldr	r2, [pc, #176]	@ (8007dbc <HAL_DMA_IRQHandler+0xe4c>)
 8007d0c:	4293      	cmp	r3, r2
 8007d0e:	d004      	beq.n	8007d1a <HAL_DMA_IRQHandler+0xdaa>
 8007d10:	687b      	ldr	r3, [r7, #4]
 8007d12:	681b      	ldr	r3, [r3, #0]
 8007d14:	4a2a      	ldr	r2, [pc, #168]	@ (8007dc0 <HAL_DMA_IRQHandler+0xe50>)
 8007d16:	4293      	cmp	r3, r2
 8007d18:	d108      	bne.n	8007d2c <HAL_DMA_IRQHandler+0xdbc>
 8007d1a:	687b      	ldr	r3, [r7, #4]
 8007d1c:	681b      	ldr	r3, [r3, #0]
 8007d1e:	681a      	ldr	r2, [r3, #0]
 8007d20:	687b      	ldr	r3, [r7, #4]
 8007d22:	681b      	ldr	r3, [r3, #0]
 8007d24:	f022 021c 	bic.w	r2, r2, #28
 8007d28:	601a      	str	r2, [r3, #0]
 8007d2a:	e007      	b.n	8007d3c <HAL_DMA_IRQHandler+0xdcc>
 8007d2c:	687b      	ldr	r3, [r7, #4]
 8007d2e:	681b      	ldr	r3, [r3, #0]
 8007d30:	681a      	ldr	r2, [r3, #0]
 8007d32:	687b      	ldr	r3, [r7, #4]
 8007d34:	681b      	ldr	r3, [r3, #0]
 8007d36:	f022 020e 	bic.w	r2, r2, #14
 8007d3a:	601a      	str	r2, [r3, #0]

      /* Clear all flags */
      regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
 8007d3c:	687b      	ldr	r3, [r7, #4]
 8007d3e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007d40:	f003 031f 	and.w	r3, r3, #31
 8007d44:	2201      	movs	r2, #1
 8007d46:	409a      	lsls	r2, r3
 8007d48:	69fb      	ldr	r3, [r7, #28]
 8007d4a:	605a      	str	r2, [r3, #4]

      /* Update error code */
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
 8007d4c:	687b      	ldr	r3, [r7, #4]
 8007d4e:	2201      	movs	r2, #1
 8007d50:	655a      	str	r2, [r3, #84]	@ 0x54

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 8007d52:	687b      	ldr	r3, [r7, #4]
 8007d54:	2201      	movs	r2, #1
 8007d56:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 8007d5a:	687b      	ldr	r3, [r7, #4]
 8007d5c:	2200      	movs	r2, #0
 8007d5e:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      if (hdma->XferErrorCallback != NULL)
 8007d62:	687b      	ldr	r3, [r7, #4]
 8007d64:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007d66:	2b00      	cmp	r3, #0
 8007d68:	d009      	beq.n	8007d7e <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8007d6a:	687b      	ldr	r3, [r7, #4]
 8007d6c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007d6e:	6878      	ldr	r0, [r7, #4]
 8007d70:	4798      	blx	r3
 8007d72:	e004      	b.n	8007d7e <HAL_DMA_IRQHandler+0xe0e>
          return;
 8007d74:	bf00      	nop
 8007d76:	e002      	b.n	8007d7e <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007d78:	bf00      	nop
 8007d7a:	e000      	b.n	8007d7e <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007d7c:	bf00      	nop
  }
  else
  {
    /* Nothing To Do */
  }
}
 8007d7e:	3728      	adds	r7, #40	@ 0x28
 8007d80:	46bd      	mov	sp, r7
 8007d82:	bd80      	pop	{r7, pc}
 8007d84:	40020010 	.word	0x40020010
 8007d88:	40020028 	.word	0x40020028
 8007d8c:	40020040 	.word	0x40020040
 8007d90:	40020058 	.word	0x40020058
 8007d94:	40020070 	.word	0x40020070
 8007d98:	40020088 	.word	0x40020088
 8007d9c:	400200a0 	.word	0x400200a0
 8007da0:	400200b8 	.word	0x400200b8
 8007da4:	40020410 	.word	0x40020410
 8007da8:	40020428 	.word	0x40020428
 8007dac:	40020440 	.word	0x40020440
 8007db0:	40020458 	.word	0x40020458
 8007db4:	40020470 	.word	0x40020470
 8007db8:	40020488 	.word	0x40020488
 8007dbc:	400204a0 	.word	0x400204a0
 8007dc0:	400204b8 	.word	0x400204b8

08007dc4 <DMA_CalcBaseAndBitshift>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval Stream base address
  */
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
 8007dc4:	b480      	push	{r7}
 8007dc6:	b085      	sub	sp, #20
 8007dc8:	af00      	add	r7, sp, #0
 8007dca:	6078      	str	r0, [r7, #4]
  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8007dcc:	687b      	ldr	r3, [r7, #4]
 8007dce:	681b      	ldr	r3, [r3, #0]
 8007dd0:	4a42      	ldr	r2, [pc, #264]	@ (8007edc <DMA_CalcBaseAndBitshift+0x118>)
 8007dd2:	4293      	cmp	r3, r2
 8007dd4:	d04a      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007dd6:	687b      	ldr	r3, [r7, #4]
 8007dd8:	681b      	ldr	r3, [r3, #0]
 8007dda:	4a41      	ldr	r2, [pc, #260]	@ (8007ee0 <DMA_CalcBaseAndBitshift+0x11c>)
 8007ddc:	4293      	cmp	r3, r2
 8007dde:	d045      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007de0:	687b      	ldr	r3, [r7, #4]
 8007de2:	681b      	ldr	r3, [r3, #0]
 8007de4:	4a3f      	ldr	r2, [pc, #252]	@ (8007ee4 <DMA_CalcBaseAndBitshift+0x120>)
 8007de6:	4293      	cmp	r3, r2
 8007de8:	d040      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007dea:	687b      	ldr	r3, [r7, #4]
 8007dec:	681b      	ldr	r3, [r3, #0]
 8007dee:	4a3e      	ldr	r2, [pc, #248]	@ (8007ee8 <DMA_CalcBaseAndBitshift+0x124>)
 8007df0:	4293      	cmp	r3, r2
 8007df2:	d03b      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007df4:	687b      	ldr	r3, [r7, #4]
 8007df6:	681b      	ldr	r3, [r3, #0]
 8007df8:	4a3c      	ldr	r2, [pc, #240]	@ (8007eec <DMA_CalcBaseAndBitshift+0x128>)
 8007dfa:	4293      	cmp	r3, r2
 8007dfc:	d036      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007dfe:	687b      	ldr	r3, [r7, #4]
 8007e00:	681b      	ldr	r3, [r3, #0]
 8007e02:	4a3b      	ldr	r2, [pc, #236]	@ (8007ef0 <DMA_CalcBaseAndBitshift+0x12c>)
 8007e04:	4293      	cmp	r3, r2
 8007e06:	d031      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e08:	687b      	ldr	r3, [r7, #4]
 8007e0a:	681b      	ldr	r3, [r3, #0]
 8007e0c:	4a39      	ldr	r2, [pc, #228]	@ (8007ef4 <DMA_CalcBaseAndBitshift+0x130>)
 8007e0e:	4293      	cmp	r3, r2
 8007e10:	d02c      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e12:	687b      	ldr	r3, [r7, #4]
 8007e14:	681b      	ldr	r3, [r3, #0]
 8007e16:	4a38      	ldr	r2, [pc, #224]	@ (8007ef8 <DMA_CalcBaseAndBitshift+0x134>)
 8007e18:	4293      	cmp	r3, r2
 8007e1a:	d027      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e1c:	687b      	ldr	r3, [r7, #4]
 8007e1e:	681b      	ldr	r3, [r3, #0]
 8007e20:	4a36      	ldr	r2, [pc, #216]	@ (8007efc <DMA_CalcBaseAndBitshift+0x138>)
 8007e22:	4293      	cmp	r3, r2
 8007e24:	d022      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e26:	687b      	ldr	r3, [r7, #4]
 8007e28:	681b      	ldr	r3, [r3, #0]
 8007e2a:	4a35      	ldr	r2, [pc, #212]	@ (8007f00 <DMA_CalcBaseAndBitshift+0x13c>)
 8007e2c:	4293      	cmp	r3, r2
 8007e2e:	d01d      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e30:	687b      	ldr	r3, [r7, #4]
 8007e32:	681b      	ldr	r3, [r3, #0]
 8007e34:	4a33      	ldr	r2, [pc, #204]	@ (8007f04 <DMA_CalcBaseAndBitshift+0x140>)
 8007e36:	4293      	cmp	r3, r2
 8007e38:	d018      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e3a:	687b      	ldr	r3, [r7, #4]
 8007e3c:	681b      	ldr	r3, [r3, #0]
 8007e3e:	4a32      	ldr	r2, [pc, #200]	@ (8007f08 <DMA_CalcBaseAndBitshift+0x144>)
 8007e40:	4293      	cmp	r3, r2
 8007e42:	d013      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e44:	687b      	ldr	r3, [r7, #4]
 8007e46:	681b      	ldr	r3, [r3, #0]
 8007e48:	4a30      	ldr	r2, [pc, #192]	@ (8007f0c <DMA_CalcBaseAndBitshift+0x148>)
 8007e4a:	4293      	cmp	r3, r2
 8007e4c:	d00e      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e4e:	687b      	ldr	r3, [r7, #4]
 8007e50:	681b      	ldr	r3, [r3, #0]
 8007e52:	4a2f      	ldr	r2, [pc, #188]	@ (8007f10 <DMA_CalcBaseAndBitshift+0x14c>)
 8007e54:	4293      	cmp	r3, r2
 8007e56:	d009      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e58:	687b      	ldr	r3, [r7, #4]
 8007e5a:	681b      	ldr	r3, [r3, #0]
 8007e5c:	4a2d      	ldr	r2, [pc, #180]	@ (8007f14 <DMA_CalcBaseAndBitshift+0x150>)
 8007e5e:	4293      	cmp	r3, r2
 8007e60:	d004      	beq.n	8007e6c <DMA_CalcBaseAndBitshift+0xa8>
 8007e62:	687b      	ldr	r3, [r7, #4]
 8007e64:	681b      	ldr	r3, [r3, #0]
 8007e66:	4a2c      	ldr	r2, [pc, #176]	@ (8007f18 <DMA_CalcBaseAndBitshift+0x154>)
 8007e68:	4293      	cmp	r3, r2
 8007e6a:	d101      	bne.n	8007e70 <DMA_CalcBaseAndBitshift+0xac>
 8007e6c:	2301      	movs	r3, #1
 8007e6e:	e000      	b.n	8007e72 <DMA_CalcBaseAndBitshift+0xae>
 8007e70:	2300      	movs	r3, #0
 8007e72:	2b00      	cmp	r3, #0
 8007e74:	d024      	beq.n	8007ec0 <DMA_CalcBaseAndBitshift+0xfc>
  {
    uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8007e76:	687b      	ldr	r3, [r7, #4]
 8007e78:	681b      	ldr	r3, [r3, #0]
 8007e7a:	b2db      	uxtb	r3, r3
 8007e7c:	3b10      	subs	r3, #16
 8007e7e:	4a27      	ldr	r2, [pc, #156]	@ (8007f1c <DMA_CalcBaseAndBitshift+0x158>)
 8007e80:	fba2 2303 	umull	r2, r3, r2, r3
 8007e84:	091b      	lsrs	r3, r3, #4
 8007e86:	60fb      	str	r3, [r7, #12]

    /* lookup table for necessary bitshift of flags within status registers */
    static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
    hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
 8007e88:	68fb      	ldr	r3, [r7, #12]
 8007e8a:	f003 0307 	and.w	r3, r3, #7
 8007e8e:	4a24      	ldr	r2, [pc, #144]	@ (8007f20 <DMA_CalcBaseAndBitshift+0x15c>)
 8007e90:	5cd3      	ldrb	r3, [r2, r3]
 8007e92:	461a      	mov	r2, r3
 8007e94:	687b      	ldr	r3, [r7, #4]
 8007e96:	65da      	str	r2, [r3, #92]	@ 0x5c

    if (stream_number > 3U)
 8007e98:	68fb      	ldr	r3, [r7, #12]
 8007e9a:	2b03      	cmp	r3, #3
 8007e9c:	d908      	bls.n	8007eb0 <DMA_CalcBaseAndBitshift+0xec>
    {
      /* return pointer to HISR and HIFCR */
      hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
 8007e9e:	687b      	ldr	r3, [r7, #4]
 8007ea0:	681b      	ldr	r3, [r3, #0]
 8007ea2:	461a      	mov	r2, r3
 8007ea4:	4b1f      	ldr	r3, [pc, #124]	@ (8007f24 <DMA_CalcBaseAndBitshift+0x160>)
 8007ea6:	4013      	ands	r3, r2
 8007ea8:	1d1a      	adds	r2, r3, #4
 8007eaa:	687b      	ldr	r3, [r7, #4]
 8007eac:	659a      	str	r2, [r3, #88]	@ 0x58
 8007eae:	e00d      	b.n	8007ecc <DMA_CalcBaseAndBitshift+0x108>
    }
    else
    {
      /* return pointer to LISR and LIFCR */
      hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
 8007eb0:	687b      	ldr	r3, [r7, #4]
 8007eb2:	681b      	ldr	r3, [r3, #0]
 8007eb4:	461a      	mov	r2, r3
 8007eb6:	4b1b      	ldr	r3, [pc, #108]	@ (8007f24 <DMA_CalcBaseAndBitshift+0x160>)
 8007eb8:	4013      	ands	r3, r2
 8007eba:	687a      	ldr	r2, [r7, #4]
 8007ebc:	6593      	str	r3, [r2, #88]	@ 0x58
 8007ebe:	e005      	b.n	8007ecc <DMA_CalcBaseAndBitshift+0x108>
    }
  }
  else /* BDMA instance(s) */
  {
    /* return pointer to ISR and IFCR */
    hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
 8007ec0:	687b      	ldr	r3, [r7, #4]
 8007ec2:	681b      	ldr	r3, [r3, #0]
 8007ec4:	f023 02ff 	bic.w	r2, r3, #255	@ 0xff
 8007ec8:	687b      	ldr	r3, [r7, #4]
 8007eca:	659a      	str	r2, [r3, #88]	@ 0x58
  }

  return hdma->StreamBaseAddress;
 8007ecc:	687b      	ldr	r3, [r7, #4]
 8007ece:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
}
 8007ed0:	4618      	mov	r0, r3
 8007ed2:	3714      	adds	r7, #20
 8007ed4:	46bd      	mov	sp, r7
 8007ed6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8007eda:	4770      	bx	lr
 8007edc:	40020010 	.word	0x40020010
 8007ee0:	40020028 	.word	0x40020028
 8007ee4:	40020040 	.word	0x40020040
 8007ee8:	40020058 	.word	0x40020058
 8007eec:	40020070 	.word	0x40020070
 8007ef0:	40020088 	.word	0x40020088
 8007ef4:	400200a0 	.word	0x400200a0
 8007ef8:	400200b8 	.word	0x400200b8
 8007efc:	40020410 	.word	0x40020410
 8007f00:	40020428 	.word	0x40020428
 8007f04:	40020440 	.word	0x40020440
 8007f08:	40020458 	.word	0x40020458
 8007f0c:	40020470 	.word	0x40020470
 8007f10:	40020488 	.word	0x40020488
 8007f14:	400204a0 	.word	0x400204a0
 8007f18:	400204b8 	.word	0x400204b8
 8007f1c:	aaaaaaab 	.word	0xaaaaaaab
 8007f20:	0803197c 	.word	0x0803197c
 8007f24:	fffffc00 	.word	0xfffffc00

08007f28 <DMA_CheckFifoParam>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
 8007f28:	b480      	push	{r7}
 8007f2a:	b085      	sub	sp, #20
 8007f2c:	af00      	add	r7, sp, #0
 8007f2e:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8007f30:	2300      	movs	r3, #0
 8007f32:	73fb      	strb	r3, [r7, #15]

  /* Memory Data size equal to Byte */
  if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
 8007f34:	687b      	ldr	r3, [r7, #4]
 8007f36:	699b      	ldr	r3, [r3, #24]
 8007f38:	2b00      	cmp	r3, #0
 8007f3a:	d120      	bne.n	8007f7e <DMA_CheckFifoParam+0x56>
  {
    switch (hdma->Init.FIFOThreshold)
 8007f3c:	687b      	ldr	r3, [r7, #4]
 8007f3e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007f40:	2b03      	cmp	r3, #3
 8007f42:	d858      	bhi.n	8007ff6 <DMA_CheckFifoParam+0xce>
 8007f44:	a201      	add	r2, pc, #4	@ (adr r2, 8007f4c <DMA_CheckFifoParam+0x24>)
 8007f46:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007f4a:	bf00      	nop
 8007f4c:	08007f5d 	.word	0x08007f5d
 8007f50:	08007f6f 	.word	0x08007f6f
 8007f54:	08007f5d 	.word	0x08007f5d
 8007f58:	08007ff7 	.word	0x08007ff7
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:

        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007f5c:	687b      	ldr	r3, [r7, #4]
 8007f5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007f60:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007f64:	2b00      	cmp	r3, #0
 8007f66:	d048      	beq.n	8007ffa <DMA_CheckFifoParam+0xd2>
        {
          status = HAL_ERROR;
 8007f68:	2301      	movs	r3, #1
 8007f6a:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007f6c:	e045      	b.n	8007ffa <DMA_CheckFifoParam+0xd2>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8007f6e:	687b      	ldr	r3, [r7, #4]
 8007f70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007f72:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007f76:	d142      	bne.n	8007ffe <DMA_CheckFifoParam+0xd6>
        {
          status = HAL_ERROR;
 8007f78:	2301      	movs	r3, #1
 8007f7a:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007f7c:	e03f      	b.n	8007ffe <DMA_CheckFifoParam+0xd6>
        break;
    }
  }

  /* Memory Data size equal to Half-Word */
  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
 8007f7e:	687b      	ldr	r3, [r7, #4]
 8007f80:	699b      	ldr	r3, [r3, #24]
 8007f82:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8007f86:	d123      	bne.n	8007fd0 <DMA_CheckFifoParam+0xa8>
  {
    switch (hdma->Init.FIFOThreshold)
 8007f88:	687b      	ldr	r3, [r7, #4]
 8007f8a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007f8c:	2b03      	cmp	r3, #3
 8007f8e:	d838      	bhi.n	8008002 <DMA_CheckFifoParam+0xda>
 8007f90:	a201      	add	r2, pc, #4	@ (adr r2, 8007f98 <DMA_CheckFifoParam+0x70>)
 8007f92:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8007f96:	bf00      	nop
 8007f98:	08007fa9 	.word	0x08007fa9
 8007f9c:	08007faf 	.word	0x08007faf
 8007fa0:	08007fa9 	.word	0x08007fa9
 8007fa4:	08007fc1 	.word	0x08007fc1
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
        status = HAL_ERROR;
 8007fa8:	2301      	movs	r3, #1
 8007faa:	73fb      	strb	r3, [r7, #15]
        break;
 8007fac:	e030      	b.n	8008010 <DMA_CheckFifoParam+0xe8>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007fae:	687b      	ldr	r3, [r7, #4]
 8007fb0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007fb2:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007fb6:	2b00      	cmp	r3, #0
 8007fb8:	d025      	beq.n	8008006 <DMA_CheckFifoParam+0xde>
        {
          status = HAL_ERROR;
 8007fba:	2301      	movs	r3, #1
 8007fbc:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007fbe:	e022      	b.n	8008006 <DMA_CheckFifoParam+0xde>

      case DMA_FIFO_THRESHOLD_FULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8007fc0:	687b      	ldr	r3, [r7, #4]
 8007fc2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007fc4:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 8007fc8:	d11f      	bne.n	800800a <DMA_CheckFifoParam+0xe2>
        {
          status = HAL_ERROR;
 8007fca:	2301      	movs	r3, #1
 8007fcc:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8007fce:	e01c      	b.n	800800a <DMA_CheckFifoParam+0xe2>
  }

  /* Memory Data size equal to Word */
  else
  {
    switch (hdma->Init.FIFOThreshold)
 8007fd0:	687b      	ldr	r3, [r7, #4]
 8007fd2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8007fd4:	2b02      	cmp	r3, #2
 8007fd6:	d902      	bls.n	8007fde <DMA_CheckFifoParam+0xb6>
 8007fd8:	2b03      	cmp	r3, #3
 8007fda:	d003      	beq.n	8007fe4 <DMA_CheckFifoParam+0xbc>
          status = HAL_ERROR;
        }
    break;

      default:
        break;
 8007fdc:	e018      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        status = HAL_ERROR;
 8007fde:	2301      	movs	r3, #1
 8007fe0:	73fb      	strb	r3, [r7, #15]
        break;
 8007fe2:	e015      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8007fe4:	687b      	ldr	r3, [r7, #4]
 8007fe6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8007fe8:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8007fec:	2b00      	cmp	r3, #0
 8007fee:	d00e      	beq.n	800800e <DMA_CheckFifoParam+0xe6>
          status = HAL_ERROR;
 8007ff0:	2301      	movs	r3, #1
 8007ff2:	73fb      	strb	r3, [r7, #15]
    break;
 8007ff4:	e00b      	b.n	800800e <DMA_CheckFifoParam+0xe6>
        break;
 8007ff6:	bf00      	nop
 8007ff8:	e00a      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        break;
 8007ffa:	bf00      	nop
 8007ffc:	e008      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        break;
 8007ffe:	bf00      	nop
 8008000:	e006      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        break;
 8008002:	bf00      	nop
 8008004:	e004      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        break;
 8008006:	bf00      	nop
 8008008:	e002      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
        break;
 800800a:	bf00      	nop
 800800c:	e000      	b.n	8008010 <DMA_CheckFifoParam+0xe8>
    break;
 800800e:	bf00      	nop
    }
  }

  return status;
 8008010:	7bfb      	ldrb	r3, [r7, #15]
}
 8008012:	4618      	mov	r0, r3
 8008014:	3714      	adds	r7, #20
 8008016:	46bd      	mov	sp, r7
 8008018:	f85d 7b04 	ldr.w	r7, [sp], #4
 800801c:	4770      	bx	lr
 800801e:	bf00      	nop

08008020 <DMA_CalcDMAMUXChannelBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8008020:	b480      	push	{r7}
 8008022:	b085      	sub	sp, #20
 8008024:	af00      	add	r7, sp, #0
 8008026:	6078      	str	r0, [r7, #4]
  uint32_t stream_number;
  uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
 8008028:	687b      	ldr	r3, [r7, #4]
 800802a:	681b      	ldr	r3, [r3, #0]
 800802c:	60bb      	str	r3, [r7, #8]

  if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 800802e:	687b      	ldr	r3, [r7, #4]
 8008030:	681b      	ldr	r3, [r3, #0]
 8008032:	4a38      	ldr	r2, [pc, #224]	@ (8008114 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
 8008034:	4293      	cmp	r3, r2
 8008036:	d022      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8008038:	687b      	ldr	r3, [r7, #4]
 800803a:	681b      	ldr	r3, [r3, #0]
 800803c:	4a36      	ldr	r2, [pc, #216]	@ (8008118 <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
 800803e:	4293      	cmp	r3, r2
 8008040:	d01d      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8008042:	687b      	ldr	r3, [r7, #4]
 8008044:	681b      	ldr	r3, [r3, #0]
 8008046:	4a35      	ldr	r2, [pc, #212]	@ (800811c <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
 8008048:	4293      	cmp	r3, r2
 800804a:	d018      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 800804c:	687b      	ldr	r3, [r7, #4]
 800804e:	681b      	ldr	r3, [r3, #0]
 8008050:	4a33      	ldr	r2, [pc, #204]	@ (8008120 <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
 8008052:	4293      	cmp	r3, r2
 8008054:	d013      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8008056:	687b      	ldr	r3, [r7, #4]
 8008058:	681b      	ldr	r3, [r3, #0]
 800805a:	4a32      	ldr	r2, [pc, #200]	@ (8008124 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
 800805c:	4293      	cmp	r3, r2
 800805e:	d00e      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8008060:	687b      	ldr	r3, [r7, #4]
 8008062:	681b      	ldr	r3, [r3, #0]
 8008064:	4a30      	ldr	r2, [pc, #192]	@ (8008128 <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
 8008066:	4293      	cmp	r3, r2
 8008068:	d009      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 800806a:	687b      	ldr	r3, [r7, #4]
 800806c:	681b      	ldr	r3, [r3, #0]
 800806e:	4a2f      	ldr	r2, [pc, #188]	@ (800812c <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
 8008070:	4293      	cmp	r3, r2
 8008072:	d004      	beq.n	800807e <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 8008074:	687b      	ldr	r3, [r7, #4]
 8008076:	681b      	ldr	r3, [r3, #0]
 8008078:	4a2d      	ldr	r2, [pc, #180]	@ (8008130 <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
 800807a:	4293      	cmp	r3, r2
 800807c:	d101      	bne.n	8008082 <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
 800807e:	2301      	movs	r3, #1
 8008080:	e000      	b.n	8008084 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
 8008082:	2300      	movs	r3, #0
 8008084:	2b00      	cmp	r3, #0
 8008086:	d01a      	beq.n	80080be <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
  {
    /* BDMA Channels are connected to DMAMUX2 channels */
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
 8008088:	687b      	ldr	r3, [r7, #4]
 800808a:	681b      	ldr	r3, [r3, #0]
 800808c:	b2db      	uxtb	r3, r3
 800808e:	3b08      	subs	r3, #8
 8008090:	4a28      	ldr	r2, [pc, #160]	@ (8008134 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
 8008092:	fba2 2303 	umull	r2, r3, r2, r3
 8008096:	091b      	lsrs	r3, r3, #4
 8008098:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
 800809a:	68fa      	ldr	r2, [r7, #12]
 800809c:	4b26      	ldr	r3, [pc, #152]	@ (8008138 <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
 800809e:	4413      	add	r3, r2
 80080a0:	009b      	lsls	r3, r3, #2
 80080a2:	461a      	mov	r2, r3
 80080a4:	687b      	ldr	r3, [r7, #4]
 80080a6:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
 80080a8:	687b      	ldr	r3, [r7, #4]
 80080aa:	4a24      	ldr	r2, [pc, #144]	@ (800813c <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
 80080ac:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 80080ae:	68fb      	ldr	r3, [r7, #12]
 80080b0:	f003 031f 	and.w	r3, r3, #31
 80080b4:	2201      	movs	r2, #1
 80080b6:	409a      	lsls	r2, r3
 80080b8:	687b      	ldr	r3, [r7, #4]
 80080ba:	669a      	str	r2, [r3, #104]	@ 0x68
    }
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
  }
}
 80080bc:	e024      	b.n	8008108 <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 80080be:	687b      	ldr	r3, [r7, #4]
 80080c0:	681b      	ldr	r3, [r3, #0]
 80080c2:	b2db      	uxtb	r3, r3
 80080c4:	3b10      	subs	r3, #16
 80080c6:	4a1e      	ldr	r2, [pc, #120]	@ (8008140 <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
 80080c8:	fba2 2303 	umull	r2, r3, r2, r3
 80080cc:	091b      	lsrs	r3, r3, #4
 80080ce:	60fb      	str	r3, [r7, #12]
    if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
 80080d0:	68bb      	ldr	r3, [r7, #8]
 80080d2:	4a1c      	ldr	r2, [pc, #112]	@ (8008144 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
 80080d4:	4293      	cmp	r3, r2
 80080d6:	d806      	bhi.n	80080e6 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
 80080d8:	68bb      	ldr	r3, [r7, #8]
 80080da:	4a1b      	ldr	r2, [pc, #108]	@ (8008148 <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
 80080dc:	4293      	cmp	r3, r2
 80080de:	d902      	bls.n	80080e6 <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
      stream_number += 8U;
 80080e0:	68fb      	ldr	r3, [r7, #12]
 80080e2:	3308      	adds	r3, #8
 80080e4:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
 80080e6:	68fa      	ldr	r2, [r7, #12]
 80080e8:	4b18      	ldr	r3, [pc, #96]	@ (800814c <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
 80080ea:	4413      	add	r3, r2
 80080ec:	009b      	lsls	r3, r3, #2
 80080ee:	461a      	mov	r2, r3
 80080f0:	687b      	ldr	r3, [r7, #4]
 80080f2:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
 80080f4:	687b      	ldr	r3, [r7, #4]
 80080f6:	4a16      	ldr	r2, [pc, #88]	@ (8008150 <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
 80080f8:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 80080fa:	68fb      	ldr	r3, [r7, #12]
 80080fc:	f003 031f 	and.w	r3, r3, #31
 8008100:	2201      	movs	r2, #1
 8008102:	409a      	lsls	r2, r3
 8008104:	687b      	ldr	r3, [r7, #4]
 8008106:	669a      	str	r2, [r3, #104]	@ 0x68
}
 8008108:	bf00      	nop
 800810a:	3714      	adds	r7, #20
 800810c:	46bd      	mov	sp, r7
 800810e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008112:	4770      	bx	lr
 8008114:	58025408 	.word	0x58025408
 8008118:	5802541c 	.word	0x5802541c
 800811c:	58025430 	.word	0x58025430
 8008120:	58025444 	.word	0x58025444
 8008124:	58025458 	.word	0x58025458
 8008128:	5802546c 	.word	0x5802546c
 800812c:	58025480 	.word	0x58025480
 8008130:	58025494 	.word	0x58025494
 8008134:	cccccccd 	.word	0xcccccccd
 8008138:	16009600 	.word	0x16009600
 800813c:	58025880 	.word	0x58025880
 8008140:	aaaaaaab 	.word	0xaaaaaaab
 8008144:	400204b8 	.word	0x400204b8
 8008148:	4002040f 	.word	0x4002040f
 800814c:	10008200 	.word	0x10008200
 8008150:	40020880 	.word	0x40020880

08008154 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8008154:	b480      	push	{r7}
 8008156:	b085      	sub	sp, #20
 8008158:	af00      	add	r7, sp, #0
 800815a:	6078      	str	r0, [r7, #4]
  uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
 800815c:	687b      	ldr	r3, [r7, #4]
 800815e:	685b      	ldr	r3, [r3, #4]
 8008160:	b2db      	uxtb	r3, r3
 8008162:	60fb      	str	r3, [r7, #12]

  if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
 8008164:	68fb      	ldr	r3, [r7, #12]
 8008166:	2b00      	cmp	r3, #0
 8008168:	d04a      	beq.n	8008200 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
 800816a:	68fb      	ldr	r3, [r7, #12]
 800816c:	2b08      	cmp	r3, #8
 800816e:	d847      	bhi.n	8008200 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8008170:	687b      	ldr	r3, [r7, #4]
 8008172:	681b      	ldr	r3, [r3, #0]
 8008174:	4a25      	ldr	r2, [pc, #148]	@ (800820c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
 8008176:	4293      	cmp	r3, r2
 8008178:	d022      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 800817a:	687b      	ldr	r3, [r7, #4]
 800817c:	681b      	ldr	r3, [r3, #0]
 800817e:	4a24      	ldr	r2, [pc, #144]	@ (8008210 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
 8008180:	4293      	cmp	r3, r2
 8008182:	d01d      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8008184:	687b      	ldr	r3, [r7, #4]
 8008186:	681b      	ldr	r3, [r3, #0]
 8008188:	4a22      	ldr	r2, [pc, #136]	@ (8008214 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
 800818a:	4293      	cmp	r3, r2
 800818c:	d018      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 800818e:	687b      	ldr	r3, [r7, #4]
 8008190:	681b      	ldr	r3, [r3, #0]
 8008192:	4a21      	ldr	r2, [pc, #132]	@ (8008218 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
 8008194:	4293      	cmp	r3, r2
 8008196:	d013      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8008198:	687b      	ldr	r3, [r7, #4]
 800819a:	681b      	ldr	r3, [r3, #0]
 800819c:	4a1f      	ldr	r2, [pc, #124]	@ (800821c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
 800819e:	4293      	cmp	r3, r2
 80081a0:	d00e      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80081a2:	687b      	ldr	r3, [r7, #4]
 80081a4:	681b      	ldr	r3, [r3, #0]
 80081a6:	4a1e      	ldr	r2, [pc, #120]	@ (8008220 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
 80081a8:	4293      	cmp	r3, r2
 80081aa:	d009      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80081ac:	687b      	ldr	r3, [r7, #4]
 80081ae:	681b      	ldr	r3, [r3, #0]
 80081b0:	4a1c      	ldr	r2, [pc, #112]	@ (8008224 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
 80081b2:	4293      	cmp	r3, r2
 80081b4:	d004      	beq.n	80081c0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80081b6:	687b      	ldr	r3, [r7, #4]
 80081b8:	681b      	ldr	r3, [r3, #0]
 80081ba:	4a1b      	ldr	r2, [pc, #108]	@ (8008228 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
 80081bc:	4293      	cmp	r3, r2
 80081be:	d101      	bne.n	80081c4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
 80081c0:	2301      	movs	r3, #1
 80081c2:	e000      	b.n	80081c6 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
 80081c4:	2300      	movs	r3, #0
 80081c6:	2b00      	cmp	r3, #0
 80081c8:	d00a      	beq.n	80081e0 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
    {
      /* BDMA Channels are connected to DMAMUX2 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
 80081ca:	68fa      	ldr	r2, [r7, #12]
 80081cc:	4b17      	ldr	r3, [pc, #92]	@ (800822c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
 80081ce:	4413      	add	r3, r2
 80081d0:	009b      	lsls	r3, r3, #2
 80081d2:	461a      	mov	r2, r3
 80081d4:	687b      	ldr	r3, [r7, #4]
 80081d6:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
 80081d8:	687b      	ldr	r3, [r7, #4]
 80081da:	4a15      	ldr	r2, [pc, #84]	@ (8008230 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
 80081dc:	671a      	str	r2, [r3, #112]	@ 0x70
 80081de:	e009      	b.n	80081f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
    }
    else
    {
      /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
 80081e0:	68fa      	ldr	r2, [r7, #12]
 80081e2:	4b14      	ldr	r3, [pc, #80]	@ (8008234 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
 80081e4:	4413      	add	r3, r2
 80081e6:	009b      	lsls	r3, r3, #2
 80081e8:	461a      	mov	r2, r3
 80081ea:	687b      	ldr	r3, [r7, #4]
 80081ec:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
 80081ee:	687b      	ldr	r3, [r7, #4]
 80081f0:	4a11      	ldr	r2, [pc, #68]	@ (8008238 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
 80081f2:	671a      	str	r2, [r3, #112]	@ 0x70
    }

    hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
 80081f4:	68fb      	ldr	r3, [r7, #12]
 80081f6:	3b01      	subs	r3, #1
 80081f8:	2201      	movs	r2, #1
 80081fa:	409a      	lsls	r2, r3
 80081fc:	687b      	ldr	r3, [r7, #4]
 80081fe:	675a      	str	r2, [r3, #116]	@ 0x74
  }
}
 8008200:	bf00      	nop
 8008202:	3714      	adds	r7, #20
 8008204:	46bd      	mov	sp, r7
 8008206:	f85d 7b04 	ldr.w	r7, [sp], #4
 800820a:	4770      	bx	lr
 800820c:	58025408 	.word	0x58025408
 8008210:	5802541c 	.word	0x5802541c
 8008214:	58025430 	.word	0x58025430
 8008218:	58025444 	.word	0x58025444
 800821c:	58025458 	.word	0x58025458
 8008220:	5802546c 	.word	0x5802546c
 8008224:	58025480 	.word	0x58025480
 8008228:	58025494 	.word	0x58025494
 800822c:	1600963f 	.word	0x1600963f
 8008230:	58025940 	.word	0x58025940
 8008234:	1000823f 	.word	0x1000823f
 8008238:	40020940 	.word	0x40020940

0800823c <HAL_ETH_Init>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
 800823c:	b580      	push	{r7, lr}
 800823e:	b084      	sub	sp, #16
 8008240:	af00      	add	r7, sp, #0
 8008242:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  if (heth == NULL)
 8008244:	687b      	ldr	r3, [r7, #4]
 8008246:	2b00      	cmp	r3, #0
 8008248:	d101      	bne.n	800824e <HAL_ETH_Init+0x12>
  {
    return HAL_ERROR;
 800824a:	2301      	movs	r3, #1
 800824c:	e0e3      	b.n	8008416 <HAL_ETH_Init+0x1da>
  }
  if (heth->gState == HAL_ETH_STATE_RESET)
 800824e:	687b      	ldr	r3, [r7, #4]
 8008250:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008254:	2b00      	cmp	r3, #0
 8008256:	d106      	bne.n	8008266 <HAL_ETH_Init+0x2a>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 8008258:	687b      	ldr	r3, [r7, #4]
 800825a:	2223      	movs	r2, #35	@ 0x23
 800825c:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    heth->MspInitCallback(heth);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
    HAL_ETH_MspInit(heth);
 8008260:	6878      	ldr	r0, [r7, #4]
 8008262:	f008 fbb9 	bl	80109d8 <HAL_ETH_MspInit>

#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
  }

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8008266:	4b6e      	ldr	r3, [pc, #440]	@ (8008420 <HAL_ETH_Init+0x1e4>)
 8008268:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800826c:	4a6c      	ldr	r2, [pc, #432]	@ (8008420 <HAL_ETH_Init+0x1e4>)
 800826e:	f043 0302 	orr.w	r3, r3, #2
 8008272:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8008276:	4b6a      	ldr	r3, [pc, #424]	@ (8008420 <HAL_ETH_Init+0x1e4>)
 8008278:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800827c:	f003 0302 	and.w	r3, r3, #2
 8008280:	60bb      	str	r3, [r7, #8]
 8008282:	68bb      	ldr	r3, [r7, #8]

  if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
 8008284:	687b      	ldr	r3, [r7, #4]
 8008286:	7a1b      	ldrb	r3, [r3, #8]
 8008288:	2b00      	cmp	r3, #0
 800828a:	d103      	bne.n	8008294 <HAL_ETH_Init+0x58>
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
 800828c:	2000      	movs	r0, #0
 800828e:	f7fd fa3d 	bl	800570c <HAL_SYSCFG_ETHInterfaceSelect>
 8008292:	e003      	b.n	800829c <HAL_ETH_Init+0x60>
  }
  else
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
 8008294:	f44f 0000 	mov.w	r0, #8388608	@ 0x800000
 8008298:	f7fd fa38 	bl	800570c <HAL_SYSCFG_ETHInterfaceSelect>
  }

  /* Dummy read to sync with ETH */
  (void)SYSCFG->PMCR;
 800829c:	4b61      	ldr	r3, [pc, #388]	@ (8008424 <HAL_ETH_Init+0x1e8>)
 800829e:	685b      	ldr	r3, [r3, #4]

  /* Ethernet Software reset */
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
 80082a0:	687b      	ldr	r3, [r7, #4]
 80082a2:	681b      	ldr	r3, [r3, #0]
 80082a4:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80082a8:	681b      	ldr	r3, [r3, #0]
 80082aa:	687a      	ldr	r2, [r7, #4]
 80082ac:	6812      	ldr	r2, [r2, #0]
 80082ae:	f043 0301 	orr.w	r3, r3, #1
 80082b2:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80082b6:	6013      	str	r3, [r2, #0]

  /* Get tick */
  tickstart = HAL_GetTick();
 80082b8:	f7fd f9ec 	bl	8005694 <HAL_GetTick>
 80082bc:	60f8      	str	r0, [r7, #12]

  /* Wait for software reset */
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 80082be:	e011      	b.n	80082e4 <HAL_ETH_Init+0xa8>
  {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
 80082c0:	f7fd f9e8 	bl	8005694 <HAL_GetTick>
 80082c4:	4602      	mov	r2, r0
 80082c6:	68fb      	ldr	r3, [r7, #12]
 80082c8:	1ad3      	subs	r3, r2, r3
 80082ca:	f5b3 7ffa 	cmp.w	r3, #500	@ 0x1f4
 80082ce:	d909      	bls.n	80082e4 <HAL_ETH_Init+0xa8>
    {
      /* Set Error Code */
      heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
 80082d0:	687b      	ldr	r3, [r7, #4]
 80082d2:	2204      	movs	r2, #4
 80082d4:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      /* Set State as Error */
      heth->gState = HAL_ETH_STATE_ERROR;
 80082d8:	687b      	ldr	r3, [r7, #4]
 80082da:	22e0      	movs	r2, #224	@ 0xe0
 80082dc:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
      /* Return Error */
      return HAL_ERROR;
 80082e0:	2301      	movs	r3, #1
 80082e2:	e098      	b.n	8008416 <HAL_ETH_Init+0x1da>
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 80082e4:	687b      	ldr	r3, [r7, #4]
 80082e6:	681b      	ldr	r3, [r3, #0]
 80082e8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80082ec:	681b      	ldr	r3, [r3, #0]
 80082ee:	f003 0301 	and.w	r3, r3, #1
 80082f2:	2b00      	cmp	r3, #0
 80082f4:	d1e4      	bne.n	80082c0 <HAL_ETH_Init+0x84>
    }
  }

  /*------------------ MDIO CSR Clock Range Configuration --------------------*/
  HAL_ETH_SetMDIOClockRange(heth);
 80082f6:	6878      	ldr	r0, [r7, #4]
 80082f8:	f000 ff1c 	bl	8009134 <HAL_ETH_SetMDIOClockRange>

  /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
  WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
 80082fc:	f002 ffb0 	bl	800b260 <HAL_RCC_GetHCLKFreq>
 8008300:	4603      	mov	r3, r0
 8008302:	4a49      	ldr	r2, [pc, #292]	@ (8008428 <HAL_ETH_Init+0x1ec>)
 8008304:	fba2 2303 	umull	r2, r3, r2, r3
 8008308:	0c9a      	lsrs	r2, r3, #18
 800830a:	687b      	ldr	r3, [r7, #4]
 800830c:	681b      	ldr	r3, [r3, #0]
 800830e:	3a01      	subs	r2, #1
 8008310:	f8c3 20dc 	str.w	r2, [r3, #220]	@ 0xdc

  /*------------------ MAC, MTL and DMA default Configuration ----------------*/
  ETH_MACDMAConfig(heth);
 8008314:	6878      	ldr	r0, [r7, #4]
 8008316:	f001 f90d 	bl	8009534 <ETH_MACDMAConfig>

  /* SET DSL to 64 bit */
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
 800831a:	687b      	ldr	r3, [r7, #4]
 800831c:	681b      	ldr	r3, [r3, #0]
 800831e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008322:	f8d3 3100 	ldr.w	r3, [r3, #256]	@ 0x100
 8008326:	f423 13e0 	bic.w	r3, r3, #1835008	@ 0x1c0000
 800832a:	687a      	ldr	r2, [r7, #4]
 800832c:	6812      	ldr	r2, [r2, #0]
 800832e:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8008332:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008336:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /* Set Receive Buffers Length (must be a multiple of 4) */
  if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
 800833a:	687b      	ldr	r3, [r7, #4]
 800833c:	695b      	ldr	r3, [r3, #20]
 800833e:	f003 0303 	and.w	r3, r3, #3
 8008342:	2b00      	cmp	r3, #0
 8008344:	d009      	beq.n	800835a <HAL_ETH_Init+0x11e>
  {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_PARAM;
 8008346:	687b      	ldr	r3, [r7, #4]
 8008348:	2201      	movs	r2, #1
 800834a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
 800834e:	687b      	ldr	r3, [r7, #4]
 8008350:	22e0      	movs	r2, #224	@ 0xe0
 8008352:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Return Error */
    return HAL_ERROR;
 8008356:	2301      	movs	r3, #1
 8008358:	e05d      	b.n	8008416 <HAL_ETH_Init+0x1da>
  }
  else
  {
    MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
 800835a:	687b      	ldr	r3, [r7, #4]
 800835c:	681b      	ldr	r3, [r3, #0]
 800835e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008362:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8008366:	4b31      	ldr	r3, [pc, #196]	@ (800842c <HAL_ETH_Init+0x1f0>)
 8008368:	4013      	ands	r3, r2
 800836a:	687a      	ldr	r2, [r7, #4]
 800836c:	6952      	ldr	r2, [r2, #20]
 800836e:	0051      	lsls	r1, r2, #1
 8008370:	687a      	ldr	r2, [r7, #4]
 8008372:	6812      	ldr	r2, [r2, #0]
 8008374:	430b      	orrs	r3, r1
 8008376:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800837a:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
  }

  /*------------------ DMA Tx Descriptors Configuration ----------------------*/
  ETH_DMATxDescListInit(heth);
 800837e:	6878      	ldr	r0, [r7, #4]
 8008380:	f001 f975 	bl	800966e <ETH_DMATxDescListInit>

  /*------------------ DMA Rx Descriptors Configuration ----------------------*/
  ETH_DMARxDescListInit(heth);
 8008384:	6878      	ldr	r0, [r7, #4]
 8008386:	f001 f9bb 	bl	8009700 <ETH_DMARxDescListInit>

  /*--------------------- ETHERNET MAC Address Configuration ------------------*/
  /* Set MAC addr bits 32 to 47 */
  heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
 800838a:	687b      	ldr	r3, [r7, #4]
 800838c:	685b      	ldr	r3, [r3, #4]
 800838e:	3305      	adds	r3, #5
 8008390:	781b      	ldrb	r3, [r3, #0]
 8008392:	021a      	lsls	r2, r3, #8
 8008394:	687b      	ldr	r3, [r7, #4]
 8008396:	685b      	ldr	r3, [r3, #4]
 8008398:	3304      	adds	r3, #4
 800839a:	781b      	ldrb	r3, [r3, #0]
 800839c:	4619      	mov	r1, r3
 800839e:	687b      	ldr	r3, [r7, #4]
 80083a0:	681b      	ldr	r3, [r3, #0]
 80083a2:	430a      	orrs	r2, r1
 80083a4:	f8c3 2300 	str.w	r2, [r3, #768]	@ 0x300
  /* Set MAC addr bits 0 to 31 */
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80083a8:	687b      	ldr	r3, [r7, #4]
 80083aa:	685b      	ldr	r3, [r3, #4]
 80083ac:	3303      	adds	r3, #3
 80083ae:	781b      	ldrb	r3, [r3, #0]
 80083b0:	061a      	lsls	r2, r3, #24
 80083b2:	687b      	ldr	r3, [r7, #4]
 80083b4:	685b      	ldr	r3, [r3, #4]
 80083b6:	3302      	adds	r3, #2
 80083b8:	781b      	ldrb	r3, [r3, #0]
 80083ba:	041b      	lsls	r3, r3, #16
 80083bc:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80083be:	687b      	ldr	r3, [r7, #4]
 80083c0:	685b      	ldr	r3, [r3, #4]
 80083c2:	3301      	adds	r3, #1
 80083c4:	781b      	ldrb	r3, [r3, #0]
 80083c6:	021b      	lsls	r3, r3, #8
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80083c8:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80083ca:	687b      	ldr	r3, [r7, #4]
 80083cc:	685b      	ldr	r3, [r3, #4]
 80083ce:	781b      	ldrb	r3, [r3, #0]
 80083d0:	4619      	mov	r1, r3
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80083d2:	687b      	ldr	r3, [r7, #4]
 80083d4:	681b      	ldr	r3, [r3, #0]
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 80083d6:	430a      	orrs	r2, r1
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 80083d8:	f8c3 2304 	str.w	r2, [r3, #772]	@ 0x304

  /* Disable Rx MMC Interrupts */
  SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
 80083dc:	687b      	ldr	r3, [r7, #4]
 80083de:	681b      	ldr	r3, [r3, #0]
 80083e0:	f8d3 170c 	ldr.w	r1, [r3, #1804]	@ 0x70c
 80083e4:	687b      	ldr	r3, [r7, #4]
 80083e6:	681a      	ldr	r2, [r3, #0]
 80083e8:	4b11      	ldr	r3, [pc, #68]	@ (8008430 <HAL_ETH_Init+0x1f4>)
 80083ea:	430b      	orrs	r3, r1
 80083ec:	f8c2 370c 	str.w	r3, [r2, #1804]	@ 0x70c
          ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);

  /* Disable Tx MMC Interrupts */
  SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
 80083f0:	687b      	ldr	r3, [r7, #4]
 80083f2:	681b      	ldr	r3, [r3, #0]
 80083f4:	f8d3 1710 	ldr.w	r1, [r3, #1808]	@ 0x710
 80083f8:	687b      	ldr	r3, [r7, #4]
 80083fa:	681a      	ldr	r2, [r3, #0]
 80083fc:	4b0d      	ldr	r3, [pc, #52]	@ (8008434 <HAL_ETH_Init+0x1f8>)
 80083fe:	430b      	orrs	r3, r1
 8008400:	f8c2 3710 	str.w	r3, [r2, #1808]	@ 0x710
          ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);

  heth->ErrorCode = HAL_ETH_ERROR_NONE;
 8008404:	687b      	ldr	r3, [r7, #4]
 8008406:	2200      	movs	r2, #0
 8008408:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  heth->gState = HAL_ETH_STATE_READY;
 800840c:	687b      	ldr	r3, [r7, #4]
 800840e:	2210      	movs	r2, #16
 8008410:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8008414:	2300      	movs	r3, #0
}
 8008416:	4618      	mov	r0, r3
 8008418:	3710      	adds	r7, #16
 800841a:	46bd      	mov	sp, r7
 800841c:	bd80      	pop	{r7, pc}
 800841e:	bf00      	nop
 8008420:	58024400 	.word	0x58024400
 8008424:	58000400 	.word	0x58000400
 8008428:	431bde83 	.word	0x431bde83
 800842c:	ffff8001 	.word	0xffff8001
 8008430:	0c020060 	.word	0x0c020060
 8008434:	0c20c000 	.word	0x0c20c000

08008438 <HAL_ETH_Start_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
 8008438:	b580      	push	{r7, lr}
 800843a:	b082      	sub	sp, #8
 800843c:	af00      	add	r7, sp, #0
 800843e:	6078      	str	r0, [r7, #4]
  if (heth->gState == HAL_ETH_STATE_READY)
 8008440:	687b      	ldr	r3, [r7, #4]
 8008442:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008446:	2b10      	cmp	r3, #16
 8008448:	d165      	bne.n	8008516 <HAL_ETH_Start_IT+0xde>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 800844a:	687b      	ldr	r3, [r7, #4]
 800844c:	2223      	movs	r2, #35	@ 0x23
 800844e:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* save IT mode to ETH Handle */
    heth->RxDescList.ItMode = 1U;
 8008452:	687b      	ldr	r3, [r7, #4]
 8008454:	2201      	movs	r2, #1
 8008456:	659a      	str	r2, [r3, #88]	@ 0x58

    /* Set number of descriptors to build */
    heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
 8008458:	687b      	ldr	r3, [r7, #4]
 800845a:	2204      	movs	r2, #4
 800845c:	66da      	str	r2, [r3, #108]	@ 0x6c

    /* Build all descriptors */
    ETH_UpdateDescriptor(heth);
 800845e:	6878      	ldr	r0, [r7, #4]
 8008460:	f000 f9e4 	bl	800882c <ETH_UpdateDescriptor>

    /* Enable the DMA transmission */
    SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8008464:	687b      	ldr	r3, [r7, #4]
 8008466:	681b      	ldr	r3, [r3, #0]
 8008468:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800846c:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 8008470:	687a      	ldr	r2, [r7, #4]
 8008472:	6812      	ldr	r2, [r2, #0]
 8008474:	f043 0301 	orr.w	r3, r3, #1
 8008478:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800847c:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Enable the DMA reception */
    SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 8008480:	687b      	ldr	r3, [r7, #4]
 8008482:	681b      	ldr	r3, [r3, #0]
 8008484:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008488:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 800848c:	687a      	ldr	r2, [r7, #4]
 800848e:	6812      	ldr	r2, [r2, #0]
 8008490:	f043 0301 	orr.w	r3, r3, #1
 8008494:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008498:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Clear Tx and Rx process stopped flags */
    heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
 800849c:	687b      	ldr	r3, [r7, #4]
 800849e:	681b      	ldr	r3, [r3, #0]
 80084a0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80084a4:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 80084a8:	687a      	ldr	r2, [r7, #4]
 80084aa:	6812      	ldr	r2, [r2, #0]
 80084ac:	f443 7381 	orr.w	r3, r3, #258	@ 0x102
 80084b0:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80084b4:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 80084b8:	687b      	ldr	r3, [r7, #4]
 80084ba:	681b      	ldr	r3, [r3, #0]
 80084bc:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 80084c0:	687b      	ldr	r3, [r7, #4]
 80084c2:	681b      	ldr	r3, [r3, #0]
 80084c4:	f042 0201 	orr.w	r2, r2, #1
 80084c8:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Enable the MAC transmission */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 80084cc:	687b      	ldr	r3, [r7, #4]
 80084ce:	681b      	ldr	r3, [r3, #0]
 80084d0:	681a      	ldr	r2, [r3, #0]
 80084d2:	687b      	ldr	r3, [r7, #4]
 80084d4:	681b      	ldr	r3, [r3, #0]
 80084d6:	f042 0202 	orr.w	r2, r2, #2
 80084da:	601a      	str	r2, [r3, #0]

    /* Enable the MAC reception */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 80084dc:	687b      	ldr	r3, [r7, #4]
 80084de:	681b      	ldr	r3, [r3, #0]
 80084e0:	681a      	ldr	r2, [r3, #0]
 80084e2:	687b      	ldr	r3, [r7, #4]
 80084e4:	681b      	ldr	r3, [r3, #0]
 80084e6:	f042 0201 	orr.w	r2, r2, #1
 80084ea:	601a      	str	r2, [r3, #0]
    /* Enable ETH DMA interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 80084ec:	687b      	ldr	r3, [r7, #4]
 80084ee:	681b      	ldr	r3, [r3, #0]
 80084f0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80084f4:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 80084f8:	687b      	ldr	r3, [r7, #4]
 80084fa:	681a      	ldr	r2, [r3, #0]
 80084fc:	f24d 03c1 	movw	r3, #53441	@ 0xd0c1
 8008500:	430b      	orrs	r3, r1
 8008502:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008506:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                   ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    heth->gState = HAL_ETH_STATE_STARTED;
 800850a:	687b      	ldr	r3, [r7, #4]
 800850c:	2223      	movs	r2, #35	@ 0x23
 800850e:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    return HAL_OK;
 8008512:	2300      	movs	r3, #0
 8008514:	e000      	b.n	8008518 <HAL_ETH_Start_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8008516:	2301      	movs	r3, #1
  }
}
 8008518:	4618      	mov	r0, r3
 800851a:	3708      	adds	r7, #8
 800851c:	46bd      	mov	sp, r7
 800851e:	bd80      	pop	{r7, pc}

08008520 <HAL_ETH_Stop_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
 8008520:	b480      	push	{r7}
 8008522:	b085      	sub	sp, #20
 8008524:	af00      	add	r7, sp, #0
 8008526:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t descindex;

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8008528:	687b      	ldr	r3, [r7, #4]
 800852a:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800852e:	2b23      	cmp	r3, #35	@ 0x23
 8008530:	d165      	bne.n	80085fe <HAL_ETH_Stop_IT+0xde>
  {
    /* Set the ETH peripheral state to BUSY */
    heth->gState = HAL_ETH_STATE_BUSY;
 8008532:	687b      	ldr	r3, [r7, #4]
 8008534:	2223      	movs	r2, #35	@ 0x23
 8008536:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Disable interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 800853a:	687b      	ldr	r3, [r7, #4]
 800853c:	681b      	ldr	r3, [r3, #0]
 800853e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008542:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 8008546:	687b      	ldr	r3, [r7, #4]
 8008548:	681a      	ldr	r2, [r3, #0]
 800854a:	4b30      	ldr	r3, [pc, #192]	@ (800860c <HAL_ETH_Stop_IT+0xec>)
 800854c:	400b      	ands	r3, r1
 800854e:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008552:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                    ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    /* Disable the DMA transmission */
    CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 8008556:	687b      	ldr	r3, [r7, #4]
 8008558:	681b      	ldr	r3, [r3, #0]
 800855a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800855e:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 8008562:	687a      	ldr	r2, [r7, #4]
 8008564:	6812      	ldr	r2, [r2, #0]
 8008566:	f023 0301 	bic.w	r3, r3, #1
 800856a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800856e:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Disable the DMA reception */
    CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 8008572:	687b      	ldr	r3, [r7, #4]
 8008574:	681b      	ldr	r3, [r3, #0]
 8008576:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800857a:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 800857e:	687a      	ldr	r2, [r7, #4]
 8008580:	6812      	ldr	r2, [r2, #0]
 8008582:	f023 0301 	bic.w	r3, r3, #1
 8008586:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800858a:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Disable the MAC reception */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 800858e:	687b      	ldr	r3, [r7, #4]
 8008590:	681b      	ldr	r3, [r3, #0]
 8008592:	681a      	ldr	r2, [r3, #0]
 8008594:	687b      	ldr	r3, [r7, #4]
 8008596:	681b      	ldr	r3, [r3, #0]
 8008598:	f022 0201 	bic.w	r2, r2, #1
 800859c:	601a      	str	r2, [r3, #0]

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 800859e:	687b      	ldr	r3, [r7, #4]
 80085a0:	681b      	ldr	r3, [r3, #0]
 80085a2:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 80085a6:	687b      	ldr	r3, [r7, #4]
 80085a8:	681b      	ldr	r3, [r3, #0]
 80085aa:	f042 0201 	orr.w	r2, r2, #1
 80085ae:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Disable the MAC transmission */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 80085b2:	687b      	ldr	r3, [r7, #4]
 80085b4:	681b      	ldr	r3, [r3, #0]
 80085b6:	681a      	ldr	r2, [r3, #0]
 80085b8:	687b      	ldr	r3, [r7, #4]
 80085ba:	681b      	ldr	r3, [r3, #0]
 80085bc:	f022 0202 	bic.w	r2, r2, #2
 80085c0:	601a      	str	r2, [r3, #0]

    /* Clear IOC bit to all Rx descriptors */
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 80085c2:	2300      	movs	r3, #0
 80085c4:	60fb      	str	r3, [r7, #12]
 80085c6:	e00e      	b.n	80085e6 <HAL_ETH_Stop_IT+0xc6>
    {
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
 80085c8:	687b      	ldr	r3, [r7, #4]
 80085ca:	68fa      	ldr	r2, [r7, #12]
 80085cc:	3212      	adds	r2, #18
 80085ce:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80085d2:	60bb      	str	r3, [r7, #8]
      CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
 80085d4:	68bb      	ldr	r3, [r7, #8]
 80085d6:	68db      	ldr	r3, [r3, #12]
 80085d8:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 80085dc:	68bb      	ldr	r3, [r7, #8]
 80085de:	60da      	str	r2, [r3, #12]
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 80085e0:	68fb      	ldr	r3, [r7, #12]
 80085e2:	3301      	adds	r3, #1
 80085e4:	60fb      	str	r3, [r7, #12]
 80085e6:	68fb      	ldr	r3, [r7, #12]
 80085e8:	2b03      	cmp	r3, #3
 80085ea:	d9ed      	bls.n	80085c8 <HAL_ETH_Stop_IT+0xa8>
    }

    heth->RxDescList.ItMode = 0U;
 80085ec:	687b      	ldr	r3, [r7, #4]
 80085ee:	2200      	movs	r2, #0
 80085f0:	659a      	str	r2, [r3, #88]	@ 0x58

    heth->gState = HAL_ETH_STATE_READY;
 80085f2:	687b      	ldr	r3, [r7, #4]
 80085f4:	2210      	movs	r2, #16
 80085f6:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Return function status */
    return HAL_OK;
 80085fa:	2300      	movs	r3, #0
 80085fc:	e000      	b.n	8008600 <HAL_ETH_Stop_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 80085fe:	2301      	movs	r3, #1
  }
}
 8008600:	4618      	mov	r0, r3
 8008602:	3714      	adds	r7, #20
 8008604:	46bd      	mov	sp, r7
 8008606:	f85d 7b04 	ldr.w	r7, [sp], #4
 800860a:	4770      	bx	lr
 800860c:	ffff2f3e 	.word	0xffff2f3e

08008610 <HAL_ETH_Transmit_IT>:
  *         the configuration information for ETHERNET module
  * @param  pTxConfig: Hold the configuration of packet to be transmitted
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
 8008610:	b580      	push	{r7, lr}
 8008612:	b082      	sub	sp, #8
 8008614:	af00      	add	r7, sp, #0
 8008616:	6078      	str	r0, [r7, #4]
 8008618:	6039      	str	r1, [r7, #0]
  if (pTxConfig == NULL)
 800861a:	683b      	ldr	r3, [r7, #0]
 800861c:	2b00      	cmp	r3, #0
 800861e:	d109      	bne.n	8008634 <HAL_ETH_Transmit_IT+0x24>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8008620:	687b      	ldr	r3, [r7, #4]
 8008622:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008626:	f043 0201 	orr.w	r2, r3, #1
 800862a:	687b      	ldr	r3, [r7, #4]
 800862c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8008630:	2301      	movs	r3, #1
 8008632:	e03a      	b.n	80086aa <HAL_ETH_Transmit_IT+0x9a>
  }

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8008634:	687b      	ldr	r3, [r7, #4]
 8008636:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800863a:	2b23      	cmp	r3, #35	@ 0x23
 800863c:	d134      	bne.n	80086a8 <HAL_ETH_Transmit_IT+0x98>
  {
    /* Save the packet pointer to release.  */
    heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
 800863e:	683b      	ldr	r3, [r7, #0]
 8008640:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 8008642:	687b      	ldr	r3, [r7, #4]
 8008644:	63da      	str	r2, [r3, #60]	@ 0x3c

    /* Config DMA Tx descriptor by Tx Packet info */
    if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
 8008646:	2201      	movs	r2, #1
 8008648:	6839      	ldr	r1, [r7, #0]
 800864a:	6878      	ldr	r0, [r7, #4]
 800864c:	f001 f8b6 	bl	80097bc <ETH_Prepare_Tx_Descriptors>
 8008650:	4603      	mov	r3, r0
 8008652:	2b00      	cmp	r3, #0
 8008654:	d009      	beq.n	800866a <HAL_ETH_Transmit_IT+0x5a>
    {
      heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
 8008656:	687b      	ldr	r3, [r7, #4]
 8008658:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800865c:	f043 0202 	orr.w	r2, r3, #2
 8008660:	687b      	ldr	r3, [r7, #4]
 8008662:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      return HAL_ERROR;
 8008666:	2301      	movs	r3, #1
 8008668:	e01f      	b.n	80086aa <HAL_ETH_Transmit_IT+0x9a>
  __ASM volatile ("dsb 0xF":::"memory");
 800866a:	f3bf 8f4f 	dsb	sy
}
 800866e:	bf00      	nop

    /* Ensure completion of descriptor preparation before transmission start */
    __DSB();

    /* Incr current tx desc index */
    INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
 8008670:	687b      	ldr	r3, [r7, #4]
 8008672:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008674:	1c5a      	adds	r2, r3, #1
 8008676:	687b      	ldr	r3, [r7, #4]
 8008678:	629a      	str	r2, [r3, #40]	@ 0x28
 800867a:	687b      	ldr	r3, [r7, #4]
 800867c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800867e:	2b03      	cmp	r3, #3
 8008680:	d904      	bls.n	800868c <HAL_ETH_Transmit_IT+0x7c>
 8008682:	687b      	ldr	r3, [r7, #4]
 8008684:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008686:	1f1a      	subs	r2, r3, #4
 8008688:	687b      	ldr	r3, [r7, #4]
 800868a:	629a      	str	r2, [r3, #40]	@ 0x28

    /* Start transmission */
    /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
 800868c:	687b      	ldr	r3, [r7, #4]
 800868e:	6a99      	ldr	r1, [r3, #40]	@ 0x28
 8008690:	687b      	ldr	r3, [r7, #4]
 8008692:	681a      	ldr	r2, [r3, #0]
 8008694:	687b      	ldr	r3, [r7, #4]
 8008696:	3106      	adds	r1, #6
 8008698:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 800869c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80086a0:	f8c2 3120 	str.w	r3, [r2, #288]	@ 0x120

    return HAL_OK;
 80086a4:	2300      	movs	r3, #0
 80086a6:	e000      	b.n	80086aa <HAL_ETH_Transmit_IT+0x9a>

  }
  else
  {
    return HAL_ERROR;
 80086a8:	2301      	movs	r3, #1
  }
}
 80086aa:	4618      	mov	r0, r3
 80086ac:	3708      	adds	r7, #8
 80086ae:	46bd      	mov	sp, r7
 80086b0:	bd80      	pop	{r7, pc}

080086b2 <HAL_ETH_ReadData>:
  *         the configuration information for ETHERNET module
  * @param  pAppBuff: Pointer to an application buffer to receive the packet.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
 80086b2:	b580      	push	{r7, lr}
 80086b4:	b088      	sub	sp, #32
 80086b6:	af00      	add	r7, sp, #0
 80086b8:	6078      	str	r0, [r7, #4]
 80086ba:	6039      	str	r1, [r7, #0]
  uint32_t descidx;
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t desccnt = 0U;
 80086bc:	2300      	movs	r3, #0
 80086be:	617b      	str	r3, [r7, #20]
  uint32_t desccntmax;
  uint32_t bufflength;
  uint8_t rxdataready = 0U;
 80086c0:	2300      	movs	r3, #0
 80086c2:	74fb      	strb	r3, [r7, #19]

  if (pAppBuff == NULL)
 80086c4:	683b      	ldr	r3, [r7, #0]
 80086c6:	2b00      	cmp	r3, #0
 80086c8:	d109      	bne.n	80086de <HAL_ETH_ReadData+0x2c>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 80086ca:	687b      	ldr	r3, [r7, #4]
 80086cc:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80086d0:	f043 0201 	orr.w	r2, r3, #1
 80086d4:	687b      	ldr	r3, [r7, #4]
 80086d6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 80086da:	2301      	movs	r3, #1
 80086dc:	e0a2      	b.n	8008824 <HAL_ETH_ReadData+0x172>
  }

  if (heth->gState != HAL_ETH_STATE_STARTED)
 80086de:	687b      	ldr	r3, [r7, #4]
 80086e0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 80086e4:	2b23      	cmp	r3, #35	@ 0x23
 80086e6:	d001      	beq.n	80086ec <HAL_ETH_ReadData+0x3a>
  {
    return HAL_ERROR;
 80086e8:	2301      	movs	r3, #1
 80086ea:	e09b      	b.n	8008824 <HAL_ETH_ReadData+0x172>
  }

  descidx = heth->RxDescList.RxDescIdx;
 80086ec:	687b      	ldr	r3, [r7, #4]
 80086ee:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80086f0:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80086f2:	687b      	ldr	r3, [r7, #4]
 80086f4:	69fa      	ldr	r2, [r7, #28]
 80086f6:	3212      	adds	r2, #18
 80086f8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80086fc:	61bb      	str	r3, [r7, #24]
  desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
 80086fe:	687b      	ldr	r3, [r7, #4]
 8008700:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008702:	f1c3 0304 	rsb	r3, r3, #4
 8008706:	60fb      	str	r3, [r7, #12]

  /* Check if descriptor is not owned by DMA */
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008708:	e064      	b.n	80087d4 <HAL_ETH_ReadData+0x122>
         && (rxdataready == 0U))
  {
    if (READ_BIT(dmarxdesc->DESC3,  ETH_DMARXNDESCWBF_CTXT)  != (uint32_t)RESET)
 800870a:	69bb      	ldr	r3, [r7, #24]
 800870c:	68db      	ldr	r3, [r3, #12]
 800870e:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 8008712:	2b00      	cmp	r3, #0
 8008714:	d007      	beq.n	8008726 <HAL_ETH_ReadData+0x74>
    {
      /* Get timestamp high */
      heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
 8008716:	69bb      	ldr	r3, [r7, #24]
 8008718:	685a      	ldr	r2, [r3, #4]
 800871a:	687b      	ldr	r3, [r7, #4]
 800871c:	679a      	str	r2, [r3, #120]	@ 0x78
      /* Get timestamp low */
      heth->RxDescList.TimeStamp.TimeStampLow  = dmarxdesc->DESC0;
 800871e:	69bb      	ldr	r3, [r7, #24]
 8008720:	681a      	ldr	r2, [r3, #0]
 8008722:	687b      	ldr	r3, [r7, #4]
 8008724:	675a      	str	r2, [r3, #116]	@ 0x74
    }
    if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
 8008726:	69bb      	ldr	r3, [r7, #24]
 8008728:	68db      	ldr	r3, [r3, #12]
 800872a:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800872e:	2b00      	cmp	r3, #0
 8008730:	d103      	bne.n	800873a <HAL_ETH_ReadData+0x88>
 8008732:	687b      	ldr	r3, [r7, #4]
 8008734:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 8008736:	2b00      	cmp	r3, #0
 8008738:	d03a      	beq.n	80087b0 <HAL_ETH_ReadData+0xfe>
    {
      /* Check if first descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
 800873a:	69bb      	ldr	r3, [r7, #24]
 800873c:	68db      	ldr	r3, [r3, #12]
 800873e:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 8008742:	2b00      	cmp	r3, #0
 8008744:	d005      	beq.n	8008752 <HAL_ETH_ReadData+0xa0>
      {
        heth->RxDescList.RxDescCnt = 0;
 8008746:	687b      	ldr	r3, [r7, #4]
 8008748:	2200      	movs	r2, #0
 800874a:	661a      	str	r2, [r3, #96]	@ 0x60
        heth->RxDescList.RxDataLength = 0;
 800874c:	687b      	ldr	r3, [r7, #4]
 800874e:	2200      	movs	r2, #0
 8008750:	665a      	str	r2, [r3, #100]	@ 0x64
      }

      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
      bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
 8008752:	69bb      	ldr	r3, [r7, #24]
 8008754:	68db      	ldr	r3, [r3, #12]
 8008756:	f3c3 020e 	ubfx	r2, r3, #0, #15
 800875a:	687b      	ldr	r3, [r7, #4]
 800875c:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800875e:	1ad3      	subs	r3, r2, r3
 8008760:	60bb      	str	r3, [r7, #8]

      /* Check if last descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
 8008762:	69bb      	ldr	r3, [r7, #24]
 8008764:	68db      	ldr	r3, [r3, #12]
 8008766:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800876a:	2b00      	cmp	r3, #0
 800876c:	d005      	beq.n	800877a <HAL_ETH_ReadData+0xc8>
      {
        /* Save Last descriptor index */
        heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
 800876e:	69bb      	ldr	r3, [r7, #24]
 8008770:	68da      	ldr	r2, [r3, #12]
 8008772:	687b      	ldr	r3, [r7, #4]
 8008774:	671a      	str	r2, [r3, #112]	@ 0x70

        /* Packet ready */
        rxdataready = 1;
 8008776:	2301      	movs	r3, #1
 8008778:	74fb      	strb	r3, [r7, #19]
      /*Call registered Link callback*/
      heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
                           (uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
      /* Link callback */
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 800877a:	687b      	ldr	r3, [r7, #4]
 800877c:	f103 007c 	add.w	r0, r3, #124	@ 0x7c
 8008780:	687b      	ldr	r3, [r7, #4]
 8008782:	f103 0180 	add.w	r1, r3, #128	@ 0x80
                             (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
 8008786:	69bb      	ldr	r3, [r7, #24]
 8008788:	691b      	ldr	r3, [r3, #16]
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 800878a:	461a      	mov	r2, r3
 800878c:	68bb      	ldr	r3, [r7, #8]
 800878e:	b29b      	uxth	r3, r3
 8008790:	f008 fb24 	bl	8010ddc <HAL_ETH_RxLinkCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      heth->RxDescList.RxDescCnt++;
 8008794:	687b      	ldr	r3, [r7, #4]
 8008796:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8008798:	1c5a      	adds	r2, r3, #1
 800879a:	687b      	ldr	r3, [r7, #4]
 800879c:	661a      	str	r2, [r3, #96]	@ 0x60
      heth->RxDescList.RxDataLength += bufflength;
 800879e:	687b      	ldr	r3, [r7, #4]
 80087a0:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 80087a2:	68bb      	ldr	r3, [r7, #8]
 80087a4:	441a      	add	r2, r3
 80087a6:	687b      	ldr	r3, [r7, #4]
 80087a8:	665a      	str	r2, [r3, #100]	@ 0x64

      /* Clear buffer pointer */
      dmarxdesc->BackupAddr0 = 0;
 80087aa:	69bb      	ldr	r3, [r7, #24]
 80087ac:	2200      	movs	r2, #0
 80087ae:	611a      	str	r2, [r3, #16]
    }

    /* Increment current rx descriptor index */
    INCR_RX_DESC_INDEX(descidx, 1U);
 80087b0:	69fb      	ldr	r3, [r7, #28]
 80087b2:	3301      	adds	r3, #1
 80087b4:	61fb      	str	r3, [r7, #28]
 80087b6:	69fb      	ldr	r3, [r7, #28]
 80087b8:	2b03      	cmp	r3, #3
 80087ba:	d902      	bls.n	80087c2 <HAL_ETH_ReadData+0x110>
 80087bc:	69fb      	ldr	r3, [r7, #28]
 80087be:	3b04      	subs	r3, #4
 80087c0:	61fb      	str	r3, [r7, #28]
    /* Get current descriptor address */
    dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80087c2:	687b      	ldr	r3, [r7, #4]
 80087c4:	69fa      	ldr	r2, [r7, #28]
 80087c6:	3212      	adds	r2, #18
 80087c8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80087cc:	61bb      	str	r3, [r7, #24]
    desccnt++;
 80087ce:	697b      	ldr	r3, [r7, #20]
 80087d0:	3301      	adds	r3, #1
 80087d2:	617b      	str	r3, [r7, #20]
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 80087d4:	69bb      	ldr	r3, [r7, #24]
 80087d6:	68db      	ldr	r3, [r3, #12]
         && (rxdataready == 0U))
 80087d8:	2b00      	cmp	r3, #0
 80087da:	db06      	blt.n	80087ea <HAL_ETH_ReadData+0x138>
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 80087dc:	697a      	ldr	r2, [r7, #20]
 80087de:	68fb      	ldr	r3, [r7, #12]
 80087e0:	429a      	cmp	r2, r3
 80087e2:	d202      	bcs.n	80087ea <HAL_ETH_ReadData+0x138>
         && (rxdataready == 0U))
 80087e4:	7cfb      	ldrb	r3, [r7, #19]
 80087e6:	2b00      	cmp	r3, #0
 80087e8:	d08f      	beq.n	800870a <HAL_ETH_ReadData+0x58>
  }

  heth->RxDescList.RxBuildDescCnt += desccnt;
 80087ea:	687b      	ldr	r3, [r7, #4]
 80087ec:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 80087ee:	697b      	ldr	r3, [r7, #20]
 80087f0:	441a      	add	r2, r3
 80087f2:	687b      	ldr	r3, [r7, #4]
 80087f4:	66da      	str	r2, [r3, #108]	@ 0x6c
  if ((heth->RxDescList.RxBuildDescCnt) != 0U)
 80087f6:	687b      	ldr	r3, [r7, #4]
 80087f8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80087fa:	2b00      	cmp	r3, #0
 80087fc:	d002      	beq.n	8008804 <HAL_ETH_ReadData+0x152>
  {
    /* Update Descriptors */
    ETH_UpdateDescriptor(heth);
 80087fe:	6878      	ldr	r0, [r7, #4]
 8008800:	f000 f814 	bl	800882c <ETH_UpdateDescriptor>
  }

  heth->RxDescList.RxDescIdx = descidx;
 8008804:	687b      	ldr	r3, [r7, #4]
 8008806:	69fa      	ldr	r2, [r7, #28]
 8008808:	65da      	str	r2, [r3, #92]	@ 0x5c

  if (rxdataready == 1U)
 800880a:	7cfb      	ldrb	r3, [r7, #19]
 800880c:	2b01      	cmp	r3, #1
 800880e:	d108      	bne.n	8008822 <HAL_ETH_ReadData+0x170>
  {
    /* Return received packet */
    *pAppBuff = heth->RxDescList.pRxStart;
 8008810:	687b      	ldr	r3, [r7, #4]
 8008812:	6fda      	ldr	r2, [r3, #124]	@ 0x7c
 8008814:	683b      	ldr	r3, [r7, #0]
 8008816:	601a      	str	r2, [r3, #0]
    /* Reset first element */
    heth->RxDescList.pRxStart = NULL;
 8008818:	687b      	ldr	r3, [r7, #4]
 800881a:	2200      	movs	r2, #0
 800881c:	67da      	str	r2, [r3, #124]	@ 0x7c

    return HAL_OK;
 800881e:	2300      	movs	r3, #0
 8008820:	e000      	b.n	8008824 <HAL_ETH_ReadData+0x172>
  }

  /* Packet not ready */
  return HAL_ERROR;
 8008822:	2301      	movs	r3, #1
}
 8008824:	4618      	mov	r0, r3
 8008826:	3720      	adds	r7, #32
 8008828:	46bd      	mov	sp, r7
 800882a:	bd80      	pop	{r7, pc}

0800882c <ETH_UpdateDescriptor>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
 800882c:	b580      	push	{r7, lr}
 800882e:	b088      	sub	sp, #32
 8008830:	af00      	add	r7, sp, #0
 8008832:	6078      	str	r0, [r7, #4]
  uint32_t descidx;
  uint32_t tailidx;
  uint32_t desccount;
  ETH_DMADescTypeDef *dmarxdesc;
  uint8_t *buff = NULL;
 8008834:	2300      	movs	r3, #0
 8008836:	60bb      	str	r3, [r7, #8]
  uint8_t allocStatus = 1U;
 8008838:	2301      	movs	r3, #1
 800883a:	74fb      	strb	r3, [r7, #19]

  descidx = heth->RxDescList.RxBuildDescIdx;
 800883c:	687b      	ldr	r3, [r7, #4]
 800883e:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8008840:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008842:	687b      	ldr	r3, [r7, #4]
 8008844:	69fa      	ldr	r2, [r7, #28]
 8008846:	3212      	adds	r2, #18
 8008848:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800884c:	617b      	str	r3, [r7, #20]
  desccount = heth->RxDescList.RxBuildDescCnt;
 800884e:	687b      	ldr	r3, [r7, #4]
 8008850:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008852:	61bb      	str	r3, [r7, #24]

  while ((desccount > 0U) && (allocStatus != 0U))
 8008854:	e038      	b.n	80088c8 <ETH_UpdateDescriptor+0x9c>
  {
    /* Check if a buffer's attached the descriptor */
    if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
 8008856:	697b      	ldr	r3, [r7, #20]
 8008858:	691b      	ldr	r3, [r3, #16]
 800885a:	2b00      	cmp	r3, #0
 800885c:	d112      	bne.n	8008884 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
      /*Call registered Allocate callback*/
      heth->rxAllocateCallback(&buff);
#else
      /* Allocate callback */
      HAL_ETH_RxAllocateCallback(&buff);
 800885e:	f107 0308 	add.w	r3, r7, #8
 8008862:	4618      	mov	r0, r3
 8008864:	f008 fa8a 	bl	8010d7c <HAL_ETH_RxAllocateCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      if (buff == NULL)
 8008868:	68bb      	ldr	r3, [r7, #8]
 800886a:	2b00      	cmp	r3, #0
 800886c:	d102      	bne.n	8008874 <ETH_UpdateDescriptor+0x48>
      {
        allocStatus = 0U;
 800886e:	2300      	movs	r3, #0
 8008870:	74fb      	strb	r3, [r7, #19]
 8008872:	e007      	b.n	8008884 <ETH_UpdateDescriptor+0x58>
      }
      else
      {
        WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
 8008874:	68bb      	ldr	r3, [r7, #8]
 8008876:	461a      	mov	r2, r3
 8008878:	697b      	ldr	r3, [r7, #20]
 800887a:	611a      	str	r2, [r3, #16]
        WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
 800887c:	68bb      	ldr	r3, [r7, #8]
 800887e:	461a      	mov	r2, r3
 8008880:	697b      	ldr	r3, [r7, #20]
 8008882:	601a      	str	r2, [r3, #0]
      }
    }

    if (allocStatus != 0U)
 8008884:	7cfb      	ldrb	r3, [r7, #19]
 8008886:	2b00      	cmp	r3, #0
 8008888:	d01e      	beq.n	80088c8 <ETH_UpdateDescriptor+0x9c>
    {

      if (heth->RxDescList.ItMode != 0U)
 800888a:	687b      	ldr	r3, [r7, #4]
 800888c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800888e:	2b00      	cmp	r3, #0
 8008890:	d004      	beq.n	800889c <ETH_UpdateDescriptor+0x70>
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
 8008892:	697b      	ldr	r3, [r7, #20]
 8008894:	f04f 4241 	mov.w	r2, #3238002688	@ 0xc1000000
 8008898:	60da      	str	r2, [r3, #12]
 800889a:	e003      	b.n	80088a4 <ETH_UpdateDescriptor+0x78>
      }
      else
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
 800889c:	697b      	ldr	r3, [r7, #20]
 800889e:	f04f 4201 	mov.w	r2, #2164260864	@ 0x81000000
 80088a2:	60da      	str	r2, [r3, #12]
      }

      /* Increment current rx descriptor index */
      INCR_RX_DESC_INDEX(descidx, 1U);
 80088a4:	69fb      	ldr	r3, [r7, #28]
 80088a6:	3301      	adds	r3, #1
 80088a8:	61fb      	str	r3, [r7, #28]
 80088aa:	69fb      	ldr	r3, [r7, #28]
 80088ac:	2b03      	cmp	r3, #3
 80088ae:	d902      	bls.n	80088b6 <ETH_UpdateDescriptor+0x8a>
 80088b0:	69fb      	ldr	r3, [r7, #28]
 80088b2:	3b04      	subs	r3, #4
 80088b4:	61fb      	str	r3, [r7, #28]
      /* Get current descriptor address */
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 80088b6:	687b      	ldr	r3, [r7, #4]
 80088b8:	69fa      	ldr	r2, [r7, #28]
 80088ba:	3212      	adds	r2, #18
 80088bc:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80088c0:	617b      	str	r3, [r7, #20]
      desccount--;
 80088c2:	69bb      	ldr	r3, [r7, #24]
 80088c4:	3b01      	subs	r3, #1
 80088c6:	61bb      	str	r3, [r7, #24]
  while ((desccount > 0U) && (allocStatus != 0U))
 80088c8:	69bb      	ldr	r3, [r7, #24]
 80088ca:	2b00      	cmp	r3, #0
 80088cc:	d002      	beq.n	80088d4 <ETH_UpdateDescriptor+0xa8>
 80088ce:	7cfb      	ldrb	r3, [r7, #19]
 80088d0:	2b00      	cmp	r3, #0
 80088d2:	d1c0      	bne.n	8008856 <ETH_UpdateDescriptor+0x2a>
    }
  }

  if (heth->RxDescList.RxBuildDescCnt != desccount)
 80088d4:	687b      	ldr	r3, [r7, #4]
 80088d6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80088d8:	69ba      	ldr	r2, [r7, #24]
 80088da:	429a      	cmp	r2, r3
 80088dc:	d01b      	beq.n	8008916 <ETH_UpdateDescriptor+0xea>
  {
    /* Set the tail pointer index */
    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
 80088de:	69fb      	ldr	r3, [r7, #28]
 80088e0:	3301      	adds	r3, #1
 80088e2:	f003 0303 	and.w	r3, r3, #3
 80088e6:	60fb      	str	r3, [r7, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 80088e8:	f3bf 8f5f 	dmb	sy
}
 80088ec:	bf00      	nop

    /* DMB instruction to avoid race condition */
    __DMB();

    /* Set the Tail pointer address */
    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 80088ee:	687b      	ldr	r3, [r7, #4]
 80088f0:	6919      	ldr	r1, [r3, #16]
 80088f2:	68fa      	ldr	r2, [r7, #12]
 80088f4:	4613      	mov	r3, r2
 80088f6:	005b      	lsls	r3, r3, #1
 80088f8:	4413      	add	r3, r2
 80088fa:	00db      	lsls	r3, r3, #3
 80088fc:	18ca      	adds	r2, r1, r3
 80088fe:	687b      	ldr	r3, [r7, #4]
 8008900:	681b      	ldr	r3, [r3, #0]
 8008902:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008906:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128

    heth->RxDescList.RxBuildDescIdx = descidx;
 800890a:	687b      	ldr	r3, [r7, #4]
 800890c:	69fa      	ldr	r2, [r7, #28]
 800890e:	669a      	str	r2, [r3, #104]	@ 0x68
    heth->RxDescList.RxBuildDescCnt = desccount;
 8008910:	687b      	ldr	r3, [r7, #4]
 8008912:	69ba      	ldr	r2, [r7, #24]
 8008914:	66da      	str	r2, [r3, #108]	@ 0x6c
  }
}
 8008916:	bf00      	nop
 8008918:	3720      	adds	r7, #32
 800891a:	46bd      	mov	sp, r7
 800891c:	bd80      	pop	{r7, pc}

0800891e <HAL_ETH_ReleaseTxPacket>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
 800891e:	b580      	push	{r7, lr}
 8008920:	b086      	sub	sp, #24
 8008922:	af00      	add	r7, sp, #0
 8008924:	6078      	str	r0, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8008926:	687b      	ldr	r3, [r7, #4]
 8008928:	3318      	adds	r3, #24
 800892a:	60bb      	str	r3, [r7, #8]
  uint32_t numOfBuf =  dmatxdesclist->BuffersInUse;
 800892c:	68bb      	ldr	r3, [r7, #8]
 800892e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008930:	617b      	str	r3, [r7, #20]
  uint32_t idx =       dmatxdesclist->releaseIndex;
 8008932:	68bb      	ldr	r3, [r7, #8]
 8008934:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8008936:	613b      	str	r3, [r7, #16]
  uint8_t pktTxStatus = 1U;
 8008938:	2301      	movs	r3, #1
 800893a:	73fb      	strb	r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
  ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */

  /* Loop through buffers in use.  */
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 800893c:	e047      	b.n	80089ce <HAL_ETH_ReleaseTxPacket+0xb0>
  {
    pktInUse = 1U;
 800893e:	2301      	movs	r3, #1
 8008940:	73bb      	strb	r3, [r7, #14]
    numOfBuf--;
 8008942:	697b      	ldr	r3, [r7, #20]
 8008944:	3b01      	subs	r3, #1
 8008946:	617b      	str	r3, [r7, #20]
    /* If no packet, just examine the next packet.  */
    if (dmatxdesclist->PacketAddress[idx] == NULL)
 8008948:	68ba      	ldr	r2, [r7, #8]
 800894a:	693b      	ldr	r3, [r7, #16]
 800894c:	3304      	adds	r3, #4
 800894e:	009b      	lsls	r3, r3, #2
 8008950:	4413      	add	r3, r2
 8008952:	685b      	ldr	r3, [r3, #4]
 8008954:	2b00      	cmp	r3, #0
 8008956:	d10a      	bne.n	800896e <HAL_ETH_ReleaseTxPacket+0x50>
    {
      /* No packet in use, skip to next.  */
      INCR_TX_DESC_INDEX(idx, 1U);
 8008958:	693b      	ldr	r3, [r7, #16]
 800895a:	3301      	adds	r3, #1
 800895c:	613b      	str	r3, [r7, #16]
 800895e:	693b      	ldr	r3, [r7, #16]
 8008960:	2b03      	cmp	r3, #3
 8008962:	d902      	bls.n	800896a <HAL_ETH_ReleaseTxPacket+0x4c>
 8008964:	693b      	ldr	r3, [r7, #16]
 8008966:	3b04      	subs	r3, #4
 8008968:	613b      	str	r3, [r7, #16]
      pktInUse = 0U;
 800896a:	2300      	movs	r3, #0
 800896c:	73bb      	strb	r3, [r7, #14]
    }

    if (pktInUse != 0U)
 800896e:	7bbb      	ldrb	r3, [r7, #14]
 8008970:	2b00      	cmp	r3, #0
 8008972:	d02c      	beq.n	80089ce <HAL_ETH_ReleaseTxPacket+0xb0>
    {
      /* Determine if the packet has been transmitted.  */
      if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
 8008974:	687b      	ldr	r3, [r7, #4]
 8008976:	68d9      	ldr	r1, [r3, #12]
 8008978:	693a      	ldr	r2, [r7, #16]
 800897a:	4613      	mov	r3, r2
 800897c:	005b      	lsls	r3, r3, #1
 800897e:	4413      	add	r3, r2
 8008980:	00db      	lsls	r3, r3, #3
 8008982:	440b      	add	r3, r1
 8008984:	68db      	ldr	r3, [r3, #12]
 8008986:	2b00      	cmp	r3, #0
 8008988:	db1f      	blt.n	80089ca <HAL_ETH_ReleaseTxPacket+0xac>
        {
          HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
        }
#endif  /* HAL_ETH_USE_PTP */
        /* Release the packet.  */
        HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
 800898a:	68ba      	ldr	r2, [r7, #8]
 800898c:	693b      	ldr	r3, [r7, #16]
 800898e:	3304      	adds	r3, #4
 8008990:	009b      	lsls	r3, r3, #2
 8008992:	4413      	add	r3, r2
 8008994:	685b      	ldr	r3, [r3, #4]
 8008996:	4618      	mov	r0, r3
 8008998:	f008 fa88 	bl	8010eac <HAL_ETH_TxFreeCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

        /* Clear the entry in the in-use array.  */
        dmatxdesclist->PacketAddress[idx] = NULL;
 800899c:	68ba      	ldr	r2, [r7, #8]
 800899e:	693b      	ldr	r3, [r7, #16]
 80089a0:	3304      	adds	r3, #4
 80089a2:	009b      	lsls	r3, r3, #2
 80089a4:	4413      	add	r3, r2
 80089a6:	2200      	movs	r2, #0
 80089a8:	605a      	str	r2, [r3, #4]

        /* Update the transmit relesae index and number of buffers in use.  */
        INCR_TX_DESC_INDEX(idx, 1U);
 80089aa:	693b      	ldr	r3, [r7, #16]
 80089ac:	3301      	adds	r3, #1
 80089ae:	613b      	str	r3, [r7, #16]
 80089b0:	693b      	ldr	r3, [r7, #16]
 80089b2:	2b03      	cmp	r3, #3
 80089b4:	d902      	bls.n	80089bc <HAL_ETH_ReleaseTxPacket+0x9e>
 80089b6:	693b      	ldr	r3, [r7, #16]
 80089b8:	3b04      	subs	r3, #4
 80089ba:	613b      	str	r3, [r7, #16]
        dmatxdesclist->BuffersInUse = numOfBuf;
 80089bc:	68bb      	ldr	r3, [r7, #8]
 80089be:	697a      	ldr	r2, [r7, #20]
 80089c0:	629a      	str	r2, [r3, #40]	@ 0x28
        dmatxdesclist->releaseIndex = idx;
 80089c2:	68bb      	ldr	r3, [r7, #8]
 80089c4:	693a      	ldr	r2, [r7, #16]
 80089c6:	62da      	str	r2, [r3, #44]	@ 0x2c
 80089c8:	e001      	b.n	80089ce <HAL_ETH_ReleaseTxPacket+0xb0>
      }
      else
      {
        /* Get out of the loop!  */
        pktTxStatus = 0U;
 80089ca:	2300      	movs	r3, #0
 80089cc:	73fb      	strb	r3, [r7, #15]
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 80089ce:	697b      	ldr	r3, [r7, #20]
 80089d0:	2b00      	cmp	r3, #0
 80089d2:	d002      	beq.n	80089da <HAL_ETH_ReleaseTxPacket+0xbc>
 80089d4:	7bfb      	ldrb	r3, [r7, #15]
 80089d6:	2b00      	cmp	r3, #0
 80089d8:	d1b1      	bne.n	800893e <HAL_ETH_ReleaseTxPacket+0x20>
      }
    }
  }
  return HAL_OK;
 80089da:	2300      	movs	r3, #0
}
 80089dc:	4618      	mov	r0, r3
 80089de:	3718      	adds	r7, #24
 80089e0:	46bd      	mov	sp, r7
 80089e2:	bd80      	pop	{r7, pc}

080089e4 <HAL_ETH_IRQHandler>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
 80089e4:	b580      	push	{r7, lr}
 80089e6:	b086      	sub	sp, #24
 80089e8:	af00      	add	r7, sp, #0
 80089ea:	6078      	str	r0, [r7, #4]
  uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
 80089ec:	687b      	ldr	r3, [r7, #4]
 80089ee:	681b      	ldr	r3, [r3, #0]
 80089f0:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 80089f4:	617b      	str	r3, [r7, #20]
  uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
 80089f6:	687b      	ldr	r3, [r7, #4]
 80089f8:	681b      	ldr	r3, [r3, #0]
 80089fa:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80089fe:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008a02:	613b      	str	r3, [r7, #16]
  uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
 8008a04:	687b      	ldr	r3, [r7, #4]
 8008a06:	681b      	ldr	r3, [r3, #0]
 8008a08:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008a0c:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8008a10:	60fb      	str	r3, [r7, #12]
  uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
 8008a12:	4b6d      	ldr	r3, [pc, #436]	@ (8008bc8 <HAL_ETH_IRQHandler+0x1e4>)
 8008a14:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008a16:	60bb      	str	r3, [r7, #8]
#if defined(DUAL_CORE)
  uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */

  /* Packet received */
  if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
 8008a18:	693b      	ldr	r3, [r7, #16]
 8008a1a:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008a1e:	2b00      	cmp	r3, #0
 8008a20:	d010      	beq.n	8008a44 <HAL_ETH_IRQHandler+0x60>
 8008a22:	68fb      	ldr	r3, [r7, #12]
 8008a24:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008a28:	2b00      	cmp	r3, #0
 8008a2a:	d00b      	beq.n	8008a44 <HAL_ETH_IRQHandler+0x60>
  {
    /* Clear the Eth DMA Rx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
 8008a2c:	687b      	ldr	r3, [r7, #4]
 8008a2e:	681b      	ldr	r3, [r3, #0]
 8008a30:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008a34:	461a      	mov	r2, r3
 8008a36:	f248 0340 	movw	r3, #32832	@ 0x8040
 8008a3a:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Receive complete callback*/
    heth->RxCpltCallback(heth);
#else
    /* Receive complete callback */
    HAL_ETH_RxCpltCallback(heth);
 8008a3e:	6878      	ldr	r0, [r7, #4]
 8008a40:	f007 fd24 	bl	801048c <HAL_ETH_RxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* Packet transmitted */
  if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
 8008a44:	693b      	ldr	r3, [r7, #16]
 8008a46:	f003 0301 	and.w	r3, r3, #1
 8008a4a:	2b00      	cmp	r3, #0
 8008a4c:	d010      	beq.n	8008a70 <HAL_ETH_IRQHandler+0x8c>
 8008a4e:	68fb      	ldr	r3, [r7, #12]
 8008a50:	f003 0301 	and.w	r3, r3, #1
 8008a54:	2b00      	cmp	r3, #0
 8008a56:	d00b      	beq.n	8008a70 <HAL_ETH_IRQHandler+0x8c>
  {
    /* Clear the Eth DMA Tx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
 8008a58:	687b      	ldr	r3, [r7, #4]
 8008a5a:	681b      	ldr	r3, [r3, #0]
 8008a5c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008a60:	461a      	mov	r2, r3
 8008a62:	f248 0301 	movw	r3, #32769	@ 0x8001
 8008a66:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Transmit complete callback*/
    heth->TxCpltCallback(heth);
#else
    /* Transfer complete callback */
    HAL_ETH_TxCpltCallback(heth);
 8008a6a:	6878      	ldr	r0, [r7, #4]
 8008a6c:	f007 fd1e 	bl	80104ac <HAL_ETH_TxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH DMA Error */
  if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
 8008a70:	693b      	ldr	r3, [r7, #16]
 8008a72:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008a76:	2b00      	cmp	r3, #0
 8008a78:	d047      	beq.n	8008b0a <HAL_ETH_IRQHandler+0x126>
 8008a7a:	68fb      	ldr	r3, [r7, #12]
 8008a7c:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008a80:	2b00      	cmp	r3, #0
 8008a82:	d042      	beq.n	8008b0a <HAL_ETH_IRQHandler+0x126>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_DMA;
 8008a84:	687b      	ldr	r3, [r7, #4]
 8008a86:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008a8a:	f043 0208 	orr.w	r2, r3, #8
 8008a8e:	687b      	ldr	r3, [r7, #4]
 8008a90:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* if fatal bus error occurred */
    if ((dma_flag & ETH_DMACSR_FBE) != 0U)
 8008a94:	693b      	ldr	r3, [r7, #16]
 8008a96:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8008a9a:	2b00      	cmp	r3, #0
 8008a9c:	d01e      	beq.n	8008adc <HAL_ETH_IRQHandler+0xf8>
    {
      /* Get DMA error code  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
 8008a9e:	687b      	ldr	r3, [r7, #4]
 8008aa0:	681b      	ldr	r3, [r3, #0]
 8008aa2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008aa6:	f8d3 2160 	ldr.w	r2, [r3, #352]	@ 0x160
 8008aaa:	f241 1302 	movw	r3, #4354	@ 0x1102
 8008aae:	4013      	ands	r3, r2
 8008ab0:	687a      	ldr	r2, [r7, #4]
 8008ab2:	f8c2 308c 	str.w	r3, [r2, #140]	@ 0x8c

      /* Disable all interrupts */
      __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
 8008ab6:	687b      	ldr	r3, [r7, #4]
 8008ab8:	681b      	ldr	r3, [r3, #0]
 8008aba:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008abe:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8008ac2:	687a      	ldr	r2, [r7, #4]
 8008ac4:	6812      	ldr	r2, [r2, #0]
 8008ac6:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
 8008aca:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008ace:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134

      /* Set HAL state to ERROR */
      heth->gState = HAL_ETH_STATE_ERROR;
 8008ad2:	687b      	ldr	r3, [r7, #4]
 8008ad4:	22e0      	movs	r2, #224	@ 0xe0
 8008ad6:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
 8008ada:	e013      	b.n	8008b04 <HAL_ETH_IRQHandler+0x120>
    }
    else
    {
      /* Get DMA error status  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8008adc:	687b      	ldr	r3, [r7, #4]
 8008ade:	681b      	ldr	r3, [r3, #0]
 8008ae0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008ae4:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008ae8:	f403 42cd 	and.w	r2, r3, #26240	@ 0x6680
 8008aec:	687b      	ldr	r3, [r7, #4]
 8008aee:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
                                                             ETH_DMACSR_RBU | ETH_DMACSR_AIS));

      /* Clear the interrupt summary flag */
      __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8008af2:	687b      	ldr	r3, [r7, #4]
 8008af4:	681b      	ldr	r3, [r3, #0]
 8008af6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008afa:	461a      	mov	r2, r3
 8008afc:	f44f 43cd 	mov.w	r3, #26240	@ 0x6680
 8008b00:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet DMA Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008b04:	6878      	ldr	r0, [r7, #4]
 8008b06:	f007 fce1 	bl	80104cc <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH MAC Error IT */
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008b0a:	697b      	ldr	r3, [r7, #20]
 8008b0c:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008b10:	2b00      	cmp	r3, #0
 8008b12:	d104      	bne.n	8008b1e <HAL_ETH_IRQHandler+0x13a>
      ((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
 8008b14:	697b      	ldr	r3, [r7, #20]
 8008b16:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008b1a:	2b00      	cmp	r3, #0
 8008b1c:	d019      	beq.n	8008b52 <HAL_ETH_IRQHandler+0x16e>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_MAC;
 8008b1e:	687b      	ldr	r3, [r7, #4]
 8008b20:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008b24:	f043 0210 	orr.w	r2, r3, #16
 8008b28:	687b      	ldr	r3, [r7, #4]
 8008b2a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Get MAC Rx Tx status and clear Status register pending bit */
    heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
 8008b2e:	687b      	ldr	r3, [r7, #4]
 8008b30:	681b      	ldr	r3, [r3, #0]
 8008b32:	f8d3 20b8 	ldr.w	r2, [r3, #184]	@ 0xb8
 8008b36:	687b      	ldr	r3, [r7, #4]
 8008b38:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

    heth->gState = HAL_ETH_STATE_ERROR;
 8008b3c:	687b      	ldr	r3, [r7, #4]
 8008b3e:	22e0      	movs	r2, #224	@ 0xe0
 8008b40:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008b44:	6878      	ldr	r0, [r7, #4]
 8008b46:	f007 fcc1 	bl	80104cc <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
    heth->MACErrorCode = (uint32_t)(0x0U);
 8008b4a:	687b      	ldr	r3, [r7, #4]
 8008b4c:	2200      	movs	r2, #0
 8008b4e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }

  /* ETH PMT IT */
  if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
 8008b52:	697b      	ldr	r3, [r7, #20]
 8008b54:	f003 0310 	and.w	r3, r3, #16
 8008b58:	2b00      	cmp	r3, #0
 8008b5a:	d00f      	beq.n	8008b7c <HAL_ETH_IRQHandler+0x198>
  {
    /* Get MAC Wake-up source and clear the status register pending bit */
    heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
 8008b5c:	687b      	ldr	r3, [r7, #4]
 8008b5e:	681b      	ldr	r3, [r3, #0]
 8008b60:	f8d3 30c0 	ldr.w	r3, [r3, #192]	@ 0xc0
 8008b64:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008b68:	687b      	ldr	r3, [r7, #4]
 8008b6a:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered PMT callback*/
    heth->PMTCallback(heth);
#else
    /* Ethernet PMT callback */
    HAL_ETH_PMTCallback(heth);
 8008b6e:	6878      	ldr	r0, [r7, #4]
 8008b70:	f000 f82c 	bl	8008bcc <HAL_ETH_PMTCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACWakeUpEvent = (uint32_t)(0x0U);
 8008b74:	687b      	ldr	r3, [r7, #4]
 8008b76:	2200      	movs	r2, #0
 8008b78:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
  }

  /* ETH EEE IT */
  if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
 8008b7c:	697b      	ldr	r3, [r7, #20]
 8008b7e:	f003 0320 	and.w	r3, r3, #32
 8008b82:	2b00      	cmp	r3, #0
 8008b84:	d00f      	beq.n	8008ba6 <HAL_ETH_IRQHandler+0x1c2>
  {
    /* Get MAC LPI interrupt source and clear the status register pending bit */
    heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
 8008b86:	687b      	ldr	r3, [r7, #4]
 8008b88:	681b      	ldr	r3, [r3, #0]
 8008b8a:	f8d3 30d0 	ldr.w	r3, [r3, #208]	@ 0xd0
 8008b8e:	f003 020f 	and.w	r2, r3, #15
 8008b92:	687b      	ldr	r3, [r7, #4]
 8008b94:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered EEE callback*/
    heth->EEECallback(heth);
#else
    /* Ethernet EEE callback */
    HAL_ETH_EEECallback(heth);
 8008b98:	6878      	ldr	r0, [r7, #4]
 8008b9a:	f000 f821 	bl	8008be0 <HAL_ETH_EEECallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACLPIEvent = (uint32_t)(0x0U);
 8008b9e:	687b      	ldr	r3, [r7, #4]
 8008ba0:	2200      	movs	r2, #0
 8008ba2:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
    }
  }
#else /* DUAL_CORE not defined */
  /* check ETH WAKEUP exti flag */
  if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
 8008ba6:	68bb      	ldr	r3, [r7, #8]
 8008ba8:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008bac:	2b00      	cmp	r3, #0
 8008bae:	d006      	beq.n	8008bbe <HAL_ETH_IRQHandler+0x1da>
  {
    /* Clear ETH WAKEUP Exti pending bit */
    __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
 8008bb0:	4b05      	ldr	r3, [pc, #20]	@ (8008bc8 <HAL_ETH_IRQHandler+0x1e4>)
 8008bb2:	f44f 0280 	mov.w	r2, #4194304	@ 0x400000
 8008bb6:	629a      	str	r2, [r3, #40]	@ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered WakeUp callback*/
    heth->WakeUpCallback(heth);
#else
    /* ETH WAKEUP callback */
    HAL_ETH_WakeUpCallback(heth);
 8008bb8:	6878      	ldr	r0, [r7, #4]
 8008bba:	f000 f81b 	bl	8008bf4 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }
#endif /* DUAL_CORE */
}
 8008bbe:	bf00      	nop
 8008bc0:	3718      	adds	r7, #24
 8008bc2:	46bd      	mov	sp, r7
 8008bc4:	bd80      	pop	{r7, pc}
 8008bc6:	bf00      	nop
 8008bc8:	58000080 	.word	0x58000080

08008bcc <HAL_ETH_PMTCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
 8008bcc:	b480      	push	{r7}
 8008bce:	b083      	sub	sp, #12
 8008bd0:	af00      	add	r7, sp, #0
 8008bd2:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_PMTCallback could be implemented in the user file
  */
}
 8008bd4:	bf00      	nop
 8008bd6:	370c      	adds	r7, #12
 8008bd8:	46bd      	mov	sp, r7
 8008bda:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008bde:	4770      	bx	lr

08008be0 <HAL_ETH_EEECallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
 8008be0:	b480      	push	{r7}
 8008be2:	b083      	sub	sp, #12
 8008be4:	af00      	add	r7, sp, #0
 8008be6:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_EEECallback could be implemented in the user file
  */
}
 8008be8:	bf00      	nop
 8008bea:	370c      	adds	r7, #12
 8008bec:	46bd      	mov	sp, r7
 8008bee:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008bf2:	4770      	bx	lr

08008bf4 <HAL_ETH_WakeUpCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
 8008bf4:	b480      	push	{r7}
 8008bf6:	b083      	sub	sp, #12
 8008bf8:	af00      	add	r7, sp, #0
 8008bfa:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ETH_WakeUpCallback could be implemented in the user file
   */
}
 8008bfc:	bf00      	nop
 8008bfe:	370c      	adds	r7, #12
 8008c00:	46bd      	mov	sp, r7
 8008c02:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008c06:	4770      	bx	lr

08008c08 <HAL_ETH_ReadPHYRegister>:
  * @param pRegValue: parameter to hold read value
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                          uint32_t *pRegValue)
{
 8008c08:	b580      	push	{r7, lr}
 8008c0a:	b086      	sub	sp, #24
 8008c0c:	af00      	add	r7, sp, #0
 8008c0e:	60f8      	str	r0, [r7, #12]
 8008c10:	60b9      	str	r1, [r7, #8]
 8008c12:	607a      	str	r2, [r7, #4]
 8008c14:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 8008c16:	68fb      	ldr	r3, [r7, #12]
 8008c18:	681b      	ldr	r3, [r3, #0]
 8008c1a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008c1e:	f003 0301 	and.w	r3, r3, #1
 8008c22:	2b00      	cmp	r3, #0
 8008c24:	d001      	beq.n	8008c2a <HAL_ETH_ReadPHYRegister+0x22>
  {
    return HAL_ERROR;
 8008c26:	2301      	movs	r3, #1
 8008c28:	e03e      	b.n	8008ca8 <HAL_ETH_ReadPHYRegister+0xa0>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8008c2a:	68fb      	ldr	r3, [r7, #12]
 8008c2c:	681b      	ldr	r3, [r3, #0]
 8008c2e:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008c32:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the read mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8008c34:	697b      	ldr	r3, [r7, #20]
 8008c36:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8008c3a:	68bb      	ldr	r3, [r7, #8]
 8008c3c:	055b      	lsls	r3, r3, #21
 8008c3e:	4313      	orrs	r3, r2
 8008c40:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 8008c42:	697b      	ldr	r3, [r7, #20]
 8008c44:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 8008c48:	687b      	ldr	r3, [r7, #4]
 8008c4a:	041b      	lsls	r3, r3, #16
 8008c4c:	4313      	orrs	r3, r2
 8008c4e:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
 8008c50:	697b      	ldr	r3, [r7, #20]
 8008c52:	f043 030c 	orr.w	r3, r3, #12
 8008c56:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008c58:	697b      	ldr	r3, [r7, #20]
 8008c5a:	f043 0301 	orr.w	r3, r3, #1
 8008c5e:	617b      	str	r3, [r7, #20]

  /* Write the result value into the MDII Address register */
  WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
 8008c60:	68fb      	ldr	r3, [r7, #12]
 8008c62:	681b      	ldr	r3, [r3, #0]
 8008c64:	697a      	ldr	r2, [r7, #20]
 8008c66:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8008c6a:	f7fc fd13 	bl	8005694 <HAL_GetTick>
 8008c6e:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008c70:	e009      	b.n	8008c86 <HAL_ETH_ReadPHYRegister+0x7e>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 8008c72:	f7fc fd0f 	bl	8005694 <HAL_GetTick>
 8008c76:	4602      	mov	r2, r0
 8008c78:	693b      	ldr	r3, [r7, #16]
 8008c7a:	1ad3      	subs	r3, r2, r3
 8008c7c:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8008c80:	d901      	bls.n	8008c86 <HAL_ETH_ReadPHYRegister+0x7e>
    {
      return HAL_ERROR;
 8008c82:	2301      	movs	r3, #1
 8008c84:	e010      	b.n	8008ca8 <HAL_ETH_ReadPHYRegister+0xa0>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008c86:	68fb      	ldr	r3, [r7, #12]
 8008c88:	681b      	ldr	r3, [r3, #0]
 8008c8a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008c8e:	f003 0301 	and.w	r3, r3, #1
 8008c92:	2b00      	cmp	r3, #0
 8008c94:	d1ed      	bne.n	8008c72 <HAL_ETH_ReadPHYRegister+0x6a>
    }
  }

  /* Get MACMIIDR value */
  WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
 8008c96:	68fb      	ldr	r3, [r7, #12]
 8008c98:	681b      	ldr	r3, [r3, #0]
 8008c9a:	f8d3 3204 	ldr.w	r3, [r3, #516]	@ 0x204
 8008c9e:	b29b      	uxth	r3, r3
 8008ca0:	461a      	mov	r2, r3
 8008ca2:	683b      	ldr	r3, [r7, #0]
 8008ca4:	601a      	str	r2, [r3, #0]

  return HAL_OK;
 8008ca6:	2300      	movs	r3, #0
}
 8008ca8:	4618      	mov	r0, r3
 8008caa:	3718      	adds	r7, #24
 8008cac:	46bd      	mov	sp, r7
 8008cae:	bd80      	pop	{r7, pc}

08008cb0 <HAL_ETH_WritePHYRegister>:
  * @param  RegValue: the value to write
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                           uint32_t RegValue)
{
 8008cb0:	b580      	push	{r7, lr}
 8008cb2:	b086      	sub	sp, #24
 8008cb4:	af00      	add	r7, sp, #0
 8008cb6:	60f8      	str	r0, [r7, #12]
 8008cb8:	60b9      	str	r1, [r7, #8]
 8008cba:	607a      	str	r2, [r7, #4]
 8008cbc:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 8008cbe:	68fb      	ldr	r3, [r7, #12]
 8008cc0:	681b      	ldr	r3, [r3, #0]
 8008cc2:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008cc6:	f003 0301 	and.w	r3, r3, #1
 8008cca:	2b00      	cmp	r3, #0
 8008ccc:	d001      	beq.n	8008cd2 <HAL_ETH_WritePHYRegister+0x22>
  {
    return HAL_ERROR;
 8008cce:	2301      	movs	r3, #1
 8008cd0:	e03c      	b.n	8008d4c <HAL_ETH_WritePHYRegister+0x9c>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8008cd2:	68fb      	ldr	r3, [r7, #12]
 8008cd4:	681b      	ldr	r3, [r3, #0]
 8008cd6:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008cda:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the write mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8008cdc:	697b      	ldr	r3, [r7, #20]
 8008cde:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8008ce2:	68bb      	ldr	r3, [r7, #8]
 8008ce4:	055b      	lsls	r3, r3, #21
 8008ce6:	4313      	orrs	r3, r2
 8008ce8:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 8008cea:	697b      	ldr	r3, [r7, #20]
 8008cec:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 8008cf0:	687b      	ldr	r3, [r7, #4]
 8008cf2:	041b      	lsls	r3, r3, #16
 8008cf4:	4313      	orrs	r3, r2
 8008cf6:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
 8008cf8:	697b      	ldr	r3, [r7, #20]
 8008cfa:	f023 030c 	bic.w	r3, r3, #12
 8008cfe:	f043 0304 	orr.w	r3, r3, #4
 8008d02:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008d04:	697b      	ldr	r3, [r7, #20]
 8008d06:	f043 0301 	orr.w	r3, r3, #1
 8008d0a:	617b      	str	r3, [r7, #20]

  /* Give the value to the MII data register */
  WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
 8008d0c:	683b      	ldr	r3, [r7, #0]
 8008d0e:	b29a      	uxth	r2, r3
 8008d10:	4b10      	ldr	r3, [pc, #64]	@ (8008d54 <HAL_ETH_WritePHYRegister+0xa4>)
 8008d12:	f8c3 2204 	str.w	r2, [r3, #516]	@ 0x204

  /* Write the result value into the MII Address register */
  WRITE_REG(ETH->MACMDIOAR, tmpreg);
 8008d16:	4a0f      	ldr	r2, [pc, #60]	@ (8008d54 <HAL_ETH_WritePHYRegister+0xa4>)
 8008d18:	697b      	ldr	r3, [r7, #20]
 8008d1a:	f8c2 3200 	str.w	r3, [r2, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8008d1e:	f7fc fcb9 	bl	8005694 <HAL_GetTick>
 8008d22:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008d24:	e009      	b.n	8008d3a <HAL_ETH_WritePHYRegister+0x8a>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 8008d26:	f7fc fcb5 	bl	8005694 <HAL_GetTick>
 8008d2a:	4602      	mov	r2, r0
 8008d2c:	693b      	ldr	r3, [r7, #16]
 8008d2e:	1ad3      	subs	r3, r2, r3
 8008d30:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8008d34:	d901      	bls.n	8008d3a <HAL_ETH_WritePHYRegister+0x8a>
    {
      return HAL_ERROR;
 8008d36:	2301      	movs	r3, #1
 8008d38:	e008      	b.n	8008d4c <HAL_ETH_WritePHYRegister+0x9c>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008d3a:	68fb      	ldr	r3, [r7, #12]
 8008d3c:	681b      	ldr	r3, [r3, #0]
 8008d3e:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008d42:	f003 0301 	and.w	r3, r3, #1
 8008d46:	2b00      	cmp	r3, #0
 8008d48:	d1ed      	bne.n	8008d26 <HAL_ETH_WritePHYRegister+0x76>
    }
  }

  return HAL_OK;
 8008d4a:	2300      	movs	r3, #0
}
 8008d4c:	4618      	mov	r0, r3
 8008d4e:	3718      	adds	r7, #24
 8008d50:	46bd      	mov	sp, r7
 8008d52:	bd80      	pop	{r7, pc}
 8008d54:	40028000 	.word	0x40028000

08008d58 <HAL_ETH_GetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
  *         the configuration of the MAC.
  * @retval HAL Status
  */
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
 8008d58:	b480      	push	{r7}
 8008d5a:	b083      	sub	sp, #12
 8008d5c:	af00      	add	r7, sp, #0
 8008d5e:	6078      	str	r0, [r7, #4]
 8008d60:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 8008d62:	683b      	ldr	r3, [r7, #0]
 8008d64:	2b00      	cmp	r3, #0
 8008d66:	d101      	bne.n	8008d6c <HAL_ETH_GetMACConfig+0x14>
  {
    return HAL_ERROR;
 8008d68:	2301      	movs	r3, #1
 8008d6a:	e1c3      	b.n	80090f4 <HAL_ETH_GetMACConfig+0x39c>
  }

  /* Get MAC parameters */
  macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
 8008d6c:	687b      	ldr	r3, [r7, #4]
 8008d6e:	681b      	ldr	r3, [r3, #0]
 8008d70:	681b      	ldr	r3, [r3, #0]
 8008d72:	f003 020c 	and.w	r2, r3, #12
 8008d76:	683b      	ldr	r3, [r7, #0]
 8008d78:	62da      	str	r2, [r3, #44]	@ 0x2c
  macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
 8008d7a:	687b      	ldr	r3, [r7, #4]
 8008d7c:	681b      	ldr	r3, [r3, #0]
 8008d7e:	681b      	ldr	r3, [r3, #0]
 8008d80:	f003 0310 	and.w	r3, r3, #16
 8008d84:	2b00      	cmp	r3, #0
 8008d86:	bf14      	ite	ne
 8008d88:	2301      	movne	r3, #1
 8008d8a:	2300      	moveq	r3, #0
 8008d8c:	b2db      	uxtb	r3, r3
 8008d8e:	461a      	mov	r2, r3
 8008d90:	683b      	ldr	r3, [r7, #0]
 8008d92:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
 8008d96:	687b      	ldr	r3, [r7, #4]
 8008d98:	681b      	ldr	r3, [r3, #0]
 8008d9a:	681b      	ldr	r3, [r3, #0]
 8008d9c:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008da0:	683b      	ldr	r3, [r7, #0]
 8008da2:	625a      	str	r2, [r3, #36]	@ 0x24
  macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
 8008da4:	687b      	ldr	r3, [r7, #4]
 8008da6:	681b      	ldr	r3, [r3, #0]
 8008da8:	681b      	ldr	r3, [r3, #0]
 8008daa:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8008dae:	2b00      	cmp	r3, #0
 8008db0:	bf0c      	ite	eq
 8008db2:	2301      	moveq	r3, #1
 8008db4:	2300      	movne	r3, #0
 8008db6:	b2db      	uxtb	r3, r3
 8008db8:	461a      	mov	r2, r3
 8008dba:	683b      	ldr	r3, [r7, #0]
 8008dbc:	f883 2020 	strb.w	r2, [r3, #32]
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8008dc0:	687b      	ldr	r3, [r7, #4]
 8008dc2:	681b      	ldr	r3, [r3, #0]
 8008dc4:	681b      	ldr	r3, [r3, #0]
 8008dc6:	f403 7300 	and.w	r3, r3, #512	@ 0x200
                                        ? ENABLE : DISABLE;
 8008dca:	2b00      	cmp	r3, #0
 8008dcc:	bf14      	ite	ne
 8008dce:	2301      	movne	r3, #1
 8008dd0:	2300      	moveq	r3, #0
 8008dd2:	b2db      	uxtb	r3, r3
 8008dd4:	461a      	mov	r2, r3
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8008dd6:	683b      	ldr	r3, [r7, #0]
 8008dd8:	77da      	strb	r2, [r3, #31]
  macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
 8008dda:	687b      	ldr	r3, [r7, #4]
 8008ddc:	681b      	ldr	r3, [r3, #0]
 8008dde:	681b      	ldr	r3, [r3, #0]
 8008de0:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
 8008de4:	2b00      	cmp	r3, #0
 8008de6:	bf0c      	ite	eq
 8008de8:	2301      	moveq	r3, #1
 8008dea:	2300      	movne	r3, #0
 8008dec:	b2db      	uxtb	r3, r3
 8008dee:	461a      	mov	r2, r3
 8008df0:	683b      	ldr	r3, [r7, #0]
 8008df2:	779a      	strb	r2, [r3, #30]
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 8008df4:	687b      	ldr	r3, [r7, #4]
 8008df6:	681b      	ldr	r3, [r3, #0]
 8008df8:	681b      	ldr	r3, [r3, #0]
                                                   ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
 8008dfa:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 8008dfe:	2b00      	cmp	r3, #0
 8008e00:	bf14      	ite	ne
 8008e02:	2301      	movne	r3, #1
 8008e04:	2300      	moveq	r3, #0
 8008e06:	b2db      	uxtb	r3, r3
 8008e08:	461a      	mov	r2, r3
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 8008e0a:	683b      	ldr	r3, [r7, #0]
 8008e0c:	775a      	strb	r2, [r3, #29]
  macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
 8008e0e:	687b      	ldr	r3, [r7, #4]
 8008e10:	681b      	ldr	r3, [r3, #0]
 8008e12:	681b      	ldr	r3, [r3, #0]
 8008e14:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8008e18:	2b00      	cmp	r3, #0
 8008e1a:	bf14      	ite	ne
 8008e1c:	2301      	movne	r3, #1
 8008e1e:	2300      	moveq	r3, #0
 8008e20:	b2db      	uxtb	r3, r3
 8008e22:	461a      	mov	r2, r3
 8008e24:	683b      	ldr	r3, [r7, #0]
 8008e26:	771a      	strb	r2, [r3, #28]
  macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
 8008e28:	687b      	ldr	r3, [r7, #4]
 8008e2a:	681b      	ldr	r3, [r3, #0]
 8008e2c:	681b      	ldr	r3, [r3, #0]
 8008e2e:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
 8008e32:	683b      	ldr	r3, [r7, #0]
 8008e34:	619a      	str	r2, [r3, #24]
  macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
 8008e36:	687b      	ldr	r3, [r7, #4]
 8008e38:	681b      	ldr	r3, [r3, #0]
 8008e3a:	681b      	ldr	r3, [r3, #0]
 8008e3c:	f403 4280 	and.w	r2, r3, #16384	@ 0x4000
 8008e40:	683b      	ldr	r3, [r7, #0]
 8008e42:	615a      	str	r2, [r3, #20]
  macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
 8008e44:	687b      	ldr	r3, [r7, #4]
 8008e46:	681b      	ldr	r3, [r3, #0]
 8008e48:	681b      	ldr	r3, [r3, #0]
 8008e4a:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8008e4e:	2b00      	cmp	r3, #0
 8008e50:	bf14      	ite	ne
 8008e52:	2301      	movne	r3, #1
 8008e54:	2300      	moveq	r3, #0
 8008e56:	b2db      	uxtb	r3, r3
 8008e58:	461a      	mov	r2, r3
 8008e5a:	683b      	ldr	r3, [r7, #0]
 8008e5c:	749a      	strb	r2, [r3, #18]
  macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
 8008e5e:	687b      	ldr	r3, [r7, #4]
 8008e60:	681b      	ldr	r3, [r3, #0]
 8008e62:	681b      	ldr	r3, [r3, #0]
 8008e64:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008e68:	2b00      	cmp	r3, #0
 8008e6a:	bf0c      	ite	eq
 8008e6c:	2301      	moveq	r3, #1
 8008e6e:	2300      	movne	r3, #0
 8008e70:	b2db      	uxtb	r3, r3
 8008e72:	461a      	mov	r2, r3
 8008e74:	683b      	ldr	r3, [r7, #0]
 8008e76:	745a      	strb	r2, [r3, #17]
  macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
 8008e78:	687b      	ldr	r3, [r7, #4]
 8008e7a:	681b      	ldr	r3, [r3, #0]
 8008e7c:	681b      	ldr	r3, [r3, #0]
 8008e7e:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8008e82:	2b00      	cmp	r3, #0
 8008e84:	bf0c      	ite	eq
 8008e86:	2301      	moveq	r3, #1
 8008e88:	2300      	movne	r3, #0
 8008e8a:	b2db      	uxtb	r3, r3
 8008e8c:	461a      	mov	r2, r3
 8008e8e:	683b      	ldr	r3, [r7, #0]
 8008e90:	741a      	strb	r2, [r3, #16]
  macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
 8008e92:	687b      	ldr	r3, [r7, #4]
 8008e94:	681b      	ldr	r3, [r3, #0]
 8008e96:	681b      	ldr	r3, [r3, #0]
 8008e98:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8008e9c:	2b00      	cmp	r3, #0
 8008e9e:	bf14      	ite	ne
 8008ea0:	2301      	movne	r3, #1
 8008ea2:	2300      	moveq	r3, #0
 8008ea4:	b2db      	uxtb	r3, r3
 8008ea6:	461a      	mov	r2, r3
 8008ea8:	683b      	ldr	r3, [r7, #0]
 8008eaa:	73da      	strb	r2, [r3, #15]
  macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
 8008eac:	687b      	ldr	r3, [r7, #4]
 8008eae:	681b      	ldr	r3, [r3, #0]
 8008eb0:	681b      	ldr	r3, [r3, #0]
 8008eb2:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8008eb6:	2b00      	cmp	r3, #0
 8008eb8:	bf14      	ite	ne
 8008eba:	2301      	movne	r3, #1
 8008ebc:	2300      	moveq	r3, #0
 8008ebe:	b2db      	uxtb	r3, r3
 8008ec0:	461a      	mov	r2, r3
 8008ec2:	683b      	ldr	r3, [r7, #0]
 8008ec4:	739a      	strb	r2, [r3, #14]
  macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
 8008ec6:	687b      	ldr	r3, [r7, #4]
 8008ec8:	681b      	ldr	r3, [r3, #0]
 8008eca:	681b      	ldr	r3, [r3, #0]
 8008ecc:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008ed0:	2b00      	cmp	r3, #0
 8008ed2:	bf14      	ite	ne
 8008ed4:	2301      	movne	r3, #1
 8008ed6:	2300      	moveq	r3, #0
 8008ed8:	b2db      	uxtb	r3, r3
 8008eda:	461a      	mov	r2, r3
 8008edc:	683b      	ldr	r3, [r7, #0]
 8008ede:	735a      	strb	r2, [r3, #13]
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8008ee0:	687b      	ldr	r3, [r7, #4]
 8008ee2:	681b      	ldr	r3, [r3, #0]
 8008ee4:	681b      	ldr	r3, [r3, #0]
                                                    ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
 8008ee6:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 8008eea:	2b00      	cmp	r3, #0
 8008eec:	bf14      	ite	ne
 8008eee:	2301      	movne	r3, #1
 8008ef0:	2300      	moveq	r3, #0
 8008ef2:	b2db      	uxtb	r3, r3
 8008ef4:	461a      	mov	r2, r3
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8008ef6:	683b      	ldr	r3, [r7, #0]
 8008ef8:	731a      	strb	r2, [r3, #12]
  macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
 8008efa:	687b      	ldr	r3, [r7, #4]
 8008efc:	681b      	ldr	r3, [r3, #0]
 8008efe:	681b      	ldr	r3, [r3, #0]
 8008f00:	f003 62e0 	and.w	r2, r3, #117440512	@ 0x7000000
 8008f04:	683b      	ldr	r3, [r7, #0]
 8008f06:	609a      	str	r2, [r3, #8]
  macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
 8008f08:	687b      	ldr	r3, [r7, #4]
 8008f0a:	681b      	ldr	r3, [r3, #0]
 8008f0c:	681b      	ldr	r3, [r3, #0]
 8008f0e:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 8008f12:	2b00      	cmp	r3, #0
 8008f14:	bf14      	ite	ne
 8008f16:	2301      	movne	r3, #1
 8008f18:	2300      	moveq	r3, #0
 8008f1a:	b2db      	uxtb	r3, r3
 8008f1c:	461a      	mov	r2, r3
 8008f1e:	683b      	ldr	r3, [r7, #0]
 8008f20:	711a      	strb	r2, [r3, #4]
  macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
 8008f22:	687b      	ldr	r3, [r7, #4]
 8008f24:	681b      	ldr	r3, [r3, #0]
 8008f26:	681b      	ldr	r3, [r3, #0]
 8008f28:	f003 42e0 	and.w	r2, r3, #1879048192	@ 0x70000000
 8008f2c:	683b      	ldr	r3, [r7, #0]
 8008f2e:	601a      	str	r2, [r3, #0]

  macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
 8008f30:	687b      	ldr	r3, [r7, #4]
 8008f32:	681b      	ldr	r3, [r3, #0]
 8008f34:	685b      	ldr	r3, [r3, #4]
 8008f36:	f3c3 020d 	ubfx	r2, r3, #0, #14
 8008f3a:	683b      	ldr	r3, [r7, #0]
 8008f3c:	635a      	str	r2, [r3, #52]	@ 0x34
  macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
 8008f3e:	687b      	ldr	r3, [r7, #4]
 8008f40:	681b      	ldr	r3, [r3, #0]
 8008f42:	685b      	ldr	r3, [r3, #4]
 8008f44:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8008f48:	2b00      	cmp	r3, #0
 8008f4a:	bf0c      	ite	eq
 8008f4c:	2301      	moveq	r3, #1
 8008f4e:	2300      	movne	r3, #0
 8008f50:	b2db      	uxtb	r3, r3
 8008f52:	461a      	mov	r2, r3
 8008f54:	683b      	ldr	r3, [r7, #0]
 8008f56:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
 8008f5a:	687b      	ldr	r3, [r7, #4]
 8008f5c:	681b      	ldr	r3, [r3, #0]
 8008f5e:	685b      	ldr	r3, [r3, #4]
 8008f60:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8008f64:	2b00      	cmp	r3, #0
 8008f66:	bf14      	ite	ne
 8008f68:	2301      	movne	r3, #1
 8008f6a:	2300      	moveq	r3, #0
 8008f6c:	b2db      	uxtb	r3, r3
 8008f6e:	461a      	mov	r2, r3
 8008f70:	683b      	ldr	r3, [r7, #0]
 8008f72:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008f76:	687b      	ldr	r3, [r7, #4]
 8008f78:	681b      	ldr	r3, [r3, #0]
 8008f7a:	685b      	ldr	r3, [r3, #4]
                                                        ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
 8008f7c:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8008f80:	2b00      	cmp	r3, #0
 8008f82:	bf14      	ite	ne
 8008f84:	2301      	movne	r3, #1
 8008f86:	2300      	moveq	r3, #0
 8008f88:	b2db      	uxtb	r3, r3
 8008f8a:	461a      	mov	r2, r3
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 8008f8c:	683b      	ldr	r3, [r7, #0]
 8008f8e:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008f92:	687b      	ldr	r3, [r7, #4]
 8008f94:	681b      	ldr	r3, [r3, #0]
 8008f96:	685b      	ldr	r3, [r3, #4]
 8008f98:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
                                    ? ENABLE : DISABLE;
 8008f9c:	2b00      	cmp	r3, #0
 8008f9e:	bf14      	ite	ne
 8008fa0:	2301      	movne	r3, #1
 8008fa2:	2300      	moveq	r3, #0
 8008fa4:	b2db      	uxtb	r3, r3
 8008fa6:	461a      	mov	r2, r3
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 8008fa8:	683b      	ldr	r3, [r7, #0]
 8008faa:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
  macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
 8008fae:	687b      	ldr	r3, [r7, #4]
 8008fb0:	681b      	ldr	r3, [r3, #0]
 8008fb2:	685b      	ldr	r3, [r3, #4]
 8008fb4:	0e5b      	lsrs	r3, r3, #25
 8008fb6:	f003 021f 	and.w	r2, r3, #31
 8008fba:	683b      	ldr	r3, [r7, #0]
 8008fbc:	63da      	str	r2, [r3, #60]	@ 0x3c

  macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
 8008fbe:	687b      	ldr	r3, [r7, #4]
 8008fc0:	681b      	ldr	r3, [r3, #0]
 8008fc2:	68db      	ldr	r3, [r3, #12]
 8008fc4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8008fc8:	2b00      	cmp	r3, #0
 8008fca:	bf14      	ite	ne
 8008fcc:	2301      	movne	r3, #1
 8008fce:	2300      	moveq	r3, #0
 8008fd0:	b2db      	uxtb	r3, r3
 8008fd2:	461a      	mov	r2, r3
 8008fd4:	683b      	ldr	r3, [r7, #0]
 8008fd6:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
  macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
 8008fda:	687b      	ldr	r3, [r7, #4]
 8008fdc:	681b      	ldr	r3, [r3, #0]
 8008fde:	68db      	ldr	r3, [r3, #12]
 8008fe0:	f003 020f 	and.w	r2, r3, #15
 8008fe4:	683b      	ldr	r3, [r7, #0]
 8008fe6:	645a      	str	r2, [r3, #68]	@ 0x44

  macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
 8008fe8:	687b      	ldr	r3, [r7, #4]
 8008fea:	681b      	ldr	r3, [r3, #0]
 8008fec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8008fee:	f003 0302 	and.w	r3, r3, #2
 8008ff2:	2b00      	cmp	r3, #0
 8008ff4:	bf14      	ite	ne
 8008ff6:	2301      	movne	r3, #1
 8008ff8:	2300      	moveq	r3, #0
 8008ffa:	b2db      	uxtb	r3, r3
 8008ffc:	461a      	mov	r2, r3
 8008ffe:	683b      	ldr	r3, [r7, #0]
 8009000:	f883 2054 	strb.w	r2, [r3, #84]	@ 0x54
  macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
 8009004:	687b      	ldr	r3, [r7, #4]
 8009006:	681b      	ldr	r3, [r3, #0]
 8009008:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800900a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800900e:	2b00      	cmp	r3, #0
 8009010:	bf0c      	ite	eq
 8009012:	2301      	moveq	r3, #1
 8009014:	2300      	movne	r3, #0
 8009016:	b2db      	uxtb	r3, r3
 8009018:	461a      	mov	r2, r3
 800901a:	683b      	ldr	r3, [r7, #0]
 800901c:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
  macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
 8009020:	687b      	ldr	r3, [r7, #4]
 8009022:	681b      	ldr	r3, [r3, #0]
 8009024:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009026:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800902a:	683b      	ldr	r3, [r7, #0]
 800902c:	651a      	str	r2, [r3, #80]	@ 0x50
  macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
 800902e:	687b      	ldr	r3, [r7, #4]
 8009030:	681b      	ldr	r3, [r3, #0]
 8009032:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009034:	0c1b      	lsrs	r3, r3, #16
 8009036:	b29a      	uxth	r2, r3
 8009038:	683b      	ldr	r3, [r7, #0]
 800903a:	649a      	str	r2, [r3, #72]	@ 0x48
  macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
 800903c:	687b      	ldr	r3, [r7, #4]
 800903e:	681b      	ldr	r3, [r3, #0]
 8009040:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8009044:	f003 0301 	and.w	r3, r3, #1
 8009048:	2b00      	cmp	r3, #0
 800904a:	bf14      	ite	ne
 800904c:	2301      	movne	r3, #1
 800904e:	2300      	moveq	r3, #0
 8009050:	b2db      	uxtb	r3, r3
 8009052:	461a      	mov	r2, r3
 8009054:	683b      	ldr	r3, [r7, #0]
 8009056:	f883 2056 	strb.w	r2, [r3, #86]	@ 0x56
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 800905a:	687b      	ldr	r3, [r7, #4]
 800905c:	681b      	ldr	r3, [r3, #0]
 800905e:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8009062:	f003 0302 	and.w	r3, r3, #2
                                      ? ENABLE : DISABLE;
 8009066:	2b00      	cmp	r3, #0
 8009068:	bf14      	ite	ne
 800906a:	2301      	movne	r3, #1
 800906c:	2300      	moveq	r3, #0
 800906e:	b2db      	uxtb	r3, r3
 8009070:	461a      	mov	r2, r3
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 8009072:	683b      	ldr	r3, [r7, #0]
 8009074:	f883 2055 	strb.w	r2, [r3, #85]	@ 0x55

  macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
 8009078:	687b      	ldr	r3, [r7, #4]
 800907a:	681b      	ldr	r3, [r3, #0]
 800907c:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 8009080:	f003 0272 	and.w	r2, r3, #114	@ 0x72
 8009084:	683b      	ldr	r3, [r7, #0]
 8009086:	659a      	str	r2, [r3, #88]	@ 0x58

  macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
 8009088:	687b      	ldr	r3, [r7, #4]
 800908a:	681b      	ldr	r3, [r3, #0]
 800908c:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8009090:	f003 0223 	and.w	r2, r3, #35	@ 0x23
 8009094:	683b      	ldr	r3, [r7, #0]
 8009096:	65da      	str	r2, [r3, #92]	@ 0x5c
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8009098:	687b      	ldr	r3, [r7, #4]
 800909a:	681b      	ldr	r3, [r3, #0]
 800909c:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                      ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
 80090a0:	f003 0308 	and.w	r3, r3, #8
 80090a4:	2b00      	cmp	r3, #0
 80090a6:	bf14      	ite	ne
 80090a8:	2301      	movne	r3, #1
 80090aa:	2300      	moveq	r3, #0
 80090ac:	b2db      	uxtb	r3, r3
 80090ae:	461a      	mov	r2, r3
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80090b0:	683b      	ldr	r3, [r7, #0]
 80090b2:	f883 2062 	strb.w	r2, [r3, #98]	@ 0x62
  macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
 80090b6:	687b      	ldr	r3, [r7, #4]
 80090b8:	681b      	ldr	r3, [r3, #0]
 80090ba:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 80090be:	f003 0310 	and.w	r3, r3, #16
 80090c2:	2b00      	cmp	r3, #0
 80090c4:	bf14      	ite	ne
 80090c6:	2301      	movne	r3, #1
 80090c8:	2300      	moveq	r3, #0
 80090ca:	b2db      	uxtb	r3, r3
 80090cc:	461a      	mov	r2, r3
 80090ce:	683b      	ldr	r3, [r7, #0]
 80090d0:	f883 2061 	strb.w	r2, [r3, #97]	@ 0x61
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80090d4:	687b      	ldr	r3, [r7, #4]
 80090d6:	681b      	ldr	r3, [r3, #0]
 80090d8:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                     ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
 80090dc:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80090e0:	2b00      	cmp	r3, #0
 80090e2:	bf0c      	ite	eq
 80090e4:	2301      	moveq	r3, #1
 80090e6:	2300      	movne	r3, #0
 80090e8:	b2db      	uxtb	r3, r3
 80090ea:	461a      	mov	r2, r3
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80090ec:	683b      	ldr	r3, [r7, #0]
 80090ee:	f883 2060 	strb.w	r2, [r3, #96]	@ 0x60

  return HAL_OK;
 80090f2:	2300      	movs	r3, #0
}
 80090f4:	4618      	mov	r0, r3
 80090f6:	370c      	adds	r7, #12
 80090f8:	46bd      	mov	sp, r7
 80090fa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80090fe:	4770      	bx	lr

08009100 <HAL_ETH_SetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that contains
  *         the configuration of the MAC.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth,  ETH_MACConfigTypeDef *macconf)
{
 8009100:	b580      	push	{r7, lr}
 8009102:	b082      	sub	sp, #8
 8009104:	af00      	add	r7, sp, #0
 8009106:	6078      	str	r0, [r7, #4]
 8009108:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 800910a:	683b      	ldr	r3, [r7, #0]
 800910c:	2b00      	cmp	r3, #0
 800910e:	d101      	bne.n	8009114 <HAL_ETH_SetMACConfig+0x14>
  {
    return HAL_ERROR;
 8009110:	2301      	movs	r3, #1
 8009112:	e00b      	b.n	800912c <HAL_ETH_SetMACConfig+0x2c>
  }

  if (heth->gState == HAL_ETH_STATE_READY)
 8009114:	687b      	ldr	r3, [r7, #4]
 8009116:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800911a:	2b10      	cmp	r3, #16
 800911c:	d105      	bne.n	800912a <HAL_ETH_SetMACConfig+0x2a>
  {
    ETH_SetMACConfig(heth, macconf);
 800911e:	6839      	ldr	r1, [r7, #0]
 8009120:	6878      	ldr	r0, [r7, #4]
 8009122:	f000 f865 	bl	80091f0 <ETH_SetMACConfig>

    return HAL_OK;
 8009126:	2300      	movs	r3, #0
 8009128:	e000      	b.n	800912c <HAL_ETH_SetMACConfig+0x2c>
  }
  else
  {
    return HAL_ERROR;
 800912a:	2301      	movs	r3, #1
  }
}
 800912c:	4618      	mov	r0, r3
 800912e:	3708      	adds	r7, #8
 8009130:	46bd      	mov	sp, r7
 8009132:	bd80      	pop	{r7, pc}

08009134 <HAL_ETH_SetMDIOClockRange>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
 8009134:	b580      	push	{r7, lr}
 8009136:	b084      	sub	sp, #16
 8009138:	af00      	add	r7, sp, #0
 800913a:	6078      	str	r0, [r7, #4]
  uint32_t hclk;
  uint32_t tmpreg;

  /* Get the ETHERNET MACMDIOAR value */
  tmpreg = (heth->Instance)->MACMDIOAR;
 800913c:	687b      	ldr	r3, [r7, #4]
 800913e:	681b      	ldr	r3, [r3, #0]
 8009140:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8009144:	60fb      	str	r3, [r7, #12]

  /* Clear CSR Clock Range bits */
  tmpreg &= ~ETH_MACMDIOAR_CR;
 8009146:	68fb      	ldr	r3, [r7, #12]
 8009148:	f423 6370 	bic.w	r3, r3, #3840	@ 0xf00
 800914c:	60fb      	str	r3, [r7, #12]

  /* Get hclk frequency value */
  hclk = HAL_RCC_GetHCLKFreq();
 800914e:	f002 f887 	bl	800b260 <HAL_RCC_GetHCLKFreq>
 8009152:	60b8      	str	r0, [r7, #8]

  /* Set CR bits depending on hclk value */
  if (hclk < 35000000U)
 8009154:	68bb      	ldr	r3, [r7, #8]
 8009156:	4a1a      	ldr	r2, [pc, #104]	@ (80091c0 <HAL_ETH_SetMDIOClockRange+0x8c>)
 8009158:	4293      	cmp	r3, r2
 800915a:	d804      	bhi.n	8009166 <HAL_ETH_SetMDIOClockRange+0x32>
  {
    /* CSR Clock Range between 0-35 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
 800915c:	68fb      	ldr	r3, [r7, #12]
 800915e:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
 8009162:	60fb      	str	r3, [r7, #12]
 8009164:	e022      	b.n	80091ac <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 60000000U)
 8009166:	68bb      	ldr	r3, [r7, #8]
 8009168:	4a16      	ldr	r2, [pc, #88]	@ (80091c4 <HAL_ETH_SetMDIOClockRange+0x90>)
 800916a:	4293      	cmp	r3, r2
 800916c:	d204      	bcs.n	8009178 <HAL_ETH_SetMDIOClockRange+0x44>
  {
    /* CSR Clock Range between 35-60 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
 800916e:	68fb      	ldr	r3, [r7, #12]
 8009170:	f443 7340 	orr.w	r3, r3, #768	@ 0x300
 8009174:	60fb      	str	r3, [r7, #12]
 8009176:	e019      	b.n	80091ac <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 100000000U)
 8009178:	68bb      	ldr	r3, [r7, #8]
 800917a:	4a13      	ldr	r2, [pc, #76]	@ (80091c8 <HAL_ETH_SetMDIOClockRange+0x94>)
 800917c:	4293      	cmp	r3, r2
 800917e:	d915      	bls.n	80091ac <HAL_ETH_SetMDIOClockRange+0x78>
  {
    /* CSR Clock Range between 60-100 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
  }
  else if (hclk < 150000000U)
 8009180:	68bb      	ldr	r3, [r7, #8]
 8009182:	4a12      	ldr	r2, [pc, #72]	@ (80091cc <HAL_ETH_SetMDIOClockRange+0x98>)
 8009184:	4293      	cmp	r3, r2
 8009186:	d804      	bhi.n	8009192 <HAL_ETH_SetMDIOClockRange+0x5e>
  {
    /* CSR Clock Range between 100-150 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
 8009188:	68fb      	ldr	r3, [r7, #12]
 800918a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800918e:	60fb      	str	r3, [r7, #12]
 8009190:	e00c      	b.n	80091ac <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 250000000U)
 8009192:	68bb      	ldr	r3, [r7, #8]
 8009194:	4a0e      	ldr	r2, [pc, #56]	@ (80091d0 <HAL_ETH_SetMDIOClockRange+0x9c>)
 8009196:	4293      	cmp	r3, r2
 8009198:	d804      	bhi.n	80091a4 <HAL_ETH_SetMDIOClockRange+0x70>
  {
    /* CSR Clock Range between 150-250 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
 800919a:	68fb      	ldr	r3, [r7, #12]
 800919c:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
 80091a0:	60fb      	str	r3, [r7, #12]
 80091a2:	e003      	b.n	80091ac <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else /* (hclk >= 250000000U) */
  {
    /* CSR Clock >= 250 MHz */
    tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
 80091a4:	68fb      	ldr	r3, [r7, #12]
 80091a6:	f443 63a0 	orr.w	r3, r3, #1280	@ 0x500
 80091aa:	60fb      	str	r3, [r7, #12]
  }

  /* Configure the CSR Clock Range */
  (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
 80091ac:	687b      	ldr	r3, [r7, #4]
 80091ae:	681b      	ldr	r3, [r3, #0]
 80091b0:	68fa      	ldr	r2, [r7, #12]
 80091b2:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200
}
 80091b6:	bf00      	nop
 80091b8:	3710      	adds	r7, #16
 80091ba:	46bd      	mov	sp, r7
 80091bc:	bd80      	pop	{r7, pc}
 80091be:	bf00      	nop
 80091c0:	02160ebf 	.word	0x02160ebf
 80091c4:	03938700 	.word	0x03938700
 80091c8:	05f5e0ff 	.word	0x05f5e0ff
 80091cc:	08f0d17f 	.word	0x08f0d17f
 80091d0:	0ee6b27f 	.word	0x0ee6b27f

080091d4 <HAL_ETH_GetDMAError>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval ETH DMA Error Code
  */
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
 80091d4:	b480      	push	{r7}
 80091d6:	b083      	sub	sp, #12
 80091d8:	af00      	add	r7, sp, #0
 80091da:	6078      	str	r0, [r7, #4]
  return heth->DMAErrorCode;
 80091dc:	687b      	ldr	r3, [r7, #4]
 80091de:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
}
 80091e2:	4618      	mov	r0, r3
 80091e4:	370c      	adds	r7, #12
 80091e6:	46bd      	mov	sp, r7
 80091e8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80091ec:	4770      	bx	lr
	...

080091f0 <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions   ETH Private Functions
  * @{
  */

static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
 80091f0:	b480      	push	{r7}
 80091f2:	b085      	sub	sp, #20
 80091f4:	af00      	add	r7, sp, #0
 80091f6:	6078      	str	r0, [r7, #4]
 80091f8:	6039      	str	r1, [r7, #0]
  uint32_t macregval;

  /*------------------------ MACCR Configuration --------------------*/
  macregval = (macconf->InterPacketGapVal |
 80091fa:	683b      	ldr	r3, [r7, #0]
 80091fc:	689a      	ldr	r2, [r3, #8]
               macconf->SourceAddrControl |
 80091fe:	683b      	ldr	r3, [r7, #0]
 8009200:	681b      	ldr	r3, [r3, #0]
  macregval = (macconf->InterPacketGapVal |
 8009202:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8009204:	683b      	ldr	r3, [r7, #0]
 8009206:	791b      	ldrb	r3, [r3, #4]
 8009208:	06db      	lsls	r3, r3, #27
               macconf->SourceAddrControl |
 800920a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 800920c:	683b      	ldr	r3, [r7, #0]
 800920e:	7b1b      	ldrb	r3, [r3, #12]
 8009210:	05db      	lsls	r3, r3, #23
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8009212:	431a      	orrs	r2, r3
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8009214:	683b      	ldr	r3, [r7, #0]
 8009216:	7b5b      	ldrb	r3, [r3, #13]
 8009218:	059b      	lsls	r3, r3, #22
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 800921a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 800921c:	683b      	ldr	r3, [r7, #0]
 800921e:	7b9b      	ldrb	r3, [r3, #14]
 8009220:	055b      	lsls	r3, r3, #21
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8009222:	431a      	orrs	r2, r3
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8009224:	683b      	ldr	r3, [r7, #0]
 8009226:	7bdb      	ldrb	r3, [r3, #15]
 8009228:	051b      	lsls	r3, r3, #20
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 800922a:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 800922c:	683a      	ldr	r2, [r7, #0]
 800922e:	7c12      	ldrb	r2, [r2, #16]
 8009230:	2a00      	cmp	r2, #0
 8009232:	d102      	bne.n	800923a <ETH_SetMACConfig+0x4a>
 8009234:	f44f 2200 	mov.w	r2, #524288	@ 0x80000
 8009238:	e000      	b.n	800923c <ETH_SetMACConfig+0x4c>
 800923a:	2200      	movs	r2, #0
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 800923c:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 800923e:	683a      	ldr	r2, [r7, #0]
 8009240:	7c52      	ldrb	r2, [r2, #17]
 8009242:	2a00      	cmp	r2, #0
 8009244:	d102      	bne.n	800924c <ETH_SetMACConfig+0x5c>
 8009246:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 800924a:	e000      	b.n	800924e <ETH_SetMACConfig+0x5e>
 800924c:	2200      	movs	r2, #0
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 800924e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->JumboPacket << 16) |
 8009250:	683b      	ldr	r3, [r7, #0]
 8009252:	7c9b      	ldrb	r3, [r3, #18]
 8009254:	041b      	lsls	r3, r3, #16
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 8009256:	431a      	orrs	r2, r3
               macconf->Speed |
 8009258:	683b      	ldr	r3, [r7, #0]
 800925a:	695b      	ldr	r3, [r3, #20]
               ((uint32_t)macconf->JumboPacket << 16) |
 800925c:	431a      	orrs	r2, r3
               macconf->DuplexMode |
 800925e:	683b      	ldr	r3, [r7, #0]
 8009260:	699b      	ldr	r3, [r3, #24]
               macconf->Speed |
 8009262:	431a      	orrs	r2, r3
               ((uint32_t)macconf->LoopbackMode << 12) |
 8009264:	683b      	ldr	r3, [r7, #0]
 8009266:	7f1b      	ldrb	r3, [r3, #28]
 8009268:	031b      	lsls	r3, r3, #12
               macconf->DuplexMode |
 800926a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 800926c:	683b      	ldr	r3, [r7, #0]
 800926e:	7f5b      	ldrb	r3, [r3, #29]
 8009270:	02db      	lsls	r3, r3, #11
               ((uint32_t)macconf->LoopbackMode << 12) |
 8009272:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 8009274:	683a      	ldr	r2, [r7, #0]
 8009276:	7f92      	ldrb	r2, [r2, #30]
 8009278:	2a00      	cmp	r2, #0
 800927a:	d102      	bne.n	8009282 <ETH_SetMACConfig+0x92>
 800927c:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8009280:	e000      	b.n	8009284 <ETH_SetMACConfig+0x94>
 8009282:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 8009284:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8009286:	683b      	ldr	r3, [r7, #0]
 8009288:	7fdb      	ldrb	r3, [r3, #31]
 800928a:	025b      	lsls	r3, r3, #9
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 800928c:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 800928e:	683a      	ldr	r2, [r7, #0]
 8009290:	f892 2020 	ldrb.w	r2, [r2, #32]
 8009294:	2a00      	cmp	r2, #0
 8009296:	d102      	bne.n	800929e <ETH_SetMACConfig+0xae>
 8009298:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800929c:	e000      	b.n	80092a0 <ETH_SetMACConfig+0xb0>
 800929e:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 80092a0:	431a      	orrs	r2, r3
               macconf->BackOffLimit |
 80092a2:	683b      	ldr	r3, [r7, #0]
 80092a4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 80092a6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->DeferralCheck << 4) |
 80092a8:	683b      	ldr	r3, [r7, #0]
 80092aa:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80092ae:	011b      	lsls	r3, r3, #4
               macconf->BackOffLimit |
 80092b0:	431a      	orrs	r2, r3
               macconf->PreambleLength);
 80092b2:	683b      	ldr	r3, [r7, #0]
 80092b4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
  macregval = (macconf->InterPacketGapVal |
 80092b6:	4313      	orrs	r3, r2
 80092b8:	60fb      	str	r3, [r7, #12]

  /* Write to MACCR */
  MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
 80092ba:	687b      	ldr	r3, [r7, #4]
 80092bc:	681b      	ldr	r3, [r3, #0]
 80092be:	681a      	ldr	r2, [r3, #0]
 80092c0:	4b56      	ldr	r3, [pc, #344]	@ (800941c <ETH_SetMACConfig+0x22c>)
 80092c2:	4013      	ands	r3, r2
 80092c4:	687a      	ldr	r2, [r7, #4]
 80092c6:	6812      	ldr	r2, [r2, #0]
 80092c8:	68f9      	ldr	r1, [r7, #12]
 80092ca:	430b      	orrs	r3, r1
 80092cc:	6013      	str	r3, [r2, #0]

  /*------------------------ MACECR Configuration --------------------*/
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 80092ce:	683b      	ldr	r3, [r7, #0]
 80092d0:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80092d2:	065a      	lsls	r2, r3, #25
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 80092d4:	683b      	ldr	r3, [r7, #0]
 80092d6:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 80092da:	061b      	lsls	r3, r3, #24
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 80092dc:	431a      	orrs	r2, r3
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 80092de:	683b      	ldr	r3, [r7, #0]
 80092e0:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80092e4:	049b      	lsls	r3, r3, #18
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 80092e6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 80092e8:	683b      	ldr	r3, [r7, #0]
 80092ea:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80092ee:	045b      	lsls	r3, r3, #17
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 80092f0:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
 80092f2:	683a      	ldr	r2, [r7, #0]
 80092f4:	f892 2032 	ldrb.w	r2, [r2, #50]	@ 0x32
 80092f8:	2a00      	cmp	r2, #0
 80092fa:	d102      	bne.n	8009302 <ETH_SetMACConfig+0x112>
 80092fc:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 8009300:	e000      	b.n	8009304 <ETH_SetMACConfig+0x114>
 8009302:	2200      	movs	r2, #0
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8009304:	431a      	orrs	r2, r3
               macconf->GiantPacketSizeLimit);
 8009306:	683b      	ldr	r3, [r7, #0]
 8009308:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 800930a:	4313      	orrs	r3, r2
 800930c:	60fb      	str	r3, [r7, #12]

  /* Write to MACECR */
  MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
 800930e:	687b      	ldr	r3, [r7, #4]
 8009310:	681b      	ldr	r3, [r3, #0]
 8009312:	685a      	ldr	r2, [r3, #4]
 8009314:	4b42      	ldr	r3, [pc, #264]	@ (8009420 <ETH_SetMACConfig+0x230>)
 8009316:	4013      	ands	r3, r2
 8009318:	687a      	ldr	r2, [r7, #4]
 800931a:	6812      	ldr	r2, [r2, #0]
 800931c:	68f9      	ldr	r1, [r7, #12]
 800931e:	430b      	orrs	r3, r1
 8009320:	6053      	str	r3, [r2, #4]

  /*------------------------ MACWTR Configuration --------------------*/
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8009322:	683b      	ldr	r3, [r7, #0]
 8009324:	f893 3040 	ldrb.w	r3, [r3, #64]	@ 0x40
 8009328:	021a      	lsls	r2, r3, #8
               macconf->WatchdogTimeout);
 800932a:	683b      	ldr	r3, [r7, #0]
 800932c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 800932e:	4313      	orrs	r3, r2
 8009330:	60fb      	str	r3, [r7, #12]

  /* Write to MACWTR */
  MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
 8009332:	687b      	ldr	r3, [r7, #4]
 8009334:	681b      	ldr	r3, [r3, #0]
 8009336:	68da      	ldr	r2, [r3, #12]
 8009338:	4b3a      	ldr	r3, [pc, #232]	@ (8009424 <ETH_SetMACConfig+0x234>)
 800933a:	4013      	ands	r3, r2
 800933c:	687a      	ldr	r2, [r7, #4]
 800933e:	6812      	ldr	r2, [r2, #0]
 8009340:	68f9      	ldr	r1, [r7, #12]
 8009342:	430b      	orrs	r3, r1
 8009344:	60d3      	str	r3, [r2, #12]

  /*------------------------ MACTFCR Configuration --------------------*/
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8009346:	683b      	ldr	r3, [r7, #0]
 8009348:	f893 3054 	ldrb.w	r3, [r3, #84]	@ 0x54
 800934c:	005a      	lsls	r2, r3, #1
               macconf->PauseLowThreshold |
 800934e:	683b      	ldr	r3, [r7, #0]
 8009350:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 8009352:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
 8009354:	683a      	ldr	r2, [r7, #0]
 8009356:	f892 204c 	ldrb.w	r2, [r2, #76]	@ 0x4c
 800935a:	2a00      	cmp	r2, #0
 800935c:	d101      	bne.n	8009362 <ETH_SetMACConfig+0x172>
 800935e:	2280      	movs	r2, #128	@ 0x80
 8009360:	e000      	b.n	8009364 <ETH_SetMACConfig+0x174>
 8009362:	2200      	movs	r2, #0
               macconf->PauseLowThreshold |
 8009364:	431a      	orrs	r2, r3
               (macconf->PauseTime << 16));
 8009366:	683b      	ldr	r3, [r7, #0]
 8009368:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800936a:	041b      	lsls	r3, r3, #16
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 800936c:	4313      	orrs	r3, r2
 800936e:	60fb      	str	r3, [r7, #12]

  /* Write to MACTFCR */
  MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
 8009370:	687b      	ldr	r3, [r7, #4]
 8009372:	681b      	ldr	r3, [r3, #0]
 8009374:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 8009376:	f64f 730d 	movw	r3, #65293	@ 0xff0d
 800937a:	4013      	ands	r3, r2
 800937c:	687a      	ldr	r2, [r7, #4]
 800937e:	6812      	ldr	r2, [r2, #0]
 8009380:	68f9      	ldr	r1, [r7, #12]
 8009382:	430b      	orrs	r3, r1
 8009384:	6713      	str	r3, [r2, #112]	@ 0x70

  /*------------------------ MACRFCR Configuration --------------------*/
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8009386:	683b      	ldr	r3, [r7, #0]
 8009388:	f893 3056 	ldrb.w	r3, [r3, #86]	@ 0x56
 800938c:	461a      	mov	r2, r3
               ((uint32_t)macconf->UnicastPausePacketDetect << 1));
 800938e:	683b      	ldr	r3, [r7, #0]
 8009390:	f893 3055 	ldrb.w	r3, [r3, #85]	@ 0x55
 8009394:	005b      	lsls	r3, r3, #1
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 8009396:	4313      	orrs	r3, r2
 8009398:	60fb      	str	r3, [r7, #12]

  /* Write to MACRFCR */
  MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
 800939a:	687b      	ldr	r3, [r7, #4]
 800939c:	681b      	ldr	r3, [r3, #0]
 800939e:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 80093a2:	f023 0103 	bic.w	r1, r3, #3
 80093a6:	687b      	ldr	r3, [r7, #4]
 80093a8:	681b      	ldr	r3, [r3, #0]
 80093aa:	68fa      	ldr	r2, [r7, #12]
 80093ac:	430a      	orrs	r2, r1
 80093ae:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /*------------------------ MTLTQOMR Configuration --------------------*/
  /* Write to MTLTQOMR */
  MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
 80093b2:	687b      	ldr	r3, [r7, #4]
 80093b4:	681b      	ldr	r3, [r3, #0]
 80093b6:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 80093ba:	f023 0172 	bic.w	r1, r3, #114	@ 0x72
 80093be:	683b      	ldr	r3, [r7, #0]
 80093c0:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 80093c2:	687b      	ldr	r3, [r7, #4]
 80093c4:	681b      	ldr	r3, [r3, #0]
 80093c6:	430a      	orrs	r2, r1
 80093c8:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

  /*------------------------ MTLRQOMR Configuration --------------------*/
  macregval = (macconf->ReceiveQueueMode |
 80093cc:	683b      	ldr	r3, [r7, #0]
 80093ce:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 80093d0:	683a      	ldr	r2, [r7, #0]
 80093d2:	f892 2060 	ldrb.w	r2, [r2, #96]	@ 0x60
 80093d6:	2a00      	cmp	r2, #0
 80093d8:	d101      	bne.n	80093de <ETH_SetMACConfig+0x1ee>
 80093da:	2240      	movs	r2, #64	@ 0x40
 80093dc:	e000      	b.n	80093e0 <ETH_SetMACConfig+0x1f0>
 80093de:	2200      	movs	r2, #0
  macregval = (macconf->ReceiveQueueMode |
 80093e0:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxErrorPacket << 4) |
 80093e2:	683b      	ldr	r3, [r7, #0]
 80093e4:	f893 3061 	ldrb.w	r3, [r3, #97]	@ 0x61
 80093e8:	011b      	lsls	r3, r3, #4
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 80093ea:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
 80093ec:	683b      	ldr	r3, [r7, #0]
 80093ee:	f893 3062 	ldrb.w	r3, [r3, #98]	@ 0x62
 80093f2:	00db      	lsls	r3, r3, #3
  macregval = (macconf->ReceiveQueueMode |
 80093f4:	4313      	orrs	r3, r2
 80093f6:	60fb      	str	r3, [r7, #12]

  /* Write to MTLRQOMR */
  MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
 80093f8:	687b      	ldr	r3, [r7, #4]
 80093fa:	681b      	ldr	r3, [r3, #0]
 80093fc:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8009400:	f023 017b 	bic.w	r1, r3, #123	@ 0x7b
 8009404:	687b      	ldr	r3, [r7, #4]
 8009406:	681b      	ldr	r3, [r3, #0]
 8009408:	68fa      	ldr	r2, [r7, #12]
 800940a:	430a      	orrs	r2, r1
 800940c:	f8c3 2d30 	str.w	r2, [r3, #3376]	@ 0xd30
}
 8009410:	bf00      	nop
 8009412:	3714      	adds	r7, #20
 8009414:	46bd      	mov	sp, r7
 8009416:	f85d 7b04 	ldr.w	r7, [sp], #4
 800941a:	4770      	bx	lr
 800941c:	00048083 	.word	0x00048083
 8009420:	c0f88000 	.word	0xc0f88000
 8009424:	fffffef0 	.word	0xfffffef0

08009428 <ETH_SetDMAConfig>:

static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
 8009428:	b480      	push	{r7}
 800942a:	b085      	sub	sp, #20
 800942c:	af00      	add	r7, sp, #0
 800942e:	6078      	str	r0, [r7, #4]
 8009430:	6039      	str	r1, [r7, #0]
  uint32_t dmaregval;

  /*------------------------ DMAMR Configuration --------------------*/
  MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
 8009432:	687b      	ldr	r3, [r7, #4]
 8009434:	681b      	ldr	r3, [r3, #0]
 8009436:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800943a:	681a      	ldr	r2, [r3, #0]
 800943c:	4b38      	ldr	r3, [pc, #224]	@ (8009520 <ETH_SetDMAConfig+0xf8>)
 800943e:	4013      	ands	r3, r2
 8009440:	683a      	ldr	r2, [r7, #0]
 8009442:	6811      	ldr	r1, [r2, #0]
 8009444:	687a      	ldr	r2, [r7, #4]
 8009446:	6812      	ldr	r2, [r2, #0]
 8009448:	430b      	orrs	r3, r1
 800944a:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800944e:	6013      	str	r3, [r2, #0]

  /*------------------------ DMASBMR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8009450:	683b      	ldr	r3, [r7, #0]
 8009452:	791b      	ldrb	r3, [r3, #4]
 8009454:	031a      	lsls	r2, r3, #12
               dmaconf->BurstMode |
 8009456:	683b      	ldr	r3, [r7, #0]
 8009458:	689b      	ldr	r3, [r3, #8]
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 800945a:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->RebuildINCRxBurst << 15));
 800945c:	683b      	ldr	r3, [r7, #0]
 800945e:	7b1b      	ldrb	r3, [r3, #12]
 8009460:	03db      	lsls	r3, r3, #15
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 8009462:	4313      	orrs	r3, r2
 8009464:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
 8009466:	687b      	ldr	r3, [r7, #4]
 8009468:	681b      	ldr	r3, [r3, #0]
 800946a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800946e:	685a      	ldr	r2, [r3, #4]
 8009470:	4b2c      	ldr	r3, [pc, #176]	@ (8009524 <ETH_SetDMAConfig+0xfc>)
 8009472:	4013      	ands	r3, r2
 8009474:	687a      	ldr	r2, [r7, #4]
 8009476:	6812      	ldr	r2, [r2, #0]
 8009478:	68f9      	ldr	r1, [r7, #12]
 800947a:	430b      	orrs	r3, r1
 800947c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009480:	6053      	str	r3, [r2, #4]

  /*------------------------ DMACCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 8009482:	683b      	ldr	r3, [r7, #0]
 8009484:	7b5b      	ldrb	r3, [r3, #13]
 8009486:	041a      	lsls	r2, r3, #16
               dmaconf->MaximumSegmentSize);
 8009488:	683b      	ldr	r3, [r7, #0]
 800948a:	6a1b      	ldr	r3, [r3, #32]
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 800948c:	4313      	orrs	r3, r2
 800948e:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
 8009490:	687b      	ldr	r3, [r7, #4]
 8009492:	681b      	ldr	r3, [r3, #0]
 8009494:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009498:	f8d3 2100 	ldr.w	r2, [r3, #256]	@ 0x100
 800949c:	4b22      	ldr	r3, [pc, #136]	@ (8009528 <ETH_SetDMAConfig+0x100>)
 800949e:	4013      	ands	r3, r2
 80094a0:	687a      	ldr	r2, [r7, #4]
 80094a2:	6812      	ldr	r2, [r2, #0]
 80094a4:	68f9      	ldr	r1, [r7, #12]
 80094a6:	430b      	orrs	r3, r1
 80094a8:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80094ac:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /*------------------------ DMACTCR Configuration --------------------*/
  dmaregval = (dmaconf->TxDMABurstLength |
 80094b0:	683b      	ldr	r3, [r7, #0]
 80094b2:	691a      	ldr	r2, [r3, #16]
               ((uint32_t)dmaconf->SecondPacketOperate << 4) |
 80094b4:	683b      	ldr	r3, [r7, #0]
 80094b6:	7d1b      	ldrb	r3, [r3, #20]
 80094b8:	011b      	lsls	r3, r3, #4
  dmaregval = (dmaconf->TxDMABurstLength |
 80094ba:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->TCPSegmentation << 12));
 80094bc:	683b      	ldr	r3, [r7, #0]
 80094be:	7f5b      	ldrb	r3, [r3, #29]
 80094c0:	031b      	lsls	r3, r3, #12
  dmaregval = (dmaconf->TxDMABurstLength |
 80094c2:	4313      	orrs	r3, r2
 80094c4:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
 80094c6:	687b      	ldr	r3, [r7, #4]
 80094c8:	681b      	ldr	r3, [r3, #0]
 80094ca:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80094ce:	f8d3 2104 	ldr.w	r2, [r3, #260]	@ 0x104
 80094d2:	4b16      	ldr	r3, [pc, #88]	@ (800952c <ETH_SetDMAConfig+0x104>)
 80094d4:	4013      	ands	r3, r2
 80094d6:	687a      	ldr	r2, [r7, #4]
 80094d8:	6812      	ldr	r2, [r2, #0]
 80094da:	68f9      	ldr	r1, [r7, #12]
 80094dc:	430b      	orrs	r3, r1
 80094de:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80094e2:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

  /*------------------------ DMACRCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 80094e6:	683b      	ldr	r3, [r7, #0]
 80094e8:	7f1b      	ldrb	r3, [r3, #28]
 80094ea:	07da      	lsls	r2, r3, #31
               dmaconf->RxDMABurstLength);
 80094ec:	683b      	ldr	r3, [r7, #0]
 80094ee:	699b      	ldr	r3, [r3, #24]
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 80094f0:	4313      	orrs	r3, r2
 80094f2:	60fb      	str	r3, [r7, #12]

  /* Write to DMACRCR */
  MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
 80094f4:	687b      	ldr	r3, [r7, #4]
 80094f6:	681b      	ldr	r3, [r3, #0]
 80094f8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80094fc:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8009500:	4b0b      	ldr	r3, [pc, #44]	@ (8009530 <ETH_SetDMAConfig+0x108>)
 8009502:	4013      	ands	r3, r2
 8009504:	687a      	ldr	r2, [r7, #4]
 8009506:	6812      	ldr	r2, [r2, #0]
 8009508:	68f9      	ldr	r1, [r7, #12]
 800950a:	430b      	orrs	r3, r1
 800950c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009510:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
}
 8009514:	bf00      	nop
 8009516:	3714      	adds	r7, #20
 8009518:	46bd      	mov	sp, r7
 800951a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800951e:	4770      	bx	lr
 8009520:	ffff87fd 	.word	0xffff87fd
 8009524:	ffff2ffe 	.word	0xffff2ffe
 8009528:	fffec000 	.word	0xfffec000
 800952c:	ffc0efef 	.word	0xffc0efef
 8009530:	7fc0ffff 	.word	0x7fc0ffff

08009534 <ETH_MACDMAConfig>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
 8009534:	b580      	push	{r7, lr}
 8009536:	b0a4      	sub	sp, #144	@ 0x90
 8009538:	af00      	add	r7, sp, #0
 800953a:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef macDefaultConf;
  ETH_DMAConfigTypeDef dmaDefaultConf;

  /*--------------- ETHERNET MAC registers default Configuration --------------*/
  macDefaultConf.AutomaticPadCRCStrip = ENABLE;
 800953c:	2301      	movs	r3, #1
 800953e:	f887 303b 	strb.w	r3, [r7, #59]	@ 0x3b
  macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
 8009542:	2300      	movs	r3, #0
 8009544:	653b      	str	r3, [r7, #80]	@ 0x50
  macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
 8009546:	2300      	movs	r3, #0
 8009548:	f887 3049 	strb.w	r3, [r7, #73]	@ 0x49
  macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
 800954c:	2300      	movs	r3, #0
 800954e:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
  macDefaultConf.ChecksumOffload = ENABLE;
 8009552:	2301      	movs	r3, #1
 8009554:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  macDefaultConf.CRCCheckingRxPackets = ENABLE;
 8009558:	2301      	movs	r3, #1
 800955a:	f887 305e 	strb.w	r3, [r7, #94]	@ 0x5e
  macDefaultConf.CRCStripTypePacket = ENABLE;
 800955e:	2301      	movs	r3, #1
 8009560:	f887 303a 	strb.w	r3, [r7, #58]	@ 0x3a
  macDefaultConf.DeferralCheck = DISABLE;
 8009564:	2300      	movs	r3, #0
 8009566:	f887 3054 	strb.w	r3, [r7, #84]	@ 0x54
  macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
 800956a:	2301      	movs	r3, #1
 800956c:	f887 308c 	strb.w	r3, [r7, #140]	@ 0x8c
  macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
 8009570:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8009574:	647b      	str	r3, [r7, #68]	@ 0x44
  macDefaultConf.ExtendedInterPacketGap = DISABLE;
 8009576:	2300      	movs	r3, #0
 8009578:	f887 3064 	strb.w	r3, [r7, #100]	@ 0x64
  macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
 800957c:	2300      	movs	r3, #0
 800957e:	66bb      	str	r3, [r7, #104]	@ 0x68
  macDefaultConf.ForwardRxErrorPacket = DISABLE;
 8009580:	2300      	movs	r3, #0
 8009582:	f887 308d 	strb.w	r3, [r7, #141]	@ 0x8d
  macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
 8009586:	2300      	movs	r3, #0
 8009588:	f887 308e 	strb.w	r3, [r7, #142]	@ 0x8e
  macDefaultConf.GiantPacketSizeLimit = 0x618U;
 800958c:	f44f 63c3 	mov.w	r3, #1560	@ 0x618
 8009590:	663b      	str	r3, [r7, #96]	@ 0x60
  macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
 8009592:	2300      	movs	r3, #0
 8009594:	f887 3038 	strb.w	r3, [r7, #56]	@ 0x38
  macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
 8009598:	2300      	movs	r3, #0
 800959a:	637b      	str	r3, [r7, #52]	@ 0x34
  macDefaultConf.Jabber = ENABLE;
 800959c:	2301      	movs	r3, #1
 800959e:	f887 303d 	strb.w	r3, [r7, #61]	@ 0x3d
  macDefaultConf.JumboPacket = DISABLE;
 80095a2:	2300      	movs	r3, #0
 80095a4:	f887 303e 	strb.w	r3, [r7, #62]	@ 0x3e
  macDefaultConf.LoopbackMode = DISABLE;
 80095a8:	2300      	movs	r3, #0
 80095aa:	f887 3048 	strb.w	r3, [r7, #72]	@ 0x48
  macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
 80095ae:	2300      	movs	r3, #0
 80095b0:	67fb      	str	r3, [r7, #124]	@ 0x7c
  macDefaultConf.PauseTime = 0x0U;
 80095b2:	2300      	movs	r3, #0
 80095b4:	677b      	str	r3, [r7, #116]	@ 0x74
  macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
 80095b6:	2300      	movs	r3, #0
 80095b8:	65bb      	str	r3, [r7, #88]	@ 0x58
  macDefaultConf.ProgrammableWatchdog = DISABLE;
 80095ba:	2300      	movs	r3, #0
 80095bc:	f887 306c 	strb.w	r3, [r7, #108]	@ 0x6c
  macDefaultConf.ReceiveFlowControl = DISABLE;
 80095c0:	2300      	movs	r3, #0
 80095c2:	f887 3082 	strb.w	r3, [r7, #130]	@ 0x82
  macDefaultConf.ReceiveOwn = ENABLE;
 80095c6:	2301      	movs	r3, #1
 80095c8:	f887 304a 	strb.w	r3, [r7, #74]	@ 0x4a
  macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
 80095cc:	2320      	movs	r3, #32
 80095ce:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  macDefaultConf.RetryTransmission = ENABLE;
 80095d2:	2301      	movs	r3, #1
 80095d4:	f887 304c 	strb.w	r3, [r7, #76]	@ 0x4c
  macDefaultConf.SlowProtocolDetect = DISABLE;
 80095d8:	2300      	movs	r3, #0
 80095da:	f887 305d 	strb.w	r3, [r7, #93]	@ 0x5d
  macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
 80095de:	f04f 5340 	mov.w	r3, #805306368	@ 0x30000000
 80095e2:	62fb      	str	r3, [r7, #44]	@ 0x2c
  macDefaultConf.Speed = ETH_SPEED_100M;
 80095e4:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80095e8:	643b      	str	r3, [r7, #64]	@ 0x40
  macDefaultConf.Support2KPacket = DISABLE;
 80095ea:	2300      	movs	r3, #0
 80095ec:	f887 3039 	strb.w	r3, [r7, #57]	@ 0x39
  macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
 80095f0:	2302      	movs	r3, #2
 80095f2:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
  macDefaultConf.TransmitFlowControl = DISABLE;
 80095f6:	2300      	movs	r3, #0
 80095f8:	f887 3080 	strb.w	r3, [r7, #128]	@ 0x80
  macDefaultConf.UnicastPausePacketDetect = DISABLE;
 80095fc:	2300      	movs	r3, #0
 80095fe:	f887 3081 	strb.w	r3, [r7, #129]	@ 0x81
  macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
 8009602:	2300      	movs	r3, #0
 8009604:	f887 305c 	strb.w	r3, [r7, #92]	@ 0x5c
  macDefaultConf.Watchdog = ENABLE;
 8009608:	2301      	movs	r3, #1
 800960a:	f887 303c 	strb.w	r3, [r7, #60]	@ 0x3c
  macDefaultConf.WatchdogTimeout =  ETH_MACWTR_WTO_2KB;
 800960e:	2300      	movs	r3, #0
 8009610:	673b      	str	r3, [r7, #112]	@ 0x70
  macDefaultConf.ZeroQuantaPause = ENABLE;
 8009612:	2301      	movs	r3, #1
 8009614:	f887 3078 	strb.w	r3, [r7, #120]	@ 0x78

  /* MAC default configuration */
  ETH_SetMACConfig(heth, &macDefaultConf);
 8009618:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
 800961c:	4619      	mov	r1, r3
 800961e:	6878      	ldr	r0, [r7, #4]
 8009620:	f7ff fde6 	bl	80091f0 <ETH_SetMACConfig>

  /*--------------- ETHERNET DMA registers default Configuration --------------*/
  dmaDefaultConf.AddressAlignedBeats = ENABLE;
 8009624:	2301      	movs	r3, #1
 8009626:	733b      	strb	r3, [r7, #12]
  dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
 8009628:	2301      	movs	r3, #1
 800962a:	613b      	str	r3, [r7, #16]
  dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
 800962c:	2300      	movs	r3, #0
 800962e:	60bb      	str	r3, [r7, #8]
  dmaDefaultConf.FlushRxPacket = DISABLE;
 8009630:	2300      	movs	r3, #0
 8009632:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
  dmaDefaultConf.PBLx8Mode = DISABLE;
 8009636:	2300      	movs	r3, #0
 8009638:	757b      	strb	r3, [r7, #21]
  dmaDefaultConf.RebuildINCRxBurst = DISABLE;
 800963a:	2300      	movs	r3, #0
 800963c:	753b      	strb	r3, [r7, #20]
  dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
 800963e:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 8009642:	623b      	str	r3, [r7, #32]
  dmaDefaultConf.SecondPacketOperate = DISABLE;
 8009644:	2300      	movs	r3, #0
 8009646:	773b      	strb	r3, [r7, #28]
  dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
 8009648:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 800964c:	61bb      	str	r3, [r7, #24]
  dmaDefaultConf.TCPSegmentation = DISABLE;
 800964e:	2300      	movs	r3, #0
 8009650:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
  dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
 8009654:	f44f 7306 	mov.w	r3, #536	@ 0x218
 8009658:	62bb      	str	r3, [r7, #40]	@ 0x28

  /* DMA default configuration */
  ETH_SetDMAConfig(heth, &dmaDefaultConf);
 800965a:	f107 0308 	add.w	r3, r7, #8
 800965e:	4619      	mov	r1, r3
 8009660:	6878      	ldr	r0, [r7, #4]
 8009662:	f7ff fee1 	bl	8009428 <ETH_SetDMAConfig>
}
 8009666:	bf00      	nop
 8009668:	3790      	adds	r7, #144	@ 0x90
 800966a:	46bd      	mov	sp, r7
 800966c:	bd80      	pop	{r7, pc}

0800966e <ETH_DMATxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
 800966e:	b480      	push	{r7}
 8009670:	b085      	sub	sp, #20
 8009672:	af00      	add	r7, sp, #0
 8009674:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmatxdesc;
  uint32_t i;

  /* Fill each DMATxDesc descriptor with the right values */
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8009676:	2300      	movs	r3, #0
 8009678:	60fb      	str	r3, [r7, #12]
 800967a:	e01d      	b.n	80096b8 <ETH_DMATxDescListInit+0x4a>
  {
    dmatxdesc = heth->Init.TxDesc + i;
 800967c:	687b      	ldr	r3, [r7, #4]
 800967e:	68d9      	ldr	r1, [r3, #12]
 8009680:	68fa      	ldr	r2, [r7, #12]
 8009682:	4613      	mov	r3, r2
 8009684:	005b      	lsls	r3, r3, #1
 8009686:	4413      	add	r3, r2
 8009688:	00db      	lsls	r3, r3, #3
 800968a:	440b      	add	r3, r1
 800968c:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmatxdesc->DESC0, 0x0U);
 800968e:	68bb      	ldr	r3, [r7, #8]
 8009690:	2200      	movs	r2, #0
 8009692:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009694:	68bb      	ldr	r3, [r7, #8]
 8009696:	2200      	movs	r2, #0
 8009698:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmatxdesc->DESC2, 0x0U);
 800969a:	68bb      	ldr	r3, [r7, #8]
 800969c:	2200      	movs	r2, #0
 800969e:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmatxdesc->DESC3, 0x0U);
 80096a0:	68bb      	ldr	r3, [r7, #8]
 80096a2:	2200      	movs	r2, #0
 80096a4:	60da      	str	r2, [r3, #12]

    WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
 80096a6:	68b9      	ldr	r1, [r7, #8]
 80096a8:	687b      	ldr	r3, [r7, #4]
 80096aa:	68fa      	ldr	r2, [r7, #12]
 80096ac:	3206      	adds	r2, #6
 80096ae:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 80096b2:	68fb      	ldr	r3, [r7, #12]
 80096b4:	3301      	adds	r3, #1
 80096b6:	60fb      	str	r3, [r7, #12]
 80096b8:	68fb      	ldr	r3, [r7, #12]
 80096ba:	2b03      	cmp	r3, #3
 80096bc:	d9de      	bls.n	800967c <ETH_DMATxDescListInit+0xe>

  }

  heth->TxDescList.CurTxDesc = 0;
 80096be:	687b      	ldr	r3, [r7, #4]
 80096c0:	2200      	movs	r2, #0
 80096c2:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Set Transmit Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
 80096c4:	687b      	ldr	r3, [r7, #4]
 80096c6:	681b      	ldr	r3, [r3, #0]
 80096c8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80096cc:	461a      	mov	r2, r3
 80096ce:	2303      	movs	r3, #3
 80096d0:	f8c2 312c 	str.w	r3, [r2, #300]	@ 0x12c

  /* Set Transmit Descriptor List Address */
  WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
 80096d4:	687b      	ldr	r3, [r7, #4]
 80096d6:	68da      	ldr	r2, [r3, #12]
 80096d8:	687b      	ldr	r3, [r7, #4]
 80096da:	681b      	ldr	r3, [r3, #0]
 80096dc:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80096e0:	f8c3 2114 	str.w	r2, [r3, #276]	@ 0x114

  /* Set Transmit Descriptor Tail pointer */
  WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
 80096e4:	687b      	ldr	r3, [r7, #4]
 80096e6:	68da      	ldr	r2, [r3, #12]
 80096e8:	687b      	ldr	r3, [r7, #4]
 80096ea:	681b      	ldr	r3, [r3, #0]
 80096ec:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80096f0:	f8c3 2120 	str.w	r2, [r3, #288]	@ 0x120
}
 80096f4:	bf00      	nop
 80096f6:	3714      	adds	r7, #20
 80096f8:	46bd      	mov	sp, r7
 80096fa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80096fe:	4770      	bx	lr

08009700 <ETH_DMARxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
 8009700:	b480      	push	{r7}
 8009702:	b085      	sub	sp, #20
 8009704:	af00      	add	r7, sp, #0
 8009706:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t i;

  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8009708:	2300      	movs	r3, #0
 800970a:	60fb      	str	r3, [r7, #12]
 800970c:	e023      	b.n	8009756 <ETH_DMARxDescListInit+0x56>
  {
    dmarxdesc =  heth->Init.RxDesc + i;
 800970e:	687b      	ldr	r3, [r7, #4]
 8009710:	6919      	ldr	r1, [r3, #16]
 8009712:	68fa      	ldr	r2, [r7, #12]
 8009714:	4613      	mov	r3, r2
 8009716:	005b      	lsls	r3, r3, #1
 8009718:	4413      	add	r3, r2
 800971a:	00db      	lsls	r3, r3, #3
 800971c:	440b      	add	r3, r1
 800971e:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmarxdesc->DESC0, 0x0U);
 8009720:	68bb      	ldr	r3, [r7, #8]
 8009722:	2200      	movs	r2, #0
 8009724:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmarxdesc->DESC1, 0x0U);
 8009726:	68bb      	ldr	r3, [r7, #8]
 8009728:	2200      	movs	r2, #0
 800972a:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmarxdesc->DESC2, 0x0U);
 800972c:	68bb      	ldr	r3, [r7, #8]
 800972e:	2200      	movs	r2, #0
 8009730:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmarxdesc->DESC3, 0x0U);
 8009732:	68bb      	ldr	r3, [r7, #8]
 8009734:	2200      	movs	r2, #0
 8009736:	60da      	str	r2, [r3, #12]
    WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
 8009738:	68bb      	ldr	r3, [r7, #8]
 800973a:	2200      	movs	r2, #0
 800973c:	611a      	str	r2, [r3, #16]
    WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
 800973e:	68bb      	ldr	r3, [r7, #8]
 8009740:	2200      	movs	r2, #0
 8009742:	615a      	str	r2, [r3, #20]

    /* Set Rx descritors addresses */
    WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
 8009744:	68b9      	ldr	r1, [r7, #8]
 8009746:	687b      	ldr	r3, [r7, #4]
 8009748:	68fa      	ldr	r2, [r7, #12]
 800974a:	3212      	adds	r2, #18
 800974c:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8009750:	68fb      	ldr	r3, [r7, #12]
 8009752:	3301      	adds	r3, #1
 8009754:	60fb      	str	r3, [r7, #12]
 8009756:	68fb      	ldr	r3, [r7, #12]
 8009758:	2b03      	cmp	r3, #3
 800975a:	d9d8      	bls.n	800970e <ETH_DMARxDescListInit+0xe>

  }

  WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
 800975c:	687b      	ldr	r3, [r7, #4]
 800975e:	2200      	movs	r2, #0
 8009760:	65da      	str	r2, [r3, #92]	@ 0x5c
  WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
 8009762:	687b      	ldr	r3, [r7, #4]
 8009764:	2200      	movs	r2, #0
 8009766:	661a      	str	r2, [r3, #96]	@ 0x60
  WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
 8009768:	687b      	ldr	r3, [r7, #4]
 800976a:	2200      	movs	r2, #0
 800976c:	669a      	str	r2, [r3, #104]	@ 0x68
  WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
 800976e:	687b      	ldr	r3, [r7, #4]
 8009770:	2200      	movs	r2, #0
 8009772:	66da      	str	r2, [r3, #108]	@ 0x6c
  WRITE_REG(heth->RxDescList.ItMode, 0U);
 8009774:	687b      	ldr	r3, [r7, #4]
 8009776:	2200      	movs	r2, #0
 8009778:	659a      	str	r2, [r3, #88]	@ 0x58

  /* Set Receive Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
 800977a:	687b      	ldr	r3, [r7, #4]
 800977c:	681b      	ldr	r3, [r3, #0]
 800977e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009782:	461a      	mov	r2, r3
 8009784:	2303      	movs	r3, #3
 8009786:	f8c2 3130 	str.w	r3, [r2, #304]	@ 0x130

  /* Set Receive Descriptor List Address */
  WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
 800978a:	687b      	ldr	r3, [r7, #4]
 800978c:	691a      	ldr	r2, [r3, #16]
 800978e:	687b      	ldr	r3, [r7, #4]
 8009790:	681b      	ldr	r3, [r3, #0]
 8009792:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009796:	f8c3 211c 	str.w	r2, [r3, #284]	@ 0x11c

  /* Set Receive Descriptor Tail pointer Address */
  WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
 800979a:	687b      	ldr	r3, [r7, #4]
 800979c:	691b      	ldr	r3, [r3, #16]
 800979e:	f103 0248 	add.w	r2, r3, #72	@ 0x48
 80097a2:	687b      	ldr	r3, [r7, #4]
 80097a4:	681b      	ldr	r3, [r3, #0]
 80097a6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80097aa:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128
}
 80097ae:	bf00      	nop
 80097b0:	3714      	adds	r7, #20
 80097b2:	46bd      	mov	sp, r7
 80097b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80097b8:	4770      	bx	lr
	...

080097bc <ETH_Prepare_Tx_Descriptors>:
  * @param  ItMode: Enable or disable Tx EOT interrept
  * @retval Status
  */
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
                                           uint32_t ItMode)
{
 80097bc:	b480      	push	{r7}
 80097be:	b091      	sub	sp, #68	@ 0x44
 80097c0:	af00      	add	r7, sp, #0
 80097c2:	60f8      	str	r0, [r7, #12]
 80097c4:	60b9      	str	r1, [r7, #8]
 80097c6:	607a      	str	r2, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 80097c8:	68fb      	ldr	r3, [r7, #12]
 80097ca:	3318      	adds	r3, #24
 80097cc:	627b      	str	r3, [r7, #36]	@ 0x24
  uint32_t descidx = dmatxdesclist->CurTxDesc;
 80097ce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80097d0:	691b      	ldr	r3, [r3, #16]
 80097d2:	63fb      	str	r3, [r7, #60]	@ 0x3c
  uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
 80097d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80097d6:	691b      	ldr	r3, [r3, #16]
 80097d8:	623b      	str	r3, [r7, #32]
  uint32_t idx;
  uint32_t descnbr = 0;
 80097da:	2300      	movs	r3, #0
 80097dc:	637b      	str	r3, [r7, #52]	@ 0x34
  ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 80097de:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80097e0:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 80097e2:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 80097e6:	633b      	str	r3, [r7, #48]	@ 0x30

  ETH_BufferTypeDef  *txbuffer = pTxConfig->TxBuffer;
 80097e8:	68bb      	ldr	r3, [r7, #8]
 80097ea:	689b      	ldr	r3, [r3, #8]
 80097ec:	62fb      	str	r3, [r7, #44]	@ 0x2c
  uint32_t           bd_count = 0;
 80097ee:	2300      	movs	r3, #0
 80097f0:	62bb      	str	r3, [r7, #40]	@ 0x28
  uint32_t primask_bit;

  /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
  if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 80097f2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80097f4:	68db      	ldr	r3, [r3, #12]
 80097f6:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 80097fa:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 80097fe:	d007      	beq.n	8009810 <ETH_Prepare_Tx_Descriptors+0x54>
      || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8009800:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8009802:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009804:	3304      	adds	r3, #4
 8009806:	009b      	lsls	r3, r3, #2
 8009808:	4413      	add	r3, r2
 800980a:	685b      	ldr	r3, [r3, #4]
 800980c:	2b00      	cmp	r3, #0
 800980e:	d001      	beq.n	8009814 <ETH_Prepare_Tx_Descriptors+0x58>
  {
    return HAL_ETH_ERROR_BUSY;
 8009810:	2302      	movs	r3, #2
 8009812:	e266      	b.n	8009ce2 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Context descriptor configuration (Optional) **********/
  /***************************************************************************/
  /* If VLAN tag is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009814:	68bb      	ldr	r3, [r7, #8]
 8009816:	681b      	ldr	r3, [r3, #0]
 8009818:	f003 0304 	and.w	r3, r3, #4
 800981c:	2b00      	cmp	r3, #0
 800981e:	d044      	beq.n	80098aa <ETH_Prepare_Tx_Descriptors+0xee>
  {
    /* Set vlan tag value */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
 8009820:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009822:	68da      	ldr	r2, [r3, #12]
 8009824:	4b75      	ldr	r3, [pc, #468]	@ (80099fc <ETH_Prepare_Tx_Descriptors+0x240>)
 8009826:	4013      	ands	r3, r2
 8009828:	68ba      	ldr	r2, [r7, #8]
 800982a:	6a52      	ldr	r2, [r2, #36]	@ 0x24
 800982c:	431a      	orrs	r2, r3
 800982e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009830:	60da      	str	r2, [r3, #12]
    /* Set vlan tag valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
 8009832:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009834:	68db      	ldr	r3, [r3, #12]
 8009836:	f443 3280 	orr.w	r2, r3, #65536	@ 0x10000
 800983a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800983c:	60da      	str	r2, [r3, #12]
    /* Set the descriptor as the vlan input source */
    SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
 800983e:	68fb      	ldr	r3, [r7, #12]
 8009840:	681b      	ldr	r3, [r3, #0]
 8009842:	6e1a      	ldr	r2, [r3, #96]	@ 0x60
 8009844:	68fb      	ldr	r3, [r7, #12]
 8009846:	681b      	ldr	r3, [r3, #0]
 8009848:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 800984c:	661a      	str	r2, [r3, #96]	@ 0x60

    /* if inner VLAN is enabled */
    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
 800984e:	68bb      	ldr	r3, [r7, #8]
 8009850:	681b      	ldr	r3, [r3, #0]
 8009852:	f003 0308 	and.w	r3, r3, #8
 8009856:	2b00      	cmp	r3, #0
 8009858:	d027      	beq.n	80098aa <ETH_Prepare_Tx_Descriptors+0xee>
    {
      /* Set inner vlan tag value */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
 800985a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800985c:	689b      	ldr	r3, [r3, #8]
 800985e:	b29a      	uxth	r2, r3
 8009860:	68bb      	ldr	r3, [r7, #8]
 8009862:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009864:	041b      	lsls	r3, r3, #16
 8009866:	431a      	orrs	r2, r3
 8009868:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800986a:	609a      	str	r2, [r3, #8]
      /* Set inner vlan tag valid bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
 800986c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800986e:	68db      	ldr	r3, [r3, #12]
 8009870:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
 8009874:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009876:	60da      	str	r2, [r3, #12]

      /* Set Vlan Tag control */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
 8009878:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800987a:	68db      	ldr	r3, [r3, #12]
 800987c:	f423 2240 	bic.w	r2, r3, #786432	@ 0xc0000
 8009880:	68bb      	ldr	r3, [r7, #8]
 8009882:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009884:	431a      	orrs	r2, r3
 8009886:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009888:	60da      	str	r2, [r3, #12]

      /* Set the descriptor as the inner vlan input source */
      SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
 800988a:	68fb      	ldr	r3, [r7, #12]
 800988c:	681b      	ldr	r3, [r3, #0]
 800988e:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8009890:	68fb      	ldr	r3, [r7, #12]
 8009892:	681b      	ldr	r3, [r3, #0]
 8009894:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8009898:	665a      	str	r2, [r3, #100]	@ 0x64
      /* Enable double VLAN processing */
      SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
 800989a:	68fb      	ldr	r3, [r7, #12]
 800989c:	681b      	ldr	r3, [r3, #0]
 800989e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 80098a0:	68fb      	ldr	r3, [r7, #12]
 80098a2:	681b      	ldr	r3, [r3, #0]
 80098a4:	f042 6280 	orr.w	r2, r2, #67108864	@ 0x4000000
 80098a8:	651a      	str	r2, [r3, #80]	@ 0x50
    }
  }

  /* if tcp segmentation is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 80098aa:	68bb      	ldr	r3, [r7, #8]
 80098ac:	681b      	ldr	r3, [r3, #0]
 80098ae:	f003 0310 	and.w	r3, r3, #16
 80098b2:	2b00      	cmp	r3, #0
 80098b4:	d00e      	beq.n	80098d4 <ETH_Prepare_Tx_Descriptors+0x118>
  {
    /* Set MSS value */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
 80098b6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098b8:	689a      	ldr	r2, [r3, #8]
 80098ba:	4b51      	ldr	r3, [pc, #324]	@ (8009a00 <ETH_Prepare_Tx_Descriptors+0x244>)
 80098bc:	4013      	ands	r3, r2
 80098be:	68ba      	ldr	r2, [r7, #8]
 80098c0:	6992      	ldr	r2, [r2, #24]
 80098c2:	431a      	orrs	r2, r3
 80098c4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098c6:	609a      	str	r2, [r3, #8]
    /* Set MSS valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
 80098c8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098ca:	68db      	ldr	r3, [r3, #12]
 80098cc:	f043 6280 	orr.w	r2, r3, #67108864	@ 0x4000000
 80098d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098d2:	60da      	str	r2, [r3, #12]
  }

  if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 80098d4:	68bb      	ldr	r3, [r7, #8]
 80098d6:	681b      	ldr	r3, [r3, #0]
 80098d8:	f003 0304 	and.w	r3, r3, #4
 80098dc:	2b00      	cmp	r3, #0
 80098de:	d105      	bne.n	80098ec <ETH_Prepare_Tx_Descriptors+0x130>
      || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
 80098e0:	68bb      	ldr	r3, [r7, #8]
 80098e2:	681b      	ldr	r3, [r3, #0]
 80098e4:	f003 0310 	and.w	r3, r3, #16
 80098e8:	2b00      	cmp	r3, #0
 80098ea:	d036      	beq.n	800995a <ETH_Prepare_Tx_Descriptors+0x19e>
  {
    /* Set as context descriptor */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
 80098ec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098ee:	68db      	ldr	r3, [r3, #12]
 80098f0:	f043 4280 	orr.w	r2, r3, #1073741824	@ 0x40000000
 80098f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80098f6:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 80098f8:	f3bf 8f5f 	dmb	sy
}
 80098fc:	bf00      	nop
    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 80098fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009900:	68db      	ldr	r3, [r3, #12]
 8009902:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009906:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009908:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 800990a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800990c:	3301      	adds	r3, #1
 800990e:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009910:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009912:	2b03      	cmp	r3, #3
 8009914:	d902      	bls.n	800991c <ETH_Prepare_Tx_Descriptors+0x160>
 8009916:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009918:	3b04      	subs	r3, #4
 800991a:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 800991c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800991e:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009920:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009924:	633b      	str	r3, [r7, #48]	@ 0x30

    descnbr += 1U;
 8009926:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009928:	3301      	adds	r3, #1
 800992a:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 800992c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800992e:	68db      	ldr	r3, [r3, #12]
 8009930:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8009934:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009938:	d10f      	bne.n	800995a <ETH_Prepare_Tx_Descriptors+0x19e>
    {
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
 800993a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800993c:	6a3a      	ldr	r2, [r7, #32]
 800993e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009942:	633b      	str	r3, [r7, #48]	@ 0x30
  __ASM volatile ("dmb 0xF":::"memory");
 8009944:	f3bf 8f5f 	dmb	sy
}
 8009948:	bf00      	nop
      /* Ensure rest of descriptor is written to RAM before the OWN bit */
      __DMB();
      /* Clear own bit */
      CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 800994a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800994c:	68db      	ldr	r3, [r3, #12]
 800994e:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009952:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009954:	60da      	str	r2, [r3, #12]

      return HAL_ETH_ERROR_BUSY;
 8009956:	2302      	movs	r3, #2
 8009958:	e1c3      	b.n	8009ce2 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Normal descriptors configuration     *****************/
  /***************************************************************************/

  descnbr += 1U;
 800995a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800995c:	3301      	adds	r3, #1
 800995e:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Set header or buffer 1 address */
  WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009960:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009962:	681b      	ldr	r3, [r3, #0]
 8009964:	461a      	mov	r2, r3
 8009966:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009968:	601a      	str	r2, [r3, #0]
  /* Set header or buffer 1 Length */
  MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 800996a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800996c:	689a      	ldr	r2, [r3, #8]
 800996e:	4b24      	ldr	r3, [pc, #144]	@ (8009a00 <ETH_Prepare_Tx_Descriptors+0x244>)
 8009970:	4013      	ands	r3, r2
 8009972:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009974:	6852      	ldr	r2, [r2, #4]
 8009976:	431a      	orrs	r2, r3
 8009978:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800997a:	609a      	str	r2, [r3, #8]

  if (txbuffer->next != NULL)
 800997c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800997e:	689b      	ldr	r3, [r3, #8]
 8009980:	2b00      	cmp	r3, #0
 8009982:	d012      	beq.n	80099aa <ETH_Prepare_Tx_Descriptors+0x1ee>
  {
    txbuffer = txbuffer->next;
 8009984:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009986:	689b      	ldr	r3, [r3, #8]
 8009988:	62fb      	str	r3, [r7, #44]	@ 0x2c
    /* Set buffer 2 address */
    WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 800998a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800998c:	681b      	ldr	r3, [r3, #0]
 800998e:	461a      	mov	r2, r3
 8009990:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009992:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009994:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009996:	689a      	ldr	r2, [r3, #8]
 8009998:	4b1a      	ldr	r3, [pc, #104]	@ (8009a04 <ETH_Prepare_Tx_Descriptors+0x248>)
 800999a:	4013      	ands	r3, r2
 800999c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800999e:	6852      	ldr	r2, [r2, #4]
 80099a0:	0412      	lsls	r2, r2, #16
 80099a2:	431a      	orrs	r2, r3
 80099a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099a6:	609a      	str	r2, [r3, #8]
 80099a8:	e008      	b.n	80099bc <ETH_Prepare_Tx_Descriptors+0x200>
  }
  else
  {
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 80099aa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099ac:	2200      	movs	r2, #0
 80099ae:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 80099b0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099b2:	689a      	ldr	r2, [r3, #8]
 80099b4:	4b13      	ldr	r3, [pc, #76]	@ (8009a04 <ETH_Prepare_Tx_Descriptors+0x248>)
 80099b6:	4013      	ands	r3, r2
 80099b8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80099ba:	6093      	str	r3, [r2, #8]
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 80099bc:	68bb      	ldr	r3, [r7, #8]
 80099be:	681b      	ldr	r3, [r3, #0]
 80099c0:	f003 0310 	and.w	r3, r3, #16
 80099c4:	2b00      	cmp	r3, #0
 80099c6:	d021      	beq.n	8009a0c <ETH_Prepare_Tx_Descriptors+0x250>
  {
    /* Set TCP Header length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
 80099c8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099ca:	68db      	ldr	r3, [r3, #12]
 80099cc:	f423 02f0 	bic.w	r2, r3, #7864320	@ 0x780000
 80099d0:	68bb      	ldr	r3, [r7, #8]
 80099d2:	6a1b      	ldr	r3, [r3, #32]
 80099d4:	04db      	lsls	r3, r3, #19
 80099d6:	431a      	orrs	r2, r3
 80099d8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099da:	60da      	str	r2, [r3, #12]
    /* Set TCP payload length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 80099dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099de:	68da      	ldr	r2, [r3, #12]
 80099e0:	4b09      	ldr	r3, [pc, #36]	@ (8009a08 <ETH_Prepare_Tx_Descriptors+0x24c>)
 80099e2:	4013      	ands	r3, r2
 80099e4:	68ba      	ldr	r2, [r7, #8]
 80099e6:	69d2      	ldr	r2, [r2, #28]
 80099e8:	431a      	orrs	r2, r3
 80099ea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099ec:	60da      	str	r2, [r3, #12]
    /* Set TCP Segmentation Enabled bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 80099ee:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099f0:	68db      	ldr	r3, [r3, #12]
 80099f2:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 80099f6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80099f8:	60da      	str	r2, [r3, #12]
 80099fa:	e02e      	b.n	8009a5a <ETH_Prepare_Tx_Descriptors+0x29e>
 80099fc:	ffff0000 	.word	0xffff0000
 8009a00:	ffffc000 	.word	0xffffc000
 8009a04:	c000ffff 	.word	0xc000ffff
 8009a08:	fffc0000 	.word	0xfffc0000
  }
  else
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 8009a0c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a0e:	68da      	ldr	r2, [r3, #12]
 8009a10:	4b7b      	ldr	r3, [pc, #492]	@ (8009c00 <ETH_Prepare_Tx_Descriptors+0x444>)
 8009a12:	4013      	ands	r3, r2
 8009a14:	68ba      	ldr	r2, [r7, #8]
 8009a16:	6852      	ldr	r2, [r2, #4]
 8009a18:	431a      	orrs	r2, r3
 8009a1a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a1c:	60da      	str	r2, [r3, #12]

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 8009a1e:	68bb      	ldr	r3, [r7, #8]
 8009a20:	681b      	ldr	r3, [r3, #0]
 8009a22:	f003 0301 	and.w	r3, r3, #1
 8009a26:	2b00      	cmp	r3, #0
 8009a28:	d008      	beq.n	8009a3c <ETH_Prepare_Tx_Descriptors+0x280>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 8009a2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a2c:	68db      	ldr	r3, [r3, #12]
 8009a2e:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8009a32:	68bb      	ldr	r3, [r7, #8]
 8009a34:	695b      	ldr	r3, [r3, #20]
 8009a36:	431a      	orrs	r2, r3
 8009a38:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a3a:	60da      	str	r2, [r3, #12]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
 8009a3c:	68bb      	ldr	r3, [r7, #8]
 8009a3e:	681b      	ldr	r3, [r3, #0]
 8009a40:	f003 0320 	and.w	r3, r3, #32
 8009a44:	2b00      	cmp	r3, #0
 8009a46:	d008      	beq.n	8009a5a <ETH_Prepare_Tx_Descriptors+0x29e>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
 8009a48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a4a:	68db      	ldr	r3, [r3, #12]
 8009a4c:	f023 6240 	bic.w	r2, r3, #201326592	@ 0xc000000
 8009a50:	68bb      	ldr	r3, [r7, #8]
 8009a52:	691b      	ldr	r3, [r3, #16]
 8009a54:	431a      	orrs	r2, r3
 8009a56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a58:	60da      	str	r2, [r3, #12]
    }
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009a5a:	68bb      	ldr	r3, [r7, #8]
 8009a5c:	681b      	ldr	r3, [r3, #0]
 8009a5e:	f003 0304 	and.w	r3, r3, #4
 8009a62:	2b00      	cmp	r3, #0
 8009a64:	d008      	beq.n	8009a78 <ETH_Prepare_Tx_Descriptors+0x2bc>
  {
    /* Set Vlan Tag control */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
 8009a66:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a68:	689b      	ldr	r3, [r3, #8]
 8009a6a:	f423 4240 	bic.w	r2, r3, #49152	@ 0xc000
 8009a6e:	68bb      	ldr	r3, [r7, #8]
 8009a70:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009a72:	431a      	orrs	r2, r3
 8009a74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a76:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as First Descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009a78:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a7a:	68db      	ldr	r3, [r3, #12]
 8009a7c:	f043 5200 	orr.w	r2, r3, #536870912	@ 0x20000000
 8009a80:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a82:	60da      	str	r2, [r3, #12]
  /* Mark it as NORMAL descriptor */
  CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009a84:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a86:	68db      	ldr	r3, [r3, #12]
 8009a88:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009a8c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a8e:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8009a90:	f3bf 8f5f 	dmb	sy
}
 8009a94:	bf00      	nop
  /* Ensure rest of descriptor is written to RAM before the OWN bit */
  __DMB();
  /* set OWN bit of FIRST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009a96:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009a98:	68db      	ldr	r3, [r3, #12]
 8009a9a:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009a9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009aa0:	60da      	str	r2, [r3, #12]

  /* If source address insertion/replacement is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
 8009aa2:	68bb      	ldr	r3, [r7, #8]
 8009aa4:	681b      	ldr	r3, [r3, #0]
 8009aa6:	f003 0302 	and.w	r3, r3, #2
 8009aaa:	2b00      	cmp	r3, #0
 8009aac:	f000 80da 	beq.w	8009c64 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
 8009ab0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ab2:	68db      	ldr	r3, [r3, #12]
 8009ab4:	f023 7260 	bic.w	r2, r3, #58720256	@ 0x3800000
 8009ab8:	68bb      	ldr	r3, [r7, #8]
 8009aba:	68db      	ldr	r3, [r3, #12]
 8009abc:	431a      	orrs	r2, r3
 8009abe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ac0:	60da      	str	r2, [r3, #12]
  }

  /* only if the packet is split into more than one descriptors > 1 */
  while (txbuffer->next != NULL)
 8009ac2:	e0cf      	b.n	8009c64 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    /* Clear the LD bit of previous descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009ac4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ac6:	68db      	ldr	r3, [r3, #12]
 8009ac8:	f023 5280 	bic.w	r2, r3, #268435456	@ 0x10000000
 8009acc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ace:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8009ad0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ad2:	3301      	adds	r3, #1
 8009ad4:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009ad6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ad8:	2b03      	cmp	r3, #3
 8009ada:	d902      	bls.n	8009ae2 <ETH_Prepare_Tx_Descriptors+0x326>
 8009adc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ade:	3b04      	subs	r3, #4
 8009ae0:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009ae2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009ae4:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009ae6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009aea:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Clear the FD bit of new Descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009aec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009aee:	68db      	ldr	r3, [r3, #12]
 8009af0:	f023 5200 	bic.w	r2, r3, #536870912	@ 0x20000000
 8009af4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009af6:	60da      	str	r2, [r3, #12]

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
 8009af8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009afa:	68db      	ldr	r3, [r3, #12]
 8009afc:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8009b00:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009b04:	d007      	beq.n	8009b16 <ETH_Prepare_Tx_Descriptors+0x35a>
        || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8009b06:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8009b08:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009b0a:	3304      	adds	r3, #4
 8009b0c:	009b      	lsls	r3, r3, #2
 8009b0e:	4413      	add	r3, r2
 8009b10:	685b      	ldr	r3, [r3, #4]
 8009b12:	2b00      	cmp	r3, #0
 8009b14:	d029      	beq.n	8009b6a <ETH_Prepare_Tx_Descriptors+0x3ae>
    {
      descidx = firstdescidx;
 8009b16:	6a3b      	ldr	r3, [r7, #32]
 8009b18:	63fb      	str	r3, [r7, #60]	@ 0x3c
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009b1a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b1c:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009b1e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009b22:	633b      	str	r3, [r7, #48]	@ 0x30

      /* clear previous desc own bit */
      for (idx = 0; idx < descnbr; idx ++)
 8009b24:	2300      	movs	r3, #0
 8009b26:	63bb      	str	r3, [r7, #56]	@ 0x38
 8009b28:	e019      	b.n	8009b5e <ETH_Prepare_Tx_Descriptors+0x3a2>
  __ASM volatile ("dmb 0xF":::"memory");
 8009b2a:	f3bf 8f5f 	dmb	sy
}
 8009b2e:	bf00      	nop
      {
        /* Ensure rest of descriptor is written to RAM before the OWN bit */
        __DMB();

        CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009b30:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b32:	68db      	ldr	r3, [r3, #12]
 8009b34:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009b38:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b3a:	60da      	str	r2, [r3, #12]

        /* Increment current tx descriptor index */
        INCR_TX_DESC_INDEX(descidx, 1U);
 8009b3c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009b3e:	3301      	adds	r3, #1
 8009b40:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009b42:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009b44:	2b03      	cmp	r3, #3
 8009b46:	d902      	bls.n	8009b4e <ETH_Prepare_Tx_Descriptors+0x392>
 8009b48:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009b4a:	3b04      	subs	r3, #4
 8009b4c:	63fb      	str	r3, [r7, #60]	@ 0x3c
        /* Get current descriptor address */
        dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009b4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b50:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009b52:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009b56:	633b      	str	r3, [r7, #48]	@ 0x30
      for (idx = 0; idx < descnbr; idx ++)
 8009b58:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8009b5a:	3301      	adds	r3, #1
 8009b5c:	63bb      	str	r3, [r7, #56]	@ 0x38
 8009b5e:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 8009b60:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009b62:	429a      	cmp	r2, r3
 8009b64:	d3e1      	bcc.n	8009b2a <ETH_Prepare_Tx_Descriptors+0x36e>
      }

      return HAL_ETH_ERROR_BUSY;
 8009b66:	2302      	movs	r3, #2
 8009b68:	e0bb      	b.n	8009ce2 <ETH_Prepare_Tx_Descriptors+0x526>
    }

    descnbr += 1U;
 8009b6a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009b6c:	3301      	adds	r3, #1
 8009b6e:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Get the next Tx buffer in the list */
    txbuffer = txbuffer->next;
 8009b70:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009b72:	689b      	ldr	r3, [r3, #8]
 8009b74:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* Set header or buffer 1 address */
    WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009b76:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009b78:	681b      	ldr	r3, [r3, #0]
 8009b7a:	461a      	mov	r2, r3
 8009b7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b7e:	601a      	str	r2, [r3, #0]
    /* Set header or buffer 1 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8009b80:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b82:	689a      	ldr	r2, [r3, #8]
 8009b84:	4b1f      	ldr	r3, [pc, #124]	@ (8009c04 <ETH_Prepare_Tx_Descriptors+0x448>)
 8009b86:	4013      	ands	r3, r2
 8009b88:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009b8a:	6852      	ldr	r2, [r2, #4]
 8009b8c:	431a      	orrs	r2, r3
 8009b8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b90:	609a      	str	r2, [r3, #8]

    if (txbuffer->next != NULL)
 8009b92:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009b94:	689b      	ldr	r3, [r3, #8]
 8009b96:	2b00      	cmp	r3, #0
 8009b98:	d012      	beq.n	8009bc0 <ETH_Prepare_Tx_Descriptors+0x404>
    {
      /* Get the next Tx buffer in the list */
      txbuffer = txbuffer->next;
 8009b9a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009b9c:	689b      	ldr	r3, [r3, #8]
 8009b9e:	62fb      	str	r3, [r7, #44]	@ 0x2c
      /* Set buffer 2 address */
      WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8009ba0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ba2:	681b      	ldr	r3, [r3, #0]
 8009ba4:	461a      	mov	r2, r3
 8009ba6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ba8:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009baa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bac:	689a      	ldr	r2, [r3, #8]
 8009bae:	4b16      	ldr	r3, [pc, #88]	@ (8009c08 <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009bb0:	4013      	ands	r3, r2
 8009bb2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009bb4:	6852      	ldr	r2, [r2, #4]
 8009bb6:	0412      	lsls	r2, r2, #16
 8009bb8:	431a      	orrs	r2, r3
 8009bba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bbc:	609a      	str	r2, [r3, #8]
 8009bbe:	e008      	b.n	8009bd2 <ETH_Prepare_Tx_Descriptors+0x416>
    }
    else
    {
      WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009bc0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bc2:	2200      	movs	r2, #0
 8009bc4:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009bc6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bc8:	689a      	ldr	r2, [r3, #8]
 8009bca:	4b0f      	ldr	r3, [pc, #60]	@ (8009c08 <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009bcc:	4013      	ands	r3, r2
 8009bce:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8009bd0:	6093      	str	r3, [r2, #8]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009bd2:	68bb      	ldr	r3, [r7, #8]
 8009bd4:	681b      	ldr	r3, [r3, #0]
 8009bd6:	f003 0310 	and.w	r3, r3, #16
 8009bda:	2b00      	cmp	r3, #0
 8009bdc:	d018      	beq.n	8009c10 <ETH_Prepare_Tx_Descriptors+0x454>
    {
      /* Set TCP payload length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 8009bde:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009be0:	68da      	ldr	r2, [r3, #12]
 8009be2:	4b0a      	ldr	r3, [pc, #40]	@ (8009c0c <ETH_Prepare_Tx_Descriptors+0x450>)
 8009be4:	4013      	ands	r3, r2
 8009be6:	68ba      	ldr	r2, [r7, #8]
 8009be8:	69d2      	ldr	r2, [r2, #28]
 8009bea:	431a      	orrs	r2, r3
 8009bec:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bee:	60da      	str	r2, [r3, #12]
      /* Set TCP Segmentation Enabled bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 8009bf0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bf2:	68db      	ldr	r3, [r3, #12]
 8009bf4:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 8009bf8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bfa:	60da      	str	r2, [r3, #12]
 8009bfc:	e020      	b.n	8009c40 <ETH_Prepare_Tx_Descriptors+0x484>
 8009bfe:	bf00      	nop
 8009c00:	ffff8000 	.word	0xffff8000
 8009c04:	ffffc000 	.word	0xffffc000
 8009c08:	c000ffff 	.word	0xc000ffff
 8009c0c:	fffc0000 	.word	0xfffc0000
    }
    else
    {
      /* Set the packet length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 8009c10:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c12:	68da      	ldr	r2, [r3, #12]
 8009c14:	4b36      	ldr	r3, [pc, #216]	@ (8009cf0 <ETH_Prepare_Tx_Descriptors+0x534>)
 8009c16:	4013      	ands	r3, r2
 8009c18:	68ba      	ldr	r2, [r7, #8]
 8009c1a:	6852      	ldr	r2, [r2, #4]
 8009c1c:	431a      	orrs	r2, r3
 8009c1e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c20:	60da      	str	r2, [r3, #12]

      if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 8009c22:	68bb      	ldr	r3, [r7, #8]
 8009c24:	681b      	ldr	r3, [r3, #0]
 8009c26:	f003 0301 	and.w	r3, r3, #1
 8009c2a:	2b00      	cmp	r3, #0
 8009c2c:	d008      	beq.n	8009c40 <ETH_Prepare_Tx_Descriptors+0x484>
      {
        /* Checksum Insertion Control */
        MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 8009c2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c30:	68db      	ldr	r3, [r3, #12]
 8009c32:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8009c36:	68bb      	ldr	r3, [r7, #8]
 8009c38:	695b      	ldr	r3, [r3, #20]
 8009c3a:	431a      	orrs	r2, r3
 8009c3c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c3e:	60da      	str	r2, [r3, #12]
      }
    }

    bd_count += 1U;
 8009c40:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009c42:	3301      	adds	r3, #1
 8009c44:	62bb      	str	r3, [r7, #40]	@ 0x28
  __ASM volatile ("dmb 0xF":::"memory");
 8009c46:	f3bf 8f5f 	dmb	sy
}
 8009c4a:	bf00      	nop

    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set Own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009c4c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c4e:	68db      	ldr	r3, [r3, #12]
 8009c50:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009c54:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c56:	60da      	str	r2, [r3, #12]
    /* Mark it as NORMAL descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009c58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c5a:	68db      	ldr	r3, [r3, #12]
 8009c5c:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009c60:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c62:	60da      	str	r2, [r3, #12]
  while (txbuffer->next != NULL)
 8009c64:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009c66:	689b      	ldr	r3, [r3, #8]
 8009c68:	2b00      	cmp	r3, #0
 8009c6a:	f47f af2b 	bne.w	8009ac4 <ETH_Prepare_Tx_Descriptors+0x308>
  }

  if (ItMode != ((uint32_t)RESET))
 8009c6e:	687b      	ldr	r3, [r7, #4]
 8009c70:	2b00      	cmp	r3, #0
 8009c72:	d006      	beq.n	8009c82 <ETH_Prepare_Tx_Descriptors+0x4c6>
  {
    /* Set Interrupt on completion bit */
    SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009c74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c76:	689b      	ldr	r3, [r3, #8]
 8009c78:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009c7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c7e:	609a      	str	r2, [r3, #8]
 8009c80:	e005      	b.n	8009c8e <ETH_Prepare_Tx_Descriptors+0x4d2>
  }
  else
  {
    /* Clear Interrupt on completion bit */
    CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009c82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c84:	689b      	ldr	r3, [r3, #8]
 8009c86:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009c8a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c8c:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as LAST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009c8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c90:	68db      	ldr	r3, [r3, #12]
 8009c92:	f043 5280 	orr.w	r2, r3, #268435456	@ 0x10000000
 8009c96:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c98:	60da      	str	r2, [r3, #12]
  /* Save the current packet address to expose it to the application */
  dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
 8009c9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009c9c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8009c9e:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8009ca0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ca2:	3304      	adds	r3, #4
 8009ca4:	009b      	lsls	r3, r3, #2
 8009ca6:	440b      	add	r3, r1
 8009ca8:	605a      	str	r2, [r3, #4]

  dmatxdesclist->CurTxDesc = descidx;
 8009caa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009cac:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009cae:	611a      	str	r2, [r3, #16]
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 8009cb0:	f3ef 8310 	mrs	r3, PRIMASK
 8009cb4:	613b      	str	r3, [r7, #16]
  return(result);
 8009cb6:	693b      	ldr	r3, [r7, #16]

  /* Enter critical section */
  primask_bit = __get_PRIMASK();
 8009cb8:	61fb      	str	r3, [r7, #28]
 8009cba:	2301      	movs	r3, #1
 8009cbc:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 8009cbe:	697b      	ldr	r3, [r7, #20]
 8009cc0:	f383 8810 	msr	PRIMASK, r3
}
 8009cc4:	bf00      	nop
  __set_PRIMASK(1);

  dmatxdesclist->BuffersInUse += bd_count + 1U;
 8009cc6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009cc8:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 8009cca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009ccc:	4413      	add	r3, r2
 8009cce:	1c5a      	adds	r2, r3, #1
 8009cd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009cd2:	629a      	str	r2, [r3, #40]	@ 0x28
 8009cd4:	69fb      	ldr	r3, [r7, #28]
 8009cd6:	61bb      	str	r3, [r7, #24]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 8009cd8:	69bb      	ldr	r3, [r7, #24]
 8009cda:	f383 8810 	msr	PRIMASK, r3
}
 8009cde:	bf00      	nop

  /* Exit critical section: restore previous priority mask */
  __set_PRIMASK(primask_bit);

  /* Return function status */
  return HAL_ETH_ERROR_NONE;
 8009ce0:	2300      	movs	r3, #0
}
 8009ce2:	4618      	mov	r0, r3
 8009ce4:	3744      	adds	r7, #68	@ 0x44
 8009ce6:	46bd      	mov	sp, r7
 8009ce8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009cec:	4770      	bx	lr
 8009cee:	bf00      	nop
 8009cf0:	ffff8000 	.word	0xffff8000

08009cf4 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 8009cf4:	b480      	push	{r7}
 8009cf6:	b089      	sub	sp, #36	@ 0x24
 8009cf8:	af00      	add	r7, sp, #0
 8009cfa:	6078      	str	r0, [r7, #4]
 8009cfc:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00U;
 8009cfe:	2300      	movs	r3, #0
 8009d00:	61fb      	str	r3, [r7, #28]
  EXTI_Core_TypeDef *EXTI_CurrentCPU;

#if defined(DUAL_CORE) && defined(CORE_CM4)
  EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
  EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
 8009d02:	4b89      	ldr	r3, [pc, #548]	@ (8009f28 <HAL_GPIO_Init+0x234>)
 8009d04:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 8009d06:	e194      	b.n	800a032 <HAL_GPIO_Init+0x33e>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1UL << position);
 8009d08:	683b      	ldr	r3, [r7, #0]
 8009d0a:	681a      	ldr	r2, [r3, #0]
 8009d0c:	2101      	movs	r1, #1
 8009d0e:	69fb      	ldr	r3, [r7, #28]
 8009d10:	fa01 f303 	lsl.w	r3, r1, r3
 8009d14:	4013      	ands	r3, r2
 8009d16:	613b      	str	r3, [r7, #16]

    if (iocurrent != 0x00U)
 8009d18:	693b      	ldr	r3, [r7, #16]
 8009d1a:	2b00      	cmp	r3, #0
 8009d1c:	f000 8186 	beq.w	800a02c <HAL_GPIO_Init+0x338>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
 8009d20:	683b      	ldr	r3, [r7, #0]
 8009d22:	685b      	ldr	r3, [r3, #4]
 8009d24:	f003 0303 	and.w	r3, r3, #3
 8009d28:	2b01      	cmp	r3, #1
 8009d2a:	d005      	beq.n	8009d38 <HAL_GPIO_Init+0x44>
 8009d2c:	683b      	ldr	r3, [r7, #0]
 8009d2e:	685b      	ldr	r3, [r3, #4]
 8009d30:	f003 0303 	and.w	r3, r3, #3
 8009d34:	2b02      	cmp	r3, #2
 8009d36:	d130      	bne.n	8009d9a <HAL_GPIO_Init+0xa6>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));

        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 8009d38:	687b      	ldr	r3, [r7, #4]
 8009d3a:	689b      	ldr	r3, [r3, #8]
 8009d3c:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
 8009d3e:	69fb      	ldr	r3, [r7, #28]
 8009d40:	005b      	lsls	r3, r3, #1
 8009d42:	2203      	movs	r2, #3
 8009d44:	fa02 f303 	lsl.w	r3, r2, r3
 8009d48:	43db      	mvns	r3, r3
 8009d4a:	69ba      	ldr	r2, [r7, #24]
 8009d4c:	4013      	ands	r3, r2
 8009d4e:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 8009d50:	683b      	ldr	r3, [r7, #0]
 8009d52:	68da      	ldr	r2, [r3, #12]
 8009d54:	69fb      	ldr	r3, [r7, #28]
 8009d56:	005b      	lsls	r3, r3, #1
 8009d58:	fa02 f303 	lsl.w	r3, r2, r3
 8009d5c:	69ba      	ldr	r2, [r7, #24]
 8009d5e:	4313      	orrs	r3, r2
 8009d60:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 8009d62:	687b      	ldr	r3, [r7, #4]
 8009d64:	69ba      	ldr	r2, [r7, #24]
 8009d66:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 8009d68:	687b      	ldr	r3, [r7, #4]
 8009d6a:	685b      	ldr	r3, [r3, #4]
 8009d6c:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT0 << position) ;
 8009d6e:	2201      	movs	r2, #1
 8009d70:	69fb      	ldr	r3, [r7, #28]
 8009d72:	fa02 f303 	lsl.w	r3, r2, r3
 8009d76:	43db      	mvns	r3, r3
 8009d78:	69ba      	ldr	r2, [r7, #24]
 8009d7a:	4013      	ands	r3, r2
 8009d7c:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
 8009d7e:	683b      	ldr	r3, [r7, #0]
 8009d80:	685b      	ldr	r3, [r3, #4]
 8009d82:	091b      	lsrs	r3, r3, #4
 8009d84:	f003 0201 	and.w	r2, r3, #1
 8009d88:	69fb      	ldr	r3, [r7, #28]
 8009d8a:	fa02 f303 	lsl.w	r3, r2, r3
 8009d8e:	69ba      	ldr	r2, [r7, #24]
 8009d90:	4313      	orrs	r3, r2
 8009d92:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 8009d94:	687b      	ldr	r3, [r7, #4]
 8009d96:	69ba      	ldr	r2, [r7, #24]
 8009d98:	605a      	str	r2, [r3, #4]
      }

      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
 8009d9a:	683b      	ldr	r3, [r7, #0]
 8009d9c:	685b      	ldr	r3, [r3, #4]
 8009d9e:	f003 0303 	and.w	r3, r3, #3
 8009da2:	2b03      	cmp	r3, #3
 8009da4:	d017      	beq.n	8009dd6 <HAL_GPIO_Init+0xe2>
      {
       /* Check the Pull parameter */
       assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 8009da6:	687b      	ldr	r3, [r7, #4]
 8009da8:	68db      	ldr	r3, [r3, #12]
 8009daa:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
 8009dac:	69fb      	ldr	r3, [r7, #28]
 8009dae:	005b      	lsls	r3, r3, #1
 8009db0:	2203      	movs	r2, #3
 8009db2:	fa02 f303 	lsl.w	r3, r2, r3
 8009db6:	43db      	mvns	r3, r3
 8009db8:	69ba      	ldr	r2, [r7, #24]
 8009dba:	4013      	ands	r3, r2
 8009dbc:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 8009dbe:	683b      	ldr	r3, [r7, #0]
 8009dc0:	689a      	ldr	r2, [r3, #8]
 8009dc2:	69fb      	ldr	r3, [r7, #28]
 8009dc4:	005b      	lsls	r3, r3, #1
 8009dc6:	fa02 f303 	lsl.w	r3, r2, r3
 8009dca:	69ba      	ldr	r2, [r7, #24]
 8009dcc:	4313      	orrs	r3, r2
 8009dce:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 8009dd0:	687b      	ldr	r3, [r7, #4]
 8009dd2:	69ba      	ldr	r2, [r7, #24]
 8009dd4:	60da      	str	r2, [r3, #12]
      }

      /* In case of Alternate function mode selection */
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
 8009dd6:	683b      	ldr	r3, [r7, #0]
 8009dd8:	685b      	ldr	r3, [r3, #4]
 8009dda:	f003 0303 	and.w	r3, r3, #3
 8009dde:	2b02      	cmp	r3, #2
 8009de0:	d123      	bne.n	8009e2a <HAL_GPIO_Init+0x136>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 8009de2:	69fb      	ldr	r3, [r7, #28]
 8009de4:	08da      	lsrs	r2, r3, #3
 8009de6:	687b      	ldr	r3, [r7, #4]
 8009de8:	3208      	adds	r2, #8
 8009dea:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009dee:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((position & 0x07U) * 4U));
 8009df0:	69fb      	ldr	r3, [r7, #28]
 8009df2:	f003 0307 	and.w	r3, r3, #7
 8009df6:	009b      	lsls	r3, r3, #2
 8009df8:	220f      	movs	r2, #15
 8009dfa:	fa02 f303 	lsl.w	r3, r2, r3
 8009dfe:	43db      	mvns	r3, r3
 8009e00:	69ba      	ldr	r2, [r7, #24]
 8009e02:	4013      	ands	r3, r2
 8009e04:	61bb      	str	r3, [r7, #24]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
 8009e06:	683b      	ldr	r3, [r7, #0]
 8009e08:	691a      	ldr	r2, [r3, #16]
 8009e0a:	69fb      	ldr	r3, [r7, #28]
 8009e0c:	f003 0307 	and.w	r3, r3, #7
 8009e10:	009b      	lsls	r3, r3, #2
 8009e12:	fa02 f303 	lsl.w	r3, r2, r3
 8009e16:	69ba      	ldr	r2, [r7, #24]
 8009e18:	4313      	orrs	r3, r2
 8009e1a:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 8009e1c:	69fb      	ldr	r3, [r7, #28]
 8009e1e:	08da      	lsrs	r2, r3, #3
 8009e20:	687b      	ldr	r3, [r7, #4]
 8009e22:	3208      	adds	r2, #8
 8009e24:	69b9      	ldr	r1, [r7, #24]
 8009e26:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 8009e2a:	687b      	ldr	r3, [r7, #4]
 8009e2c:	681b      	ldr	r3, [r3, #0]
 8009e2e:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
 8009e30:	69fb      	ldr	r3, [r7, #28]
 8009e32:	005b      	lsls	r3, r3, #1
 8009e34:	2203      	movs	r2, #3
 8009e36:	fa02 f303 	lsl.w	r3, r2, r3
 8009e3a:	43db      	mvns	r3, r3
 8009e3c:	69ba      	ldr	r2, [r7, #24]
 8009e3e:	4013      	ands	r3, r2
 8009e40:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 8009e42:	683b      	ldr	r3, [r7, #0]
 8009e44:	685b      	ldr	r3, [r3, #4]
 8009e46:	f003 0203 	and.w	r2, r3, #3
 8009e4a:	69fb      	ldr	r3, [r7, #28]
 8009e4c:	005b      	lsls	r3, r3, #1
 8009e4e:	fa02 f303 	lsl.w	r3, r2, r3
 8009e52:	69ba      	ldr	r2, [r7, #24]
 8009e54:	4313      	orrs	r3, r2
 8009e56:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 8009e58:	687b      	ldr	r3, [r7, #4]
 8009e5a:	69ba      	ldr	r2, [r7, #24]
 8009e5c:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
 8009e5e:	683b      	ldr	r3, [r7, #0]
 8009e60:	685b      	ldr	r3, [r3, #4]
 8009e62:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
 8009e66:	2b00      	cmp	r3, #0
 8009e68:	f000 80e0 	beq.w	800a02c <HAL_GPIO_Init+0x338>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 8009e6c:	4b2f      	ldr	r3, [pc, #188]	@ (8009f2c <HAL_GPIO_Init+0x238>)
 8009e6e:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009e72:	4a2e      	ldr	r2, [pc, #184]	@ (8009f2c <HAL_GPIO_Init+0x238>)
 8009e74:	f043 0302 	orr.w	r3, r3, #2
 8009e78:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8009e7c:	4b2b      	ldr	r3, [pc, #172]	@ (8009f2c <HAL_GPIO_Init+0x238>)
 8009e7e:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8009e82:	f003 0302 	and.w	r3, r3, #2
 8009e86:	60fb      	str	r3, [r7, #12]
 8009e88:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 8009e8a:	4a29      	ldr	r2, [pc, #164]	@ (8009f30 <HAL_GPIO_Init+0x23c>)
 8009e8c:	69fb      	ldr	r3, [r7, #28]
 8009e8e:	089b      	lsrs	r3, r3, #2
 8009e90:	3302      	adds	r3, #2
 8009e92:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8009e96:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FUL << (4U * (position & 0x03U)));
 8009e98:	69fb      	ldr	r3, [r7, #28]
 8009e9a:	f003 0303 	and.w	r3, r3, #3
 8009e9e:	009b      	lsls	r3, r3, #2
 8009ea0:	220f      	movs	r2, #15
 8009ea2:	fa02 f303 	lsl.w	r3, r2, r3
 8009ea6:	43db      	mvns	r3, r3
 8009ea8:	69ba      	ldr	r2, [r7, #24]
 8009eaa:	4013      	ands	r3, r2
 8009eac:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
 8009eae:	687b      	ldr	r3, [r7, #4]
 8009eb0:	4a20      	ldr	r2, [pc, #128]	@ (8009f34 <HAL_GPIO_Init+0x240>)
 8009eb2:	4293      	cmp	r3, r2
 8009eb4:	d052      	beq.n	8009f5c <HAL_GPIO_Init+0x268>
 8009eb6:	687b      	ldr	r3, [r7, #4]
 8009eb8:	4a1f      	ldr	r2, [pc, #124]	@ (8009f38 <HAL_GPIO_Init+0x244>)
 8009eba:	4293      	cmp	r3, r2
 8009ebc:	d031      	beq.n	8009f22 <HAL_GPIO_Init+0x22e>
 8009ebe:	687b      	ldr	r3, [r7, #4]
 8009ec0:	4a1e      	ldr	r2, [pc, #120]	@ (8009f3c <HAL_GPIO_Init+0x248>)
 8009ec2:	4293      	cmp	r3, r2
 8009ec4:	d02b      	beq.n	8009f1e <HAL_GPIO_Init+0x22a>
 8009ec6:	687b      	ldr	r3, [r7, #4]
 8009ec8:	4a1d      	ldr	r2, [pc, #116]	@ (8009f40 <HAL_GPIO_Init+0x24c>)
 8009eca:	4293      	cmp	r3, r2
 8009ecc:	d025      	beq.n	8009f1a <HAL_GPIO_Init+0x226>
 8009ece:	687b      	ldr	r3, [r7, #4]
 8009ed0:	4a1c      	ldr	r2, [pc, #112]	@ (8009f44 <HAL_GPIO_Init+0x250>)
 8009ed2:	4293      	cmp	r3, r2
 8009ed4:	d01f      	beq.n	8009f16 <HAL_GPIO_Init+0x222>
 8009ed6:	687b      	ldr	r3, [r7, #4]
 8009ed8:	4a1b      	ldr	r2, [pc, #108]	@ (8009f48 <HAL_GPIO_Init+0x254>)
 8009eda:	4293      	cmp	r3, r2
 8009edc:	d019      	beq.n	8009f12 <HAL_GPIO_Init+0x21e>
 8009ede:	687b      	ldr	r3, [r7, #4]
 8009ee0:	4a1a      	ldr	r2, [pc, #104]	@ (8009f4c <HAL_GPIO_Init+0x258>)
 8009ee2:	4293      	cmp	r3, r2
 8009ee4:	d013      	beq.n	8009f0e <HAL_GPIO_Init+0x21a>
 8009ee6:	687b      	ldr	r3, [r7, #4]
 8009ee8:	4a19      	ldr	r2, [pc, #100]	@ (8009f50 <HAL_GPIO_Init+0x25c>)
 8009eea:	4293      	cmp	r3, r2
 8009eec:	d00d      	beq.n	8009f0a <HAL_GPIO_Init+0x216>
 8009eee:	687b      	ldr	r3, [r7, #4]
 8009ef0:	4a18      	ldr	r2, [pc, #96]	@ (8009f54 <HAL_GPIO_Init+0x260>)
 8009ef2:	4293      	cmp	r3, r2
 8009ef4:	d007      	beq.n	8009f06 <HAL_GPIO_Init+0x212>
 8009ef6:	687b      	ldr	r3, [r7, #4]
 8009ef8:	4a17      	ldr	r2, [pc, #92]	@ (8009f58 <HAL_GPIO_Init+0x264>)
 8009efa:	4293      	cmp	r3, r2
 8009efc:	d101      	bne.n	8009f02 <HAL_GPIO_Init+0x20e>
 8009efe:	2309      	movs	r3, #9
 8009f00:	e02d      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f02:	230a      	movs	r3, #10
 8009f04:	e02b      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f06:	2308      	movs	r3, #8
 8009f08:	e029      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f0a:	2307      	movs	r3, #7
 8009f0c:	e027      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f0e:	2306      	movs	r3, #6
 8009f10:	e025      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f12:	2305      	movs	r3, #5
 8009f14:	e023      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f16:	2304      	movs	r3, #4
 8009f18:	e021      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f1a:	2303      	movs	r3, #3
 8009f1c:	e01f      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f1e:	2302      	movs	r3, #2
 8009f20:	e01d      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f22:	2301      	movs	r3, #1
 8009f24:	e01b      	b.n	8009f5e <HAL_GPIO_Init+0x26a>
 8009f26:	bf00      	nop
 8009f28:	58000080 	.word	0x58000080
 8009f2c:	58024400 	.word	0x58024400
 8009f30:	58000400 	.word	0x58000400
 8009f34:	58020000 	.word	0x58020000
 8009f38:	58020400 	.word	0x58020400
 8009f3c:	58020800 	.word	0x58020800
 8009f40:	58020c00 	.word	0x58020c00
 8009f44:	58021000 	.word	0x58021000
 8009f48:	58021400 	.word	0x58021400
 8009f4c:	58021800 	.word	0x58021800
 8009f50:	58021c00 	.word	0x58021c00
 8009f54:	58022000 	.word	0x58022000
 8009f58:	58022400 	.word	0x58022400
 8009f5c:	2300      	movs	r3, #0
 8009f5e:	69fa      	ldr	r2, [r7, #28]
 8009f60:	f002 0203 	and.w	r2, r2, #3
 8009f64:	0092      	lsls	r2, r2, #2
 8009f66:	4093      	lsls	r3, r2
 8009f68:	69ba      	ldr	r2, [r7, #24]
 8009f6a:	4313      	orrs	r3, r2
 8009f6c:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 8009f6e:	4938      	ldr	r1, [pc, #224]	@ (800a050 <HAL_GPIO_Init+0x35c>)
 8009f70:	69fb      	ldr	r3, [r7, #28]
 8009f72:	089b      	lsrs	r3, r3, #2
 8009f74:	3302      	adds	r3, #2
 8009f76:	69ba      	ldr	r2, [r7, #24]
 8009f78:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR1;
 8009f7c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009f80:	681b      	ldr	r3, [r3, #0]
 8009f82:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009f84:	693b      	ldr	r3, [r7, #16]
 8009f86:	43db      	mvns	r3, r3
 8009f88:	69ba      	ldr	r2, [r7, #24]
 8009f8a:	4013      	ands	r3, r2
 8009f8c:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
 8009f8e:	683b      	ldr	r3, [r7, #0]
 8009f90:	685b      	ldr	r3, [r3, #4]
 8009f92:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8009f96:	2b00      	cmp	r3, #0
 8009f98:	d003      	beq.n	8009fa2 <HAL_GPIO_Init+0x2ae>
        {
          temp |= iocurrent;
 8009f9a:	69ba      	ldr	r2, [r7, #24]
 8009f9c:	693b      	ldr	r3, [r7, #16]
 8009f9e:	4313      	orrs	r3, r2
 8009fa0:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR1 = temp;
 8009fa2:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009fa6:	69bb      	ldr	r3, [r7, #24]
 8009fa8:	6013      	str	r3, [r2, #0]

        temp = EXTI->FTSR1;
 8009faa:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 8009fae:	685b      	ldr	r3, [r3, #4]
 8009fb0:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009fb2:	693b      	ldr	r3, [r7, #16]
 8009fb4:	43db      	mvns	r3, r3
 8009fb6:	69ba      	ldr	r2, [r7, #24]
 8009fb8:	4013      	ands	r3, r2
 8009fba:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
 8009fbc:	683b      	ldr	r3, [r7, #0]
 8009fbe:	685b      	ldr	r3, [r3, #4]
 8009fc0:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 8009fc4:	2b00      	cmp	r3, #0
 8009fc6:	d003      	beq.n	8009fd0 <HAL_GPIO_Init+0x2dc>
        {
          temp |= iocurrent;
 8009fc8:	69ba      	ldr	r2, [r7, #24]
 8009fca:	693b      	ldr	r3, [r7, #16]
 8009fcc:	4313      	orrs	r3, r2
 8009fce:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR1 = temp;
 8009fd0:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 8009fd4:	69bb      	ldr	r3, [r7, #24]
 8009fd6:	6053      	str	r3, [r2, #4]

        temp = EXTI_CurrentCPU->EMR1;
 8009fd8:	697b      	ldr	r3, [r7, #20]
 8009fda:	685b      	ldr	r3, [r3, #4]
 8009fdc:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 8009fde:	693b      	ldr	r3, [r7, #16]
 8009fe0:	43db      	mvns	r3, r3
 8009fe2:	69ba      	ldr	r2, [r7, #24]
 8009fe4:	4013      	ands	r3, r2
 8009fe6:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
 8009fe8:	683b      	ldr	r3, [r7, #0]
 8009fea:	685b      	ldr	r3, [r3, #4]
 8009fec:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8009ff0:	2b00      	cmp	r3, #0
 8009ff2:	d003      	beq.n	8009ffc <HAL_GPIO_Init+0x308>
        {
          temp |= iocurrent;
 8009ff4:	69ba      	ldr	r2, [r7, #24]
 8009ff6:	693b      	ldr	r3, [r7, #16]
 8009ff8:	4313      	orrs	r3, r2
 8009ffa:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->EMR1 = temp;
 8009ffc:	697b      	ldr	r3, [r7, #20]
 8009ffe:	69ba      	ldr	r2, [r7, #24]
 800a000:	605a      	str	r2, [r3, #4]

        /* Clear EXTI line configuration */
        temp = EXTI_CurrentCPU->IMR1;
 800a002:	697b      	ldr	r3, [r7, #20]
 800a004:	681b      	ldr	r3, [r3, #0]
 800a006:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800a008:	693b      	ldr	r3, [r7, #16]
 800a00a:	43db      	mvns	r3, r3
 800a00c:	69ba      	ldr	r2, [r7, #24]
 800a00e:	4013      	ands	r3, r2
 800a010:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
 800a012:	683b      	ldr	r3, [r7, #0]
 800a014:	685b      	ldr	r3, [r3, #4]
 800a016:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a01a:	2b00      	cmp	r3, #0
 800a01c:	d003      	beq.n	800a026 <HAL_GPIO_Init+0x332>
        {
          temp |= iocurrent;
 800a01e:	69ba      	ldr	r2, [r7, #24]
 800a020:	693b      	ldr	r3, [r7, #16]
 800a022:	4313      	orrs	r3, r2
 800a024:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->IMR1 = temp;
 800a026:	697b      	ldr	r3, [r7, #20]
 800a028:	69ba      	ldr	r2, [r7, #24]
 800a02a:	601a      	str	r2, [r3, #0]
      }
    }

    position++;
 800a02c:	69fb      	ldr	r3, [r7, #28]
 800a02e:	3301      	adds	r3, #1
 800a030:	61fb      	str	r3, [r7, #28]
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 800a032:	683b      	ldr	r3, [r7, #0]
 800a034:	681a      	ldr	r2, [r3, #0]
 800a036:	69fb      	ldr	r3, [r7, #28]
 800a038:	fa22 f303 	lsr.w	r3, r2, r3
 800a03c:	2b00      	cmp	r3, #0
 800a03e:	f47f ae63 	bne.w	8009d08 <HAL_GPIO_Init+0x14>
  }
}
 800a042:	bf00      	nop
 800a044:	bf00      	nop
 800a046:	3724      	adds	r7, #36	@ 0x24
 800a048:	46bd      	mov	sp, r7
 800a04a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a04e:	4770      	bx	lr
 800a050:	58000400 	.word	0x58000400

0800a054 <HAL_GPIO_ReadPin>:
  * @param  GPIO_Pin: specifies the port bit to read.
  *         This parameter can be GPIO_PIN_x where x can be (0..15).
  * @retval The input port pin value.
  */
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
 800a054:	b480      	push	{r7}
 800a056:	b085      	sub	sp, #20
 800a058:	af00      	add	r7, sp, #0
 800a05a:	6078      	str	r0, [r7, #4]
 800a05c:	460b      	mov	r3, r1
 800a05e:	807b      	strh	r3, [r7, #2]
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != 0x00U)
 800a060:	687b      	ldr	r3, [r7, #4]
 800a062:	691a      	ldr	r2, [r3, #16]
 800a064:	887b      	ldrh	r3, [r7, #2]
 800a066:	4013      	ands	r3, r2
 800a068:	2b00      	cmp	r3, #0
 800a06a:	d002      	beq.n	800a072 <HAL_GPIO_ReadPin+0x1e>
  {
    bitstatus = GPIO_PIN_SET;
 800a06c:	2301      	movs	r3, #1
 800a06e:	73fb      	strb	r3, [r7, #15]
 800a070:	e001      	b.n	800a076 <HAL_GPIO_ReadPin+0x22>
  }
  else
  {
    bitstatus = GPIO_PIN_RESET;
 800a072:	2300      	movs	r3, #0
 800a074:	73fb      	strb	r3, [r7, #15]
  }
  return bitstatus;
 800a076:	7bfb      	ldrb	r3, [r7, #15]
}
 800a078:	4618      	mov	r0, r3
 800a07a:	3714      	adds	r7, #20
 800a07c:	46bd      	mov	sp, r7
 800a07e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a082:	4770      	bx	lr

0800a084 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 800a084:	b480      	push	{r7}
 800a086:	b083      	sub	sp, #12
 800a088:	af00      	add	r7, sp, #0
 800a08a:	6078      	str	r0, [r7, #4]
 800a08c:	460b      	mov	r3, r1
 800a08e:	807b      	strh	r3, [r7, #2]
 800a090:	4613      	mov	r3, r2
 800a092:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 800a094:	787b      	ldrb	r3, [r7, #1]
 800a096:	2b00      	cmp	r3, #0
 800a098:	d003      	beq.n	800a0a2 <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 800a09a:	887a      	ldrh	r2, [r7, #2]
 800a09c:	687b      	ldr	r3, [r7, #4]
 800a09e:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
  }
}
 800a0a0:	e003      	b.n	800a0aa <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
 800a0a2:	887b      	ldrh	r3, [r7, #2]
 800a0a4:	041a      	lsls	r2, r3, #16
 800a0a6:	687b      	ldr	r3, [r7, #4]
 800a0a8:	619a      	str	r2, [r3, #24]
}
 800a0aa:	bf00      	nop
 800a0ac:	370c      	adds	r7, #12
 800a0ae:	46bd      	mov	sp, r7
 800a0b0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a0b4:	4770      	bx	lr
	...

0800a0b8 <HAL_PWR_ConfigPVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 or wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD)
{
 800a0b8:	b480      	push	{r7}
 800a0ba:	b083      	sub	sp, #12
 800a0bc:	af00      	add	r7, sp, #0
 800a0be:	6078      	str	r0, [r7, #4]
  /* Check the PVD configuration parameter */
  if (sConfigPVD == NULL)
 800a0c0:	687b      	ldr	r3, [r7, #4]
 800a0c2:	2b00      	cmp	r3, #0
 800a0c4:	d069      	beq.n	800a19a <HAL_PWR_ConfigPVD+0xe2>
  /* Check the parameters */
  assert_param (IS_PWR_PVD_LEVEL (sConfigPVD->PVDLevel));
  assert_param (IS_PWR_PVD_MODE (sConfigPVD->Mode));

  /* Set PLS[7:5] bits according to PVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
 800a0c6:	4b38      	ldr	r3, [pc, #224]	@ (800a1a8 <HAL_PWR_ConfigPVD+0xf0>)
 800a0c8:	681b      	ldr	r3, [r3, #0]
 800a0ca:	f023 02e0 	bic.w	r2, r3, #224	@ 0xe0
 800a0ce:	687b      	ldr	r3, [r7, #4]
 800a0d0:	681b      	ldr	r3, [r3, #0]
 800a0d2:	4935      	ldr	r1, [pc, #212]	@ (800a1a8 <HAL_PWR_ConfigPVD+0xf0>)
 800a0d4:	4313      	orrs	r3, r2
 800a0d6:	600b      	str	r3, [r1, #0]

  /* Clear previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_PVD_EXTI_DISABLE_EVENT ();
 800a0d8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a0dc:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a0e0:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a0e4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a0e8:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_PVD_EXTI_DISABLE_IT ();
 800a0ec:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a0f0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a0f4:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a0f8:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a0fc:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ();
 800a100:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a104:	681b      	ldr	r3, [r3, #0]
 800a106:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a10a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a10e:	6013      	str	r3, [r2, #0]
  __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ();
 800a110:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a114:	685b      	ldr	r3, [r3, #4]
 800a116:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a11a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a11e:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Interrupt mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
 800a120:	687b      	ldr	r3, [r7, #4]
 800a122:	685b      	ldr	r3, [r3, #4]
 800a124:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a128:	2b00      	cmp	r3, #0
 800a12a:	d009      	beq.n	800a140 <HAL_PWR_ConfigPVD+0x88>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_IT ();
 800a12c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a130:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a134:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a138:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a13c:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Event mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
 800a140:	687b      	ldr	r3, [r7, #4]
 800a142:	685b      	ldr	r3, [r3, #4]
 800a144:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a148:	2b00      	cmp	r3, #0
 800a14a:	d009      	beq.n	800a160 <HAL_PWR_ConfigPVD+0xa8>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_EVENT ();
 800a14c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a150:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a154:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a158:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a15c:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
 800a160:	687b      	ldr	r3, [r7, #4]
 800a162:	685b      	ldr	r3, [r3, #4]
 800a164:	f003 0301 	and.w	r3, r3, #1
 800a168:	2b00      	cmp	r3, #0
 800a16a:	d007      	beq.n	800a17c <HAL_PWR_ConfigPVD+0xc4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ();
 800a16c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a170:	681b      	ldr	r3, [r3, #0]
 800a172:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a176:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a17a:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
 800a17c:	687b      	ldr	r3, [r7, #4]
 800a17e:	685b      	ldr	r3, [r3, #4]
 800a180:	f003 0302 	and.w	r3, r3, #2
 800a184:	2b00      	cmp	r3, #0
 800a186:	d009      	beq.n	800a19c <HAL_PWR_ConfigPVD+0xe4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ();
 800a188:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a18c:	685b      	ldr	r3, [r3, #4]
 800a18e:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a192:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a196:	6053      	str	r3, [r2, #4]
 800a198:	e000      	b.n	800a19c <HAL_PWR_ConfigPVD+0xe4>
    return;
 800a19a:	bf00      	nop
  }
}
 800a19c:	370c      	adds	r7, #12
 800a19e:	46bd      	mov	sp, r7
 800a1a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a1a4:	4770      	bx	lr
 800a1a6:	bf00      	nop
 800a1a8:	58024800 	.word	0x58024800

0800a1ac <HAL_PWR_EnablePVD>:
/**
  * @brief Enable the Programmable Voltage Detector (PVD).
  * @retval None.
  */
void HAL_PWR_EnablePVD (void)
{
 800a1ac:	b480      	push	{r7}
 800a1ae:	af00      	add	r7, sp, #0
  /* Enable the power voltage detector */
  SET_BIT (PWR->CR1, PWR_CR1_PVDEN);
 800a1b0:	4b05      	ldr	r3, [pc, #20]	@ (800a1c8 <HAL_PWR_EnablePVD+0x1c>)
 800a1b2:	681b      	ldr	r3, [r3, #0]
 800a1b4:	4a04      	ldr	r2, [pc, #16]	@ (800a1c8 <HAL_PWR_EnablePVD+0x1c>)
 800a1b6:	f043 0310 	orr.w	r3, r3, #16
 800a1ba:	6013      	str	r3, [r2, #0]
}
 800a1bc:	bf00      	nop
 800a1be:	46bd      	mov	sp, r7
 800a1c0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a1c4:	4770      	bx	lr
 800a1c6:	bf00      	nop
 800a1c8:	58024800 	.word	0x58024800

0800a1cc <HAL_PWREx_ConfigSupply>:
  *         PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
  *         regulator.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
 800a1cc:	b580      	push	{r7, lr}
 800a1ce:	b084      	sub	sp, #16
 800a1d0:	af00      	add	r7, sp, #0
 800a1d2:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_SUPPLY (SupplySource));

  /* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
  if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
 800a1d4:	4b19      	ldr	r3, [pc, #100]	@ (800a23c <HAL_PWREx_ConfigSupply+0x70>)
 800a1d6:	68db      	ldr	r3, [r3, #12]
 800a1d8:	f003 0304 	and.w	r3, r3, #4
 800a1dc:	2b04      	cmp	r3, #4
 800a1de:	d00a      	beq.n	800a1f6 <HAL_PWREx_ConfigSupply+0x2a>
#else
  if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
  {
    /* Check supply configuration */
    if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
 800a1e0:	4b16      	ldr	r3, [pc, #88]	@ (800a23c <HAL_PWREx_ConfigSupply+0x70>)
 800a1e2:	68db      	ldr	r3, [r3, #12]
 800a1e4:	f003 0307 	and.w	r3, r3, #7
 800a1e8:	687a      	ldr	r2, [r7, #4]
 800a1ea:	429a      	cmp	r2, r3
 800a1ec:	d001      	beq.n	800a1f2 <HAL_PWREx_ConfigSupply+0x26>
    {
      /* Supply configuration update locked, can't apply a new supply config */
      return HAL_ERROR;
 800a1ee:	2301      	movs	r3, #1
 800a1f0:	e01f      	b.n	800a232 <HAL_PWREx_ConfigSupply+0x66>
    else
    {
      /* Supply configuration update locked, but new supply configuration
         matches with old supply configuration : nothing to do
      */
      return HAL_OK;
 800a1f2:	2300      	movs	r3, #0
 800a1f4:	e01d      	b.n	800a232 <HAL_PWREx_ConfigSupply+0x66>
    }
  }

  /* Set the power supply configuration */
  MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
 800a1f6:	4b11      	ldr	r3, [pc, #68]	@ (800a23c <HAL_PWREx_ConfigSupply+0x70>)
 800a1f8:	68db      	ldr	r3, [r3, #12]
 800a1fa:	f023 0207 	bic.w	r2, r3, #7
 800a1fe:	490f      	ldr	r1, [pc, #60]	@ (800a23c <HAL_PWREx_ConfigSupply+0x70>)
 800a200:	687b      	ldr	r3, [r7, #4]
 800a202:	4313      	orrs	r3, r2
 800a204:	60cb      	str	r3, [r1, #12]

  /* Get tick */
  tickstart = HAL_GetTick ();
 800a206:	f7fb fa45 	bl	8005694 <HAL_GetTick>
 800a20a:	60f8      	str	r0, [r7, #12]

  /* Wait till voltage level flag is set */
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 800a20c:	e009      	b.n	800a222 <HAL_PWREx_ConfigSupply+0x56>
  {
    if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
 800a20e:	f7fb fa41 	bl	8005694 <HAL_GetTick>
 800a212:	4602      	mov	r2, r0
 800a214:	68fb      	ldr	r3, [r7, #12]
 800a216:	1ad3      	subs	r3, r2, r3
 800a218:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 800a21c:	d901      	bls.n	800a222 <HAL_PWREx_ConfigSupply+0x56>
    {
      return HAL_ERROR;
 800a21e:	2301      	movs	r3, #1
 800a220:	e007      	b.n	800a232 <HAL_PWREx_ConfigSupply+0x66>
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 800a222:	4b06      	ldr	r3, [pc, #24]	@ (800a23c <HAL_PWREx_ConfigSupply+0x70>)
 800a224:	685b      	ldr	r3, [r3, #4]
 800a226:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a22a:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800a22e:	d1ee      	bne.n	800a20e <HAL_PWREx_ConfigSupply+0x42>
      }
    }
  }
#endif /* defined (SMPS) */

  return HAL_OK;
 800a230:	2300      	movs	r3, #0
}
 800a232:	4618      	mov	r0, r3
 800a234:	3710      	adds	r7, #16
 800a236:	46bd      	mov	sp, r7
 800a238:	bd80      	pop	{r7, pc}
 800a23a:	bf00      	nop
 800a23c:	58024800 	.word	0x58024800

0800a240 <HAL_PWREx_ConfigAVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 and wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWREx_ConfigAVD (PWREx_AVDTypeDef *sConfigAVD)
{
 800a240:	b480      	push	{r7}
 800a242:	b083      	sub	sp, #12
 800a244:	af00      	add	r7, sp, #0
 800a246:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_AVD_LEVEL (sConfigAVD->AVDLevel));
  assert_param (IS_PWR_AVD_MODE (sConfigAVD->Mode));

  /* Set the ALS[18:17] bits according to AVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
 800a248:	4b37      	ldr	r3, [pc, #220]	@ (800a328 <HAL_PWREx_ConfigAVD+0xe8>)
 800a24a:	681b      	ldr	r3, [r3, #0]
 800a24c:	f423 22c0 	bic.w	r2, r3, #393216	@ 0x60000
 800a250:	687b      	ldr	r3, [r7, #4]
 800a252:	681b      	ldr	r3, [r3, #0]
 800a254:	4934      	ldr	r1, [pc, #208]	@ (800a328 <HAL_PWREx_ConfigAVD+0xe8>)
 800a256:	4313      	orrs	r3, r2
 800a258:	600b      	str	r3, [r1, #0]

  /* Clear any previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_AVD_EXTI_DISABLE_EVENT ();
 800a25a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a25e:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a262:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a266:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a26a:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_AVD_EXTI_DISABLE_IT ();
 800a26e:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a272:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a276:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a27a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a27e:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE ();
 800a282:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a286:	681b      	ldr	r3, [r3, #0]
 800a288:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a28c:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a290:	6013      	str	r3, [r2, #0]
  __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE ();
 800a292:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a296:	685b      	ldr	r3, [r3, #4]
 800a298:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a29c:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a2a0:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Configure the interrupt mode */
  if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
 800a2a2:	687b      	ldr	r3, [r7, #4]
 800a2a4:	685b      	ldr	r3, [r3, #4]
 800a2a6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a2aa:	2b00      	cmp	r3, #0
 800a2ac:	d009      	beq.n	800a2c2 <HAL_PWREx_ConfigAVD+0x82>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_IT ();
 800a2ae:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a2b2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a2b6:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a2ba:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a2be:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Configure the event mode */
  if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
 800a2c2:	687b      	ldr	r3, [r7, #4]
 800a2c4:	685b      	ldr	r3, [r3, #4]
 800a2c6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a2ca:	2b00      	cmp	r3, #0
 800a2cc:	d009      	beq.n	800a2e2 <HAL_PWREx_ConfigAVD+0xa2>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_EVENT ();
 800a2ce:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a2d2:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a2d6:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a2da:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a2de:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
 800a2e2:	687b      	ldr	r3, [r7, #4]
 800a2e4:	685b      	ldr	r3, [r3, #4]
 800a2e6:	f003 0301 	and.w	r3, r3, #1
 800a2ea:	2b00      	cmp	r3, #0
 800a2ec:	d007      	beq.n	800a2fe <HAL_PWREx_ConfigAVD+0xbe>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE ();
 800a2ee:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a2f2:	681b      	ldr	r3, [r3, #0]
 800a2f4:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a2f8:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a2fc:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
 800a2fe:	687b      	ldr	r3, [r7, #4]
 800a300:	685b      	ldr	r3, [r3, #4]
 800a302:	f003 0302 	and.w	r3, r3, #2
 800a306:	2b00      	cmp	r3, #0
 800a308:	d007      	beq.n	800a31a <HAL_PWREx_ConfigAVD+0xda>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE ();
 800a30a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a30e:	685b      	ldr	r3, [r3, #4]
 800a310:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a314:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a318:	6053      	str	r3, [r2, #4]
  }
}
 800a31a:	bf00      	nop
 800a31c:	370c      	adds	r7, #12
 800a31e:	46bd      	mov	sp, r7
 800a320:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a324:	4770      	bx	lr
 800a326:	bf00      	nop
 800a328:	58024800 	.word	0x58024800

0800a32c <HAL_PWREx_EnableAVD>:
/**
  * @brief Enable the Analog Voltage Detector (AVD).
  * @retval None.
  */
void HAL_PWREx_EnableAVD (void)
{
 800a32c:	b480      	push	{r7}
 800a32e:	af00      	add	r7, sp, #0
  /* Enable the Analog Voltage Detector */
  SET_BIT (PWR->CR1, PWR_CR1_AVDEN);
 800a330:	4b05      	ldr	r3, [pc, #20]	@ (800a348 <HAL_PWREx_EnableAVD+0x1c>)
 800a332:	681b      	ldr	r3, [r3, #0]
 800a334:	4a04      	ldr	r2, [pc, #16]	@ (800a348 <HAL_PWREx_EnableAVD+0x1c>)
 800a336:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a33a:	6013      	str	r3, [r2, #0]
}
 800a33c:	bf00      	nop
 800a33e:	46bd      	mov	sp, r7
 800a340:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a344:	4770      	bx	lr
 800a346:	bf00      	nop
 800a348:	58024800 	.word	0x58024800

0800a34c <HAL_RCC_OscConfig>:
  *         supported by this function. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 800a34c:	b580      	push	{r7, lr}
 800a34e:	b08c      	sub	sp, #48	@ 0x30
 800a350:	af00      	add	r7, sp, #0
 800a352:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t temp1_pllckcfg, temp2_pllckcfg;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 800a354:	687b      	ldr	r3, [r7, #4]
 800a356:	2b00      	cmp	r3, #0
 800a358:	d102      	bne.n	800a360 <HAL_RCC_OscConfig+0x14>
  {
    return HAL_ERROR;
 800a35a:	2301      	movs	r3, #1
 800a35c:	f000 bc48 	b.w	800abf0 <HAL_RCC_OscConfig+0x8a4>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800a360:	687b      	ldr	r3, [r7, #4]
 800a362:	681b      	ldr	r3, [r3, #0]
 800a364:	f003 0301 	and.w	r3, r3, #1
 800a368:	2b00      	cmp	r3, #0
 800a36a:	f000 8088 	beq.w	800a47e <HAL_RCC_OscConfig+0x132>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a36e:	4b99      	ldr	r3, [pc, #612]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a370:	691b      	ldr	r3, [r3, #16]
 800a372:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a376:	62fb      	str	r3, [r7, #44]	@ 0x2c
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a378:	4b96      	ldr	r3, [pc, #600]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a37a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a37c:	62bb      	str	r3, [r7, #40]	@ 0x28
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
 800a37e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800a380:	2b10      	cmp	r3, #16
 800a382:	d007      	beq.n	800a394 <HAL_RCC_OscConfig+0x48>
 800a384:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800a386:	2b18      	cmp	r3, #24
 800a388:	d111      	bne.n	800a3ae <HAL_RCC_OscConfig+0x62>
 800a38a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800a38c:	f003 0303 	and.w	r3, r3, #3
 800a390:	2b02      	cmp	r3, #2
 800a392:	d10c      	bne.n	800a3ae <HAL_RCC_OscConfig+0x62>
    {
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800a394:	4b8f      	ldr	r3, [pc, #572]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a396:	681b      	ldr	r3, [r3, #0]
 800a398:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a39c:	2b00      	cmp	r3, #0
 800a39e:	d06d      	beq.n	800a47c <HAL_RCC_OscConfig+0x130>
 800a3a0:	687b      	ldr	r3, [r7, #4]
 800a3a2:	685b      	ldr	r3, [r3, #4]
 800a3a4:	2b00      	cmp	r3, #0
 800a3a6:	d169      	bne.n	800a47c <HAL_RCC_OscConfig+0x130>
      {
        return HAL_ERROR;
 800a3a8:	2301      	movs	r3, #1
 800a3aa:	f000 bc21 	b.w	800abf0 <HAL_RCC_OscConfig+0x8a4>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800a3ae:	687b      	ldr	r3, [r7, #4]
 800a3b0:	685b      	ldr	r3, [r3, #4]
 800a3b2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800a3b6:	d106      	bne.n	800a3c6 <HAL_RCC_OscConfig+0x7a>
 800a3b8:	4b86      	ldr	r3, [pc, #536]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3ba:	681b      	ldr	r3, [r3, #0]
 800a3bc:	4a85      	ldr	r2, [pc, #532]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3be:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a3c2:	6013      	str	r3, [r2, #0]
 800a3c4:	e02e      	b.n	800a424 <HAL_RCC_OscConfig+0xd8>
 800a3c6:	687b      	ldr	r3, [r7, #4]
 800a3c8:	685b      	ldr	r3, [r3, #4]
 800a3ca:	2b00      	cmp	r3, #0
 800a3cc:	d10c      	bne.n	800a3e8 <HAL_RCC_OscConfig+0x9c>
 800a3ce:	4b81      	ldr	r3, [pc, #516]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3d0:	681b      	ldr	r3, [r3, #0]
 800a3d2:	4a80      	ldr	r2, [pc, #512]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3d4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a3d8:	6013      	str	r3, [r2, #0]
 800a3da:	4b7e      	ldr	r3, [pc, #504]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3dc:	681b      	ldr	r3, [r3, #0]
 800a3de:	4a7d      	ldr	r2, [pc, #500]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3e0:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 800a3e4:	6013      	str	r3, [r2, #0]
 800a3e6:	e01d      	b.n	800a424 <HAL_RCC_OscConfig+0xd8>
 800a3e8:	687b      	ldr	r3, [r7, #4]
 800a3ea:	685b      	ldr	r3, [r3, #4]
 800a3ec:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800a3f0:	d10c      	bne.n	800a40c <HAL_RCC_OscConfig+0xc0>
 800a3f2:	4b78      	ldr	r3, [pc, #480]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3f4:	681b      	ldr	r3, [r3, #0]
 800a3f6:	4a77      	ldr	r2, [pc, #476]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a3f8:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800a3fc:	6013      	str	r3, [r2, #0]
 800a3fe:	4b75      	ldr	r3, [pc, #468]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a400:	681b      	ldr	r3, [r3, #0]
 800a402:	4a74      	ldr	r2, [pc, #464]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a404:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a408:	6013      	str	r3, [r2, #0]
 800a40a:	e00b      	b.n	800a424 <HAL_RCC_OscConfig+0xd8>
 800a40c:	4b71      	ldr	r3, [pc, #452]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a40e:	681b      	ldr	r3, [r3, #0]
 800a410:	4a70      	ldr	r2, [pc, #448]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a412:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a416:	6013      	str	r3, [r2, #0]
 800a418:	4b6e      	ldr	r3, [pc, #440]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a41a:	681b      	ldr	r3, [r3, #0]
 800a41c:	4a6d      	ldr	r2, [pc, #436]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a41e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 800a422:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 800a424:	687b      	ldr	r3, [r7, #4]
 800a426:	685b      	ldr	r3, [r3, #4]
 800a428:	2b00      	cmp	r3, #0
 800a42a:	d013      	beq.n	800a454 <HAL_RCC_OscConfig+0x108>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a42c:	f7fb f932 	bl	8005694 <HAL_GetTick>
 800a430:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a432:	e008      	b.n	800a446 <HAL_RCC_OscConfig+0xfa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 800a434:	f7fb f92e 	bl	8005694 <HAL_GetTick>
 800a438:	4602      	mov	r2, r0
 800a43a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a43c:	1ad3      	subs	r3, r2, r3
 800a43e:	2b64      	cmp	r3, #100	@ 0x64
 800a440:	d901      	bls.n	800a446 <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 800a442:	2303      	movs	r3, #3
 800a444:	e3d4      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a446:	4b63      	ldr	r3, [pc, #396]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a448:	681b      	ldr	r3, [r3, #0]
 800a44a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a44e:	2b00      	cmp	r3, #0
 800a450:	d0f0      	beq.n	800a434 <HAL_RCC_OscConfig+0xe8>
 800a452:	e014      	b.n	800a47e <HAL_RCC_OscConfig+0x132>
        }
      }
      else
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a454:	f7fb f91e 	bl	8005694 <HAL_GetTick>
 800a458:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 800a45a:	e008      	b.n	800a46e <HAL_RCC_OscConfig+0x122>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 800a45c:	f7fb f91a 	bl	8005694 <HAL_GetTick>
 800a460:	4602      	mov	r2, r0
 800a462:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a464:	1ad3      	subs	r3, r2, r3
 800a466:	2b64      	cmp	r3, #100	@ 0x64
 800a468:	d901      	bls.n	800a46e <HAL_RCC_OscConfig+0x122>
          {
            return HAL_TIMEOUT;
 800a46a:	2303      	movs	r3, #3
 800a46c:	e3c0      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 800a46e:	4b59      	ldr	r3, [pc, #356]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a470:	681b      	ldr	r3, [r3, #0]
 800a472:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a476:	2b00      	cmp	r3, #0
 800a478:	d1f0      	bne.n	800a45c <HAL_RCC_OscConfig+0x110>
 800a47a:	e000      	b.n	800a47e <HAL_RCC_OscConfig+0x132>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800a47c:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800a47e:	687b      	ldr	r3, [r7, #4]
 800a480:	681b      	ldr	r3, [r3, #0]
 800a482:	f003 0302 	and.w	r3, r3, #2
 800a486:	2b00      	cmp	r3, #0
 800a488:	f000 80ca 	beq.w	800a620 <HAL_RCC_OscConfig+0x2d4>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* When the HSI is used as system clock it will not be disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a48c:	4b51      	ldr	r3, [pc, #324]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a48e:	691b      	ldr	r3, [r3, #16]
 800a490:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a494:	623b      	str	r3, [r7, #32]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a496:	4b4f      	ldr	r3, [pc, #316]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a498:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a49a:	61fb      	str	r3, [r7, #28]
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
 800a49c:	6a3b      	ldr	r3, [r7, #32]
 800a49e:	2b00      	cmp	r3, #0
 800a4a0:	d007      	beq.n	800a4b2 <HAL_RCC_OscConfig+0x166>
 800a4a2:	6a3b      	ldr	r3, [r7, #32]
 800a4a4:	2b18      	cmp	r3, #24
 800a4a6:	d156      	bne.n	800a556 <HAL_RCC_OscConfig+0x20a>
 800a4a8:	69fb      	ldr	r3, [r7, #28]
 800a4aa:	f003 0303 	and.w	r3, r3, #3
 800a4ae:	2b00      	cmp	r3, #0
 800a4b0:	d151      	bne.n	800a556 <HAL_RCC_OscConfig+0x20a>
    {
      /* When HSI is used as system clock it will not be disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a4b2:	4b48      	ldr	r3, [pc, #288]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a4b4:	681b      	ldr	r3, [r3, #0]
 800a4b6:	f003 0304 	and.w	r3, r3, #4
 800a4ba:	2b00      	cmp	r3, #0
 800a4bc:	d005      	beq.n	800a4ca <HAL_RCC_OscConfig+0x17e>
 800a4be:	687b      	ldr	r3, [r7, #4]
 800a4c0:	68db      	ldr	r3, [r3, #12]
 800a4c2:	2b00      	cmp	r3, #0
 800a4c4:	d101      	bne.n	800a4ca <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 800a4c6:	2301      	movs	r3, #1
 800a4c8:	e392      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, only HSI division and calibration are allowed */
      else
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a4ca:	4b42      	ldr	r3, [pc, #264]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a4cc:	681b      	ldr	r3, [r3, #0]
 800a4ce:	f023 0219 	bic.w	r2, r3, #25
 800a4d2:	687b      	ldr	r3, [r7, #4]
 800a4d4:	68db      	ldr	r3, [r3, #12]
 800a4d6:	493f      	ldr	r1, [pc, #252]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a4d8:	4313      	orrs	r3, r2
 800a4da:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a4dc:	f7fb f8da 	bl	8005694 <HAL_GetTick>
 800a4e0:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a4e2:	e008      	b.n	800a4f6 <HAL_RCC_OscConfig+0x1aa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a4e4:	f7fb f8d6 	bl	8005694 <HAL_GetTick>
 800a4e8:	4602      	mov	r2, r0
 800a4ea:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a4ec:	1ad3      	subs	r3, r2, r3
 800a4ee:	2b02      	cmp	r3, #2
 800a4f0:	d901      	bls.n	800a4f6 <HAL_RCC_OscConfig+0x1aa>
          {
            return HAL_TIMEOUT;
 800a4f2:	2303      	movs	r3, #3
 800a4f4:	e37c      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a4f6:	4b37      	ldr	r3, [pc, #220]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a4f8:	681b      	ldr	r3, [r3, #0]
 800a4fa:	f003 0304 	and.w	r3, r3, #4
 800a4fe:	2b00      	cmp	r3, #0
 800a500:	d0f0      	beq.n	800a4e4 <HAL_RCC_OscConfig+0x198>
          }
        }
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a502:	f7fb f8f7 	bl	80056f4 <HAL_GetREVID>
 800a506:	4603      	mov	r3, r0
 800a508:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a50c:	4293      	cmp	r3, r2
 800a50e:	d817      	bhi.n	800a540 <HAL_RCC_OscConfig+0x1f4>
 800a510:	687b      	ldr	r3, [r7, #4]
 800a512:	691b      	ldr	r3, [r3, #16]
 800a514:	2b40      	cmp	r3, #64	@ 0x40
 800a516:	d108      	bne.n	800a52a <HAL_RCC_OscConfig+0x1de>
 800a518:	4b2e      	ldr	r3, [pc, #184]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a51a:	685b      	ldr	r3, [r3, #4]
 800a51c:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a520:	4a2c      	ldr	r2, [pc, #176]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a522:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a526:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a528:	e07a      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a52a:	4b2a      	ldr	r3, [pc, #168]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a52c:	685b      	ldr	r3, [r3, #4]
 800a52e:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a532:	687b      	ldr	r3, [r7, #4]
 800a534:	691b      	ldr	r3, [r3, #16]
 800a536:	031b      	lsls	r3, r3, #12
 800a538:	4926      	ldr	r1, [pc, #152]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a53a:	4313      	orrs	r3, r2
 800a53c:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a53e:	e06f      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a540:	4b24      	ldr	r3, [pc, #144]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a542:	685b      	ldr	r3, [r3, #4]
 800a544:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800a548:	687b      	ldr	r3, [r7, #4]
 800a54a:	691b      	ldr	r3, [r3, #16]
 800a54c:	061b      	lsls	r3, r3, #24
 800a54e:	4921      	ldr	r1, [pc, #132]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a550:	4313      	orrs	r3, r2
 800a552:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a554:	e064      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
    }

    else
    {
      /* Check the HSI State */
      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
 800a556:	687b      	ldr	r3, [r7, #4]
 800a558:	68db      	ldr	r3, [r3, #12]
 800a55a:	2b00      	cmp	r3, #0
 800a55c:	d047      	beq.n	800a5ee <HAL_RCC_OscConfig+0x2a2>
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a55e:	4b1d      	ldr	r3, [pc, #116]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a560:	681b      	ldr	r3, [r3, #0]
 800a562:	f023 0219 	bic.w	r2, r3, #25
 800a566:	687b      	ldr	r3, [r7, #4]
 800a568:	68db      	ldr	r3, [r3, #12]
 800a56a:	491a      	ldr	r1, [pc, #104]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a56c:	4313      	orrs	r3, r2
 800a56e:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a570:	f7fb f890 	bl	8005694 <HAL_GetTick>
 800a574:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a576:	e008      	b.n	800a58a <HAL_RCC_OscConfig+0x23e>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a578:	f7fb f88c 	bl	8005694 <HAL_GetTick>
 800a57c:	4602      	mov	r2, r0
 800a57e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a580:	1ad3      	subs	r3, r2, r3
 800a582:	2b02      	cmp	r3, #2
 800a584:	d901      	bls.n	800a58a <HAL_RCC_OscConfig+0x23e>
          {
            return HAL_TIMEOUT;
 800a586:	2303      	movs	r3, #3
 800a588:	e332      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a58a:	4b12      	ldr	r3, [pc, #72]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a58c:	681b      	ldr	r3, [r3, #0]
 800a58e:	f003 0304 	and.w	r3, r3, #4
 800a592:	2b00      	cmp	r3, #0
 800a594:	d0f0      	beq.n	800a578 <HAL_RCC_OscConfig+0x22c>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a596:	f7fb f8ad 	bl	80056f4 <HAL_GetREVID>
 800a59a:	4603      	mov	r3, r0
 800a59c:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a5a0:	4293      	cmp	r3, r2
 800a5a2:	d819      	bhi.n	800a5d8 <HAL_RCC_OscConfig+0x28c>
 800a5a4:	687b      	ldr	r3, [r7, #4]
 800a5a6:	691b      	ldr	r3, [r3, #16]
 800a5a8:	2b40      	cmp	r3, #64	@ 0x40
 800a5aa:	d108      	bne.n	800a5be <HAL_RCC_OscConfig+0x272>
 800a5ac:	4b09      	ldr	r3, [pc, #36]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a5ae:	685b      	ldr	r3, [r3, #4]
 800a5b0:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a5b4:	4a07      	ldr	r2, [pc, #28]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a5b6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a5ba:	6053      	str	r3, [r2, #4]
 800a5bc:	e030      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
 800a5be:	4b05      	ldr	r3, [pc, #20]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a5c0:	685b      	ldr	r3, [r3, #4]
 800a5c2:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a5c6:	687b      	ldr	r3, [r7, #4]
 800a5c8:	691b      	ldr	r3, [r3, #16]
 800a5ca:	031b      	lsls	r3, r3, #12
 800a5cc:	4901      	ldr	r1, [pc, #4]	@ (800a5d4 <HAL_RCC_OscConfig+0x288>)
 800a5ce:	4313      	orrs	r3, r2
 800a5d0:	604b      	str	r3, [r1, #4]
 800a5d2:	e025      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
 800a5d4:	58024400 	.word	0x58024400
 800a5d8:	4b9a      	ldr	r3, [pc, #616]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a5da:	685b      	ldr	r3, [r3, #4]
 800a5dc:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800a5e0:	687b      	ldr	r3, [r7, #4]
 800a5e2:	691b      	ldr	r3, [r3, #16]
 800a5e4:	061b      	lsls	r3, r3, #24
 800a5e6:	4997      	ldr	r1, [pc, #604]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a5e8:	4313      	orrs	r3, r2
 800a5ea:	604b      	str	r3, [r1, #4]
 800a5ec:	e018      	b.n	800a620 <HAL_RCC_OscConfig+0x2d4>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 800a5ee:	4b95      	ldr	r3, [pc, #596]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a5f0:	681b      	ldr	r3, [r3, #0]
 800a5f2:	4a94      	ldr	r2, [pc, #592]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a5f4:	f023 0301 	bic.w	r3, r3, #1
 800a5f8:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a5fa:	f7fb f84b 	bl	8005694 <HAL_GetTick>
 800a5fe:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800a600:	e008      	b.n	800a614 <HAL_RCC_OscConfig+0x2c8>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a602:	f7fb f847 	bl	8005694 <HAL_GetTick>
 800a606:	4602      	mov	r2, r0
 800a608:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a60a:	1ad3      	subs	r3, r2, r3
 800a60c:	2b02      	cmp	r3, #2
 800a60e:	d901      	bls.n	800a614 <HAL_RCC_OscConfig+0x2c8>
          {
            return HAL_TIMEOUT;
 800a610:	2303      	movs	r3, #3
 800a612:	e2ed      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800a614:	4b8b      	ldr	r3, [pc, #556]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a616:	681b      	ldr	r3, [r3, #0]
 800a618:	f003 0304 	and.w	r3, r3, #4
 800a61c:	2b00      	cmp	r3, #0
 800a61e:	d1f0      	bne.n	800a602 <HAL_RCC_OscConfig+0x2b6>
        }
      }
    }
  }
  /*----------------------------- CSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
 800a620:	687b      	ldr	r3, [r7, #4]
 800a622:	681b      	ldr	r3, [r3, #0]
 800a624:	f003 0310 	and.w	r3, r3, #16
 800a628:	2b00      	cmp	r3, #0
 800a62a:	f000 80a9 	beq.w	800a780 <HAL_RCC_OscConfig+0x434>
    /* Check the parameters */
    assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
    assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));

    /* When the CSI is used as system clock it will not disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a62e:	4b85      	ldr	r3, [pc, #532]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a630:	691b      	ldr	r3, [r3, #16]
 800a632:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a636:	61bb      	str	r3, [r7, #24]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a638:	4b82      	ldr	r3, [pc, #520]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a63a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a63c:	617b      	str	r3, [r7, #20]
    if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
 800a63e:	69bb      	ldr	r3, [r7, #24]
 800a640:	2b08      	cmp	r3, #8
 800a642:	d007      	beq.n	800a654 <HAL_RCC_OscConfig+0x308>
 800a644:	69bb      	ldr	r3, [r7, #24]
 800a646:	2b18      	cmp	r3, #24
 800a648:	d13a      	bne.n	800a6c0 <HAL_RCC_OscConfig+0x374>
 800a64a:	697b      	ldr	r3, [r7, #20]
 800a64c:	f003 0303 	and.w	r3, r3, #3
 800a650:	2b01      	cmp	r3, #1
 800a652:	d135      	bne.n	800a6c0 <HAL_RCC_OscConfig+0x374>
    {
      /* When CSI is used as system clock it will not disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a654:	4b7b      	ldr	r3, [pc, #492]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a656:	681b      	ldr	r3, [r3, #0]
 800a658:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a65c:	2b00      	cmp	r3, #0
 800a65e:	d005      	beq.n	800a66c <HAL_RCC_OscConfig+0x320>
 800a660:	687b      	ldr	r3, [r7, #4]
 800a662:	69db      	ldr	r3, [r3, #28]
 800a664:	2b80      	cmp	r3, #128	@ 0x80
 800a666:	d001      	beq.n	800a66c <HAL_RCC_OscConfig+0x320>
      {
        return HAL_ERROR;
 800a668:	2301      	movs	r3, #1
 800a66a:	e2c1      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a66c:	f7fb f842 	bl	80056f4 <HAL_GetREVID>
 800a670:	4603      	mov	r3, r0
 800a672:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a676:	4293      	cmp	r3, r2
 800a678:	d817      	bhi.n	800a6aa <HAL_RCC_OscConfig+0x35e>
 800a67a:	687b      	ldr	r3, [r7, #4]
 800a67c:	6a1b      	ldr	r3, [r3, #32]
 800a67e:	2b20      	cmp	r3, #32
 800a680:	d108      	bne.n	800a694 <HAL_RCC_OscConfig+0x348>
 800a682:	4b70      	ldr	r3, [pc, #448]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a684:	685b      	ldr	r3, [r3, #4]
 800a686:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800a68a:	4a6e      	ldr	r2, [pc, #440]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a68c:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800a690:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a692:	e075      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a694:	4b6b      	ldr	r3, [pc, #428]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a696:	685b      	ldr	r3, [r3, #4]
 800a698:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800a69c:	687b      	ldr	r3, [r7, #4]
 800a69e:	6a1b      	ldr	r3, [r3, #32]
 800a6a0:	069b      	lsls	r3, r3, #26
 800a6a2:	4968      	ldr	r1, [pc, #416]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6a4:	4313      	orrs	r3, r2
 800a6a6:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a6a8:	e06a      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a6aa:	4b66      	ldr	r3, [pc, #408]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6ac:	68db      	ldr	r3, [r3, #12]
 800a6ae:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800a6b2:	687b      	ldr	r3, [r7, #4]
 800a6b4:	6a1b      	ldr	r3, [r3, #32]
 800a6b6:	061b      	lsls	r3, r3, #24
 800a6b8:	4962      	ldr	r1, [pc, #392]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6ba:	4313      	orrs	r3, r2
 800a6bc:	60cb      	str	r3, [r1, #12]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800a6be:	e05f      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
      }
    }
    else
    {
      /* Check the CSI State */
      if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
 800a6c0:	687b      	ldr	r3, [r7, #4]
 800a6c2:	69db      	ldr	r3, [r3, #28]
 800a6c4:	2b00      	cmp	r3, #0
 800a6c6:	d042      	beq.n	800a74e <HAL_RCC_OscConfig+0x402>
      {
        /* Enable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_ENABLE();
 800a6c8:	4b5e      	ldr	r3, [pc, #376]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6ca:	681b      	ldr	r3, [r3, #0]
 800a6cc:	4a5d      	ldr	r2, [pc, #372]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6ce:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800a6d2:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a6d4:	f7fa ffde 	bl	8005694 <HAL_GetTick>
 800a6d8:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a6da:	e008      	b.n	800a6ee <HAL_RCC_OscConfig+0x3a2>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800a6dc:	f7fa ffda 	bl	8005694 <HAL_GetTick>
 800a6e0:	4602      	mov	r2, r0
 800a6e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a6e4:	1ad3      	subs	r3, r2, r3
 800a6e6:	2b02      	cmp	r3, #2
 800a6e8:	d901      	bls.n	800a6ee <HAL_RCC_OscConfig+0x3a2>
          {
            return HAL_TIMEOUT;
 800a6ea:	2303      	movs	r3, #3
 800a6ec:	e280      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800a6ee:	4b55      	ldr	r3, [pc, #340]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a6f0:	681b      	ldr	r3, [r3, #0]
 800a6f2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a6f6:	2b00      	cmp	r3, #0
 800a6f8:	d0f0      	beq.n	800a6dc <HAL_RCC_OscConfig+0x390>
          }
        }

        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800a6fa:	f7fa fffb 	bl	80056f4 <HAL_GetREVID>
 800a6fe:	4603      	mov	r3, r0
 800a700:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a704:	4293      	cmp	r3, r2
 800a706:	d817      	bhi.n	800a738 <HAL_RCC_OscConfig+0x3ec>
 800a708:	687b      	ldr	r3, [r7, #4]
 800a70a:	6a1b      	ldr	r3, [r3, #32]
 800a70c:	2b20      	cmp	r3, #32
 800a70e:	d108      	bne.n	800a722 <HAL_RCC_OscConfig+0x3d6>
 800a710:	4b4c      	ldr	r3, [pc, #304]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a712:	685b      	ldr	r3, [r3, #4]
 800a714:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800a718:	4a4a      	ldr	r2, [pc, #296]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a71a:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800a71e:	6053      	str	r3, [r2, #4]
 800a720:	e02e      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
 800a722:	4b48      	ldr	r3, [pc, #288]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a724:	685b      	ldr	r3, [r3, #4]
 800a726:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800a72a:	687b      	ldr	r3, [r7, #4]
 800a72c:	6a1b      	ldr	r3, [r3, #32]
 800a72e:	069b      	lsls	r3, r3, #26
 800a730:	4944      	ldr	r1, [pc, #272]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a732:	4313      	orrs	r3, r2
 800a734:	604b      	str	r3, [r1, #4]
 800a736:	e023      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
 800a738:	4b42      	ldr	r3, [pc, #264]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a73a:	68db      	ldr	r3, [r3, #12]
 800a73c:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800a740:	687b      	ldr	r3, [r7, #4]
 800a742:	6a1b      	ldr	r3, [r3, #32]
 800a744:	061b      	lsls	r3, r3, #24
 800a746:	493f      	ldr	r1, [pc, #252]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a748:	4313      	orrs	r3, r2
 800a74a:	60cb      	str	r3, [r1, #12]
 800a74c:	e018      	b.n	800a780 <HAL_RCC_OscConfig+0x434>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_DISABLE();
 800a74e:	4b3d      	ldr	r3, [pc, #244]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a750:	681b      	ldr	r3, [r3, #0]
 800a752:	4a3c      	ldr	r2, [pc, #240]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a754:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800a758:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a75a:	f7fa ff9b 	bl	8005694 <HAL_GetTick>
 800a75e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800a760:	e008      	b.n	800a774 <HAL_RCC_OscConfig+0x428>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800a762:	f7fa ff97 	bl	8005694 <HAL_GetTick>
 800a766:	4602      	mov	r2, r0
 800a768:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a76a:	1ad3      	subs	r3, r2, r3
 800a76c:	2b02      	cmp	r3, #2
 800a76e:	d901      	bls.n	800a774 <HAL_RCC_OscConfig+0x428>
          {
            return HAL_TIMEOUT;
 800a770:	2303      	movs	r3, #3
 800a772:	e23d      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800a774:	4b33      	ldr	r3, [pc, #204]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a776:	681b      	ldr	r3, [r3, #0]
 800a778:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a77c:	2b00      	cmp	r3, #0
 800a77e:	d1f0      	bne.n	800a762 <HAL_RCC_OscConfig+0x416>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 800a780:	687b      	ldr	r3, [r7, #4]
 800a782:	681b      	ldr	r3, [r3, #0]
 800a784:	f003 0308 	and.w	r3, r3, #8
 800a788:	2b00      	cmp	r3, #0
 800a78a:	d036      	beq.n	800a7fa <HAL_RCC_OscConfig+0x4ae>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
 800a78c:	687b      	ldr	r3, [r7, #4]
 800a78e:	695b      	ldr	r3, [r3, #20]
 800a790:	2b00      	cmp	r3, #0
 800a792:	d019      	beq.n	800a7c8 <HAL_RCC_OscConfig+0x47c>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 800a794:	4b2b      	ldr	r3, [pc, #172]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a796:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a798:	4a2a      	ldr	r2, [pc, #168]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a79a:	f043 0301 	orr.w	r3, r3, #1
 800a79e:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a7a0:	f7fa ff78 	bl	8005694 <HAL_GetTick>
 800a7a4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800a7a6:	e008      	b.n	800a7ba <HAL_RCC_OscConfig+0x46e>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800a7a8:	f7fa ff74 	bl	8005694 <HAL_GetTick>
 800a7ac:	4602      	mov	r2, r0
 800a7ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a7b0:	1ad3      	subs	r3, r2, r3
 800a7b2:	2b02      	cmp	r3, #2
 800a7b4:	d901      	bls.n	800a7ba <HAL_RCC_OscConfig+0x46e>
        {
          return HAL_TIMEOUT;
 800a7b6:	2303      	movs	r3, #3
 800a7b8:	e21a      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800a7ba:	4b22      	ldr	r3, [pc, #136]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a7bc:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a7be:	f003 0302 	and.w	r3, r3, #2
 800a7c2:	2b00      	cmp	r3, #0
 800a7c4:	d0f0      	beq.n	800a7a8 <HAL_RCC_OscConfig+0x45c>
 800a7c6:	e018      	b.n	800a7fa <HAL_RCC_OscConfig+0x4ae>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 800a7c8:	4b1e      	ldr	r3, [pc, #120]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a7ca:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a7cc:	4a1d      	ldr	r2, [pc, #116]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a7ce:	f023 0301 	bic.w	r3, r3, #1
 800a7d2:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a7d4:	f7fa ff5e 	bl	8005694 <HAL_GetTick>
 800a7d8:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800a7da:	e008      	b.n	800a7ee <HAL_RCC_OscConfig+0x4a2>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800a7dc:	f7fa ff5a 	bl	8005694 <HAL_GetTick>
 800a7e0:	4602      	mov	r2, r0
 800a7e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a7e4:	1ad3      	subs	r3, r2, r3
 800a7e6:	2b02      	cmp	r3, #2
 800a7e8:	d901      	bls.n	800a7ee <HAL_RCC_OscConfig+0x4a2>
        {
          return HAL_TIMEOUT;
 800a7ea:	2303      	movs	r3, #3
 800a7ec:	e200      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800a7ee:	4b15      	ldr	r3, [pc, #84]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a7f0:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800a7f2:	f003 0302 	and.w	r3, r3, #2
 800a7f6:	2b00      	cmp	r3, #0
 800a7f8:	d1f0      	bne.n	800a7dc <HAL_RCC_OscConfig+0x490>
      }
    }
  }

  /*------------------------------ HSI48 Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 800a7fa:	687b      	ldr	r3, [r7, #4]
 800a7fc:	681b      	ldr	r3, [r3, #0]
 800a7fe:	f003 0320 	and.w	r3, r3, #32
 800a802:	2b00      	cmp	r3, #0
 800a804:	d039      	beq.n	800a87a <HAL_RCC_OscConfig+0x52e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));

    /* Check the HSI48 State */
    if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
 800a806:	687b      	ldr	r3, [r7, #4]
 800a808:	699b      	ldr	r3, [r3, #24]
 800a80a:	2b00      	cmp	r3, #0
 800a80c:	d01c      	beq.n	800a848 <HAL_RCC_OscConfig+0x4fc>
    {
      /* Enable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_ENABLE();
 800a80e:	4b0d      	ldr	r3, [pc, #52]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a810:	681b      	ldr	r3, [r3, #0]
 800a812:	4a0c      	ldr	r2, [pc, #48]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a814:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
 800a818:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800a81a:	f7fa ff3b 	bl	8005694 <HAL_GetTick>
 800a81e:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800a820:	e008      	b.n	800a834 <HAL_RCC_OscConfig+0x4e8>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800a822:	f7fa ff37 	bl	8005694 <HAL_GetTick>
 800a826:	4602      	mov	r2, r0
 800a828:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a82a:	1ad3      	subs	r3, r2, r3
 800a82c:	2b02      	cmp	r3, #2
 800a82e:	d901      	bls.n	800a834 <HAL_RCC_OscConfig+0x4e8>
        {
          return HAL_TIMEOUT;
 800a830:	2303      	movs	r3, #3
 800a832:	e1dd      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800a834:	4b03      	ldr	r3, [pc, #12]	@ (800a844 <HAL_RCC_OscConfig+0x4f8>)
 800a836:	681b      	ldr	r3, [r3, #0]
 800a838:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a83c:	2b00      	cmp	r3, #0
 800a83e:	d0f0      	beq.n	800a822 <HAL_RCC_OscConfig+0x4d6>
 800a840:	e01b      	b.n	800a87a <HAL_RCC_OscConfig+0x52e>
 800a842:	bf00      	nop
 800a844:	58024400 	.word	0x58024400
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_DISABLE();
 800a848:	4b9b      	ldr	r3, [pc, #620]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a84a:	681b      	ldr	r3, [r3, #0]
 800a84c:	4a9a      	ldr	r2, [pc, #616]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a84e:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 800a852:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800a854:	f7fa ff1e 	bl	8005694 <HAL_GetTick>
 800a858:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800a85a:	e008      	b.n	800a86e <HAL_RCC_OscConfig+0x522>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800a85c:	f7fa ff1a 	bl	8005694 <HAL_GetTick>
 800a860:	4602      	mov	r2, r0
 800a862:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a864:	1ad3      	subs	r3, r2, r3
 800a866:	2b02      	cmp	r3, #2
 800a868:	d901      	bls.n	800a86e <HAL_RCC_OscConfig+0x522>
        {
          return HAL_TIMEOUT;
 800a86a:	2303      	movs	r3, #3
 800a86c:	e1c0      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800a86e:	4b92      	ldr	r3, [pc, #584]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a870:	681b      	ldr	r3, [r3, #0]
 800a872:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a876:	2b00      	cmp	r3, #0
 800a878:	d1f0      	bne.n	800a85c <HAL_RCC_OscConfig+0x510>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800a87a:	687b      	ldr	r3, [r7, #4]
 800a87c:	681b      	ldr	r3, [r3, #0]
 800a87e:	f003 0304 	and.w	r3, r3, #4
 800a882:	2b00      	cmp	r3, #0
 800a884:	f000 8081 	beq.w	800a98a <HAL_RCC_OscConfig+0x63e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Enable write access to Backup domain */
    PWR->CR1 |= PWR_CR1_DBP;
 800a888:	4b8c      	ldr	r3, [pc, #560]	@ (800aabc <HAL_RCC_OscConfig+0x770>)
 800a88a:	681b      	ldr	r3, [r3, #0]
 800a88c:	4a8b      	ldr	r2, [pc, #556]	@ (800aabc <HAL_RCC_OscConfig+0x770>)
 800a88e:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800a892:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800a894:	f7fa fefe 	bl	8005694 <HAL_GetTick>
 800a898:	6278      	str	r0, [r7, #36]	@ 0x24

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800a89a:	e008      	b.n	800a8ae <HAL_RCC_OscConfig+0x562>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800a89c:	f7fa fefa 	bl	8005694 <HAL_GetTick>
 800a8a0:	4602      	mov	r2, r0
 800a8a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a8a4:	1ad3      	subs	r3, r2, r3
 800a8a6:	2b64      	cmp	r3, #100	@ 0x64
 800a8a8:	d901      	bls.n	800a8ae <HAL_RCC_OscConfig+0x562>
      {
        return HAL_TIMEOUT;
 800a8aa:	2303      	movs	r3, #3
 800a8ac:	e1a0      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800a8ae:	4b83      	ldr	r3, [pc, #524]	@ (800aabc <HAL_RCC_OscConfig+0x770>)
 800a8b0:	681b      	ldr	r3, [r3, #0]
 800a8b2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800a8b6:	2b00      	cmp	r3, #0
 800a8b8:	d0f0      	beq.n	800a89c <HAL_RCC_OscConfig+0x550>
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800a8ba:	687b      	ldr	r3, [r7, #4]
 800a8bc:	689b      	ldr	r3, [r3, #8]
 800a8be:	2b01      	cmp	r3, #1
 800a8c0:	d106      	bne.n	800a8d0 <HAL_RCC_OscConfig+0x584>
 800a8c2:	4b7d      	ldr	r3, [pc, #500]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8c4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a8c6:	4a7c      	ldr	r2, [pc, #496]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8c8:	f043 0301 	orr.w	r3, r3, #1
 800a8cc:	6713      	str	r3, [r2, #112]	@ 0x70
 800a8ce:	e02d      	b.n	800a92c <HAL_RCC_OscConfig+0x5e0>
 800a8d0:	687b      	ldr	r3, [r7, #4]
 800a8d2:	689b      	ldr	r3, [r3, #8]
 800a8d4:	2b00      	cmp	r3, #0
 800a8d6:	d10c      	bne.n	800a8f2 <HAL_RCC_OscConfig+0x5a6>
 800a8d8:	4b77      	ldr	r3, [pc, #476]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8da:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a8dc:	4a76      	ldr	r2, [pc, #472]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8de:	f023 0301 	bic.w	r3, r3, #1
 800a8e2:	6713      	str	r3, [r2, #112]	@ 0x70
 800a8e4:	4b74      	ldr	r3, [pc, #464]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8e6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a8e8:	4a73      	ldr	r2, [pc, #460]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8ea:	f023 0304 	bic.w	r3, r3, #4
 800a8ee:	6713      	str	r3, [r2, #112]	@ 0x70
 800a8f0:	e01c      	b.n	800a92c <HAL_RCC_OscConfig+0x5e0>
 800a8f2:	687b      	ldr	r3, [r7, #4]
 800a8f4:	689b      	ldr	r3, [r3, #8]
 800a8f6:	2b05      	cmp	r3, #5
 800a8f8:	d10c      	bne.n	800a914 <HAL_RCC_OscConfig+0x5c8>
 800a8fa:	4b6f      	ldr	r3, [pc, #444]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a8fc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a8fe:	4a6e      	ldr	r2, [pc, #440]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a900:	f043 0304 	orr.w	r3, r3, #4
 800a904:	6713      	str	r3, [r2, #112]	@ 0x70
 800a906:	4b6c      	ldr	r3, [pc, #432]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a908:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a90a:	4a6b      	ldr	r2, [pc, #428]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a90c:	f043 0301 	orr.w	r3, r3, #1
 800a910:	6713      	str	r3, [r2, #112]	@ 0x70
 800a912:	e00b      	b.n	800a92c <HAL_RCC_OscConfig+0x5e0>
 800a914:	4b68      	ldr	r3, [pc, #416]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a916:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a918:	4a67      	ldr	r2, [pc, #412]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a91a:	f023 0301 	bic.w	r3, r3, #1
 800a91e:	6713      	str	r3, [r2, #112]	@ 0x70
 800a920:	4b65      	ldr	r3, [pc, #404]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a922:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a924:	4a64      	ldr	r2, [pc, #400]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a926:	f023 0304 	bic.w	r3, r3, #4
 800a92a:	6713      	str	r3, [r2, #112]	@ 0x70
    /* Check the LSE State */
    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 800a92c:	687b      	ldr	r3, [r7, #4]
 800a92e:	689b      	ldr	r3, [r3, #8]
 800a930:	2b00      	cmp	r3, #0
 800a932:	d015      	beq.n	800a960 <HAL_RCC_OscConfig+0x614>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a934:	f7fa feae 	bl	8005694 <HAL_GetTick>
 800a938:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a93a:	e00a      	b.n	800a952 <HAL_RCC_OscConfig+0x606>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a93c:	f7fa feaa 	bl	8005694 <HAL_GetTick>
 800a940:	4602      	mov	r2, r0
 800a942:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a944:	1ad3      	subs	r3, r2, r3
 800a946:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a94a:	4293      	cmp	r3, r2
 800a94c:	d901      	bls.n	800a952 <HAL_RCC_OscConfig+0x606>
        {
          return HAL_TIMEOUT;
 800a94e:	2303      	movs	r3, #3
 800a950:	e14e      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800a952:	4b59      	ldr	r3, [pc, #356]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a954:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a956:	f003 0302 	and.w	r3, r3, #2
 800a95a:	2b00      	cmp	r3, #0
 800a95c:	d0ee      	beq.n	800a93c <HAL_RCC_OscConfig+0x5f0>
 800a95e:	e014      	b.n	800a98a <HAL_RCC_OscConfig+0x63e>
      }
    }
    else
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800a960:	f7fa fe98 	bl	8005694 <HAL_GetTick>
 800a964:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is disabled */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a966:	e00a      	b.n	800a97e <HAL_RCC_OscConfig+0x632>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800a968:	f7fa fe94 	bl	8005694 <HAL_GetTick>
 800a96c:	4602      	mov	r2, r0
 800a96e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a970:	1ad3      	subs	r3, r2, r3
 800a972:	f241 3288 	movw	r2, #5000	@ 0x1388
 800a976:	4293      	cmp	r3, r2
 800a978:	d901      	bls.n	800a97e <HAL_RCC_OscConfig+0x632>
        {
          return HAL_TIMEOUT;
 800a97a:	2303      	movs	r3, #3
 800a97c:	e138      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800a97e:	4b4e      	ldr	r3, [pc, #312]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a980:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800a982:	f003 0302 	and.w	r3, r3, #2
 800a986:	2b00      	cmp	r3, #0
 800a988:	d1ee      	bne.n	800a968 <HAL_RCC_OscConfig+0x61c>
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800a98a:	687b      	ldr	r3, [r7, #4]
 800a98c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a98e:	2b00      	cmp	r3, #0
 800a990:	f000 812d 	beq.w	800abee <HAL_RCC_OscConfig+0x8a2>
  {
    /* Check if the PLL is used as system clock or not */
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
 800a994:	4b48      	ldr	r3, [pc, #288]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a996:	691b      	ldr	r3, [r3, #16]
 800a998:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a99c:	2b18      	cmp	r3, #24
 800a99e:	f000 80bd 	beq.w	800ab1c <HAL_RCC_OscConfig+0x7d0>
    {
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800a9a2:	687b      	ldr	r3, [r7, #4]
 800a9a4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800a9a6:	2b02      	cmp	r3, #2
 800a9a8:	f040 809e 	bne.w	800aae8 <HAL_RCC_OscConfig+0x79c>
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
        assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800a9ac:	4b42      	ldr	r3, [pc, #264]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a9ae:	681b      	ldr	r3, [r3, #0]
 800a9b0:	4a41      	ldr	r2, [pc, #260]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a9b2:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800a9b6:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a9b8:	f7fa fe6c 	bl	8005694 <HAL_GetTick>
 800a9bc:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a9be:	e008      	b.n	800a9d2 <HAL_RCC_OscConfig+0x686>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800a9c0:	f7fa fe68 	bl	8005694 <HAL_GetTick>
 800a9c4:	4602      	mov	r2, r0
 800a9c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a9c8:	1ad3      	subs	r3, r2, r3
 800a9ca:	2b02      	cmp	r3, #2
 800a9cc:	d901      	bls.n	800a9d2 <HAL_RCC_OscConfig+0x686>
          {
            return HAL_TIMEOUT;
 800a9ce:	2303      	movs	r3, #3
 800a9d0:	e10e      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800a9d2:	4b39      	ldr	r3, [pc, #228]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a9d4:	681b      	ldr	r3, [r3, #0]
 800a9d6:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800a9da:	2b00      	cmp	r3, #0
 800a9dc:	d1f0      	bne.n	800a9c0 <HAL_RCC_OscConfig+0x674>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 800a9de:	4b36      	ldr	r3, [pc, #216]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a9e0:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800a9e2:	4b37      	ldr	r3, [pc, #220]	@ (800aac0 <HAL_RCC_OscConfig+0x774>)
 800a9e4:	4013      	ands	r3, r2
 800a9e6:	687a      	ldr	r2, [r7, #4]
 800a9e8:	6a91      	ldr	r1, [r2, #40]	@ 0x28
 800a9ea:	687a      	ldr	r2, [r7, #4]
 800a9ec:	6ad2      	ldr	r2, [r2, #44]	@ 0x2c
 800a9ee:	0112      	lsls	r2, r2, #4
 800a9f0:	430a      	orrs	r2, r1
 800a9f2:	4931      	ldr	r1, [pc, #196]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800a9f4:	4313      	orrs	r3, r2
 800a9f6:	628b      	str	r3, [r1, #40]	@ 0x28
 800a9f8:	687b      	ldr	r3, [r7, #4]
 800a9fa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800a9fc:	3b01      	subs	r3, #1
 800a9fe:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800aa02:	687b      	ldr	r3, [r7, #4]
 800aa04:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800aa06:	3b01      	subs	r3, #1
 800aa08:	025b      	lsls	r3, r3, #9
 800aa0a:	b29b      	uxth	r3, r3
 800aa0c:	431a      	orrs	r2, r3
 800aa0e:	687b      	ldr	r3, [r7, #4]
 800aa10:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800aa12:	3b01      	subs	r3, #1
 800aa14:	041b      	lsls	r3, r3, #16
 800aa16:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800aa1a:	431a      	orrs	r2, r3
 800aa1c:	687b      	ldr	r3, [r7, #4]
 800aa1e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800aa20:	3b01      	subs	r3, #1
 800aa22:	061b      	lsls	r3, r3, #24
 800aa24:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800aa28:	4923      	ldr	r1, [pc, #140]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa2a:	4313      	orrs	r3, r2
 800aa2c:	630b      	str	r3, [r1, #48]	@ 0x30
                             RCC_OscInitStruct->PLL.PLLP,
                             RCC_OscInitStruct->PLL.PLLQ,
                             RCC_OscInitStruct->PLL.PLLR);

        /* Disable PLLFRACN . */
        __HAL_RCC_PLLFRACN_DISABLE();
 800aa2e:	4b22      	ldr	r3, [pc, #136]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa30:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa32:	4a21      	ldr	r2, [pc, #132]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa34:	f023 0301 	bic.w	r3, r3, #1
 800aa38:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Configure PLL PLL1FRACN */
        __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800aa3a:	4b1f      	ldr	r3, [pc, #124]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa3c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800aa3e:	4b21      	ldr	r3, [pc, #132]	@ (800aac4 <HAL_RCC_OscConfig+0x778>)
 800aa40:	4013      	ands	r3, r2
 800aa42:	687a      	ldr	r2, [r7, #4]
 800aa44:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800aa46:	00d2      	lsls	r2, r2, #3
 800aa48:	491b      	ldr	r1, [pc, #108]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa4a:	4313      	orrs	r3, r2
 800aa4c:	634b      	str	r3, [r1, #52]	@ 0x34

        /* Select PLL1 input reference frequency range: VCI */
        __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
 800aa4e:	4b1a      	ldr	r3, [pc, #104]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa50:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa52:	f023 020c 	bic.w	r2, r3, #12
 800aa56:	687b      	ldr	r3, [r7, #4]
 800aa58:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800aa5a:	4917      	ldr	r1, [pc, #92]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa5c:	4313      	orrs	r3, r2
 800aa5e:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Select PLL1 output frequency range : VCO */
        __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
 800aa60:	4b15      	ldr	r3, [pc, #84]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa62:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa64:	f023 0202 	bic.w	r2, r3, #2
 800aa68:	687b      	ldr	r3, [r7, #4]
 800aa6a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800aa6c:	4912      	ldr	r1, [pc, #72]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa6e:	4313      	orrs	r3, r2
 800aa70:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Enable PLL System Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
 800aa72:	4b11      	ldr	r3, [pc, #68]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa74:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa76:	4a10      	ldr	r2, [pc, #64]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa78:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800aa7c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1Q Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800aa7e:	4b0e      	ldr	r3, [pc, #56]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa80:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa82:	4a0d      	ldr	r2, [pc, #52]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa84:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800aa88:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1R  Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
 800aa8a:	4b0b      	ldr	r3, [pc, #44]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa8c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa8e:	4a0a      	ldr	r2, [pc, #40]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa90:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800aa94:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1FRACN . */
        __HAL_RCC_PLLFRACN_ENABLE();
 800aa96:	4b08      	ldr	r3, [pc, #32]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa98:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aa9a:	4a07      	ldr	r2, [pc, #28]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aa9c:	f043 0301 	orr.w	r3, r3, #1
 800aaa0:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 800aaa2:	4b05      	ldr	r3, [pc, #20]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aaa4:	681b      	ldr	r3, [r3, #0]
 800aaa6:	4a04      	ldr	r2, [pc, #16]	@ (800aab8 <HAL_RCC_OscConfig+0x76c>)
 800aaa8:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800aaac:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aaae:	f7fa fdf1 	bl	8005694 <HAL_GetTick>
 800aab2:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800aab4:	e011      	b.n	800aada <HAL_RCC_OscConfig+0x78e>
 800aab6:	bf00      	nop
 800aab8:	58024400 	.word	0x58024400
 800aabc:	58024800 	.word	0x58024800
 800aac0:	fffffc0c 	.word	0xfffffc0c
 800aac4:	ffff0007 	.word	0xffff0007
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800aac8:	f7fa fde4 	bl	8005694 <HAL_GetTick>
 800aacc:	4602      	mov	r2, r0
 800aace:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800aad0:	1ad3      	subs	r3, r2, r3
 800aad2:	2b02      	cmp	r3, #2
 800aad4:	d901      	bls.n	800aada <HAL_RCC_OscConfig+0x78e>
          {
            return HAL_TIMEOUT;
 800aad6:	2303      	movs	r3, #3
 800aad8:	e08a      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800aada:	4b47      	ldr	r3, [pc, #284]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800aadc:	681b      	ldr	r3, [r3, #0]
 800aade:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800aae2:	2b00      	cmp	r3, #0
 800aae4:	d0f0      	beq.n	800aac8 <HAL_RCC_OscConfig+0x77c>
 800aae6:	e082      	b.n	800abee <HAL_RCC_OscConfig+0x8a2>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800aae8:	4b43      	ldr	r3, [pc, #268]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800aaea:	681b      	ldr	r3, [r3, #0]
 800aaec:	4a42      	ldr	r2, [pc, #264]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800aaee:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800aaf2:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aaf4:	f7fa fdce 	bl	8005694 <HAL_GetTick>
 800aaf8:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800aafa:	e008      	b.n	800ab0e <HAL_RCC_OscConfig+0x7c2>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800aafc:	f7fa fdca 	bl	8005694 <HAL_GetTick>
 800ab00:	4602      	mov	r2, r0
 800ab02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ab04:	1ad3      	subs	r3, r2, r3
 800ab06:	2b02      	cmp	r3, #2
 800ab08:	d901      	bls.n	800ab0e <HAL_RCC_OscConfig+0x7c2>
          {
            return HAL_TIMEOUT;
 800ab0a:	2303      	movs	r3, #3
 800ab0c:	e070      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800ab0e:	4b3a      	ldr	r3, [pc, #232]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800ab10:	681b      	ldr	r3, [r3, #0]
 800ab12:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800ab16:	2b00      	cmp	r3, #0
 800ab18:	d1f0      	bne.n	800aafc <HAL_RCC_OscConfig+0x7b0>
 800ab1a:	e068      	b.n	800abee <HAL_RCC_OscConfig+0x8a2>
      }
    }
    else
    {
      /* Do not return HAL_ERROR if request repeats the current configuration */
      temp1_pllckcfg = RCC->PLLCKSELR;
 800ab1c:	4b36      	ldr	r3, [pc, #216]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800ab1e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ab20:	613b      	str	r3, [r7, #16]
      temp2_pllckcfg = RCC->PLL1DIVR;
 800ab22:	4b35      	ldr	r3, [pc, #212]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800ab24:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ab26:	60fb      	str	r3, [r7, #12]
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800ab28:	687b      	ldr	r3, [r7, #4]
 800ab2a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800ab2c:	2b01      	cmp	r3, #1
 800ab2e:	d031      	beq.n	800ab94 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800ab30:	693b      	ldr	r3, [r7, #16]
 800ab32:	f003 0203 	and.w	r2, r3, #3
 800ab36:	687b      	ldr	r3, [r7, #4]
 800ab38:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800ab3a:	429a      	cmp	r2, r3
 800ab3c:	d12a      	bne.n	800ab94 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800ab3e:	693b      	ldr	r3, [r7, #16]
 800ab40:	091b      	lsrs	r3, r3, #4
 800ab42:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
 800ab46:	687b      	ldr	r3, [r7, #4]
 800ab48:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800ab4a:	429a      	cmp	r2, r3
 800ab4c:	d122      	bne.n	800ab94 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800ab4e:	68fb      	ldr	r3, [r7, #12]
 800ab50:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800ab54:	687b      	ldr	r3, [r7, #4]
 800ab56:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ab58:	3b01      	subs	r3, #1
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800ab5a:	429a      	cmp	r2, r3
 800ab5c:	d11a      	bne.n	800ab94 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800ab5e:	68fb      	ldr	r3, [r7, #12]
 800ab60:	0a5b      	lsrs	r3, r3, #9
 800ab62:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800ab66:	687b      	ldr	r3, [r7, #4]
 800ab68:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800ab6a:	3b01      	subs	r3, #1
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800ab6c:	429a      	cmp	r2, r3
 800ab6e:	d111      	bne.n	800ab94 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800ab70:	68fb      	ldr	r3, [r7, #12]
 800ab72:	0c1b      	lsrs	r3, r3, #16
 800ab74:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800ab78:	687b      	ldr	r3, [r7, #4]
 800ab7a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ab7c:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800ab7e:	429a      	cmp	r2, r3
 800ab80:	d108      	bne.n	800ab94 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
 800ab82:	68fb      	ldr	r3, [r7, #12]
 800ab84:	0e1b      	lsrs	r3, r3, #24
 800ab86:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800ab8a:	687b      	ldr	r3, [r7, #4]
 800ab8c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800ab8e:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800ab90:	429a      	cmp	r2, r3
 800ab92:	d001      	beq.n	800ab98 <HAL_RCC_OscConfig+0x84c>
      {
        return HAL_ERROR;
 800ab94:	2301      	movs	r3, #1
 800ab96:	e02b      	b.n	800abf0 <HAL_RCC_OscConfig+0x8a4>
      }
      else
      {
        /* Check if only fractional part needs to be updated  */
        temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
 800ab98:	4b17      	ldr	r3, [pc, #92]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800ab9a:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800ab9c:	08db      	lsrs	r3, r3, #3
 800ab9e:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800aba2:	613b      	str	r3, [r7, #16]
        if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
 800aba4:	687b      	ldr	r3, [r7, #4]
 800aba6:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800aba8:	693a      	ldr	r2, [r7, #16]
 800abaa:	429a      	cmp	r2, r3
 800abac:	d01f      	beq.n	800abee <HAL_RCC_OscConfig+0x8a2>
        {
          assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
          /* Disable PLL1FRACEN */
          __HAL_RCC_PLLFRACN_DISABLE();
 800abae:	4b12      	ldr	r3, [pc, #72]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abb0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800abb2:	4a11      	ldr	r2, [pc, #68]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abb4:	f023 0301 	bic.w	r3, r3, #1
 800abb8:	62d3      	str	r3, [r2, #44]	@ 0x2c
          /* Get Start Tick*/
          tickstart = HAL_GetTick();
 800abba:	f7fa fd6b 	bl	8005694 <HAL_GetTick>
 800abbe:	6278      	str	r0, [r7, #36]	@ 0x24
          /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
          while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
 800abc0:	bf00      	nop
 800abc2:	f7fa fd67 	bl	8005694 <HAL_GetTick>
 800abc6:	4602      	mov	r2, r0
 800abc8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800abca:	4293      	cmp	r3, r2
 800abcc:	d0f9      	beq.n	800abc2 <HAL_RCC_OscConfig+0x876>
          {
          }
          /* Configure PLL1 PLL1FRACN */
          __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800abce:	4b0a      	ldr	r3, [pc, #40]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abd0:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800abd2:	4b0a      	ldr	r3, [pc, #40]	@ (800abfc <HAL_RCC_OscConfig+0x8b0>)
 800abd4:	4013      	ands	r3, r2
 800abd6:	687a      	ldr	r2, [r7, #4]
 800abd8:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800abda:	00d2      	lsls	r2, r2, #3
 800abdc:	4906      	ldr	r1, [pc, #24]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abde:	4313      	orrs	r3, r2
 800abe0:	634b      	str	r3, [r1, #52]	@ 0x34
          /* Enable PLL1FRACEN to latch new value. */
          __HAL_RCC_PLLFRACN_ENABLE();
 800abe2:	4b05      	ldr	r3, [pc, #20]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abe4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800abe6:	4a04      	ldr	r2, [pc, #16]	@ (800abf8 <HAL_RCC_OscConfig+0x8ac>)
 800abe8:	f043 0301 	orr.w	r3, r3, #1
 800abec:	62d3      	str	r3, [r2, #44]	@ 0x2c
        }
      }
    }
  }
  return HAL_OK;
 800abee:	2300      	movs	r3, #0
}
 800abf0:	4618      	mov	r0, r3
 800abf2:	3730      	adds	r7, #48	@ 0x30
 800abf4:	46bd      	mov	sp, r7
 800abf6:	bd80      	pop	{r7, pc}
 800abf8:	58024400 	.word	0x58024400
 800abfc:	ffff0007 	.word	0xffff0007

0800ac00 <HAL_RCC_ClockConfig>:
  *         D1CPRE[3:0] bits to ensure that  Domain1 core clock not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 800ac00:	b580      	push	{r7, lr}
 800ac02:	b086      	sub	sp, #24
 800ac04:	af00      	add	r7, sp, #0
 800ac06:	6078      	str	r0, [r7, #4]
 800ac08:	6039      	str	r1, [r7, #0]
  HAL_StatusTypeDef halstatus;
  uint32_t tickstart;
  uint32_t common_system_clock;

  /* Check Null pointer */
  if (RCC_ClkInitStruct == NULL)
 800ac0a:	687b      	ldr	r3, [r7, #4]
 800ac0c:	2b00      	cmp	r3, #0
 800ac0e:	d101      	bne.n	800ac14 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 800ac10:	2301      	movs	r3, #1
 800ac12:	e19c      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the CPU frequency */
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 800ac14:	4b8a      	ldr	r3, [pc, #552]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ac16:	681b      	ldr	r3, [r3, #0]
 800ac18:	f003 030f 	and.w	r3, r3, #15
 800ac1c:	683a      	ldr	r2, [r7, #0]
 800ac1e:	429a      	cmp	r2, r3
 800ac20:	d910      	bls.n	800ac44 <HAL_RCC_ClockConfig+0x44>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800ac22:	4b87      	ldr	r3, [pc, #540]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ac24:	681b      	ldr	r3, [r3, #0]
 800ac26:	f023 020f 	bic.w	r2, r3, #15
 800ac2a:	4985      	ldr	r1, [pc, #532]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ac2c:	683b      	ldr	r3, [r7, #0]
 800ac2e:	4313      	orrs	r3, r2
 800ac30:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800ac32:	4b83      	ldr	r3, [pc, #524]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ac34:	681b      	ldr	r3, [r3, #0]
 800ac36:	f003 030f 	and.w	r3, r3, #15
 800ac3a:	683a      	ldr	r2, [r7, #0]
 800ac3c:	429a      	cmp	r2, r3
 800ac3e:	d001      	beq.n	800ac44 <HAL_RCC_ClockConfig+0x44>
    {
      return HAL_ERROR;
 800ac40:	2301      	movs	r3, #1
 800ac42:	e184      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>

  }

  /* Increasing the BUS frequency divider */
  /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800ac44:	687b      	ldr	r3, [r7, #4]
 800ac46:	681b      	ldr	r3, [r3, #0]
 800ac48:	f003 0304 	and.w	r3, r3, #4
 800ac4c:	2b00      	cmp	r3, #0
 800ac4e:	d010      	beq.n	800ac72 <HAL_RCC_ClockConfig+0x72>
  {
#if defined (RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800ac50:	687b      	ldr	r3, [r7, #4]
 800ac52:	691a      	ldr	r2, [r3, #16]
 800ac54:	4b7b      	ldr	r3, [pc, #492]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac56:	699b      	ldr	r3, [r3, #24]
 800ac58:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800ac5c:	429a      	cmp	r2, r3
 800ac5e:	d908      	bls.n	800ac72 <HAL_RCC_ClockConfig+0x72>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800ac60:	4b78      	ldr	r3, [pc, #480]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac62:	699b      	ldr	r3, [r3, #24]
 800ac64:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800ac68:	687b      	ldr	r3, [r7, #4]
 800ac6a:	691b      	ldr	r3, [r3, #16]
 800ac6c:	4975      	ldr	r1, [pc, #468]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac6e:	4313      	orrs	r3, r2
 800ac70:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800ac72:	687b      	ldr	r3, [r7, #4]
 800ac74:	681b      	ldr	r3, [r3, #0]
 800ac76:	f003 0308 	and.w	r3, r3, #8
 800ac7a:	2b00      	cmp	r3, #0
 800ac7c:	d010      	beq.n	800aca0 <HAL_RCC_ClockConfig+0xa0>
  {
#if defined (RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800ac7e:	687b      	ldr	r3, [r7, #4]
 800ac80:	695a      	ldr	r2, [r3, #20]
 800ac82:	4b70      	ldr	r3, [pc, #448]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac84:	69db      	ldr	r3, [r3, #28]
 800ac86:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800ac8a:	429a      	cmp	r2, r3
 800ac8c:	d908      	bls.n	800aca0 <HAL_RCC_ClockConfig+0xa0>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800ac8e:	4b6d      	ldr	r3, [pc, #436]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac90:	69db      	ldr	r3, [r3, #28]
 800ac92:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800ac96:	687b      	ldr	r3, [r7, #4]
 800ac98:	695b      	ldr	r3, [r3, #20]
 800ac9a:	496a      	ldr	r1, [pc, #424]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ac9c:	4313      	orrs	r3, r2
 800ac9e:	61cb      	str	r3, [r1, #28]
      MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
    }
#endif
  }
  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800aca0:	687b      	ldr	r3, [r7, #4]
 800aca2:	681b      	ldr	r3, [r3, #0]
 800aca4:	f003 0310 	and.w	r3, r3, #16
 800aca8:	2b00      	cmp	r3, #0
 800acaa:	d010      	beq.n	800acce <HAL_RCC_ClockConfig+0xce>
  {
#if defined(RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800acac:	687b      	ldr	r3, [r7, #4]
 800acae:	699a      	ldr	r2, [r3, #24]
 800acb0:	4b64      	ldr	r3, [pc, #400]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800acb2:	69db      	ldr	r3, [r3, #28]
 800acb4:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800acb8:	429a      	cmp	r2, r3
 800acba:	d908      	bls.n	800acce <HAL_RCC_ClockConfig+0xce>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800acbc:	4b61      	ldr	r3, [pc, #388]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800acbe:	69db      	ldr	r3, [r3, #28]
 800acc0:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800acc4:	687b      	ldr	r3, [r7, #4]
 800acc6:	699b      	ldr	r3, [r3, #24]
 800acc8:	495e      	ldr	r1, [pc, #376]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800acca:	4313      	orrs	r3, r2
 800accc:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800acce:	687b      	ldr	r3, [r7, #4]
 800acd0:	681b      	ldr	r3, [r3, #0]
 800acd2:	f003 0320 	and.w	r3, r3, #32
 800acd6:	2b00      	cmp	r3, #0
 800acd8:	d010      	beq.n	800acfc <HAL_RCC_ClockConfig+0xfc>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800acda:	687b      	ldr	r3, [r7, #4]
 800acdc:	69da      	ldr	r2, [r3, #28]
 800acde:	4b59      	ldr	r3, [pc, #356]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ace0:	6a1b      	ldr	r3, [r3, #32]
 800ace2:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800ace6:	429a      	cmp	r2, r3
 800ace8:	d908      	bls.n	800acfc <HAL_RCC_ClockConfig+0xfc>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800acea:	4b56      	ldr	r3, [pc, #344]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800acec:	6a1b      	ldr	r3, [r3, #32]
 800acee:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800acf2:	687b      	ldr	r3, [r7, #4]
 800acf4:	69db      	ldr	r3, [r3, #28]
 800acf6:	4953      	ldr	r1, [pc, #332]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800acf8:	4313      	orrs	r3, r2
 800acfa:	620b      	str	r3, [r1, #32]
    }
#endif
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800acfc:	687b      	ldr	r3, [r7, #4]
 800acfe:	681b      	ldr	r3, [r3, #0]
 800ad00:	f003 0302 	and.w	r3, r3, #2
 800ad04:	2b00      	cmp	r3, #0
 800ad06:	d010      	beq.n	800ad2a <HAL_RCC_ClockConfig+0x12a>
  {
#if defined (RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800ad08:	687b      	ldr	r3, [r7, #4]
 800ad0a:	68da      	ldr	r2, [r3, #12]
 800ad0c:	4b4d      	ldr	r3, [pc, #308]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad0e:	699b      	ldr	r3, [r3, #24]
 800ad10:	f003 030f 	and.w	r3, r3, #15
 800ad14:	429a      	cmp	r2, r3
 800ad16:	d908      	bls.n	800ad2a <HAL_RCC_ClockConfig+0x12a>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800ad18:	4b4a      	ldr	r3, [pc, #296]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad1a:	699b      	ldr	r3, [r3, #24]
 800ad1c:	f023 020f 	bic.w	r2, r3, #15
 800ad20:	687b      	ldr	r3, [r7, #4]
 800ad22:	68db      	ldr	r3, [r3, #12]
 800ad24:	4947      	ldr	r1, [pc, #284]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad26:	4313      	orrs	r3, r2
 800ad28:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*------------------------- SYSCLK Configuration -------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 800ad2a:	687b      	ldr	r3, [r7, #4]
 800ad2c:	681b      	ldr	r3, [r3, #0]
 800ad2e:	f003 0301 	and.w	r3, r3, #1
 800ad32:	2b00      	cmp	r3, #0
 800ad34:	d055      	beq.n	800ade2 <HAL_RCC_ClockConfig+0x1e2>
  {
    assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
    MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
 800ad36:	4b43      	ldr	r3, [pc, #268]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad38:	699b      	ldr	r3, [r3, #24]
 800ad3a:	f423 6270 	bic.w	r2, r3, #3840	@ 0xf00
 800ad3e:	687b      	ldr	r3, [r7, #4]
 800ad40:	689b      	ldr	r3, [r3, #8]
 800ad42:	4940      	ldr	r1, [pc, #256]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad44:	4313      	orrs	r3, r2
 800ad46:	618b      	str	r3, [r1, #24]
#else
    MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
    /* HSE is selected as System Clock Source */
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800ad48:	687b      	ldr	r3, [r7, #4]
 800ad4a:	685b      	ldr	r3, [r3, #4]
 800ad4c:	2b02      	cmp	r3, #2
 800ad4e:	d107      	bne.n	800ad60 <HAL_RCC_ClockConfig+0x160>
    {
      /* Check the HSE ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800ad50:	4b3c      	ldr	r3, [pc, #240]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad52:	681b      	ldr	r3, [r3, #0]
 800ad54:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800ad58:	2b00      	cmp	r3, #0
 800ad5a:	d121      	bne.n	800ada0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800ad5c:	2301      	movs	r3, #1
 800ad5e:	e0f6      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* PLL is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800ad60:	687b      	ldr	r3, [r7, #4]
 800ad62:	685b      	ldr	r3, [r3, #4]
 800ad64:	2b03      	cmp	r3, #3
 800ad66:	d107      	bne.n	800ad78 <HAL_RCC_ClockConfig+0x178>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800ad68:	4b36      	ldr	r3, [pc, #216]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad6a:	681b      	ldr	r3, [r3, #0]
 800ad6c:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800ad70:	2b00      	cmp	r3, #0
 800ad72:	d115      	bne.n	800ada0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800ad74:	2301      	movs	r3, #1
 800ad76:	e0ea      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* CSI is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
 800ad78:	687b      	ldr	r3, [r7, #4]
 800ad7a:	685b      	ldr	r3, [r3, #4]
 800ad7c:	2b01      	cmp	r3, #1
 800ad7e:	d107      	bne.n	800ad90 <HAL_RCC_ClockConfig+0x190>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800ad80:	4b30      	ldr	r3, [pc, #192]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad82:	681b      	ldr	r3, [r3, #0]
 800ad84:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ad88:	2b00      	cmp	r3, #0
 800ad8a:	d109      	bne.n	800ada0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800ad8c:	2301      	movs	r3, #1
 800ad8e:	e0de      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800ad90:	4b2c      	ldr	r3, [pc, #176]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ad92:	681b      	ldr	r3, [r3, #0]
 800ad94:	f003 0304 	and.w	r3, r3, #4
 800ad98:	2b00      	cmp	r3, #0
 800ad9a:	d101      	bne.n	800ada0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800ad9c:	2301      	movs	r3, #1
 800ad9e:	e0d6      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 800ada0:	4b28      	ldr	r3, [pc, #160]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ada2:	691b      	ldr	r3, [r3, #16]
 800ada4:	f023 0207 	bic.w	r2, r3, #7
 800ada8:	687b      	ldr	r3, [r7, #4]
 800adaa:	685b      	ldr	r3, [r3, #4]
 800adac:	4925      	ldr	r1, [pc, #148]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800adae:	4313      	orrs	r3, r2
 800adb0:	610b      	str	r3, [r1, #16]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800adb2:	f7fa fc6f 	bl	8005694 <HAL_GetTick>
 800adb6:	6178      	str	r0, [r7, #20]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800adb8:	e00a      	b.n	800add0 <HAL_RCC_ClockConfig+0x1d0>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800adba:	f7fa fc6b 	bl	8005694 <HAL_GetTick>
 800adbe:	4602      	mov	r2, r0
 800adc0:	697b      	ldr	r3, [r7, #20]
 800adc2:	1ad3      	subs	r3, r2, r3
 800adc4:	f241 3288 	movw	r2, #5000	@ 0x1388
 800adc8:	4293      	cmp	r3, r2
 800adca:	d901      	bls.n	800add0 <HAL_RCC_ClockConfig+0x1d0>
      {
        return HAL_TIMEOUT;
 800adcc:	2303      	movs	r3, #3
 800adce:	e0be      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800add0:	4b1c      	ldr	r3, [pc, #112]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800add2:	691b      	ldr	r3, [r3, #16]
 800add4:	f003 0238 	and.w	r2, r3, #56	@ 0x38
 800add8:	687b      	ldr	r3, [r7, #4]
 800adda:	685b      	ldr	r3, [r3, #4]
 800addc:	00db      	lsls	r3, r3, #3
 800adde:	429a      	cmp	r2, r3
 800ade0:	d1eb      	bne.n	800adba <HAL_RCC_ClockConfig+0x1ba>

  }

  /* Decreasing the BUS frequency divider */
  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800ade2:	687b      	ldr	r3, [r7, #4]
 800ade4:	681b      	ldr	r3, [r3, #0]
 800ade6:	f003 0302 	and.w	r3, r3, #2
 800adea:	2b00      	cmp	r3, #0
 800adec:	d010      	beq.n	800ae10 <HAL_RCC_ClockConfig+0x210>
  {
#if defined(RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800adee:	687b      	ldr	r3, [r7, #4]
 800adf0:	68da      	ldr	r2, [r3, #12]
 800adf2:	4b14      	ldr	r3, [pc, #80]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800adf4:	699b      	ldr	r3, [r3, #24]
 800adf6:	f003 030f 	and.w	r3, r3, #15
 800adfa:	429a      	cmp	r2, r3
 800adfc:	d208      	bcs.n	800ae10 <HAL_RCC_ClockConfig+0x210>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800adfe:	4b11      	ldr	r3, [pc, #68]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ae00:	699b      	ldr	r3, [r3, #24]
 800ae02:	f023 020f 	bic.w	r2, r3, #15
 800ae06:	687b      	ldr	r3, [r7, #4]
 800ae08:	68db      	ldr	r3, [r3, #12]
 800ae0a:	490e      	ldr	r1, [pc, #56]	@ (800ae44 <HAL_RCC_ClockConfig+0x244>)
 800ae0c:	4313      	orrs	r3, r2
 800ae0e:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 800ae10:	4b0b      	ldr	r3, [pc, #44]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ae12:	681b      	ldr	r3, [r3, #0]
 800ae14:	f003 030f 	and.w	r3, r3, #15
 800ae18:	683a      	ldr	r2, [r7, #0]
 800ae1a:	429a      	cmp	r2, r3
 800ae1c:	d214      	bcs.n	800ae48 <HAL_RCC_ClockConfig+0x248>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800ae1e:	4b08      	ldr	r3, [pc, #32]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ae20:	681b      	ldr	r3, [r3, #0]
 800ae22:	f023 020f 	bic.w	r2, r3, #15
 800ae26:	4906      	ldr	r1, [pc, #24]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ae28:	683b      	ldr	r3, [r7, #0]
 800ae2a:	4313      	orrs	r3, r2
 800ae2c:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800ae2e:	4b04      	ldr	r3, [pc, #16]	@ (800ae40 <HAL_RCC_ClockConfig+0x240>)
 800ae30:	681b      	ldr	r3, [r3, #0]
 800ae32:	f003 030f 	and.w	r3, r3, #15
 800ae36:	683a      	ldr	r2, [r7, #0]
 800ae38:	429a      	cmp	r2, r3
 800ae3a:	d005      	beq.n	800ae48 <HAL_RCC_ClockConfig+0x248>
    {
      return HAL_ERROR;
 800ae3c:	2301      	movs	r3, #1
 800ae3e:	e086      	b.n	800af4e <HAL_RCC_ClockConfig+0x34e>
 800ae40:	52002000 	.word	0x52002000
 800ae44:	58024400 	.word	0x58024400
    }
  }

  /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800ae48:	687b      	ldr	r3, [r7, #4]
 800ae4a:	681b      	ldr	r3, [r3, #0]
 800ae4c:	f003 0304 	and.w	r3, r3, #4
 800ae50:	2b00      	cmp	r3, #0
 800ae52:	d010      	beq.n	800ae76 <HAL_RCC_ClockConfig+0x276>
  {
#if defined(RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800ae54:	687b      	ldr	r3, [r7, #4]
 800ae56:	691a      	ldr	r2, [r3, #16]
 800ae58:	4b3f      	ldr	r3, [pc, #252]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800ae5a:	699b      	ldr	r3, [r3, #24]
 800ae5c:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800ae60:	429a      	cmp	r2, r3
 800ae62:	d208      	bcs.n	800ae76 <HAL_RCC_ClockConfig+0x276>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800ae64:	4b3c      	ldr	r3, [pc, #240]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800ae66:	699b      	ldr	r3, [r3, #24]
 800ae68:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800ae6c:	687b      	ldr	r3, [r7, #4]
 800ae6e:	691b      	ldr	r3, [r3, #16]
 800ae70:	4939      	ldr	r1, [pc, #228]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800ae72:	4313      	orrs	r3, r2
 800ae74:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800ae76:	687b      	ldr	r3, [r7, #4]
 800ae78:	681b      	ldr	r3, [r3, #0]
 800ae7a:	f003 0308 	and.w	r3, r3, #8
 800ae7e:	2b00      	cmp	r3, #0
 800ae80:	d010      	beq.n	800aea4 <HAL_RCC_ClockConfig+0x2a4>
  {
#if defined(RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800ae82:	687b      	ldr	r3, [r7, #4]
 800ae84:	695a      	ldr	r2, [r3, #20]
 800ae86:	4b34      	ldr	r3, [pc, #208]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800ae88:	69db      	ldr	r3, [r3, #28]
 800ae8a:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800ae8e:	429a      	cmp	r2, r3
 800ae90:	d208      	bcs.n	800aea4 <HAL_RCC_ClockConfig+0x2a4>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800ae92:	4b31      	ldr	r3, [pc, #196]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800ae94:	69db      	ldr	r3, [r3, #28]
 800ae96:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800ae9a:	687b      	ldr	r3, [r7, #4]
 800ae9c:	695b      	ldr	r3, [r3, #20]
 800ae9e:	492e      	ldr	r1, [pc, #184]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aea0:	4313      	orrs	r3, r2
 800aea2:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800aea4:	687b      	ldr	r3, [r7, #4]
 800aea6:	681b      	ldr	r3, [r3, #0]
 800aea8:	f003 0310 	and.w	r3, r3, #16
 800aeac:	2b00      	cmp	r3, #0
 800aeae:	d010      	beq.n	800aed2 <HAL_RCC_ClockConfig+0x2d2>
  {
#if defined (RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800aeb0:	687b      	ldr	r3, [r7, #4]
 800aeb2:	699a      	ldr	r2, [r3, #24]
 800aeb4:	4b28      	ldr	r3, [pc, #160]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aeb6:	69db      	ldr	r3, [r3, #28]
 800aeb8:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800aebc:	429a      	cmp	r2, r3
 800aebe:	d208      	bcs.n	800aed2 <HAL_RCC_ClockConfig+0x2d2>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800aec0:	4b25      	ldr	r3, [pc, #148]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aec2:	69db      	ldr	r3, [r3, #28]
 800aec4:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800aec8:	687b      	ldr	r3, [r7, #4]
 800aeca:	699b      	ldr	r3, [r3, #24]
 800aecc:	4922      	ldr	r1, [pc, #136]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aece:	4313      	orrs	r3, r2
 800aed0:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800aed2:	687b      	ldr	r3, [r7, #4]
 800aed4:	681b      	ldr	r3, [r3, #0]
 800aed6:	f003 0320 	and.w	r3, r3, #32
 800aeda:	2b00      	cmp	r3, #0
 800aedc:	d010      	beq.n	800af00 <HAL_RCC_ClockConfig+0x300>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800aede:	687b      	ldr	r3, [r7, #4]
 800aee0:	69da      	ldr	r2, [r3, #28]
 800aee2:	4b1d      	ldr	r3, [pc, #116]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aee4:	6a1b      	ldr	r3, [r3, #32]
 800aee6:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800aeea:	429a      	cmp	r2, r3
 800aeec:	d208      	bcs.n	800af00 <HAL_RCC_ClockConfig+0x300>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800aeee:	4b1a      	ldr	r3, [pc, #104]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aef0:	6a1b      	ldr	r3, [r3, #32]
 800aef2:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800aef6:	687b      	ldr	r3, [r7, #4]
 800aef8:	69db      	ldr	r3, [r3, #28]
 800aefa:	4917      	ldr	r1, [pc, #92]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800aefc:	4313      	orrs	r3, r2
 800aefe:	620b      	str	r3, [r1, #32]
#endif
  }

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 800af00:	f000 f834 	bl	800af6c <HAL_RCC_GetSysClockFreq>
 800af04:	4602      	mov	r2, r0
 800af06:	4b14      	ldr	r3, [pc, #80]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800af08:	699b      	ldr	r3, [r3, #24]
 800af0a:	0a1b      	lsrs	r3, r3, #8
 800af0c:	f003 030f 	and.w	r3, r3, #15
 800af10:	4912      	ldr	r1, [pc, #72]	@ (800af5c <HAL_RCC_ClockConfig+0x35c>)
 800af12:	5ccb      	ldrb	r3, [r1, r3]
 800af14:	f003 031f 	and.w	r3, r3, #31
 800af18:	fa22 f303 	lsr.w	r3, r2, r3
 800af1c:	613b      	str	r3, [r7, #16]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800af1e:	4b0e      	ldr	r3, [pc, #56]	@ (800af58 <HAL_RCC_ClockConfig+0x358>)
 800af20:	699b      	ldr	r3, [r3, #24]
 800af22:	f003 030f 	and.w	r3, r3, #15
 800af26:	4a0d      	ldr	r2, [pc, #52]	@ (800af5c <HAL_RCC_ClockConfig+0x35c>)
 800af28:	5cd3      	ldrb	r3, [r2, r3]
 800af2a:	f003 031f 	and.w	r3, r3, #31
 800af2e:	693a      	ldr	r2, [r7, #16]
 800af30:	fa22 f303 	lsr.w	r3, r2, r3
 800af34:	4a0a      	ldr	r2, [pc, #40]	@ (800af60 <HAL_RCC_ClockConfig+0x360>)
 800af36:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800af38:	4a0a      	ldr	r2, [pc, #40]	@ (800af64 <HAL_RCC_ClockConfig+0x364>)
 800af3a:	693b      	ldr	r3, [r7, #16]
 800af3c:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Configure the source of time base considering new system clocks settings*/
  halstatus = HAL_InitTick(uwTickPrio);
 800af3e:	4b0a      	ldr	r3, [pc, #40]	@ (800af68 <HAL_RCC_ClockConfig+0x368>)
 800af40:	681b      	ldr	r3, [r3, #0]
 800af42:	4618      	mov	r0, r3
 800af44:	f7f8 ffae 	bl	8003ea4 <HAL_InitTick>
 800af48:	4603      	mov	r3, r0
 800af4a:	73fb      	strb	r3, [r7, #15]

  return halstatus;
 800af4c:	7bfb      	ldrb	r3, [r7, #15]
}
 800af4e:	4618      	mov	r0, r3
 800af50:	3718      	adds	r7, #24
 800af52:	46bd      	mov	sp, r7
 800af54:	bd80      	pop	{r7, pc}
 800af56:	bf00      	nop
 800af58:	58024400 	.word	0x58024400
 800af5c:	0803196c 	.word	0x0803196c
 800af60:	24000010 	.word	0x24000010
 800af64:	2400000c 	.word	0x2400000c
 800af68:	2400002c 	.word	0x2400002c

0800af6c <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 800af6c:	b480      	push	{r7}
 800af6e:	b089      	sub	sp, #36	@ 0x24
 800af70:	af00      	add	r7, sp, #0
  float_t fracn1, pllvco;
  uint32_t sysclockfreq;

  /* Get SYSCLK source -------------------------------------------------------*/

  switch (RCC->CFGR & RCC_CFGR_SWS)
 800af72:	4bb3      	ldr	r3, [pc, #716]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800af74:	691b      	ldr	r3, [r3, #16]
 800af76:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800af7a:	2b18      	cmp	r3, #24
 800af7c:	f200 8155 	bhi.w	800b22a <HAL_RCC_GetSysClockFreq+0x2be>
 800af80:	a201      	add	r2, pc, #4	@ (adr r2, 800af88 <HAL_RCC_GetSysClockFreq+0x1c>)
 800af82:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800af86:	bf00      	nop
 800af88:	0800afed 	.word	0x0800afed
 800af8c:	0800b22b 	.word	0x0800b22b
 800af90:	0800b22b 	.word	0x0800b22b
 800af94:	0800b22b 	.word	0x0800b22b
 800af98:	0800b22b 	.word	0x0800b22b
 800af9c:	0800b22b 	.word	0x0800b22b
 800afa0:	0800b22b 	.word	0x0800b22b
 800afa4:	0800b22b 	.word	0x0800b22b
 800afa8:	0800b013 	.word	0x0800b013
 800afac:	0800b22b 	.word	0x0800b22b
 800afb0:	0800b22b 	.word	0x0800b22b
 800afb4:	0800b22b 	.word	0x0800b22b
 800afb8:	0800b22b 	.word	0x0800b22b
 800afbc:	0800b22b 	.word	0x0800b22b
 800afc0:	0800b22b 	.word	0x0800b22b
 800afc4:	0800b22b 	.word	0x0800b22b
 800afc8:	0800b019 	.word	0x0800b019
 800afcc:	0800b22b 	.word	0x0800b22b
 800afd0:	0800b22b 	.word	0x0800b22b
 800afd4:	0800b22b 	.word	0x0800b22b
 800afd8:	0800b22b 	.word	0x0800b22b
 800afdc:	0800b22b 	.word	0x0800b22b
 800afe0:	0800b22b 	.word	0x0800b22b
 800afe4:	0800b22b 	.word	0x0800b22b
 800afe8:	0800b01f 	.word	0x0800b01f
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */

      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800afec:	4b94      	ldr	r3, [pc, #592]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800afee:	681b      	ldr	r3, [r3, #0]
 800aff0:	f003 0320 	and.w	r3, r3, #32
 800aff4:	2b00      	cmp	r3, #0
 800aff6:	d009      	beq.n	800b00c <HAL_RCC_GetSysClockFreq+0xa0>
      {
        sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800aff8:	4b91      	ldr	r3, [pc, #580]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800affa:	681b      	ldr	r3, [r3, #0]
 800affc:	08db      	lsrs	r3, r3, #3
 800affe:	f003 0303 	and.w	r3, r3, #3
 800b002:	4a90      	ldr	r2, [pc, #576]	@ (800b244 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b004:	fa22 f303 	lsr.w	r3, r2, r3
 800b008:	61bb      	str	r3, [r7, #24]
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }

      break;
 800b00a:	e111      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = (uint32_t) HSI_VALUE;
 800b00c:	4b8d      	ldr	r3, [pc, #564]	@ (800b244 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b00e:	61bb      	str	r3, [r7, #24]
      break;
 800b010:	e10e      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
      sysclockfreq = CSI_VALUE;
 800b012:	4b8d      	ldr	r3, [pc, #564]	@ (800b248 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800b014:	61bb      	str	r3, [r7, #24]
      break;
 800b016:	e10b      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
      sysclockfreq = HSE_VALUE;
 800b018:	4b8c      	ldr	r3, [pc, #560]	@ (800b24c <HAL_RCC_GetSysClockFreq+0x2e0>)
 800b01a:	61bb      	str	r3, [r7, #24]
      break;
 800b01c:	e108      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>
    case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */

      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLR
      */
      pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800b01e:	4b88      	ldr	r3, [pc, #544]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b020:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800b022:	f003 0303 	and.w	r3, r3, #3
 800b026:	617b      	str	r3, [r7, #20]
      pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4)  ;
 800b028:	4b85      	ldr	r3, [pc, #532]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b02a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800b02c:	091b      	lsrs	r3, r3, #4
 800b02e:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800b032:	613b      	str	r3, [r7, #16]
      pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
 800b034:	4b82      	ldr	r3, [pc, #520]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b036:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b038:	f003 0301 	and.w	r3, r3, #1
 800b03c:	60fb      	str	r3, [r7, #12]
      fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
 800b03e:	4b80      	ldr	r3, [pc, #512]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b040:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800b042:	08db      	lsrs	r3, r3, #3
 800b044:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800b048:	68fa      	ldr	r2, [r7, #12]
 800b04a:	fb02 f303 	mul.w	r3, r2, r3
 800b04e:	ee07 3a90 	vmov	s15, r3
 800b052:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b056:	edc7 7a02 	vstr	s15, [r7, #8]

      if (pllm != 0U)
 800b05a:	693b      	ldr	r3, [r7, #16]
 800b05c:	2b00      	cmp	r3, #0
 800b05e:	f000 80e1 	beq.w	800b224 <HAL_RCC_GetSysClockFreq+0x2b8>
 800b062:	697b      	ldr	r3, [r7, #20]
 800b064:	2b02      	cmp	r3, #2
 800b066:	f000 8083 	beq.w	800b170 <HAL_RCC_GetSysClockFreq+0x204>
 800b06a:	697b      	ldr	r3, [r7, #20]
 800b06c:	2b02      	cmp	r3, #2
 800b06e:	f200 80a1 	bhi.w	800b1b4 <HAL_RCC_GetSysClockFreq+0x248>
 800b072:	697b      	ldr	r3, [r7, #20]
 800b074:	2b00      	cmp	r3, #0
 800b076:	d003      	beq.n	800b080 <HAL_RCC_GetSysClockFreq+0x114>
 800b078:	697b      	ldr	r3, [r7, #20]
 800b07a:	2b01      	cmp	r3, #1
 800b07c:	d056      	beq.n	800b12c <HAL_RCC_GetSysClockFreq+0x1c0>
 800b07e:	e099      	b.n	800b1b4 <HAL_RCC_GetSysClockFreq+0x248>
      {
        switch (pllsource)
        {
          case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

            if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800b080:	4b6f      	ldr	r3, [pc, #444]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b082:	681b      	ldr	r3, [r3, #0]
 800b084:	f003 0320 	and.w	r3, r3, #32
 800b088:	2b00      	cmp	r3, #0
 800b08a:	d02d      	beq.n	800b0e8 <HAL_RCC_GetSysClockFreq+0x17c>
            {
              hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800b08c:	4b6c      	ldr	r3, [pc, #432]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b08e:	681b      	ldr	r3, [r3, #0]
 800b090:	08db      	lsrs	r3, r3, #3
 800b092:	f003 0303 	and.w	r3, r3, #3
 800b096:	4a6b      	ldr	r2, [pc, #428]	@ (800b244 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b098:	fa22 f303 	lsr.w	r3, r2, r3
 800b09c:	607b      	str	r3, [r7, #4]
              pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b09e:	687b      	ldr	r3, [r7, #4]
 800b0a0:	ee07 3a90 	vmov	s15, r3
 800b0a4:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b0a8:	693b      	ldr	r3, [r7, #16]
 800b0aa:	ee07 3a90 	vmov	s15, r3
 800b0ae:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b0b2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b0b6:	4b62      	ldr	r3, [pc, #392]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b0b8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b0ba:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b0be:	ee07 3a90 	vmov	s15, r3
 800b0c2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b0c6:	ed97 6a02 	vldr	s12, [r7, #8]
 800b0ca:	eddf 5a61 	vldr	s11, [pc, #388]	@ 800b250 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b0ce:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b0d2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b0d6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b0da:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b0de:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b0e2:	edc7 7a07 	vstr	s15, [r7, #28]
            }
            else
            {
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
            }
            break;
 800b0e6:	e087      	b.n	800b1f8 <HAL_RCC_GetSysClockFreq+0x28c>
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b0e8:	693b      	ldr	r3, [r7, #16]
 800b0ea:	ee07 3a90 	vmov	s15, r3
 800b0ee:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b0f2:	eddf 6a58 	vldr	s13, [pc, #352]	@ 800b254 <HAL_RCC_GetSysClockFreq+0x2e8>
 800b0f6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b0fa:	4b51      	ldr	r3, [pc, #324]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b0fc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b0fe:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b102:	ee07 3a90 	vmov	s15, r3
 800b106:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b10a:	ed97 6a02 	vldr	s12, [r7, #8]
 800b10e:	eddf 5a50 	vldr	s11, [pc, #320]	@ 800b250 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b112:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b116:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b11a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b11e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b122:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b126:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b12a:	e065      	b.n	800b1f8 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b12c:	693b      	ldr	r3, [r7, #16]
 800b12e:	ee07 3a90 	vmov	s15, r3
 800b132:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b136:	eddf 6a48 	vldr	s13, [pc, #288]	@ 800b258 <HAL_RCC_GetSysClockFreq+0x2ec>
 800b13a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b13e:	4b40      	ldr	r3, [pc, #256]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b140:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b142:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b146:	ee07 3a90 	vmov	s15, r3
 800b14a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b14e:	ed97 6a02 	vldr	s12, [r7, #8]
 800b152:	eddf 5a3f 	vldr	s11, [pc, #252]	@ 800b250 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b156:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b15a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b15e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b162:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b166:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b16a:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b16e:	e043      	b.n	800b1f8 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
            pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b170:	693b      	ldr	r3, [r7, #16]
 800b172:	ee07 3a90 	vmov	s15, r3
 800b176:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b17a:	eddf 6a38 	vldr	s13, [pc, #224]	@ 800b25c <HAL_RCC_GetSysClockFreq+0x2f0>
 800b17e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b182:	4b2f      	ldr	r3, [pc, #188]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b184:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b186:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b18a:	ee07 3a90 	vmov	s15, r3
 800b18e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b192:	ed97 6a02 	vldr	s12, [r7, #8]
 800b196:	eddf 5a2e 	vldr	s11, [pc, #184]	@ 800b250 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b19a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b19e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b1a2:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b1a6:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b1aa:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b1ae:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b1b2:	e021      	b.n	800b1f8 <HAL_RCC_GetSysClockFreq+0x28c>

          default:
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b1b4:	693b      	ldr	r3, [r7, #16]
 800b1b6:	ee07 3a90 	vmov	s15, r3
 800b1ba:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b1be:	eddf 6a26 	vldr	s13, [pc, #152]	@ 800b258 <HAL_RCC_GetSysClockFreq+0x2ec>
 800b1c2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b1c6:	4b1e      	ldr	r3, [pc, #120]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b1c8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b1ca:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b1ce:	ee07 3a90 	vmov	s15, r3
 800b1d2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b1d6:	ed97 6a02 	vldr	s12, [r7, #8]
 800b1da:	eddf 5a1d 	vldr	s11, [pc, #116]	@ 800b250 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b1de:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b1e2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b1e6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b1ea:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b1ee:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b1f2:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b1f6:	bf00      	nop
        }
        pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
 800b1f8:	4b11      	ldr	r3, [pc, #68]	@ (800b240 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b1fa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b1fc:	0a5b      	lsrs	r3, r3, #9
 800b1fe:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800b202:	3301      	adds	r3, #1
 800b204:	603b      	str	r3, [r7, #0]
        sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
 800b206:	683b      	ldr	r3, [r7, #0]
 800b208:	ee07 3a90 	vmov	s15, r3
 800b20c:	eeb8 7a67 	vcvt.f32.u32	s14, s15
 800b210:	edd7 6a07 	vldr	s13, [r7, #28]
 800b214:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800b218:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800b21c:	ee17 3a90 	vmov	r3, s15
 800b220:	61bb      	str	r3, [r7, #24]
      }
      else
      {
        sysclockfreq = 0U;
      }
      break;
 800b222:	e005      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = 0U;
 800b224:	2300      	movs	r3, #0
 800b226:	61bb      	str	r3, [r7, #24]
      break;
 800b228:	e002      	b.n	800b230 <HAL_RCC_GetSysClockFreq+0x2c4>

    default:
      sysclockfreq = CSI_VALUE;
 800b22a:	4b07      	ldr	r3, [pc, #28]	@ (800b248 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800b22c:	61bb      	str	r3, [r7, #24]
      break;
 800b22e:	bf00      	nop
  }

  return sysclockfreq;
 800b230:	69bb      	ldr	r3, [r7, #24]
}
 800b232:	4618      	mov	r0, r3
 800b234:	3724      	adds	r7, #36	@ 0x24
 800b236:	46bd      	mov	sp, r7
 800b238:	f85d 7b04 	ldr.w	r7, [sp], #4
 800b23c:	4770      	bx	lr
 800b23e:	bf00      	nop
 800b240:	58024400 	.word	0x58024400
 800b244:	03d09000 	.word	0x03d09000
 800b248:	003d0900 	.word	0x003d0900
 800b24c:	017d7840 	.word	0x017d7840
 800b250:	46000000 	.word	0x46000000
 800b254:	4c742400 	.word	0x4c742400
 800b258:	4a742400 	.word	0x4a742400
 800b25c:	4bbebc20 	.word	0x4bbebc20

0800b260 <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 800b260:	b580      	push	{r7, lr}
 800b262:	b082      	sub	sp, #8
 800b264:	af00      	add	r7, sp, #0
  uint32_t common_system_clock;

#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
 800b266:	f7ff fe81 	bl	800af6c <HAL_RCC_GetSysClockFreq>
 800b26a:	4602      	mov	r2, r0
 800b26c:	4b10      	ldr	r3, [pc, #64]	@ (800b2b0 <HAL_RCC_GetHCLKFreq+0x50>)
 800b26e:	699b      	ldr	r3, [r3, #24]
 800b270:	0a1b      	lsrs	r3, r3, #8
 800b272:	f003 030f 	and.w	r3, r3, #15
 800b276:	490f      	ldr	r1, [pc, #60]	@ (800b2b4 <HAL_RCC_GetHCLKFreq+0x54>)
 800b278:	5ccb      	ldrb	r3, [r1, r3]
 800b27a:	f003 031f 	and.w	r3, r3, #31
 800b27e:	fa22 f303 	lsr.w	r3, r2, r3
 800b282:	607b      	str	r3, [r7, #4]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800b284:	4b0a      	ldr	r3, [pc, #40]	@ (800b2b0 <HAL_RCC_GetHCLKFreq+0x50>)
 800b286:	699b      	ldr	r3, [r3, #24]
 800b288:	f003 030f 	and.w	r3, r3, #15
 800b28c:	4a09      	ldr	r2, [pc, #36]	@ (800b2b4 <HAL_RCC_GetHCLKFreq+0x54>)
 800b28e:	5cd3      	ldrb	r3, [r2, r3]
 800b290:	f003 031f 	and.w	r3, r3, #31
 800b294:	687a      	ldr	r2, [r7, #4]
 800b296:	fa22 f303 	lsr.w	r3, r2, r3
 800b29a:	4a07      	ldr	r2, [pc, #28]	@ (800b2b8 <HAL_RCC_GetHCLKFreq+0x58>)
 800b29c:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800b29e:	4a07      	ldr	r2, [pc, #28]	@ (800b2bc <HAL_RCC_GetHCLKFreq+0x5c>)
 800b2a0:	687b      	ldr	r3, [r7, #4]
 800b2a2:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  return SystemD2Clock;
 800b2a4:	4b04      	ldr	r3, [pc, #16]	@ (800b2b8 <HAL_RCC_GetHCLKFreq+0x58>)
 800b2a6:	681b      	ldr	r3, [r3, #0]
}
 800b2a8:	4618      	mov	r0, r3
 800b2aa:	3708      	adds	r7, #8
 800b2ac:	46bd      	mov	sp, r7
 800b2ae:	bd80      	pop	{r7, pc}
 800b2b0:	58024400 	.word	0x58024400
 800b2b4:	0803196c 	.word	0x0803196c
 800b2b8:	24000010 	.word	0x24000010
 800b2bc:	2400000c 	.word	0x2400000c

0800b2c0 <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 800b2c0:	b580      	push	{r7, lr}
 800b2c2:	af00      	add	r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
 800b2c4:	f7ff ffcc 	bl	800b260 <HAL_RCC_GetHCLKFreq>
 800b2c8:	4602      	mov	r2, r0
 800b2ca:	4b06      	ldr	r3, [pc, #24]	@ (800b2e4 <HAL_RCC_GetPCLK1Freq+0x24>)
 800b2cc:	69db      	ldr	r3, [r3, #28]
 800b2ce:	091b      	lsrs	r3, r3, #4
 800b2d0:	f003 0307 	and.w	r3, r3, #7
 800b2d4:	4904      	ldr	r1, [pc, #16]	@ (800b2e8 <HAL_RCC_GetPCLK1Freq+0x28>)
 800b2d6:	5ccb      	ldrb	r3, [r1, r3]
 800b2d8:	f003 031f 	and.w	r3, r3, #31
 800b2dc:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
 800b2e0:	4618      	mov	r0, r3
 800b2e2:	bd80      	pop	{r7, pc}
 800b2e4:	58024400 	.word	0x58024400
 800b2e8:	0803196c 	.word	0x0803196c

0800b2ec <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 800b2ec:	b580      	push	{r7, lr}
 800b2ee:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
 800b2f0:	f7ff ffb6 	bl	800b260 <HAL_RCC_GetHCLKFreq>
 800b2f4:	4602      	mov	r2, r0
 800b2f6:	4b06      	ldr	r3, [pc, #24]	@ (800b310 <HAL_RCC_GetPCLK2Freq+0x24>)
 800b2f8:	69db      	ldr	r3, [r3, #28]
 800b2fa:	0a1b      	lsrs	r3, r3, #8
 800b2fc:	f003 0307 	and.w	r3, r3, #7
 800b300:	4904      	ldr	r1, [pc, #16]	@ (800b314 <HAL_RCC_GetPCLK2Freq+0x28>)
 800b302:	5ccb      	ldrb	r3, [r1, r3]
 800b304:	f003 031f 	and.w	r3, r3, #31
 800b308:	fa22 f303 	lsr.w	r3, r2, r3
#else
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
 800b30c:	4618      	mov	r0, r3
 800b30e:	bd80      	pop	{r7, pc}
 800b310:	58024400 	.word	0x58024400
 800b314:	0803196c 	.word	0x0803196c

0800b318 <HAL_RCC_GetClockConfig>:
  * will be configured.
  * @param  pFLatency: Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 800b318:	b480      	push	{r7}
 800b31a:	b083      	sub	sp, #12
 800b31c:	af00      	add	r7, sp, #0
 800b31e:	6078      	str	r0, [r7, #4]
 800b320:	6039      	str	r1, [r7, #0]
  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
 800b322:	687b      	ldr	r3, [r7, #4]
 800b324:	223f      	movs	r2, #63	@ 0x3f
 800b326:	601a      	str	r2, [r3, #0]
                                 RCC_CLOCKTYPE_PCLK2 |  RCC_CLOCKTYPE_D3PCLK1  ;

  /* Get the SYSCLK configuration --------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 800b328:	4b1a      	ldr	r3, [pc, #104]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b32a:	691b      	ldr	r3, [r3, #16]
 800b32c:	f003 0207 	and.w	r2, r3, #7
 800b330:	687b      	ldr	r3, [r7, #4]
 800b332:	605a      	str	r2, [r3, #4]

#if defined(RCC_D1CFGR_D1CPRE)
  /* Get the SYSCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
 800b334:	4b17      	ldr	r3, [pc, #92]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b336:	699b      	ldr	r3, [r3, #24]
 800b338:	f403 6270 	and.w	r2, r3, #3840	@ 0xf00
 800b33c:	687b      	ldr	r3, [r7, #4]
 800b33e:	609a      	str	r2, [r3, #8]

  /* Get the D1HCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
 800b340:	4b14      	ldr	r3, [pc, #80]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b342:	699b      	ldr	r3, [r3, #24]
 800b344:	f003 020f 	and.w	r2, r3, #15
 800b348:	687b      	ldr	r3, [r7, #4]
 800b34a:	60da      	str	r2, [r3, #12]

  /* Get the APB3 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
 800b34c:	4b11      	ldr	r3, [pc, #68]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b34e:	699b      	ldr	r3, [r3, #24]
 800b350:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b354:	687b      	ldr	r3, [r7, #4]
 800b356:	611a      	str	r2, [r3, #16]

  /* Get the APB1 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
 800b358:	4b0e      	ldr	r3, [pc, #56]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b35a:	69db      	ldr	r3, [r3, #28]
 800b35c:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b360:	687b      	ldr	r3, [r7, #4]
 800b362:	615a      	str	r2, [r3, #20]

  /* Get the APB2 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
 800b364:	4b0b      	ldr	r3, [pc, #44]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b366:	69db      	ldr	r3, [r3, #28]
 800b368:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 800b36c:	687b      	ldr	r3, [r7, #4]
 800b36e:	619a      	str	r2, [r3, #24]

  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
 800b370:	4b08      	ldr	r3, [pc, #32]	@ (800b394 <HAL_RCC_GetClockConfig+0x7c>)
 800b372:	6a1b      	ldr	r3, [r3, #32]
 800b374:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b378:	687b      	ldr	r3, [r7, #4]
 800b37a:	61da      	str	r2, [r3, #28]
  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif

  /* Get the Flash Wait State (Latency) configuration ------------------------*/
  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 800b37c:	4b06      	ldr	r3, [pc, #24]	@ (800b398 <HAL_RCC_GetClockConfig+0x80>)
 800b37e:	681b      	ldr	r3, [r3, #0]
 800b380:	f003 020f 	and.w	r2, r3, #15
 800b384:	683b      	ldr	r3, [r7, #0]
 800b386:	601a      	str	r2, [r3, #0]
}
 800b388:	bf00      	nop
 800b38a:	370c      	adds	r7, #12
 800b38c:	46bd      	mov	sp, r7
 800b38e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800b392:	4770      	bx	lr
 800b394:	58024400 	.word	0x58024400
 800b398:	52002000 	.word	0x52002000

0800b39c <HAL_RCCEx_PeriphCLKConfig>:
  * (*) : Available on some STM32H7 lines only.
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
{
 800b39c:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800b3a0:	b0c8      	sub	sp, #288	@ 0x120
 800b3a2:	af00      	add	r7, sp, #0
 800b3a4:	f8c7 010c 	str.w	r0, [r7, #268]	@ 0x10c
  uint32_t tmpreg;
  uint32_t tickstart;
  HAL_StatusTypeDef ret = HAL_OK;      /* Intermediate status */
 800b3a8:	2300      	movs	r3, #0
 800b3aa:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  HAL_StatusTypeDef status = HAL_OK;   /* Final status */
 800b3ae:	2300      	movs	r3, #0
 800b3b0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

  /*---------------------------- SPDIFRX configuration -------------------------------*/

  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
 800b3b4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3b8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b3bc:	f002 6400 	and.w	r4, r2, #134217728	@ 0x8000000
 800b3c0:	2500      	movs	r5, #0
 800b3c2:	ea54 0305 	orrs.w	r3, r4, r5
 800b3c6:	d049      	beq.n	800b45c <HAL_RCCEx_PeriphCLKConfig+0xc0>
  {

    switch (PeriphClkInit->SpdifrxClockSelection)
 800b3c8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b3cc:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800b3ce:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b3d2:	d02f      	beq.n	800b434 <HAL_RCCEx_PeriphCLKConfig+0x98>
 800b3d4:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b3d8:	d828      	bhi.n	800b42c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800b3da:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b3de:	d01a      	beq.n	800b416 <HAL_RCCEx_PeriphCLKConfig+0x7a>
 800b3e0:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b3e4:	d822      	bhi.n	800b42c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800b3e6:	2b00      	cmp	r3, #0
 800b3e8:	d003      	beq.n	800b3f2 <HAL_RCCEx_PeriphCLKConfig+0x56>
 800b3ea:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800b3ee:	d007      	beq.n	800b400 <HAL_RCCEx_PeriphCLKConfig+0x64>
 800b3f0:	e01c      	b.n	800b42c <HAL_RCCEx_PeriphCLKConfig+0x90>
    {
      case RCC_SPDIFRXCLKSOURCE_PLL:      /* PLL is used as clock source for SPDIFRX*/
        /* Enable PLL1Q Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b3f2:	4bb8      	ldr	r3, [pc, #736]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b3f4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b3f6:	4ab7      	ldr	r2, [pc, #732]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b3f8:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b3fc:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b3fe:	e01a      	b.n	800b436 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b400:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b404:	3308      	adds	r3, #8
 800b406:	2102      	movs	r1, #2
 800b408:	4618      	mov	r0, r3
 800b40a:	f001 fc73 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b40e:	4603      	mov	r3, r0
 800b410:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b414:	e00f      	b.n	800b436 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPDIFRX*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b416:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b41a:	3328      	adds	r3, #40	@ 0x28
 800b41c:	2102      	movs	r1, #2
 800b41e:	4618      	mov	r0, r3
 800b420:	f001 fd1a 	bl	800ce58 <RCCEx_PLL3_Config>
 800b424:	4603      	mov	r3, r0
 800b426:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b42a:	e004      	b.n	800b436 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        /* Internal OSC clock is used as source of SPDIFRX clock*/
        /* SPDIFRX clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b42c:	2301      	movs	r3, #1
 800b42e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b432:	e000      	b.n	800b436 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        break;
 800b434:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b436:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b43a:	2b00      	cmp	r3, #0
 800b43c:	d10a      	bne.n	800b454 <HAL_RCCEx_PeriphCLKConfig+0xb8>
    {
      /* Set the source of SPDIFRX clock*/
      __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
 800b43e:	4ba5      	ldr	r3, [pc, #660]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b440:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b442:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800b446:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b44a:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800b44c:	4aa1      	ldr	r2, [pc, #644]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b44e:	430b      	orrs	r3, r1
 800b450:	6513      	str	r3, [r2, #80]	@ 0x50
 800b452:	e003      	b.n	800b45c <HAL_RCCEx_PeriphCLKConfig+0xc0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b454:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b458:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SAI1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
 800b45c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b460:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b464:	f402 7880 	and.w	r8, r2, #256	@ 0x100
 800b468:	f04f 0900 	mov.w	r9, #0
 800b46c:	ea58 0309 	orrs.w	r3, r8, r9
 800b470:	d047      	beq.n	800b502 <HAL_RCCEx_PeriphCLKConfig+0x166>
  {
    switch (PeriphClkInit->Sai1ClockSelection)
 800b472:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b476:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b478:	2b04      	cmp	r3, #4
 800b47a:	d82a      	bhi.n	800b4d2 <HAL_RCCEx_PeriphCLKConfig+0x136>
 800b47c:	a201      	add	r2, pc, #4	@ (adr r2, 800b484 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800b47e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b482:	bf00      	nop
 800b484:	0800b499 	.word	0x0800b499
 800b488:	0800b4a7 	.word	0x0800b4a7
 800b48c:	0800b4bd 	.word	0x0800b4bd
 800b490:	0800b4db 	.word	0x0800b4db
 800b494:	0800b4db 	.word	0x0800b4db
    {
      case RCC_SAI1CLKSOURCE_PLL:      /* PLL is used as clock source for SAI1*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b498:	4b8e      	ldr	r3, [pc, #568]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b49a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b49c:	4a8d      	ldr	r2, [pc, #564]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b49e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b4a2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b4a4:	e01a      	b.n	800b4dc <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b4a6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4aa:	3308      	adds	r3, #8
 800b4ac:	2100      	movs	r1, #0
 800b4ae:	4618      	mov	r0, r3
 800b4b0:	f001 fc20 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b4b4:	4603      	mov	r3, r0
 800b4b6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b4ba:	e00f      	b.n	800b4dc <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b4bc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4c0:	3328      	adds	r3, #40	@ 0x28
 800b4c2:	2100      	movs	r1, #0
 800b4c4:	4618      	mov	r0, r3
 800b4c6:	f001 fcc7 	bl	800ce58 <RCCEx_PLL3_Config>
 800b4ca:	4603      	mov	r3, r0
 800b4cc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b4d0:	e004      	b.n	800b4dc <HAL_RCCEx_PeriphCLKConfig+0x140>
        /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
        /* SAI1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b4d2:	2301      	movs	r3, #1
 800b4d4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b4d8:	e000      	b.n	800b4dc <HAL_RCCEx_PeriphCLKConfig+0x140>
        break;
 800b4da:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b4dc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b4e0:	2b00      	cmp	r3, #0
 800b4e2:	d10a      	bne.n	800b4fa <HAL_RCCEx_PeriphCLKConfig+0x15e>
    {
      /* Set the source of SAI1 clock*/
      __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
 800b4e4:	4b7b      	ldr	r3, [pc, #492]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b4e6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b4e8:	f023 0107 	bic.w	r1, r3, #7
 800b4ec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b4f0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b4f2:	4a78      	ldr	r2, [pc, #480]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b4f4:	430b      	orrs	r3, r1
 800b4f6:	6513      	str	r3, [r2, #80]	@ 0x50
 800b4f8:	e003      	b.n	800b502 <HAL_RCCEx_PeriphCLKConfig+0x166>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b4fa:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b4fe:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

#if defined(SAI3)
  /*---------------------------- SAI2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
 800b502:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b506:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b50a:	f402 7a00 	and.w	sl, r2, #512	@ 0x200
 800b50e:	f04f 0b00 	mov.w	fp, #0
 800b512:	ea5a 030b 	orrs.w	r3, sl, fp
 800b516:	d04c      	beq.n	800b5b2 <HAL_RCCEx_PeriphCLKConfig+0x216>
  {
    switch (PeriphClkInit->Sai23ClockSelection)
 800b518:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b51c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b51e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b522:	d030      	beq.n	800b586 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
 800b524:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b528:	d829      	bhi.n	800b57e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b52a:	2bc0      	cmp	r3, #192	@ 0xc0
 800b52c:	d02d      	beq.n	800b58a <HAL_RCCEx_PeriphCLKConfig+0x1ee>
 800b52e:	2bc0      	cmp	r3, #192	@ 0xc0
 800b530:	d825      	bhi.n	800b57e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b532:	2b80      	cmp	r3, #128	@ 0x80
 800b534:	d018      	beq.n	800b568 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
 800b536:	2b80      	cmp	r3, #128	@ 0x80
 800b538:	d821      	bhi.n	800b57e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b53a:	2b00      	cmp	r3, #0
 800b53c:	d002      	beq.n	800b544 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
 800b53e:	2b40      	cmp	r3, #64	@ 0x40
 800b540:	d007      	beq.n	800b552 <HAL_RCCEx_PeriphCLKConfig+0x1b6>
 800b542:	e01c      	b.n	800b57e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
    {
      case RCC_SAI23CLKSOURCE_PLL:      /* PLL is used as clock source for SAI2/3 */
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b544:	4b63      	ldr	r3, [pc, #396]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b546:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b548:	4a62      	ldr	r2, [pc, #392]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b54a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b54e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b550:	e01c      	b.n	800b58c <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b552:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b556:	3308      	adds	r3, #8
 800b558:	2100      	movs	r1, #0
 800b55a:	4618      	mov	r0, r3
 800b55c:	f001 fbca 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b560:	4603      	mov	r3, r0
 800b562:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b566:	e011      	b.n	800b58c <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b568:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b56c:	3328      	adds	r3, #40	@ 0x28
 800b56e:	2100      	movs	r1, #0
 800b570:	4618      	mov	r0, r3
 800b572:	f001 fc71 	bl	800ce58 <RCCEx_PLL3_Config>
 800b576:	4603      	mov	r3, r0
 800b578:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b57c:	e006      	b.n	800b58c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
        /* SAI2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b57e:	2301      	movs	r3, #1
 800b580:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b584:	e002      	b.n	800b58c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b586:	bf00      	nop
 800b588:	e000      	b.n	800b58c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b58a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b58c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b590:	2b00      	cmp	r3, #0
 800b592:	d10a      	bne.n	800b5aa <HAL_RCCEx_PeriphCLKConfig+0x20e>
    {
      /* Set the source of SAI2/3 clock*/
      __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
 800b594:	4b4f      	ldr	r3, [pc, #316]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b596:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b598:	f423 71e0 	bic.w	r1, r3, #448	@ 0x1c0
 800b59c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5a0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b5a2:	4a4c      	ldr	r2, [pc, #304]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b5a4:	430b      	orrs	r3, r1
 800b5a6:	6513      	str	r3, [r2, #80]	@ 0x50
 800b5a8:	e003      	b.n	800b5b2 <HAL_RCCEx_PeriphCLKConfig+0x216>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b5aa:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b5ae:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI2B*/

#if defined(SAI4)
  /*---------------------------- SAI4A configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
 800b5b2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5b6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b5ba:	f402 6380 	and.w	r3, r2, #1024	@ 0x400
 800b5be:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
 800b5c2:	2300      	movs	r3, #0
 800b5c4:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
 800b5c8:	e9d7 1240 	ldrd	r1, r2, [r7, #256]	@ 0x100
 800b5cc:	460b      	mov	r3, r1
 800b5ce:	4313      	orrs	r3, r2
 800b5d0:	d053      	beq.n	800b67a <HAL_RCCEx_PeriphCLKConfig+0x2de>
  {
    switch (PeriphClkInit->Sai4AClockSelection)
 800b5d2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b5d6:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800b5da:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800b5de:	d035      	beq.n	800b64c <HAL_RCCEx_PeriphCLKConfig+0x2b0>
 800b5e0:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800b5e4:	d82e      	bhi.n	800b644 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b5e6:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800b5ea:	d031      	beq.n	800b650 <HAL_RCCEx_PeriphCLKConfig+0x2b4>
 800b5ec:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800b5f0:	d828      	bhi.n	800b644 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b5f2:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800b5f6:	d01a      	beq.n	800b62e <HAL_RCCEx_PeriphCLKConfig+0x292>
 800b5f8:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800b5fc:	d822      	bhi.n	800b644 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800b5fe:	2b00      	cmp	r3, #0
 800b600:	d003      	beq.n	800b60a <HAL_RCCEx_PeriphCLKConfig+0x26e>
 800b602:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b606:	d007      	beq.n	800b618 <HAL_RCCEx_PeriphCLKConfig+0x27c>
 800b608:	e01c      	b.n	800b644 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
    {
      case RCC_SAI4ACLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b60a:	4b32      	ldr	r3, [pc, #200]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b60c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b60e:	4a31      	ldr	r2, [pc, #196]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b610:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b614:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b616:	e01c      	b.n	800b652 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b618:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b61c:	3308      	adds	r3, #8
 800b61e:	2100      	movs	r1, #0
 800b620:	4618      	mov	r0, r3
 800b622:	f001 fb67 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b626:	4603      	mov	r3, r0
 800b628:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800b62c:	e011      	b.n	800b652 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b62e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b632:	3328      	adds	r3, #40	@ 0x28
 800b634:	2100      	movs	r1, #0
 800b636:	4618      	mov	r0, r3
 800b638:	f001 fc0e 	bl	800ce58 <RCCEx_PLL3_Config>
 800b63c:	4603      	mov	r3, r0
 800b63e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b642:	e006      	b.n	800b652 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        /* SAI4A clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800b644:	2301      	movs	r3, #1
 800b646:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b64a:	e002      	b.n	800b652 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800b64c:	bf00      	nop
 800b64e:	e000      	b.n	800b652 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800b650:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b652:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b656:	2b00      	cmp	r3, #0
 800b658:	d10b      	bne.n	800b672 <HAL_RCCEx_PeriphCLKConfig+0x2d6>
    {
      /* Set the source of SAI4A clock*/
      __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
 800b65a:	4b1e      	ldr	r3, [pc, #120]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b65c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b65e:	f423 0160 	bic.w	r1, r3, #14680064	@ 0xe00000
 800b662:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b666:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800b66a:	4a1a      	ldr	r2, [pc, #104]	@ (800b6d4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b66c:	430b      	orrs	r3, r1
 800b66e:	6593      	str	r3, [r2, #88]	@ 0x58
 800b670:	e003      	b.n	800b67a <HAL_RCCEx_PeriphCLKConfig+0x2de>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b672:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b676:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  /*---------------------------- SAI4B configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
 800b67a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b67e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b682:	f402 6300 	and.w	r3, r2, #2048	@ 0x800
 800b686:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
 800b68a:	2300      	movs	r3, #0
 800b68c:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
 800b690:	e9d7 123e 	ldrd	r1, r2, [r7, #248]	@ 0xf8
 800b694:	460b      	mov	r3, r1
 800b696:	4313      	orrs	r3, r2
 800b698:	d056      	beq.n	800b748 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
  {
    switch (PeriphClkInit->Sai4BClockSelection)
 800b69a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b69e:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800b6a2:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800b6a6:	d038      	beq.n	800b71a <HAL_RCCEx_PeriphCLKConfig+0x37e>
 800b6a8:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800b6ac:	d831      	bhi.n	800b712 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b6ae:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800b6b2:	d034      	beq.n	800b71e <HAL_RCCEx_PeriphCLKConfig+0x382>
 800b6b4:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800b6b8:	d82b      	bhi.n	800b712 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b6ba:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800b6be:	d01d      	beq.n	800b6fc <HAL_RCCEx_PeriphCLKConfig+0x360>
 800b6c0:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800b6c4:	d825      	bhi.n	800b712 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b6c6:	2b00      	cmp	r3, #0
 800b6c8:	d006      	beq.n	800b6d8 <HAL_RCCEx_PeriphCLKConfig+0x33c>
 800b6ca:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 800b6ce:	d00a      	beq.n	800b6e6 <HAL_RCCEx_PeriphCLKConfig+0x34a>
 800b6d0:	e01f      	b.n	800b712 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800b6d2:	bf00      	nop
 800b6d4:	58024400 	.word	0x58024400
    {
      case RCC_SAI4BCLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b6d8:	4ba2      	ldr	r3, [pc, #648]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b6da:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b6dc:	4aa1      	ldr	r2, [pc, #644]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b6de:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b6e2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b6e4:	e01c      	b.n	800b720 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b6e6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b6ea:	3308      	adds	r3, #8
 800b6ec:	2100      	movs	r1, #0
 800b6ee:	4618      	mov	r0, r3
 800b6f0:	f001 fb00 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b6f4:	4603      	mov	r3, r0
 800b6f6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800b6fa:	e011      	b.n	800b720 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b6fc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b700:	3328      	adds	r3, #40	@ 0x28
 800b702:	2100      	movs	r1, #0
 800b704:	4618      	mov	r0, r3
 800b706:	f001 fba7 	bl	800ce58 <RCCEx_PLL3_Config>
 800b70a:	4603      	mov	r3, r0
 800b70c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b710:	e006      	b.n	800b720 <HAL_RCCEx_PeriphCLKConfig+0x384>
        /* SAI4B clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800b712:	2301      	movs	r3, #1
 800b714:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b718:	e002      	b.n	800b720 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800b71a:	bf00      	nop
 800b71c:	e000      	b.n	800b720 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800b71e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b720:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b724:	2b00      	cmp	r3, #0
 800b726:	d10b      	bne.n	800b740 <HAL_RCCEx_PeriphCLKConfig+0x3a4>
    {
      /* Set the source of SAI4B clock*/
      __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
 800b728:	4b8e      	ldr	r3, [pc, #568]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b72a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b72c:	f023 61e0 	bic.w	r1, r3, #117440512	@ 0x7000000
 800b730:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b734:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800b738:	4a8a      	ldr	r2, [pc, #552]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b73a:	430b      	orrs	r3, r1
 800b73c:	6593      	str	r3, [r2, #88]	@ 0x58
 800b73e:	e003      	b.n	800b748 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b740:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b744:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI4*/

#if defined(QUADSPI)
  /*---------------------------- QSPI configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
 800b748:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b74c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b750:	f002 7300 	and.w	r3, r2, #33554432	@ 0x2000000
 800b754:	f8c7 30f0 	str.w	r3, [r7, #240]	@ 0xf0
 800b758:	2300      	movs	r3, #0
 800b75a:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
 800b75e:	e9d7 123c 	ldrd	r1, r2, [r7, #240]	@ 0xf0
 800b762:	460b      	mov	r3, r1
 800b764:	4313      	orrs	r3, r2
 800b766:	d03a      	beq.n	800b7de <HAL_RCCEx_PeriphCLKConfig+0x442>
  {
    switch (PeriphClkInit->QspiClockSelection)
 800b768:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b76c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b76e:	2b30      	cmp	r3, #48	@ 0x30
 800b770:	d01f      	beq.n	800b7b2 <HAL_RCCEx_PeriphCLKConfig+0x416>
 800b772:	2b30      	cmp	r3, #48	@ 0x30
 800b774:	d819      	bhi.n	800b7aa <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800b776:	2b20      	cmp	r3, #32
 800b778:	d00c      	beq.n	800b794 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
 800b77a:	2b20      	cmp	r3, #32
 800b77c:	d815      	bhi.n	800b7aa <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800b77e:	2b00      	cmp	r3, #0
 800b780:	d019      	beq.n	800b7b6 <HAL_RCCEx_PeriphCLKConfig+0x41a>
 800b782:	2b10      	cmp	r3, #16
 800b784:	d111      	bne.n	800b7aa <HAL_RCCEx_PeriphCLKConfig+0x40e>
    {
      case RCC_QSPICLKSOURCE_PLL:      /* PLL is used as clock source for QSPI*/
        /* Enable QSPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b786:	4b77      	ldr	r3, [pc, #476]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b788:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b78a:	4a76      	ldr	r2, [pc, #472]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b78c:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b790:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800b792:	e011      	b.n	800b7b8 <HAL_RCCEx_PeriphCLKConfig+0x41c>

      case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b794:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b798:	3308      	adds	r3, #8
 800b79a:	2102      	movs	r1, #2
 800b79c:	4618      	mov	r0, r3
 800b79e:	f001 faa9 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b7a2:	4603      	mov	r3, r0
 800b7a4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800b7a8:	e006      	b.n	800b7b8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
      case RCC_QSPICLKSOURCE_D1HCLK:
        /* Domain1 HCLK  clock selected as QSPI kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800b7aa:	2301      	movs	r3, #1
 800b7ac:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b7b0:	e002      	b.n	800b7b8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800b7b2:	bf00      	nop
 800b7b4:	e000      	b.n	800b7b8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800b7b6:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b7b8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b7bc:	2b00      	cmp	r3, #0
 800b7be:	d10a      	bne.n	800b7d6 <HAL_RCCEx_PeriphCLKConfig+0x43a>
    {
      /* Set the source of QSPI clock*/
      __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
 800b7c0:	4b68      	ldr	r3, [pc, #416]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b7c2:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b7c4:	f023 0130 	bic.w	r1, r3, #48	@ 0x30
 800b7c8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7cc:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800b7ce:	4a65      	ldr	r2, [pc, #404]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b7d0:	430b      	orrs	r3, r1
 800b7d2:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800b7d4:	e003      	b.n	800b7de <HAL_RCCEx_PeriphCLKConfig+0x442>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b7d6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b7da:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif  /*OCTOSPI*/

  /*---------------------------- SPI1/2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
 800b7de:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7e2:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b7e6:	f402 5380 	and.w	r3, r2, #4096	@ 0x1000
 800b7ea:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
 800b7ee:	2300      	movs	r3, #0
 800b7f0:	f8c7 30ec 	str.w	r3, [r7, #236]	@ 0xec
 800b7f4:	e9d7 123a 	ldrd	r1, r2, [r7, #232]	@ 0xe8
 800b7f8:	460b      	mov	r3, r1
 800b7fa:	4313      	orrs	r3, r2
 800b7fc:	d051      	beq.n	800b8a2 <HAL_RCCEx_PeriphCLKConfig+0x506>
  {
    switch (PeriphClkInit->Spi123ClockSelection)
 800b7fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b802:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800b804:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b808:	d035      	beq.n	800b876 <HAL_RCCEx_PeriphCLKConfig+0x4da>
 800b80a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800b80e:	d82e      	bhi.n	800b86e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b810:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800b814:	d031      	beq.n	800b87a <HAL_RCCEx_PeriphCLKConfig+0x4de>
 800b816:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800b81a:	d828      	bhi.n	800b86e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b81c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b820:	d01a      	beq.n	800b858 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
 800b822:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800b826:	d822      	bhi.n	800b86e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800b828:	2b00      	cmp	r3, #0
 800b82a:	d003      	beq.n	800b834 <HAL_RCCEx_PeriphCLKConfig+0x498>
 800b82c:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800b830:	d007      	beq.n	800b842 <HAL_RCCEx_PeriphCLKConfig+0x4a6>
 800b832:	e01c      	b.n	800b86e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
    {
      case RCC_SPI123CLKSOURCE_PLL:      /* PLL is used as clock source for SPI1/2/3 */
        /* Enable SPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b834:	4b4b      	ldr	r3, [pc, #300]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b836:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b838:	4a4a      	ldr	r2, [pc, #296]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b83a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b83e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b840:	e01c      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b842:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b846:	3308      	adds	r3, #8
 800b848:	2100      	movs	r1, #0
 800b84a:	4618      	mov	r0, r3
 800b84c:	f001 fa52 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b850:	4603      	mov	r3, r0
 800b852:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b856:	e011      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b858:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b85c:	3328      	adds	r3, #40	@ 0x28
 800b85e:	2100      	movs	r1, #0
 800b860:	4618      	mov	r0, r3
 800b862:	f001 faf9 	bl	800ce58 <RCCEx_PLL3_Config>
 800b866:	4603      	mov	r3, r0
 800b868:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800b86c:	e006      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b86e:	2301      	movs	r3, #1
 800b870:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b874:	e002      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800b876:	bf00      	nop
 800b878:	e000      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800b87a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b87c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b880:	2b00      	cmp	r3, #0
 800b882:	d10a      	bne.n	800b89a <HAL_RCCEx_PeriphCLKConfig+0x4fe>
    {
      /* Set the source of SPI1/2/3 clock*/
      __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
 800b884:	4b37      	ldr	r3, [pc, #220]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b886:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b888:	f423 41e0 	bic.w	r1, r3, #28672	@ 0x7000
 800b88c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b890:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800b892:	4a34      	ldr	r2, [pc, #208]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b894:	430b      	orrs	r3, r1
 800b896:	6513      	str	r3, [r2, #80]	@ 0x50
 800b898:	e003      	b.n	800b8a2 <HAL_RCCEx_PeriphCLKConfig+0x506>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b89a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b89e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI4/5 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
 800b8a2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8a6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b8aa:	f402 5300 	and.w	r3, r2, #8192	@ 0x2000
 800b8ae:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
 800b8b2:	2300      	movs	r3, #0
 800b8b4:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
 800b8b8:	e9d7 1238 	ldrd	r1, r2, [r7, #224]	@ 0xe0
 800b8bc:	460b      	mov	r3, r1
 800b8be:	4313      	orrs	r3, r2
 800b8c0:	d056      	beq.n	800b970 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
  {
    switch (PeriphClkInit->Spi45ClockSelection)
 800b8c2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8c6:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b8c8:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b8cc:	d033      	beq.n	800b936 <HAL_RCCEx_PeriphCLKConfig+0x59a>
 800b8ce:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800b8d2:	d82c      	bhi.n	800b92e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b8d4:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b8d8:	d02f      	beq.n	800b93a <HAL_RCCEx_PeriphCLKConfig+0x59e>
 800b8da:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800b8de:	d826      	bhi.n	800b92e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b8e0:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b8e4:	d02b      	beq.n	800b93e <HAL_RCCEx_PeriphCLKConfig+0x5a2>
 800b8e6:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800b8ea:	d820      	bhi.n	800b92e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b8ec:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b8f0:	d012      	beq.n	800b918 <HAL_RCCEx_PeriphCLKConfig+0x57c>
 800b8f2:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800b8f6:	d81a      	bhi.n	800b92e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800b8f8:	2b00      	cmp	r3, #0
 800b8fa:	d022      	beq.n	800b942 <HAL_RCCEx_PeriphCLKConfig+0x5a6>
 800b8fc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800b900:	d115      	bne.n	800b92e <HAL_RCCEx_PeriphCLKConfig+0x592>
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b902:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b906:	3308      	adds	r3, #8
 800b908:	2101      	movs	r1, #1
 800b90a:	4618      	mov	r0, r3
 800b90c:	f001 f9f2 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b910:	4603      	mov	r3, r0
 800b912:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b916:	e015      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
      case RCC_SPI45CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b918:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b91c:	3328      	adds	r3, #40	@ 0x28
 800b91e:	2101      	movs	r1, #1
 800b920:	4618      	mov	r0, r3
 800b922:	f001 fa99 	bl	800ce58 <RCCEx_PLL3_Config>
 800b926:	4603      	mov	r3, r0
 800b928:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800b92c:	e00a      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        /* HSE,  oscillator is used as source of SPI4/5 clock */
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b92e:	2301      	movs	r3, #1
 800b930:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b934:	e006      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b936:	bf00      	nop
 800b938:	e004      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b93a:	bf00      	nop
 800b93c:	e002      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b93e:	bf00      	nop
 800b940:	e000      	b.n	800b944 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800b942:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b944:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b948:	2b00      	cmp	r3, #0
 800b94a:	d10d      	bne.n	800b968 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
    {
      /* Set the source of SPI4/5 clock*/
      __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
 800b94c:	4b05      	ldr	r3, [pc, #20]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b94e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b950:	f423 21e0 	bic.w	r1, r3, #458752	@ 0x70000
 800b954:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b958:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800b95a:	4a02      	ldr	r2, [pc, #8]	@ (800b964 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800b95c:	430b      	orrs	r3, r1
 800b95e:	6513      	str	r3, [r2, #80]	@ 0x50
 800b960:	e006      	b.n	800b970 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
 800b962:	bf00      	nop
 800b964:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b968:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b96c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI6 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
 800b970:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b974:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b978:	f402 4380 	and.w	r3, r2, #16384	@ 0x4000
 800b97c:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
 800b980:	2300      	movs	r3, #0
 800b982:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
 800b986:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
 800b98a:	460b      	mov	r3, r1
 800b98c:	4313      	orrs	r3, r2
 800b98e:	d055      	beq.n	800ba3c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
  {
    switch (PeriphClkInit->Spi6ClockSelection)
 800b990:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b994:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800b998:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b99c:	d033      	beq.n	800ba06 <HAL_RCCEx_PeriphCLKConfig+0x66a>
 800b99e:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800b9a2:	d82c      	bhi.n	800b9fe <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b9a4:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b9a8:	d02f      	beq.n	800ba0a <HAL_RCCEx_PeriphCLKConfig+0x66e>
 800b9aa:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800b9ae:	d826      	bhi.n	800b9fe <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b9b0:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b9b4:	d02b      	beq.n	800ba0e <HAL_RCCEx_PeriphCLKConfig+0x672>
 800b9b6:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800b9ba:	d820      	bhi.n	800b9fe <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b9bc:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b9c0:	d012      	beq.n	800b9e8 <HAL_RCCEx_PeriphCLKConfig+0x64c>
 800b9c2:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800b9c6:	d81a      	bhi.n	800b9fe <HAL_RCCEx_PeriphCLKConfig+0x662>
 800b9c8:	2b00      	cmp	r3, #0
 800b9ca:	d022      	beq.n	800ba12 <HAL_RCCEx_PeriphCLKConfig+0x676>
 800b9cc:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800b9d0:	d115      	bne.n	800b9fe <HAL_RCCEx_PeriphCLKConfig+0x662>
        /* SPI6 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800b9d2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9d6:	3308      	adds	r3, #8
 800b9d8:	2101      	movs	r1, #1
 800b9da:	4618      	mov	r0, r3
 800b9dc:	f001 f98a 	bl	800ccf4 <RCCEx_PLL2_Config>
 800b9e0:	4603      	mov	r3, r0
 800b9e2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b9e6:	e015      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
      case RCC_SPI6CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI6*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800b9e8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9ec:	3328      	adds	r3, #40	@ 0x28
 800b9ee:	2101      	movs	r1, #1
 800b9f0:	4618      	mov	r0, r3
 800b9f2:	f001 fa31 	bl	800ce58 <RCCEx_PLL3_Config>
 800b9f6:	4603      	mov	r3, r0
 800b9f8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800b9fc:	e00a      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
        /* SPI6 clock source configuration done later after clock selection check */
        break;
#endif

      default:
        ret = HAL_ERROR;
 800b9fe:	2301      	movs	r3, #1
 800ba00:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ba04:	e006      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800ba06:	bf00      	nop
 800ba08:	e004      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800ba0a:	bf00      	nop
 800ba0c:	e002      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800ba0e:	bf00      	nop
 800ba10:	e000      	b.n	800ba14 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800ba12:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ba14:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba18:	2b00      	cmp	r3, #0
 800ba1a:	d10b      	bne.n	800ba34 <HAL_RCCEx_PeriphCLKConfig+0x698>
    {
      /* Set the source of SPI6 clock*/
      __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
 800ba1c:	4ba3      	ldr	r3, [pc, #652]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ba1e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ba20:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800ba24:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba28:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800ba2c:	4a9f      	ldr	r2, [pc, #636]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ba2e:	430b      	orrs	r3, r1
 800ba30:	6593      	str	r3, [r2, #88]	@ 0x58
 800ba32:	e003      	b.n	800ba3c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ba34:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba38:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif /*DSI*/

#if defined(FDCAN1) || defined(FDCAN2)
  /*---------------------------- FDCAN configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
 800ba3c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba40:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ba44:	f402 4300 	and.w	r3, r2, #32768	@ 0x8000
 800ba48:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800ba4c:	2300      	movs	r3, #0
 800ba4e:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
 800ba52:	e9d7 1234 	ldrd	r1, r2, [r7, #208]	@ 0xd0
 800ba56:	460b      	mov	r3, r1
 800ba58:	4313      	orrs	r3, r2
 800ba5a:	d037      	beq.n	800bacc <HAL_RCCEx_PeriphCLKConfig+0x730>
  {
    switch (PeriphClkInit->FdcanClockSelection)
 800ba5c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba60:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ba62:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ba66:	d00e      	beq.n	800ba86 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
 800ba68:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800ba6c:	d816      	bhi.n	800ba9c <HAL_RCCEx_PeriphCLKConfig+0x700>
 800ba6e:	2b00      	cmp	r3, #0
 800ba70:	d018      	beq.n	800baa4 <HAL_RCCEx_PeriphCLKConfig+0x708>
 800ba72:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800ba76:	d111      	bne.n	800ba9c <HAL_RCCEx_PeriphCLKConfig+0x700>
    {
      case RCC_FDCANCLKSOURCE_PLL:      /* PLL is used as clock source for FDCAN*/
        /* Enable FDCAN Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ba78:	4b8c      	ldr	r3, [pc, #560]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ba7a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ba7c:	4a8b      	ldr	r2, [pc, #556]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800ba7e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ba82:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800ba84:	e00f      	b.n	800baa6 <HAL_RCCEx_PeriphCLKConfig+0x70a>

      case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800ba86:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba8a:	3308      	adds	r3, #8
 800ba8c:	2101      	movs	r1, #1
 800ba8e:	4618      	mov	r0, r3
 800ba90:	f001 f930 	bl	800ccf4 <RCCEx_PLL2_Config>
 800ba94:	4603      	mov	r3, r0
 800ba96:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800ba9a:	e004      	b.n	800baa6 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        /* HSE is used as clock source for FDCAN*/
        /* FDCAN clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800ba9c:	2301      	movs	r3, #1
 800ba9e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800baa2:	e000      	b.n	800baa6 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        break;
 800baa4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800baa6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800baaa:	2b00      	cmp	r3, #0
 800baac:	d10a      	bne.n	800bac4 <HAL_RCCEx_PeriphCLKConfig+0x728>
    {
      /* Set the source of FDCAN clock*/
      __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
 800baae:	4b7f      	ldr	r3, [pc, #508]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bab0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bab2:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800bab6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800baba:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800babc:	4a7b      	ldr	r2, [pc, #492]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800babe:	430b      	orrs	r3, r1
 800bac0:	6513      	str	r3, [r2, #80]	@ 0x50
 800bac2:	e003      	b.n	800bacc <HAL_RCCEx_PeriphCLKConfig+0x730>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bac4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bac8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /*FDCAN1 || FDCAN2*/

  /*---------------------------- FMC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
 800bacc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bad0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bad4:	f002 7380 	and.w	r3, r2, #16777216	@ 0x1000000
 800bad8:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800badc:	2300      	movs	r3, #0
 800bade:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
 800bae2:	e9d7 1232 	ldrd	r1, r2, [r7, #200]	@ 0xc8
 800bae6:	460b      	mov	r3, r1
 800bae8:	4313      	orrs	r3, r2
 800baea:	d039      	beq.n	800bb60 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
  {
    switch (PeriphClkInit->FmcClockSelection)
 800baec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800baf0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800baf2:	2b03      	cmp	r3, #3
 800baf4:	d81c      	bhi.n	800bb30 <HAL_RCCEx_PeriphCLKConfig+0x794>
 800baf6:	a201      	add	r2, pc, #4	@ (adr r2, 800bafc <HAL_RCCEx_PeriphCLKConfig+0x760>)
 800baf8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800bafc:	0800bb39 	.word	0x0800bb39
 800bb00:	0800bb0d 	.word	0x0800bb0d
 800bb04:	0800bb1b 	.word	0x0800bb1b
 800bb08:	0800bb39 	.word	0x0800bb39
    {
      case RCC_FMCCLKSOURCE_PLL:      /* PLL is used as clock source for FMC*/
        /* Enable FMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bb0c:	4b67      	ldr	r3, [pc, #412]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bb0e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bb10:	4a66      	ldr	r2, [pc, #408]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bb12:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bb16:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FMC clock source configuration done later after clock selection check */
        break;
 800bb18:	e00f      	b.n	800bb3a <HAL_RCCEx_PeriphCLKConfig+0x79e>

      case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bb1a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb1e:	3308      	adds	r3, #8
 800bb20:	2102      	movs	r1, #2
 800bb22:	4618      	mov	r0, r3
 800bb24:	f001 f8e6 	bl	800ccf4 <RCCEx_PLL2_Config>
 800bb28:	4603      	mov	r3, r0
 800bb2a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FMC clock source configuration done later after clock selection check */
        break;
 800bb2e:	e004      	b.n	800bb3a <HAL_RCCEx_PeriphCLKConfig+0x79e>
      case RCC_FMCCLKSOURCE_HCLK:
        /* D1/CD HCLK  clock selected as FMC kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800bb30:	2301      	movs	r3, #1
 800bb32:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bb36:	e000      	b.n	800bb3a <HAL_RCCEx_PeriphCLKConfig+0x79e>
        break;
 800bb38:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bb3a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb3e:	2b00      	cmp	r3, #0
 800bb40:	d10a      	bne.n	800bb58 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
    {
      /* Set the source of FMC clock*/
      __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
 800bb42:	4b5a      	ldr	r3, [pc, #360]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bb44:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bb46:	f023 0103 	bic.w	r1, r3, #3
 800bb4a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb4e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800bb50:	4a56      	ldr	r2, [pc, #344]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bb52:	430b      	orrs	r3, r1
 800bb54:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800bb56:	e003      	b.n	800bb60 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bb58:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb5c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- RTC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
 800bb60:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb64:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bb68:	f402 0380 	and.w	r3, r2, #4194304	@ 0x400000
 800bb6c:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800bb70:	2300      	movs	r3, #0
 800bb72:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800bb76:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
 800bb7a:	460b      	mov	r3, r1
 800bb7c:	4313      	orrs	r3, r2
 800bb7e:	f000 809f 	beq.w	800bcc0 <HAL_RCCEx_PeriphCLKConfig+0x924>
  {
    /* check for RTC Parameters used to output RTCCLK */
    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));

    /* Enable write access to Backup domain */
    SET_BIT(PWR->CR1, PWR_CR1_DBP);
 800bb82:	4b4b      	ldr	r3, [pc, #300]	@ (800bcb0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bb84:	681b      	ldr	r3, [r3, #0]
 800bb86:	4a4a      	ldr	r2, [pc, #296]	@ (800bcb0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bb88:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800bb8c:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800bb8e:	f7f9 fd81 	bl	8005694 <HAL_GetTick>
 800bb92:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800bb96:	e00b      	b.n	800bbb0 <HAL_RCCEx_PeriphCLKConfig+0x814>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800bb98:	f7f9 fd7c 	bl	8005694 <HAL_GetTick>
 800bb9c:	4602      	mov	r2, r0
 800bb9e:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800bba2:	1ad3      	subs	r3, r2, r3
 800bba4:	2b64      	cmp	r3, #100	@ 0x64
 800bba6:	d903      	bls.n	800bbb0 <HAL_RCCEx_PeriphCLKConfig+0x814>
      {
        ret = HAL_TIMEOUT;
 800bba8:	2303      	movs	r3, #3
 800bbaa:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bbae:	e005      	b.n	800bbbc <HAL_RCCEx_PeriphCLKConfig+0x820>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800bbb0:	4b3f      	ldr	r3, [pc, #252]	@ (800bcb0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bbb2:	681b      	ldr	r3, [r3, #0]
 800bbb4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800bbb8:	2b00      	cmp	r3, #0
 800bbba:	d0ed      	beq.n	800bb98 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
      }
    }

    if (ret == HAL_OK)
 800bbbc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bbc0:	2b00      	cmp	r3, #0
 800bbc2:	d179      	bne.n	800bcb8 <HAL_RCCEx_PeriphCLKConfig+0x91c>
    {
      /* Reset the Backup domain only if the RTC Clock source selection is modified */
      if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
 800bbc4:	4b39      	ldr	r3, [pc, #228]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbc6:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 800bbc8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbcc:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bbd0:	4053      	eors	r3, r2
 800bbd2:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800bbd6:	2b00      	cmp	r3, #0
 800bbd8:	d015      	beq.n	800bc06 <HAL_RCCEx_PeriphCLKConfig+0x86a>
      {
        /* Store the content of BDCR register before the reset of Backup Domain */
        tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800bbda:	4b34      	ldr	r3, [pc, #208]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbdc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bbde:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800bbe2:	f8c7 3114 	str.w	r3, [r7, #276]	@ 0x114
        /* RTC Clock selection can be changed only if the Backup Domain is reset */
        __HAL_RCC_BACKUPRESET_FORCE();
 800bbe6:	4b31      	ldr	r3, [pc, #196]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbe8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bbea:	4a30      	ldr	r2, [pc, #192]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbec:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800bbf0:	6713      	str	r3, [r2, #112]	@ 0x70
        __HAL_RCC_BACKUPRESET_RELEASE();
 800bbf2:	4b2e      	ldr	r3, [pc, #184]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbf4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bbf6:	4a2d      	ldr	r2, [pc, #180]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bbf8:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800bbfc:	6713      	str	r3, [r2, #112]	@ 0x70
        /* Restore the Content of BDCR register */
        RCC->BDCR = tmpreg;
 800bbfe:	4a2b      	ldr	r2, [pc, #172]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc00:	f8d7 3114 	ldr.w	r3, [r7, #276]	@ 0x114
 800bc04:	6713      	str	r3, [r2, #112]	@ 0x70
      }

      /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
      if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
 800bc06:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc0a:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bc0e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800bc12:	d118      	bne.n	800bc46 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800bc14:	f7f9 fd3e 	bl	8005694 <HAL_GetTick>
 800bc18:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

        /* Wait till LSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800bc1c:	e00d      	b.n	800bc3a <HAL_RCCEx_PeriphCLKConfig+0x89e>
        {
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800bc1e:	f7f9 fd39 	bl	8005694 <HAL_GetTick>
 800bc22:	4602      	mov	r2, r0
 800bc24:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800bc28:	1ad2      	subs	r2, r2, r3
 800bc2a:	f241 3388 	movw	r3, #5000	@ 0x1388
 800bc2e:	429a      	cmp	r2, r3
 800bc30:	d903      	bls.n	800bc3a <HAL_RCCEx_PeriphCLKConfig+0x89e>
          {
            ret = HAL_TIMEOUT;
 800bc32:	2303      	movs	r3, #3
 800bc34:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
            break;
 800bc38:	e005      	b.n	800bc46 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800bc3a:	4b1c      	ldr	r3, [pc, #112]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc3c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bc3e:	f003 0302 	and.w	r3, r3, #2
 800bc42:	2b00      	cmp	r3, #0
 800bc44:	d0eb      	beq.n	800bc1e <HAL_RCCEx_PeriphCLKConfig+0x882>
          }
        }
      }

      if (ret == HAL_OK)
 800bc46:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bc4a:	2b00      	cmp	r3, #0
 800bc4c:	d129      	bne.n	800bca2 <HAL_RCCEx_PeriphCLKConfig+0x906>
      {
        __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 800bc4e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc52:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bc56:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800bc5a:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800bc5e:	d10e      	bne.n	800bc7e <HAL_RCCEx_PeriphCLKConfig+0x8e2>
 800bc60:	4b12      	ldr	r3, [pc, #72]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc62:	691b      	ldr	r3, [r3, #16]
 800bc64:	f423 517c 	bic.w	r1, r3, #16128	@ 0x3f00
 800bc68:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc6c:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bc70:	091a      	lsrs	r2, r3, #4
 800bc72:	4b10      	ldr	r3, [pc, #64]	@ (800bcb4 <HAL_RCCEx_PeriphCLKConfig+0x918>)
 800bc74:	4013      	ands	r3, r2
 800bc76:	4a0d      	ldr	r2, [pc, #52]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc78:	430b      	orrs	r3, r1
 800bc7a:	6113      	str	r3, [r2, #16]
 800bc7c:	e005      	b.n	800bc8a <HAL_RCCEx_PeriphCLKConfig+0x8ee>
 800bc7e:	4b0b      	ldr	r3, [pc, #44]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc80:	691b      	ldr	r3, [r3, #16]
 800bc82:	4a0a      	ldr	r2, [pc, #40]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc84:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 800bc88:	6113      	str	r3, [r2, #16]
 800bc8a:	4b08      	ldr	r3, [pc, #32]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc8c:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 800bc8e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc92:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bc96:	f3c3 030b 	ubfx	r3, r3, #0, #12
 800bc9a:	4a04      	ldr	r2, [pc, #16]	@ (800bcac <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bc9c:	430b      	orrs	r3, r1
 800bc9e:	6713      	str	r3, [r2, #112]	@ 0x70
 800bca0:	e00e      	b.n	800bcc0 <HAL_RCCEx_PeriphCLKConfig+0x924>
      }
      else
      {
        /* set overall return value */
        status = ret;
 800bca2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bca6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
 800bcaa:	e009      	b.n	800bcc0 <HAL_RCCEx_PeriphCLKConfig+0x924>
 800bcac:	58024400 	.word	0x58024400
 800bcb0:	58024800 	.word	0x58024800
 800bcb4:	00ffffcf 	.word	0x00ffffcf
      }
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bcb8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bcbc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }


  /*-------------------------- USART1/6 configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
 800bcc0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcc4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bcc8:	f002 0301 	and.w	r3, r2, #1
 800bccc:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800bcd0:	2300      	movs	r3, #0
 800bcd2:	f8c7 30bc 	str.w	r3, [r7, #188]	@ 0xbc
 800bcd6:	e9d7 122e 	ldrd	r1, r2, [r7, #184]	@ 0xb8
 800bcda:	460b      	mov	r3, r1
 800bcdc:	4313      	orrs	r3, r2
 800bcde:	f000 8089 	beq.w	800bdf4 <HAL_RCCEx_PeriphCLKConfig+0xa58>
  {
    switch (PeriphClkInit->Usart16ClockSelection)
 800bce2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bce6:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800bce8:	2b28      	cmp	r3, #40	@ 0x28
 800bcea:	d86b      	bhi.n	800bdc4 <HAL_RCCEx_PeriphCLKConfig+0xa28>
 800bcec:	a201      	add	r2, pc, #4	@ (adr r2, 800bcf4 <HAL_RCCEx_PeriphCLKConfig+0x958>)
 800bcee:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800bcf2:	bf00      	nop
 800bcf4:	0800bdcd 	.word	0x0800bdcd
 800bcf8:	0800bdc5 	.word	0x0800bdc5
 800bcfc:	0800bdc5 	.word	0x0800bdc5
 800bd00:	0800bdc5 	.word	0x0800bdc5
 800bd04:	0800bdc5 	.word	0x0800bdc5
 800bd08:	0800bdc5 	.word	0x0800bdc5
 800bd0c:	0800bdc5 	.word	0x0800bdc5
 800bd10:	0800bdc5 	.word	0x0800bdc5
 800bd14:	0800bd99 	.word	0x0800bd99
 800bd18:	0800bdc5 	.word	0x0800bdc5
 800bd1c:	0800bdc5 	.word	0x0800bdc5
 800bd20:	0800bdc5 	.word	0x0800bdc5
 800bd24:	0800bdc5 	.word	0x0800bdc5
 800bd28:	0800bdc5 	.word	0x0800bdc5
 800bd2c:	0800bdc5 	.word	0x0800bdc5
 800bd30:	0800bdc5 	.word	0x0800bdc5
 800bd34:	0800bdaf 	.word	0x0800bdaf
 800bd38:	0800bdc5 	.word	0x0800bdc5
 800bd3c:	0800bdc5 	.word	0x0800bdc5
 800bd40:	0800bdc5 	.word	0x0800bdc5
 800bd44:	0800bdc5 	.word	0x0800bdc5
 800bd48:	0800bdc5 	.word	0x0800bdc5
 800bd4c:	0800bdc5 	.word	0x0800bdc5
 800bd50:	0800bdc5 	.word	0x0800bdc5
 800bd54:	0800bdcd 	.word	0x0800bdcd
 800bd58:	0800bdc5 	.word	0x0800bdc5
 800bd5c:	0800bdc5 	.word	0x0800bdc5
 800bd60:	0800bdc5 	.word	0x0800bdc5
 800bd64:	0800bdc5 	.word	0x0800bdc5
 800bd68:	0800bdc5 	.word	0x0800bdc5
 800bd6c:	0800bdc5 	.word	0x0800bdc5
 800bd70:	0800bdc5 	.word	0x0800bdc5
 800bd74:	0800bdcd 	.word	0x0800bdcd
 800bd78:	0800bdc5 	.word	0x0800bdc5
 800bd7c:	0800bdc5 	.word	0x0800bdc5
 800bd80:	0800bdc5 	.word	0x0800bdc5
 800bd84:	0800bdc5 	.word	0x0800bdc5
 800bd88:	0800bdc5 	.word	0x0800bdc5
 800bd8c:	0800bdc5 	.word	0x0800bdc5
 800bd90:	0800bdc5 	.word	0x0800bdc5
 800bd94:	0800bdcd 	.word	0x0800bdcd
      case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bd98:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd9c:	3308      	adds	r3, #8
 800bd9e:	2101      	movs	r1, #1
 800bda0:	4618      	mov	r0, r3
 800bda2:	f000 ffa7 	bl	800ccf4 <RCCEx_PLL2_Config>
 800bda6:	4603      	mov	r3, r0
 800bda8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800bdac:	e00f      	b.n	800bdce <HAL_RCCEx_PeriphCLKConfig+0xa32>

      case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800bdae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdb2:	3328      	adds	r3, #40	@ 0x28
 800bdb4:	2101      	movs	r1, #1
 800bdb6:	4618      	mov	r0, r3
 800bdb8:	f001 f84e 	bl	800ce58 <RCCEx_PLL3_Config>
 800bdbc:	4603      	mov	r3, r0
 800bdbe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800bdc2:	e004      	b.n	800bdce <HAL_RCCEx_PeriphCLKConfig+0xa32>
        /* LSE,  oscillator is used as source of USART1/6 clock */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bdc4:	2301      	movs	r3, #1
 800bdc6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bdca:	e000      	b.n	800bdce <HAL_RCCEx_PeriphCLKConfig+0xa32>
        break;
 800bdcc:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bdce:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdd2:	2b00      	cmp	r3, #0
 800bdd4:	d10a      	bne.n	800bdec <HAL_RCCEx_PeriphCLKConfig+0xa50>
    {
      /* Set the source of USART1/6 clock */
      __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
 800bdd6:	4bbf      	ldr	r3, [pc, #764]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bdd8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bdda:	f023 0138 	bic.w	r1, r3, #56	@ 0x38
 800bdde:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bde2:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800bde4:	4abb      	ldr	r2, [pc, #748]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bde6:	430b      	orrs	r3, r1
 800bde8:	6553      	str	r3, [r2, #84]	@ 0x54
 800bdea:	e003      	b.n	800bdf4 <HAL_RCCEx_PeriphCLKConfig+0xa58>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bdec:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bdf0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
 800bdf4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdf8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bdfc:	f002 0302 	and.w	r3, r2, #2
 800be00:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800be04:	2300      	movs	r3, #0
 800be06:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800be0a:	e9d7 122c 	ldrd	r1, r2, [r7, #176]	@ 0xb0
 800be0e:	460b      	mov	r3, r1
 800be10:	4313      	orrs	r3, r2
 800be12:	d041      	beq.n	800be98 <HAL_RCCEx_PeriphCLKConfig+0xafc>
  {
    switch (PeriphClkInit->Usart234578ClockSelection)
 800be14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be18:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800be1a:	2b05      	cmp	r3, #5
 800be1c:	d824      	bhi.n	800be68 <HAL_RCCEx_PeriphCLKConfig+0xacc>
 800be1e:	a201      	add	r2, pc, #4	@ (adr r2, 800be24 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
 800be20:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800be24:	0800be71 	.word	0x0800be71
 800be28:	0800be3d 	.word	0x0800be3d
 800be2c:	0800be53 	.word	0x0800be53
 800be30:	0800be71 	.word	0x0800be71
 800be34:	0800be71 	.word	0x0800be71
 800be38:	0800be71 	.word	0x0800be71
      case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800be3c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be40:	3308      	adds	r3, #8
 800be42:	2101      	movs	r1, #1
 800be44:	4618      	mov	r0, r3
 800be46:	f000 ff55 	bl	800ccf4 <RCCEx_PLL2_Config>
 800be4a:	4603      	mov	r3, r0
 800be4c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800be50:	e00f      	b.n	800be72 <HAL_RCCEx_PeriphCLKConfig+0xad6>

      case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800be52:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be56:	3328      	adds	r3, #40	@ 0x28
 800be58:	2101      	movs	r1, #1
 800be5a:	4618      	mov	r0, r3
 800be5c:	f000 fffc 	bl	800ce58 <RCCEx_PLL3_Config>
 800be60:	4603      	mov	r3, r0
 800be62:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800be66:	e004      	b.n	800be72 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        /* LSE,  oscillator is used as source of USART2/3/4/5/7/8 clock */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800be68:	2301      	movs	r3, #1
 800be6a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800be6e:	e000      	b.n	800be72 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        break;
 800be70:	bf00      	nop
    }

    if (ret == HAL_OK)
 800be72:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be76:	2b00      	cmp	r3, #0
 800be78:	d10a      	bne.n	800be90 <HAL_RCCEx_PeriphCLKConfig+0xaf4>
    {
      /* Set the source of USART2/3/4/5/7/8 clock */
      __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
 800be7a:	4b96      	ldr	r3, [pc, #600]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800be7c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800be7e:	f023 0107 	bic.w	r1, r3, #7
 800be82:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be86:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800be88:	4a92      	ldr	r2, [pc, #584]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800be8a:	430b      	orrs	r3, r1
 800be8c:	6553      	str	r3, [r2, #84]	@ 0x54
 800be8e:	e003      	b.n	800be98 <HAL_RCCEx_PeriphCLKConfig+0xafc>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800be90:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be94:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- LPUART1 Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
 800be98:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be9c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bea0:	f002 0304 	and.w	r3, r2, #4
 800bea4:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
 800bea8:	2300      	movs	r3, #0
 800beaa:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800beae:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
 800beb2:	460b      	mov	r3, r1
 800beb4:	4313      	orrs	r3, r2
 800beb6:	d044      	beq.n	800bf42 <HAL_RCCEx_PeriphCLKConfig+0xba6>
  {
    switch (PeriphClkInit->Lpuart1ClockSelection)
 800beb8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bebc:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800bec0:	2b05      	cmp	r3, #5
 800bec2:	d825      	bhi.n	800bf10 <HAL_RCCEx_PeriphCLKConfig+0xb74>
 800bec4:	a201      	add	r2, pc, #4	@ (adr r2, 800becc <HAL_RCCEx_PeriphCLKConfig+0xb30>)
 800bec6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800beca:	bf00      	nop
 800becc:	0800bf19 	.word	0x0800bf19
 800bed0:	0800bee5 	.word	0x0800bee5
 800bed4:	0800befb 	.word	0x0800befb
 800bed8:	0800bf19 	.word	0x0800bf19
 800bedc:	0800bf19 	.word	0x0800bf19
 800bee0:	0800bf19 	.word	0x0800bf19
      case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bee4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bee8:	3308      	adds	r3, #8
 800beea:	2101      	movs	r1, #1
 800beec:	4618      	mov	r0, r3
 800beee:	f000 ff01 	bl	800ccf4 <RCCEx_PLL2_Config>
 800bef2:	4603      	mov	r3, r0
 800bef4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800bef8:	e00f      	b.n	800bf1a <HAL_RCCEx_PeriphCLKConfig+0xb7e>

      case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800befa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800befe:	3328      	adds	r3, #40	@ 0x28
 800bf00:	2101      	movs	r1, #1
 800bf02:	4618      	mov	r0, r3
 800bf04:	f000 ffa8 	bl	800ce58 <RCCEx_PLL3_Config>
 800bf08:	4603      	mov	r3, r0
 800bf0a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800bf0e:	e004      	b.n	800bf1a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        /* LSE,  oscillator is used as source of LPUART1 clock */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bf10:	2301      	movs	r3, #1
 800bf12:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bf16:	e000      	b.n	800bf1a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        break;
 800bf18:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bf1a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf1e:	2b00      	cmp	r3, #0
 800bf20:	d10b      	bne.n	800bf3a <HAL_RCCEx_PeriphCLKConfig+0xb9e>
    {
      /* Set the source of LPUART1 clock */
      __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
 800bf22:	4b6c      	ldr	r3, [pc, #432]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bf24:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800bf26:	f023 0107 	bic.w	r1, r3, #7
 800bf2a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf2e:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800bf32:	4a68      	ldr	r2, [pc, #416]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bf34:	430b      	orrs	r3, r1
 800bf36:	6593      	str	r3, [r2, #88]	@ 0x58
 800bf38:	e003      	b.n	800bf42 <HAL_RCCEx_PeriphCLKConfig+0xba6>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bf3a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf3e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
 800bf42:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf46:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bf4a:	f002 0320 	and.w	r3, r2, #32
 800bf4e:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
 800bf52:	2300      	movs	r3, #0
 800bf54:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
 800bf58:	e9d7 1228 	ldrd	r1, r2, [r7, #160]	@ 0xa0
 800bf5c:	460b      	mov	r3, r1
 800bf5e:	4313      	orrs	r3, r2
 800bf60:	d055      	beq.n	800c00e <HAL_RCCEx_PeriphCLKConfig+0xc72>
  {
    switch (PeriphClkInit->Lptim1ClockSelection)
 800bf62:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf66:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800bf6a:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800bf6e:	d033      	beq.n	800bfd8 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
 800bf70:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800bf74:	d82c      	bhi.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bf76:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800bf7a:	d02f      	beq.n	800bfdc <HAL_RCCEx_PeriphCLKConfig+0xc40>
 800bf7c:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800bf80:	d826      	bhi.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bf82:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bf86:	d02b      	beq.n	800bfe0 <HAL_RCCEx_PeriphCLKConfig+0xc44>
 800bf88:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bf8c:	d820      	bhi.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bf8e:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bf92:	d012      	beq.n	800bfba <HAL_RCCEx_PeriphCLKConfig+0xc1e>
 800bf94:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bf98:	d81a      	bhi.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800bf9a:	2b00      	cmp	r3, #0
 800bf9c:	d022      	beq.n	800bfe4 <HAL_RCCEx_PeriphCLKConfig+0xc48>
 800bf9e:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800bfa2:	d115      	bne.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bfa4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bfa8:	3308      	adds	r3, #8
 800bfaa:	2100      	movs	r1, #0
 800bfac:	4618      	mov	r0, r3
 800bfae:	f000 fea1 	bl	800ccf4 <RCCEx_PLL2_Config>
 800bfb2:	4603      	mov	r3, r0
 800bfb4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800bfb8:	e015      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>

      case RCC_LPTIM1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800bfba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bfbe:	3328      	adds	r3, #40	@ 0x28
 800bfc0:	2102      	movs	r1, #2
 800bfc2:	4618      	mov	r0, r3
 800bfc4:	f000 ff48 	bl	800ce58 <RCCEx_PLL3_Config>
 800bfc8:	4603      	mov	r3, r0
 800bfca:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800bfce:	e00a      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bfd0:	2301      	movs	r3, #1
 800bfd2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bfd6:	e006      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bfd8:	bf00      	nop
 800bfda:	e004      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bfdc:	bf00      	nop
 800bfde:	e002      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bfe0:	bf00      	nop
 800bfe2:	e000      	b.n	800bfe6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800bfe4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bfe6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bfea:	2b00      	cmp	r3, #0
 800bfec:	d10b      	bne.n	800c006 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
    {
      /* Set the source of LPTIM1 clock*/
      __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
 800bfee:	4b39      	ldr	r3, [pc, #228]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800bff0:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800bff2:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800bff6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bffa:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800bffe:	4a35      	ldr	r2, [pc, #212]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c000:	430b      	orrs	r3, r1
 800c002:	6553      	str	r3, [r2, #84]	@ 0x54
 800c004:	e003      	b.n	800c00e <HAL_RCCEx_PeriphCLKConfig+0xc72>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c006:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c00a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
 800c00e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c012:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c016:	f002 0340 	and.w	r3, r2, #64	@ 0x40
 800c01a:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800c01e:	2300      	movs	r3, #0
 800c020:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800c024:	e9d7 1226 	ldrd	r1, r2, [r7, #152]	@ 0x98
 800c028:	460b      	mov	r3, r1
 800c02a:	4313      	orrs	r3, r2
 800c02c:	d058      	beq.n	800c0e0 <HAL_RCCEx_PeriphCLKConfig+0xd44>
  {
    switch (PeriphClkInit->Lptim2ClockSelection)
 800c02e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c032:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800c036:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800c03a:	d033      	beq.n	800c0a4 <HAL_RCCEx_PeriphCLKConfig+0xd08>
 800c03c:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800c040:	d82c      	bhi.n	800c09c <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c042:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c046:	d02f      	beq.n	800c0a8 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
 800c048:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c04c:	d826      	bhi.n	800c09c <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c04e:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800c052:	d02b      	beq.n	800c0ac <HAL_RCCEx_PeriphCLKConfig+0xd10>
 800c054:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800c058:	d820      	bhi.n	800c09c <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c05a:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800c05e:	d012      	beq.n	800c086 <HAL_RCCEx_PeriphCLKConfig+0xcea>
 800c060:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800c064:	d81a      	bhi.n	800c09c <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c066:	2b00      	cmp	r3, #0
 800c068:	d022      	beq.n	800c0b0 <HAL_RCCEx_PeriphCLKConfig+0xd14>
 800c06a:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
 800c06e:	d115      	bne.n	800c09c <HAL_RCCEx_PeriphCLKConfig+0xd00>
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c070:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c074:	3308      	adds	r3, #8
 800c076:	2100      	movs	r1, #0
 800c078:	4618      	mov	r0, r3
 800c07a:	f000 fe3b 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c07e:	4603      	mov	r3, r0
 800c080:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800c084:	e015      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>

      case RCC_LPTIM2CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c086:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c08a:	3328      	adds	r3, #40	@ 0x28
 800c08c:	2102      	movs	r1, #2
 800c08e:	4618      	mov	r0, r3
 800c090:	f000 fee2 	bl	800ce58 <RCCEx_PLL3_Config>
 800c094:	4603      	mov	r3, r0
 800c096:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800c09a:	e00a      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c09c:	2301      	movs	r3, #1
 800c09e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c0a2:	e006      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c0a4:	bf00      	nop
 800c0a6:	e004      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c0a8:	bf00      	nop
 800c0aa:	e002      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c0ac:	bf00      	nop
 800c0ae:	e000      	b.n	800c0b2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c0b0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c0b2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c0b6:	2b00      	cmp	r3, #0
 800c0b8:	d10e      	bne.n	800c0d8 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
    {
      /* Set the source of LPTIM2 clock*/
      __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
 800c0ba:	4b06      	ldr	r3, [pc, #24]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c0bc:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c0be:	f423 51e0 	bic.w	r1, r3, #7168	@ 0x1c00
 800c0c2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0c6:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800c0ca:	4a02      	ldr	r2, [pc, #8]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c0cc:	430b      	orrs	r3, r1
 800c0ce:	6593      	str	r3, [r2, #88]	@ 0x58
 800c0d0:	e006      	b.n	800c0e0 <HAL_RCCEx_PeriphCLKConfig+0xd44>
 800c0d2:	bf00      	nop
 800c0d4:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c0d8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c0dc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM345 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
 800c0e0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0e4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c0e8:	f002 0380 	and.w	r3, r2, #128	@ 0x80
 800c0ec:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800c0f0:	2300      	movs	r3, #0
 800c0f2:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800c0f6:	e9d7 1224 	ldrd	r1, r2, [r7, #144]	@ 0x90
 800c0fa:	460b      	mov	r3, r1
 800c0fc:	4313      	orrs	r3, r2
 800c0fe:	d055      	beq.n	800c1ac <HAL_RCCEx_PeriphCLKConfig+0xe10>
  {
    switch (PeriphClkInit->Lptim345ClockSelection)
 800c100:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c104:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800c108:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800c10c:	d033      	beq.n	800c176 <HAL_RCCEx_PeriphCLKConfig+0xdda>
 800c10e:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800c112:	d82c      	bhi.n	800c16e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c114:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800c118:	d02f      	beq.n	800c17a <HAL_RCCEx_PeriphCLKConfig+0xdde>
 800c11a:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800c11e:	d826      	bhi.n	800c16e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c120:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800c124:	d02b      	beq.n	800c17e <HAL_RCCEx_PeriphCLKConfig+0xde2>
 800c126:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800c12a:	d820      	bhi.n	800c16e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c12c:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800c130:	d012      	beq.n	800c158 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
 800c132:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800c136:	d81a      	bhi.n	800c16e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c138:	2b00      	cmp	r3, #0
 800c13a:	d022      	beq.n	800c182 <HAL_RCCEx_PeriphCLKConfig+0xde6>
 800c13c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800c140:	d115      	bne.n	800c16e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
      case RCC_LPTIM345CLKSOURCE_PCLK4:      /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c142:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c146:	3308      	adds	r3, #8
 800c148:	2100      	movs	r1, #0
 800c14a:	4618      	mov	r0, r3
 800c14c:	f000 fdd2 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c150:	4603      	mov	r3, r0
 800c152:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800c156:	e015      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>

      case RCC_LPTIM345CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c158:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c15c:	3328      	adds	r3, #40	@ 0x28
 800c15e:	2102      	movs	r1, #2
 800c160:	4618      	mov	r0, r3
 800c162:	f000 fe79 	bl	800ce58 <RCCEx_PLL3_Config>
 800c166:	4603      	mov	r3, r0
 800c168:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800c16c:	e00a      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c16e:	2301      	movs	r3, #1
 800c170:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c174:	e006      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c176:	bf00      	nop
 800c178:	e004      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c17a:	bf00      	nop
 800c17c:	e002      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c17e:	bf00      	nop
 800c180:	e000      	b.n	800c184 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c182:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c184:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c188:	2b00      	cmp	r3, #0
 800c18a:	d10b      	bne.n	800c1a4 <HAL_RCCEx_PeriphCLKConfig+0xe08>
    {
      /* Set the source of LPTIM3/4/5 clock */
      __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
 800c18c:	4bbb      	ldr	r3, [pc, #748]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c18e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c190:	f423 4160 	bic.w	r1, r3, #57344	@ 0xe000
 800c194:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c198:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800c19c:	4ab7      	ldr	r2, [pc, #732]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c19e:	430b      	orrs	r3, r1
 800c1a0:	6593      	str	r3, [r2, #88]	@ 0x58
 800c1a2:	e003      	b.n	800c1ac <HAL_RCCEx_PeriphCLKConfig+0xe10>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c1a4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c1a8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

    __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);

  }
#else
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
 800c1ac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1b0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c1b4:	f002 0308 	and.w	r3, r2, #8
 800c1b8:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800c1bc:	2300      	movs	r3, #0
 800c1be:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800c1c2:	e9d7 1222 	ldrd	r1, r2, [r7, #136]	@ 0x88
 800c1c6:	460b      	mov	r3, r1
 800c1c8:	4313      	orrs	r3, r2
 800c1ca:	d01e      	beq.n	800c20a <HAL_RCCEx_PeriphCLKConfig+0xe6e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));

    if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
 800c1cc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1d0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800c1d4:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c1d8:	d10c      	bne.n	800c1f4 <HAL_RCCEx_PeriphCLKConfig+0xe58>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800c1da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1de:	3328      	adds	r3, #40	@ 0x28
 800c1e0:	2102      	movs	r1, #2
 800c1e2:	4618      	mov	r0, r3
 800c1e4:	f000 fe38 	bl	800ce58 <RCCEx_PLL3_Config>
 800c1e8:	4603      	mov	r3, r0
 800c1ea:	2b00      	cmp	r3, #0
 800c1ec:	d002      	beq.n	800c1f4 <HAL_RCCEx_PeriphCLKConfig+0xe58>
      {
        status = HAL_ERROR;
 800c1ee:	2301      	movs	r3, #1
 800c1f0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
 800c1f4:	4ba1      	ldr	r3, [pc, #644]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c1f6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c1f8:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800c1fc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c200:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800c204:	4a9d      	ldr	r2, [pc, #628]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c206:	430b      	orrs	r3, r1
 800c208:	6553      	str	r3, [r2, #84]	@ 0x54

  }
#endif /* I2C5 */

  /*------------------------------ I2C4 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
 800c20a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c20e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c212:	f002 0310 	and.w	r3, r2, #16
 800c216:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800c21a:	2300      	movs	r3, #0
 800c21c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800c220:	e9d7 1220 	ldrd	r1, r2, [r7, #128]	@ 0x80
 800c224:	460b      	mov	r3, r1
 800c226:	4313      	orrs	r3, r2
 800c228:	d01e      	beq.n	800c268 <HAL_RCCEx_PeriphCLKConfig+0xecc>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));

    if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
 800c22a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c22e:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800c232:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800c236:	d10c      	bne.n	800c252 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800c238:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c23c:	3328      	adds	r3, #40	@ 0x28
 800c23e:	2102      	movs	r1, #2
 800c240:	4618      	mov	r0, r3
 800c242:	f000 fe09 	bl	800ce58 <RCCEx_PLL3_Config>
 800c246:	4603      	mov	r3, r0
 800c248:	2b00      	cmp	r3, #0
 800c24a:	d002      	beq.n	800c252 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
      {
        status = HAL_ERROR;
 800c24c:	2301      	movs	r3, #1
 800c24e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
 800c252:	4b8a      	ldr	r3, [pc, #552]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c254:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c256:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800c25a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c25e:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800c262:	4a86      	ldr	r2, [pc, #536]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c264:	430b      	orrs	r3, r1
 800c266:	6593      	str	r3, [r2, #88]	@ 0x58

  }

  /*---------------------------- ADC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800c268:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c26c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c270:	f402 2300 	and.w	r3, r2, #524288	@ 0x80000
 800c274:	67bb      	str	r3, [r7, #120]	@ 0x78
 800c276:	2300      	movs	r3, #0
 800c278:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800c27a:	e9d7 121e 	ldrd	r1, r2, [r7, #120]	@ 0x78
 800c27e:	460b      	mov	r3, r1
 800c280:	4313      	orrs	r3, r2
 800c282:	d03e      	beq.n	800c302 <HAL_RCCEx_PeriphCLKConfig+0xf66>
  {
    switch (PeriphClkInit->AdcClockSelection)
 800c284:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c288:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800c28c:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800c290:	d022      	beq.n	800c2d8 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
 800c292:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800c296:	d81b      	bhi.n	800c2d0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
 800c298:	2b00      	cmp	r3, #0
 800c29a:	d003      	beq.n	800c2a4 <HAL_RCCEx_PeriphCLKConfig+0xf08>
 800c29c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c2a0:	d00b      	beq.n	800c2ba <HAL_RCCEx_PeriphCLKConfig+0xf1e>
 800c2a2:	e015      	b.n	800c2d0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
    {

      case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c2a4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2a8:	3308      	adds	r3, #8
 800c2aa:	2100      	movs	r1, #0
 800c2ac:	4618      	mov	r0, r3
 800c2ae:	f000 fd21 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c2b2:	4603      	mov	r3, r0
 800c2b4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800c2b8:	e00f      	b.n	800c2da <HAL_RCCEx_PeriphCLKConfig+0xf3e>

      case RCC_ADCCLKSOURCE_PLL3:  /* PLL3 is used as clock source for ADC*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c2ba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2be:	3328      	adds	r3, #40	@ 0x28
 800c2c0:	2102      	movs	r1, #2
 800c2c2:	4618      	mov	r0, r3
 800c2c4:	f000 fdc8 	bl	800ce58 <RCCEx_PLL3_Config>
 800c2c8:	4603      	mov	r3, r0
 800c2ca:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800c2ce:	e004      	b.n	800c2da <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
        /* ADC clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c2d0:	2301      	movs	r3, #1
 800c2d2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c2d6:	e000      	b.n	800c2da <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        break;
 800c2d8:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c2da:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c2de:	2b00      	cmp	r3, #0
 800c2e0:	d10b      	bne.n	800c2fa <HAL_RCCEx_PeriphCLKConfig+0xf5e>
    {
      /* Set the source of ADC clock*/
      __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800c2e2:	4b66      	ldr	r3, [pc, #408]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c2e4:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c2e6:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
 800c2ea:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2ee:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800c2f2:	4a62      	ldr	r2, [pc, #392]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c2f4:	430b      	orrs	r3, r1
 800c2f6:	6593      	str	r3, [r2, #88]	@ 0x58
 800c2f8:	e003      	b.n	800c302 <HAL_RCCEx_PeriphCLKConfig+0xf66>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c2fa:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c2fe:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*------------------------------ USB Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800c302:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c306:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c30a:	f402 2380 	and.w	r3, r2, #262144	@ 0x40000
 800c30e:	673b      	str	r3, [r7, #112]	@ 0x70
 800c310:	2300      	movs	r3, #0
 800c312:	677b      	str	r3, [r7, #116]	@ 0x74
 800c314:	e9d7 121c 	ldrd	r1, r2, [r7, #112]	@ 0x70
 800c318:	460b      	mov	r3, r1
 800c31a:	4313      	orrs	r3, r2
 800c31c:	d03b      	beq.n	800c396 <HAL_RCCEx_PeriphCLKConfig+0xffa>
  {

    switch (PeriphClkInit->UsbClockSelection)
 800c31e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c322:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800c326:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800c32a:	d01f      	beq.n	800c36c <HAL_RCCEx_PeriphCLKConfig+0xfd0>
 800c32c:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800c330:	d818      	bhi.n	800c364 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
 800c332:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800c336:	d003      	beq.n	800c340 <HAL_RCCEx_PeriphCLKConfig+0xfa4>
 800c338:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800c33c:	d007      	beq.n	800c34e <HAL_RCCEx_PeriphCLKConfig+0xfb2>
 800c33e:	e011      	b.n	800c364 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
    {
      case RCC_USBCLKSOURCE_PLL:      /* PLL is used as clock source for USB*/
        /* Enable USB Clock output generated form System USB . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c340:	4b4e      	ldr	r3, [pc, #312]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c342:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c344:	4a4d      	ldr	r2, [pc, #308]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c346:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c34a:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* USB clock source configuration done later after clock selection check */
        break;
 800c34c:	e00f      	b.n	800c36e <HAL_RCCEx_PeriphCLKConfig+0xfd2>

      case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/

        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c34e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c352:	3328      	adds	r3, #40	@ 0x28
 800c354:	2101      	movs	r1, #1
 800c356:	4618      	mov	r0, r3
 800c358:	f000 fd7e 	bl	800ce58 <RCCEx_PLL3_Config>
 800c35c:	4603      	mov	r3, r0
 800c35e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* USB clock source configuration done later after clock selection check */
        break;
 800c362:	e004      	b.n	800c36e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        /* HSI48 oscillator is used as source of USB clock */
        /* USB clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c364:	2301      	movs	r3, #1
 800c366:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c36a:	e000      	b.n	800c36e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        break;
 800c36c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c36e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c372:	2b00      	cmp	r3, #0
 800c374:	d10b      	bne.n	800c38e <HAL_RCCEx_PeriphCLKConfig+0xff2>
    {
      /* Set the source of USB clock*/
      __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800c376:	4b41      	ldr	r3, [pc, #260]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c378:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c37a:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800c37e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c382:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800c386:	4a3d      	ldr	r2, [pc, #244]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c388:	430b      	orrs	r3, r1
 800c38a:	6553      	str	r3, [r2, #84]	@ 0x54
 800c38c:	e003      	b.n	800c396 <HAL_RCCEx_PeriphCLKConfig+0xffa>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c38e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c392:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------------- SDMMC Configuration ------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
 800c396:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c39a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c39e:	f402 3380 	and.w	r3, r2, #65536	@ 0x10000
 800c3a2:	66bb      	str	r3, [r7, #104]	@ 0x68
 800c3a4:	2300      	movs	r3, #0
 800c3a6:	66fb      	str	r3, [r7, #108]	@ 0x6c
 800c3a8:	e9d7 121a 	ldrd	r1, r2, [r7, #104]	@ 0x68
 800c3ac:	460b      	mov	r3, r1
 800c3ae:	4313      	orrs	r3, r2
 800c3b0:	d031      	beq.n	800c416 <HAL_RCCEx_PeriphCLKConfig+0x107a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));

    switch (PeriphClkInit->SdmmcClockSelection)
 800c3b2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c3b6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c3b8:	2b00      	cmp	r3, #0
 800c3ba:	d003      	beq.n	800c3c4 <HAL_RCCEx_PeriphCLKConfig+0x1028>
 800c3bc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c3c0:	d007      	beq.n	800c3d2 <HAL_RCCEx_PeriphCLKConfig+0x1036>
 800c3c2:	e011      	b.n	800c3e8 <HAL_RCCEx_PeriphCLKConfig+0x104c>
    {
      case RCC_SDMMCCLKSOURCE_PLL:      /* PLL is used as clock source for SDMMC*/
        /* Enable SDMMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c3c4:	4b2d      	ldr	r3, [pc, #180]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c3c6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c3c8:	4a2c      	ldr	r2, [pc, #176]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c3ca:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c3ce:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800c3d0:	e00e      	b.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800c3d2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c3d6:	3308      	adds	r3, #8
 800c3d8:	2102      	movs	r1, #2
 800c3da:	4618      	mov	r0, r3
 800c3dc:	f000 fc8a 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c3e0:	4603      	mov	r3, r0
 800c3e2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800c3e6:	e003      	b.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      default:
        ret = HAL_ERROR;
 800c3e8:	2301      	movs	r3, #1
 800c3ea:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c3ee:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c3f0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c3f4:	2b00      	cmp	r3, #0
 800c3f6:	d10a      	bne.n	800c40e <HAL_RCCEx_PeriphCLKConfig+0x1072>
    {
      /* Set the source of SDMMC clock*/
      __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
 800c3f8:	4b20      	ldr	r3, [pc, #128]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c3fa:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800c3fc:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800c400:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c404:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c406:	4a1d      	ldr	r2, [pc, #116]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c408:	430b      	orrs	r3, r1
 800c40a:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800c40c:	e003      	b.n	800c416 <HAL_RCCEx_PeriphCLKConfig+0x107a>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c40e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c412:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /* LTDC */

  /*------------------------------ RNG Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
 800c416:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c41a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c41e:	f402 3300 	and.w	r3, r2, #131072	@ 0x20000
 800c422:	663b      	str	r3, [r7, #96]	@ 0x60
 800c424:	2300      	movs	r3, #0
 800c426:	667b      	str	r3, [r7, #100]	@ 0x64
 800c428:	e9d7 1218 	ldrd	r1, r2, [r7, #96]	@ 0x60
 800c42c:	460b      	mov	r3, r1
 800c42e:	4313      	orrs	r3, r2
 800c430:	d03b      	beq.n	800c4aa <HAL_RCCEx_PeriphCLKConfig+0x110e>
  {

    switch (PeriphClkInit->RngClockSelection)
 800c432:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c436:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800c43a:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800c43e:	d018      	beq.n	800c472 <HAL_RCCEx_PeriphCLKConfig+0x10d6>
 800c440:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800c444:	d811      	bhi.n	800c46a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800c446:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800c44a:	d014      	beq.n	800c476 <HAL_RCCEx_PeriphCLKConfig+0x10da>
 800c44c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800c450:	d80b      	bhi.n	800c46a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800c452:	2b00      	cmp	r3, #0
 800c454:	d014      	beq.n	800c480 <HAL_RCCEx_PeriphCLKConfig+0x10e4>
 800c456:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800c45a:	d106      	bne.n	800c46a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
    {
      case RCC_RNGCLKSOURCE_PLL:     /* PLL is used as clock source for RNG*/
        /* Enable RNG Clock output generated form System RNG . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c45c:	4b07      	ldr	r3, [pc, #28]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c45e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c460:	4a06      	ldr	r2, [pc, #24]	@ (800c47c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c462:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c466:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* RNG clock source configuration done later after clock selection check */
        break;
 800c468:	e00b      	b.n	800c482 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        /* HSI48 oscillator is used as source of RNG clock */
        /* RNG clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c46a:	2301      	movs	r3, #1
 800c46c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c470:	e007      	b.n	800c482 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800c472:	bf00      	nop
 800c474:	e005      	b.n	800c482 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800c476:	bf00      	nop
 800c478:	e003      	b.n	800c482 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
 800c47a:	bf00      	nop
 800c47c:	58024400 	.word	0x58024400
        break;
 800c480:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c482:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c486:	2b00      	cmp	r3, #0
 800c488:	d10b      	bne.n	800c4a2 <HAL_RCCEx_PeriphCLKConfig+0x1106>
    {
      /* Set the source of RNG clock*/
      __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
 800c48a:	4bba      	ldr	r3, [pc, #744]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c48c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c48e:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800c492:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c496:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800c49a:	4ab6      	ldr	r2, [pc, #728]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c49c:	430b      	orrs	r3, r1
 800c49e:	6553      	str	r3, [r2, #84]	@ 0x54
 800c4a0:	e003      	b.n	800c4aa <HAL_RCCEx_PeriphCLKConfig+0x110e>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c4a2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c4a6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------ SWPMI1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
 800c4aa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c4ae:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c4b2:	f402 1380 	and.w	r3, r2, #1048576	@ 0x100000
 800c4b6:	65bb      	str	r3, [r7, #88]	@ 0x58
 800c4b8:	2300      	movs	r3, #0
 800c4ba:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800c4bc:	e9d7 1216 	ldrd	r1, r2, [r7, #88]	@ 0x58
 800c4c0:	460b      	mov	r3, r1
 800c4c2:	4313      	orrs	r3, r2
 800c4c4:	d009      	beq.n	800c4da <HAL_RCCEx_PeriphCLKConfig+0x113e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));

    /* Configure the SWPMI1 interface clock source */
    __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
 800c4c6:	4bab      	ldr	r3, [pc, #684]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c4c8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c4ca:	f023 4100 	bic.w	r1, r3, #2147483648	@ 0x80000000
 800c4ce:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c4d2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800c4d4:	4aa7      	ldr	r2, [pc, #668]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c4d6:	430b      	orrs	r3, r1
 800c4d8:	6513      	str	r3, [r2, #80]	@ 0x50
  }
#if defined(HRTIM1)
  /*------------------------------ HRTIM1 clock Configuration ----------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
 800c4da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c4de:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c4e2:	f002 5380 	and.w	r3, r2, #268435456	@ 0x10000000
 800c4e6:	653b      	str	r3, [r7, #80]	@ 0x50
 800c4e8:	2300      	movs	r3, #0
 800c4ea:	657b      	str	r3, [r7, #84]	@ 0x54
 800c4ec:	e9d7 1214 	ldrd	r1, r2, [r7, #80]	@ 0x50
 800c4f0:	460b      	mov	r3, r1
 800c4f2:	4313      	orrs	r3, r2
 800c4f4:	d00a      	beq.n	800c50c <HAL_RCCEx_PeriphCLKConfig+0x1170>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));

    /* Configure the HRTIM1 clock source */
    __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
 800c4f6:	4b9f      	ldr	r3, [pc, #636]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c4f8:	691b      	ldr	r3, [r3, #16]
 800c4fa:	f423 4180 	bic.w	r1, r3, #16384	@ 0x4000
 800c4fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c502:	f8d3 30b8 	ldr.w	r3, [r3, #184]	@ 0xb8
 800c506:	4a9b      	ldr	r2, [pc, #620]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c508:	430b      	orrs	r3, r1
 800c50a:	6113      	str	r3, [r2, #16]
  }
#endif  /*HRTIM1*/
  /*------------------------------ DFSDM1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
 800c50c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c510:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c514:	f402 1300 	and.w	r3, r2, #2097152	@ 0x200000
 800c518:	64bb      	str	r3, [r7, #72]	@ 0x48
 800c51a:	2300      	movs	r3, #0
 800c51c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800c51e:	e9d7 1212 	ldrd	r1, r2, [r7, #72]	@ 0x48
 800c522:	460b      	mov	r3, r1
 800c524:	4313      	orrs	r3, r2
 800c526:	d009      	beq.n	800c53c <HAL_RCCEx_PeriphCLKConfig+0x11a0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));

    /* Configure the DFSDM1 interface clock source */
    __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
 800c528:	4b92      	ldr	r3, [pc, #584]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c52a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c52c:	f023 7180 	bic.w	r1, r3, #16777216	@ 0x1000000
 800c530:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c534:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800c536:	4a8f      	ldr	r2, [pc, #572]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c538:	430b      	orrs	r3, r1
 800c53a:	6513      	str	r3, [r2, #80]	@ 0x50
    __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
  }
#endif  /* DFSDM2 */

  /*------------------------------------ TIM configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
 800c53c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c540:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c544:	f002 4380 	and.w	r3, r2, #1073741824	@ 0x40000000
 800c548:	643b      	str	r3, [r7, #64]	@ 0x40
 800c54a:	2300      	movs	r3, #0
 800c54c:	647b      	str	r3, [r7, #68]	@ 0x44
 800c54e:	e9d7 1210 	ldrd	r1, r2, [r7, #64]	@ 0x40
 800c552:	460b      	mov	r3, r1
 800c554:	4313      	orrs	r3, r2
 800c556:	d00e      	beq.n	800c576 <HAL_RCCEx_PeriphCLKConfig+0x11da>
  {
    /* Check the parameters */
    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));

    /* Configure Timer Prescaler */
    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
 800c558:	4b86      	ldr	r3, [pc, #536]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c55a:	691b      	ldr	r3, [r3, #16]
 800c55c:	4a85      	ldr	r2, [pc, #532]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c55e:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
 800c562:	6113      	str	r3, [r2, #16]
 800c564:	4b83      	ldr	r3, [pc, #524]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c566:	6919      	ldr	r1, [r3, #16]
 800c568:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c56c:	f8d3 30bc 	ldr.w	r3, [r3, #188]	@ 0xbc
 800c570:	4a80      	ldr	r2, [pc, #512]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c572:	430b      	orrs	r3, r1
 800c574:	6113      	str	r3, [r2, #16]
  }

  /*------------------------------------ CKPER configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
 800c576:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c57a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c57e:	f002 4300 	and.w	r3, r2, #2147483648	@ 0x80000000
 800c582:	63bb      	str	r3, [r7, #56]	@ 0x38
 800c584:	2300      	movs	r3, #0
 800c586:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800c588:	e9d7 120e 	ldrd	r1, r2, [r7, #56]	@ 0x38
 800c58c:	460b      	mov	r3, r1
 800c58e:	4313      	orrs	r3, r2
 800c590:	d009      	beq.n	800c5a6 <HAL_RCCEx_PeriphCLKConfig+0x120a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));

    /* Configure the CKPER clock source */
    __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
 800c592:	4b78      	ldr	r3, [pc, #480]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c594:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800c596:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800c59a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c59e:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c5a0:	4a74      	ldr	r2, [pc, #464]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c5a2:	430b      	orrs	r3, r1
 800c5a4:	64d3      	str	r3, [r2, #76]	@ 0x4c
  }

  /*------------------------------ CEC Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
 800c5a6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5aa:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c5ae:	f402 0300 	and.w	r3, r2, #8388608	@ 0x800000
 800c5b2:	633b      	str	r3, [r7, #48]	@ 0x30
 800c5b4:	2300      	movs	r3, #0
 800c5b6:	637b      	str	r3, [r7, #52]	@ 0x34
 800c5b8:	e9d7 120c 	ldrd	r1, r2, [r7, #48]	@ 0x30
 800c5bc:	460b      	mov	r3, r1
 800c5be:	4313      	orrs	r3, r2
 800c5c0:	d00a      	beq.n	800c5d8 <HAL_RCCEx_PeriphCLKConfig+0x123c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));

    /* Configure the CEC interface clock source */
    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
 800c5c2:	4b6c      	ldr	r3, [pc, #432]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c5c4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c5c6:	f423 0140 	bic.w	r1, r3, #12582912	@ 0xc00000
 800c5ca:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5ce:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800c5d2:	4a68      	ldr	r2, [pc, #416]	@ (800c774 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c5d4:	430b      	orrs	r3, r1
 800c5d6:	6553      	str	r3, [r2, #84]	@ 0x54
  }

  /*---------------------------- PLL2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
 800c5d8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5dc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c5e0:	2100      	movs	r1, #0
 800c5e2:	62b9      	str	r1, [r7, #40]	@ 0x28
 800c5e4:	f003 0301 	and.w	r3, r3, #1
 800c5e8:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800c5ea:	e9d7 120a 	ldrd	r1, r2, [r7, #40]	@ 0x28
 800c5ee:	460b      	mov	r3, r1
 800c5f0:	4313      	orrs	r3, r2
 800c5f2:	d011      	beq.n	800c618 <HAL_RCCEx_PeriphCLKConfig+0x127c>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c5f4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5f8:	3308      	adds	r3, #8
 800c5fa:	2100      	movs	r1, #0
 800c5fc:	4618      	mov	r0, r3
 800c5fe:	f000 fb79 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c602:	4603      	mov	r3, r0
 800c604:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c608:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c60c:	2b00      	cmp	r3, #0
 800c60e:	d003      	beq.n	800c618 <HAL_RCCEx_PeriphCLKConfig+0x127c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c610:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c614:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
 800c618:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c61c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c620:	2100      	movs	r1, #0
 800c622:	6239      	str	r1, [r7, #32]
 800c624:	f003 0302 	and.w	r3, r3, #2
 800c628:	627b      	str	r3, [r7, #36]	@ 0x24
 800c62a:	e9d7 1208 	ldrd	r1, r2, [r7, #32]
 800c62e:	460b      	mov	r3, r1
 800c630:	4313      	orrs	r3, r2
 800c632:	d011      	beq.n	800c658 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800c634:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c638:	3308      	adds	r3, #8
 800c63a:	2101      	movs	r1, #1
 800c63c:	4618      	mov	r0, r3
 800c63e:	f000 fb59 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c642:	4603      	mov	r3, r0
 800c644:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c648:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c64c:	2b00      	cmp	r3, #0
 800c64e:	d003      	beq.n	800c658 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c650:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c654:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
 800c658:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c65c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c660:	2100      	movs	r1, #0
 800c662:	61b9      	str	r1, [r7, #24]
 800c664:	f003 0304 	and.w	r3, r3, #4
 800c668:	61fb      	str	r3, [r7, #28]
 800c66a:	e9d7 1206 	ldrd	r1, r2, [r7, #24]
 800c66e:	460b      	mov	r3, r1
 800c670:	4313      	orrs	r3, r2
 800c672:	d011      	beq.n	800c698 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800c674:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c678:	3308      	adds	r3, #8
 800c67a:	2102      	movs	r1, #2
 800c67c:	4618      	mov	r0, r3
 800c67e:	f000 fb39 	bl	800ccf4 <RCCEx_PLL2_Config>
 800c682:	4603      	mov	r3, r0
 800c684:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c688:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c68c:	2b00      	cmp	r3, #0
 800c68e:	d003      	beq.n	800c698 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c690:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c694:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  

  /*---------------------------- PLL3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
 800c698:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c69c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c6a0:	2100      	movs	r1, #0
 800c6a2:	6139      	str	r1, [r7, #16]
 800c6a4:	f003 0308 	and.w	r3, r3, #8
 800c6a8:	617b      	str	r3, [r7, #20]
 800c6aa:	e9d7 1204 	ldrd	r1, r2, [r7, #16]
 800c6ae:	460b      	mov	r3, r1
 800c6b0:	4313      	orrs	r3, r2
 800c6b2:	d011      	beq.n	800c6d8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800c6b4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6b8:	3328      	adds	r3, #40	@ 0x28
 800c6ba:	2100      	movs	r1, #0
 800c6bc:	4618      	mov	r0, r3
 800c6be:	f000 fbcb 	bl	800ce58 <RCCEx_PLL3_Config>
 800c6c2:	4603      	mov	r3, r0
 800c6c4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  
    if (ret == HAL_OK)
 800c6c8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c6cc:	2b00      	cmp	r3, #0
 800c6ce:	d003      	beq.n	800c6d8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c6d0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c6d4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
 800c6d8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6dc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c6e0:	2100      	movs	r1, #0
 800c6e2:	60b9      	str	r1, [r7, #8]
 800c6e4:	f003 0310 	and.w	r3, r3, #16
 800c6e8:	60fb      	str	r3, [r7, #12]
 800c6ea:	e9d7 1202 	ldrd	r1, r2, [r7, #8]
 800c6ee:	460b      	mov	r3, r1
 800c6f0:	4313      	orrs	r3, r2
 800c6f2:	d011      	beq.n	800c718 <HAL_RCCEx_PeriphCLKConfig+0x137c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c6f4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6f8:	3328      	adds	r3, #40	@ 0x28
 800c6fa:	2101      	movs	r1, #1
 800c6fc:	4618      	mov	r0, r3
 800c6fe:	f000 fbab 	bl	800ce58 <RCCEx_PLL3_Config>
 800c702:	4603      	mov	r3, r0
 800c704:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c708:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c70c:	2b00      	cmp	r3, #0
 800c70e:	d003      	beq.n	800c718 <HAL_RCCEx_PeriphCLKConfig+0x137c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c710:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c714:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
 800c718:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c71c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c720:	2100      	movs	r1, #0
 800c722:	6039      	str	r1, [r7, #0]
 800c724:	f003 0320 	and.w	r3, r3, #32
 800c728:	607b      	str	r3, [r7, #4]
 800c72a:	e9d7 1200 	ldrd	r1, r2, [r7]
 800c72e:	460b      	mov	r3, r1
 800c730:	4313      	orrs	r3, r2
 800c732:	d011      	beq.n	800c758 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c734:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c738:	3328      	adds	r3, #40	@ 0x28
 800c73a:	2102      	movs	r1, #2
 800c73c:	4618      	mov	r0, r3
 800c73e:	f000 fb8b 	bl	800ce58 <RCCEx_PLL3_Config>
 800c742:	4603      	mov	r3, r0
 800c744:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800c748:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c74c:	2b00      	cmp	r3, #0
 800c74e:	d003      	beq.n	800c758 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c750:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c754:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }

  if (status == HAL_OK)
 800c758:	f897 311e 	ldrb.w	r3, [r7, #286]	@ 0x11e
 800c75c:	2b00      	cmp	r3, #0
 800c75e:	d101      	bne.n	800c764 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
  {
    return HAL_OK;
 800c760:	2300      	movs	r3, #0
 800c762:	e000      	b.n	800c766 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
  }
  return HAL_ERROR;
 800c764:	2301      	movs	r3, #1
}
 800c766:	4618      	mov	r0, r3
 800c768:	f507 7790 	add.w	r7, r7, #288	@ 0x120
 800c76c:	46bd      	mov	sp, r7
 800c76e:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800c772:	bf00      	nop
 800c774:	58024400 	.word	0x58024400

0800c778 <HAL_RCCEx_GetD3PCLK1Freq>:
  * @note   Each time D3PCLK1 changes, this function must be called to update the
  *         right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval D3PCLK1 frequency
  */
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
 800c778:	b580      	push	{r7, lr}
 800c77a:	af00      	add	r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
 800c77c:	f7fe fd70 	bl	800b260 <HAL_RCC_GetHCLKFreq>
 800c780:	4602      	mov	r2, r0
 800c782:	4b06      	ldr	r3, [pc, #24]	@ (800c79c <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
 800c784:	6a1b      	ldr	r3, [r3, #32]
 800c786:	091b      	lsrs	r3, r3, #4
 800c788:	f003 0307 	and.w	r3, r3, #7
 800c78c:	4904      	ldr	r1, [pc, #16]	@ (800c7a0 <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
 800c78e:	5ccb      	ldrb	r3, [r1, r3]
 800c790:	f003 031f 	and.w	r3, r3, #31
 800c794:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
 800c798:	4618      	mov	r0, r3
 800c79a:	bd80      	pop	{r7, pc}
 800c79c:	58024400 	.word	0x58024400
 800c7a0:	0803196c 	.word	0x0803196c

0800c7a4 <HAL_RCCEx_GetPLL2ClockFreq>:
  *         right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL2_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
 800c7a4:	b480      	push	{r7}
 800c7a6:	b089      	sub	sp, #36	@ 0x24
 800c7a8:	af00      	add	r7, sp, #0
 800c7aa:	6078      	str	r0, [r7, #4]
  float_t fracn2, pll2vco;

  /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
     PLL2xCLK = PLL2_VCO / PLL2x
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800c7ac:	4ba1      	ldr	r3, [pc, #644]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c7ae:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c7b0:	f003 0303 	and.w	r3, r3, #3
 800c7b4:	61bb      	str	r3, [r7, #24]
  pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
 800c7b6:	4b9f      	ldr	r3, [pc, #636]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c7b8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800c7ba:	0b1b      	lsrs	r3, r3, #12
 800c7bc:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800c7c0:	617b      	str	r3, [r7, #20]
  pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
 800c7c2:	4b9c      	ldr	r3, [pc, #624]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c7c4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c7c6:	091b      	lsrs	r3, r3, #4
 800c7c8:	f003 0301 	and.w	r3, r3, #1
 800c7cc:	613b      	str	r3, [r7, #16]
  fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
 800c7ce:	4b99      	ldr	r3, [pc, #612]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c7d0:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800c7d2:	08db      	lsrs	r3, r3, #3
 800c7d4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800c7d8:	693a      	ldr	r2, [r7, #16]
 800c7da:	fb02 f303 	mul.w	r3, r2, r3
 800c7de:	ee07 3a90 	vmov	s15, r3
 800c7e2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c7e6:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll2m != 0U)
 800c7ea:	697b      	ldr	r3, [r7, #20]
 800c7ec:	2b00      	cmp	r3, #0
 800c7ee:	f000 8111 	beq.w	800ca14 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
  {
    switch (pllsource)
 800c7f2:	69bb      	ldr	r3, [r7, #24]
 800c7f4:	2b02      	cmp	r3, #2
 800c7f6:	f000 8083 	beq.w	800c900 <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
 800c7fa:	69bb      	ldr	r3, [r7, #24]
 800c7fc:	2b02      	cmp	r3, #2
 800c7fe:	f200 80a1 	bhi.w	800c944 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
 800c802:	69bb      	ldr	r3, [r7, #24]
 800c804:	2b00      	cmp	r3, #0
 800c806:	d003      	beq.n	800c810 <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
 800c808:	69bb      	ldr	r3, [r7, #24]
 800c80a:	2b01      	cmp	r3, #1
 800c80c:	d056      	beq.n	800c8bc <HAL_RCCEx_GetPLL2ClockFreq+0x118>
 800c80e:	e099      	b.n	800c944 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
    {

      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800c810:	4b88      	ldr	r3, [pc, #544]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c812:	681b      	ldr	r3, [r3, #0]
 800c814:	f003 0320 	and.w	r3, r3, #32
 800c818:	2b00      	cmp	r3, #0
 800c81a:	d02d      	beq.n	800c878 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800c81c:	4b85      	ldr	r3, [pc, #532]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c81e:	681b      	ldr	r3, [r3, #0]
 800c820:	08db      	lsrs	r3, r3, #3
 800c822:	f003 0303 	and.w	r3, r3, #3
 800c826:	4a84      	ldr	r2, [pc, #528]	@ (800ca38 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
 800c828:	fa22 f303 	lsr.w	r3, r2, r3
 800c82c:	60bb      	str	r3, [r7, #8]
          pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c82e:	68bb      	ldr	r3, [r7, #8]
 800c830:	ee07 3a90 	vmov	s15, r3
 800c834:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c838:	697b      	ldr	r3, [r7, #20]
 800c83a:	ee07 3a90 	vmov	s15, r3
 800c83e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c842:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c846:	4b7b      	ldr	r3, [pc, #492]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c848:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c84a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c84e:	ee07 3a90 	vmov	s15, r3
 800c852:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c856:	ed97 6a03 	vldr	s12, [r7, #12]
 800c85a:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800ca3c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c85e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c862:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c866:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c86a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c86e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c872:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800c876:	e087      	b.n	800c988 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c878:	697b      	ldr	r3, [r7, #20]
 800c87a:	ee07 3a90 	vmov	s15, r3
 800c87e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c882:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800ca40 <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
 800c886:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c88a:	4b6a      	ldr	r3, [pc, #424]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c88c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c88e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c892:	ee07 3a90 	vmov	s15, r3
 800c896:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c89a:	ed97 6a03 	vldr	s12, [r7, #12]
 800c89e:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800ca3c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c8a2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c8a6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c8aa:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c8ae:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c8b2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c8b6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c8ba:	e065      	b.n	800c988 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c8bc:	697b      	ldr	r3, [r7, #20]
 800c8be:	ee07 3a90 	vmov	s15, r3
 800c8c2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c8c6:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800ca44 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c8ca:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c8ce:	4b59      	ldr	r3, [pc, #356]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c8d0:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c8d2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c8d6:	ee07 3a90 	vmov	s15, r3
 800c8da:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c8de:	ed97 6a03 	vldr	s12, [r7, #12]
 800c8e2:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800ca3c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c8e6:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c8ea:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c8ee:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c8f2:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c8f6:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c8fa:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c8fe:	e043      	b.n	800c988 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c900:	697b      	ldr	r3, [r7, #20]
 800c902:	ee07 3a90 	vmov	s15, r3
 800c906:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c90a:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800ca48 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
 800c90e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c912:	4b48      	ldr	r3, [pc, #288]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c914:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c916:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c91a:	ee07 3a90 	vmov	s15, r3
 800c91e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c922:	ed97 6a03 	vldr	s12, [r7, #12]
 800c926:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800ca3c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c92a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c92e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c932:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c936:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c93a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c93e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c942:	e021      	b.n	800c988 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      default:
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800c944:	697b      	ldr	r3, [r7, #20]
 800c946:	ee07 3a90 	vmov	s15, r3
 800c94a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c94e:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800ca44 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800c952:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800c956:	4b37      	ldr	r3, [pc, #220]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c958:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c95a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800c95e:	ee07 3a90 	vmov	s15, r3
 800c962:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800c966:	ed97 6a03 	vldr	s12, [r7, #12]
 800c96a:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800ca3c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800c96e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800c972:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800c976:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800c97a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800c97e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800c982:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800c986:	bf00      	nop
    }
    PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9)  + (float_t)1)) ;
 800c988:	4b2a      	ldr	r3, [pc, #168]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c98a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c98c:	0a5b      	lsrs	r3, r3, #9
 800c98e:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c992:	ee07 3a90 	vmov	s15, r3
 800c996:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c99a:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c99e:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c9a2:	edd7 6a07 	vldr	s13, [r7, #28]
 800c9a6:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c9aa:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c9ae:	ee17 2a90 	vmov	r2, s15
 800c9b2:	687b      	ldr	r3, [r7, #4]
 800c9b4:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
 800c9b6:	4b1f      	ldr	r3, [pc, #124]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c9b8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c9ba:	0c1b      	lsrs	r3, r3, #16
 800c9bc:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c9c0:	ee07 3a90 	vmov	s15, r3
 800c9c4:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c9c8:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c9cc:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c9d0:	edd7 6a07 	vldr	s13, [r7, #28]
 800c9d4:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800c9d8:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800c9dc:	ee17 2a90 	vmov	r2, s15
 800c9e0:	687b      	ldr	r3, [r7, #4]
 800c9e2:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
 800c9e4:	4b13      	ldr	r3, [pc, #76]	@ (800ca34 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800c9e6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800c9e8:	0e1b      	lsrs	r3, r3, #24
 800c9ea:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800c9ee:	ee07 3a90 	vmov	s15, r3
 800c9f2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800c9f6:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800c9fa:	ee37 7a87 	vadd.f32	s14, s15, s14
 800c9fe:	edd7 6a07 	vldr	s13, [r7, #28]
 800ca02:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800ca06:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800ca0a:	ee17 2a90 	vmov	r2, s15
 800ca0e:	687b      	ldr	r3, [r7, #4]
 800ca10:	609a      	str	r2, [r3, #8]
  {
    PLL2_Clocks->PLL2_P_Frequency = 0U;
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
    PLL2_Clocks->PLL2_R_Frequency = 0U;
  }
}
 800ca12:	e008      	b.n	800ca26 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
    PLL2_Clocks->PLL2_P_Frequency = 0U;
 800ca14:	687b      	ldr	r3, [r7, #4]
 800ca16:	2200      	movs	r2, #0
 800ca18:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
 800ca1a:	687b      	ldr	r3, [r7, #4]
 800ca1c:	2200      	movs	r2, #0
 800ca1e:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = 0U;
 800ca20:	687b      	ldr	r3, [r7, #4]
 800ca22:	2200      	movs	r2, #0
 800ca24:	609a      	str	r2, [r3, #8]
}
 800ca26:	bf00      	nop
 800ca28:	3724      	adds	r7, #36	@ 0x24
 800ca2a:	46bd      	mov	sp, r7
 800ca2c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ca30:	4770      	bx	lr
 800ca32:	bf00      	nop
 800ca34:	58024400 	.word	0x58024400
 800ca38:	03d09000 	.word	0x03d09000
 800ca3c:	46000000 	.word	0x46000000
 800ca40:	4c742400 	.word	0x4c742400
 800ca44:	4a742400 	.word	0x4a742400
 800ca48:	4bbebc20 	.word	0x4bbebc20

0800ca4c <HAL_RCCEx_GetPLL3ClockFreq>:
  *         right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL3_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
 800ca4c:	b480      	push	{r7}
 800ca4e:	b089      	sub	sp, #36	@ 0x24
 800ca50:	af00      	add	r7, sp, #0
 800ca52:	6078      	str	r0, [r7, #4]
  float_t fracn3, pll3vco;

  /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
     PLL3xCLK = PLL3_VCO / PLLxR
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800ca54:	4ba1      	ldr	r3, [pc, #644]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ca56:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ca58:	f003 0303 	and.w	r3, r3, #3
 800ca5c:	61bb      	str	r3, [r7, #24]
  pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20)  ;
 800ca5e:	4b9f      	ldr	r3, [pc, #636]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ca60:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ca62:	0d1b      	lsrs	r3, r3, #20
 800ca64:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800ca68:	617b      	str	r3, [r7, #20]
  pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
 800ca6a:	4b9c      	ldr	r3, [pc, #624]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ca6c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ca6e:	0a1b      	lsrs	r3, r3, #8
 800ca70:	f003 0301 	and.w	r3, r3, #1
 800ca74:	613b      	str	r3, [r7, #16]
  fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
 800ca76:	4b99      	ldr	r3, [pc, #612]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ca78:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800ca7a:	08db      	lsrs	r3, r3, #3
 800ca7c:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800ca80:	693a      	ldr	r2, [r7, #16]
 800ca82:	fb02 f303 	mul.w	r3, r2, r3
 800ca86:	ee07 3a90 	vmov	s15, r3
 800ca8a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ca8e:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll3m != 0U)
 800ca92:	697b      	ldr	r3, [r7, #20]
 800ca94:	2b00      	cmp	r3, #0
 800ca96:	f000 8111 	beq.w	800ccbc <HAL_RCCEx_GetPLL3ClockFreq+0x270>
  {
    switch (pllsource)
 800ca9a:	69bb      	ldr	r3, [r7, #24]
 800ca9c:	2b02      	cmp	r3, #2
 800ca9e:	f000 8083 	beq.w	800cba8 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
 800caa2:	69bb      	ldr	r3, [r7, #24]
 800caa4:	2b02      	cmp	r3, #2
 800caa6:	f200 80a1 	bhi.w	800cbec <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
 800caaa:	69bb      	ldr	r3, [r7, #24]
 800caac:	2b00      	cmp	r3, #0
 800caae:	d003      	beq.n	800cab8 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
 800cab0:	69bb      	ldr	r3, [r7, #24]
 800cab2:	2b01      	cmp	r3, #1
 800cab4:	d056      	beq.n	800cb64 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
 800cab6:	e099      	b.n	800cbec <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
    {
      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800cab8:	4b88      	ldr	r3, [pc, #544]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800caba:	681b      	ldr	r3, [r3, #0]
 800cabc:	f003 0320 	and.w	r3, r3, #32
 800cac0:	2b00      	cmp	r3, #0
 800cac2:	d02d      	beq.n	800cb20 <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800cac4:	4b85      	ldr	r3, [pc, #532]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cac6:	681b      	ldr	r3, [r3, #0]
 800cac8:	08db      	lsrs	r3, r3, #3
 800caca:	f003 0303 	and.w	r3, r3, #3
 800cace:	4a84      	ldr	r2, [pc, #528]	@ (800cce0 <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
 800cad0:	fa22 f303 	lsr.w	r3, r2, r3
 800cad4:	60bb      	str	r3, [r7, #8]
          pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cad6:	68bb      	ldr	r3, [r7, #8]
 800cad8:	ee07 3a90 	vmov	s15, r3
 800cadc:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cae0:	697b      	ldr	r3, [r7, #20]
 800cae2:	ee07 3a90 	vmov	s15, r3
 800cae6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800caea:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800caee:	4b7b      	ldr	r3, [pc, #492]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800caf0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800caf2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800caf6:	ee07 3a90 	vmov	s15, r3
 800cafa:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cafe:	ed97 6a03 	vldr	s12, [r7, #12]
 800cb02:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800cce4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cb06:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cb0a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cb0e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cb12:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cb16:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cb1a:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800cb1e:	e087      	b.n	800cc30 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cb20:	697b      	ldr	r3, [r7, #20]
 800cb22:	ee07 3a90 	vmov	s15, r3
 800cb26:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cb2a:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800cce8 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
 800cb2e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cb32:	4b6a      	ldr	r3, [pc, #424]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cb34:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cb36:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cb3a:	ee07 3a90 	vmov	s15, r3
 800cb3e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cb42:	ed97 6a03 	vldr	s12, [r7, #12]
 800cb46:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800cce4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cb4a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cb4e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cb52:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cb56:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cb5a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cb5e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cb62:	e065      	b.n	800cc30 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cb64:	697b      	ldr	r3, [r7, #20]
 800cb66:	ee07 3a90 	vmov	s15, r3
 800cb6a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cb6e:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800ccec <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800cb72:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cb76:	4b59      	ldr	r3, [pc, #356]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cb78:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cb7a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cb7e:	ee07 3a90 	vmov	s15, r3
 800cb82:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cb86:	ed97 6a03 	vldr	s12, [r7, #12]
 800cb8a:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800cce4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cb8e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cb92:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cb96:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cb9a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cb9e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cba2:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cba6:	e043      	b.n	800cc30 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cba8:	697b      	ldr	r3, [r7, #20]
 800cbaa:	ee07 3a90 	vmov	s15, r3
 800cbae:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cbb2:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800ccf0 <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
 800cbb6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cbba:	4b48      	ldr	r3, [pc, #288]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cbbc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cbbe:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cbc2:	ee07 3a90 	vmov	s15, r3
 800cbc6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cbca:	ed97 6a03 	vldr	s12, [r7, #12]
 800cbce:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800cce4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cbd2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cbd6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cbda:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cbde:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cbe2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cbe6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cbea:	e021      	b.n	800cc30 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      default:
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cbec:	697b      	ldr	r3, [r7, #20]
 800cbee:	ee07 3a90 	vmov	s15, r3
 800cbf2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cbf6:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800ccec <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800cbfa:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cbfe:	4b37      	ldr	r3, [pc, #220]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cc00:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cc02:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cc06:	ee07 3a90 	vmov	s15, r3
 800cc0a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cc0e:	ed97 6a03 	vldr	s12, [r7, #12]
 800cc12:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800cce4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cc16:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cc1a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cc1e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cc22:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cc26:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cc2a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cc2e:	bf00      	nop
    }
    PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9)  + (float_t)1)) ;
 800cc30:	4b2a      	ldr	r3, [pc, #168]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cc32:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cc34:	0a5b      	lsrs	r3, r3, #9
 800cc36:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800cc3a:	ee07 3a90 	vmov	s15, r3
 800cc3e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cc42:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800cc46:	ee37 7a87 	vadd.f32	s14, s15, s14
 800cc4a:	edd7 6a07 	vldr	s13, [r7, #28]
 800cc4e:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800cc52:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800cc56:	ee17 2a90 	vmov	r2, s15
 800cc5a:	687b      	ldr	r3, [r7, #4]
 800cc5c:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
 800cc5e:	4b1f      	ldr	r3, [pc, #124]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cc60:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cc62:	0c1b      	lsrs	r3, r3, #16
 800cc64:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800cc68:	ee07 3a90 	vmov	s15, r3
 800cc6c:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cc70:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800cc74:	ee37 7a87 	vadd.f32	s14, s15, s14
 800cc78:	edd7 6a07 	vldr	s13, [r7, #28]
 800cc7c:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800cc80:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800cc84:	ee17 2a90 	vmov	r2, s15
 800cc88:	687b      	ldr	r3, [r7, #4]
 800cc8a:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
 800cc8c:	4b13      	ldr	r3, [pc, #76]	@ (800ccdc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cc8e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cc90:	0e1b      	lsrs	r3, r3, #24
 800cc92:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800cc96:	ee07 3a90 	vmov	s15, r3
 800cc9a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cc9e:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800cca2:	ee37 7a87 	vadd.f32	s14, s15, s14
 800cca6:	edd7 6a07 	vldr	s13, [r7, #28]
 800ccaa:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800ccae:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800ccb2:	ee17 2a90 	vmov	r2, s15
 800ccb6:	687b      	ldr	r3, [r7, #4]
 800ccb8:	609a      	str	r2, [r3, #8]
    PLL3_Clocks->PLL3_P_Frequency = 0U;
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
    PLL3_Clocks->PLL3_R_Frequency = 0U;
  }

}
 800ccba:	e008      	b.n	800ccce <HAL_RCCEx_GetPLL3ClockFreq+0x282>
    PLL3_Clocks->PLL3_P_Frequency = 0U;
 800ccbc:	687b      	ldr	r3, [r7, #4]
 800ccbe:	2200      	movs	r2, #0
 800ccc0:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
 800ccc2:	687b      	ldr	r3, [r7, #4]
 800ccc4:	2200      	movs	r2, #0
 800ccc6:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = 0U;
 800ccc8:	687b      	ldr	r3, [r7, #4]
 800ccca:	2200      	movs	r2, #0
 800cccc:	609a      	str	r2, [r3, #8]
}
 800ccce:	bf00      	nop
 800ccd0:	3724      	adds	r7, #36	@ 0x24
 800ccd2:	46bd      	mov	sp, r7
 800ccd4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ccd8:	4770      	bx	lr
 800ccda:	bf00      	nop
 800ccdc:	58024400 	.word	0x58024400
 800cce0:	03d09000 	.word	0x03d09000
 800cce4:	46000000 	.word	0x46000000
 800cce8:	4c742400 	.word	0x4c742400
 800ccec:	4a742400 	.word	0x4a742400
 800ccf0:	4bbebc20 	.word	0x4bbebc20

0800ccf4 <RCCEx_PLL2_Config>:
  * @note   PLL2 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
 800ccf4:	b580      	push	{r7, lr}
 800ccf6:	b084      	sub	sp, #16
 800ccf8:	af00      	add	r7, sp, #0
 800ccfa:	6078      	str	r0, [r7, #4]
 800ccfc:	6039      	str	r1, [r7, #0]

  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800ccfe:	2300      	movs	r3, #0
 800cd00:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
  assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));

  /* Check that PLL2 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800cd02:	4b53      	ldr	r3, [pc, #332]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd04:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800cd06:	f003 0303 	and.w	r3, r3, #3
 800cd0a:	2b03      	cmp	r3, #3
 800cd0c:	d101      	bne.n	800cd12 <RCCEx_PLL2_Config+0x1e>
  {
    return HAL_ERROR;
 800cd0e:	2301      	movs	r3, #1
 800cd10:	e099      	b.n	800ce46 <RCCEx_PLL2_Config+0x152>


  else
  {
    /* Disable  PLL2. */
    __HAL_RCC_PLL2_DISABLE();
 800cd12:	4b4f      	ldr	r3, [pc, #316]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd14:	681b      	ldr	r3, [r3, #0]
 800cd16:	4a4e      	ldr	r2, [pc, #312]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd18:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800cd1c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800cd1e:	f7f8 fcb9 	bl	8005694 <HAL_GetTick>
 800cd22:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL is disabled */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800cd24:	e008      	b.n	800cd38 <RCCEx_PLL2_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800cd26:	f7f8 fcb5 	bl	8005694 <HAL_GetTick>
 800cd2a:	4602      	mov	r2, r0
 800cd2c:	68bb      	ldr	r3, [r7, #8]
 800cd2e:	1ad3      	subs	r3, r2, r3
 800cd30:	2b02      	cmp	r3, #2
 800cd32:	d901      	bls.n	800cd38 <RCCEx_PLL2_Config+0x44>
      {
        return HAL_TIMEOUT;
 800cd34:	2303      	movs	r3, #3
 800cd36:	e086      	b.n	800ce46 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800cd38:	4b45      	ldr	r3, [pc, #276]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd3a:	681b      	ldr	r3, [r3, #0]
 800cd3c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800cd40:	2b00      	cmp	r3, #0
 800cd42:	d1f0      	bne.n	800cd26 <RCCEx_PLL2_Config+0x32>
      }
    }

    /* Configure PLL2 multiplication and division factors. */
    __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
 800cd44:	4b42      	ldr	r3, [pc, #264]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd46:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800cd48:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800cd4c:	687b      	ldr	r3, [r7, #4]
 800cd4e:	681b      	ldr	r3, [r3, #0]
 800cd50:	031b      	lsls	r3, r3, #12
 800cd52:	493f      	ldr	r1, [pc, #252]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd54:	4313      	orrs	r3, r2
 800cd56:	628b      	str	r3, [r1, #40]	@ 0x28
 800cd58:	687b      	ldr	r3, [r7, #4]
 800cd5a:	685b      	ldr	r3, [r3, #4]
 800cd5c:	3b01      	subs	r3, #1
 800cd5e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800cd62:	687b      	ldr	r3, [r7, #4]
 800cd64:	689b      	ldr	r3, [r3, #8]
 800cd66:	3b01      	subs	r3, #1
 800cd68:	025b      	lsls	r3, r3, #9
 800cd6a:	b29b      	uxth	r3, r3
 800cd6c:	431a      	orrs	r2, r3
 800cd6e:	687b      	ldr	r3, [r7, #4]
 800cd70:	68db      	ldr	r3, [r3, #12]
 800cd72:	3b01      	subs	r3, #1
 800cd74:	041b      	lsls	r3, r3, #16
 800cd76:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800cd7a:	431a      	orrs	r2, r3
 800cd7c:	687b      	ldr	r3, [r7, #4]
 800cd7e:	691b      	ldr	r3, [r3, #16]
 800cd80:	3b01      	subs	r3, #1
 800cd82:	061b      	lsls	r3, r3, #24
 800cd84:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800cd88:	4931      	ldr	r1, [pc, #196]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd8a:	4313      	orrs	r3, r2
 800cd8c:	638b      	str	r3, [r1, #56]	@ 0x38
                          pll2->PLL2P,
                          pll2->PLL2Q,
                          pll2->PLL2R);

    /* Select PLL2 input reference frequency range: VCI */
    __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
 800cd8e:	4b30      	ldr	r3, [pc, #192]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd90:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cd92:	f023 02c0 	bic.w	r2, r3, #192	@ 0xc0
 800cd96:	687b      	ldr	r3, [r7, #4]
 800cd98:	695b      	ldr	r3, [r3, #20]
 800cd9a:	492d      	ldr	r1, [pc, #180]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cd9c:	4313      	orrs	r3, r2
 800cd9e:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL2 output frequency range : VCO */
    __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
 800cda0:	4b2b      	ldr	r3, [pc, #172]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cda2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cda4:	f023 0220 	bic.w	r2, r3, #32
 800cda8:	687b      	ldr	r3, [r7, #4]
 800cdaa:	699b      	ldr	r3, [r3, #24]
 800cdac:	4928      	ldr	r1, [pc, #160]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdae:	4313      	orrs	r3, r2
 800cdb0:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_DISABLE();
 800cdb2:	4b27      	ldr	r3, [pc, #156]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdb4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cdb6:	4a26      	ldr	r2, [pc, #152]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdb8:	f023 0310 	bic.w	r3, r3, #16
 800cdbc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
 800cdbe:	4b24      	ldr	r3, [pc, #144]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdc0:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800cdc2:	4b24      	ldr	r3, [pc, #144]	@ (800ce54 <RCCEx_PLL2_Config+0x160>)
 800cdc4:	4013      	ands	r3, r2
 800cdc6:	687a      	ldr	r2, [r7, #4]
 800cdc8:	69d2      	ldr	r2, [r2, #28]
 800cdca:	00d2      	lsls	r2, r2, #3
 800cdcc:	4920      	ldr	r1, [pc, #128]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdce:	4313      	orrs	r3, r2
 800cdd0:	63cb      	str	r3, [r1, #60]	@ 0x3c

    /* Enable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_ENABLE();
 800cdd2:	4b1f      	ldr	r3, [pc, #124]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdd4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cdd6:	4a1e      	ldr	r2, [pc, #120]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdd8:	f043 0310 	orr.w	r3, r3, #16
 800cddc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL2 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800cdde:	683b      	ldr	r3, [r7, #0]
 800cde0:	2b00      	cmp	r3, #0
 800cde2:	d106      	bne.n	800cdf2 <RCCEx_PLL2_Config+0xfe>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
 800cde4:	4b1a      	ldr	r3, [pc, #104]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cde6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cde8:	4a19      	ldr	r2, [pc, #100]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdea:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800cdee:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800cdf0:	e00f      	b.n	800ce12 <RCCEx_PLL2_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800cdf2:	683b      	ldr	r3, [r7, #0]
 800cdf4:	2b01      	cmp	r3, #1
 800cdf6:	d106      	bne.n	800ce06 <RCCEx_PLL2_Config+0x112>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
 800cdf8:	4b15      	ldr	r3, [pc, #84]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdfa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cdfc:	4a14      	ldr	r2, [pc, #80]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800cdfe:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800ce02:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800ce04:	e005      	b.n	800ce12 <RCCEx_PLL2_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
 800ce06:	4b12      	ldr	r3, [pc, #72]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800ce08:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ce0a:	4a11      	ldr	r2, [pc, #68]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800ce0c:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
 800ce10:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL2. */
    __HAL_RCC_PLL2_ENABLE();
 800ce12:	4b0f      	ldr	r3, [pc, #60]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800ce14:	681b      	ldr	r3, [r3, #0]
 800ce16:	4a0e      	ldr	r2, [pc, #56]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800ce18:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
 800ce1c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800ce1e:	f7f8 fc39 	bl	8005694 <HAL_GetTick>
 800ce22:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL2 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800ce24:	e008      	b.n	800ce38 <RCCEx_PLL2_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800ce26:	f7f8 fc35 	bl	8005694 <HAL_GetTick>
 800ce2a:	4602      	mov	r2, r0
 800ce2c:	68bb      	ldr	r3, [r7, #8]
 800ce2e:	1ad3      	subs	r3, r2, r3
 800ce30:	2b02      	cmp	r3, #2
 800ce32:	d901      	bls.n	800ce38 <RCCEx_PLL2_Config+0x144>
      {
        return HAL_TIMEOUT;
 800ce34:	2303      	movs	r3, #3
 800ce36:	e006      	b.n	800ce46 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800ce38:	4b05      	ldr	r3, [pc, #20]	@ (800ce50 <RCCEx_PLL2_Config+0x15c>)
 800ce3a:	681b      	ldr	r3, [r3, #0]
 800ce3c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800ce40:	2b00      	cmp	r3, #0
 800ce42:	d0f0      	beq.n	800ce26 <RCCEx_PLL2_Config+0x132>
    }

  }


  return status;
 800ce44:	7bfb      	ldrb	r3, [r7, #15]
}
 800ce46:	4618      	mov	r0, r3
 800ce48:	3710      	adds	r7, #16
 800ce4a:	46bd      	mov	sp, r7
 800ce4c:	bd80      	pop	{r7, pc}
 800ce4e:	bf00      	nop
 800ce50:	58024400 	.word	0x58024400
 800ce54:	ffff0007 	.word	0xffff0007

0800ce58 <RCCEx_PLL3_Config>:
  * @note   PLL3 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
 800ce58:	b580      	push	{r7, lr}
 800ce5a:	b084      	sub	sp, #16
 800ce5c:	af00      	add	r7, sp, #0
 800ce5e:	6078      	str	r0, [r7, #4]
 800ce60:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800ce62:	2300      	movs	r3, #0
 800ce64:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
  assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));

  /* Check that PLL3 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800ce66:	4b53      	ldr	r3, [pc, #332]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ce68:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ce6a:	f003 0303 	and.w	r3, r3, #3
 800ce6e:	2b03      	cmp	r3, #3
 800ce70:	d101      	bne.n	800ce76 <RCCEx_PLL3_Config+0x1e>
  {
    return HAL_ERROR;
 800ce72:	2301      	movs	r3, #1
 800ce74:	e099      	b.n	800cfaa <RCCEx_PLL3_Config+0x152>


  else
  {
    /* Disable  PLL3. */
    __HAL_RCC_PLL3_DISABLE();
 800ce76:	4b4f      	ldr	r3, [pc, #316]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ce78:	681b      	ldr	r3, [r3, #0]
 800ce7a:	4a4e      	ldr	r2, [pc, #312]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ce7c:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800ce80:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800ce82:	f7f8 fc07 	bl	8005694 <HAL_GetTick>
 800ce86:	60b8      	str	r0, [r7, #8]
    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800ce88:	e008      	b.n	800ce9c <RCCEx_PLL3_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800ce8a:	f7f8 fc03 	bl	8005694 <HAL_GetTick>
 800ce8e:	4602      	mov	r2, r0
 800ce90:	68bb      	ldr	r3, [r7, #8]
 800ce92:	1ad3      	subs	r3, r2, r3
 800ce94:	2b02      	cmp	r3, #2
 800ce96:	d901      	bls.n	800ce9c <RCCEx_PLL3_Config+0x44>
      {
        return HAL_TIMEOUT;
 800ce98:	2303      	movs	r3, #3
 800ce9a:	e086      	b.n	800cfaa <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800ce9c:	4b45      	ldr	r3, [pc, #276]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ce9e:	681b      	ldr	r3, [r3, #0]
 800cea0:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800cea4:	2b00      	cmp	r3, #0
 800cea6:	d1f0      	bne.n	800ce8a <RCCEx_PLL3_Config+0x32>
      }
    }

    /* Configure the PLL3  multiplication and division factors. */
    __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
 800cea8:	4b42      	ldr	r3, [pc, #264]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ceaa:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ceac:	f023 727c 	bic.w	r2, r3, #66060288	@ 0x3f00000
 800ceb0:	687b      	ldr	r3, [r7, #4]
 800ceb2:	681b      	ldr	r3, [r3, #0]
 800ceb4:	051b      	lsls	r3, r3, #20
 800ceb6:	493f      	ldr	r1, [pc, #252]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ceb8:	4313      	orrs	r3, r2
 800ceba:	628b      	str	r3, [r1, #40]	@ 0x28
 800cebc:	687b      	ldr	r3, [r7, #4]
 800cebe:	685b      	ldr	r3, [r3, #4]
 800cec0:	3b01      	subs	r3, #1
 800cec2:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800cec6:	687b      	ldr	r3, [r7, #4]
 800cec8:	689b      	ldr	r3, [r3, #8]
 800ceca:	3b01      	subs	r3, #1
 800cecc:	025b      	lsls	r3, r3, #9
 800cece:	b29b      	uxth	r3, r3
 800ced0:	431a      	orrs	r2, r3
 800ced2:	687b      	ldr	r3, [r7, #4]
 800ced4:	68db      	ldr	r3, [r3, #12]
 800ced6:	3b01      	subs	r3, #1
 800ced8:	041b      	lsls	r3, r3, #16
 800ceda:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800cede:	431a      	orrs	r2, r3
 800cee0:	687b      	ldr	r3, [r7, #4]
 800cee2:	691b      	ldr	r3, [r3, #16]
 800cee4:	3b01      	subs	r3, #1
 800cee6:	061b      	lsls	r3, r3, #24
 800cee8:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800ceec:	4931      	ldr	r1, [pc, #196]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800ceee:	4313      	orrs	r3, r2
 800cef0:	640b      	str	r3, [r1, #64]	@ 0x40
                          pll3->PLL3P,
                          pll3->PLL3Q,
                          pll3->PLL3R);

    /* Select PLL3 input reference frequency range: VCI */
    __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
 800cef2:	4b30      	ldr	r3, [pc, #192]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cef4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cef6:	f423 6240 	bic.w	r2, r3, #3072	@ 0xc00
 800cefa:	687b      	ldr	r3, [r7, #4]
 800cefc:	695b      	ldr	r3, [r3, #20]
 800cefe:	492d      	ldr	r1, [pc, #180]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf00:	4313      	orrs	r3, r2
 800cf02:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL3 output frequency range : VCO */
    __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
 800cf04:	4b2b      	ldr	r3, [pc, #172]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf06:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf08:	f423 7200 	bic.w	r2, r3, #512	@ 0x200
 800cf0c:	687b      	ldr	r3, [r7, #4]
 800cf0e:	699b      	ldr	r3, [r3, #24]
 800cf10:	4928      	ldr	r1, [pc, #160]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf12:	4313      	orrs	r3, r2
 800cf14:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_DISABLE();
 800cf16:	4b27      	ldr	r3, [pc, #156]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf18:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf1a:	4a26      	ldr	r2, [pc, #152]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf1c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800cf20:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
 800cf22:	4b24      	ldr	r3, [pc, #144]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf24:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800cf26:	4b24      	ldr	r3, [pc, #144]	@ (800cfb8 <RCCEx_PLL3_Config+0x160>)
 800cf28:	4013      	ands	r3, r2
 800cf2a:	687a      	ldr	r2, [r7, #4]
 800cf2c:	69d2      	ldr	r2, [r2, #28]
 800cf2e:	00d2      	lsls	r2, r2, #3
 800cf30:	4920      	ldr	r1, [pc, #128]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf32:	4313      	orrs	r3, r2
 800cf34:	644b      	str	r3, [r1, #68]	@ 0x44

    /* Enable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_ENABLE();
 800cf36:	4b1f      	ldr	r3, [pc, #124]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf38:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf3a:	4a1e      	ldr	r2, [pc, #120]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf3c:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800cf40:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL3 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800cf42:	683b      	ldr	r3, [r7, #0]
 800cf44:	2b00      	cmp	r3, #0
 800cf46:	d106      	bne.n	800cf56 <RCCEx_PLL3_Config+0xfe>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
 800cf48:	4b1a      	ldr	r3, [pc, #104]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf4a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf4c:	4a19      	ldr	r2, [pc, #100]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf4e:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
 800cf52:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800cf54:	e00f      	b.n	800cf76 <RCCEx_PLL3_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800cf56:	683b      	ldr	r3, [r7, #0]
 800cf58:	2b01      	cmp	r3, #1
 800cf5a:	d106      	bne.n	800cf6a <RCCEx_PLL3_Config+0x112>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
 800cf5c:	4b15      	ldr	r3, [pc, #84]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf60:	4a14      	ldr	r2, [pc, #80]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf62:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800cf66:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800cf68:	e005      	b.n	800cf76 <RCCEx_PLL3_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
 800cf6a:	4b12      	ldr	r3, [pc, #72]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf6c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cf6e:	4a11      	ldr	r2, [pc, #68]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf70:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800cf74:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL3. */
    __HAL_RCC_PLL3_ENABLE();
 800cf76:	4b0f      	ldr	r3, [pc, #60]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf78:	681b      	ldr	r3, [r3, #0]
 800cf7a:	4a0e      	ldr	r2, [pc, #56]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf7c:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800cf80:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800cf82:	f7f8 fb87 	bl	8005694 <HAL_GetTick>
 800cf86:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800cf88:	e008      	b.n	800cf9c <RCCEx_PLL3_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800cf8a:	f7f8 fb83 	bl	8005694 <HAL_GetTick>
 800cf8e:	4602      	mov	r2, r0
 800cf90:	68bb      	ldr	r3, [r7, #8]
 800cf92:	1ad3      	subs	r3, r2, r3
 800cf94:	2b02      	cmp	r3, #2
 800cf96:	d901      	bls.n	800cf9c <RCCEx_PLL3_Config+0x144>
      {
        return HAL_TIMEOUT;
 800cf98:	2303      	movs	r3, #3
 800cf9a:	e006      	b.n	800cfaa <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800cf9c:	4b05      	ldr	r3, [pc, #20]	@ (800cfb4 <RCCEx_PLL3_Config+0x15c>)
 800cf9e:	681b      	ldr	r3, [r3, #0]
 800cfa0:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800cfa4:	2b00      	cmp	r3, #0
 800cfa6:	d0f0      	beq.n	800cf8a <RCCEx_PLL3_Config+0x132>
    }

  }


  return status;
 800cfa8:	7bfb      	ldrb	r3, [r7, #15]
}
 800cfaa:	4618      	mov	r0, r3
 800cfac:	3710      	adds	r7, #16
 800cfae:	46bd      	mov	sp, r7
 800cfb0:	bd80      	pop	{r7, pc}
 800cfb2:	bf00      	nop
 800cfb4:	58024400 	.word	0x58024400
 800cfb8:	ffff0007 	.word	0xffff0007

0800cfbc <HAL_RNG_Init>:
  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
  *                the configuration information for RNG.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
 800cfbc:	b580      	push	{r7, lr}
 800cfbe:	b084      	sub	sp, #16
 800cfc0:	af00      	add	r7, sp, #0
 800cfc2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  /* Check the RNG handle allocation */
  if (hrng == NULL)
 800cfc4:	687b      	ldr	r3, [r7, #4]
 800cfc6:	2b00      	cmp	r3, #0
 800cfc8:	d101      	bne.n	800cfce <HAL_RNG_Init+0x12>
  {
    return HAL_ERROR;
 800cfca:	2301      	movs	r3, #1
 800cfcc:	e054      	b.n	800d078 <HAL_RNG_Init+0xbc>

    /* Init the low level hardware */
    hrng->MspInitCallback(hrng);
  }
#else
  if (hrng->State == HAL_RNG_STATE_RESET)
 800cfce:	687b      	ldr	r3, [r7, #4]
 800cfd0:	7a5b      	ldrb	r3, [r3, #9]
 800cfd2:	b2db      	uxtb	r3, r3
 800cfd4:	2b00      	cmp	r3, #0
 800cfd6:	d105      	bne.n	800cfe4 <HAL_RNG_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hrng->Lock = HAL_UNLOCKED;
 800cfd8:	687b      	ldr	r3, [r7, #4]
 800cfda:	2200      	movs	r2, #0
 800cfdc:	721a      	strb	r2, [r3, #8]

    /* Init the low level hardware */
    HAL_RNG_MspInit(hrng);
 800cfde:	6878      	ldr	r0, [r7, #4]
 800cfe0:	f7f6 fcba 	bl	8003958 <HAL_RNG_MspInit>
  }
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */

  /* Change RNG peripheral state */
  hrng->State = HAL_RNG_STATE_BUSY;
 800cfe4:	687b      	ldr	r3, [r7, #4]
 800cfe6:	2202      	movs	r2, #2
 800cfe8:	725a      	strb	r2, [r3, #9]
      }
    }
  }
#else
  /* Clock Error Detection Configuration */
  MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
 800cfea:	687b      	ldr	r3, [r7, #4]
 800cfec:	681b      	ldr	r3, [r3, #0]
 800cfee:	681b      	ldr	r3, [r3, #0]
 800cff0:	f023 0120 	bic.w	r1, r3, #32
 800cff4:	687b      	ldr	r3, [r7, #4]
 800cff6:	685a      	ldr	r2, [r3, #4]
 800cff8:	687b      	ldr	r3, [r7, #4]
 800cffa:	681b      	ldr	r3, [r3, #0]
 800cffc:	430a      	orrs	r2, r1
 800cffe:	601a      	str	r2, [r3, #0]
#endif /* RNG_CR_CONDRST */

  /* Enable the RNG Peripheral */
  __HAL_RNG_ENABLE(hrng);
 800d000:	687b      	ldr	r3, [r7, #4]
 800d002:	681b      	ldr	r3, [r3, #0]
 800d004:	681a      	ldr	r2, [r3, #0]
 800d006:	687b      	ldr	r3, [r7, #4]
 800d008:	681b      	ldr	r3, [r3, #0]
 800d00a:	f042 0204 	orr.w	r2, r2, #4
 800d00e:	601a      	str	r2, [r3, #0]

  /* verify that no seed error */
  if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
 800d010:	687b      	ldr	r3, [r7, #4]
 800d012:	681b      	ldr	r3, [r3, #0]
 800d014:	685b      	ldr	r3, [r3, #4]
 800d016:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d01a:	2b40      	cmp	r3, #64	@ 0x40
 800d01c:	d104      	bne.n	800d028 <HAL_RNG_Init+0x6c>
  {
    hrng->State = HAL_RNG_STATE_ERROR;
 800d01e:	687b      	ldr	r3, [r7, #4]
 800d020:	2204      	movs	r2, #4
 800d022:	725a      	strb	r2, [r3, #9]
    return HAL_ERROR;
 800d024:	2301      	movs	r3, #1
 800d026:	e027      	b.n	800d078 <HAL_RNG_Init+0xbc>
  }
  /* Get tick */
  tickstart = HAL_GetTick();
 800d028:	f7f8 fb34 	bl	8005694 <HAL_GetTick>
 800d02c:	60f8      	str	r0, [r7, #12]
  /* Check if data register contains valid random data */
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d02e:	e015      	b.n	800d05c <HAL_RNG_Init+0xa0>
  {
    if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800d030:	f7f8 fb30 	bl	8005694 <HAL_GetTick>
 800d034:	4602      	mov	r2, r0
 800d036:	68fb      	ldr	r3, [r7, #12]
 800d038:	1ad3      	subs	r3, r2, r3
 800d03a:	2b02      	cmp	r3, #2
 800d03c:	d90e      	bls.n	800d05c <HAL_RNG_Init+0xa0>
    {
      /* New check to avoid false timeout detection in case of preemption */
      if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d03e:	687b      	ldr	r3, [r7, #4]
 800d040:	681b      	ldr	r3, [r3, #0]
 800d042:	685b      	ldr	r3, [r3, #4]
 800d044:	f003 0304 	and.w	r3, r3, #4
 800d048:	2b04      	cmp	r3, #4
 800d04a:	d107      	bne.n	800d05c <HAL_RNG_Init+0xa0>
      {
        hrng->State = HAL_RNG_STATE_ERROR;
 800d04c:	687b      	ldr	r3, [r7, #4]
 800d04e:	2204      	movs	r2, #4
 800d050:	725a      	strb	r2, [r3, #9]
        hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800d052:	687b      	ldr	r3, [r7, #4]
 800d054:	2202      	movs	r2, #2
 800d056:	60da      	str	r2, [r3, #12]
        return HAL_ERROR;
 800d058:	2301      	movs	r3, #1
 800d05a:	e00d      	b.n	800d078 <HAL_RNG_Init+0xbc>
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d05c:	687b      	ldr	r3, [r7, #4]
 800d05e:	681b      	ldr	r3, [r3, #0]
 800d060:	685b      	ldr	r3, [r3, #4]
 800d062:	f003 0304 	and.w	r3, r3, #4
 800d066:	2b04      	cmp	r3, #4
 800d068:	d0e2      	beq.n	800d030 <HAL_RNG_Init+0x74>
      }
    }
  }

  /* Initialize the RNG state */
  hrng->State = HAL_RNG_STATE_READY;
 800d06a:	687b      	ldr	r3, [r7, #4]
 800d06c:	2201      	movs	r2, #1
 800d06e:	725a      	strb	r2, [r3, #9]

  /* Initialise the error code */
  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
 800d070:	687b      	ldr	r3, [r7, #4]
 800d072:	2200      	movs	r2, #0
 800d074:	60da      	str	r2, [r3, #12]

  /* Return function status */
  return HAL_OK;
 800d076:	2300      	movs	r3, #0
}
 800d078:	4618      	mov	r0, r3
 800d07a:	3710      	adds	r7, #16
 800d07c:	46bd      	mov	sp, r7
 800d07e:	bd80      	pop	{r7, pc}

0800d080 <HAL_RNG_GenerateRandomNumber>:
  * @param  random32bit pointer to generated random number variable if successful.
  * @retval HAL status
  */

HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
 800d080:	b580      	push	{r7, lr}
 800d082:	b084      	sub	sp, #16
 800d084:	af00      	add	r7, sp, #0
 800d086:	6078      	str	r0, [r7, #4]
 800d088:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800d08a:	2300      	movs	r3, #0
 800d08c:	73fb      	strb	r3, [r7, #15]

  /* Process Locked */
  __HAL_LOCK(hrng);
 800d08e:	687b      	ldr	r3, [r7, #4]
 800d090:	7a1b      	ldrb	r3, [r3, #8]
 800d092:	2b01      	cmp	r3, #1
 800d094:	d101      	bne.n	800d09a <HAL_RNG_GenerateRandomNumber+0x1a>
 800d096:	2302      	movs	r3, #2
 800d098:	e044      	b.n	800d124 <HAL_RNG_GenerateRandomNumber+0xa4>
 800d09a:	687b      	ldr	r3, [r7, #4]
 800d09c:	2201      	movs	r2, #1
 800d09e:	721a      	strb	r2, [r3, #8]

  /* Check RNG peripheral state */
  if (hrng->State == HAL_RNG_STATE_READY)
 800d0a0:	687b      	ldr	r3, [r7, #4]
 800d0a2:	7a5b      	ldrb	r3, [r3, #9]
 800d0a4:	b2db      	uxtb	r3, r3
 800d0a6:	2b01      	cmp	r3, #1
 800d0a8:	d133      	bne.n	800d112 <HAL_RNG_GenerateRandomNumber+0x92>
  {
    /* Change RNG peripheral state */
    hrng->State = HAL_RNG_STATE_BUSY;
 800d0aa:	687b      	ldr	r3, [r7, #4]
 800d0ac:	2202      	movs	r2, #2
 800d0ae:	725a      	strb	r2, [r3, #9]
      }
    }
#endif /* RNG_CR_CONDRST */

    /* Get tick */
    tickstart = HAL_GetTick();
 800d0b0:	f7f8 faf0 	bl	8005694 <HAL_GetTick>
 800d0b4:	60b8      	str	r0, [r7, #8]

    /* Check if data register contains valid random data */
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d0b6:	e018      	b.n	800d0ea <HAL_RNG_GenerateRandomNumber+0x6a>
    {
      if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800d0b8:	f7f8 faec 	bl	8005694 <HAL_GetTick>
 800d0bc:	4602      	mov	r2, r0
 800d0be:	68bb      	ldr	r3, [r7, #8]
 800d0c0:	1ad3      	subs	r3, r2, r3
 800d0c2:	2b02      	cmp	r3, #2
 800d0c4:	d911      	bls.n	800d0ea <HAL_RNG_GenerateRandomNumber+0x6a>
      {
        /* New check to avoid false timeout detection in case of preemption */
        if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d0c6:	687b      	ldr	r3, [r7, #4]
 800d0c8:	681b      	ldr	r3, [r3, #0]
 800d0ca:	685b      	ldr	r3, [r3, #4]
 800d0cc:	f003 0301 	and.w	r3, r3, #1
 800d0d0:	2b01      	cmp	r3, #1
 800d0d2:	d00a      	beq.n	800d0ea <HAL_RNG_GenerateRandomNumber+0x6a>
        {
          hrng->State = HAL_RNG_STATE_READY;
 800d0d4:	687b      	ldr	r3, [r7, #4]
 800d0d6:	2201      	movs	r2, #1
 800d0d8:	725a      	strb	r2, [r3, #9]
          hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800d0da:	687b      	ldr	r3, [r7, #4]
 800d0dc:	2202      	movs	r2, #2
 800d0de:	60da      	str	r2, [r3, #12]
          /* Process Unlocked */
          __HAL_UNLOCK(hrng);
 800d0e0:	687b      	ldr	r3, [r7, #4]
 800d0e2:	2200      	movs	r2, #0
 800d0e4:	721a      	strb	r2, [r3, #8]
          return HAL_ERROR;
 800d0e6:	2301      	movs	r3, #1
 800d0e8:	e01c      	b.n	800d124 <HAL_RNG_GenerateRandomNumber+0xa4>
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d0ea:	687b      	ldr	r3, [r7, #4]
 800d0ec:	681b      	ldr	r3, [r3, #0]
 800d0ee:	685b      	ldr	r3, [r3, #4]
 800d0f0:	f003 0301 	and.w	r3, r3, #1
 800d0f4:	2b01      	cmp	r3, #1
 800d0f6:	d1df      	bne.n	800d0b8 <HAL_RNG_GenerateRandomNumber+0x38>
        }
      }
    }

    /* Get a 32bit Random number */
    hrng->RandomNumber = hrng->Instance->DR;
 800d0f8:	687b      	ldr	r3, [r7, #4]
 800d0fa:	681b      	ldr	r3, [r3, #0]
 800d0fc:	689a      	ldr	r2, [r3, #8]
 800d0fe:	687b      	ldr	r3, [r7, #4]
 800d100:	611a      	str	r2, [r3, #16]
    else /* No seed error */
    {
      *random32bit = hrng->RandomNumber;
    }
#else
    *random32bit = hrng->RandomNumber;
 800d102:	687b      	ldr	r3, [r7, #4]
 800d104:	691a      	ldr	r2, [r3, #16]
 800d106:	683b      	ldr	r3, [r7, #0]
 800d108:	601a      	str	r2, [r3, #0]

#endif /* RNG_CR_CONDRST */
    hrng->State = HAL_RNG_STATE_READY;
 800d10a:	687b      	ldr	r3, [r7, #4]
 800d10c:	2201      	movs	r2, #1
 800d10e:	725a      	strb	r2, [r3, #9]
 800d110:	e004      	b.n	800d11c <HAL_RNG_GenerateRandomNumber+0x9c>
  }
  else
  {
    hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
 800d112:	687b      	ldr	r3, [r7, #4]
 800d114:	2204      	movs	r2, #4
 800d116:	60da      	str	r2, [r3, #12]
    status = HAL_ERROR;
 800d118:	2301      	movs	r3, #1
 800d11a:	73fb      	strb	r3, [r7, #15]
  }

  /* Process Unlocked */
  __HAL_UNLOCK(hrng);
 800d11c:	687b      	ldr	r3, [r7, #4]
 800d11e:	2200      	movs	r2, #0
 800d120:	721a      	strb	r2, [r3, #8]

  return status;
 800d122:	7bfb      	ldrb	r3, [r7, #15]
}
 800d124:	4618      	mov	r0, r3
 800d126:	3710      	adds	r7, #16
 800d128:	46bd      	mov	sp, r7
 800d12a:	bd80      	pop	{r7, pc}

0800d12c <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 800d12c:	b580      	push	{r7, lr}
 800d12e:	b082      	sub	sp, #8
 800d130:	af00      	add	r7, sp, #0
 800d132:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800d134:	687b      	ldr	r3, [r7, #4]
 800d136:	2b00      	cmp	r3, #0
 800d138:	d101      	bne.n	800d13e <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 800d13a:	2301      	movs	r3, #1
 800d13c:	e049      	b.n	800d1d2 <HAL_TIM_Base_Init+0xa6>
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 800d13e:	687b      	ldr	r3, [r7, #4]
 800d140:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800d144:	b2db      	uxtb	r3, r3
 800d146:	2b00      	cmp	r3, #0
 800d148:	d106      	bne.n	800d158 <HAL_TIM_Base_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 800d14a:	687b      	ldr	r3, [r7, #4]
 800d14c:	2200      	movs	r2, #0
 800d14e:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800d152:	6878      	ldr	r0, [r7, #4]
 800d154:	f000 f841 	bl	800d1da <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800d158:	687b      	ldr	r3, [r7, #4]
 800d15a:	2202      	movs	r2, #2
 800d15c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800d160:	687b      	ldr	r3, [r7, #4]
 800d162:	681a      	ldr	r2, [r3, #0]
 800d164:	687b      	ldr	r3, [r7, #4]
 800d166:	3304      	adds	r3, #4
 800d168:	4619      	mov	r1, r3
 800d16a:	4610      	mov	r0, r2
 800d16c:	f000 f9e8 	bl	800d540 <TIM_Base_SetConfig>

  /* Initialize the DMA burst operation state */
  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
 800d170:	687b      	ldr	r3, [r7, #4]
 800d172:	2201      	movs	r2, #1
 800d174:	f883 2048 	strb.w	r2, [r3, #72]	@ 0x48

  /* Initialize the TIM channels state */
  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800d178:	687b      	ldr	r3, [r7, #4]
 800d17a:	2201      	movs	r2, #1
 800d17c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 800d180:	687b      	ldr	r3, [r7, #4]
 800d182:	2201      	movs	r2, #1
 800d184:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
 800d188:	687b      	ldr	r3, [r7, #4]
 800d18a:	2201      	movs	r2, #1
 800d18c:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
 800d190:	687b      	ldr	r3, [r7, #4]
 800d192:	2201      	movs	r2, #1
 800d194:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
 800d198:	687b      	ldr	r3, [r7, #4]
 800d19a:	2201      	movs	r2, #1
 800d19c:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
 800d1a0:	687b      	ldr	r3, [r7, #4]
 800d1a2:	2201      	movs	r2, #1
 800d1a4:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800d1a8:	687b      	ldr	r3, [r7, #4]
 800d1aa:	2201      	movs	r2, #1
 800d1ac:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 800d1b0:	687b      	ldr	r3, [r7, #4]
 800d1b2:	2201      	movs	r2, #1
 800d1b4:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 800d1b8:	687b      	ldr	r3, [r7, #4]
 800d1ba:	2201      	movs	r2, #1
 800d1bc:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
 800d1c0:	687b      	ldr	r3, [r7, #4]
 800d1c2:	2201      	movs	r2, #1
 800d1c4:	f883 2047 	strb.w	r2, [r3, #71]	@ 0x47

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800d1c8:	687b      	ldr	r3, [r7, #4]
 800d1ca:	2201      	movs	r2, #1
 800d1cc:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  return HAL_OK;
 800d1d0:	2300      	movs	r3, #0
}
 800d1d2:	4618      	mov	r0, r3
 800d1d4:	3708      	adds	r7, #8
 800d1d6:	46bd      	mov	sp, r7
 800d1d8:	bd80      	pop	{r7, pc}

0800d1da <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800d1da:	b480      	push	{r7}
 800d1dc:	b083      	sub	sp, #12
 800d1de:	af00      	add	r7, sp, #0
 800d1e0:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 800d1e2:	bf00      	nop
 800d1e4:	370c      	adds	r7, #12
 800d1e6:	46bd      	mov	sp, r7
 800d1e8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d1ec:	4770      	bx	lr
	...

0800d1f0 <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 800d1f0:	b480      	push	{r7}
 800d1f2:	b085      	sub	sp, #20
 800d1f4:	af00      	add	r7, sp, #0
 800d1f6:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Check the TIM state */
  if (htim->State != HAL_TIM_STATE_READY)
 800d1f8:	687b      	ldr	r3, [r7, #4]
 800d1fa:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800d1fe:	b2db      	uxtb	r3, r3
 800d200:	2b01      	cmp	r3, #1
 800d202:	d001      	beq.n	800d208 <HAL_TIM_Base_Start_IT+0x18>
  {
    return HAL_ERROR;
 800d204:	2301      	movs	r3, #1
 800d206:	e054      	b.n	800d2b2 <HAL_TIM_Base_Start_IT+0xc2>
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800d208:	687b      	ldr	r3, [r7, #4]
 800d20a:	2202      	movs	r2, #2
 800d20c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 800d210:	687b      	ldr	r3, [r7, #4]
 800d212:	681b      	ldr	r3, [r3, #0]
 800d214:	68da      	ldr	r2, [r3, #12]
 800d216:	687b      	ldr	r3, [r7, #4]
 800d218:	681b      	ldr	r3, [r3, #0]
 800d21a:	f042 0201 	orr.w	r2, r2, #1
 800d21e:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
 800d220:	687b      	ldr	r3, [r7, #4]
 800d222:	681b      	ldr	r3, [r3, #0]
 800d224:	4a26      	ldr	r2, [pc, #152]	@ (800d2c0 <HAL_TIM_Base_Start_IT+0xd0>)
 800d226:	4293      	cmp	r3, r2
 800d228:	d022      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d22a:	687b      	ldr	r3, [r7, #4]
 800d22c:	681b      	ldr	r3, [r3, #0]
 800d22e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d232:	d01d      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d234:	687b      	ldr	r3, [r7, #4]
 800d236:	681b      	ldr	r3, [r3, #0]
 800d238:	4a22      	ldr	r2, [pc, #136]	@ (800d2c4 <HAL_TIM_Base_Start_IT+0xd4>)
 800d23a:	4293      	cmp	r3, r2
 800d23c:	d018      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d23e:	687b      	ldr	r3, [r7, #4]
 800d240:	681b      	ldr	r3, [r3, #0]
 800d242:	4a21      	ldr	r2, [pc, #132]	@ (800d2c8 <HAL_TIM_Base_Start_IT+0xd8>)
 800d244:	4293      	cmp	r3, r2
 800d246:	d013      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d248:	687b      	ldr	r3, [r7, #4]
 800d24a:	681b      	ldr	r3, [r3, #0]
 800d24c:	4a1f      	ldr	r2, [pc, #124]	@ (800d2cc <HAL_TIM_Base_Start_IT+0xdc>)
 800d24e:	4293      	cmp	r3, r2
 800d250:	d00e      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d252:	687b      	ldr	r3, [r7, #4]
 800d254:	681b      	ldr	r3, [r3, #0]
 800d256:	4a1e      	ldr	r2, [pc, #120]	@ (800d2d0 <HAL_TIM_Base_Start_IT+0xe0>)
 800d258:	4293      	cmp	r3, r2
 800d25a:	d009      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d25c:	687b      	ldr	r3, [r7, #4]
 800d25e:	681b      	ldr	r3, [r3, #0]
 800d260:	4a1c      	ldr	r2, [pc, #112]	@ (800d2d4 <HAL_TIM_Base_Start_IT+0xe4>)
 800d262:	4293      	cmp	r3, r2
 800d264:	d004      	beq.n	800d270 <HAL_TIM_Base_Start_IT+0x80>
 800d266:	687b      	ldr	r3, [r7, #4]
 800d268:	681b      	ldr	r3, [r3, #0]
 800d26a:	4a1b      	ldr	r2, [pc, #108]	@ (800d2d8 <HAL_TIM_Base_Start_IT+0xe8>)
 800d26c:	4293      	cmp	r3, r2
 800d26e:	d115      	bne.n	800d29c <HAL_TIM_Base_Start_IT+0xac>
  {
    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 800d270:	687b      	ldr	r3, [r7, #4]
 800d272:	681b      	ldr	r3, [r3, #0]
 800d274:	689a      	ldr	r2, [r3, #8]
 800d276:	4b19      	ldr	r3, [pc, #100]	@ (800d2dc <HAL_TIM_Base_Start_IT+0xec>)
 800d278:	4013      	ands	r3, r2
 800d27a:	60fb      	str	r3, [r7, #12]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d27c:	68fb      	ldr	r3, [r7, #12]
 800d27e:	2b06      	cmp	r3, #6
 800d280:	d015      	beq.n	800d2ae <HAL_TIM_Base_Start_IT+0xbe>
 800d282:	68fb      	ldr	r3, [r7, #12]
 800d284:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800d288:	d011      	beq.n	800d2ae <HAL_TIM_Base_Start_IT+0xbe>
    {
      __HAL_TIM_ENABLE(htim);
 800d28a:	687b      	ldr	r3, [r7, #4]
 800d28c:	681b      	ldr	r3, [r3, #0]
 800d28e:	681a      	ldr	r2, [r3, #0]
 800d290:	687b      	ldr	r3, [r7, #4]
 800d292:	681b      	ldr	r3, [r3, #0]
 800d294:	f042 0201 	orr.w	r2, r2, #1
 800d298:	601a      	str	r2, [r3, #0]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d29a:	e008      	b.n	800d2ae <HAL_TIM_Base_Start_IT+0xbe>
    }
  }
  else
  {
    __HAL_TIM_ENABLE(htim);
 800d29c:	687b      	ldr	r3, [r7, #4]
 800d29e:	681b      	ldr	r3, [r3, #0]
 800d2a0:	681a      	ldr	r2, [r3, #0]
 800d2a2:	687b      	ldr	r3, [r7, #4]
 800d2a4:	681b      	ldr	r3, [r3, #0]
 800d2a6:	f042 0201 	orr.w	r2, r2, #1
 800d2aa:	601a      	str	r2, [r3, #0]
 800d2ac:	e000      	b.n	800d2b0 <HAL_TIM_Base_Start_IT+0xc0>
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d2ae:	bf00      	nop
  }

  /* Return function status */
  return HAL_OK;
 800d2b0:	2300      	movs	r3, #0
}
 800d2b2:	4618      	mov	r0, r3
 800d2b4:	3714      	adds	r7, #20
 800d2b6:	46bd      	mov	sp, r7
 800d2b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d2bc:	4770      	bx	lr
 800d2be:	bf00      	nop
 800d2c0:	40010000 	.word	0x40010000
 800d2c4:	40000400 	.word	0x40000400
 800d2c8:	40000800 	.word	0x40000800
 800d2cc:	40000c00 	.word	0x40000c00
 800d2d0:	40010400 	.word	0x40010400
 800d2d4:	40001800 	.word	0x40001800
 800d2d8:	40014000 	.word	0x40014000
 800d2dc:	00010007 	.word	0x00010007

0800d2e0 <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 800d2e0:	b580      	push	{r7, lr}
 800d2e2:	b084      	sub	sp, #16
 800d2e4:	af00      	add	r7, sp, #0
 800d2e6:	6078      	str	r0, [r7, #4]
  uint32_t itsource = htim->Instance->DIER;
 800d2e8:	687b      	ldr	r3, [r7, #4]
 800d2ea:	681b      	ldr	r3, [r3, #0]
 800d2ec:	68db      	ldr	r3, [r3, #12]
 800d2ee:	60fb      	str	r3, [r7, #12]
  uint32_t itflag   = htim->Instance->SR;
 800d2f0:	687b      	ldr	r3, [r7, #4]
 800d2f2:	681b      	ldr	r3, [r3, #0]
 800d2f4:	691b      	ldr	r3, [r3, #16]
 800d2f6:	60bb      	str	r3, [r7, #8]

  /* Capture compare 1 event */
  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
 800d2f8:	68bb      	ldr	r3, [r7, #8]
 800d2fa:	f003 0302 	and.w	r3, r3, #2
 800d2fe:	2b00      	cmp	r3, #0
 800d300:	d020      	beq.n	800d344 <HAL_TIM_IRQHandler+0x64>
  {
    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
 800d302:	68fb      	ldr	r3, [r7, #12]
 800d304:	f003 0302 	and.w	r3, r3, #2
 800d308:	2b00      	cmp	r3, #0
 800d30a:	d01b      	beq.n	800d344 <HAL_TIM_IRQHandler+0x64>
    {
      {
        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
 800d30c:	687b      	ldr	r3, [r7, #4]
 800d30e:	681b      	ldr	r3, [r3, #0]
 800d310:	f06f 0202 	mvn.w	r2, #2
 800d314:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800d316:	687b      	ldr	r3, [r7, #4]
 800d318:	2201      	movs	r2, #1
 800d31a:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800d31c:	687b      	ldr	r3, [r7, #4]
 800d31e:	681b      	ldr	r3, [r3, #0]
 800d320:	699b      	ldr	r3, [r3, #24]
 800d322:	f003 0303 	and.w	r3, r3, #3
 800d326:	2b00      	cmp	r3, #0
 800d328:	d003      	beq.n	800d332 <HAL_TIM_IRQHandler+0x52>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 800d32a:	6878      	ldr	r0, [r7, #4]
 800d32c:	f000 f8e9 	bl	800d502 <HAL_TIM_IC_CaptureCallback>
 800d330:	e005      	b.n	800d33e <HAL_TIM_IRQHandler+0x5e>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800d332:	6878      	ldr	r0, [r7, #4]
 800d334:	f000 f8db 	bl	800d4ee <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d338:	6878      	ldr	r0, [r7, #4]
 800d33a:	f000 f8ec 	bl	800d516 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d33e:	687b      	ldr	r3, [r7, #4]
 800d340:	2200      	movs	r2, #0
 800d342:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
 800d344:	68bb      	ldr	r3, [r7, #8]
 800d346:	f003 0304 	and.w	r3, r3, #4
 800d34a:	2b00      	cmp	r3, #0
 800d34c:	d020      	beq.n	800d390 <HAL_TIM_IRQHandler+0xb0>
  {
    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
 800d34e:	68fb      	ldr	r3, [r7, #12]
 800d350:	f003 0304 	and.w	r3, r3, #4
 800d354:	2b00      	cmp	r3, #0
 800d356:	d01b      	beq.n	800d390 <HAL_TIM_IRQHandler+0xb0>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
 800d358:	687b      	ldr	r3, [r7, #4]
 800d35a:	681b      	ldr	r3, [r3, #0]
 800d35c:	f06f 0204 	mvn.w	r2, #4
 800d360:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800d362:	687b      	ldr	r3, [r7, #4]
 800d364:	2202      	movs	r2, #2
 800d366:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800d368:	687b      	ldr	r3, [r7, #4]
 800d36a:	681b      	ldr	r3, [r3, #0]
 800d36c:	699b      	ldr	r3, [r3, #24]
 800d36e:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800d372:	2b00      	cmp	r3, #0
 800d374:	d003      	beq.n	800d37e <HAL_TIM_IRQHandler+0x9e>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d376:	6878      	ldr	r0, [r7, #4]
 800d378:	f000 f8c3 	bl	800d502 <HAL_TIM_IC_CaptureCallback>
 800d37c:	e005      	b.n	800d38a <HAL_TIM_IRQHandler+0xaa>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d37e:	6878      	ldr	r0, [r7, #4]
 800d380:	f000 f8b5 	bl	800d4ee <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d384:	6878      	ldr	r0, [r7, #4]
 800d386:	f000 f8c6 	bl	800d516 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d38a:	687b      	ldr	r3, [r7, #4]
 800d38c:	2200      	movs	r2, #0
 800d38e:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
 800d390:	68bb      	ldr	r3, [r7, #8]
 800d392:	f003 0308 	and.w	r3, r3, #8
 800d396:	2b00      	cmp	r3, #0
 800d398:	d020      	beq.n	800d3dc <HAL_TIM_IRQHandler+0xfc>
  {
    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
 800d39a:	68fb      	ldr	r3, [r7, #12]
 800d39c:	f003 0308 	and.w	r3, r3, #8
 800d3a0:	2b00      	cmp	r3, #0
 800d3a2:	d01b      	beq.n	800d3dc <HAL_TIM_IRQHandler+0xfc>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
 800d3a4:	687b      	ldr	r3, [r7, #4]
 800d3a6:	681b      	ldr	r3, [r3, #0]
 800d3a8:	f06f 0208 	mvn.w	r2, #8
 800d3ac:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800d3ae:	687b      	ldr	r3, [r7, #4]
 800d3b0:	2204      	movs	r2, #4
 800d3b2:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800d3b4:	687b      	ldr	r3, [r7, #4]
 800d3b6:	681b      	ldr	r3, [r3, #0]
 800d3b8:	69db      	ldr	r3, [r3, #28]
 800d3ba:	f003 0303 	and.w	r3, r3, #3
 800d3be:	2b00      	cmp	r3, #0
 800d3c0:	d003      	beq.n	800d3ca <HAL_TIM_IRQHandler+0xea>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d3c2:	6878      	ldr	r0, [r7, #4]
 800d3c4:	f000 f89d 	bl	800d502 <HAL_TIM_IC_CaptureCallback>
 800d3c8:	e005      	b.n	800d3d6 <HAL_TIM_IRQHandler+0xf6>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d3ca:	6878      	ldr	r0, [r7, #4]
 800d3cc:	f000 f88f 	bl	800d4ee <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d3d0:	6878      	ldr	r0, [r7, #4]
 800d3d2:	f000 f8a0 	bl	800d516 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d3d6:	687b      	ldr	r3, [r7, #4]
 800d3d8:	2200      	movs	r2, #0
 800d3da:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
 800d3dc:	68bb      	ldr	r3, [r7, #8]
 800d3de:	f003 0310 	and.w	r3, r3, #16
 800d3e2:	2b00      	cmp	r3, #0
 800d3e4:	d020      	beq.n	800d428 <HAL_TIM_IRQHandler+0x148>
  {
    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
 800d3e6:	68fb      	ldr	r3, [r7, #12]
 800d3e8:	f003 0310 	and.w	r3, r3, #16
 800d3ec:	2b00      	cmp	r3, #0
 800d3ee:	d01b      	beq.n	800d428 <HAL_TIM_IRQHandler+0x148>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
 800d3f0:	687b      	ldr	r3, [r7, #4]
 800d3f2:	681b      	ldr	r3, [r3, #0]
 800d3f4:	f06f 0210 	mvn.w	r2, #16
 800d3f8:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800d3fa:	687b      	ldr	r3, [r7, #4]
 800d3fc:	2208      	movs	r2, #8
 800d3fe:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800d400:	687b      	ldr	r3, [r7, #4]
 800d402:	681b      	ldr	r3, [r3, #0]
 800d404:	69db      	ldr	r3, [r3, #28]
 800d406:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800d40a:	2b00      	cmp	r3, #0
 800d40c:	d003      	beq.n	800d416 <HAL_TIM_IRQHandler+0x136>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d40e:	6878      	ldr	r0, [r7, #4]
 800d410:	f000 f877 	bl	800d502 <HAL_TIM_IC_CaptureCallback>
 800d414:	e005      	b.n	800d422 <HAL_TIM_IRQHandler+0x142>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d416:	6878      	ldr	r0, [r7, #4]
 800d418:	f000 f869 	bl	800d4ee <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d41c:	6878      	ldr	r0, [r7, #4]
 800d41e:	f000 f87a 	bl	800d516 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d422:	687b      	ldr	r3, [r7, #4]
 800d424:	2200      	movs	r2, #0
 800d426:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
 800d428:	68bb      	ldr	r3, [r7, #8]
 800d42a:	f003 0301 	and.w	r3, r3, #1
 800d42e:	2b00      	cmp	r3, #0
 800d430:	d00c      	beq.n	800d44c <HAL_TIM_IRQHandler+0x16c>
  {
    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
 800d432:	68fb      	ldr	r3, [r7, #12]
 800d434:	f003 0301 	and.w	r3, r3, #1
 800d438:	2b00      	cmp	r3, #0
 800d43a:	d007      	beq.n	800d44c <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
 800d43c:	687b      	ldr	r3, [r7, #4]
 800d43e:	681b      	ldr	r3, [r3, #0]
 800d440:	f06f 0201 	mvn.w	r2, #1
 800d444:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 800d446:	6878      	ldr	r0, [r7, #4]
 800d448:	f7f5 f908 	bl	800265c <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800d44c:	68bb      	ldr	r3, [r7, #8]
 800d44e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d452:	2b00      	cmp	r3, #0
 800d454:	d104      	bne.n	800d460 <HAL_TIM_IRQHandler+0x180>
      ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
 800d456:	68bb      	ldr	r3, [r7, #8]
 800d458:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800d45c:	2b00      	cmp	r3, #0
 800d45e:	d00c      	beq.n	800d47a <HAL_TIM_IRQHandler+0x19a>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800d460:	68fb      	ldr	r3, [r7, #12]
 800d462:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d466:	2b00      	cmp	r3, #0
 800d468:	d007      	beq.n	800d47a <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
 800d46a:	687b      	ldr	r3, [r7, #4]
 800d46c:	681b      	ldr	r3, [r3, #0]
 800d46e:	f46f 5202 	mvn.w	r2, #8320	@ 0x2080
 800d472:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 800d474:	6878      	ldr	r0, [r7, #4]
 800d476:	f000 f913 	bl	800d6a0 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break2 input event */
  if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
 800d47a:	68bb      	ldr	r3, [r7, #8]
 800d47c:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800d480:	2b00      	cmp	r3, #0
 800d482:	d00c      	beq.n	800d49e <HAL_TIM_IRQHandler+0x1be>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800d484:	68fb      	ldr	r3, [r7, #12]
 800d486:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d48a:	2b00      	cmp	r3, #0
 800d48c:	d007      	beq.n	800d49e <HAL_TIM_IRQHandler+0x1be>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
 800d48e:	687b      	ldr	r3, [r7, #4]
 800d490:	681b      	ldr	r3, [r3, #0]
 800d492:	f46f 7280 	mvn.w	r2, #256	@ 0x100
 800d496:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->Break2Callback(htim);
#else
      HAL_TIMEx_Break2Callback(htim);
 800d498:	6878      	ldr	r0, [r7, #4]
 800d49a:	f000 f90b 	bl	800d6b4 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
 800d49e:	68bb      	ldr	r3, [r7, #8]
 800d4a0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d4a4:	2b00      	cmp	r3, #0
 800d4a6:	d00c      	beq.n	800d4c2 <HAL_TIM_IRQHandler+0x1e2>
  {
    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
 800d4a8:	68fb      	ldr	r3, [r7, #12]
 800d4aa:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d4ae:	2b00      	cmp	r3, #0
 800d4b0:	d007      	beq.n	800d4c2 <HAL_TIM_IRQHandler+0x1e2>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
 800d4b2:	687b      	ldr	r3, [r7, #4]
 800d4b4:	681b      	ldr	r3, [r3, #0]
 800d4b6:	f06f 0240 	mvn.w	r2, #64	@ 0x40
 800d4ba:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 800d4bc:	6878      	ldr	r0, [r7, #4]
 800d4be:	f000 f834 	bl	800d52a <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
 800d4c2:	68bb      	ldr	r3, [r7, #8]
 800d4c4:	f003 0320 	and.w	r3, r3, #32
 800d4c8:	2b00      	cmp	r3, #0
 800d4ca:	d00c      	beq.n	800d4e6 <HAL_TIM_IRQHandler+0x206>
  {
    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
 800d4cc:	68fb      	ldr	r3, [r7, #12]
 800d4ce:	f003 0320 	and.w	r3, r3, #32
 800d4d2:	2b00      	cmp	r3, #0
 800d4d4:	d007      	beq.n	800d4e6 <HAL_TIM_IRQHandler+0x206>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
 800d4d6:	687b      	ldr	r3, [r7, #4]
 800d4d8:	681b      	ldr	r3, [r3, #0]
 800d4da:	f06f 0220 	mvn.w	r2, #32
 800d4de:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800d4e0:	6878      	ldr	r0, [r7, #4]
 800d4e2:	f000 f8d3 	bl	800d68c <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 800d4e6:	bf00      	nop
 800d4e8:	3710      	adds	r7, #16
 800d4ea:	46bd      	mov	sp, r7
 800d4ec:	bd80      	pop	{r7, pc}

0800d4ee <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800d4ee:	b480      	push	{r7}
 800d4f0:	b083      	sub	sp, #12
 800d4f2:	af00      	add	r7, sp, #0
 800d4f4:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 800d4f6:	bf00      	nop
 800d4f8:	370c      	adds	r7, #12
 800d4fa:	46bd      	mov	sp, r7
 800d4fc:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d500:	4770      	bx	lr

0800d502 <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800d502:	b480      	push	{r7}
 800d504:	b083      	sub	sp, #12
 800d506:	af00      	add	r7, sp, #0
 800d508:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 800d50a:	bf00      	nop
 800d50c:	370c      	adds	r7, #12
 800d50e:	46bd      	mov	sp, r7
 800d510:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d514:	4770      	bx	lr

0800d516 <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800d516:	b480      	push	{r7}
 800d518:	b083      	sub	sp, #12
 800d51a:	af00      	add	r7, sp, #0
 800d51c:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 800d51e:	bf00      	nop
 800d520:	370c      	adds	r7, #12
 800d522:	46bd      	mov	sp, r7
 800d524:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d528:	4770      	bx	lr

0800d52a <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800d52a:	b480      	push	{r7}
 800d52c:	b083      	sub	sp, #12
 800d52e:	af00      	add	r7, sp, #0
 800d530:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 800d532:	bf00      	nop
 800d534:	370c      	adds	r7, #12
 800d536:	46bd      	mov	sp, r7
 800d538:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d53c:	4770      	bx	lr
	...

0800d540 <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
 800d540:	b480      	push	{r7}
 800d542:	b085      	sub	sp, #20
 800d544:	af00      	add	r7, sp, #0
 800d546:	6078      	str	r0, [r7, #4]
 800d548:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 800d54a:	687b      	ldr	r3, [r7, #4]
 800d54c:	681b      	ldr	r3, [r3, #0]
 800d54e:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800d550:	687b      	ldr	r3, [r7, #4]
 800d552:	4a46      	ldr	r2, [pc, #280]	@ (800d66c <TIM_Base_SetConfig+0x12c>)
 800d554:	4293      	cmp	r3, r2
 800d556:	d013      	beq.n	800d580 <TIM_Base_SetConfig+0x40>
 800d558:	687b      	ldr	r3, [r7, #4]
 800d55a:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d55e:	d00f      	beq.n	800d580 <TIM_Base_SetConfig+0x40>
 800d560:	687b      	ldr	r3, [r7, #4]
 800d562:	4a43      	ldr	r2, [pc, #268]	@ (800d670 <TIM_Base_SetConfig+0x130>)
 800d564:	4293      	cmp	r3, r2
 800d566:	d00b      	beq.n	800d580 <TIM_Base_SetConfig+0x40>
 800d568:	687b      	ldr	r3, [r7, #4]
 800d56a:	4a42      	ldr	r2, [pc, #264]	@ (800d674 <TIM_Base_SetConfig+0x134>)
 800d56c:	4293      	cmp	r3, r2
 800d56e:	d007      	beq.n	800d580 <TIM_Base_SetConfig+0x40>
 800d570:	687b      	ldr	r3, [r7, #4]
 800d572:	4a41      	ldr	r2, [pc, #260]	@ (800d678 <TIM_Base_SetConfig+0x138>)
 800d574:	4293      	cmp	r3, r2
 800d576:	d003      	beq.n	800d580 <TIM_Base_SetConfig+0x40>
 800d578:	687b      	ldr	r3, [r7, #4]
 800d57a:	4a40      	ldr	r2, [pc, #256]	@ (800d67c <TIM_Base_SetConfig+0x13c>)
 800d57c:	4293      	cmp	r3, r2
 800d57e:	d108      	bne.n	800d592 <TIM_Base_SetConfig+0x52>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800d580:	68fb      	ldr	r3, [r7, #12]
 800d582:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
 800d586:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 800d588:	683b      	ldr	r3, [r7, #0]
 800d58a:	685b      	ldr	r3, [r3, #4]
 800d58c:	68fa      	ldr	r2, [r7, #12]
 800d58e:	4313      	orrs	r3, r2
 800d590:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800d592:	687b      	ldr	r3, [r7, #4]
 800d594:	4a35      	ldr	r2, [pc, #212]	@ (800d66c <TIM_Base_SetConfig+0x12c>)
 800d596:	4293      	cmp	r3, r2
 800d598:	d01f      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d59a:	687b      	ldr	r3, [r7, #4]
 800d59c:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d5a0:	d01b      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5a2:	687b      	ldr	r3, [r7, #4]
 800d5a4:	4a32      	ldr	r2, [pc, #200]	@ (800d670 <TIM_Base_SetConfig+0x130>)
 800d5a6:	4293      	cmp	r3, r2
 800d5a8:	d017      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5aa:	687b      	ldr	r3, [r7, #4]
 800d5ac:	4a31      	ldr	r2, [pc, #196]	@ (800d674 <TIM_Base_SetConfig+0x134>)
 800d5ae:	4293      	cmp	r3, r2
 800d5b0:	d013      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5b2:	687b      	ldr	r3, [r7, #4]
 800d5b4:	4a30      	ldr	r2, [pc, #192]	@ (800d678 <TIM_Base_SetConfig+0x138>)
 800d5b6:	4293      	cmp	r3, r2
 800d5b8:	d00f      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5ba:	687b      	ldr	r3, [r7, #4]
 800d5bc:	4a2f      	ldr	r2, [pc, #188]	@ (800d67c <TIM_Base_SetConfig+0x13c>)
 800d5be:	4293      	cmp	r3, r2
 800d5c0:	d00b      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5c2:	687b      	ldr	r3, [r7, #4]
 800d5c4:	4a2e      	ldr	r2, [pc, #184]	@ (800d680 <TIM_Base_SetConfig+0x140>)
 800d5c6:	4293      	cmp	r3, r2
 800d5c8:	d007      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5ca:	687b      	ldr	r3, [r7, #4]
 800d5cc:	4a2d      	ldr	r2, [pc, #180]	@ (800d684 <TIM_Base_SetConfig+0x144>)
 800d5ce:	4293      	cmp	r3, r2
 800d5d0:	d003      	beq.n	800d5da <TIM_Base_SetConfig+0x9a>
 800d5d2:	687b      	ldr	r3, [r7, #4]
 800d5d4:	4a2c      	ldr	r2, [pc, #176]	@ (800d688 <TIM_Base_SetConfig+0x148>)
 800d5d6:	4293      	cmp	r3, r2
 800d5d8:	d108      	bne.n	800d5ec <TIM_Base_SetConfig+0xac>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 800d5da:	68fb      	ldr	r3, [r7, #12]
 800d5dc:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800d5e0:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800d5e2:	683b      	ldr	r3, [r7, #0]
 800d5e4:	68db      	ldr	r3, [r3, #12]
 800d5e6:	68fa      	ldr	r2, [r7, #12]
 800d5e8:	4313      	orrs	r3, r2
 800d5ea:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 800d5ec:	68fb      	ldr	r3, [r7, #12]
 800d5ee:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
 800d5f2:	683b      	ldr	r3, [r7, #0]
 800d5f4:	695b      	ldr	r3, [r3, #20]
 800d5f6:	4313      	orrs	r3, r2
 800d5f8:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 800d5fa:	687b      	ldr	r3, [r7, #4]
 800d5fc:	68fa      	ldr	r2, [r7, #12]
 800d5fe:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 800d600:	683b      	ldr	r3, [r7, #0]
 800d602:	689a      	ldr	r2, [r3, #8]
 800d604:	687b      	ldr	r3, [r7, #4]
 800d606:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 800d608:	683b      	ldr	r3, [r7, #0]
 800d60a:	681a      	ldr	r2, [r3, #0]
 800d60c:	687b      	ldr	r3, [r7, #4]
 800d60e:	629a      	str	r2, [r3, #40]	@ 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 800d610:	687b      	ldr	r3, [r7, #4]
 800d612:	4a16      	ldr	r2, [pc, #88]	@ (800d66c <TIM_Base_SetConfig+0x12c>)
 800d614:	4293      	cmp	r3, r2
 800d616:	d00f      	beq.n	800d638 <TIM_Base_SetConfig+0xf8>
 800d618:	687b      	ldr	r3, [r7, #4]
 800d61a:	4a18      	ldr	r2, [pc, #96]	@ (800d67c <TIM_Base_SetConfig+0x13c>)
 800d61c:	4293      	cmp	r3, r2
 800d61e:	d00b      	beq.n	800d638 <TIM_Base_SetConfig+0xf8>
 800d620:	687b      	ldr	r3, [r7, #4]
 800d622:	4a17      	ldr	r2, [pc, #92]	@ (800d680 <TIM_Base_SetConfig+0x140>)
 800d624:	4293      	cmp	r3, r2
 800d626:	d007      	beq.n	800d638 <TIM_Base_SetConfig+0xf8>
 800d628:	687b      	ldr	r3, [r7, #4]
 800d62a:	4a16      	ldr	r2, [pc, #88]	@ (800d684 <TIM_Base_SetConfig+0x144>)
 800d62c:	4293      	cmp	r3, r2
 800d62e:	d003      	beq.n	800d638 <TIM_Base_SetConfig+0xf8>
 800d630:	687b      	ldr	r3, [r7, #4]
 800d632:	4a15      	ldr	r2, [pc, #84]	@ (800d688 <TIM_Base_SetConfig+0x148>)
 800d634:	4293      	cmp	r3, r2
 800d636:	d103      	bne.n	800d640 <TIM_Base_SetConfig+0x100>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800d638:	683b      	ldr	r3, [r7, #0]
 800d63a:	691a      	ldr	r2, [r3, #16]
 800d63c:	687b      	ldr	r3, [r7, #4]
 800d63e:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 800d640:	687b      	ldr	r3, [r7, #4]
 800d642:	2201      	movs	r2, #1
 800d644:	615a      	str	r2, [r3, #20]

  /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
  if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
 800d646:	687b      	ldr	r3, [r7, #4]
 800d648:	691b      	ldr	r3, [r3, #16]
 800d64a:	f003 0301 	and.w	r3, r3, #1
 800d64e:	2b01      	cmp	r3, #1
 800d650:	d105      	bne.n	800d65e <TIM_Base_SetConfig+0x11e>
  {
    /* Clear the update flag */
    CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
 800d652:	687b      	ldr	r3, [r7, #4]
 800d654:	691b      	ldr	r3, [r3, #16]
 800d656:	f023 0201 	bic.w	r2, r3, #1
 800d65a:	687b      	ldr	r3, [r7, #4]
 800d65c:	611a      	str	r2, [r3, #16]
  }
}
 800d65e:	bf00      	nop
 800d660:	3714      	adds	r7, #20
 800d662:	46bd      	mov	sp, r7
 800d664:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d668:	4770      	bx	lr
 800d66a:	bf00      	nop
 800d66c:	40010000 	.word	0x40010000
 800d670:	40000400 	.word	0x40000400
 800d674:	40000800 	.word	0x40000800
 800d678:	40000c00 	.word	0x40000c00
 800d67c:	40010400 	.word	0x40010400
 800d680:	40014000 	.word	0x40014000
 800d684:	40014400 	.word	0x40014400
 800d688:	40014800 	.word	0x40014800

0800d68c <HAL_TIMEx_CommutCallback>:
  * @brief  Commutation callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 800d68c:	b480      	push	{r7}
 800d68e:	b083      	sub	sp, #12
 800d690:	af00      	add	r7, sp, #0
 800d692:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 800d694:	bf00      	nop
 800d696:	370c      	adds	r7, #12
 800d698:	46bd      	mov	sp, r7
 800d69a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d69e:	4770      	bx	lr

0800d6a0 <HAL_TIMEx_BreakCallback>:
  * @brief  Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800d6a0:	b480      	push	{r7}
 800d6a2:	b083      	sub	sp, #12
 800d6a4:	af00      	add	r7, sp, #0
 800d6a6:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 800d6a8:	bf00      	nop
 800d6aa:	370c      	adds	r7, #12
 800d6ac:	46bd      	mov	sp, r7
 800d6ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d6b2:	4770      	bx	lr

0800d6b4 <HAL_TIMEx_Break2Callback>:
  * @brief  Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
 800d6b4:	b480      	push	{r7}
 800d6b6:	b083      	sub	sp, #12
 800d6b8:	af00      	add	r7, sp, #0
 800d6ba:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
 800d6bc:	bf00      	nop
 800d6be:	370c      	adds	r7, #12
 800d6c0:	46bd      	mov	sp, r7
 800d6c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d6c6:	4770      	bx	lr

0800d6c8 <HAL_UART_Init>:
  *        parameters in the UART_InitTypeDef and initialize the associated handle.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 800d6c8:	b580      	push	{r7, lr}
 800d6ca:	b082      	sub	sp, #8
 800d6cc:	af00      	add	r7, sp, #0
 800d6ce:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 800d6d0:	687b      	ldr	r3, [r7, #4]
 800d6d2:	2b00      	cmp	r3, #0
 800d6d4:	d101      	bne.n	800d6da <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 800d6d6:	2301      	movs	r3, #1
 800d6d8:	e042      	b.n	800d760 <HAL_UART_Init+0x98>
  {
    /* Check the parameters */
    assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
  }

  if (huart->gState == HAL_UART_STATE_RESET)
 800d6da:	687b      	ldr	r3, [r7, #4]
 800d6dc:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d6e0:	2b00      	cmp	r3, #0
 800d6e2:	d106      	bne.n	800d6f2 <HAL_UART_Init+0x2a>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 800d6e4:	687b      	ldr	r3, [r7, #4]
 800d6e6:	2200      	movs	r2, #0
 800d6e8:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800d6ec:	6878      	ldr	r0, [r7, #4]
 800d6ee:	f7f6 f96d 	bl	80039cc <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 800d6f2:	687b      	ldr	r3, [r7, #4]
 800d6f4:	2224      	movs	r2, #36	@ 0x24
 800d6f6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  __HAL_UART_DISABLE(huart);
 800d6fa:	687b      	ldr	r3, [r7, #4]
 800d6fc:	681b      	ldr	r3, [r3, #0]
 800d6fe:	681a      	ldr	r2, [r3, #0]
 800d700:	687b      	ldr	r3, [r7, #4]
 800d702:	681b      	ldr	r3, [r3, #0]
 800d704:	f022 0201 	bic.w	r2, r2, #1
 800d708:	601a      	str	r2, [r3, #0]

  /* Perform advanced settings configuration */
  /* For some items, configuration requires to be done prior TE and RE bits are set */
  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
 800d70a:	687b      	ldr	r3, [r7, #4]
 800d70c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d70e:	2b00      	cmp	r3, #0
 800d710:	d002      	beq.n	800d718 <HAL_UART_Init+0x50>
  {
    UART_AdvFeatureConfig(huart);
 800d712:	6878      	ldr	r0, [r7, #4]
 800d714:	f001 fa76 	bl	800ec04 <UART_AdvFeatureConfig>
  }

  /* Set the UART Communication parameters */
  if (UART_SetConfig(huart) == HAL_ERROR)
 800d718:	6878      	ldr	r0, [r7, #4]
 800d71a:	f000 fd0b 	bl	800e134 <UART_SetConfig>
 800d71e:	4603      	mov	r3, r0
 800d720:	2b01      	cmp	r3, #1
 800d722:	d101      	bne.n	800d728 <HAL_UART_Init+0x60>
  {
    return HAL_ERROR;
 800d724:	2301      	movs	r3, #1
 800d726:	e01b      	b.n	800d760 <HAL_UART_Init+0x98>
  }

  /* In asynchronous mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CR2 register,
  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800d728:	687b      	ldr	r3, [r7, #4]
 800d72a:	681b      	ldr	r3, [r3, #0]
 800d72c:	685a      	ldr	r2, [r3, #4]
 800d72e:	687b      	ldr	r3, [r7, #4]
 800d730:	681b      	ldr	r3, [r3, #0]
 800d732:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
 800d736:	605a      	str	r2, [r3, #4]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800d738:	687b      	ldr	r3, [r7, #4]
 800d73a:	681b      	ldr	r3, [r3, #0]
 800d73c:	689a      	ldr	r2, [r3, #8]
 800d73e:	687b      	ldr	r3, [r7, #4]
 800d740:	681b      	ldr	r3, [r3, #0]
 800d742:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
 800d746:	609a      	str	r2, [r3, #8]

  __HAL_UART_ENABLE(huart);
 800d748:	687b      	ldr	r3, [r7, #4]
 800d74a:	681b      	ldr	r3, [r3, #0]
 800d74c:	681a      	ldr	r2, [r3, #0]
 800d74e:	687b      	ldr	r3, [r7, #4]
 800d750:	681b      	ldr	r3, [r3, #0]
 800d752:	f042 0201 	orr.w	r2, r2, #1
 800d756:	601a      	str	r2, [r3, #0]

  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  return (UART_CheckIdleState(huart));
 800d758:	6878      	ldr	r0, [r7, #4]
 800d75a:	f001 faf5 	bl	800ed48 <UART_CheckIdleState>
 800d75e:	4603      	mov	r3, r0
}
 800d760:	4618      	mov	r0, r3
 800d762:	3708      	adds	r7, #8
 800d764:	46bd      	mov	sp, r7
 800d766:	bd80      	pop	{r7, pc}

0800d768 <HAL_UART_Transmit>:
  * @param Size    Amount of data elements (u8 or u16) to be sent.
  * @param Timeout Timeout duration.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
 800d768:	b580      	push	{r7, lr}
 800d76a:	b08a      	sub	sp, #40	@ 0x28
 800d76c:	af02      	add	r7, sp, #8
 800d76e:	60f8      	str	r0, [r7, #12]
 800d770:	60b9      	str	r1, [r7, #8]
 800d772:	603b      	str	r3, [r7, #0]
 800d774:	4613      	mov	r3, r2
 800d776:	80fb      	strh	r3, [r7, #6]
  const uint8_t  *pdata8bits;
  const uint16_t *pdata16bits;
  uint32_t tickstart;

  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800d778:	68fb      	ldr	r3, [r7, #12]
 800d77a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d77e:	2b20      	cmp	r3, #32
 800d780:	d17b      	bne.n	800d87a <HAL_UART_Transmit+0x112>
  {
    if ((pData == NULL) || (Size == 0U))
 800d782:	68bb      	ldr	r3, [r7, #8]
 800d784:	2b00      	cmp	r3, #0
 800d786:	d002      	beq.n	800d78e <HAL_UART_Transmit+0x26>
 800d788:	88fb      	ldrh	r3, [r7, #6]
 800d78a:	2b00      	cmp	r3, #0
 800d78c:	d101      	bne.n	800d792 <HAL_UART_Transmit+0x2a>
    {
      return  HAL_ERROR;
 800d78e:	2301      	movs	r3, #1
 800d790:	e074      	b.n	800d87c <HAL_UART_Transmit+0x114>
    }

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d792:	68fb      	ldr	r3, [r7, #12]
 800d794:	2200      	movs	r2, #0
 800d796:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800d79a:	68fb      	ldr	r3, [r7, #12]
 800d79c:	2221      	movs	r2, #33	@ 0x21
 800d79e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Init tickstart for timeout management */
    tickstart = HAL_GetTick();
 800d7a2:	f7f7 ff77 	bl	8005694 <HAL_GetTick>
 800d7a6:	6178      	str	r0, [r7, #20]

    huart->TxXferSize  = Size;
 800d7a8:	68fb      	ldr	r3, [r7, #12]
 800d7aa:	88fa      	ldrh	r2, [r7, #6]
 800d7ac:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800d7b0:	68fb      	ldr	r3, [r7, #12]
 800d7b2:	88fa      	ldrh	r2, [r7, #6]
 800d7b4:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56

    /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d7b8:	68fb      	ldr	r3, [r7, #12]
 800d7ba:	689b      	ldr	r3, [r3, #8]
 800d7bc:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d7c0:	d108      	bne.n	800d7d4 <HAL_UART_Transmit+0x6c>
 800d7c2:	68fb      	ldr	r3, [r7, #12]
 800d7c4:	691b      	ldr	r3, [r3, #16]
 800d7c6:	2b00      	cmp	r3, #0
 800d7c8:	d104      	bne.n	800d7d4 <HAL_UART_Transmit+0x6c>
    {
      pdata8bits  = NULL;
 800d7ca:	2300      	movs	r3, #0
 800d7cc:	61fb      	str	r3, [r7, #28]
      pdata16bits = (const uint16_t *) pData;
 800d7ce:	68bb      	ldr	r3, [r7, #8]
 800d7d0:	61bb      	str	r3, [r7, #24]
 800d7d2:	e003      	b.n	800d7dc <HAL_UART_Transmit+0x74>
    }
    else
    {
      pdata8bits  = pData;
 800d7d4:	68bb      	ldr	r3, [r7, #8]
 800d7d6:	61fb      	str	r3, [r7, #28]
      pdata16bits = NULL;
 800d7d8:	2300      	movs	r3, #0
 800d7da:	61bb      	str	r3, [r7, #24]
    }

    while (huart->TxXferCount > 0U)
 800d7dc:	e030      	b.n	800d840 <HAL_UART_Transmit+0xd8>
    {
      if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800d7de:	683b      	ldr	r3, [r7, #0]
 800d7e0:	9300      	str	r3, [sp, #0]
 800d7e2:	697b      	ldr	r3, [r7, #20]
 800d7e4:	2200      	movs	r2, #0
 800d7e6:	2180      	movs	r1, #128	@ 0x80
 800d7e8:	68f8      	ldr	r0, [r7, #12]
 800d7ea:	f001 fb57 	bl	800ee9c <UART_WaitOnFlagUntilTimeout>
 800d7ee:	4603      	mov	r3, r0
 800d7f0:	2b00      	cmp	r3, #0
 800d7f2:	d005      	beq.n	800d800 <HAL_UART_Transmit+0x98>
      {

        huart->gState = HAL_UART_STATE_READY;
 800d7f4:	68fb      	ldr	r3, [r7, #12]
 800d7f6:	2220      	movs	r2, #32
 800d7f8:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

        return HAL_TIMEOUT;
 800d7fc:	2303      	movs	r3, #3
 800d7fe:	e03d      	b.n	800d87c <HAL_UART_Transmit+0x114>
      }
      if (pdata8bits == NULL)
 800d800:	69fb      	ldr	r3, [r7, #28]
 800d802:	2b00      	cmp	r3, #0
 800d804:	d10b      	bne.n	800d81e <HAL_UART_Transmit+0xb6>
      {
        huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
 800d806:	69bb      	ldr	r3, [r7, #24]
 800d808:	881b      	ldrh	r3, [r3, #0]
 800d80a:	461a      	mov	r2, r3
 800d80c:	68fb      	ldr	r3, [r7, #12]
 800d80e:	681b      	ldr	r3, [r3, #0]
 800d810:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800d814:	629a      	str	r2, [r3, #40]	@ 0x28
        pdata16bits++;
 800d816:	69bb      	ldr	r3, [r7, #24]
 800d818:	3302      	adds	r3, #2
 800d81a:	61bb      	str	r3, [r7, #24]
 800d81c:	e007      	b.n	800d82e <HAL_UART_Transmit+0xc6>
      }
      else
      {
        huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
 800d81e:	69fb      	ldr	r3, [r7, #28]
 800d820:	781a      	ldrb	r2, [r3, #0]
 800d822:	68fb      	ldr	r3, [r7, #12]
 800d824:	681b      	ldr	r3, [r3, #0]
 800d826:	629a      	str	r2, [r3, #40]	@ 0x28
        pdata8bits++;
 800d828:	69fb      	ldr	r3, [r7, #28]
 800d82a:	3301      	adds	r3, #1
 800d82c:	61fb      	str	r3, [r7, #28]
      }
      huart->TxXferCount--;
 800d82e:	68fb      	ldr	r3, [r7, #12]
 800d830:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800d834:	b29b      	uxth	r3, r3
 800d836:	3b01      	subs	r3, #1
 800d838:	b29a      	uxth	r2, r3
 800d83a:	68fb      	ldr	r3, [r7, #12]
 800d83c:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    while (huart->TxXferCount > 0U)
 800d840:	68fb      	ldr	r3, [r7, #12]
 800d842:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800d846:	b29b      	uxth	r3, r3
 800d848:	2b00      	cmp	r3, #0
 800d84a:	d1c8      	bne.n	800d7de <HAL_UART_Transmit+0x76>
    }

    if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 800d84c:	683b      	ldr	r3, [r7, #0]
 800d84e:	9300      	str	r3, [sp, #0]
 800d850:	697b      	ldr	r3, [r7, #20]
 800d852:	2200      	movs	r2, #0
 800d854:	2140      	movs	r1, #64	@ 0x40
 800d856:	68f8      	ldr	r0, [r7, #12]
 800d858:	f001 fb20 	bl	800ee9c <UART_WaitOnFlagUntilTimeout>
 800d85c:	4603      	mov	r3, r0
 800d85e:	2b00      	cmp	r3, #0
 800d860:	d005      	beq.n	800d86e <HAL_UART_Transmit+0x106>
    {
      huart->gState = HAL_UART_STATE_READY;
 800d862:	68fb      	ldr	r3, [r7, #12]
 800d864:	2220      	movs	r2, #32
 800d866:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      return HAL_TIMEOUT;
 800d86a:	2303      	movs	r3, #3
 800d86c:	e006      	b.n	800d87c <HAL_UART_Transmit+0x114>
    }

    /* At end of Tx process, restore huart->gState to Ready */
    huart->gState = HAL_UART_STATE_READY;
 800d86e:	68fb      	ldr	r3, [r7, #12]
 800d870:	2220      	movs	r2, #32
 800d872:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    return HAL_OK;
 800d876:	2300      	movs	r3, #0
 800d878:	e000      	b.n	800d87c <HAL_UART_Transmit+0x114>
  }
  else
  {
    return HAL_BUSY;
 800d87a:	2302      	movs	r3, #2
  }
}
 800d87c:	4618      	mov	r0, r3
 800d87e:	3720      	adds	r7, #32
 800d880:	46bd      	mov	sp, r7
 800d882:	bd80      	pop	{r7, pc}

0800d884 <HAL_UART_Transmit_IT>:
  * @param pData Pointer to data buffer (u8 or u16 data elements).
  * @param Size  Amount of data elements (u8 or u16) to be sent.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
 800d884:	b480      	push	{r7}
 800d886:	b091      	sub	sp, #68	@ 0x44
 800d888:	af00      	add	r7, sp, #0
 800d88a:	60f8      	str	r0, [r7, #12]
 800d88c:	60b9      	str	r1, [r7, #8]
 800d88e:	4613      	mov	r3, r2
 800d890:	80fb      	strh	r3, [r7, #6]
  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800d892:	68fb      	ldr	r3, [r7, #12]
 800d894:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800d898:	2b20      	cmp	r3, #32
 800d89a:	d178      	bne.n	800d98e <HAL_UART_Transmit_IT+0x10a>
  {
    if ((pData == NULL) || (Size == 0U))
 800d89c:	68bb      	ldr	r3, [r7, #8]
 800d89e:	2b00      	cmp	r3, #0
 800d8a0:	d002      	beq.n	800d8a8 <HAL_UART_Transmit_IT+0x24>
 800d8a2:	88fb      	ldrh	r3, [r7, #6]
 800d8a4:	2b00      	cmp	r3, #0
 800d8a6:	d101      	bne.n	800d8ac <HAL_UART_Transmit_IT+0x28>
    {
      return HAL_ERROR;
 800d8a8:	2301      	movs	r3, #1
 800d8aa:	e071      	b.n	800d990 <HAL_UART_Transmit_IT+0x10c>
    }

    huart->pTxBuffPtr  = pData;
 800d8ac:	68fb      	ldr	r3, [r7, #12]
 800d8ae:	68ba      	ldr	r2, [r7, #8]
 800d8b0:	651a      	str	r2, [r3, #80]	@ 0x50
    huart->TxXferSize  = Size;
 800d8b2:	68fb      	ldr	r3, [r7, #12]
 800d8b4:	88fa      	ldrh	r2, [r7, #6]
 800d8b6:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800d8ba:	68fb      	ldr	r3, [r7, #12]
 800d8bc:	88fa      	ldrh	r2, [r7, #6]
 800d8be:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    huart->TxISR       = NULL;
 800d8c2:	68fb      	ldr	r3, [r7, #12]
 800d8c4:	2200      	movs	r2, #0
 800d8c6:	679a      	str	r2, [r3, #120]	@ 0x78

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800d8c8:	68fb      	ldr	r3, [r7, #12]
 800d8ca:	2200      	movs	r2, #0
 800d8cc:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800d8d0:	68fb      	ldr	r3, [r7, #12]
 800d8d2:	2221      	movs	r2, #33	@ 0x21
 800d8d4:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Configure Tx interrupt processing */
    if (huart->FifoMode == UART_FIFOMODE_ENABLE)
 800d8d8:	68fb      	ldr	r3, [r7, #12]
 800d8da:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800d8dc:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800d8e0:	d12a      	bne.n	800d938 <HAL_UART_Transmit_IT+0xb4>
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d8e2:	68fb      	ldr	r3, [r7, #12]
 800d8e4:	689b      	ldr	r3, [r3, #8]
 800d8e6:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d8ea:	d107      	bne.n	800d8fc <HAL_UART_Transmit_IT+0x78>
 800d8ec:	68fb      	ldr	r3, [r7, #12]
 800d8ee:	691b      	ldr	r3, [r3, #16]
 800d8f0:	2b00      	cmp	r3, #0
 800d8f2:	d103      	bne.n	800d8fc <HAL_UART_Transmit_IT+0x78>
      {
        huart->TxISR = UART_TxISR_16BIT_FIFOEN;
 800d8f4:	68fb      	ldr	r3, [r7, #12]
 800d8f6:	4a29      	ldr	r2, [pc, #164]	@ (800d99c <HAL_UART_Transmit_IT+0x118>)
 800d8f8:	679a      	str	r2, [r3, #120]	@ 0x78
 800d8fa:	e002      	b.n	800d902 <HAL_UART_Transmit_IT+0x7e>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT_FIFOEN;
 800d8fc:	68fb      	ldr	r3, [r7, #12]
 800d8fe:	4a28      	ldr	r2, [pc, #160]	@ (800d9a0 <HAL_UART_Transmit_IT+0x11c>)
 800d900:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the TX FIFO threshold interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800d902:	68fb      	ldr	r3, [r7, #12]
 800d904:	681b      	ldr	r3, [r3, #0]
 800d906:	3308      	adds	r3, #8
 800d908:	62bb      	str	r3, [r7, #40]	@ 0x28
 */
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
    uint32_t result;

   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d90a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800d90c:	e853 3f00 	ldrex	r3, [r3]
 800d910:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800d912:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800d914:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800d918:	63bb      	str	r3, [r7, #56]	@ 0x38
 800d91a:	68fb      	ldr	r3, [r7, #12]
 800d91c:	681b      	ldr	r3, [r3, #0]
 800d91e:	3308      	adds	r3, #8
 800d920:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800d922:	637a      	str	r2, [r7, #52]	@ 0x34
 800d924:	633b      	str	r3, [r7, #48]	@ 0x30
 */
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
   uint32_t result;

   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d926:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800d928:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800d92a:	e841 2300 	strex	r3, r2, [r1]
 800d92e:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800d930:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800d932:	2b00      	cmp	r3, #0
 800d934:	d1e5      	bne.n	800d902 <HAL_UART_Transmit_IT+0x7e>
 800d936:	e028      	b.n	800d98a <HAL_UART_Transmit_IT+0x106>
    }
    else
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800d938:	68fb      	ldr	r3, [r7, #12]
 800d93a:	689b      	ldr	r3, [r3, #8]
 800d93c:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800d940:	d107      	bne.n	800d952 <HAL_UART_Transmit_IT+0xce>
 800d942:	68fb      	ldr	r3, [r7, #12]
 800d944:	691b      	ldr	r3, [r3, #16]
 800d946:	2b00      	cmp	r3, #0
 800d948:	d103      	bne.n	800d952 <HAL_UART_Transmit_IT+0xce>
      {
        huart->TxISR = UART_TxISR_16BIT;
 800d94a:	68fb      	ldr	r3, [r7, #12]
 800d94c:	4a15      	ldr	r2, [pc, #84]	@ (800d9a4 <HAL_UART_Transmit_IT+0x120>)
 800d94e:	679a      	str	r2, [r3, #120]	@ 0x78
 800d950:	e002      	b.n	800d958 <HAL_UART_Transmit_IT+0xd4>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT;
 800d952:	68fb      	ldr	r3, [r7, #12]
 800d954:	4a14      	ldr	r2, [pc, #80]	@ (800d9a8 <HAL_UART_Transmit_IT+0x124>)
 800d956:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the Transmit Data Register Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800d958:	68fb      	ldr	r3, [r7, #12]
 800d95a:	681b      	ldr	r3, [r3, #0]
 800d95c:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800d95e:	697b      	ldr	r3, [r7, #20]
 800d960:	e853 3f00 	ldrex	r3, [r3]
 800d964:	613b      	str	r3, [r7, #16]
   return(result);
 800d966:	693b      	ldr	r3, [r7, #16]
 800d968:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800d96c:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800d96e:	68fb      	ldr	r3, [r7, #12]
 800d970:	681b      	ldr	r3, [r3, #0]
 800d972:	461a      	mov	r2, r3
 800d974:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800d976:	623b      	str	r3, [r7, #32]
 800d978:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800d97a:	69f9      	ldr	r1, [r7, #28]
 800d97c:	6a3a      	ldr	r2, [r7, #32]
 800d97e:	e841 2300 	strex	r3, r2, [r1]
 800d982:	61bb      	str	r3, [r7, #24]
   return(result);
 800d984:	69bb      	ldr	r3, [r7, #24]
 800d986:	2b00      	cmp	r3, #0
 800d988:	d1e6      	bne.n	800d958 <HAL_UART_Transmit_IT+0xd4>
    }

    return HAL_OK;
 800d98a:	2300      	movs	r3, #0
 800d98c:	e000      	b.n	800d990 <HAL_UART_Transmit_IT+0x10c>
  }
  else
  {
    return HAL_BUSY;
 800d98e:	2302      	movs	r3, #2
  }
}
 800d990:	4618      	mov	r0, r3
 800d992:	3744      	adds	r7, #68	@ 0x44
 800d994:	46bd      	mov	sp, r7
 800d996:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d99a:	4770      	bx	lr
 800d99c:	0800f50f 	.word	0x0800f50f
 800d9a0:	0800f42f 	.word	0x0800f42f
 800d9a4:	0800f36d 	.word	0x0800f36d
 800d9a8:	0800f2b5 	.word	0x0800f2b5

0800d9ac <HAL_UART_IRQHandler>:
  * @brief Handle UART interrupt request.
  * @param huart UART handle.
  * @retval None
  */
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
 800d9ac:	b580      	push	{r7, lr}
 800d9ae:	b0ba      	sub	sp, #232	@ 0xe8
 800d9b0:	af00      	add	r7, sp, #0
 800d9b2:	6078      	str	r0, [r7, #4]
  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
 800d9b4:	687b      	ldr	r3, [r7, #4]
 800d9b6:	681b      	ldr	r3, [r3, #0]
 800d9b8:	69db      	ldr	r3, [r3, #28]
 800d9ba:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800d9be:	687b      	ldr	r3, [r7, #4]
 800d9c0:	681b      	ldr	r3, [r3, #0]
 800d9c2:	681b      	ldr	r3, [r3, #0]
 800d9c4:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800d9c8:	687b      	ldr	r3, [r7, #4]
 800d9ca:	681b      	ldr	r3, [r3, #0]
 800d9cc:	689b      	ldr	r3, [r3, #8]
 800d9ce:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc

  uint32_t errorflags;
  uint32_t errorcode;

  /* If no error occurs */
  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
 800d9d2:	f8d7 20e4 	ldr.w	r2, [r7, #228]	@ 0xe4
 800d9d6:	f640 030f 	movw	r3, #2063	@ 0x80f
 800d9da:	4013      	ands	r3, r2
 800d9dc:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
  if (errorflags == 0U)
 800d9e0:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800d9e4:	2b00      	cmp	r3, #0
 800d9e6:	d11b      	bne.n	800da20 <HAL_UART_IRQHandler+0x74>
  {
    /* UART in mode Receiver ---------------------------------------------------*/
    if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800d9e8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800d9ec:	f003 0320 	and.w	r3, r3, #32
 800d9f0:	2b00      	cmp	r3, #0
 800d9f2:	d015      	beq.n	800da20 <HAL_UART_IRQHandler+0x74>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800d9f4:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800d9f8:	f003 0320 	and.w	r3, r3, #32
 800d9fc:	2b00      	cmp	r3, #0
 800d9fe:	d105      	bne.n	800da0c <HAL_UART_IRQHandler+0x60>
            || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800da00:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800da04:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800da08:	2b00      	cmp	r3, #0
 800da0a:	d009      	beq.n	800da20 <HAL_UART_IRQHandler+0x74>
    {
      if (huart->RxISR != NULL)
 800da0c:	687b      	ldr	r3, [r7, #4]
 800da0e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800da10:	2b00      	cmp	r3, #0
 800da12:	f000 8377 	beq.w	800e104 <HAL_UART_IRQHandler+0x758>
      {
        huart->RxISR(huart);
 800da16:	687b      	ldr	r3, [r7, #4]
 800da18:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800da1a:	6878      	ldr	r0, [r7, #4]
 800da1c:	4798      	blx	r3
      }
      return;
 800da1e:	e371      	b.n	800e104 <HAL_UART_IRQHandler+0x758>
    }
  }

  /* If some errors occur */
  if ((errorflags != 0U)
 800da20:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800da24:	2b00      	cmp	r3, #0
 800da26:	f000 8123 	beq.w	800dc70 <HAL_UART_IRQHandler+0x2c4>
      && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
 800da2a:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800da2e:	4b8d      	ldr	r3, [pc, #564]	@ (800dc64 <HAL_UART_IRQHandler+0x2b8>)
 800da30:	4013      	ands	r3, r2
 800da32:	2b00      	cmp	r3, #0
 800da34:	d106      	bne.n	800da44 <HAL_UART_IRQHandler+0x98>
           || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
 800da36:	f8d7 20e0 	ldr.w	r2, [r7, #224]	@ 0xe0
 800da3a:	4b8b      	ldr	r3, [pc, #556]	@ (800dc68 <HAL_UART_IRQHandler+0x2bc>)
 800da3c:	4013      	ands	r3, r2
 800da3e:	2b00      	cmp	r3, #0
 800da40:	f000 8116 	beq.w	800dc70 <HAL_UART_IRQHandler+0x2c4>
  {
    /* UART parity error interrupt occurred -------------------------------------*/
    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800da44:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800da48:	f003 0301 	and.w	r3, r3, #1
 800da4c:	2b00      	cmp	r3, #0
 800da4e:	d011      	beq.n	800da74 <HAL_UART_IRQHandler+0xc8>
 800da50:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800da54:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800da58:	2b00      	cmp	r3, #0
 800da5a:	d00b      	beq.n	800da74 <HAL_UART_IRQHandler+0xc8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800da5c:	687b      	ldr	r3, [r7, #4]
 800da5e:	681b      	ldr	r3, [r3, #0]
 800da60:	2201      	movs	r2, #1
 800da62:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800da64:	687b      	ldr	r3, [r7, #4]
 800da66:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800da6a:	f043 0201 	orr.w	r2, r3, #1
 800da6e:	687b      	ldr	r3, [r7, #4]
 800da70:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART frame error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800da74:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800da78:	f003 0302 	and.w	r3, r3, #2
 800da7c:	2b00      	cmp	r3, #0
 800da7e:	d011      	beq.n	800daa4 <HAL_UART_IRQHandler+0xf8>
 800da80:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800da84:	f003 0301 	and.w	r3, r3, #1
 800da88:	2b00      	cmp	r3, #0
 800da8a:	d00b      	beq.n	800daa4 <HAL_UART_IRQHandler+0xf8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800da8c:	687b      	ldr	r3, [r7, #4]
 800da8e:	681b      	ldr	r3, [r3, #0]
 800da90:	2202      	movs	r2, #2
 800da92:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800da94:	687b      	ldr	r3, [r7, #4]
 800da96:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800da9a:	f043 0204 	orr.w	r2, r3, #4
 800da9e:	687b      	ldr	r3, [r7, #4]
 800daa0:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART noise error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800daa4:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800daa8:	f003 0304 	and.w	r3, r3, #4
 800daac:	2b00      	cmp	r3, #0
 800daae:	d011      	beq.n	800dad4 <HAL_UART_IRQHandler+0x128>
 800dab0:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800dab4:	f003 0301 	and.w	r3, r3, #1
 800dab8:	2b00      	cmp	r3, #0
 800daba:	d00b      	beq.n	800dad4 <HAL_UART_IRQHandler+0x128>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800dabc:	687b      	ldr	r3, [r7, #4]
 800dabe:	681b      	ldr	r3, [r3, #0]
 800dac0:	2204      	movs	r2, #4
 800dac2:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800dac4:	687b      	ldr	r3, [r7, #4]
 800dac6:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800daca:	f043 0202 	orr.w	r2, r3, #2
 800dace:	687b      	ldr	r3, [r7, #4]
 800dad0:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Over-Run interrupt occurred -----------------------------------------*/
    if (((isrflags & USART_ISR_ORE) != 0U)
 800dad4:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dad8:	f003 0308 	and.w	r3, r3, #8
 800dadc:	2b00      	cmp	r3, #0
 800dade:	d017      	beq.n	800db10 <HAL_UART_IRQHandler+0x164>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800dae0:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dae4:	f003 0320 	and.w	r3, r3, #32
 800dae8:	2b00      	cmp	r3, #0
 800daea:	d105      	bne.n	800daf8 <HAL_UART_IRQHandler+0x14c>
            ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
 800daec:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800daf0:	4b5c      	ldr	r3, [pc, #368]	@ (800dc64 <HAL_UART_IRQHandler+0x2b8>)
 800daf2:	4013      	ands	r3, r2
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800daf4:	2b00      	cmp	r3, #0
 800daf6:	d00b      	beq.n	800db10 <HAL_UART_IRQHandler+0x164>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800daf8:	687b      	ldr	r3, [r7, #4]
 800dafa:	681b      	ldr	r3, [r3, #0]
 800dafc:	2208      	movs	r2, #8
 800dafe:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800db00:	687b      	ldr	r3, [r7, #4]
 800db02:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800db06:	f043 0208 	orr.w	r2, r3, #8
 800db0a:	687b      	ldr	r3, [r7, #4]
 800db0c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
 800db10:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800db14:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800db18:	2b00      	cmp	r3, #0
 800db1a:	d012      	beq.n	800db42 <HAL_UART_IRQHandler+0x196>
 800db1c:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800db20:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
 800db24:	2b00      	cmp	r3, #0
 800db26:	d00c      	beq.n	800db42 <HAL_UART_IRQHandler+0x196>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800db28:	687b      	ldr	r3, [r7, #4]
 800db2a:	681b      	ldr	r3, [r3, #0]
 800db2c:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800db30:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_RTO;
 800db32:	687b      	ldr	r3, [r7, #4]
 800db34:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800db38:	f043 0220 	orr.w	r2, r3, #32
 800db3c:	687b      	ldr	r3, [r7, #4]
 800db3e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* Call UART Error Call back function if need be ----------------------------*/
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800db42:	687b      	ldr	r3, [r7, #4]
 800db44:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800db48:	2b00      	cmp	r3, #0
 800db4a:	f000 82dd 	beq.w	800e108 <HAL_UART_IRQHandler+0x75c>
    {
      /* UART in mode Receiver --------------------------------------------------*/
      if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800db4e:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800db52:	f003 0320 	and.w	r3, r3, #32
 800db56:	2b00      	cmp	r3, #0
 800db58:	d013      	beq.n	800db82 <HAL_UART_IRQHandler+0x1d6>
          && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800db5a:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800db5e:	f003 0320 	and.w	r3, r3, #32
 800db62:	2b00      	cmp	r3, #0
 800db64:	d105      	bne.n	800db72 <HAL_UART_IRQHandler+0x1c6>
              || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800db66:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800db6a:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800db6e:	2b00      	cmp	r3, #0
 800db70:	d007      	beq.n	800db82 <HAL_UART_IRQHandler+0x1d6>
      {
        if (huart->RxISR != NULL)
 800db72:	687b      	ldr	r3, [r7, #4]
 800db74:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800db76:	2b00      	cmp	r3, #0
 800db78:	d003      	beq.n	800db82 <HAL_UART_IRQHandler+0x1d6>
        {
          huart->RxISR(huart);
 800db7a:	687b      	ldr	r3, [r7, #4]
 800db7c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800db7e:	6878      	ldr	r0, [r7, #4]
 800db80:	4798      	blx	r3
      /* If Error is to be considered as blocking :
          - Receiver Timeout error in Reception
          - Overrun error in Reception
          - any error occurs in DMA mode reception
      */
      errorcode = huart->ErrorCode;
 800db82:	687b      	ldr	r3, [r7, #4]
 800db84:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800db88:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800db8c:	687b      	ldr	r3, [r7, #4]
 800db8e:	681b      	ldr	r3, [r3, #0]
 800db90:	689b      	ldr	r3, [r3, #8]
 800db92:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800db96:	2b40      	cmp	r3, #64	@ 0x40
 800db98:	d005      	beq.n	800dba6 <HAL_UART_IRQHandler+0x1fa>
          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
 800db9a:	f8d7 30d4 	ldr.w	r3, [r7, #212]	@ 0xd4
 800db9e:	f003 0328 	and.w	r3, r3, #40	@ 0x28
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800dba2:	2b00      	cmp	r3, #0
 800dba4:	d054      	beq.n	800dc50 <HAL_UART_IRQHandler+0x2a4>
      {
        /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
        UART_EndRxTransfer(huart);
 800dba6:	6878      	ldr	r0, [r7, #4]
 800dba8:	f001 fb08 	bl	800f1bc <UART_EndRxTransfer>

        /* Abort the UART DMA Rx channel if enabled */
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dbac:	687b      	ldr	r3, [r7, #4]
 800dbae:	681b      	ldr	r3, [r3, #0]
 800dbb0:	689b      	ldr	r3, [r3, #8]
 800dbb2:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800dbb6:	2b40      	cmp	r3, #64	@ 0x40
 800dbb8:	d146      	bne.n	800dc48 <HAL_UART_IRQHandler+0x29c>
        {
          /* Disable the UART DMA Rx request if enabled */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800dbba:	687b      	ldr	r3, [r7, #4]
 800dbbc:	681b      	ldr	r3, [r3, #0]
 800dbbe:	3308      	adds	r3, #8
 800dbc0:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dbc4:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800dbc8:	e853 3f00 	ldrex	r3, [r3]
 800dbcc:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
   return(result);
 800dbd0:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800dbd4:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800dbd8:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800dbdc:	687b      	ldr	r3, [r7, #4]
 800dbde:	681b      	ldr	r3, [r3, #0]
 800dbe0:	3308      	adds	r3, #8
 800dbe2:	f8d7 20d0 	ldr.w	r2, [r7, #208]	@ 0xd0
 800dbe6:	f8c7 20a8 	str.w	r2, [r7, #168]	@ 0xa8
 800dbea:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dbee:	f8d7 10a4 	ldr.w	r1, [r7, #164]	@ 0xa4
 800dbf2:	f8d7 20a8 	ldr.w	r2, [r7, #168]	@ 0xa8
 800dbf6:	e841 2300 	strex	r3, r2, [r1]
 800dbfa:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
   return(result);
 800dbfe:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800dc02:	2b00      	cmp	r3, #0
 800dc04:	d1d9      	bne.n	800dbba <HAL_UART_IRQHandler+0x20e>

          /* Abort the UART DMA Rx channel */
          if (huart->hdmarx != NULL)
 800dc06:	687b      	ldr	r3, [r7, #4]
 800dc08:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dc0c:	2b00      	cmp	r3, #0
 800dc0e:	d017      	beq.n	800dc40 <HAL_UART_IRQHandler+0x294>
          {
            /* Set the UART DMA Abort callback :
               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800dc10:	687b      	ldr	r3, [r7, #4]
 800dc12:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dc16:	4a15      	ldr	r2, [pc, #84]	@ (800dc6c <HAL_UART_IRQHandler+0x2c0>)
 800dc18:	651a      	str	r2, [r3, #80]	@ 0x50

            /* Abort DMA RX */
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800dc1a:	687b      	ldr	r3, [r7, #4]
 800dc1c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dc20:	4618      	mov	r0, r3
 800dc22:	f7f8 ff5f 	bl	8006ae4 <HAL_DMA_Abort_IT>
 800dc26:	4603      	mov	r3, r0
 800dc28:	2b00      	cmp	r3, #0
 800dc2a:	d019      	beq.n	800dc60 <HAL_UART_IRQHandler+0x2b4>
            {
              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800dc2c:	687b      	ldr	r3, [r7, #4]
 800dc2e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dc32:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800dc34:	687a      	ldr	r2, [r7, #4]
 800dc36:	f8d2 2080 	ldr.w	r2, [r2, #128]	@ 0x80
 800dc3a:	4610      	mov	r0, r2
 800dc3c:	4798      	blx	r3
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dc3e:	e00f      	b.n	800dc60 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
            /*Call registered error callback*/
            huart->ErrorCallback(huart);
#else
            /*Call legacy weak error callback*/
            HAL_UART_ErrorCallback(huart);
 800dc40:	6878      	ldr	r0, [r7, #4]
 800dc42:	f000 fa6d 	bl	800e120 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dc46:	e00b      	b.n	800dc60 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800dc48:	6878      	ldr	r0, [r7, #4]
 800dc4a:	f000 fa69 	bl	800e120 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dc4e:	e007      	b.n	800dc60 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered error callback*/
        huart->ErrorCallback(huart);
#else
        /*Call legacy weak error callback*/
        HAL_UART_ErrorCallback(huart);
 800dc50:	6878      	ldr	r0, [r7, #4]
 800dc52:	f000 fa65 	bl	800e120 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800dc56:	687b      	ldr	r3, [r7, #4]
 800dc58:	2200      	movs	r2, #0
 800dc5a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
      }
    }
    return;
 800dc5e:	e253      	b.n	800e108 <HAL_UART_IRQHandler+0x75c>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dc60:	bf00      	nop
    return;
 800dc62:	e251      	b.n	800e108 <HAL_UART_IRQHandler+0x75c>
 800dc64:	10000001 	.word	0x10000001
 800dc68:	04000120 	.word	0x04000120
 800dc6c:	0800f289 	.word	0x0800f289

  } /* End if some error occurs */

  /* Check current reception Mode :
     If Reception till IDLE event has been selected : */
  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800dc70:	687b      	ldr	r3, [r7, #4]
 800dc72:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800dc74:	2b01      	cmp	r3, #1
 800dc76:	f040 81e7 	bne.w	800e048 <HAL_UART_IRQHandler+0x69c>
      && ((isrflags & USART_ISR_IDLE) != 0U)
 800dc7a:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dc7e:	f003 0310 	and.w	r3, r3, #16
 800dc82:	2b00      	cmp	r3, #0
 800dc84:	f000 81e0 	beq.w	800e048 <HAL_UART_IRQHandler+0x69c>
      && ((cr1its & USART_ISR_IDLE) != 0U))
 800dc88:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dc8c:	f003 0310 	and.w	r3, r3, #16
 800dc90:	2b00      	cmp	r3, #0
 800dc92:	f000 81d9 	beq.w	800e048 <HAL_UART_IRQHandler+0x69c>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800dc96:	687b      	ldr	r3, [r7, #4]
 800dc98:	681b      	ldr	r3, [r3, #0]
 800dc9a:	2210      	movs	r2, #16
 800dc9c:	621a      	str	r2, [r3, #32]

    /* Check if DMA mode is enabled in UART */
    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dc9e:	687b      	ldr	r3, [r7, #4]
 800dca0:	681b      	ldr	r3, [r3, #0]
 800dca2:	689b      	ldr	r3, [r3, #8]
 800dca4:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800dca8:	2b40      	cmp	r3, #64	@ 0x40
 800dcaa:	f040 8151 	bne.w	800df50 <HAL_UART_IRQHandler+0x5a4>
    {
      /* DMA mode enabled */
      /* Check received length : If all expected data are received, do nothing,
         (DMA cplt callback will be called).
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
 800dcae:	687b      	ldr	r3, [r7, #4]
 800dcb0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcb4:	681b      	ldr	r3, [r3, #0]
 800dcb6:	4a96      	ldr	r2, [pc, #600]	@ (800df10 <HAL_UART_IRQHandler+0x564>)
 800dcb8:	4293      	cmp	r3, r2
 800dcba:	d068      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dcbc:	687b      	ldr	r3, [r7, #4]
 800dcbe:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcc2:	681b      	ldr	r3, [r3, #0]
 800dcc4:	4a93      	ldr	r2, [pc, #588]	@ (800df14 <HAL_UART_IRQHandler+0x568>)
 800dcc6:	4293      	cmp	r3, r2
 800dcc8:	d061      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dcca:	687b      	ldr	r3, [r7, #4]
 800dccc:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcd0:	681b      	ldr	r3, [r3, #0]
 800dcd2:	4a91      	ldr	r2, [pc, #580]	@ (800df18 <HAL_UART_IRQHandler+0x56c>)
 800dcd4:	4293      	cmp	r3, r2
 800dcd6:	d05a      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dcd8:	687b      	ldr	r3, [r7, #4]
 800dcda:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcde:	681b      	ldr	r3, [r3, #0]
 800dce0:	4a8e      	ldr	r2, [pc, #568]	@ (800df1c <HAL_UART_IRQHandler+0x570>)
 800dce2:	4293      	cmp	r3, r2
 800dce4:	d053      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dce6:	687b      	ldr	r3, [r7, #4]
 800dce8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcec:	681b      	ldr	r3, [r3, #0]
 800dcee:	4a8c      	ldr	r2, [pc, #560]	@ (800df20 <HAL_UART_IRQHandler+0x574>)
 800dcf0:	4293      	cmp	r3, r2
 800dcf2:	d04c      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dcf4:	687b      	ldr	r3, [r7, #4]
 800dcf6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dcfa:	681b      	ldr	r3, [r3, #0]
 800dcfc:	4a89      	ldr	r2, [pc, #548]	@ (800df24 <HAL_UART_IRQHandler+0x578>)
 800dcfe:	4293      	cmp	r3, r2
 800dd00:	d045      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd02:	687b      	ldr	r3, [r7, #4]
 800dd04:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd08:	681b      	ldr	r3, [r3, #0]
 800dd0a:	4a87      	ldr	r2, [pc, #540]	@ (800df28 <HAL_UART_IRQHandler+0x57c>)
 800dd0c:	4293      	cmp	r3, r2
 800dd0e:	d03e      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd10:	687b      	ldr	r3, [r7, #4]
 800dd12:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd16:	681b      	ldr	r3, [r3, #0]
 800dd18:	4a84      	ldr	r2, [pc, #528]	@ (800df2c <HAL_UART_IRQHandler+0x580>)
 800dd1a:	4293      	cmp	r3, r2
 800dd1c:	d037      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd1e:	687b      	ldr	r3, [r7, #4]
 800dd20:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd24:	681b      	ldr	r3, [r3, #0]
 800dd26:	4a82      	ldr	r2, [pc, #520]	@ (800df30 <HAL_UART_IRQHandler+0x584>)
 800dd28:	4293      	cmp	r3, r2
 800dd2a:	d030      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd2c:	687b      	ldr	r3, [r7, #4]
 800dd2e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd32:	681b      	ldr	r3, [r3, #0]
 800dd34:	4a7f      	ldr	r2, [pc, #508]	@ (800df34 <HAL_UART_IRQHandler+0x588>)
 800dd36:	4293      	cmp	r3, r2
 800dd38:	d029      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd3a:	687b      	ldr	r3, [r7, #4]
 800dd3c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd40:	681b      	ldr	r3, [r3, #0]
 800dd42:	4a7d      	ldr	r2, [pc, #500]	@ (800df38 <HAL_UART_IRQHandler+0x58c>)
 800dd44:	4293      	cmp	r3, r2
 800dd46:	d022      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd48:	687b      	ldr	r3, [r7, #4]
 800dd4a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd4e:	681b      	ldr	r3, [r3, #0]
 800dd50:	4a7a      	ldr	r2, [pc, #488]	@ (800df3c <HAL_UART_IRQHandler+0x590>)
 800dd52:	4293      	cmp	r3, r2
 800dd54:	d01b      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd56:	687b      	ldr	r3, [r7, #4]
 800dd58:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd5c:	681b      	ldr	r3, [r3, #0]
 800dd5e:	4a78      	ldr	r2, [pc, #480]	@ (800df40 <HAL_UART_IRQHandler+0x594>)
 800dd60:	4293      	cmp	r3, r2
 800dd62:	d014      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd64:	687b      	ldr	r3, [r7, #4]
 800dd66:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd6a:	681b      	ldr	r3, [r3, #0]
 800dd6c:	4a75      	ldr	r2, [pc, #468]	@ (800df44 <HAL_UART_IRQHandler+0x598>)
 800dd6e:	4293      	cmp	r3, r2
 800dd70:	d00d      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd72:	687b      	ldr	r3, [r7, #4]
 800dd74:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd78:	681b      	ldr	r3, [r3, #0]
 800dd7a:	4a73      	ldr	r2, [pc, #460]	@ (800df48 <HAL_UART_IRQHandler+0x59c>)
 800dd7c:	4293      	cmp	r3, r2
 800dd7e:	d006      	beq.n	800dd8e <HAL_UART_IRQHandler+0x3e2>
 800dd80:	687b      	ldr	r3, [r7, #4]
 800dd82:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd86:	681b      	ldr	r3, [r3, #0]
 800dd88:	4a70      	ldr	r2, [pc, #448]	@ (800df4c <HAL_UART_IRQHandler+0x5a0>)
 800dd8a:	4293      	cmp	r3, r2
 800dd8c:	d106      	bne.n	800dd9c <HAL_UART_IRQHandler+0x3f0>
 800dd8e:	687b      	ldr	r3, [r7, #4]
 800dd90:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dd94:	681b      	ldr	r3, [r3, #0]
 800dd96:	685b      	ldr	r3, [r3, #4]
 800dd98:	b29b      	uxth	r3, r3
 800dd9a:	e005      	b.n	800dda8 <HAL_UART_IRQHandler+0x3fc>
 800dd9c:	687b      	ldr	r3, [r7, #4]
 800dd9e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dda2:	681b      	ldr	r3, [r3, #0]
 800dda4:	685b      	ldr	r3, [r3, #4]
 800dda6:	b29b      	uxth	r3, r3
 800dda8:	f8a7 30be 	strh.w	r3, [r7, #190]	@ 0xbe
      if ((nb_remaining_rx_data > 0U)
 800ddac:	f8b7 30be 	ldrh.w	r3, [r7, #190]	@ 0xbe
 800ddb0:	2b00      	cmp	r3, #0
 800ddb2:	f000 81ab 	beq.w	800e10c <HAL_UART_IRQHandler+0x760>
          && (nb_remaining_rx_data < huart->RxXferSize))
 800ddb6:	687b      	ldr	r3, [r7, #4]
 800ddb8:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800ddbc:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800ddc0:	429a      	cmp	r2, r3
 800ddc2:	f080 81a3 	bcs.w	800e10c <HAL_UART_IRQHandler+0x760>
      {
        /* Reception is not complete */
        huart->RxXferCount = nb_remaining_rx_data;
 800ddc6:	687b      	ldr	r3, [r7, #4]
 800ddc8:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800ddcc:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
        if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
 800ddd0:	687b      	ldr	r3, [r7, #4]
 800ddd2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800ddd6:	69db      	ldr	r3, [r3, #28]
 800ddd8:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800dddc:	f000 8087 	beq.w	800deee <HAL_UART_IRQHandler+0x542>
        {
          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800dde0:	687b      	ldr	r3, [r7, #4]
 800dde2:	681b      	ldr	r3, [r3, #0]
 800dde4:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dde8:	f8d7 3088 	ldr.w	r3, [r7, #136]	@ 0x88
 800ddec:	e853 3f00 	ldrex	r3, [r3]
 800ddf0:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
   return(result);
 800ddf4:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800ddf8:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800ddfc:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800de00:	687b      	ldr	r3, [r7, #4]
 800de02:	681b      	ldr	r3, [r3, #0]
 800de04:	461a      	mov	r2, r3
 800de06:	f8d7 30b8 	ldr.w	r3, [r7, #184]	@ 0xb8
 800de0a:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800de0e:	f8c7 2090 	str.w	r2, [r7, #144]	@ 0x90
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800de12:	f8d7 1090 	ldr.w	r1, [r7, #144]	@ 0x90
 800de16:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800de1a:	e841 2300 	strex	r3, r2, [r1]
 800de1e:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
   return(result);
 800de22:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800de26:	2b00      	cmp	r3, #0
 800de28:	d1da      	bne.n	800dde0 <HAL_UART_IRQHandler+0x434>
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800de2a:	687b      	ldr	r3, [r7, #4]
 800de2c:	681b      	ldr	r3, [r3, #0]
 800de2e:	3308      	adds	r3, #8
 800de30:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800de32:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800de34:	e853 3f00 	ldrex	r3, [r3]
 800de38:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800de3a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800de3c:	f023 0301 	bic.w	r3, r3, #1
 800de40:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800de44:	687b      	ldr	r3, [r7, #4]
 800de46:	681b      	ldr	r3, [r3, #0]
 800de48:	3308      	adds	r3, #8
 800de4a:	f8d7 20b4 	ldr.w	r2, [r7, #180]	@ 0xb4
 800de4e:	f8c7 2080 	str.w	r2, [r7, #128]	@ 0x80
 800de52:	67fb      	str	r3, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800de54:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800de56:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800de5a:	e841 2300 	strex	r3, r2, [r1]
 800de5e:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800de60:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800de62:	2b00      	cmp	r3, #0
 800de64:	d1e1      	bne.n	800de2a <HAL_UART_IRQHandler+0x47e>

          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
             in the UART CR3 register */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800de66:	687b      	ldr	r3, [r7, #4]
 800de68:	681b      	ldr	r3, [r3, #0]
 800de6a:	3308      	adds	r3, #8
 800de6c:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800de6e:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800de70:	e853 3f00 	ldrex	r3, [r3]
 800de74:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800de76:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800de78:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800de7c:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800de80:	687b      	ldr	r3, [r7, #4]
 800de82:	681b      	ldr	r3, [r3, #0]
 800de84:	3308      	adds	r3, #8
 800de86:	f8d7 20b0 	ldr.w	r2, [r7, #176]	@ 0xb0
 800de8a:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800de8c:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800de8e:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800de90:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800de92:	e841 2300 	strex	r3, r2, [r1]
 800de96:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800de98:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800de9a:	2b00      	cmp	r3, #0
 800de9c:	d1e3      	bne.n	800de66 <HAL_UART_IRQHandler+0x4ba>

          /* At end of Rx process, restore huart->RxState to Ready */
          huart->RxState = HAL_UART_STATE_READY;
 800de9e:	687b      	ldr	r3, [r7, #4]
 800dea0:	2220      	movs	r2, #32
 800dea2:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800dea6:	687b      	ldr	r3, [r7, #4]
 800dea8:	2200      	movs	r2, #0
 800deaa:	66da      	str	r2, [r3, #108]	@ 0x6c

          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800deac:	687b      	ldr	r3, [r7, #4]
 800deae:	681b      	ldr	r3, [r3, #0]
 800deb0:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800deb2:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800deb4:	e853 3f00 	ldrex	r3, [r3]
 800deb8:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800deba:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800debc:	f023 0310 	bic.w	r3, r3, #16
 800dec0:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800dec4:	687b      	ldr	r3, [r7, #4]
 800dec6:	681b      	ldr	r3, [r3, #0]
 800dec8:	461a      	mov	r2, r3
 800deca:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800dece:	65bb      	str	r3, [r7, #88]	@ 0x58
 800ded0:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ded2:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800ded4:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800ded6:	e841 2300 	strex	r3, r2, [r1]
 800deda:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800dedc:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800dede:	2b00      	cmp	r3, #0
 800dee0:	d1e4      	bne.n	800deac <HAL_UART_IRQHandler+0x500>

          /* Last bytes received, so no need as the abort is immediate */
          (void)HAL_DMA_Abort(huart->hdmarx);
 800dee2:	687b      	ldr	r3, [r7, #4]
 800dee4:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dee8:	4618      	mov	r0, r3
 800deea:	f7f8 fadd 	bl	80064a8 <HAL_DMA_Abort>
        }

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800deee:	687b      	ldr	r3, [r7, #4]
 800def0:	2202      	movs	r2, #2
 800def2:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 800def4:	687b      	ldr	r3, [r7, #4]
 800def6:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800defa:	687b      	ldr	r3, [r7, #4]
 800defc:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800df00:	b29b      	uxth	r3, r3
 800df02:	1ad3      	subs	r3, r2, r3
 800df04:	b29b      	uxth	r3, r3
 800df06:	4619      	mov	r1, r3
 800df08:	6878      	ldr	r0, [r7, #4]
 800df0a:	f7f6 fb39 	bl	8004580 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800df0e:	e0fd      	b.n	800e10c <HAL_UART_IRQHandler+0x760>
 800df10:	40020010 	.word	0x40020010
 800df14:	40020028 	.word	0x40020028
 800df18:	40020040 	.word	0x40020040
 800df1c:	40020058 	.word	0x40020058
 800df20:	40020070 	.word	0x40020070
 800df24:	40020088 	.word	0x40020088
 800df28:	400200a0 	.word	0x400200a0
 800df2c:	400200b8 	.word	0x400200b8
 800df30:	40020410 	.word	0x40020410
 800df34:	40020428 	.word	0x40020428
 800df38:	40020440 	.word	0x40020440
 800df3c:	40020458 	.word	0x40020458
 800df40:	40020470 	.word	0x40020470
 800df44:	40020488 	.word	0x40020488
 800df48:	400204a0 	.word	0x400204a0
 800df4c:	400204b8 	.word	0x400204b8
    else
    {
      /* DMA mode not enabled */
      /* Check received length : If all expected data are received, do nothing.
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
 800df50:	687b      	ldr	r3, [r7, #4]
 800df52:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800df56:	687b      	ldr	r3, [r7, #4]
 800df58:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800df5c:	b29b      	uxth	r3, r3
 800df5e:	1ad3      	subs	r3, r2, r3
 800df60:	f8a7 30ce 	strh.w	r3, [r7, #206]	@ 0xce
      if ((huart->RxXferCount > 0U)
 800df64:	687b      	ldr	r3, [r7, #4]
 800df66:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800df6a:	b29b      	uxth	r3, r3
 800df6c:	2b00      	cmp	r3, #0
 800df6e:	f000 80cf 	beq.w	800e110 <HAL_UART_IRQHandler+0x764>
          && (nb_rx_data > 0U))
 800df72:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800df76:	2b00      	cmp	r3, #0
 800df78:	f000 80ca 	beq.w	800e110 <HAL_UART_IRQHandler+0x764>
      {
        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800df7c:	687b      	ldr	r3, [r7, #4]
 800df7e:	681b      	ldr	r3, [r3, #0]
 800df80:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800df82:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800df84:	e853 3f00 	ldrex	r3, [r3]
 800df88:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800df8a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800df8c:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800df90:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800df94:	687b      	ldr	r3, [r7, #4]
 800df96:	681b      	ldr	r3, [r3, #0]
 800df98:	461a      	mov	r2, r3
 800df9a:	f8d7 30c8 	ldr.w	r3, [r7, #200]	@ 0xc8
 800df9e:	647b      	str	r3, [r7, #68]	@ 0x44
 800dfa0:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dfa2:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800dfa4:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800dfa6:	e841 2300 	strex	r3, r2, [r1]
 800dfaa:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800dfac:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800dfae:	2b00      	cmp	r3, #0
 800dfb0:	d1e4      	bne.n	800df7c <HAL_UART_IRQHandler+0x5d0>

        /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800dfb2:	687b      	ldr	r3, [r7, #4]
 800dfb4:	681b      	ldr	r3, [r3, #0]
 800dfb6:	3308      	adds	r3, #8
 800dfb8:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dfba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800dfbc:	e853 3f00 	ldrex	r3, [r3]
 800dfc0:	623b      	str	r3, [r7, #32]
   return(result);
 800dfc2:	6a3a      	ldr	r2, [r7, #32]
 800dfc4:	4b55      	ldr	r3, [pc, #340]	@ (800e11c <HAL_UART_IRQHandler+0x770>)
 800dfc6:	4013      	ands	r3, r2
 800dfc8:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800dfcc:	687b      	ldr	r3, [r7, #4]
 800dfce:	681b      	ldr	r3, [r3, #0]
 800dfd0:	3308      	adds	r3, #8
 800dfd2:	f8d7 20c4 	ldr.w	r2, [r7, #196]	@ 0xc4
 800dfd6:	633a      	str	r2, [r7, #48]	@ 0x30
 800dfd8:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dfda:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800dfdc:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800dfde:	e841 2300 	strex	r3, r2, [r1]
 800dfe2:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800dfe4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800dfe6:	2b00      	cmp	r3, #0
 800dfe8:	d1e3      	bne.n	800dfb2 <HAL_UART_IRQHandler+0x606>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800dfea:	687b      	ldr	r3, [r7, #4]
 800dfec:	2220      	movs	r2, #32
 800dfee:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800dff2:	687b      	ldr	r3, [r7, #4]
 800dff4:	2200      	movs	r2, #0
 800dff6:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800dff8:	687b      	ldr	r3, [r7, #4]
 800dffa:	2200      	movs	r2, #0
 800dffc:	675a      	str	r2, [r3, #116]	@ 0x74

        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800dffe:	687b      	ldr	r3, [r7, #4]
 800e000:	681b      	ldr	r3, [r3, #0]
 800e002:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e004:	693b      	ldr	r3, [r7, #16]
 800e006:	e853 3f00 	ldrex	r3, [r3]
 800e00a:	60fb      	str	r3, [r7, #12]
   return(result);
 800e00c:	68fb      	ldr	r3, [r7, #12]
 800e00e:	f023 0310 	bic.w	r3, r3, #16
 800e012:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800e016:	687b      	ldr	r3, [r7, #4]
 800e018:	681b      	ldr	r3, [r3, #0]
 800e01a:	461a      	mov	r2, r3
 800e01c:	f8d7 30c0 	ldr.w	r3, [r7, #192]	@ 0xc0
 800e020:	61fb      	str	r3, [r7, #28]
 800e022:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e024:	69b9      	ldr	r1, [r7, #24]
 800e026:	69fa      	ldr	r2, [r7, #28]
 800e028:	e841 2300 	strex	r3, r2, [r1]
 800e02c:	617b      	str	r3, [r7, #20]
   return(result);
 800e02e:	697b      	ldr	r3, [r7, #20]
 800e030:	2b00      	cmp	r3, #0
 800e032:	d1e4      	bne.n	800dffe <HAL_UART_IRQHandler+0x652>

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800e034:	687b      	ldr	r3, [r7, #4]
 800e036:	2202      	movs	r2, #2
 800e038:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx complete callback*/
        huart->RxEventCallback(huart, nb_rx_data);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
 800e03a:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800e03e:	4619      	mov	r1, r3
 800e040:	6878      	ldr	r0, [r7, #4]
 800e042:	f7f6 fa9d 	bl	8004580 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800e046:	e063      	b.n	800e110 <HAL_UART_IRQHandler+0x764>
    }
  }

  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
 800e048:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e04c:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800e050:	2b00      	cmp	r3, #0
 800e052:	d00e      	beq.n	800e072 <HAL_UART_IRQHandler+0x6c6>
 800e054:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800e058:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800e05c:	2b00      	cmp	r3, #0
 800e05e:	d008      	beq.n	800e072 <HAL_UART_IRQHandler+0x6c6>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
 800e060:	687b      	ldr	r3, [r7, #4]
 800e062:	681b      	ldr	r3, [r3, #0]
 800e064:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
 800e068:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Wakeup Callback */
    huart->WakeupCallback(huart);
#else
    /* Call legacy weak Wakeup Callback */
    HAL_UARTEx_WakeupCallback(huart);
 800e06a:	6878      	ldr	r0, [r7, #4]
 800e06c:	f002 f80c 	bl	8010088 <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e070:	e051      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART in mode Transmitter ------------------------------------------------*/
  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
 800e072:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e076:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e07a:	2b00      	cmp	r3, #0
 800e07c:	d014      	beq.n	800e0a8 <HAL_UART_IRQHandler+0x6fc>
      && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
 800e07e:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e082:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e086:	2b00      	cmp	r3, #0
 800e088:	d105      	bne.n	800e096 <HAL_UART_IRQHandler+0x6ea>
          || ((cr3its & USART_CR3_TXFTIE) != 0U)))
 800e08a:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800e08e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800e092:	2b00      	cmp	r3, #0
 800e094:	d008      	beq.n	800e0a8 <HAL_UART_IRQHandler+0x6fc>
  {
    if (huart->TxISR != NULL)
 800e096:	687b      	ldr	r3, [r7, #4]
 800e098:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800e09a:	2b00      	cmp	r3, #0
 800e09c:	d03a      	beq.n	800e114 <HAL_UART_IRQHandler+0x768>
    {
      huart->TxISR(huart);
 800e09e:	687b      	ldr	r3, [r7, #4]
 800e0a0:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800e0a2:	6878      	ldr	r0, [r7, #4]
 800e0a4:	4798      	blx	r3
    }
    return;
 800e0a6:	e035      	b.n	800e114 <HAL_UART_IRQHandler+0x768>
  }

  /* UART in mode Transmitter (transmission end) -----------------------------*/
  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
 800e0a8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e0ac:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e0b0:	2b00      	cmp	r3, #0
 800e0b2:	d009      	beq.n	800e0c8 <HAL_UART_IRQHandler+0x71c>
 800e0b4:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e0b8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e0bc:	2b00      	cmp	r3, #0
 800e0be:	d003      	beq.n	800e0c8 <HAL_UART_IRQHandler+0x71c>
  {
    UART_EndTransmit_IT(huart);
 800e0c0:	6878      	ldr	r0, [r7, #4]
 800e0c2:	f001 fa99 	bl	800f5f8 <UART_EndTransmit_IT>
    return;
 800e0c6:	e026      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART TX Fifo Empty occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
 800e0c8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e0cc:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800e0d0:	2b00      	cmp	r3, #0
 800e0d2:	d009      	beq.n	800e0e8 <HAL_UART_IRQHandler+0x73c>
 800e0d4:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e0d8:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 800e0dc:	2b00      	cmp	r3, #0
 800e0de:	d003      	beq.n	800e0e8 <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Tx Fifo Empty Callback */
    huart->TxFifoEmptyCallback(huart);
#else
    /* Call legacy weak Tx Fifo Empty Callback */
    HAL_UARTEx_TxFifoEmptyCallback(huart);
 800e0e0:	6878      	ldr	r0, [r7, #4]
 800e0e2:	f001 ffe5 	bl	80100b0 <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e0e6:	e016      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
  }

  /* UART RX Fifo Full occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
 800e0e8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e0ec:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800e0f0:	2b00      	cmp	r3, #0
 800e0f2:	d010      	beq.n	800e116 <HAL_UART_IRQHandler+0x76a>
 800e0f4:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e0f8:	2b00      	cmp	r3, #0
 800e0fa:	da0c      	bge.n	800e116 <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Rx Fifo Full Callback */
    huart->RxFifoFullCallback(huart);
#else
    /* Call legacy weak Rx Fifo Full Callback */
    HAL_UARTEx_RxFifoFullCallback(huart);
 800e0fc:	6878      	ldr	r0, [r7, #4]
 800e0fe:	f001 ffcd 	bl	801009c <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e102:	e008      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
      return;
 800e104:	bf00      	nop
 800e106:	e006      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
    return;
 800e108:	bf00      	nop
 800e10a:	e004      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
      return;
 800e10c:	bf00      	nop
 800e10e:	e002      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
      return;
 800e110:	bf00      	nop
 800e112:	e000      	b.n	800e116 <HAL_UART_IRQHandler+0x76a>
    return;
 800e114:	bf00      	nop
  }
}
 800e116:	37e8      	adds	r7, #232	@ 0xe8
 800e118:	46bd      	mov	sp, r7
 800e11a:	bd80      	pop	{r7, pc}
 800e11c:	effffffe 	.word	0xeffffffe

0800e120 <HAL_UART_ErrorCallback>:
  * @brief  UART error callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
 800e120:	b480      	push	{r7}
 800e122:	b083      	sub	sp, #12
 800e124:	af00      	add	r7, sp, #0
 800e126:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UART_ErrorCallback can be implemented in the user file.
   */
}
 800e128:	bf00      	nop
 800e12a:	370c      	adds	r7, #12
 800e12c:	46bd      	mov	sp, r7
 800e12e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e132:	4770      	bx	lr

0800e134 <UART_SetConfig>:
  * @brief Configure the UART peripheral.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
 800e134:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800e138:	b092      	sub	sp, #72	@ 0x48
 800e13a:	af00      	add	r7, sp, #0
 800e13c:	6178      	str	r0, [r7, #20]
  uint32_t tmpreg;
  uint16_t brrtemp;
  UART_ClockSourceTypeDef clocksource;
  uint32_t usartdiv;
  HAL_StatusTypeDef ret               = HAL_OK;
 800e13e:	2300      	movs	r3, #0
 800e140:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
  *  the UART Word Length, Parity, Mode and oversampling:
  *  set the M bits according to huart->Init.WordLength value
  *  set PCE and PS bits according to huart->Init.Parity value
  *  set TE and RE bits according to huart->Init.Mode value
  *  set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
 800e144:	697b      	ldr	r3, [r7, #20]
 800e146:	689a      	ldr	r2, [r3, #8]
 800e148:	697b      	ldr	r3, [r7, #20]
 800e14a:	691b      	ldr	r3, [r3, #16]
 800e14c:	431a      	orrs	r2, r3
 800e14e:	697b      	ldr	r3, [r7, #20]
 800e150:	695b      	ldr	r3, [r3, #20]
 800e152:	431a      	orrs	r2, r3
 800e154:	697b      	ldr	r3, [r7, #20]
 800e156:	69db      	ldr	r3, [r3, #28]
 800e158:	4313      	orrs	r3, r2
 800e15a:	647b      	str	r3, [r7, #68]	@ 0x44
  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
 800e15c:	697b      	ldr	r3, [r7, #20]
 800e15e:	681b      	ldr	r3, [r3, #0]
 800e160:	681a      	ldr	r2, [r3, #0]
 800e162:	4bbe      	ldr	r3, [pc, #760]	@ (800e45c <UART_SetConfig+0x328>)
 800e164:	4013      	ands	r3, r2
 800e166:	697a      	ldr	r2, [r7, #20]
 800e168:	6812      	ldr	r2, [r2, #0]
 800e16a:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e16c:	430b      	orrs	r3, r1
 800e16e:	6013      	str	r3, [r2, #0]

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800e170:	697b      	ldr	r3, [r7, #20]
 800e172:	681b      	ldr	r3, [r3, #0]
 800e174:	685b      	ldr	r3, [r3, #4]
 800e176:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800e17a:	697b      	ldr	r3, [r7, #20]
 800e17c:	68da      	ldr	r2, [r3, #12]
 800e17e:	697b      	ldr	r3, [r7, #20]
 800e180:	681b      	ldr	r3, [r3, #0]
 800e182:	430a      	orrs	r2, r1
 800e184:	605a      	str	r2, [r3, #4]
  /* Configure
  * - UART HardWare Flow Control: set CTSE and RTSE bits according
  *   to huart->Init.HwFlowCtl value
  * - one-bit sampling method versus three samples' majority rule according
  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
 800e186:	697b      	ldr	r3, [r7, #20]
 800e188:	699b      	ldr	r3, [r3, #24]
 800e18a:	647b      	str	r3, [r7, #68]	@ 0x44

  if (!(UART_INSTANCE_LOWPOWER(huart)))
 800e18c:	697b      	ldr	r3, [r7, #20]
 800e18e:	681b      	ldr	r3, [r3, #0]
 800e190:	4ab3      	ldr	r2, [pc, #716]	@ (800e460 <UART_SetConfig+0x32c>)
 800e192:	4293      	cmp	r3, r2
 800e194:	d004      	beq.n	800e1a0 <UART_SetConfig+0x6c>
  {
    tmpreg |= huart->Init.OneBitSampling;
 800e196:	697b      	ldr	r3, [r7, #20]
 800e198:	6a1b      	ldr	r3, [r3, #32]
 800e19a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e19c:	4313      	orrs	r3, r2
 800e19e:	647b      	str	r3, [r7, #68]	@ 0x44
  }
  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
 800e1a0:	697b      	ldr	r3, [r7, #20]
 800e1a2:	681b      	ldr	r3, [r3, #0]
 800e1a4:	689a      	ldr	r2, [r3, #8]
 800e1a6:	4baf      	ldr	r3, [pc, #700]	@ (800e464 <UART_SetConfig+0x330>)
 800e1a8:	4013      	ands	r3, r2
 800e1aa:	697a      	ldr	r2, [r7, #20]
 800e1ac:	6812      	ldr	r2, [r2, #0]
 800e1ae:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e1b0:	430b      	orrs	r3, r1
 800e1b2:	6093      	str	r3, [r2, #8]

  /*-------------------------- USART PRESC Configuration -----------------------*/
  /* Configure
  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
 800e1b4:	697b      	ldr	r3, [r7, #20]
 800e1b6:	681b      	ldr	r3, [r3, #0]
 800e1b8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800e1ba:	f023 010f 	bic.w	r1, r3, #15
 800e1be:	697b      	ldr	r3, [r7, #20]
 800e1c0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800e1c2:	697b      	ldr	r3, [r7, #20]
 800e1c4:	681b      	ldr	r3, [r3, #0]
 800e1c6:	430a      	orrs	r2, r1
 800e1c8:	62da      	str	r2, [r3, #44]	@ 0x2c

  /*-------------------------- USART BRR Configuration -----------------------*/
  UART_GETCLOCKSOURCE(huart, clocksource);
 800e1ca:	697b      	ldr	r3, [r7, #20]
 800e1cc:	681b      	ldr	r3, [r3, #0]
 800e1ce:	4aa6      	ldr	r2, [pc, #664]	@ (800e468 <UART_SetConfig+0x334>)
 800e1d0:	4293      	cmp	r3, r2
 800e1d2:	d177      	bne.n	800e2c4 <UART_SetConfig+0x190>
 800e1d4:	4ba5      	ldr	r3, [pc, #660]	@ (800e46c <UART_SetConfig+0x338>)
 800e1d6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e1d8:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800e1dc:	2b28      	cmp	r3, #40	@ 0x28
 800e1de:	d86d      	bhi.n	800e2bc <UART_SetConfig+0x188>
 800e1e0:	a201      	add	r2, pc, #4	@ (adr r2, 800e1e8 <UART_SetConfig+0xb4>)
 800e1e2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e1e6:	bf00      	nop
 800e1e8:	0800e28d 	.word	0x0800e28d
 800e1ec:	0800e2bd 	.word	0x0800e2bd
 800e1f0:	0800e2bd 	.word	0x0800e2bd
 800e1f4:	0800e2bd 	.word	0x0800e2bd
 800e1f8:	0800e2bd 	.word	0x0800e2bd
 800e1fc:	0800e2bd 	.word	0x0800e2bd
 800e200:	0800e2bd 	.word	0x0800e2bd
 800e204:	0800e2bd 	.word	0x0800e2bd
 800e208:	0800e295 	.word	0x0800e295
 800e20c:	0800e2bd 	.word	0x0800e2bd
 800e210:	0800e2bd 	.word	0x0800e2bd
 800e214:	0800e2bd 	.word	0x0800e2bd
 800e218:	0800e2bd 	.word	0x0800e2bd
 800e21c:	0800e2bd 	.word	0x0800e2bd
 800e220:	0800e2bd 	.word	0x0800e2bd
 800e224:	0800e2bd 	.word	0x0800e2bd
 800e228:	0800e29d 	.word	0x0800e29d
 800e22c:	0800e2bd 	.word	0x0800e2bd
 800e230:	0800e2bd 	.word	0x0800e2bd
 800e234:	0800e2bd 	.word	0x0800e2bd
 800e238:	0800e2bd 	.word	0x0800e2bd
 800e23c:	0800e2bd 	.word	0x0800e2bd
 800e240:	0800e2bd 	.word	0x0800e2bd
 800e244:	0800e2bd 	.word	0x0800e2bd
 800e248:	0800e2a5 	.word	0x0800e2a5
 800e24c:	0800e2bd 	.word	0x0800e2bd
 800e250:	0800e2bd 	.word	0x0800e2bd
 800e254:	0800e2bd 	.word	0x0800e2bd
 800e258:	0800e2bd 	.word	0x0800e2bd
 800e25c:	0800e2bd 	.word	0x0800e2bd
 800e260:	0800e2bd 	.word	0x0800e2bd
 800e264:	0800e2bd 	.word	0x0800e2bd
 800e268:	0800e2ad 	.word	0x0800e2ad
 800e26c:	0800e2bd 	.word	0x0800e2bd
 800e270:	0800e2bd 	.word	0x0800e2bd
 800e274:	0800e2bd 	.word	0x0800e2bd
 800e278:	0800e2bd 	.word	0x0800e2bd
 800e27c:	0800e2bd 	.word	0x0800e2bd
 800e280:	0800e2bd 	.word	0x0800e2bd
 800e284:	0800e2bd 	.word	0x0800e2bd
 800e288:	0800e2b5 	.word	0x0800e2b5
 800e28c:	2301      	movs	r3, #1
 800e28e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e292:	e222      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e294:	2304      	movs	r3, #4
 800e296:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e29a:	e21e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e29c:	2308      	movs	r3, #8
 800e29e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2a2:	e21a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e2a4:	2310      	movs	r3, #16
 800e2a6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2aa:	e216      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e2ac:	2320      	movs	r3, #32
 800e2ae:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2b2:	e212      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e2b4:	2340      	movs	r3, #64	@ 0x40
 800e2b6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2ba:	e20e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e2bc:	2380      	movs	r3, #128	@ 0x80
 800e2be:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2c2:	e20a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e2c4:	697b      	ldr	r3, [r7, #20]
 800e2c6:	681b      	ldr	r3, [r3, #0]
 800e2c8:	4a69      	ldr	r2, [pc, #420]	@ (800e470 <UART_SetConfig+0x33c>)
 800e2ca:	4293      	cmp	r3, r2
 800e2cc:	d130      	bne.n	800e330 <UART_SetConfig+0x1fc>
 800e2ce:	4b67      	ldr	r3, [pc, #412]	@ (800e46c <UART_SetConfig+0x338>)
 800e2d0:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e2d2:	f003 0307 	and.w	r3, r3, #7
 800e2d6:	2b05      	cmp	r3, #5
 800e2d8:	d826      	bhi.n	800e328 <UART_SetConfig+0x1f4>
 800e2da:	a201      	add	r2, pc, #4	@ (adr r2, 800e2e0 <UART_SetConfig+0x1ac>)
 800e2dc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e2e0:	0800e2f9 	.word	0x0800e2f9
 800e2e4:	0800e301 	.word	0x0800e301
 800e2e8:	0800e309 	.word	0x0800e309
 800e2ec:	0800e311 	.word	0x0800e311
 800e2f0:	0800e319 	.word	0x0800e319
 800e2f4:	0800e321 	.word	0x0800e321
 800e2f8:	2300      	movs	r3, #0
 800e2fa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e2fe:	e1ec      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e300:	2304      	movs	r3, #4
 800e302:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e306:	e1e8      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e308:	2308      	movs	r3, #8
 800e30a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e30e:	e1e4      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e310:	2310      	movs	r3, #16
 800e312:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e316:	e1e0      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e318:	2320      	movs	r3, #32
 800e31a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e31e:	e1dc      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e320:	2340      	movs	r3, #64	@ 0x40
 800e322:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e326:	e1d8      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e328:	2380      	movs	r3, #128	@ 0x80
 800e32a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e32e:	e1d4      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e330:	697b      	ldr	r3, [r7, #20]
 800e332:	681b      	ldr	r3, [r3, #0]
 800e334:	4a4f      	ldr	r2, [pc, #316]	@ (800e474 <UART_SetConfig+0x340>)
 800e336:	4293      	cmp	r3, r2
 800e338:	d130      	bne.n	800e39c <UART_SetConfig+0x268>
 800e33a:	4b4c      	ldr	r3, [pc, #304]	@ (800e46c <UART_SetConfig+0x338>)
 800e33c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e33e:	f003 0307 	and.w	r3, r3, #7
 800e342:	2b05      	cmp	r3, #5
 800e344:	d826      	bhi.n	800e394 <UART_SetConfig+0x260>
 800e346:	a201      	add	r2, pc, #4	@ (adr r2, 800e34c <UART_SetConfig+0x218>)
 800e348:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e34c:	0800e365 	.word	0x0800e365
 800e350:	0800e36d 	.word	0x0800e36d
 800e354:	0800e375 	.word	0x0800e375
 800e358:	0800e37d 	.word	0x0800e37d
 800e35c:	0800e385 	.word	0x0800e385
 800e360:	0800e38d 	.word	0x0800e38d
 800e364:	2300      	movs	r3, #0
 800e366:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e36a:	e1b6      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e36c:	2304      	movs	r3, #4
 800e36e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e372:	e1b2      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e374:	2308      	movs	r3, #8
 800e376:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e37a:	e1ae      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e37c:	2310      	movs	r3, #16
 800e37e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e382:	e1aa      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e384:	2320      	movs	r3, #32
 800e386:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e38a:	e1a6      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e38c:	2340      	movs	r3, #64	@ 0x40
 800e38e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e392:	e1a2      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e394:	2380      	movs	r3, #128	@ 0x80
 800e396:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e39a:	e19e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e39c:	697b      	ldr	r3, [r7, #20]
 800e39e:	681b      	ldr	r3, [r3, #0]
 800e3a0:	4a35      	ldr	r2, [pc, #212]	@ (800e478 <UART_SetConfig+0x344>)
 800e3a2:	4293      	cmp	r3, r2
 800e3a4:	d130      	bne.n	800e408 <UART_SetConfig+0x2d4>
 800e3a6:	4b31      	ldr	r3, [pc, #196]	@ (800e46c <UART_SetConfig+0x338>)
 800e3a8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e3aa:	f003 0307 	and.w	r3, r3, #7
 800e3ae:	2b05      	cmp	r3, #5
 800e3b0:	d826      	bhi.n	800e400 <UART_SetConfig+0x2cc>
 800e3b2:	a201      	add	r2, pc, #4	@ (adr r2, 800e3b8 <UART_SetConfig+0x284>)
 800e3b4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e3b8:	0800e3d1 	.word	0x0800e3d1
 800e3bc:	0800e3d9 	.word	0x0800e3d9
 800e3c0:	0800e3e1 	.word	0x0800e3e1
 800e3c4:	0800e3e9 	.word	0x0800e3e9
 800e3c8:	0800e3f1 	.word	0x0800e3f1
 800e3cc:	0800e3f9 	.word	0x0800e3f9
 800e3d0:	2300      	movs	r3, #0
 800e3d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3d6:	e180      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e3d8:	2304      	movs	r3, #4
 800e3da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3de:	e17c      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e3e0:	2308      	movs	r3, #8
 800e3e2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3e6:	e178      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e3e8:	2310      	movs	r3, #16
 800e3ea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3ee:	e174      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e3f0:	2320      	movs	r3, #32
 800e3f2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3f6:	e170      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e3f8:	2340      	movs	r3, #64	@ 0x40
 800e3fa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e3fe:	e16c      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e400:	2380      	movs	r3, #128	@ 0x80
 800e402:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e406:	e168      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e408:	697b      	ldr	r3, [r7, #20]
 800e40a:	681b      	ldr	r3, [r3, #0]
 800e40c:	4a1b      	ldr	r2, [pc, #108]	@ (800e47c <UART_SetConfig+0x348>)
 800e40e:	4293      	cmp	r3, r2
 800e410:	d142      	bne.n	800e498 <UART_SetConfig+0x364>
 800e412:	4b16      	ldr	r3, [pc, #88]	@ (800e46c <UART_SetConfig+0x338>)
 800e414:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e416:	f003 0307 	and.w	r3, r3, #7
 800e41a:	2b05      	cmp	r3, #5
 800e41c:	d838      	bhi.n	800e490 <UART_SetConfig+0x35c>
 800e41e:	a201      	add	r2, pc, #4	@ (adr r2, 800e424 <UART_SetConfig+0x2f0>)
 800e420:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e424:	0800e43d 	.word	0x0800e43d
 800e428:	0800e445 	.word	0x0800e445
 800e42c:	0800e44d 	.word	0x0800e44d
 800e430:	0800e455 	.word	0x0800e455
 800e434:	0800e481 	.word	0x0800e481
 800e438:	0800e489 	.word	0x0800e489
 800e43c:	2300      	movs	r3, #0
 800e43e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e442:	e14a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e444:	2304      	movs	r3, #4
 800e446:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e44a:	e146      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e44c:	2308      	movs	r3, #8
 800e44e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e452:	e142      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e454:	2310      	movs	r3, #16
 800e456:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e45a:	e13e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e45c:	cfff69f3 	.word	0xcfff69f3
 800e460:	58000c00 	.word	0x58000c00
 800e464:	11fff4ff 	.word	0x11fff4ff
 800e468:	40011000 	.word	0x40011000
 800e46c:	58024400 	.word	0x58024400
 800e470:	40004400 	.word	0x40004400
 800e474:	40004800 	.word	0x40004800
 800e478:	40004c00 	.word	0x40004c00
 800e47c:	40005000 	.word	0x40005000
 800e480:	2320      	movs	r3, #32
 800e482:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e486:	e128      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e488:	2340      	movs	r3, #64	@ 0x40
 800e48a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e48e:	e124      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e490:	2380      	movs	r3, #128	@ 0x80
 800e492:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e496:	e120      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e498:	697b      	ldr	r3, [r7, #20]
 800e49a:	681b      	ldr	r3, [r3, #0]
 800e49c:	4acb      	ldr	r2, [pc, #812]	@ (800e7cc <UART_SetConfig+0x698>)
 800e49e:	4293      	cmp	r3, r2
 800e4a0:	d176      	bne.n	800e590 <UART_SetConfig+0x45c>
 800e4a2:	4bcb      	ldr	r3, [pc, #812]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e4a4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e4a6:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800e4aa:	2b28      	cmp	r3, #40	@ 0x28
 800e4ac:	d86c      	bhi.n	800e588 <UART_SetConfig+0x454>
 800e4ae:	a201      	add	r2, pc, #4	@ (adr r2, 800e4b4 <UART_SetConfig+0x380>)
 800e4b0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e4b4:	0800e559 	.word	0x0800e559
 800e4b8:	0800e589 	.word	0x0800e589
 800e4bc:	0800e589 	.word	0x0800e589
 800e4c0:	0800e589 	.word	0x0800e589
 800e4c4:	0800e589 	.word	0x0800e589
 800e4c8:	0800e589 	.word	0x0800e589
 800e4cc:	0800e589 	.word	0x0800e589
 800e4d0:	0800e589 	.word	0x0800e589
 800e4d4:	0800e561 	.word	0x0800e561
 800e4d8:	0800e589 	.word	0x0800e589
 800e4dc:	0800e589 	.word	0x0800e589
 800e4e0:	0800e589 	.word	0x0800e589
 800e4e4:	0800e589 	.word	0x0800e589
 800e4e8:	0800e589 	.word	0x0800e589
 800e4ec:	0800e589 	.word	0x0800e589
 800e4f0:	0800e589 	.word	0x0800e589
 800e4f4:	0800e569 	.word	0x0800e569
 800e4f8:	0800e589 	.word	0x0800e589
 800e4fc:	0800e589 	.word	0x0800e589
 800e500:	0800e589 	.word	0x0800e589
 800e504:	0800e589 	.word	0x0800e589
 800e508:	0800e589 	.word	0x0800e589
 800e50c:	0800e589 	.word	0x0800e589
 800e510:	0800e589 	.word	0x0800e589
 800e514:	0800e571 	.word	0x0800e571
 800e518:	0800e589 	.word	0x0800e589
 800e51c:	0800e589 	.word	0x0800e589
 800e520:	0800e589 	.word	0x0800e589
 800e524:	0800e589 	.word	0x0800e589
 800e528:	0800e589 	.word	0x0800e589
 800e52c:	0800e589 	.word	0x0800e589
 800e530:	0800e589 	.word	0x0800e589
 800e534:	0800e579 	.word	0x0800e579
 800e538:	0800e589 	.word	0x0800e589
 800e53c:	0800e589 	.word	0x0800e589
 800e540:	0800e589 	.word	0x0800e589
 800e544:	0800e589 	.word	0x0800e589
 800e548:	0800e589 	.word	0x0800e589
 800e54c:	0800e589 	.word	0x0800e589
 800e550:	0800e589 	.word	0x0800e589
 800e554:	0800e581 	.word	0x0800e581
 800e558:	2301      	movs	r3, #1
 800e55a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e55e:	e0bc      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e560:	2304      	movs	r3, #4
 800e562:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e566:	e0b8      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e568:	2308      	movs	r3, #8
 800e56a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e56e:	e0b4      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e570:	2310      	movs	r3, #16
 800e572:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e576:	e0b0      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e578:	2320      	movs	r3, #32
 800e57a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e57e:	e0ac      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e580:	2340      	movs	r3, #64	@ 0x40
 800e582:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e586:	e0a8      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e588:	2380      	movs	r3, #128	@ 0x80
 800e58a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e58e:	e0a4      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e590:	697b      	ldr	r3, [r7, #20]
 800e592:	681b      	ldr	r3, [r3, #0]
 800e594:	4a8f      	ldr	r2, [pc, #572]	@ (800e7d4 <UART_SetConfig+0x6a0>)
 800e596:	4293      	cmp	r3, r2
 800e598:	d130      	bne.n	800e5fc <UART_SetConfig+0x4c8>
 800e59a:	4b8d      	ldr	r3, [pc, #564]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e59c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e59e:	f003 0307 	and.w	r3, r3, #7
 800e5a2:	2b05      	cmp	r3, #5
 800e5a4:	d826      	bhi.n	800e5f4 <UART_SetConfig+0x4c0>
 800e5a6:	a201      	add	r2, pc, #4	@ (adr r2, 800e5ac <UART_SetConfig+0x478>)
 800e5a8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e5ac:	0800e5c5 	.word	0x0800e5c5
 800e5b0:	0800e5cd 	.word	0x0800e5cd
 800e5b4:	0800e5d5 	.word	0x0800e5d5
 800e5b8:	0800e5dd 	.word	0x0800e5dd
 800e5bc:	0800e5e5 	.word	0x0800e5e5
 800e5c0:	0800e5ed 	.word	0x0800e5ed
 800e5c4:	2300      	movs	r3, #0
 800e5c6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5ca:	e086      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5cc:	2304      	movs	r3, #4
 800e5ce:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5d2:	e082      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5d4:	2308      	movs	r3, #8
 800e5d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5da:	e07e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5dc:	2310      	movs	r3, #16
 800e5de:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5e2:	e07a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5e4:	2320      	movs	r3, #32
 800e5e6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5ea:	e076      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5ec:	2340      	movs	r3, #64	@ 0x40
 800e5ee:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5f2:	e072      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5f4:	2380      	movs	r3, #128	@ 0x80
 800e5f6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5fa:	e06e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e5fc:	697b      	ldr	r3, [r7, #20]
 800e5fe:	681b      	ldr	r3, [r3, #0]
 800e600:	4a75      	ldr	r2, [pc, #468]	@ (800e7d8 <UART_SetConfig+0x6a4>)
 800e602:	4293      	cmp	r3, r2
 800e604:	d130      	bne.n	800e668 <UART_SetConfig+0x534>
 800e606:	4b72      	ldr	r3, [pc, #456]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e608:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e60a:	f003 0307 	and.w	r3, r3, #7
 800e60e:	2b05      	cmp	r3, #5
 800e610:	d826      	bhi.n	800e660 <UART_SetConfig+0x52c>
 800e612:	a201      	add	r2, pc, #4	@ (adr r2, 800e618 <UART_SetConfig+0x4e4>)
 800e614:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e618:	0800e631 	.word	0x0800e631
 800e61c:	0800e639 	.word	0x0800e639
 800e620:	0800e641 	.word	0x0800e641
 800e624:	0800e649 	.word	0x0800e649
 800e628:	0800e651 	.word	0x0800e651
 800e62c:	0800e659 	.word	0x0800e659
 800e630:	2300      	movs	r3, #0
 800e632:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e636:	e050      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e638:	2304      	movs	r3, #4
 800e63a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e63e:	e04c      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e640:	2308      	movs	r3, #8
 800e642:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e646:	e048      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e648:	2310      	movs	r3, #16
 800e64a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e64e:	e044      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e650:	2320      	movs	r3, #32
 800e652:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e656:	e040      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e658:	2340      	movs	r3, #64	@ 0x40
 800e65a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e65e:	e03c      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e660:	2380      	movs	r3, #128	@ 0x80
 800e662:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e666:	e038      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e668:	697b      	ldr	r3, [r7, #20]
 800e66a:	681b      	ldr	r3, [r3, #0]
 800e66c:	4a5b      	ldr	r2, [pc, #364]	@ (800e7dc <UART_SetConfig+0x6a8>)
 800e66e:	4293      	cmp	r3, r2
 800e670:	d130      	bne.n	800e6d4 <UART_SetConfig+0x5a0>
 800e672:	4b57      	ldr	r3, [pc, #348]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e674:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e676:	f003 0307 	and.w	r3, r3, #7
 800e67a:	2b05      	cmp	r3, #5
 800e67c:	d826      	bhi.n	800e6cc <UART_SetConfig+0x598>
 800e67e:	a201      	add	r2, pc, #4	@ (adr r2, 800e684 <UART_SetConfig+0x550>)
 800e680:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e684:	0800e69d 	.word	0x0800e69d
 800e688:	0800e6a5 	.word	0x0800e6a5
 800e68c:	0800e6ad 	.word	0x0800e6ad
 800e690:	0800e6b5 	.word	0x0800e6b5
 800e694:	0800e6bd 	.word	0x0800e6bd
 800e698:	0800e6c5 	.word	0x0800e6c5
 800e69c:	2302      	movs	r3, #2
 800e69e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6a2:	e01a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6a4:	2304      	movs	r3, #4
 800e6a6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6aa:	e016      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6ac:	2308      	movs	r3, #8
 800e6ae:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6b2:	e012      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6b4:	2310      	movs	r3, #16
 800e6b6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6ba:	e00e      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6bc:	2320      	movs	r3, #32
 800e6be:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6c2:	e00a      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6c4:	2340      	movs	r3, #64	@ 0x40
 800e6c6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6ca:	e006      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6cc:	2380      	movs	r3, #128	@ 0x80
 800e6ce:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6d2:	e002      	b.n	800e6da <UART_SetConfig+0x5a6>
 800e6d4:	2380      	movs	r3, #128	@ 0x80
 800e6d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43

  /* Check LPUART instance */
  if (UART_INSTANCE_LOWPOWER(huart))
 800e6da:	697b      	ldr	r3, [r7, #20]
 800e6dc:	681b      	ldr	r3, [r3, #0]
 800e6de:	4a3f      	ldr	r2, [pc, #252]	@ (800e7dc <UART_SetConfig+0x6a8>)
 800e6e0:	4293      	cmp	r3, r2
 800e6e2:	f040 80f8 	bne.w	800e8d6 <UART_SetConfig+0x7a2>
  {
    /* Retrieve frequency clock */
    switch (clocksource)
 800e6e6:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e6ea:	2b20      	cmp	r3, #32
 800e6ec:	dc46      	bgt.n	800e77c <UART_SetConfig+0x648>
 800e6ee:	2b02      	cmp	r3, #2
 800e6f0:	f2c0 8082 	blt.w	800e7f8 <UART_SetConfig+0x6c4>
 800e6f4:	3b02      	subs	r3, #2
 800e6f6:	2b1e      	cmp	r3, #30
 800e6f8:	d87e      	bhi.n	800e7f8 <UART_SetConfig+0x6c4>
 800e6fa:	a201      	add	r2, pc, #4	@ (adr r2, 800e700 <UART_SetConfig+0x5cc>)
 800e6fc:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e700:	0800e783 	.word	0x0800e783
 800e704:	0800e7f9 	.word	0x0800e7f9
 800e708:	0800e78b 	.word	0x0800e78b
 800e70c:	0800e7f9 	.word	0x0800e7f9
 800e710:	0800e7f9 	.word	0x0800e7f9
 800e714:	0800e7f9 	.word	0x0800e7f9
 800e718:	0800e79b 	.word	0x0800e79b
 800e71c:	0800e7f9 	.word	0x0800e7f9
 800e720:	0800e7f9 	.word	0x0800e7f9
 800e724:	0800e7f9 	.word	0x0800e7f9
 800e728:	0800e7f9 	.word	0x0800e7f9
 800e72c:	0800e7f9 	.word	0x0800e7f9
 800e730:	0800e7f9 	.word	0x0800e7f9
 800e734:	0800e7f9 	.word	0x0800e7f9
 800e738:	0800e7ab 	.word	0x0800e7ab
 800e73c:	0800e7f9 	.word	0x0800e7f9
 800e740:	0800e7f9 	.word	0x0800e7f9
 800e744:	0800e7f9 	.word	0x0800e7f9
 800e748:	0800e7f9 	.word	0x0800e7f9
 800e74c:	0800e7f9 	.word	0x0800e7f9
 800e750:	0800e7f9 	.word	0x0800e7f9
 800e754:	0800e7f9 	.word	0x0800e7f9
 800e758:	0800e7f9 	.word	0x0800e7f9
 800e75c:	0800e7f9 	.word	0x0800e7f9
 800e760:	0800e7f9 	.word	0x0800e7f9
 800e764:	0800e7f9 	.word	0x0800e7f9
 800e768:	0800e7f9 	.word	0x0800e7f9
 800e76c:	0800e7f9 	.word	0x0800e7f9
 800e770:	0800e7f9 	.word	0x0800e7f9
 800e774:	0800e7f9 	.word	0x0800e7f9
 800e778:	0800e7eb 	.word	0x0800e7eb
 800e77c:	2b40      	cmp	r3, #64	@ 0x40
 800e77e:	d037      	beq.n	800e7f0 <UART_SetConfig+0x6bc>
 800e780:	e03a      	b.n	800e7f8 <UART_SetConfig+0x6c4>
    {
      case UART_CLOCKSOURCE_D3PCLK1:
        pclk = HAL_RCCEx_GetD3PCLK1Freq();
 800e782:	f7fd fff9 	bl	800c778 <HAL_RCCEx_GetD3PCLK1Freq>
 800e786:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e788:	e03c      	b.n	800e804 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e78a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e78e:	4618      	mov	r0, r3
 800e790:	f7fe f808 	bl	800c7a4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e794:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e796:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e798:	e034      	b.n	800e804 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e79a:	f107 0318 	add.w	r3, r7, #24
 800e79e:	4618      	mov	r0, r3
 800e7a0:	f7fe f954 	bl	800ca4c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e7a4:	69fb      	ldr	r3, [r7, #28]
 800e7a6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e7a8:	e02c      	b.n	800e804 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e7aa:	4b09      	ldr	r3, [pc, #36]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e7ac:	681b      	ldr	r3, [r3, #0]
 800e7ae:	f003 0320 	and.w	r3, r3, #32
 800e7b2:	2b00      	cmp	r3, #0
 800e7b4:	d016      	beq.n	800e7e4 <UART_SetConfig+0x6b0>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e7b6:	4b06      	ldr	r3, [pc, #24]	@ (800e7d0 <UART_SetConfig+0x69c>)
 800e7b8:	681b      	ldr	r3, [r3, #0]
 800e7ba:	08db      	lsrs	r3, r3, #3
 800e7bc:	f003 0303 	and.w	r3, r3, #3
 800e7c0:	4a07      	ldr	r2, [pc, #28]	@ (800e7e0 <UART_SetConfig+0x6ac>)
 800e7c2:	fa22 f303 	lsr.w	r3, r2, r3
 800e7c6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e7c8:	e01c      	b.n	800e804 <UART_SetConfig+0x6d0>
 800e7ca:	bf00      	nop
 800e7cc:	40011400 	.word	0x40011400
 800e7d0:	58024400 	.word	0x58024400
 800e7d4:	40007800 	.word	0x40007800
 800e7d8:	40007c00 	.word	0x40007c00
 800e7dc:	58000c00 	.word	0x58000c00
 800e7e0:	03d09000 	.word	0x03d09000
          pclk = (uint32_t) HSI_VALUE;
 800e7e4:	4b9d      	ldr	r3, [pc, #628]	@ (800ea5c <UART_SetConfig+0x928>)
 800e7e6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e7e8:	e00c      	b.n	800e804 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e7ea:	4b9d      	ldr	r3, [pc, #628]	@ (800ea60 <UART_SetConfig+0x92c>)
 800e7ec:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e7ee:	e009      	b.n	800e804 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e7f0:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e7f4:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e7f6:	e005      	b.n	800e804 <UART_SetConfig+0x6d0>
      default:
        pclk = 0U;
 800e7f8:	2300      	movs	r3, #0
 800e7fa:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e7fc:	2301      	movs	r3, #1
 800e7fe:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e802:	bf00      	nop
    }

    /* If proper clock source reported */
    if (pclk != 0U)
 800e804:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e806:	2b00      	cmp	r3, #0
 800e808:	f000 81de 	beq.w	800ebc8 <UART_SetConfig+0xa94>
    {
      /* Compute clock after Prescaler */
      lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
 800e80c:	697b      	ldr	r3, [r7, #20]
 800e80e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e810:	4a94      	ldr	r2, [pc, #592]	@ (800ea64 <UART_SetConfig+0x930>)
 800e812:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e816:	461a      	mov	r2, r3
 800e818:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e81a:	fbb3 f3f2 	udiv	r3, r3, r2
 800e81e:	633b      	str	r3, [r7, #48]	@ 0x30

      /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800e820:	697b      	ldr	r3, [r7, #20]
 800e822:	685a      	ldr	r2, [r3, #4]
 800e824:	4613      	mov	r3, r2
 800e826:	005b      	lsls	r3, r3, #1
 800e828:	4413      	add	r3, r2
 800e82a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e82c:	429a      	cmp	r2, r3
 800e82e:	d305      	bcc.n	800e83c <UART_SetConfig+0x708>
          (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
 800e830:	697b      	ldr	r3, [r7, #20]
 800e832:	685b      	ldr	r3, [r3, #4]
 800e834:	031b      	lsls	r3, r3, #12
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800e836:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e838:	429a      	cmp	r2, r3
 800e83a:	d903      	bls.n	800e844 <UART_SetConfig+0x710>
      {
        ret = HAL_ERROR;
 800e83c:	2301      	movs	r3, #1
 800e83e:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e842:	e1c1      	b.n	800ebc8 <UART_SetConfig+0xa94>
      }
      else
      {
        /* Check computed UsartDiv value is in allocated range
           (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
        usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e844:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e846:	2200      	movs	r2, #0
 800e848:	60bb      	str	r3, [r7, #8]
 800e84a:	60fa      	str	r2, [r7, #12]
 800e84c:	697b      	ldr	r3, [r7, #20]
 800e84e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e850:	4a84      	ldr	r2, [pc, #528]	@ (800ea64 <UART_SetConfig+0x930>)
 800e852:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800e856:	b29b      	uxth	r3, r3
 800e858:	2200      	movs	r2, #0
 800e85a:	603b      	str	r3, [r7, #0]
 800e85c:	607a      	str	r2, [r7, #4]
 800e85e:	e9d7 2300 	ldrd	r2, r3, [r7]
 800e862:	e9d7 0102 	ldrd	r0, r1, [r7, #8]
 800e866:	f7f1 ff5f 	bl	8000728 <__aeabi_uldivmod>
 800e86a:	4602      	mov	r2, r0
 800e86c:	460b      	mov	r3, r1
 800e86e:	4610      	mov	r0, r2
 800e870:	4619      	mov	r1, r3
 800e872:	f04f 0200 	mov.w	r2, #0
 800e876:	f04f 0300 	mov.w	r3, #0
 800e87a:	020b      	lsls	r3, r1, #8
 800e87c:	ea43 6310 	orr.w	r3, r3, r0, lsr #24
 800e880:	0202      	lsls	r2, r0, #8
 800e882:	6979      	ldr	r1, [r7, #20]
 800e884:	6849      	ldr	r1, [r1, #4]
 800e886:	0849      	lsrs	r1, r1, #1
 800e888:	2000      	movs	r0, #0
 800e88a:	460c      	mov	r4, r1
 800e88c:	4605      	mov	r5, r0
 800e88e:	eb12 0804 	adds.w	r8, r2, r4
 800e892:	eb43 0905 	adc.w	r9, r3, r5
 800e896:	697b      	ldr	r3, [r7, #20]
 800e898:	685b      	ldr	r3, [r3, #4]
 800e89a:	2200      	movs	r2, #0
 800e89c:	469a      	mov	sl, r3
 800e89e:	4693      	mov	fp, r2
 800e8a0:	4652      	mov	r2, sl
 800e8a2:	465b      	mov	r3, fp
 800e8a4:	4640      	mov	r0, r8
 800e8a6:	4649      	mov	r1, r9
 800e8a8:	f7f1 ff3e 	bl	8000728 <__aeabi_uldivmod>
 800e8ac:	4602      	mov	r2, r0
 800e8ae:	460b      	mov	r3, r1
 800e8b0:	4613      	mov	r3, r2
 800e8b2:	63bb      	str	r3, [r7, #56]	@ 0x38
        if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
 800e8b4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e8b6:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800e8ba:	d308      	bcc.n	800e8ce <UART_SetConfig+0x79a>
 800e8bc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e8be:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800e8c2:	d204      	bcs.n	800e8ce <UART_SetConfig+0x79a>
        {
          huart->Instance->BRR = usartdiv;
 800e8c4:	697b      	ldr	r3, [r7, #20]
 800e8c6:	681b      	ldr	r3, [r3, #0]
 800e8c8:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800e8ca:	60da      	str	r2, [r3, #12]
 800e8cc:	e17c      	b.n	800ebc8 <UART_SetConfig+0xa94>
        }
        else
        {
          ret = HAL_ERROR;
 800e8ce:	2301      	movs	r3, #1
 800e8d0:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800e8d4:	e178      	b.n	800ebc8 <UART_SetConfig+0xa94>
      } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
                (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
    } /* if (pclk != 0) */
  }
  /* Check UART Over Sampling to set Baud Rate Register */
  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800e8d6:	697b      	ldr	r3, [r7, #20]
 800e8d8:	69db      	ldr	r3, [r3, #28]
 800e8da:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800e8de:	f040 80c5 	bne.w	800ea6c <UART_SetConfig+0x938>
  {
    switch (clocksource)
 800e8e2:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e8e6:	2b20      	cmp	r3, #32
 800e8e8:	dc48      	bgt.n	800e97c <UART_SetConfig+0x848>
 800e8ea:	2b00      	cmp	r3, #0
 800e8ec:	db7b      	blt.n	800e9e6 <UART_SetConfig+0x8b2>
 800e8ee:	2b20      	cmp	r3, #32
 800e8f0:	d879      	bhi.n	800e9e6 <UART_SetConfig+0x8b2>
 800e8f2:	a201      	add	r2, pc, #4	@ (adr r2, 800e8f8 <UART_SetConfig+0x7c4>)
 800e8f4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e8f8:	0800e983 	.word	0x0800e983
 800e8fc:	0800e98b 	.word	0x0800e98b
 800e900:	0800e9e7 	.word	0x0800e9e7
 800e904:	0800e9e7 	.word	0x0800e9e7
 800e908:	0800e993 	.word	0x0800e993
 800e90c:	0800e9e7 	.word	0x0800e9e7
 800e910:	0800e9e7 	.word	0x0800e9e7
 800e914:	0800e9e7 	.word	0x0800e9e7
 800e918:	0800e9a3 	.word	0x0800e9a3
 800e91c:	0800e9e7 	.word	0x0800e9e7
 800e920:	0800e9e7 	.word	0x0800e9e7
 800e924:	0800e9e7 	.word	0x0800e9e7
 800e928:	0800e9e7 	.word	0x0800e9e7
 800e92c:	0800e9e7 	.word	0x0800e9e7
 800e930:	0800e9e7 	.word	0x0800e9e7
 800e934:	0800e9e7 	.word	0x0800e9e7
 800e938:	0800e9b3 	.word	0x0800e9b3
 800e93c:	0800e9e7 	.word	0x0800e9e7
 800e940:	0800e9e7 	.word	0x0800e9e7
 800e944:	0800e9e7 	.word	0x0800e9e7
 800e948:	0800e9e7 	.word	0x0800e9e7
 800e94c:	0800e9e7 	.word	0x0800e9e7
 800e950:	0800e9e7 	.word	0x0800e9e7
 800e954:	0800e9e7 	.word	0x0800e9e7
 800e958:	0800e9e7 	.word	0x0800e9e7
 800e95c:	0800e9e7 	.word	0x0800e9e7
 800e960:	0800e9e7 	.word	0x0800e9e7
 800e964:	0800e9e7 	.word	0x0800e9e7
 800e968:	0800e9e7 	.word	0x0800e9e7
 800e96c:	0800e9e7 	.word	0x0800e9e7
 800e970:	0800e9e7 	.word	0x0800e9e7
 800e974:	0800e9e7 	.word	0x0800e9e7
 800e978:	0800e9d9 	.word	0x0800e9d9
 800e97c:	2b40      	cmp	r3, #64	@ 0x40
 800e97e:	d02e      	beq.n	800e9de <UART_SetConfig+0x8aa>
 800e980:	e031      	b.n	800e9e6 <UART_SetConfig+0x8b2>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800e982:	f7fc fc9d 	bl	800b2c0 <HAL_RCC_GetPCLK1Freq>
 800e986:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e988:	e033      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800e98a:	f7fc fcaf 	bl	800b2ec <HAL_RCC_GetPCLK2Freq>
 800e98e:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800e990:	e02f      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800e992:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800e996:	4618      	mov	r0, r3
 800e998:	f7fd ff04 	bl	800c7a4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800e99c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e99e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e9a0:	e027      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800e9a2:	f107 0318 	add.w	r3, r7, #24
 800e9a6:	4618      	mov	r0, r3
 800e9a8:	f7fe f850 	bl	800ca4c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800e9ac:	69fb      	ldr	r3, [r7, #28]
 800e9ae:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e9b0:	e01f      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800e9b2:	4b2d      	ldr	r3, [pc, #180]	@ (800ea68 <UART_SetConfig+0x934>)
 800e9b4:	681b      	ldr	r3, [r3, #0]
 800e9b6:	f003 0320 	and.w	r3, r3, #32
 800e9ba:	2b00      	cmp	r3, #0
 800e9bc:	d009      	beq.n	800e9d2 <UART_SetConfig+0x89e>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800e9be:	4b2a      	ldr	r3, [pc, #168]	@ (800ea68 <UART_SetConfig+0x934>)
 800e9c0:	681b      	ldr	r3, [r3, #0]
 800e9c2:	08db      	lsrs	r3, r3, #3
 800e9c4:	f003 0303 	and.w	r3, r3, #3
 800e9c8:	4a24      	ldr	r2, [pc, #144]	@ (800ea5c <UART_SetConfig+0x928>)
 800e9ca:	fa22 f303 	lsr.w	r3, r2, r3
 800e9ce:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800e9d0:	e00f      	b.n	800e9f2 <UART_SetConfig+0x8be>
          pclk = (uint32_t) HSI_VALUE;
 800e9d2:	4b22      	ldr	r3, [pc, #136]	@ (800ea5c <UART_SetConfig+0x928>)
 800e9d4:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e9d6:	e00c      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800e9d8:	4b21      	ldr	r3, [pc, #132]	@ (800ea60 <UART_SetConfig+0x92c>)
 800e9da:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e9dc:	e009      	b.n	800e9f2 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800e9de:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800e9e2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800e9e4:	e005      	b.n	800e9f2 <UART_SetConfig+0x8be>
      default:
        pclk = 0U;
 800e9e6:	2300      	movs	r3, #0
 800e9e8:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800e9ea:	2301      	movs	r3, #1
 800e9ec:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800e9f0:	bf00      	nop
    }

    /* USARTDIV must be greater than or equal to 0d16 */
    if (pclk != 0U)
 800e9f2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e9f4:	2b00      	cmp	r3, #0
 800e9f6:	f000 80e7 	beq.w	800ebc8 <UART_SetConfig+0xa94>
    {
      usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800e9fa:	697b      	ldr	r3, [r7, #20]
 800e9fc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800e9fe:	4a19      	ldr	r2, [pc, #100]	@ (800ea64 <UART_SetConfig+0x930>)
 800ea00:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800ea04:	461a      	mov	r2, r3
 800ea06:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ea08:	fbb3 f3f2 	udiv	r3, r3, r2
 800ea0c:	005a      	lsls	r2, r3, #1
 800ea0e:	697b      	ldr	r3, [r7, #20]
 800ea10:	685b      	ldr	r3, [r3, #4]
 800ea12:	085b      	lsrs	r3, r3, #1
 800ea14:	441a      	add	r2, r3
 800ea16:	697b      	ldr	r3, [r7, #20]
 800ea18:	685b      	ldr	r3, [r3, #4]
 800ea1a:	fbb2 f3f3 	udiv	r3, r2, r3
 800ea1e:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800ea20:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ea22:	2b0f      	cmp	r3, #15
 800ea24:	d916      	bls.n	800ea54 <UART_SetConfig+0x920>
 800ea26:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ea28:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800ea2c:	d212      	bcs.n	800ea54 <UART_SetConfig+0x920>
      {
        brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
 800ea2e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ea30:	b29b      	uxth	r3, r3
 800ea32:	f023 030f 	bic.w	r3, r3, #15
 800ea36:	86fb      	strh	r3, [r7, #54]	@ 0x36
        brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 800ea38:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ea3a:	085b      	lsrs	r3, r3, #1
 800ea3c:	b29b      	uxth	r3, r3
 800ea3e:	f003 0307 	and.w	r3, r3, #7
 800ea42:	b29a      	uxth	r2, r3
 800ea44:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 800ea46:	4313      	orrs	r3, r2
 800ea48:	86fb      	strh	r3, [r7, #54]	@ 0x36
        huart->Instance->BRR = brrtemp;
 800ea4a:	697b      	ldr	r3, [r7, #20]
 800ea4c:	681b      	ldr	r3, [r3, #0]
 800ea4e:	8efa      	ldrh	r2, [r7, #54]	@ 0x36
 800ea50:	60da      	str	r2, [r3, #12]
 800ea52:	e0b9      	b.n	800ebc8 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800ea54:	2301      	movs	r3, #1
 800ea56:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800ea5a:	e0b5      	b.n	800ebc8 <UART_SetConfig+0xa94>
 800ea5c:	03d09000 	.word	0x03d09000
 800ea60:	003d0900 	.word	0x003d0900
 800ea64:	08031984 	.word	0x08031984
 800ea68:	58024400 	.word	0x58024400
      }
    }
  }
  else
  {
    switch (clocksource)
 800ea6c:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800ea70:	2b20      	cmp	r3, #32
 800ea72:	dc49      	bgt.n	800eb08 <UART_SetConfig+0x9d4>
 800ea74:	2b00      	cmp	r3, #0
 800ea76:	db7c      	blt.n	800eb72 <UART_SetConfig+0xa3e>
 800ea78:	2b20      	cmp	r3, #32
 800ea7a:	d87a      	bhi.n	800eb72 <UART_SetConfig+0xa3e>
 800ea7c:	a201      	add	r2, pc, #4	@ (adr r2, 800ea84 <UART_SetConfig+0x950>)
 800ea7e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ea82:	bf00      	nop
 800ea84:	0800eb0f 	.word	0x0800eb0f
 800ea88:	0800eb17 	.word	0x0800eb17
 800ea8c:	0800eb73 	.word	0x0800eb73
 800ea90:	0800eb73 	.word	0x0800eb73
 800ea94:	0800eb1f 	.word	0x0800eb1f
 800ea98:	0800eb73 	.word	0x0800eb73
 800ea9c:	0800eb73 	.word	0x0800eb73
 800eaa0:	0800eb73 	.word	0x0800eb73
 800eaa4:	0800eb2f 	.word	0x0800eb2f
 800eaa8:	0800eb73 	.word	0x0800eb73
 800eaac:	0800eb73 	.word	0x0800eb73
 800eab0:	0800eb73 	.word	0x0800eb73
 800eab4:	0800eb73 	.word	0x0800eb73
 800eab8:	0800eb73 	.word	0x0800eb73
 800eabc:	0800eb73 	.word	0x0800eb73
 800eac0:	0800eb73 	.word	0x0800eb73
 800eac4:	0800eb3f 	.word	0x0800eb3f
 800eac8:	0800eb73 	.word	0x0800eb73
 800eacc:	0800eb73 	.word	0x0800eb73
 800ead0:	0800eb73 	.word	0x0800eb73
 800ead4:	0800eb73 	.word	0x0800eb73
 800ead8:	0800eb73 	.word	0x0800eb73
 800eadc:	0800eb73 	.word	0x0800eb73
 800eae0:	0800eb73 	.word	0x0800eb73
 800eae4:	0800eb73 	.word	0x0800eb73
 800eae8:	0800eb73 	.word	0x0800eb73
 800eaec:	0800eb73 	.word	0x0800eb73
 800eaf0:	0800eb73 	.word	0x0800eb73
 800eaf4:	0800eb73 	.word	0x0800eb73
 800eaf8:	0800eb73 	.word	0x0800eb73
 800eafc:	0800eb73 	.word	0x0800eb73
 800eb00:	0800eb73 	.word	0x0800eb73
 800eb04:	0800eb65 	.word	0x0800eb65
 800eb08:	2b40      	cmp	r3, #64	@ 0x40
 800eb0a:	d02e      	beq.n	800eb6a <UART_SetConfig+0xa36>
 800eb0c:	e031      	b.n	800eb72 <UART_SetConfig+0xa3e>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800eb0e:	f7fc fbd7 	bl	800b2c0 <HAL_RCC_GetPCLK1Freq>
 800eb12:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800eb14:	e033      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800eb16:	f7fc fbe9 	bl	800b2ec <HAL_RCC_GetPCLK2Freq>
 800eb1a:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800eb1c:	e02f      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800eb1e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800eb22:	4618      	mov	r0, r3
 800eb24:	f7fd fe3e 	bl	800c7a4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800eb28:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800eb2a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eb2c:	e027      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800eb2e:	f107 0318 	add.w	r3, r7, #24
 800eb32:	4618      	mov	r0, r3
 800eb34:	f7fd ff8a 	bl	800ca4c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800eb38:	69fb      	ldr	r3, [r7, #28]
 800eb3a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eb3c:	e01f      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800eb3e:	4b2d      	ldr	r3, [pc, #180]	@ (800ebf4 <UART_SetConfig+0xac0>)
 800eb40:	681b      	ldr	r3, [r3, #0]
 800eb42:	f003 0320 	and.w	r3, r3, #32
 800eb46:	2b00      	cmp	r3, #0
 800eb48:	d009      	beq.n	800eb5e <UART_SetConfig+0xa2a>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800eb4a:	4b2a      	ldr	r3, [pc, #168]	@ (800ebf4 <UART_SetConfig+0xac0>)
 800eb4c:	681b      	ldr	r3, [r3, #0]
 800eb4e:	08db      	lsrs	r3, r3, #3
 800eb50:	f003 0303 	and.w	r3, r3, #3
 800eb54:	4a28      	ldr	r2, [pc, #160]	@ (800ebf8 <UART_SetConfig+0xac4>)
 800eb56:	fa22 f303 	lsr.w	r3, r2, r3
 800eb5a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800eb5c:	e00f      	b.n	800eb7e <UART_SetConfig+0xa4a>
          pclk = (uint32_t) HSI_VALUE;
 800eb5e:	4b26      	ldr	r3, [pc, #152]	@ (800ebf8 <UART_SetConfig+0xac4>)
 800eb60:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eb62:	e00c      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800eb64:	4b25      	ldr	r3, [pc, #148]	@ (800ebfc <UART_SetConfig+0xac8>)
 800eb66:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eb68:	e009      	b.n	800eb7e <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800eb6a:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800eb6e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eb70:	e005      	b.n	800eb7e <UART_SetConfig+0xa4a>
      default:
        pclk = 0U;
 800eb72:	2300      	movs	r3, #0
 800eb74:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800eb76:	2301      	movs	r3, #1
 800eb78:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800eb7c:	bf00      	nop
    }

    if (pclk != 0U)
 800eb7e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800eb80:	2b00      	cmp	r3, #0
 800eb82:	d021      	beq.n	800ebc8 <UART_SetConfig+0xa94>
    {
      /* USARTDIV must be greater than or equal to 0d16 */
      usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800eb84:	697b      	ldr	r3, [r7, #20]
 800eb86:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800eb88:	4a1d      	ldr	r2, [pc, #116]	@ (800ec00 <UART_SetConfig+0xacc>)
 800eb8a:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800eb8e:	461a      	mov	r2, r3
 800eb90:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800eb92:	fbb3 f2f2 	udiv	r2, r3, r2
 800eb96:	697b      	ldr	r3, [r7, #20]
 800eb98:	685b      	ldr	r3, [r3, #4]
 800eb9a:	085b      	lsrs	r3, r3, #1
 800eb9c:	441a      	add	r2, r3
 800eb9e:	697b      	ldr	r3, [r7, #20]
 800eba0:	685b      	ldr	r3, [r3, #4]
 800eba2:	fbb2 f3f3 	udiv	r3, r2, r3
 800eba6:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800eba8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebaa:	2b0f      	cmp	r3, #15
 800ebac:	d909      	bls.n	800ebc2 <UART_SetConfig+0xa8e>
 800ebae:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebb0:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800ebb4:	d205      	bcs.n	800ebc2 <UART_SetConfig+0xa8e>
      {
        huart->Instance->BRR = (uint16_t)usartdiv;
 800ebb6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebb8:	b29a      	uxth	r2, r3
 800ebba:	697b      	ldr	r3, [r7, #20]
 800ebbc:	681b      	ldr	r3, [r3, #0]
 800ebbe:	60da      	str	r2, [r3, #12]
 800ebc0:	e002      	b.n	800ebc8 <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800ebc2:	2301      	movs	r3, #1
 800ebc4:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
      }
    }
  }

  /* Initialize the number of data to process during RX/TX ISR execution */
  huart->NbTxDataToProcess = 1;
 800ebc8:	697b      	ldr	r3, [r7, #20]
 800ebca:	2201      	movs	r2, #1
 800ebcc:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
  huart->NbRxDataToProcess = 1;
 800ebd0:	697b      	ldr	r3, [r7, #20]
 800ebd2:	2201      	movs	r2, #1
 800ebd4:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /* Clear ISR function pointers */
  huart->RxISR = NULL;
 800ebd8:	697b      	ldr	r3, [r7, #20]
 800ebda:	2200      	movs	r2, #0
 800ebdc:	675a      	str	r2, [r3, #116]	@ 0x74
  huart->TxISR = NULL;
 800ebde:	697b      	ldr	r3, [r7, #20]
 800ebe0:	2200      	movs	r2, #0
 800ebe2:	679a      	str	r2, [r3, #120]	@ 0x78

  return ret;
 800ebe4:	f897 3042 	ldrb.w	r3, [r7, #66]	@ 0x42
}
 800ebe8:	4618      	mov	r0, r3
 800ebea:	3748      	adds	r7, #72	@ 0x48
 800ebec:	46bd      	mov	sp, r7
 800ebee:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800ebf2:	bf00      	nop
 800ebf4:	58024400 	.word	0x58024400
 800ebf8:	03d09000 	.word	0x03d09000
 800ebfc:	003d0900 	.word	0x003d0900
 800ec00:	08031984 	.word	0x08031984

0800ec04 <UART_AdvFeatureConfig>:
  * @brief Configure the UART peripheral advanced features.
  * @param huart UART handle.
  * @retval None
  */
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
 800ec04:	b480      	push	{r7}
 800ec06:	b083      	sub	sp, #12
 800ec08:	af00      	add	r7, sp, #0
 800ec0a:	6078      	str	r0, [r7, #4]
  /* Check whether the set of advanced features to configure is properly set */
  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));

  /* if required, configure RX/TX pins swap */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
 800ec0c:	687b      	ldr	r3, [r7, #4]
 800ec0e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ec10:	f003 0308 	and.w	r3, r3, #8
 800ec14:	2b00      	cmp	r3, #0
 800ec16:	d00a      	beq.n	800ec2e <UART_AdvFeatureConfig+0x2a>
  {
    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
 800ec18:	687b      	ldr	r3, [r7, #4]
 800ec1a:	681b      	ldr	r3, [r3, #0]
 800ec1c:	685b      	ldr	r3, [r3, #4]
 800ec1e:	f423 4100 	bic.w	r1, r3, #32768	@ 0x8000
 800ec22:	687b      	ldr	r3, [r7, #4]
 800ec24:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 800ec26:	687b      	ldr	r3, [r7, #4]
 800ec28:	681b      	ldr	r3, [r3, #0]
 800ec2a:	430a      	orrs	r2, r1
 800ec2c:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure TX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
 800ec2e:	687b      	ldr	r3, [r7, #4]
 800ec30:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ec32:	f003 0301 	and.w	r3, r3, #1
 800ec36:	2b00      	cmp	r3, #0
 800ec38:	d00a      	beq.n	800ec50 <UART_AdvFeatureConfig+0x4c>
  {
    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
 800ec3a:	687b      	ldr	r3, [r7, #4]
 800ec3c:	681b      	ldr	r3, [r3, #0]
 800ec3e:	685b      	ldr	r3, [r3, #4]
 800ec40:	f423 3100 	bic.w	r1, r3, #131072	@ 0x20000
 800ec44:	687b      	ldr	r3, [r7, #4]
 800ec46:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800ec48:	687b      	ldr	r3, [r7, #4]
 800ec4a:	681b      	ldr	r3, [r3, #0]
 800ec4c:	430a      	orrs	r2, r1
 800ec4e:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
 800ec50:	687b      	ldr	r3, [r7, #4]
 800ec52:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ec54:	f003 0302 	and.w	r3, r3, #2
 800ec58:	2b00      	cmp	r3, #0
 800ec5a:	d00a      	beq.n	800ec72 <UART_AdvFeatureConfig+0x6e>
  {
    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
 800ec5c:	687b      	ldr	r3, [r7, #4]
 800ec5e:	681b      	ldr	r3, [r3, #0]
 800ec60:	685b      	ldr	r3, [r3, #4]
 800ec62:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800ec66:	687b      	ldr	r3, [r7, #4]
 800ec68:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 800ec6a:	687b      	ldr	r3, [r7, #4]
 800ec6c:	681b      	ldr	r3, [r3, #0]
 800ec6e:	430a      	orrs	r2, r1
 800ec70:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure data inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
 800ec72:	687b      	ldr	r3, [r7, #4]
 800ec74:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ec76:	f003 0304 	and.w	r3, r3, #4
 800ec7a:	2b00      	cmp	r3, #0
 800ec7c:	d00a      	beq.n	800ec94 <UART_AdvFeatureConfig+0x90>
  {
    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
 800ec7e:	687b      	ldr	r3, [r7, #4]
 800ec80:	681b      	ldr	r3, [r3, #0]
 800ec82:	685b      	ldr	r3, [r3, #4]
 800ec84:	f423 2180 	bic.w	r1, r3, #262144	@ 0x40000
 800ec88:	687b      	ldr	r3, [r7, #4]
 800ec8a:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800ec8c:	687b      	ldr	r3, [r7, #4]
 800ec8e:	681b      	ldr	r3, [r3, #0]
 800ec90:	430a      	orrs	r2, r1
 800ec92:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX overrun detection disabling */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
 800ec94:	687b      	ldr	r3, [r7, #4]
 800ec96:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ec98:	f003 0310 	and.w	r3, r3, #16
 800ec9c:	2b00      	cmp	r3, #0
 800ec9e:	d00a      	beq.n	800ecb6 <UART_AdvFeatureConfig+0xb2>
  {
    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
 800eca0:	687b      	ldr	r3, [r7, #4]
 800eca2:	681b      	ldr	r3, [r3, #0]
 800eca4:	689b      	ldr	r3, [r3, #8]
 800eca6:	f423 5180 	bic.w	r1, r3, #4096	@ 0x1000
 800ecaa:	687b      	ldr	r3, [r7, #4]
 800ecac:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800ecae:	687b      	ldr	r3, [r7, #4]
 800ecb0:	681b      	ldr	r3, [r3, #0]
 800ecb2:	430a      	orrs	r2, r1
 800ecb4:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure DMA disabling on reception error */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
 800ecb6:	687b      	ldr	r3, [r7, #4]
 800ecb8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ecba:	f003 0320 	and.w	r3, r3, #32
 800ecbe:	2b00      	cmp	r3, #0
 800ecc0:	d00a      	beq.n	800ecd8 <UART_AdvFeatureConfig+0xd4>
  {
    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
 800ecc2:	687b      	ldr	r3, [r7, #4]
 800ecc4:	681b      	ldr	r3, [r3, #0]
 800ecc6:	689b      	ldr	r3, [r3, #8]
 800ecc8:	f423 5100 	bic.w	r1, r3, #8192	@ 0x2000
 800eccc:	687b      	ldr	r3, [r7, #4]
 800ecce:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
 800ecd0:	687b      	ldr	r3, [r7, #4]
 800ecd2:	681b      	ldr	r3, [r3, #0]
 800ecd4:	430a      	orrs	r2, r1
 800ecd6:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure auto Baud rate detection scheme */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
 800ecd8:	687b      	ldr	r3, [r7, #4]
 800ecda:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ecdc:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800ece0:	2b00      	cmp	r3, #0
 800ece2:	d01a      	beq.n	800ed1a <UART_AdvFeatureConfig+0x116>
  {
    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
 800ece4:	687b      	ldr	r3, [r7, #4]
 800ece6:	681b      	ldr	r3, [r3, #0]
 800ece8:	685b      	ldr	r3, [r3, #4]
 800ecea:	f423 1180 	bic.w	r1, r3, #1048576	@ 0x100000
 800ecee:	687b      	ldr	r3, [r7, #4]
 800ecf0:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800ecf2:	687b      	ldr	r3, [r7, #4]
 800ecf4:	681b      	ldr	r3, [r3, #0]
 800ecf6:	430a      	orrs	r2, r1
 800ecf8:	605a      	str	r2, [r3, #4]
    /* set auto Baudrate detection parameters if detection is enabled */
    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
 800ecfa:	687b      	ldr	r3, [r7, #4]
 800ecfc:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800ecfe:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800ed02:	d10a      	bne.n	800ed1a <UART_AdvFeatureConfig+0x116>
    {
      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
 800ed04:	687b      	ldr	r3, [r7, #4]
 800ed06:	681b      	ldr	r3, [r3, #0]
 800ed08:	685b      	ldr	r3, [r3, #4]
 800ed0a:	f423 01c0 	bic.w	r1, r3, #6291456	@ 0x600000
 800ed0e:	687b      	ldr	r3, [r7, #4]
 800ed10:	6c9a      	ldr	r2, [r3, #72]	@ 0x48
 800ed12:	687b      	ldr	r3, [r7, #4]
 800ed14:	681b      	ldr	r3, [r3, #0]
 800ed16:	430a      	orrs	r2, r1
 800ed18:	605a      	str	r2, [r3, #4]
    }
  }

  /* if required, configure MSB first on communication line */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
 800ed1a:	687b      	ldr	r3, [r7, #4]
 800ed1c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ed1e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800ed22:	2b00      	cmp	r3, #0
 800ed24:	d00a      	beq.n	800ed3c <UART_AdvFeatureConfig+0x138>
  {
    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
 800ed26:	687b      	ldr	r3, [r7, #4]
 800ed28:	681b      	ldr	r3, [r3, #0]
 800ed2a:	685b      	ldr	r3, [r3, #4]
 800ed2c:	f423 2100 	bic.w	r1, r3, #524288	@ 0x80000
 800ed30:	687b      	ldr	r3, [r7, #4]
 800ed32:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 800ed34:	687b      	ldr	r3, [r7, #4]
 800ed36:	681b      	ldr	r3, [r3, #0]
 800ed38:	430a      	orrs	r2, r1
 800ed3a:	605a      	str	r2, [r3, #4]
  }
}
 800ed3c:	bf00      	nop
 800ed3e:	370c      	adds	r7, #12
 800ed40:	46bd      	mov	sp, r7
 800ed42:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ed46:	4770      	bx	lr

0800ed48 <UART_CheckIdleState>:
  * @brief Check the UART Idle State.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
 800ed48:	b580      	push	{r7, lr}
 800ed4a:	b098      	sub	sp, #96	@ 0x60
 800ed4c:	af02      	add	r7, sp, #8
 800ed4e:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Initialize the UART ErrorCode */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800ed50:	687b      	ldr	r3, [r7, #4]
 800ed52:	2200      	movs	r2, #0
 800ed54:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /* Init tickstart for timeout management */
  tickstart = HAL_GetTick();
 800ed58:	f7f6 fc9c 	bl	8005694 <HAL_GetTick>
 800ed5c:	6578      	str	r0, [r7, #84]	@ 0x54

  /* Check if the Transmitter is enabled */
  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
 800ed5e:	687b      	ldr	r3, [r7, #4]
 800ed60:	681b      	ldr	r3, [r3, #0]
 800ed62:	681b      	ldr	r3, [r3, #0]
 800ed64:	f003 0308 	and.w	r3, r3, #8
 800ed68:	2b08      	cmp	r3, #8
 800ed6a:	d12f      	bne.n	800edcc <UART_CheckIdleState+0x84>
  {
    /* Wait until TEACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800ed6c:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800ed70:	9300      	str	r3, [sp, #0]
 800ed72:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800ed74:	2200      	movs	r2, #0
 800ed76:	f44f 1100 	mov.w	r1, #2097152	@ 0x200000
 800ed7a:	6878      	ldr	r0, [r7, #4]
 800ed7c:	f000 f88e 	bl	800ee9c <UART_WaitOnFlagUntilTimeout>
 800ed80:	4603      	mov	r3, r0
 800ed82:	2b00      	cmp	r3, #0
 800ed84:	d022      	beq.n	800edcc <UART_CheckIdleState+0x84>
    {
      /* Disable TXE interrupt for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
 800ed86:	687b      	ldr	r3, [r7, #4]
 800ed88:	681b      	ldr	r3, [r3, #0]
 800ed8a:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ed8c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed8e:	e853 3f00 	ldrex	r3, [r3]
 800ed92:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800ed94:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ed96:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800ed9a:	653b      	str	r3, [r7, #80]	@ 0x50
 800ed9c:	687b      	ldr	r3, [r7, #4]
 800ed9e:	681b      	ldr	r3, [r3, #0]
 800eda0:	461a      	mov	r2, r3
 800eda2:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800eda4:	647b      	str	r3, [r7, #68]	@ 0x44
 800eda6:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800eda8:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800edaa:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800edac:	e841 2300 	strex	r3, r2, [r1]
 800edb0:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800edb2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800edb4:	2b00      	cmp	r3, #0
 800edb6:	d1e6      	bne.n	800ed86 <UART_CheckIdleState+0x3e>

      huart->gState = HAL_UART_STATE_READY;
 800edb8:	687b      	ldr	r3, [r7, #4]
 800edba:	2220      	movs	r2, #32
 800edbc:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      __HAL_UNLOCK(huart);
 800edc0:	687b      	ldr	r3, [r7, #4]
 800edc2:	2200      	movs	r2, #0
 800edc4:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800edc8:	2303      	movs	r3, #3
 800edca:	e063      	b.n	800ee94 <UART_CheckIdleState+0x14c>
    }
  }

  /* Check if the Receiver is enabled */
  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
 800edcc:	687b      	ldr	r3, [r7, #4]
 800edce:	681b      	ldr	r3, [r3, #0]
 800edd0:	681b      	ldr	r3, [r3, #0]
 800edd2:	f003 0304 	and.w	r3, r3, #4
 800edd6:	2b04      	cmp	r3, #4
 800edd8:	d149      	bne.n	800ee6e <UART_CheckIdleState+0x126>
  {
    /* Wait until REACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800edda:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800edde:	9300      	str	r3, [sp, #0]
 800ede0:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800ede2:	2200      	movs	r2, #0
 800ede4:	f44f 0180 	mov.w	r1, #4194304	@ 0x400000
 800ede8:	6878      	ldr	r0, [r7, #4]
 800edea:	f000 f857 	bl	800ee9c <UART_WaitOnFlagUntilTimeout>
 800edee:	4603      	mov	r3, r0
 800edf0:	2b00      	cmp	r3, #0
 800edf2:	d03c      	beq.n	800ee6e <UART_CheckIdleState+0x126>
    {
      /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
      interrupts for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800edf4:	687b      	ldr	r3, [r7, #4]
 800edf6:	681b      	ldr	r3, [r3, #0]
 800edf8:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800edfa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800edfc:	e853 3f00 	ldrex	r3, [r3]
 800ee00:	623b      	str	r3, [r7, #32]
   return(result);
 800ee02:	6a3b      	ldr	r3, [r7, #32]
 800ee04:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800ee08:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800ee0a:	687b      	ldr	r3, [r7, #4]
 800ee0c:	681b      	ldr	r3, [r3, #0]
 800ee0e:	461a      	mov	r2, r3
 800ee10:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ee12:	633b      	str	r3, [r7, #48]	@ 0x30
 800ee14:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ee16:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800ee18:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800ee1a:	e841 2300 	strex	r3, r2, [r1]
 800ee1e:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800ee20:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ee22:	2b00      	cmp	r3, #0
 800ee24:	d1e6      	bne.n	800edf4 <UART_CheckIdleState+0xac>
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800ee26:	687b      	ldr	r3, [r7, #4]
 800ee28:	681b      	ldr	r3, [r3, #0]
 800ee2a:	3308      	adds	r3, #8
 800ee2c:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ee2e:	693b      	ldr	r3, [r7, #16]
 800ee30:	e853 3f00 	ldrex	r3, [r3]
 800ee34:	60fb      	str	r3, [r7, #12]
   return(result);
 800ee36:	68fb      	ldr	r3, [r7, #12]
 800ee38:	f023 0301 	bic.w	r3, r3, #1
 800ee3c:	64bb      	str	r3, [r7, #72]	@ 0x48
 800ee3e:	687b      	ldr	r3, [r7, #4]
 800ee40:	681b      	ldr	r3, [r3, #0]
 800ee42:	3308      	adds	r3, #8
 800ee44:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800ee46:	61fa      	str	r2, [r7, #28]
 800ee48:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ee4a:	69b9      	ldr	r1, [r7, #24]
 800ee4c:	69fa      	ldr	r2, [r7, #28]
 800ee4e:	e841 2300 	strex	r3, r2, [r1]
 800ee52:	617b      	str	r3, [r7, #20]
   return(result);
 800ee54:	697b      	ldr	r3, [r7, #20]
 800ee56:	2b00      	cmp	r3, #0
 800ee58:	d1e5      	bne.n	800ee26 <UART_CheckIdleState+0xde>

      huart->RxState = HAL_UART_STATE_READY;
 800ee5a:	687b      	ldr	r3, [r7, #4]
 800ee5c:	2220      	movs	r2, #32
 800ee5e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      __HAL_UNLOCK(huart);
 800ee62:	687b      	ldr	r3, [r7, #4]
 800ee64:	2200      	movs	r2, #0
 800ee66:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800ee6a:	2303      	movs	r3, #3
 800ee6c:	e012      	b.n	800ee94 <UART_CheckIdleState+0x14c>
    }
  }

  /* Initialize the UART State */
  huart->gState = HAL_UART_STATE_READY;
 800ee6e:	687b      	ldr	r3, [r7, #4]
 800ee70:	2220      	movs	r2, #32
 800ee72:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  huart->RxState = HAL_UART_STATE_READY;
 800ee76:	687b      	ldr	r3, [r7, #4]
 800ee78:	2220      	movs	r2, #32
 800ee7a:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800ee7e:	687b      	ldr	r3, [r7, #4]
 800ee80:	2200      	movs	r2, #0
 800ee82:	66da      	str	r2, [r3, #108]	@ 0x6c
  huart->RxEventType = HAL_UART_RXEVENT_TC;
 800ee84:	687b      	ldr	r3, [r7, #4]
 800ee86:	2200      	movs	r2, #0
 800ee88:	671a      	str	r2, [r3, #112]	@ 0x70

  __HAL_UNLOCK(huart);
 800ee8a:	687b      	ldr	r3, [r7, #4]
 800ee8c:	2200      	movs	r2, #0
 800ee8e:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800ee92:	2300      	movs	r3, #0
}
 800ee94:	4618      	mov	r0, r3
 800ee96:	3758      	adds	r7, #88	@ 0x58
 800ee98:	46bd      	mov	sp, r7
 800ee9a:	bd80      	pop	{r7, pc}

0800ee9c <UART_WaitOnFlagUntilTimeout>:
  * @param Timeout   Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                              uint32_t Tickstart, uint32_t Timeout)
{
 800ee9c:	b580      	push	{r7, lr}
 800ee9e:	b084      	sub	sp, #16
 800eea0:	af00      	add	r7, sp, #0
 800eea2:	60f8      	str	r0, [r7, #12]
 800eea4:	60b9      	str	r1, [r7, #8]
 800eea6:	603b      	str	r3, [r7, #0]
 800eea8:	4613      	mov	r3, r2
 800eeaa:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800eeac:	e04f      	b.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 800eeae:	69bb      	ldr	r3, [r7, #24]
 800eeb0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 800eeb4:	d04b      	beq.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
    {
      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
 800eeb6:	f7f6 fbed 	bl	8005694 <HAL_GetTick>
 800eeba:	4602      	mov	r2, r0
 800eebc:	683b      	ldr	r3, [r7, #0]
 800eebe:	1ad3      	subs	r3, r2, r3
 800eec0:	69ba      	ldr	r2, [r7, #24]
 800eec2:	429a      	cmp	r2, r3
 800eec4:	d302      	bcc.n	800eecc <UART_WaitOnFlagUntilTimeout+0x30>
 800eec6:	69bb      	ldr	r3, [r7, #24]
 800eec8:	2b00      	cmp	r3, #0
 800eeca:	d101      	bne.n	800eed0 <UART_WaitOnFlagUntilTimeout+0x34>
      {

        return HAL_TIMEOUT;
 800eecc:	2303      	movs	r3, #3
 800eece:	e04e      	b.n	800ef6e <UART_WaitOnFlagUntilTimeout+0xd2>
      }

      if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
 800eed0:	68fb      	ldr	r3, [r7, #12]
 800eed2:	681b      	ldr	r3, [r3, #0]
 800eed4:	681b      	ldr	r3, [r3, #0]
 800eed6:	f003 0304 	and.w	r3, r3, #4
 800eeda:	2b00      	cmp	r3, #0
 800eedc:	d037      	beq.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
 800eede:	68bb      	ldr	r3, [r7, #8]
 800eee0:	2b80      	cmp	r3, #128	@ 0x80
 800eee2:	d034      	beq.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
 800eee4:	68bb      	ldr	r3, [r7, #8]
 800eee6:	2b40      	cmp	r3, #64	@ 0x40
 800eee8:	d031      	beq.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
      {
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
 800eeea:	68fb      	ldr	r3, [r7, #12]
 800eeec:	681b      	ldr	r3, [r3, #0]
 800eeee:	69db      	ldr	r3, [r3, #28]
 800eef0:	f003 0308 	and.w	r3, r3, #8
 800eef4:	2b08      	cmp	r3, #8
 800eef6:	d110      	bne.n	800ef1a <UART_WaitOnFlagUntilTimeout+0x7e>
        {
          /* Clear Overrun Error flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800eef8:	68fb      	ldr	r3, [r7, #12]
 800eefa:	681b      	ldr	r3, [r3, #0]
 800eefc:	2208      	movs	r2, #8
 800eefe:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800ef00:	68f8      	ldr	r0, [r7, #12]
 800ef02:	f000 f95b 	bl	800f1bc <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_ORE;
 800ef06:	68fb      	ldr	r3, [r7, #12]
 800ef08:	2208      	movs	r2, #8
 800ef0a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800ef0e:	68fb      	ldr	r3, [r7, #12]
 800ef10:	2200      	movs	r2, #0
 800ef12:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_ERROR;
 800ef16:	2301      	movs	r3, #1
 800ef18:	e029      	b.n	800ef6e <UART_WaitOnFlagUntilTimeout+0xd2>
        }
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
 800ef1a:	68fb      	ldr	r3, [r7, #12]
 800ef1c:	681b      	ldr	r3, [r3, #0]
 800ef1e:	69db      	ldr	r3, [r3, #28]
 800ef20:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800ef24:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800ef28:	d111      	bne.n	800ef4e <UART_WaitOnFlagUntilTimeout+0xb2>
        {
          /* Clear Receiver Timeout flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800ef2a:	68fb      	ldr	r3, [r7, #12]
 800ef2c:	681b      	ldr	r3, [r3, #0]
 800ef2e:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800ef32:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800ef34:	68f8      	ldr	r0, [r7, #12]
 800ef36:	f000 f941 	bl	800f1bc <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_RTO;
 800ef3a:	68fb      	ldr	r3, [r7, #12]
 800ef3c:	2220      	movs	r2, #32
 800ef3e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800ef42:	68fb      	ldr	r3, [r7, #12]
 800ef44:	2200      	movs	r2, #0
 800ef46:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_TIMEOUT;
 800ef4a:	2303      	movs	r3, #3
 800ef4c:	e00f      	b.n	800ef6e <UART_WaitOnFlagUntilTimeout+0xd2>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800ef4e:	68fb      	ldr	r3, [r7, #12]
 800ef50:	681b      	ldr	r3, [r3, #0]
 800ef52:	69da      	ldr	r2, [r3, #28]
 800ef54:	68bb      	ldr	r3, [r7, #8]
 800ef56:	4013      	ands	r3, r2
 800ef58:	68ba      	ldr	r2, [r7, #8]
 800ef5a:	429a      	cmp	r2, r3
 800ef5c:	bf0c      	ite	eq
 800ef5e:	2301      	moveq	r3, #1
 800ef60:	2300      	movne	r3, #0
 800ef62:	b2db      	uxtb	r3, r3
 800ef64:	461a      	mov	r2, r3
 800ef66:	79fb      	ldrb	r3, [r7, #7]
 800ef68:	429a      	cmp	r2, r3
 800ef6a:	d0a0      	beq.n	800eeae <UART_WaitOnFlagUntilTimeout+0x12>
        }
      }
    }
  }
  return HAL_OK;
 800ef6c:	2300      	movs	r3, #0
}
 800ef6e:	4618      	mov	r0, r3
 800ef70:	3710      	adds	r7, #16
 800ef72:	46bd      	mov	sp, r7
 800ef74:	bd80      	pop	{r7, pc}
	...

0800ef78 <UART_Start_Receive_IT>:
  * @param  pData Pointer to data buffer (u8 or u16 data elements).
  * @param  Size  Amount of data elements (u8 or u16) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800ef78:	b480      	push	{r7}
 800ef7a:	b0a3      	sub	sp, #140	@ 0x8c
 800ef7c:	af00      	add	r7, sp, #0
 800ef7e:	60f8      	str	r0, [r7, #12]
 800ef80:	60b9      	str	r1, [r7, #8]
 800ef82:	4613      	mov	r3, r2
 800ef84:	80fb      	strh	r3, [r7, #6]
  huart->pRxBuffPtr  = pData;
 800ef86:	68fb      	ldr	r3, [r7, #12]
 800ef88:	68ba      	ldr	r2, [r7, #8]
 800ef8a:	659a      	str	r2, [r3, #88]	@ 0x58
  huart->RxXferSize  = Size;
 800ef8c:	68fb      	ldr	r3, [r7, #12]
 800ef8e:	88fa      	ldrh	r2, [r7, #6]
 800ef90:	f8a3 205c 	strh.w	r2, [r3, #92]	@ 0x5c
  huart->RxXferCount = Size;
 800ef94:	68fb      	ldr	r3, [r7, #12]
 800ef96:	88fa      	ldrh	r2, [r7, #6]
 800ef98:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->RxISR       = NULL;
 800ef9c:	68fb      	ldr	r3, [r7, #12]
 800ef9e:	2200      	movs	r2, #0
 800efa0:	675a      	str	r2, [r3, #116]	@ 0x74

  /* Computation of UART mask to apply to RDR register */
  UART_MASK_COMPUTATION(huart);
 800efa2:	68fb      	ldr	r3, [r7, #12]
 800efa4:	689b      	ldr	r3, [r3, #8]
 800efa6:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800efaa:	d10e      	bne.n	800efca <UART_Start_Receive_IT+0x52>
 800efac:	68fb      	ldr	r3, [r7, #12]
 800efae:	691b      	ldr	r3, [r3, #16]
 800efb0:	2b00      	cmp	r3, #0
 800efb2:	d105      	bne.n	800efc0 <UART_Start_Receive_IT+0x48>
 800efb4:	68fb      	ldr	r3, [r7, #12]
 800efb6:	f240 12ff 	movw	r2, #511	@ 0x1ff
 800efba:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800efbe:	e02d      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800efc0:	68fb      	ldr	r3, [r7, #12]
 800efc2:	22ff      	movs	r2, #255	@ 0xff
 800efc4:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800efc8:	e028      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800efca:	68fb      	ldr	r3, [r7, #12]
 800efcc:	689b      	ldr	r3, [r3, #8]
 800efce:	2b00      	cmp	r3, #0
 800efd0:	d10d      	bne.n	800efee <UART_Start_Receive_IT+0x76>
 800efd2:	68fb      	ldr	r3, [r7, #12]
 800efd4:	691b      	ldr	r3, [r3, #16]
 800efd6:	2b00      	cmp	r3, #0
 800efd8:	d104      	bne.n	800efe4 <UART_Start_Receive_IT+0x6c>
 800efda:	68fb      	ldr	r3, [r7, #12]
 800efdc:	22ff      	movs	r2, #255	@ 0xff
 800efde:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800efe2:	e01b      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800efe4:	68fb      	ldr	r3, [r7, #12]
 800efe6:	227f      	movs	r2, #127	@ 0x7f
 800efe8:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800efec:	e016      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800efee:	68fb      	ldr	r3, [r7, #12]
 800eff0:	689b      	ldr	r3, [r3, #8]
 800eff2:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800eff6:	d10d      	bne.n	800f014 <UART_Start_Receive_IT+0x9c>
 800eff8:	68fb      	ldr	r3, [r7, #12]
 800effa:	691b      	ldr	r3, [r3, #16]
 800effc:	2b00      	cmp	r3, #0
 800effe:	d104      	bne.n	800f00a <UART_Start_Receive_IT+0x92>
 800f000:	68fb      	ldr	r3, [r7, #12]
 800f002:	227f      	movs	r2, #127	@ 0x7f
 800f004:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f008:	e008      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800f00a:	68fb      	ldr	r3, [r7, #12]
 800f00c:	223f      	movs	r2, #63	@ 0x3f
 800f00e:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f012:	e003      	b.n	800f01c <UART_Start_Receive_IT+0xa4>
 800f014:	68fb      	ldr	r3, [r7, #12]
 800f016:	2200      	movs	r2, #0
 800f018:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60

  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f01c:	68fb      	ldr	r3, [r7, #12]
 800f01e:	2200      	movs	r2, #0
 800f020:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  huart->RxState = HAL_UART_STATE_BUSY_RX;
 800f024:	68fb      	ldr	r3, [r7, #12]
 800f026:	2222      	movs	r2, #34	@ 0x22
 800f028:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f02c:	68fb      	ldr	r3, [r7, #12]
 800f02e:	681b      	ldr	r3, [r3, #0]
 800f030:	3308      	adds	r3, #8
 800f032:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f034:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f036:	e853 3f00 	ldrex	r3, [r3]
 800f03a:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800f03c:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f03e:	f043 0301 	orr.w	r3, r3, #1
 800f042:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f046:	68fb      	ldr	r3, [r7, #12]
 800f048:	681b      	ldr	r3, [r3, #0]
 800f04a:	3308      	adds	r3, #8
 800f04c:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800f050:	673a      	str	r2, [r7, #112]	@ 0x70
 800f052:	66fb      	str	r3, [r7, #108]	@ 0x6c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f054:	6ef9      	ldr	r1, [r7, #108]	@ 0x6c
 800f056:	6f3a      	ldr	r2, [r7, #112]	@ 0x70
 800f058:	e841 2300 	strex	r3, r2, [r1]
 800f05c:	66bb      	str	r3, [r7, #104]	@ 0x68
   return(result);
 800f05e:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f060:	2b00      	cmp	r3, #0
 800f062:	d1e3      	bne.n	800f02c <UART_Start_Receive_IT+0xb4>

  /* Configure Rx interrupt processing */
  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
 800f064:	68fb      	ldr	r3, [r7, #12]
 800f066:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800f068:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800f06c:	d14f      	bne.n	800f10e <UART_Start_Receive_IT+0x196>
 800f06e:	68fb      	ldr	r3, [r7, #12]
 800f070:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f074:	88fa      	ldrh	r2, [r7, #6]
 800f076:	429a      	cmp	r2, r3
 800f078:	d349      	bcc.n	800f10e <UART_Start_Receive_IT+0x196>
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800f07a:	68fb      	ldr	r3, [r7, #12]
 800f07c:	689b      	ldr	r3, [r3, #8]
 800f07e:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800f082:	d107      	bne.n	800f094 <UART_Start_Receive_IT+0x11c>
 800f084:	68fb      	ldr	r3, [r7, #12]
 800f086:	691b      	ldr	r3, [r3, #16]
 800f088:	2b00      	cmp	r3, #0
 800f08a:	d103      	bne.n	800f094 <UART_Start_Receive_IT+0x11c>
    {
      huart->RxISR = UART_RxISR_16BIT_FIFOEN;
 800f08c:	68fb      	ldr	r3, [r7, #12]
 800f08e:	4a47      	ldr	r2, [pc, #284]	@ (800f1ac <UART_Start_Receive_IT+0x234>)
 800f090:	675a      	str	r2, [r3, #116]	@ 0x74
 800f092:	e002      	b.n	800f09a <UART_Start_Receive_IT+0x122>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT_FIFOEN;
 800f094:	68fb      	ldr	r3, [r7, #12]
 800f096:	4a46      	ldr	r2, [pc, #280]	@ (800f1b0 <UART_Start_Receive_IT+0x238>)
 800f098:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800f09a:	68fb      	ldr	r3, [r7, #12]
 800f09c:	691b      	ldr	r3, [r3, #16]
 800f09e:	2b00      	cmp	r3, #0
 800f0a0:	d01a      	beq.n	800f0d8 <UART_Start_Receive_IT+0x160>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f0a2:	68fb      	ldr	r3, [r7, #12]
 800f0a4:	681b      	ldr	r3, [r3, #0]
 800f0a6:	653b      	str	r3, [r7, #80]	@ 0x50
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0a8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f0aa:	e853 3f00 	ldrex	r3, [r3]
 800f0ae:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f0b0:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f0b2:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800f0b6:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f0ba:	68fb      	ldr	r3, [r7, #12]
 800f0bc:	681b      	ldr	r3, [r3, #0]
 800f0be:	461a      	mov	r2, r3
 800f0c0:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800f0c4:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f0c6:	65ba      	str	r2, [r7, #88]	@ 0x58
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f0c8:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800f0ca:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800f0cc:	e841 2300 	strex	r3, r2, [r1]
 800f0d0:	657b      	str	r3, [r7, #84]	@ 0x54
   return(result);
 800f0d2:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800f0d4:	2b00      	cmp	r3, #0
 800f0d6:	d1e4      	bne.n	800f0a2 <UART_Start_Receive_IT+0x12a>
    }
    ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f0d8:	68fb      	ldr	r3, [r7, #12]
 800f0da:	681b      	ldr	r3, [r3, #0]
 800f0dc:	3308      	adds	r3, #8
 800f0de:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0e0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f0e2:	e853 3f00 	ldrex	r3, [r3]
 800f0e6:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f0e8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f0ea:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800f0ee:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800f0f0:	68fb      	ldr	r3, [r7, #12]
 800f0f2:	681b      	ldr	r3, [r3, #0]
 800f0f4:	3308      	adds	r3, #8
 800f0f6:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800f0f8:	64ba      	str	r2, [r7, #72]	@ 0x48
 800f0fa:	647b      	str	r3, [r7, #68]	@ 0x44
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f0fc:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800f0fe:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800f100:	e841 2300 	strex	r3, r2, [r1]
 800f104:	643b      	str	r3, [r7, #64]	@ 0x40
   return(result);
 800f106:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f108:	2b00      	cmp	r3, #0
 800f10a:	d1e5      	bne.n	800f0d8 <UART_Start_Receive_IT+0x160>
 800f10c:	e046      	b.n	800f19c <UART_Start_Receive_IT+0x224>
  }
  else
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800f10e:	68fb      	ldr	r3, [r7, #12]
 800f110:	689b      	ldr	r3, [r3, #8]
 800f112:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800f116:	d107      	bne.n	800f128 <UART_Start_Receive_IT+0x1b0>
 800f118:	68fb      	ldr	r3, [r7, #12]
 800f11a:	691b      	ldr	r3, [r3, #16]
 800f11c:	2b00      	cmp	r3, #0
 800f11e:	d103      	bne.n	800f128 <UART_Start_Receive_IT+0x1b0>
    {
      huart->RxISR = UART_RxISR_16BIT;
 800f120:	68fb      	ldr	r3, [r7, #12]
 800f122:	4a24      	ldr	r2, [pc, #144]	@ (800f1b4 <UART_Start_Receive_IT+0x23c>)
 800f124:	675a      	str	r2, [r3, #116]	@ 0x74
 800f126:	e002      	b.n	800f12e <UART_Start_Receive_IT+0x1b6>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT;
 800f128:	68fb      	ldr	r3, [r7, #12]
 800f12a:	4a23      	ldr	r2, [pc, #140]	@ (800f1b8 <UART_Start_Receive_IT+0x240>)
 800f12c:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800f12e:	68fb      	ldr	r3, [r7, #12]
 800f130:	691b      	ldr	r3, [r3, #16]
 800f132:	2b00      	cmp	r3, #0
 800f134:	d019      	beq.n	800f16a <UART_Start_Receive_IT+0x1f2>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
 800f136:	68fb      	ldr	r3, [r7, #12]
 800f138:	681b      	ldr	r3, [r3, #0]
 800f13a:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f13c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f13e:	e853 3f00 	ldrex	r3, [r3]
 800f142:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f144:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f146:	f443 7390 	orr.w	r3, r3, #288	@ 0x120
 800f14a:	677b      	str	r3, [r7, #116]	@ 0x74
 800f14c:	68fb      	ldr	r3, [r7, #12]
 800f14e:	681b      	ldr	r3, [r3, #0]
 800f150:	461a      	mov	r2, r3
 800f152:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f154:	637b      	str	r3, [r7, #52]	@ 0x34
 800f156:	633a      	str	r2, [r7, #48]	@ 0x30
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f158:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800f15a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800f15c:	e841 2300 	strex	r3, r2, [r1]
 800f160:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800f162:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800f164:	2b00      	cmp	r3, #0
 800f166:	d1e6      	bne.n	800f136 <UART_Start_Receive_IT+0x1be>
 800f168:	e018      	b.n	800f19c <UART_Start_Receive_IT+0x224>
    }
    else
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f16a:	68fb      	ldr	r3, [r7, #12]
 800f16c:	681b      	ldr	r3, [r3, #0]
 800f16e:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f170:	697b      	ldr	r3, [r7, #20]
 800f172:	e853 3f00 	ldrex	r3, [r3]
 800f176:	613b      	str	r3, [r7, #16]
   return(result);
 800f178:	693b      	ldr	r3, [r7, #16]
 800f17a:	f043 0320 	orr.w	r3, r3, #32
 800f17e:	67bb      	str	r3, [r7, #120]	@ 0x78
 800f180:	68fb      	ldr	r3, [r7, #12]
 800f182:	681b      	ldr	r3, [r3, #0]
 800f184:	461a      	mov	r2, r3
 800f186:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800f188:	623b      	str	r3, [r7, #32]
 800f18a:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f18c:	69f9      	ldr	r1, [r7, #28]
 800f18e:	6a3a      	ldr	r2, [r7, #32]
 800f190:	e841 2300 	strex	r3, r2, [r1]
 800f194:	61bb      	str	r3, [r7, #24]
   return(result);
 800f196:	69bb      	ldr	r3, [r7, #24]
 800f198:	2b00      	cmp	r3, #0
 800f19a:	d1e6      	bne.n	800f16a <UART_Start_Receive_IT+0x1f2>
    }
  }
  return HAL_OK;
 800f19c:	2300      	movs	r3, #0
}
 800f19e:	4618      	mov	r0, r3
 800f1a0:	378c      	adds	r7, #140	@ 0x8c
 800f1a2:	46bd      	mov	sp, r7
 800f1a4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f1a8:	4770      	bx	lr
 800f1aa:	bf00      	nop
 800f1ac:	0800fd21 	.word	0x0800fd21
 800f1b0:	0800f9c1 	.word	0x0800f9c1
 800f1b4:	0800f809 	.word	0x0800f809
 800f1b8:	0800f651 	.word	0x0800f651

0800f1bc <UART_EndRxTransfer>:
  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
  * @param  huart UART handle.
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
 800f1bc:	b480      	push	{r7}
 800f1be:	b095      	sub	sp, #84	@ 0x54
 800f1c0:	af00      	add	r7, sp, #0
 800f1c2:	6078      	str	r0, [r7, #4]
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f1c4:	687b      	ldr	r3, [r7, #4]
 800f1c6:	681b      	ldr	r3, [r3, #0]
 800f1c8:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f1ca:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f1cc:	e853 3f00 	ldrex	r3, [r3]
 800f1d0:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f1d2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f1d4:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f1d8:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800f1da:	687b      	ldr	r3, [r7, #4]
 800f1dc:	681b      	ldr	r3, [r3, #0]
 800f1de:	461a      	mov	r2, r3
 800f1e0:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f1e2:	643b      	str	r3, [r7, #64]	@ 0x40
 800f1e4:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f1e6:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f1e8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f1ea:	e841 2300 	strex	r3, r2, [r1]
 800f1ee:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f1f0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f1f2:	2b00      	cmp	r3, #0
 800f1f4:	d1e6      	bne.n	800f1c4 <UART_EndRxTransfer+0x8>
  ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f1f6:	687b      	ldr	r3, [r7, #4]
 800f1f8:	681b      	ldr	r3, [r3, #0]
 800f1fa:	3308      	adds	r3, #8
 800f1fc:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f1fe:	6a3b      	ldr	r3, [r7, #32]
 800f200:	e853 3f00 	ldrex	r3, [r3]
 800f204:	61fb      	str	r3, [r7, #28]
   return(result);
 800f206:	69fa      	ldr	r2, [r7, #28]
 800f208:	4b1e      	ldr	r3, [pc, #120]	@ (800f284 <UART_EndRxTransfer+0xc8>)
 800f20a:	4013      	ands	r3, r2
 800f20c:	64bb      	str	r3, [r7, #72]	@ 0x48
 800f20e:	687b      	ldr	r3, [r7, #4]
 800f210:	681b      	ldr	r3, [r3, #0]
 800f212:	3308      	adds	r3, #8
 800f214:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800f216:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f218:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f21a:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f21c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f21e:	e841 2300 	strex	r3, r2, [r1]
 800f222:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f224:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f226:	2b00      	cmp	r3, #0
 800f228:	d1e5      	bne.n	800f1f6 <UART_EndRxTransfer+0x3a>

  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f22a:	687b      	ldr	r3, [r7, #4]
 800f22c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f22e:	2b01      	cmp	r3, #1
 800f230:	d118      	bne.n	800f264 <UART_EndRxTransfer+0xa8>
  {
    ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f232:	687b      	ldr	r3, [r7, #4]
 800f234:	681b      	ldr	r3, [r3, #0]
 800f236:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f238:	68fb      	ldr	r3, [r7, #12]
 800f23a:	e853 3f00 	ldrex	r3, [r3]
 800f23e:	60bb      	str	r3, [r7, #8]
   return(result);
 800f240:	68bb      	ldr	r3, [r7, #8]
 800f242:	f023 0310 	bic.w	r3, r3, #16
 800f246:	647b      	str	r3, [r7, #68]	@ 0x44
 800f248:	687b      	ldr	r3, [r7, #4]
 800f24a:	681b      	ldr	r3, [r3, #0]
 800f24c:	461a      	mov	r2, r3
 800f24e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f250:	61bb      	str	r3, [r7, #24]
 800f252:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f254:	6979      	ldr	r1, [r7, #20]
 800f256:	69ba      	ldr	r2, [r7, #24]
 800f258:	e841 2300 	strex	r3, r2, [r1]
 800f25c:	613b      	str	r3, [r7, #16]
   return(result);
 800f25e:	693b      	ldr	r3, [r7, #16]
 800f260:	2b00      	cmp	r3, #0
 800f262:	d1e6      	bne.n	800f232 <UART_EndRxTransfer+0x76>
  }

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800f264:	687b      	ldr	r3, [r7, #4]
 800f266:	2220      	movs	r2, #32
 800f268:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f26c:	687b      	ldr	r3, [r7, #4]
 800f26e:	2200      	movs	r2, #0
 800f270:	66da      	str	r2, [r3, #108]	@ 0x6c

  /* Reset RxIsr function pointer */
  huart->RxISR = NULL;
 800f272:	687b      	ldr	r3, [r7, #4]
 800f274:	2200      	movs	r2, #0
 800f276:	675a      	str	r2, [r3, #116]	@ 0x74
}
 800f278:	bf00      	nop
 800f27a:	3754      	adds	r7, #84	@ 0x54
 800f27c:	46bd      	mov	sp, r7
 800f27e:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f282:	4770      	bx	lr
 800f284:	effffffe 	.word	0xeffffffe

0800f288 <UART_DMAAbortOnError>:
  *         (To be called at end of DMA Abort procedure following error occurrence).
  * @param  hdma DMA handle.
  * @retval None
  */
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
 800f288:	b580      	push	{r7, lr}
 800f28a:	b084      	sub	sp, #16
 800f28c:	af00      	add	r7, sp, #0
 800f28e:	6078      	str	r0, [r7, #4]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 800f290:	687b      	ldr	r3, [r7, #4]
 800f292:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800f294:	60fb      	str	r3, [r7, #12]
  huart->RxXferCount = 0U;
 800f296:	68fb      	ldr	r3, [r7, #12]
 800f298:	2200      	movs	r2, #0
 800f29a:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->TxXferCount = 0U;
 800f29e:	68fb      	ldr	r3, [r7, #12]
 800f2a0:	2200      	movs	r2, #0
 800f2a2:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered error callback*/
  huart->ErrorCallback(huart);
#else
  /*Call legacy weak error callback*/
  HAL_UART_ErrorCallback(huart);
 800f2a6:	68f8      	ldr	r0, [r7, #12]
 800f2a8:	f7fe ff3a 	bl	800e120 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800f2ac:	bf00      	nop
 800f2ae:	3710      	adds	r7, #16
 800f2b0:	46bd      	mov	sp, r7
 800f2b2:	bd80      	pop	{r7, pc}

0800f2b4 <UART_TxISR_8BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
 800f2b4:	b480      	push	{r7}
 800f2b6:	b08f      	sub	sp, #60	@ 0x3c
 800f2b8:	af00      	add	r7, sp, #0
 800f2ba:	6078      	str	r0, [r7, #4]
  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f2bc:	687b      	ldr	r3, [r7, #4]
 800f2be:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f2c2:	2b21      	cmp	r3, #33	@ 0x21
 800f2c4:	d14c      	bne.n	800f360 <UART_TxISR_8BIT+0xac>
  {
    if (huart->TxXferCount == 0U)
 800f2c6:	687b      	ldr	r3, [r7, #4]
 800f2c8:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f2cc:	b29b      	uxth	r3, r3
 800f2ce:	2b00      	cmp	r3, #0
 800f2d0:	d132      	bne.n	800f338 <UART_TxISR_8BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800f2d2:	687b      	ldr	r3, [r7, #4]
 800f2d4:	681b      	ldr	r3, [r3, #0]
 800f2d6:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f2d8:	6a3b      	ldr	r3, [r7, #32]
 800f2da:	e853 3f00 	ldrex	r3, [r3]
 800f2de:	61fb      	str	r3, [r7, #28]
   return(result);
 800f2e0:	69fb      	ldr	r3, [r7, #28]
 800f2e2:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800f2e6:	637b      	str	r3, [r7, #52]	@ 0x34
 800f2e8:	687b      	ldr	r3, [r7, #4]
 800f2ea:	681b      	ldr	r3, [r3, #0]
 800f2ec:	461a      	mov	r2, r3
 800f2ee:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f2f0:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800f2f2:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f2f4:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f2f6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f2f8:	e841 2300 	strex	r3, r2, [r1]
 800f2fc:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f2fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f300:	2b00      	cmp	r3, #0
 800f302:	d1e6      	bne.n	800f2d2 <UART_TxISR_8BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f304:	687b      	ldr	r3, [r7, #4]
 800f306:	681b      	ldr	r3, [r3, #0]
 800f308:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f30a:	68fb      	ldr	r3, [r7, #12]
 800f30c:	e853 3f00 	ldrex	r3, [r3]
 800f310:	60bb      	str	r3, [r7, #8]
   return(result);
 800f312:	68bb      	ldr	r3, [r7, #8]
 800f314:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f318:	633b      	str	r3, [r7, #48]	@ 0x30
 800f31a:	687b      	ldr	r3, [r7, #4]
 800f31c:	681b      	ldr	r3, [r3, #0]
 800f31e:	461a      	mov	r2, r3
 800f320:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f322:	61bb      	str	r3, [r7, #24]
 800f324:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f326:	6979      	ldr	r1, [r7, #20]
 800f328:	69ba      	ldr	r2, [r7, #24]
 800f32a:	e841 2300 	strex	r3, r2, [r1]
 800f32e:	613b      	str	r3, [r7, #16]
   return(result);
 800f330:	693b      	ldr	r3, [r7, #16]
 800f332:	2b00      	cmp	r3, #0
 800f334:	d1e6      	bne.n	800f304 <UART_TxISR_8BIT+0x50>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
}
 800f336:	e013      	b.n	800f360 <UART_TxISR_8BIT+0xac>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800f338:	687b      	ldr	r3, [r7, #4]
 800f33a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f33c:	781a      	ldrb	r2, [r3, #0]
 800f33e:	687b      	ldr	r3, [r7, #4]
 800f340:	681b      	ldr	r3, [r3, #0]
 800f342:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr++;
 800f344:	687b      	ldr	r3, [r7, #4]
 800f346:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f348:	1c5a      	adds	r2, r3, #1
 800f34a:	687b      	ldr	r3, [r7, #4]
 800f34c:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800f34e:	687b      	ldr	r3, [r7, #4]
 800f350:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f354:	b29b      	uxth	r3, r3
 800f356:	3b01      	subs	r3, #1
 800f358:	b29a      	uxth	r2, r3
 800f35a:	687b      	ldr	r3, [r7, #4]
 800f35c:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800f360:	bf00      	nop
 800f362:	373c      	adds	r7, #60	@ 0x3c
 800f364:	46bd      	mov	sp, r7
 800f366:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f36a:	4770      	bx	lr

0800f36c <UART_TxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
 800f36c:	b480      	push	{r7}
 800f36e:	b091      	sub	sp, #68	@ 0x44
 800f370:	af00      	add	r7, sp, #0
 800f372:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f374:	687b      	ldr	r3, [r7, #4]
 800f376:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f37a:	2b21      	cmp	r3, #33	@ 0x21
 800f37c:	d151      	bne.n	800f422 <UART_TxISR_16BIT+0xb6>
  {
    if (huart->TxXferCount == 0U)
 800f37e:	687b      	ldr	r3, [r7, #4]
 800f380:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f384:	b29b      	uxth	r3, r3
 800f386:	2b00      	cmp	r3, #0
 800f388:	d132      	bne.n	800f3f0 <UART_TxISR_16BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800f38a:	687b      	ldr	r3, [r7, #4]
 800f38c:	681b      	ldr	r3, [r3, #0]
 800f38e:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f390:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f392:	e853 3f00 	ldrex	r3, [r3]
 800f396:	623b      	str	r3, [r7, #32]
   return(result);
 800f398:	6a3b      	ldr	r3, [r7, #32]
 800f39a:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800f39e:	63bb      	str	r3, [r7, #56]	@ 0x38
 800f3a0:	687b      	ldr	r3, [r7, #4]
 800f3a2:	681b      	ldr	r3, [r3, #0]
 800f3a4:	461a      	mov	r2, r3
 800f3a6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f3a8:	633b      	str	r3, [r7, #48]	@ 0x30
 800f3aa:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f3ac:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f3ae:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f3b0:	e841 2300 	strex	r3, r2, [r1]
 800f3b4:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f3b6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f3b8:	2b00      	cmp	r3, #0
 800f3ba:	d1e6      	bne.n	800f38a <UART_TxISR_16BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f3bc:	687b      	ldr	r3, [r7, #4]
 800f3be:	681b      	ldr	r3, [r3, #0]
 800f3c0:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f3c2:	693b      	ldr	r3, [r7, #16]
 800f3c4:	e853 3f00 	ldrex	r3, [r3]
 800f3c8:	60fb      	str	r3, [r7, #12]
   return(result);
 800f3ca:	68fb      	ldr	r3, [r7, #12]
 800f3cc:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f3d0:	637b      	str	r3, [r7, #52]	@ 0x34
 800f3d2:	687b      	ldr	r3, [r7, #4]
 800f3d4:	681b      	ldr	r3, [r3, #0]
 800f3d6:	461a      	mov	r2, r3
 800f3d8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f3da:	61fb      	str	r3, [r7, #28]
 800f3dc:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f3de:	69b9      	ldr	r1, [r7, #24]
 800f3e0:	69fa      	ldr	r2, [r7, #28]
 800f3e2:	e841 2300 	strex	r3, r2, [r1]
 800f3e6:	617b      	str	r3, [r7, #20]
   return(result);
 800f3e8:	697b      	ldr	r3, [r7, #20]
 800f3ea:	2b00      	cmp	r3, #0
 800f3ec:	d1e6      	bne.n	800f3bc <UART_TxISR_16BIT+0x50>
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
      huart->pTxBuffPtr += 2U;
      huart->TxXferCount--;
    }
  }
}
 800f3ee:	e018      	b.n	800f422 <UART_TxISR_16BIT+0xb6>
      tmp = (const uint16_t *) huart->pTxBuffPtr;
 800f3f0:	687b      	ldr	r3, [r7, #4]
 800f3f2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f3f4:	63fb      	str	r3, [r7, #60]	@ 0x3c
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800f3f6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f3f8:	881b      	ldrh	r3, [r3, #0]
 800f3fa:	461a      	mov	r2, r3
 800f3fc:	687b      	ldr	r3, [r7, #4]
 800f3fe:	681b      	ldr	r3, [r3, #0]
 800f400:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800f404:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr += 2U;
 800f406:	687b      	ldr	r3, [r7, #4]
 800f408:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f40a:	1c9a      	adds	r2, r3, #2
 800f40c:	687b      	ldr	r3, [r7, #4]
 800f40e:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800f410:	687b      	ldr	r3, [r7, #4]
 800f412:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f416:	b29b      	uxth	r3, r3
 800f418:	3b01      	subs	r3, #1
 800f41a:	b29a      	uxth	r2, r3
 800f41c:	687b      	ldr	r3, [r7, #4]
 800f41e:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800f422:	bf00      	nop
 800f424:	3744      	adds	r7, #68	@ 0x44
 800f426:	46bd      	mov	sp, r7
 800f428:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f42c:	4770      	bx	lr

0800f42e <UART_TxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f42e:	b480      	push	{r7}
 800f430:	b091      	sub	sp, #68	@ 0x44
 800f432:	af00      	add	r7, sp, #0
 800f434:	6078      	str	r0, [r7, #4]
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f436:	687b      	ldr	r3, [r7, #4]
 800f438:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f43c:	2b21      	cmp	r3, #33	@ 0x21
 800f43e:	d160      	bne.n	800f502 <UART_TxISR_8BIT_FIFOEN+0xd4>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f440:	687b      	ldr	r3, [r7, #4]
 800f442:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800f446:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f448:	e057      	b.n	800f4fa <UART_TxISR_8BIT_FIFOEN+0xcc>
    {
      if (huart->TxXferCount == 0U)
 800f44a:	687b      	ldr	r3, [r7, #4]
 800f44c:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f450:	b29b      	uxth	r3, r3
 800f452:	2b00      	cmp	r3, #0
 800f454:	d133      	bne.n	800f4be <UART_TxISR_8BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800f456:	687b      	ldr	r3, [r7, #4]
 800f458:	681b      	ldr	r3, [r3, #0]
 800f45a:	3308      	adds	r3, #8
 800f45c:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f45e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f460:	e853 3f00 	ldrex	r3, [r3]
 800f464:	623b      	str	r3, [r7, #32]
   return(result);
 800f466:	6a3b      	ldr	r3, [r7, #32]
 800f468:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800f46c:	63bb      	str	r3, [r7, #56]	@ 0x38
 800f46e:	687b      	ldr	r3, [r7, #4]
 800f470:	681b      	ldr	r3, [r3, #0]
 800f472:	3308      	adds	r3, #8
 800f474:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800f476:	633a      	str	r2, [r7, #48]	@ 0x30
 800f478:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f47a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f47c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f47e:	e841 2300 	strex	r3, r2, [r1]
 800f482:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f484:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f486:	2b00      	cmp	r3, #0
 800f488:	d1e5      	bne.n	800f456 <UART_TxISR_8BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f48a:	687b      	ldr	r3, [r7, #4]
 800f48c:	681b      	ldr	r3, [r3, #0]
 800f48e:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f490:	693b      	ldr	r3, [r7, #16]
 800f492:	e853 3f00 	ldrex	r3, [r3]
 800f496:	60fb      	str	r3, [r7, #12]
   return(result);
 800f498:	68fb      	ldr	r3, [r7, #12]
 800f49a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f49e:	637b      	str	r3, [r7, #52]	@ 0x34
 800f4a0:	687b      	ldr	r3, [r7, #4]
 800f4a2:	681b      	ldr	r3, [r3, #0]
 800f4a4:	461a      	mov	r2, r3
 800f4a6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f4a8:	61fb      	str	r3, [r7, #28]
 800f4aa:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f4ac:	69b9      	ldr	r1, [r7, #24]
 800f4ae:	69fa      	ldr	r2, [r7, #28]
 800f4b0:	e841 2300 	strex	r3, r2, [r1]
 800f4b4:	617b      	str	r3, [r7, #20]
   return(result);
 800f4b6:	697b      	ldr	r3, [r7, #20]
 800f4b8:	2b00      	cmp	r3, #0
 800f4ba:	d1e6      	bne.n	800f48a <UART_TxISR_8BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f4bc:	e021      	b.n	800f502 <UART_TxISR_8BIT_FIFOEN+0xd4>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f4be:	687b      	ldr	r3, [r7, #4]
 800f4c0:	681b      	ldr	r3, [r3, #0]
 800f4c2:	69db      	ldr	r3, [r3, #28]
 800f4c4:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f4c8:	2b00      	cmp	r3, #0
 800f4ca:	d013      	beq.n	800f4f4 <UART_TxISR_8BIT_FIFOEN+0xc6>
      {
        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800f4cc:	687b      	ldr	r3, [r7, #4]
 800f4ce:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f4d0:	781a      	ldrb	r2, [r3, #0]
 800f4d2:	687b      	ldr	r3, [r7, #4]
 800f4d4:	681b      	ldr	r3, [r3, #0]
 800f4d6:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr++;
 800f4d8:	687b      	ldr	r3, [r7, #4]
 800f4da:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f4dc:	1c5a      	adds	r2, r3, #1
 800f4de:	687b      	ldr	r3, [r7, #4]
 800f4e0:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f4e2:	687b      	ldr	r3, [r7, #4]
 800f4e4:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f4e8:	b29b      	uxth	r3, r3
 800f4ea:	3b01      	subs	r3, #1
 800f4ec:	b29a      	uxth	r2, r3
 800f4ee:	687b      	ldr	r3, [r7, #4]
 800f4f0:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f4f4:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f4f6:	3b01      	subs	r3, #1
 800f4f8:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f4fa:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f4fc:	2b00      	cmp	r3, #0
 800f4fe:	d1a4      	bne.n	800f44a <UART_TxISR_8BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f500:	e7ff      	b.n	800f502 <UART_TxISR_8BIT_FIFOEN+0xd4>
 800f502:	bf00      	nop
 800f504:	3744      	adds	r7, #68	@ 0x44
 800f506:	46bd      	mov	sp, r7
 800f508:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f50c:	4770      	bx	lr

0800f50e <UART_TxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f50e:	b480      	push	{r7}
 800f510:	b091      	sub	sp, #68	@ 0x44
 800f512:	af00      	add	r7, sp, #0
 800f514:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f516:	687b      	ldr	r3, [r7, #4]
 800f518:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f51c:	2b21      	cmp	r3, #33	@ 0x21
 800f51e:	d165      	bne.n	800f5ec <UART_TxISR_16BIT_FIFOEN+0xde>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f520:	687b      	ldr	r3, [r7, #4]
 800f522:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800f526:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f528:	e05c      	b.n	800f5e4 <UART_TxISR_16BIT_FIFOEN+0xd6>
    {
      if (huart->TxXferCount == 0U)
 800f52a:	687b      	ldr	r3, [r7, #4]
 800f52c:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f530:	b29b      	uxth	r3, r3
 800f532:	2b00      	cmp	r3, #0
 800f534:	d133      	bne.n	800f59e <UART_TxISR_16BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800f536:	687b      	ldr	r3, [r7, #4]
 800f538:	681b      	ldr	r3, [r3, #0]
 800f53a:	3308      	adds	r3, #8
 800f53c:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f53e:	6a3b      	ldr	r3, [r7, #32]
 800f540:	e853 3f00 	ldrex	r3, [r3]
 800f544:	61fb      	str	r3, [r7, #28]
   return(result);
 800f546:	69fb      	ldr	r3, [r7, #28]
 800f548:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800f54c:	637b      	str	r3, [r7, #52]	@ 0x34
 800f54e:	687b      	ldr	r3, [r7, #4]
 800f550:	681b      	ldr	r3, [r3, #0]
 800f552:	3308      	adds	r3, #8
 800f554:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800f556:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f558:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f55a:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f55c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f55e:	e841 2300 	strex	r3, r2, [r1]
 800f562:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f564:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f566:	2b00      	cmp	r3, #0
 800f568:	d1e5      	bne.n	800f536 <UART_TxISR_16BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f56a:	687b      	ldr	r3, [r7, #4]
 800f56c:	681b      	ldr	r3, [r3, #0]
 800f56e:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f570:	68fb      	ldr	r3, [r7, #12]
 800f572:	e853 3f00 	ldrex	r3, [r3]
 800f576:	60bb      	str	r3, [r7, #8]
   return(result);
 800f578:	68bb      	ldr	r3, [r7, #8]
 800f57a:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f57e:	633b      	str	r3, [r7, #48]	@ 0x30
 800f580:	687b      	ldr	r3, [r7, #4]
 800f582:	681b      	ldr	r3, [r3, #0]
 800f584:	461a      	mov	r2, r3
 800f586:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f588:	61bb      	str	r3, [r7, #24]
 800f58a:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f58c:	6979      	ldr	r1, [r7, #20]
 800f58e:	69ba      	ldr	r2, [r7, #24]
 800f590:	e841 2300 	strex	r3, r2, [r1]
 800f594:	613b      	str	r3, [r7, #16]
   return(result);
 800f596:	693b      	ldr	r3, [r7, #16]
 800f598:	2b00      	cmp	r3, #0
 800f59a:	d1e6      	bne.n	800f56a <UART_TxISR_16BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f59c:	e026      	b.n	800f5ec <UART_TxISR_16BIT_FIFOEN+0xde>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f59e:	687b      	ldr	r3, [r7, #4]
 800f5a0:	681b      	ldr	r3, [r3, #0]
 800f5a2:	69db      	ldr	r3, [r3, #28]
 800f5a4:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f5a8:	2b00      	cmp	r3, #0
 800f5aa:	d018      	beq.n	800f5de <UART_TxISR_16BIT_FIFOEN+0xd0>
      {
        tmp = (const uint16_t *) huart->pTxBuffPtr;
 800f5ac:	687b      	ldr	r3, [r7, #4]
 800f5ae:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f5b0:	63bb      	str	r3, [r7, #56]	@ 0x38
        huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800f5b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f5b4:	881b      	ldrh	r3, [r3, #0]
 800f5b6:	461a      	mov	r2, r3
 800f5b8:	687b      	ldr	r3, [r7, #4]
 800f5ba:	681b      	ldr	r3, [r3, #0]
 800f5bc:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800f5c0:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr += 2U;
 800f5c2:	687b      	ldr	r3, [r7, #4]
 800f5c4:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f5c6:	1c9a      	adds	r2, r3, #2
 800f5c8:	687b      	ldr	r3, [r7, #4]
 800f5ca:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f5cc:	687b      	ldr	r3, [r7, #4]
 800f5ce:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f5d2:	b29b      	uxth	r3, r3
 800f5d4:	3b01      	subs	r3, #1
 800f5d6:	b29a      	uxth	r2, r3
 800f5d8:	687b      	ldr	r3, [r7, #4]
 800f5da:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f5de:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f5e0:	3b01      	subs	r3, #1
 800f5e2:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f5e4:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f5e6:	2b00      	cmp	r3, #0
 800f5e8:	d19f      	bne.n	800f52a <UART_TxISR_16BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f5ea:	e7ff      	b.n	800f5ec <UART_TxISR_16BIT_FIFOEN+0xde>
 800f5ec:	bf00      	nop
 800f5ee:	3744      	adds	r7, #68	@ 0x44
 800f5f0:	46bd      	mov	sp, r7
 800f5f2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f5f6:	4770      	bx	lr

0800f5f8 <UART_EndTransmit_IT>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
 800f5f8:	b580      	push	{r7, lr}
 800f5fa:	b088      	sub	sp, #32
 800f5fc:	af00      	add	r7, sp, #0
 800f5fe:	6078      	str	r0, [r7, #4]
  /* Disable the UART Transmit Complete Interrupt */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f600:	687b      	ldr	r3, [r7, #4]
 800f602:	681b      	ldr	r3, [r3, #0]
 800f604:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f606:	68fb      	ldr	r3, [r7, #12]
 800f608:	e853 3f00 	ldrex	r3, [r3]
 800f60c:	60bb      	str	r3, [r7, #8]
   return(result);
 800f60e:	68bb      	ldr	r3, [r7, #8]
 800f610:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800f614:	61fb      	str	r3, [r7, #28]
 800f616:	687b      	ldr	r3, [r7, #4]
 800f618:	681b      	ldr	r3, [r3, #0]
 800f61a:	461a      	mov	r2, r3
 800f61c:	69fb      	ldr	r3, [r7, #28]
 800f61e:	61bb      	str	r3, [r7, #24]
 800f620:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f622:	6979      	ldr	r1, [r7, #20]
 800f624:	69ba      	ldr	r2, [r7, #24]
 800f626:	e841 2300 	strex	r3, r2, [r1]
 800f62a:	613b      	str	r3, [r7, #16]
   return(result);
 800f62c:	693b      	ldr	r3, [r7, #16]
 800f62e:	2b00      	cmp	r3, #0
 800f630:	d1e6      	bne.n	800f600 <UART_EndTransmit_IT+0x8>

  /* Tx process is ended, restore huart->gState to Ready */
  huart->gState = HAL_UART_STATE_READY;
 800f632:	687b      	ldr	r3, [r7, #4]
 800f634:	2220      	movs	r2, #32
 800f636:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Cleat TxISR function pointer */
  huart->TxISR = NULL;
 800f63a:	687b      	ldr	r3, [r7, #4]
 800f63c:	2200      	movs	r2, #0
 800f63e:	679a      	str	r2, [r3, #120]	@ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered Tx complete callback*/
  huart->TxCpltCallback(huart);
#else
  /*Call legacy weak Tx complete callback*/
  HAL_UART_TxCpltCallback(huart);
 800f640:	6878      	ldr	r0, [r7, #4]
 800f642:	f7f4 fff7 	bl	8004634 <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800f646:	bf00      	nop
 800f648:	3720      	adds	r7, #32
 800f64a:	46bd      	mov	sp, r7
 800f64c:	bd80      	pop	{r7, pc}
	...

0800f650 <UART_RxISR_8BIT>:
  * @brief RX interrupt handler for 7 or 8 bits data word length .
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
 800f650:	b580      	push	{r7, lr}
 800f652:	b09c      	sub	sp, #112	@ 0x70
 800f654:	af00      	add	r7, sp, #0
 800f656:	6078      	str	r0, [r7, #4]
  uint16_t uhMask = huart->Mask;
 800f658:	687b      	ldr	r3, [r7, #4]
 800f65a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f65e:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f662:	687b      	ldr	r3, [r7, #4]
 800f664:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f668:	2b22      	cmp	r3, #34	@ 0x22
 800f66a:	f040 80be 	bne.w	800f7ea <UART_RxISR_8BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f66e:	687b      	ldr	r3, [r7, #4]
 800f670:	681b      	ldr	r3, [r3, #0]
 800f672:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f674:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800f678:	f8b7 306c 	ldrh.w	r3, [r7, #108]	@ 0x6c
 800f67c:	b2d9      	uxtb	r1, r3
 800f67e:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800f682:	b2da      	uxtb	r2, r3
 800f684:	687b      	ldr	r3, [r7, #4]
 800f686:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f688:	400a      	ands	r2, r1
 800f68a:	b2d2      	uxtb	r2, r2
 800f68c:	701a      	strb	r2, [r3, #0]
    huart->pRxBuffPtr++;
 800f68e:	687b      	ldr	r3, [r7, #4]
 800f690:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f692:	1c5a      	adds	r2, r3, #1
 800f694:	687b      	ldr	r3, [r7, #4]
 800f696:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800f698:	687b      	ldr	r3, [r7, #4]
 800f69a:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f69e:	b29b      	uxth	r3, r3
 800f6a0:	3b01      	subs	r3, #1
 800f6a2:	b29a      	uxth	r2, r3
 800f6a4:	687b      	ldr	r3, [r7, #4]
 800f6a6:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800f6aa:	687b      	ldr	r3, [r7, #4]
 800f6ac:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f6b0:	b29b      	uxth	r3, r3
 800f6b2:	2b00      	cmp	r3, #0
 800f6b4:	f040 80a1 	bne.w	800f7fa <UART_RxISR_8BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f6b8:	687b      	ldr	r3, [r7, #4]
 800f6ba:	681b      	ldr	r3, [r3, #0]
 800f6bc:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f6be:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f6c0:	e853 3f00 	ldrex	r3, [r3]
 800f6c4:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800f6c6:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f6c8:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f6cc:	66bb      	str	r3, [r7, #104]	@ 0x68
 800f6ce:	687b      	ldr	r3, [r7, #4]
 800f6d0:	681b      	ldr	r3, [r3, #0]
 800f6d2:	461a      	mov	r2, r3
 800f6d4:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f6d6:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f6d8:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f6da:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800f6dc:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f6de:	e841 2300 	strex	r3, r2, [r1]
 800f6e2:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800f6e4:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f6e6:	2b00      	cmp	r3, #0
 800f6e8:	d1e6      	bne.n	800f6b8 <UART_RxISR_8BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f6ea:	687b      	ldr	r3, [r7, #4]
 800f6ec:	681b      	ldr	r3, [r3, #0]
 800f6ee:	3308      	adds	r3, #8
 800f6f0:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f6f2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f6f4:	e853 3f00 	ldrex	r3, [r3]
 800f6f8:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f6fa:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f6fc:	f023 0301 	bic.w	r3, r3, #1
 800f700:	667b      	str	r3, [r7, #100]	@ 0x64
 800f702:	687b      	ldr	r3, [r7, #4]
 800f704:	681b      	ldr	r3, [r3, #0]
 800f706:	3308      	adds	r3, #8
 800f708:	6e7a      	ldr	r2, [r7, #100]	@ 0x64
 800f70a:	647a      	str	r2, [r7, #68]	@ 0x44
 800f70c:	643b      	str	r3, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f70e:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800f710:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f712:	e841 2300 	strex	r3, r2, [r1]
 800f716:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800f718:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f71a:	2b00      	cmp	r3, #0
 800f71c:	d1e5      	bne.n	800f6ea <UART_RxISR_8BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800f71e:	687b      	ldr	r3, [r7, #4]
 800f720:	2220      	movs	r2, #32
 800f722:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800f726:	687b      	ldr	r3, [r7, #4]
 800f728:	2200      	movs	r2, #0
 800f72a:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f72c:	687b      	ldr	r3, [r7, #4]
 800f72e:	2200      	movs	r2, #0
 800f730:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f732:	687b      	ldr	r3, [r7, #4]
 800f734:	681b      	ldr	r3, [r3, #0]
 800f736:	4a33      	ldr	r2, [pc, #204]	@ (800f804 <UART_RxISR_8BIT+0x1b4>)
 800f738:	4293      	cmp	r3, r2
 800f73a:	d01f      	beq.n	800f77c <UART_RxISR_8BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f73c:	687b      	ldr	r3, [r7, #4]
 800f73e:	681b      	ldr	r3, [r3, #0]
 800f740:	685b      	ldr	r3, [r3, #4]
 800f742:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f746:	2b00      	cmp	r3, #0
 800f748:	d018      	beq.n	800f77c <UART_RxISR_8BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f74a:	687b      	ldr	r3, [r7, #4]
 800f74c:	681b      	ldr	r3, [r3, #0]
 800f74e:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f750:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f752:	e853 3f00 	ldrex	r3, [r3]
 800f756:	623b      	str	r3, [r7, #32]
   return(result);
 800f758:	6a3b      	ldr	r3, [r7, #32]
 800f75a:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f75e:	663b      	str	r3, [r7, #96]	@ 0x60
 800f760:	687b      	ldr	r3, [r7, #4]
 800f762:	681b      	ldr	r3, [r3, #0]
 800f764:	461a      	mov	r2, r3
 800f766:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f768:	633b      	str	r3, [r7, #48]	@ 0x30
 800f76a:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f76c:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f76e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f770:	e841 2300 	strex	r3, r2, [r1]
 800f774:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f776:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f778:	2b00      	cmp	r3, #0
 800f77a:	d1e6      	bne.n	800f74a <UART_RxISR_8BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f77c:	687b      	ldr	r3, [r7, #4]
 800f77e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f780:	2b01      	cmp	r3, #1
 800f782:	d12e      	bne.n	800f7e2 <UART_RxISR_8BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f784:	687b      	ldr	r3, [r7, #4]
 800f786:	2200      	movs	r2, #0
 800f788:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f78a:	687b      	ldr	r3, [r7, #4]
 800f78c:	681b      	ldr	r3, [r3, #0]
 800f78e:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f790:	693b      	ldr	r3, [r7, #16]
 800f792:	e853 3f00 	ldrex	r3, [r3]
 800f796:	60fb      	str	r3, [r7, #12]
   return(result);
 800f798:	68fb      	ldr	r3, [r7, #12]
 800f79a:	f023 0310 	bic.w	r3, r3, #16
 800f79e:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f7a0:	687b      	ldr	r3, [r7, #4]
 800f7a2:	681b      	ldr	r3, [r3, #0]
 800f7a4:	461a      	mov	r2, r3
 800f7a6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f7a8:	61fb      	str	r3, [r7, #28]
 800f7aa:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f7ac:	69b9      	ldr	r1, [r7, #24]
 800f7ae:	69fa      	ldr	r2, [r7, #28]
 800f7b0:	e841 2300 	strex	r3, r2, [r1]
 800f7b4:	617b      	str	r3, [r7, #20]
   return(result);
 800f7b6:	697b      	ldr	r3, [r7, #20]
 800f7b8:	2b00      	cmp	r3, #0
 800f7ba:	d1e6      	bne.n	800f78a <UART_RxISR_8BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f7bc:	687b      	ldr	r3, [r7, #4]
 800f7be:	681b      	ldr	r3, [r3, #0]
 800f7c0:	69db      	ldr	r3, [r3, #28]
 800f7c2:	f003 0310 	and.w	r3, r3, #16
 800f7c6:	2b10      	cmp	r3, #16
 800f7c8:	d103      	bne.n	800f7d2 <UART_RxISR_8BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f7ca:	687b      	ldr	r3, [r7, #4]
 800f7cc:	681b      	ldr	r3, [r3, #0]
 800f7ce:	2210      	movs	r2, #16
 800f7d0:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f7d2:	687b      	ldr	r3, [r7, #4]
 800f7d4:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f7d8:	4619      	mov	r1, r3
 800f7da:	6878      	ldr	r0, [r7, #4]
 800f7dc:	f7f4 fed0 	bl	8004580 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f7e0:	e00b      	b.n	800f7fa <UART_RxISR_8BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800f7e2:	6878      	ldr	r0, [r7, #4]
 800f7e4:	f7f4 fec2 	bl	800456c <HAL_UART_RxCpltCallback>
}
 800f7e8:	e007      	b.n	800f7fa <UART_RxISR_8BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f7ea:	687b      	ldr	r3, [r7, #4]
 800f7ec:	681b      	ldr	r3, [r3, #0]
 800f7ee:	699a      	ldr	r2, [r3, #24]
 800f7f0:	687b      	ldr	r3, [r7, #4]
 800f7f2:	681b      	ldr	r3, [r3, #0]
 800f7f4:	f042 0208 	orr.w	r2, r2, #8
 800f7f8:	619a      	str	r2, [r3, #24]
}
 800f7fa:	bf00      	nop
 800f7fc:	3770      	adds	r7, #112	@ 0x70
 800f7fe:	46bd      	mov	sp, r7
 800f800:	bd80      	pop	{r7, pc}
 800f802:	bf00      	nop
 800f804:	58000c00 	.word	0x58000c00

0800f808 <UART_RxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
 800f808:	b580      	push	{r7, lr}
 800f80a:	b09c      	sub	sp, #112	@ 0x70
 800f80c:	af00      	add	r7, sp, #0
 800f80e:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t uhMask = huart->Mask;
 800f810:	687b      	ldr	r3, [r7, #4]
 800f812:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f816:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f81a:	687b      	ldr	r3, [r7, #4]
 800f81c:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f820:	2b22      	cmp	r3, #34	@ 0x22
 800f822:	f040 80be 	bne.w	800f9a2 <UART_RxISR_16BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f826:	687b      	ldr	r3, [r7, #4]
 800f828:	681b      	ldr	r3, [r3, #0]
 800f82a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f82c:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    tmp = (uint16_t *) huart->pRxBuffPtr ;
 800f830:	687b      	ldr	r3, [r7, #4]
 800f832:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f834:	66bb      	str	r3, [r7, #104]	@ 0x68
    *tmp = (uint16_t)(uhdata & uhMask);
 800f836:	f8b7 206c 	ldrh.w	r2, [r7, #108]	@ 0x6c
 800f83a:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800f83e:	4013      	ands	r3, r2
 800f840:	b29a      	uxth	r2, r3
 800f842:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f844:	801a      	strh	r2, [r3, #0]
    huart->pRxBuffPtr += 2U;
 800f846:	687b      	ldr	r3, [r7, #4]
 800f848:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f84a:	1c9a      	adds	r2, r3, #2
 800f84c:	687b      	ldr	r3, [r7, #4]
 800f84e:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800f850:	687b      	ldr	r3, [r7, #4]
 800f852:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f856:	b29b      	uxth	r3, r3
 800f858:	3b01      	subs	r3, #1
 800f85a:	b29a      	uxth	r2, r3
 800f85c:	687b      	ldr	r3, [r7, #4]
 800f85e:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800f862:	687b      	ldr	r3, [r7, #4]
 800f864:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f868:	b29b      	uxth	r3, r3
 800f86a:	2b00      	cmp	r3, #0
 800f86c:	f040 80a1 	bne.w	800f9b2 <UART_RxISR_16BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f870:	687b      	ldr	r3, [r7, #4]
 800f872:	681b      	ldr	r3, [r3, #0]
 800f874:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f876:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f878:	e853 3f00 	ldrex	r3, [r3]
 800f87c:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800f87e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f880:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f884:	667b      	str	r3, [r7, #100]	@ 0x64
 800f886:	687b      	ldr	r3, [r7, #4]
 800f888:	681b      	ldr	r3, [r3, #0]
 800f88a:	461a      	mov	r2, r3
 800f88c:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f88e:	657b      	str	r3, [r7, #84]	@ 0x54
 800f890:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f892:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800f894:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800f896:	e841 2300 	strex	r3, r2, [r1]
 800f89a:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f89c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f89e:	2b00      	cmp	r3, #0
 800f8a0:	d1e6      	bne.n	800f870 <UART_RxISR_16BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f8a2:	687b      	ldr	r3, [r7, #4]
 800f8a4:	681b      	ldr	r3, [r3, #0]
 800f8a6:	3308      	adds	r3, #8
 800f8a8:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f8aa:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f8ac:	e853 3f00 	ldrex	r3, [r3]
 800f8b0:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f8b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f8b4:	f023 0301 	bic.w	r3, r3, #1
 800f8b8:	663b      	str	r3, [r7, #96]	@ 0x60
 800f8ba:	687b      	ldr	r3, [r7, #4]
 800f8bc:	681b      	ldr	r3, [r3, #0]
 800f8be:	3308      	adds	r3, #8
 800f8c0:	6e3a      	ldr	r2, [r7, #96]	@ 0x60
 800f8c2:	643a      	str	r2, [r7, #64]	@ 0x40
 800f8c4:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f8c6:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f8c8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f8ca:	e841 2300 	strex	r3, r2, [r1]
 800f8ce:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f8d0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f8d2:	2b00      	cmp	r3, #0
 800f8d4:	d1e5      	bne.n	800f8a2 <UART_RxISR_16BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800f8d6:	687b      	ldr	r3, [r7, #4]
 800f8d8:	2220      	movs	r2, #32
 800f8da:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800f8de:	687b      	ldr	r3, [r7, #4]
 800f8e0:	2200      	movs	r2, #0
 800f8e2:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f8e4:	687b      	ldr	r3, [r7, #4]
 800f8e6:	2200      	movs	r2, #0
 800f8e8:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800f8ea:	687b      	ldr	r3, [r7, #4]
 800f8ec:	681b      	ldr	r3, [r3, #0]
 800f8ee:	4a33      	ldr	r2, [pc, #204]	@ (800f9bc <UART_RxISR_16BIT+0x1b4>)
 800f8f0:	4293      	cmp	r3, r2
 800f8f2:	d01f      	beq.n	800f934 <UART_RxISR_16BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800f8f4:	687b      	ldr	r3, [r7, #4]
 800f8f6:	681b      	ldr	r3, [r3, #0]
 800f8f8:	685b      	ldr	r3, [r3, #4]
 800f8fa:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800f8fe:	2b00      	cmp	r3, #0
 800f900:	d018      	beq.n	800f934 <UART_RxISR_16BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800f902:	687b      	ldr	r3, [r7, #4]
 800f904:	681b      	ldr	r3, [r3, #0]
 800f906:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f908:	6a3b      	ldr	r3, [r7, #32]
 800f90a:	e853 3f00 	ldrex	r3, [r3]
 800f90e:	61fb      	str	r3, [r7, #28]
   return(result);
 800f910:	69fb      	ldr	r3, [r7, #28]
 800f912:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800f916:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f918:	687b      	ldr	r3, [r7, #4]
 800f91a:	681b      	ldr	r3, [r3, #0]
 800f91c:	461a      	mov	r2, r3
 800f91e:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800f920:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800f922:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f924:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f926:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f928:	e841 2300 	strex	r3, r2, [r1]
 800f92c:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f92e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f930:	2b00      	cmp	r3, #0
 800f932:	d1e6      	bne.n	800f902 <UART_RxISR_16BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f934:	687b      	ldr	r3, [r7, #4]
 800f936:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f938:	2b01      	cmp	r3, #1
 800f93a:	d12e      	bne.n	800f99a <UART_RxISR_16BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f93c:	687b      	ldr	r3, [r7, #4]
 800f93e:	2200      	movs	r2, #0
 800f940:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f942:	687b      	ldr	r3, [r7, #4]
 800f944:	681b      	ldr	r3, [r3, #0]
 800f946:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f948:	68fb      	ldr	r3, [r7, #12]
 800f94a:	e853 3f00 	ldrex	r3, [r3]
 800f94e:	60bb      	str	r3, [r7, #8]
   return(result);
 800f950:	68bb      	ldr	r3, [r7, #8]
 800f952:	f023 0310 	bic.w	r3, r3, #16
 800f956:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f958:	687b      	ldr	r3, [r7, #4]
 800f95a:	681b      	ldr	r3, [r3, #0]
 800f95c:	461a      	mov	r2, r3
 800f95e:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800f960:	61bb      	str	r3, [r7, #24]
 800f962:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f964:	6979      	ldr	r1, [r7, #20]
 800f966:	69ba      	ldr	r2, [r7, #24]
 800f968:	e841 2300 	strex	r3, r2, [r1]
 800f96c:	613b      	str	r3, [r7, #16]
   return(result);
 800f96e:	693b      	ldr	r3, [r7, #16]
 800f970:	2b00      	cmp	r3, #0
 800f972:	d1e6      	bne.n	800f942 <UART_RxISR_16BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800f974:	687b      	ldr	r3, [r7, #4]
 800f976:	681b      	ldr	r3, [r3, #0]
 800f978:	69db      	ldr	r3, [r3, #28]
 800f97a:	f003 0310 	and.w	r3, r3, #16
 800f97e:	2b10      	cmp	r3, #16
 800f980:	d103      	bne.n	800f98a <UART_RxISR_16BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800f982:	687b      	ldr	r3, [r7, #4]
 800f984:	681b      	ldr	r3, [r3, #0]
 800f986:	2210      	movs	r2, #16
 800f988:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800f98a:	687b      	ldr	r3, [r7, #4]
 800f98c:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800f990:	4619      	mov	r1, r3
 800f992:	6878      	ldr	r0, [r7, #4]
 800f994:	f7f4 fdf4 	bl	8004580 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800f998:	e00b      	b.n	800f9b2 <UART_RxISR_16BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800f99a:	6878      	ldr	r0, [r7, #4]
 800f99c:	f7f4 fde6 	bl	800456c <HAL_UART_RxCpltCallback>
}
 800f9a0:	e007      	b.n	800f9b2 <UART_RxISR_16BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800f9a2:	687b      	ldr	r3, [r7, #4]
 800f9a4:	681b      	ldr	r3, [r3, #0]
 800f9a6:	699a      	ldr	r2, [r3, #24]
 800f9a8:	687b      	ldr	r3, [r7, #4]
 800f9aa:	681b      	ldr	r3, [r3, #0]
 800f9ac:	f042 0208 	orr.w	r2, r2, #8
 800f9b0:	619a      	str	r2, [r3, #24]
}
 800f9b2:	bf00      	nop
 800f9b4:	3770      	adds	r7, #112	@ 0x70
 800f9b6:	46bd      	mov	sp, r7
 800f9b8:	bd80      	pop	{r7, pc}
 800f9ba:	bf00      	nop
 800f9bc:	58000c00 	.word	0x58000c00

0800f9c0 <UART_RxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f9c0:	b580      	push	{r7, lr}
 800f9c2:	b0ac      	sub	sp, #176	@ 0xb0
 800f9c4:	af00      	add	r7, sp, #0
 800f9c6:	6078      	str	r0, [r7, #4]
  uint16_t  uhMask = huart->Mask;
 800f9c8:	687b      	ldr	r3, [r7, #4]
 800f9ca:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f9ce:	f8a7 30aa 	strh.w	r3, [r7, #170]	@ 0xaa
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800f9d2:	687b      	ldr	r3, [r7, #4]
 800f9d4:	681b      	ldr	r3, [r3, #0]
 800f9d6:	69db      	ldr	r3, [r3, #28]
 800f9d8:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800f9dc:	687b      	ldr	r3, [r7, #4]
 800f9de:	681b      	ldr	r3, [r3, #0]
 800f9e0:	681b      	ldr	r3, [r3, #0]
 800f9e2:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800f9e6:	687b      	ldr	r3, [r7, #4]
 800f9e8:	681b      	ldr	r3, [r3, #0]
 800f9ea:	689b      	ldr	r3, [r3, #8]
 800f9ec:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f9f0:	687b      	ldr	r3, [r7, #4]
 800f9f2:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f9f6:	2b22      	cmp	r3, #34	@ 0x22
 800f9f8:	f040 8180 	bne.w	800fcfc <UART_RxISR_8BIT_FIFOEN+0x33c>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800f9fc:	687b      	ldr	r3, [r7, #4]
 800f9fe:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800fa02:	f8a7 309e 	strh.w	r3, [r7, #158]	@ 0x9e
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800fa06:	e123      	b.n	800fc50 <UART_RxISR_8BIT_FIFOEN+0x290>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800fa08:	687b      	ldr	r3, [r7, #4]
 800fa0a:	681b      	ldr	r3, [r3, #0]
 800fa0c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800fa0e:	f8a7 309c 	strh.w	r3, [r7, #156]	@ 0x9c
      *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800fa12:	f8b7 309c 	ldrh.w	r3, [r7, #156]	@ 0x9c
 800fa16:	b2d9      	uxtb	r1, r3
 800fa18:	f8b7 30aa 	ldrh.w	r3, [r7, #170]	@ 0xaa
 800fa1c:	b2da      	uxtb	r2, r3
 800fa1e:	687b      	ldr	r3, [r7, #4]
 800fa20:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fa22:	400a      	ands	r2, r1
 800fa24:	b2d2      	uxtb	r2, r2
 800fa26:	701a      	strb	r2, [r3, #0]
      huart->pRxBuffPtr++;
 800fa28:	687b      	ldr	r3, [r7, #4]
 800fa2a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fa2c:	1c5a      	adds	r2, r3, #1
 800fa2e:	687b      	ldr	r3, [r7, #4]
 800fa30:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800fa32:	687b      	ldr	r3, [r7, #4]
 800fa34:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fa38:	b29b      	uxth	r3, r3
 800fa3a:	3b01      	subs	r3, #1
 800fa3c:	b29a      	uxth	r2, r3
 800fa3e:	687b      	ldr	r3, [r7, #4]
 800fa40:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800fa44:	687b      	ldr	r3, [r7, #4]
 800fa46:	681b      	ldr	r3, [r3, #0]
 800fa48:	69db      	ldr	r3, [r3, #28]
 800fa4a:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800fa4e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fa52:	f003 0307 	and.w	r3, r3, #7
 800fa56:	2b00      	cmp	r3, #0
 800fa58:	d053      	beq.n	800fb02 <UART_RxISR_8BIT_FIFOEN+0x142>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800fa5a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fa5e:	f003 0301 	and.w	r3, r3, #1
 800fa62:	2b00      	cmp	r3, #0
 800fa64:	d011      	beq.n	800fa8a <UART_RxISR_8BIT_FIFOEN+0xca>
 800fa66:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800fa6a:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800fa6e:	2b00      	cmp	r3, #0
 800fa70:	d00b      	beq.n	800fa8a <UART_RxISR_8BIT_FIFOEN+0xca>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800fa72:	687b      	ldr	r3, [r7, #4]
 800fa74:	681b      	ldr	r3, [r3, #0]
 800fa76:	2201      	movs	r2, #1
 800fa78:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800fa7a:	687b      	ldr	r3, [r7, #4]
 800fa7c:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fa80:	f043 0201 	orr.w	r2, r3, #1
 800fa84:	687b      	ldr	r3, [r7, #4]
 800fa86:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800fa8a:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fa8e:	f003 0302 	and.w	r3, r3, #2
 800fa92:	2b00      	cmp	r3, #0
 800fa94:	d011      	beq.n	800faba <UART_RxISR_8BIT_FIFOEN+0xfa>
 800fa96:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800fa9a:	f003 0301 	and.w	r3, r3, #1
 800fa9e:	2b00      	cmp	r3, #0
 800faa0:	d00b      	beq.n	800faba <UART_RxISR_8BIT_FIFOEN+0xfa>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800faa2:	687b      	ldr	r3, [r7, #4]
 800faa4:	681b      	ldr	r3, [r3, #0]
 800faa6:	2202      	movs	r2, #2
 800faa8:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800faaa:	687b      	ldr	r3, [r7, #4]
 800faac:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fab0:	f043 0204 	orr.w	r2, r3, #4
 800fab4:	687b      	ldr	r3, [r7, #4]
 800fab6:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800faba:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fabe:	f003 0304 	and.w	r3, r3, #4
 800fac2:	2b00      	cmp	r3, #0
 800fac4:	d011      	beq.n	800faea <UART_RxISR_8BIT_FIFOEN+0x12a>
 800fac6:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800faca:	f003 0301 	and.w	r3, r3, #1
 800face:	2b00      	cmp	r3, #0
 800fad0:	d00b      	beq.n	800faea <UART_RxISR_8BIT_FIFOEN+0x12a>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800fad2:	687b      	ldr	r3, [r7, #4]
 800fad4:	681b      	ldr	r3, [r3, #0]
 800fad6:	2204      	movs	r2, #4
 800fad8:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800fada:	687b      	ldr	r3, [r7, #4]
 800fadc:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fae0:	f043 0202 	orr.w	r2, r3, #2
 800fae4:	687b      	ldr	r3, [r7, #4]
 800fae6:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800faea:	687b      	ldr	r3, [r7, #4]
 800faec:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800faf0:	2b00      	cmp	r3, #0
 800faf2:	d006      	beq.n	800fb02 <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800faf4:	6878      	ldr	r0, [r7, #4]
 800faf6:	f7fe fb13 	bl	800e120 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800fafa:	687b      	ldr	r3, [r7, #4]
 800fafc:	2200      	movs	r2, #0
 800fafe:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800fb02:	687b      	ldr	r3, [r7, #4]
 800fb04:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fb08:	b29b      	uxth	r3, r3
 800fb0a:	2b00      	cmp	r3, #0
 800fb0c:	f040 80a0 	bne.w	800fc50 <UART_RxISR_8BIT_FIFOEN+0x290>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800fb10:	687b      	ldr	r3, [r7, #4]
 800fb12:	681b      	ldr	r3, [r3, #0]
 800fb14:	673b      	str	r3, [r7, #112]	@ 0x70
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fb16:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800fb18:	e853 3f00 	ldrex	r3, [r3]
 800fb1c:	66fb      	str	r3, [r7, #108]	@ 0x6c
   return(result);
 800fb1e:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
 800fb20:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800fb24:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800fb28:	687b      	ldr	r3, [r7, #4]
 800fb2a:	681b      	ldr	r3, [r3, #0]
 800fb2c:	461a      	mov	r2, r3
 800fb2e:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800fb32:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800fb34:	67ba      	str	r2, [r7, #120]	@ 0x78
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fb36:	6fb9      	ldr	r1, [r7, #120]	@ 0x78
 800fb38:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800fb3a:	e841 2300 	strex	r3, r2, [r1]
 800fb3e:	677b      	str	r3, [r7, #116]	@ 0x74
   return(result);
 800fb40:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800fb42:	2b00      	cmp	r3, #0
 800fb44:	d1e4      	bne.n	800fb10 <UART_RxISR_8BIT_FIFOEN+0x150>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800fb46:	687b      	ldr	r3, [r7, #4]
 800fb48:	681b      	ldr	r3, [r3, #0]
 800fb4a:	3308      	adds	r3, #8
 800fb4c:	65fb      	str	r3, [r7, #92]	@ 0x5c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fb4e:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800fb50:	e853 3f00 	ldrex	r3, [r3]
 800fb54:	65bb      	str	r3, [r7, #88]	@ 0x58
   return(result);
 800fb56:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800fb58:	4b6e      	ldr	r3, [pc, #440]	@ (800fd14 <UART_RxISR_8BIT_FIFOEN+0x354>)
 800fb5a:	4013      	ands	r3, r2
 800fb5c:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800fb60:	687b      	ldr	r3, [r7, #4]
 800fb62:	681b      	ldr	r3, [r3, #0]
 800fb64:	3308      	adds	r3, #8
 800fb66:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800fb6a:	66ba      	str	r2, [r7, #104]	@ 0x68
 800fb6c:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fb6e:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 800fb70:	6eba      	ldr	r2, [r7, #104]	@ 0x68
 800fb72:	e841 2300 	strex	r3, r2, [r1]
 800fb76:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800fb78:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800fb7a:	2b00      	cmp	r3, #0
 800fb7c:	d1e3      	bne.n	800fb46 <UART_RxISR_8BIT_FIFOEN+0x186>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800fb7e:	687b      	ldr	r3, [r7, #4]
 800fb80:	2220      	movs	r2, #32
 800fb82:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800fb86:	687b      	ldr	r3, [r7, #4]
 800fb88:	2200      	movs	r2, #0
 800fb8a:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fb8c:	687b      	ldr	r3, [r7, #4]
 800fb8e:	2200      	movs	r2, #0
 800fb90:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fb92:	687b      	ldr	r3, [r7, #4]
 800fb94:	681b      	ldr	r3, [r3, #0]
 800fb96:	4a60      	ldr	r2, [pc, #384]	@ (800fd18 <UART_RxISR_8BIT_FIFOEN+0x358>)
 800fb98:	4293      	cmp	r3, r2
 800fb9a:	d021      	beq.n	800fbe0 <UART_RxISR_8BIT_FIFOEN+0x220>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800fb9c:	687b      	ldr	r3, [r7, #4]
 800fb9e:	681b      	ldr	r3, [r3, #0]
 800fba0:	685b      	ldr	r3, [r3, #4]
 800fba2:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800fba6:	2b00      	cmp	r3, #0
 800fba8:	d01a      	beq.n	800fbe0 <UART_RxISR_8BIT_FIFOEN+0x220>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800fbaa:	687b      	ldr	r3, [r7, #4]
 800fbac:	681b      	ldr	r3, [r3, #0]
 800fbae:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fbb0:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800fbb2:	e853 3f00 	ldrex	r3, [r3]
 800fbb6:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800fbb8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fbba:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800fbbe:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800fbc2:	687b      	ldr	r3, [r7, #4]
 800fbc4:	681b      	ldr	r3, [r3, #0]
 800fbc6:	461a      	mov	r2, r3
 800fbc8:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800fbcc:	657b      	str	r3, [r7, #84]	@ 0x54
 800fbce:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fbd0:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800fbd2:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800fbd4:	e841 2300 	strex	r3, r2, [r1]
 800fbd8:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800fbda:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800fbdc:	2b00      	cmp	r3, #0
 800fbde:	d1e4      	bne.n	800fbaa <UART_RxISR_8BIT_FIFOEN+0x1ea>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fbe0:	687b      	ldr	r3, [r7, #4]
 800fbe2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fbe4:	2b01      	cmp	r3, #1
 800fbe6:	d130      	bne.n	800fc4a <UART_RxISR_8BIT_FIFOEN+0x28a>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800fbe8:	687b      	ldr	r3, [r7, #4]
 800fbea:	2200      	movs	r2, #0
 800fbec:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fbee:	687b      	ldr	r3, [r7, #4]
 800fbf0:	681b      	ldr	r3, [r3, #0]
 800fbf2:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fbf4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800fbf6:	e853 3f00 	ldrex	r3, [r3]
 800fbfa:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800fbfc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800fbfe:	f023 0310 	bic.w	r3, r3, #16
 800fc02:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800fc06:	687b      	ldr	r3, [r7, #4]
 800fc08:	681b      	ldr	r3, [r3, #0]
 800fc0a:	461a      	mov	r2, r3
 800fc0c:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800fc10:	643b      	str	r3, [r7, #64]	@ 0x40
 800fc12:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fc14:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800fc16:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800fc18:	e841 2300 	strex	r3, r2, [r1]
 800fc1c:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800fc1e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800fc20:	2b00      	cmp	r3, #0
 800fc22:	d1e4      	bne.n	800fbee <UART_RxISR_8BIT_FIFOEN+0x22e>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800fc24:	687b      	ldr	r3, [r7, #4]
 800fc26:	681b      	ldr	r3, [r3, #0]
 800fc28:	69db      	ldr	r3, [r3, #28]
 800fc2a:	f003 0310 	and.w	r3, r3, #16
 800fc2e:	2b10      	cmp	r3, #16
 800fc30:	d103      	bne.n	800fc3a <UART_RxISR_8BIT_FIFOEN+0x27a>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800fc32:	687b      	ldr	r3, [r7, #4]
 800fc34:	681b      	ldr	r3, [r3, #0]
 800fc36:	2210      	movs	r2, #16
 800fc38:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800fc3a:	687b      	ldr	r3, [r7, #4]
 800fc3c:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800fc40:	4619      	mov	r1, r3
 800fc42:	6878      	ldr	r0, [r7, #4]
 800fc44:	f7f4 fc9c 	bl	8004580 <HAL_UARTEx_RxEventCallback>
 800fc48:	e002      	b.n	800fc50 <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800fc4a:	6878      	ldr	r0, [r7, #4]
 800fc4c:	f7f4 fc8e 	bl	800456c <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800fc50:	f8b7 309e 	ldrh.w	r3, [r7, #158]	@ 0x9e
 800fc54:	2b00      	cmp	r3, #0
 800fc56:	d006      	beq.n	800fc66 <UART_RxISR_8BIT_FIFOEN+0x2a6>
 800fc58:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fc5c:	f003 0320 	and.w	r3, r3, #32
 800fc60:	2b00      	cmp	r3, #0
 800fc62:	f47f aed1 	bne.w	800fa08 <UART_RxISR_8BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800fc66:	687b      	ldr	r3, [r7, #4]
 800fc68:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fc6c:	f8a7 308a 	strh.w	r3, [r7, #138]	@ 0x8a
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800fc70:	f8b7 308a 	ldrh.w	r3, [r7, #138]	@ 0x8a
 800fc74:	2b00      	cmp	r3, #0
 800fc76:	d049      	beq.n	800fd0c <UART_RxISR_8BIT_FIFOEN+0x34c>
 800fc78:	687b      	ldr	r3, [r7, #4]
 800fc7a:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800fc7e:	f8b7 208a 	ldrh.w	r2, [r7, #138]	@ 0x8a
 800fc82:	429a      	cmp	r2, r3
 800fc84:	d242      	bcs.n	800fd0c <UART_RxISR_8BIT_FIFOEN+0x34c>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800fc86:	687b      	ldr	r3, [r7, #4]
 800fc88:	681b      	ldr	r3, [r3, #0]
 800fc8a:	3308      	adds	r3, #8
 800fc8c:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fc8e:	6a3b      	ldr	r3, [r7, #32]
 800fc90:	e853 3f00 	ldrex	r3, [r3]
 800fc94:	61fb      	str	r3, [r7, #28]
   return(result);
 800fc96:	69fb      	ldr	r3, [r7, #28]
 800fc98:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800fc9c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800fca0:	687b      	ldr	r3, [r7, #4]
 800fca2:	681b      	ldr	r3, [r3, #0]
 800fca4:	3308      	adds	r3, #8
 800fca6:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800fcaa:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800fcac:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fcae:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800fcb0:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800fcb2:	e841 2300 	strex	r3, r2, [r1]
 800fcb6:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800fcb8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800fcba:	2b00      	cmp	r3, #0
 800fcbc:	d1e3      	bne.n	800fc86 <UART_RxISR_8BIT_FIFOEN+0x2c6>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_8BIT;
 800fcbe:	687b      	ldr	r3, [r7, #4]
 800fcc0:	4a16      	ldr	r2, [pc, #88]	@ (800fd1c <UART_RxISR_8BIT_FIFOEN+0x35c>)
 800fcc2:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800fcc4:	687b      	ldr	r3, [r7, #4]
 800fcc6:	681b      	ldr	r3, [r3, #0]
 800fcc8:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fcca:	68fb      	ldr	r3, [r7, #12]
 800fccc:	e853 3f00 	ldrex	r3, [r3]
 800fcd0:	60bb      	str	r3, [r7, #8]
   return(result);
 800fcd2:	68bb      	ldr	r3, [r7, #8]
 800fcd4:	f043 0320 	orr.w	r3, r3, #32
 800fcd8:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800fcdc:	687b      	ldr	r3, [r7, #4]
 800fcde:	681b      	ldr	r3, [r3, #0]
 800fce0:	461a      	mov	r2, r3
 800fce2:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800fce6:	61bb      	str	r3, [r7, #24]
 800fce8:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fcea:	6979      	ldr	r1, [r7, #20]
 800fcec:	69ba      	ldr	r2, [r7, #24]
 800fcee:	e841 2300 	strex	r3, r2, [r1]
 800fcf2:	613b      	str	r3, [r7, #16]
   return(result);
 800fcf4:	693b      	ldr	r3, [r7, #16]
 800fcf6:	2b00      	cmp	r3, #0
 800fcf8:	d1e4      	bne.n	800fcc4 <UART_RxISR_8BIT_FIFOEN+0x304>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800fcfa:	e007      	b.n	800fd0c <UART_RxISR_8BIT_FIFOEN+0x34c>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800fcfc:	687b      	ldr	r3, [r7, #4]
 800fcfe:	681b      	ldr	r3, [r3, #0]
 800fd00:	699a      	ldr	r2, [r3, #24]
 800fd02:	687b      	ldr	r3, [r7, #4]
 800fd04:	681b      	ldr	r3, [r3, #0]
 800fd06:	f042 0208 	orr.w	r2, r2, #8
 800fd0a:	619a      	str	r2, [r3, #24]
}
 800fd0c:	bf00      	nop
 800fd0e:	37b0      	adds	r7, #176	@ 0xb0
 800fd10:	46bd      	mov	sp, r7
 800fd12:	bd80      	pop	{r7, pc}
 800fd14:	effffffe 	.word	0xeffffffe
 800fd18:	58000c00 	.word	0x58000c00
 800fd1c:	0800f651 	.word	0x0800f651

0800fd20 <UART_RxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800fd20:	b580      	push	{r7, lr}
 800fd22:	b0ae      	sub	sp, #184	@ 0xb8
 800fd24:	af00      	add	r7, sp, #0
 800fd26:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t  uhMask = huart->Mask;
 800fd28:	687b      	ldr	r3, [r7, #4]
 800fd2a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800fd2e:	f8a7 30b2 	strh.w	r3, [r7, #178]	@ 0xb2
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800fd32:	687b      	ldr	r3, [r7, #4]
 800fd34:	681b      	ldr	r3, [r3, #0]
 800fd36:	69db      	ldr	r3, [r3, #28]
 800fd38:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800fd3c:	687b      	ldr	r3, [r7, #4]
 800fd3e:	681b      	ldr	r3, [r3, #0]
 800fd40:	681b      	ldr	r3, [r3, #0]
 800fd42:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800fd46:	687b      	ldr	r3, [r7, #4]
 800fd48:	681b      	ldr	r3, [r3, #0]
 800fd4a:	689b      	ldr	r3, [r3, #8]
 800fd4c:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800fd50:	687b      	ldr	r3, [r7, #4]
 800fd52:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800fd56:	2b22      	cmp	r3, #34	@ 0x22
 800fd58:	f040 8184 	bne.w	8010064 <UART_RxISR_16BIT_FIFOEN+0x344>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800fd5c:	687b      	ldr	r3, [r7, #4]
 800fd5e:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800fd62:	f8a7 30a6 	strh.w	r3, [r7, #166]	@ 0xa6
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800fd66:	e127      	b.n	800ffb8 <UART_RxISR_16BIT_FIFOEN+0x298>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800fd68:	687b      	ldr	r3, [r7, #4]
 800fd6a:	681b      	ldr	r3, [r3, #0]
 800fd6c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800fd6e:	f8a7 30a4 	strh.w	r3, [r7, #164]	@ 0xa4
      tmp = (uint16_t *) huart->pRxBuffPtr ;
 800fd72:	687b      	ldr	r3, [r7, #4]
 800fd74:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fd76:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
      *tmp = (uint16_t)(uhdata & uhMask);
 800fd7a:	f8b7 20a4 	ldrh.w	r2, [r7, #164]	@ 0xa4
 800fd7e:	f8b7 30b2 	ldrh.w	r3, [r7, #178]	@ 0xb2
 800fd82:	4013      	ands	r3, r2
 800fd84:	b29a      	uxth	r2, r3
 800fd86:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800fd8a:	801a      	strh	r2, [r3, #0]
      huart->pRxBuffPtr += 2U;
 800fd8c:	687b      	ldr	r3, [r7, #4]
 800fd8e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fd90:	1c9a      	adds	r2, r3, #2
 800fd92:	687b      	ldr	r3, [r7, #4]
 800fd94:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800fd96:	687b      	ldr	r3, [r7, #4]
 800fd98:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fd9c:	b29b      	uxth	r3, r3
 800fd9e:	3b01      	subs	r3, #1
 800fda0:	b29a      	uxth	r2, r3
 800fda2:	687b      	ldr	r3, [r7, #4]
 800fda4:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800fda8:	687b      	ldr	r3, [r7, #4]
 800fdaa:	681b      	ldr	r3, [r3, #0]
 800fdac:	69db      	ldr	r3, [r3, #28]
 800fdae:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800fdb2:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800fdb6:	f003 0307 	and.w	r3, r3, #7
 800fdba:	2b00      	cmp	r3, #0
 800fdbc:	d053      	beq.n	800fe66 <UART_RxISR_16BIT_FIFOEN+0x146>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800fdbe:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800fdc2:	f003 0301 	and.w	r3, r3, #1
 800fdc6:	2b00      	cmp	r3, #0
 800fdc8:	d011      	beq.n	800fdee <UART_RxISR_16BIT_FIFOEN+0xce>
 800fdca:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fdce:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800fdd2:	2b00      	cmp	r3, #0
 800fdd4:	d00b      	beq.n	800fdee <UART_RxISR_16BIT_FIFOEN+0xce>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800fdd6:	687b      	ldr	r3, [r7, #4]
 800fdd8:	681b      	ldr	r3, [r3, #0]
 800fdda:	2201      	movs	r2, #1
 800fddc:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800fdde:	687b      	ldr	r3, [r7, #4]
 800fde0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fde4:	f043 0201 	orr.w	r2, r3, #1
 800fde8:	687b      	ldr	r3, [r7, #4]
 800fdea:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800fdee:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800fdf2:	f003 0302 	and.w	r3, r3, #2
 800fdf6:	2b00      	cmp	r3, #0
 800fdf8:	d011      	beq.n	800fe1e <UART_RxISR_16BIT_FIFOEN+0xfe>
 800fdfa:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800fdfe:	f003 0301 	and.w	r3, r3, #1
 800fe02:	2b00      	cmp	r3, #0
 800fe04:	d00b      	beq.n	800fe1e <UART_RxISR_16BIT_FIFOEN+0xfe>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800fe06:	687b      	ldr	r3, [r7, #4]
 800fe08:	681b      	ldr	r3, [r3, #0]
 800fe0a:	2202      	movs	r2, #2
 800fe0c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800fe0e:	687b      	ldr	r3, [r7, #4]
 800fe10:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fe14:	f043 0204 	orr.w	r2, r3, #4
 800fe18:	687b      	ldr	r3, [r7, #4]
 800fe1a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800fe1e:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800fe22:	f003 0304 	and.w	r3, r3, #4
 800fe26:	2b00      	cmp	r3, #0
 800fe28:	d011      	beq.n	800fe4e <UART_RxISR_16BIT_FIFOEN+0x12e>
 800fe2a:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 800fe2e:	f003 0301 	and.w	r3, r3, #1
 800fe32:	2b00      	cmp	r3, #0
 800fe34:	d00b      	beq.n	800fe4e <UART_RxISR_16BIT_FIFOEN+0x12e>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800fe36:	687b      	ldr	r3, [r7, #4]
 800fe38:	681b      	ldr	r3, [r3, #0]
 800fe3a:	2204      	movs	r2, #4
 800fe3c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800fe3e:	687b      	ldr	r3, [r7, #4]
 800fe40:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fe44:	f043 0202 	orr.w	r2, r3, #2
 800fe48:	687b      	ldr	r3, [r7, #4]
 800fe4a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800fe4e:	687b      	ldr	r3, [r7, #4]
 800fe50:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fe54:	2b00      	cmp	r3, #0
 800fe56:	d006      	beq.n	800fe66 <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800fe58:	6878      	ldr	r0, [r7, #4]
 800fe5a:	f7fe f961 	bl	800e120 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800fe5e:	687b      	ldr	r3, [r7, #4]
 800fe60:	2200      	movs	r2, #0
 800fe62:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800fe66:	687b      	ldr	r3, [r7, #4]
 800fe68:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fe6c:	b29b      	uxth	r3, r3
 800fe6e:	2b00      	cmp	r3, #0
 800fe70:	f040 80a2 	bne.w	800ffb8 <UART_RxISR_16BIT_FIFOEN+0x298>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800fe74:	687b      	ldr	r3, [r7, #4]
 800fe76:	681b      	ldr	r3, [r3, #0]
 800fe78:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fe7a:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800fe7c:	e853 3f00 	ldrex	r3, [r3]
 800fe80:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800fe82:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800fe84:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800fe88:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800fe8c:	687b      	ldr	r3, [r7, #4]
 800fe8e:	681b      	ldr	r3, [r3, #0]
 800fe90:	461a      	mov	r2, r3
 800fe92:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800fe96:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800fe9a:	67fa      	str	r2, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fe9c:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800fe9e:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800fea2:	e841 2300 	strex	r3, r2, [r1]
 800fea6:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800fea8:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800feaa:	2b00      	cmp	r3, #0
 800feac:	d1e2      	bne.n	800fe74 <UART_RxISR_16BIT_FIFOEN+0x154>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800feae:	687b      	ldr	r3, [r7, #4]
 800feb0:	681b      	ldr	r3, [r3, #0]
 800feb2:	3308      	adds	r3, #8
 800feb4:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800feb6:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800feb8:	e853 3f00 	ldrex	r3, [r3]
 800febc:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800febe:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800fec0:	4b6e      	ldr	r3, [pc, #440]	@ (801007c <UART_RxISR_16BIT_FIFOEN+0x35c>)
 800fec2:	4013      	ands	r3, r2
 800fec4:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800fec8:	687b      	ldr	r3, [r7, #4]
 800feca:	681b      	ldr	r3, [r3, #0]
 800fecc:	3308      	adds	r3, #8
 800fece:	f8d7 2098 	ldr.w	r2, [r7, #152]	@ 0x98
 800fed2:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800fed4:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fed6:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800fed8:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800feda:	e841 2300 	strex	r3, r2, [r1]
 800fede:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800fee0:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800fee2:	2b00      	cmp	r3, #0
 800fee4:	d1e3      	bne.n	800feae <UART_RxISR_16BIT_FIFOEN+0x18e>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800fee6:	687b      	ldr	r3, [r7, #4]
 800fee8:	2220      	movs	r2, #32
 800feea:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800feee:	687b      	ldr	r3, [r7, #4]
 800fef0:	2200      	movs	r2, #0
 800fef2:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fef4:	687b      	ldr	r3, [r7, #4]
 800fef6:	2200      	movs	r2, #0
 800fef8:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fefa:	687b      	ldr	r3, [r7, #4]
 800fefc:	681b      	ldr	r3, [r3, #0]
 800fefe:	4a60      	ldr	r2, [pc, #384]	@ (8010080 <UART_RxISR_16BIT_FIFOEN+0x360>)
 800ff00:	4293      	cmp	r3, r2
 800ff02:	d021      	beq.n	800ff48 <UART_RxISR_16BIT_FIFOEN+0x228>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800ff04:	687b      	ldr	r3, [r7, #4]
 800ff06:	681b      	ldr	r3, [r3, #0]
 800ff08:	685b      	ldr	r3, [r3, #4]
 800ff0a:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800ff0e:	2b00      	cmp	r3, #0
 800ff10:	d01a      	beq.n	800ff48 <UART_RxISR_16BIT_FIFOEN+0x228>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800ff12:	687b      	ldr	r3, [r7, #4]
 800ff14:	681b      	ldr	r3, [r3, #0]
 800ff16:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ff18:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800ff1a:	e853 3f00 	ldrex	r3, [r3]
 800ff1e:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800ff20:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800ff22:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800ff26:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800ff2a:	687b      	ldr	r3, [r7, #4]
 800ff2c:	681b      	ldr	r3, [r3, #0]
 800ff2e:	461a      	mov	r2, r3
 800ff30:	f8d7 3094 	ldr.w	r3, [r7, #148]	@ 0x94
 800ff34:	65bb      	str	r3, [r7, #88]	@ 0x58
 800ff36:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ff38:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800ff3a:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800ff3c:	e841 2300 	strex	r3, r2, [r1]
 800ff40:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800ff42:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800ff44:	2b00      	cmp	r3, #0
 800ff46:	d1e4      	bne.n	800ff12 <UART_RxISR_16BIT_FIFOEN+0x1f2>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800ff48:	687b      	ldr	r3, [r7, #4]
 800ff4a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800ff4c:	2b01      	cmp	r3, #1
 800ff4e:	d130      	bne.n	800ffb2 <UART_RxISR_16BIT_FIFOEN+0x292>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800ff50:	687b      	ldr	r3, [r7, #4]
 800ff52:	2200      	movs	r2, #0
 800ff54:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800ff56:	687b      	ldr	r3, [r7, #4]
 800ff58:	681b      	ldr	r3, [r3, #0]
 800ff5a:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ff5c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ff5e:	e853 3f00 	ldrex	r3, [r3]
 800ff62:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800ff64:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800ff66:	f023 0310 	bic.w	r3, r3, #16
 800ff6a:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800ff6e:	687b      	ldr	r3, [r7, #4]
 800ff70:	681b      	ldr	r3, [r3, #0]
 800ff72:	461a      	mov	r2, r3
 800ff74:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800ff78:	647b      	str	r3, [r7, #68]	@ 0x44
 800ff7a:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ff7c:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800ff7e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800ff80:	e841 2300 	strex	r3, r2, [r1]
 800ff84:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800ff86:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ff88:	2b00      	cmp	r3, #0
 800ff8a:	d1e4      	bne.n	800ff56 <UART_RxISR_16BIT_FIFOEN+0x236>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800ff8c:	687b      	ldr	r3, [r7, #4]
 800ff8e:	681b      	ldr	r3, [r3, #0]
 800ff90:	69db      	ldr	r3, [r3, #28]
 800ff92:	f003 0310 	and.w	r3, r3, #16
 800ff96:	2b10      	cmp	r3, #16
 800ff98:	d103      	bne.n	800ffa2 <UART_RxISR_16BIT_FIFOEN+0x282>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800ff9a:	687b      	ldr	r3, [r7, #4]
 800ff9c:	681b      	ldr	r3, [r3, #0]
 800ff9e:	2210      	movs	r2, #16
 800ffa0:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800ffa2:	687b      	ldr	r3, [r7, #4]
 800ffa4:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800ffa8:	4619      	mov	r1, r3
 800ffaa:	6878      	ldr	r0, [r7, #4]
 800ffac:	f7f4 fae8 	bl	8004580 <HAL_UARTEx_RxEventCallback>
 800ffb0:	e002      	b.n	800ffb8 <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800ffb2:	6878      	ldr	r0, [r7, #4]
 800ffb4:	f7f4 fada 	bl	800456c <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800ffb8:	f8b7 30a6 	ldrh.w	r3, [r7, #166]	@ 0xa6
 800ffbc:	2b00      	cmp	r3, #0
 800ffbe:	d006      	beq.n	800ffce <UART_RxISR_16BIT_FIFOEN+0x2ae>
 800ffc0:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 800ffc4:	f003 0320 	and.w	r3, r3, #32
 800ffc8:	2b00      	cmp	r3, #0
 800ffca:	f47f aecd 	bne.w	800fd68 <UART_RxISR_16BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800ffce:	687b      	ldr	r3, [r7, #4]
 800ffd0:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ffd4:	f8a7 308e 	strh.w	r3, [r7, #142]	@ 0x8e
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800ffd8:	f8b7 308e 	ldrh.w	r3, [r7, #142]	@ 0x8e
 800ffdc:	2b00      	cmp	r3, #0
 800ffde:	d049      	beq.n	8010074 <UART_RxISR_16BIT_FIFOEN+0x354>
 800ffe0:	687b      	ldr	r3, [r7, #4]
 800ffe2:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800ffe6:	f8b7 208e 	ldrh.w	r2, [r7, #142]	@ 0x8e
 800ffea:	429a      	cmp	r2, r3
 800ffec:	d242      	bcs.n	8010074 <UART_RxISR_16BIT_FIFOEN+0x354>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800ffee:	687b      	ldr	r3, [r7, #4]
 800fff0:	681b      	ldr	r3, [r3, #0]
 800fff2:	3308      	adds	r3, #8
 800fff4:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fff6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800fff8:	e853 3f00 	ldrex	r3, [r3]
 800fffc:	623b      	str	r3, [r7, #32]
   return(result);
 800fffe:	6a3b      	ldr	r3, [r7, #32]
 8010000:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 8010004:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 8010008:	687b      	ldr	r3, [r7, #4]
 801000a:	681b      	ldr	r3, [r3, #0]
 801000c:	3308      	adds	r3, #8
 801000e:	f8d7 2088 	ldr.w	r2, [r7, #136]	@ 0x88
 8010012:	633a      	str	r2, [r7, #48]	@ 0x30
 8010014:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 8010016:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8010018:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801001a:	e841 2300 	strex	r3, r2, [r1]
 801001e:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 8010020:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010022:	2b00      	cmp	r3, #0
 8010024:	d1e3      	bne.n	800ffee <UART_RxISR_16BIT_FIFOEN+0x2ce>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_16BIT;
 8010026:	687b      	ldr	r3, [r7, #4]
 8010028:	4a16      	ldr	r2, [pc, #88]	@ (8010084 <UART_RxISR_16BIT_FIFOEN+0x364>)
 801002a:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 801002c:	687b      	ldr	r3, [r7, #4]
 801002e:	681b      	ldr	r3, [r3, #0]
 8010030:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 8010032:	693b      	ldr	r3, [r7, #16]
 8010034:	e853 3f00 	ldrex	r3, [r3]
 8010038:	60fb      	str	r3, [r7, #12]
   return(result);
 801003a:	68fb      	ldr	r3, [r7, #12]
 801003c:	f043 0320 	orr.w	r3, r3, #32
 8010040:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010044:	687b      	ldr	r3, [r7, #4]
 8010046:	681b      	ldr	r3, [r3, #0]
 8010048:	461a      	mov	r2, r3
 801004a:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 801004e:	61fb      	str	r3, [r7, #28]
 8010050:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 8010052:	69b9      	ldr	r1, [r7, #24]
 8010054:	69fa      	ldr	r2, [r7, #28]
 8010056:	e841 2300 	strex	r3, r2, [r1]
 801005a:	617b      	str	r3, [r7, #20]
   return(result);
 801005c:	697b      	ldr	r3, [r7, #20]
 801005e:	2b00      	cmp	r3, #0
 8010060:	d1e4      	bne.n	801002c <UART_RxISR_16BIT_FIFOEN+0x30c>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 8010062:	e007      	b.n	8010074 <UART_RxISR_16BIT_FIFOEN+0x354>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 8010064:	687b      	ldr	r3, [r7, #4]
 8010066:	681b      	ldr	r3, [r3, #0]
 8010068:	699a      	ldr	r2, [r3, #24]
 801006a:	687b      	ldr	r3, [r7, #4]
 801006c:	681b      	ldr	r3, [r3, #0]
 801006e:	f042 0208 	orr.w	r2, r2, #8
 8010072:	619a      	str	r2, [r3, #24]
}
 8010074:	bf00      	nop
 8010076:	37b8      	adds	r7, #184	@ 0xb8
 8010078:	46bd      	mov	sp, r7
 801007a:	bd80      	pop	{r7, pc}
 801007c:	effffffe 	.word	0xeffffffe
 8010080:	58000c00 	.word	0x58000c00
 8010084:	0800f809 	.word	0x0800f809

08010088 <HAL_UARTEx_WakeupCallback>:
  * @brief UART wakeup from Stop mode callback.
  * @param huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
 8010088:	b480      	push	{r7}
 801008a:	b083      	sub	sp, #12
 801008c:	af00      	add	r7, sp, #0
 801008e:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
   */
}
 8010090:	bf00      	nop
 8010092:	370c      	adds	r7, #12
 8010094:	46bd      	mov	sp, r7
 8010096:	f85d 7b04 	ldr.w	r7, [sp], #4
 801009a:	4770      	bx	lr

0801009c <HAL_UARTEx_RxFifoFullCallback>:
  * @brief  UART RX Fifo full callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
 801009c:	b480      	push	{r7}
 801009e:	b083      	sub	sp, #12
 80100a0:	af00      	add	r7, sp, #0
 80100a2:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
   */
}
 80100a4:	bf00      	nop
 80100a6:	370c      	adds	r7, #12
 80100a8:	46bd      	mov	sp, r7
 80100aa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80100ae:	4770      	bx	lr

080100b0 <HAL_UARTEx_TxFifoEmptyCallback>:
  * @brief  UART TX Fifo empty callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
 80100b0:	b480      	push	{r7}
 80100b2:	b083      	sub	sp, #12
 80100b4:	af00      	add	r7, sp, #0
 80100b6:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
   */
}
 80100b8:	bf00      	nop
 80100ba:	370c      	adds	r7, #12
 80100bc:	46bd      	mov	sp, r7
 80100be:	f85d 7b04 	ldr.w	r7, [sp], #4
 80100c2:	4770      	bx	lr

080100c4 <HAL_UARTEx_DisableFifoMode>:
  * @brief  Disable the FIFO mode.
  * @param huart      UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
 80100c4:	b480      	push	{r7}
 80100c6:	b085      	sub	sp, #20
 80100c8:	af00      	add	r7, sp, #0
 80100ca:	6078      	str	r0, [r7, #4]

  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));

  /* Process Locked */
  __HAL_LOCK(huart);
 80100cc:	687b      	ldr	r3, [r7, #4]
 80100ce:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 80100d2:	2b01      	cmp	r3, #1
 80100d4:	d101      	bne.n	80100da <HAL_UARTEx_DisableFifoMode+0x16>
 80100d6:	2302      	movs	r3, #2
 80100d8:	e027      	b.n	801012a <HAL_UARTEx_DisableFifoMode+0x66>
 80100da:	687b      	ldr	r3, [r7, #4]
 80100dc:	2201      	movs	r2, #1
 80100de:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 80100e2:	687b      	ldr	r3, [r7, #4]
 80100e4:	2224      	movs	r2, #36	@ 0x24
 80100e6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 80100ea:	687b      	ldr	r3, [r7, #4]
 80100ec:	681b      	ldr	r3, [r3, #0]
 80100ee:	681b      	ldr	r3, [r3, #0]
 80100f0:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 80100f2:	687b      	ldr	r3, [r7, #4]
 80100f4:	681b      	ldr	r3, [r3, #0]
 80100f6:	681a      	ldr	r2, [r3, #0]
 80100f8:	687b      	ldr	r3, [r7, #4]
 80100fa:	681b      	ldr	r3, [r3, #0]
 80100fc:	f022 0201 	bic.w	r2, r2, #1
 8010100:	601a      	str	r2, [r3, #0]

  /* Enable FIFO mode */
  CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
 8010102:	68fb      	ldr	r3, [r7, #12]
 8010104:	f023 5300 	bic.w	r3, r3, #536870912	@ 0x20000000
 8010108:	60fb      	str	r3, [r7, #12]
  huart->FifoMode = UART_FIFOMODE_DISABLE;
 801010a:	687b      	ldr	r3, [r7, #4]
 801010c:	2200      	movs	r2, #0
 801010e:	665a      	str	r2, [r3, #100]	@ 0x64

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 8010110:	687b      	ldr	r3, [r7, #4]
 8010112:	681b      	ldr	r3, [r3, #0]
 8010114:	68fa      	ldr	r2, [r7, #12]
 8010116:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 8010118:	687b      	ldr	r3, [r7, #4]
 801011a:	2220      	movs	r2, #32
 801011c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 8010120:	687b      	ldr	r3, [r7, #4]
 8010122:	2200      	movs	r2, #0
 8010124:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8010128:	2300      	movs	r3, #0
}
 801012a:	4618      	mov	r0, r3
 801012c:	3714      	adds	r7, #20
 801012e:	46bd      	mov	sp, r7
 8010130:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010134:	4770      	bx	lr

08010136 <HAL_UARTEx_SetTxFifoThreshold>:
  *            @arg @ref UART_TXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_TXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 8010136:	b580      	push	{r7, lr}
 8010138:	b084      	sub	sp, #16
 801013a:	af00      	add	r7, sp, #0
 801013c:	6078      	str	r0, [r7, #4]
 801013e:	6039      	str	r1, [r7, #0]
  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 8010140:	687b      	ldr	r3, [r7, #4]
 8010142:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 8010146:	2b01      	cmp	r3, #1
 8010148:	d101      	bne.n	801014e <HAL_UARTEx_SetTxFifoThreshold+0x18>
 801014a:	2302      	movs	r3, #2
 801014c:	e02d      	b.n	80101aa <HAL_UARTEx_SetTxFifoThreshold+0x74>
 801014e:	687b      	ldr	r3, [r7, #4]
 8010150:	2201      	movs	r2, #1
 8010152:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 8010156:	687b      	ldr	r3, [r7, #4]
 8010158:	2224      	movs	r2, #36	@ 0x24
 801015a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 801015e:	687b      	ldr	r3, [r7, #4]
 8010160:	681b      	ldr	r3, [r3, #0]
 8010162:	681b      	ldr	r3, [r3, #0]
 8010164:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 8010166:	687b      	ldr	r3, [r7, #4]
 8010168:	681b      	ldr	r3, [r3, #0]
 801016a:	681a      	ldr	r2, [r3, #0]
 801016c:	687b      	ldr	r3, [r7, #4]
 801016e:	681b      	ldr	r3, [r3, #0]
 8010170:	f022 0201 	bic.w	r2, r2, #1
 8010174:	601a      	str	r2, [r3, #0]

  /* Update TX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
 8010176:	687b      	ldr	r3, [r7, #4]
 8010178:	681b      	ldr	r3, [r3, #0]
 801017a:	689b      	ldr	r3, [r3, #8]
 801017c:	f023 4160 	bic.w	r1, r3, #3758096384	@ 0xe0000000
 8010180:	687b      	ldr	r3, [r7, #4]
 8010182:	681b      	ldr	r3, [r3, #0]
 8010184:	683a      	ldr	r2, [r7, #0]
 8010186:	430a      	orrs	r2, r1
 8010188:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 801018a:	6878      	ldr	r0, [r7, #4]
 801018c:	f000 f8a0 	bl	80102d0 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 8010190:	687b      	ldr	r3, [r7, #4]
 8010192:	681b      	ldr	r3, [r3, #0]
 8010194:	68fa      	ldr	r2, [r7, #12]
 8010196:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 8010198:	687b      	ldr	r3, [r7, #4]
 801019a:	2220      	movs	r2, #32
 801019c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 80101a0:	687b      	ldr	r3, [r7, #4]
 80101a2:	2200      	movs	r2, #0
 80101a4:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 80101a8:	2300      	movs	r3, #0
}
 80101aa:	4618      	mov	r0, r3
 80101ac:	3710      	adds	r7, #16
 80101ae:	46bd      	mov	sp, r7
 80101b0:	bd80      	pop	{r7, pc}

080101b2 <HAL_UARTEx_SetRxFifoThreshold>:
  *            @arg @ref UART_RXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_RXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 80101b2:	b580      	push	{r7, lr}
 80101b4:	b084      	sub	sp, #16
 80101b6:	af00      	add	r7, sp, #0
 80101b8:	6078      	str	r0, [r7, #4]
 80101ba:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 80101bc:	687b      	ldr	r3, [r7, #4]
 80101be:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 80101c2:	2b01      	cmp	r3, #1
 80101c4:	d101      	bne.n	80101ca <HAL_UARTEx_SetRxFifoThreshold+0x18>
 80101c6:	2302      	movs	r3, #2
 80101c8:	e02d      	b.n	8010226 <HAL_UARTEx_SetRxFifoThreshold+0x74>
 80101ca:	687b      	ldr	r3, [r7, #4]
 80101cc:	2201      	movs	r2, #1
 80101ce:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 80101d2:	687b      	ldr	r3, [r7, #4]
 80101d4:	2224      	movs	r2, #36	@ 0x24
 80101d6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 80101da:	687b      	ldr	r3, [r7, #4]
 80101dc:	681b      	ldr	r3, [r3, #0]
 80101de:	681b      	ldr	r3, [r3, #0]
 80101e0:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 80101e2:	687b      	ldr	r3, [r7, #4]
 80101e4:	681b      	ldr	r3, [r3, #0]
 80101e6:	681a      	ldr	r2, [r3, #0]
 80101e8:	687b      	ldr	r3, [r7, #4]
 80101ea:	681b      	ldr	r3, [r3, #0]
 80101ec:	f022 0201 	bic.w	r2, r2, #1
 80101f0:	601a      	str	r2, [r3, #0]

  /* Update RX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
 80101f2:	687b      	ldr	r3, [r7, #4]
 80101f4:	681b      	ldr	r3, [r3, #0]
 80101f6:	689b      	ldr	r3, [r3, #8]
 80101f8:	f023 6160 	bic.w	r1, r3, #234881024	@ 0xe000000
 80101fc:	687b      	ldr	r3, [r7, #4]
 80101fe:	681b      	ldr	r3, [r3, #0]
 8010200:	683a      	ldr	r2, [r7, #0]
 8010202:	430a      	orrs	r2, r1
 8010204:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 8010206:	6878      	ldr	r0, [r7, #4]
 8010208:	f000 f862 	bl	80102d0 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 801020c:	687b      	ldr	r3, [r7, #4]
 801020e:	681b      	ldr	r3, [r3, #0]
 8010210:	68fa      	ldr	r2, [r7, #12]
 8010212:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 8010214:	687b      	ldr	r3, [r7, #4]
 8010216:	2220      	movs	r2, #32
 8010218:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 801021c:	687b      	ldr	r3, [r7, #4]
 801021e:	2200      	movs	r2, #0
 8010220:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8010224:	2300      	movs	r3, #0
}
 8010226:	4618      	mov	r0, r3
 8010228:	3710      	adds	r7, #16
 801022a:	46bd      	mov	sp, r7
 801022c:	bd80      	pop	{r7, pc}

0801022e <HAL_UARTEx_ReceiveToIdle_IT>:
  * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
  * @param Size  Amount of data elements (uint8_t or uint16_t) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 801022e:	b580      	push	{r7, lr}
 8010230:	b08c      	sub	sp, #48	@ 0x30
 8010232:	af00      	add	r7, sp, #0
 8010234:	60f8      	str	r0, [r7, #12]
 8010236:	60b9      	str	r1, [r7, #8]
 8010238:	4613      	mov	r3, r2
 801023a:	80fb      	strh	r3, [r7, #6]
  HAL_StatusTypeDef status = HAL_OK;
 801023c:	2300      	movs	r3, #0
 801023e:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f

  /* Check that a Rx process is not already ongoing */
  if (huart->RxState == HAL_UART_STATE_READY)
 8010242:	68fb      	ldr	r3, [r7, #12]
 8010244:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 8010248:	2b20      	cmp	r3, #32
 801024a:	d13b      	bne.n	80102c4 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
  {
    if ((pData == NULL) || (Size == 0U))
 801024c:	68bb      	ldr	r3, [r7, #8]
 801024e:	2b00      	cmp	r3, #0
 8010250:	d002      	beq.n	8010258 <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
 8010252:	88fb      	ldrh	r3, [r7, #6]
 8010254:	2b00      	cmp	r3, #0
 8010256:	d101      	bne.n	801025c <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
    {
      return HAL_ERROR;
 8010258:	2301      	movs	r3, #1
 801025a:	e034      	b.n	80102c6 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
    }

    /* Set Reception type to reception till IDLE Event*/
    huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
 801025c:	68fb      	ldr	r3, [r7, #12]
 801025e:	2201      	movs	r2, #1
 8010260:	66da      	str	r2, [r3, #108]	@ 0x6c
    huart->RxEventType = HAL_UART_RXEVENT_TC;
 8010262:	68fb      	ldr	r3, [r7, #12]
 8010264:	2200      	movs	r2, #0
 8010266:	671a      	str	r2, [r3, #112]	@ 0x70

    (void)UART_Start_Receive_IT(huart, pData, Size);
 8010268:	88fb      	ldrh	r3, [r7, #6]
 801026a:	461a      	mov	r2, r3
 801026c:	68b9      	ldr	r1, [r7, #8]
 801026e:	68f8      	ldr	r0, [r7, #12]
 8010270:	f7fe fe82 	bl	800ef78 <UART_Start_Receive_IT>

    if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 8010274:	68fb      	ldr	r3, [r7, #12]
 8010276:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8010278:	2b01      	cmp	r3, #1
 801027a:	d11d      	bne.n	80102b8 <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 801027c:	68fb      	ldr	r3, [r7, #12]
 801027e:	681b      	ldr	r3, [r3, #0]
 8010280:	2210      	movs	r2, #16
 8010282:	621a      	str	r2, [r3, #32]
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 8010284:	68fb      	ldr	r3, [r7, #12]
 8010286:	681b      	ldr	r3, [r3, #0]
 8010288:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 801028a:	69bb      	ldr	r3, [r7, #24]
 801028c:	e853 3f00 	ldrex	r3, [r3]
 8010290:	617b      	str	r3, [r7, #20]
   return(result);
 8010292:	697b      	ldr	r3, [r7, #20]
 8010294:	f043 0310 	orr.w	r3, r3, #16
 8010298:	62bb      	str	r3, [r7, #40]	@ 0x28
 801029a:	68fb      	ldr	r3, [r7, #12]
 801029c:	681b      	ldr	r3, [r3, #0]
 801029e:	461a      	mov	r2, r3
 80102a0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80102a2:	627b      	str	r3, [r7, #36]	@ 0x24
 80102a4:	623a      	str	r2, [r7, #32]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 80102a6:	6a39      	ldr	r1, [r7, #32]
 80102a8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80102aa:	e841 2300 	strex	r3, r2, [r1]
 80102ae:	61fb      	str	r3, [r7, #28]
   return(result);
 80102b0:	69fb      	ldr	r3, [r7, #28]
 80102b2:	2b00      	cmp	r3, #0
 80102b4:	d1e6      	bne.n	8010284 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
 80102b6:	e002      	b.n	80102be <HAL_UARTEx_ReceiveToIdle_IT+0x90>
    {
      /* In case of errors already pending when reception is started,
         Interrupts may have already been raised and lead to reception abortion.
         (Overrun error for instance).
         In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
      status = HAL_ERROR;
 80102b8:	2301      	movs	r3, #1
 80102ba:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
    }

    return status;
 80102be:	f897 302f 	ldrb.w	r3, [r7, #47]	@ 0x2f
 80102c2:	e000      	b.n	80102c6 <HAL_UARTEx_ReceiveToIdle_IT+0x98>
  }
  else
  {
    return HAL_BUSY;
 80102c4:	2302      	movs	r3, #2
  }
}
 80102c6:	4618      	mov	r0, r3
 80102c8:	3730      	adds	r7, #48	@ 0x30
 80102ca:	46bd      	mov	sp, r7
 80102cc:	bd80      	pop	{r7, pc}
	...

080102d0 <UARTEx_SetNbDataToProcess>:
  *       the UART configuration registers.
  * @param huart UART handle.
  * @retval None
  */
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
 80102d0:	b480      	push	{r7}
 80102d2:	b085      	sub	sp, #20
 80102d4:	af00      	add	r7, sp, #0
 80102d6:	6078      	str	r0, [r7, #4]
  uint8_t rx_fifo_threshold;
  uint8_t tx_fifo_threshold;
  static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
  static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};

  if (huart->FifoMode == UART_FIFOMODE_DISABLE)
 80102d8:	687b      	ldr	r3, [r7, #4]
 80102da:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80102dc:	2b00      	cmp	r3, #0
 80102de:	d108      	bne.n	80102f2 <UARTEx_SetNbDataToProcess+0x22>
  {
    huart->NbTxDataToProcess = 1U;
 80102e0:	687b      	ldr	r3, [r7, #4]
 80102e2:	2201      	movs	r2, #1
 80102e4:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = 1U;
 80102e8:	687b      	ldr	r3, [r7, #4]
 80102ea:	2201      	movs	r2, #1
 80102ec:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
                               (uint16_t)denominator[tx_fifo_threshold];
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
                               (uint16_t)denominator[rx_fifo_threshold];
  }
}
 80102f0:	e031      	b.n	8010356 <UARTEx_SetNbDataToProcess+0x86>
    rx_fifo_depth = RX_FIFO_DEPTH;
 80102f2:	2310      	movs	r3, #16
 80102f4:	73fb      	strb	r3, [r7, #15]
    tx_fifo_depth = TX_FIFO_DEPTH;
 80102f6:	2310      	movs	r3, #16
 80102f8:	73bb      	strb	r3, [r7, #14]
    rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
 80102fa:	687b      	ldr	r3, [r7, #4]
 80102fc:	681b      	ldr	r3, [r3, #0]
 80102fe:	689b      	ldr	r3, [r3, #8]
 8010300:	0e5b      	lsrs	r3, r3, #25
 8010302:	b2db      	uxtb	r3, r3
 8010304:	f003 0307 	and.w	r3, r3, #7
 8010308:	737b      	strb	r3, [r7, #13]
    tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
 801030a:	687b      	ldr	r3, [r7, #4]
 801030c:	681b      	ldr	r3, [r3, #0]
 801030e:	689b      	ldr	r3, [r3, #8]
 8010310:	0f5b      	lsrs	r3, r3, #29
 8010312:	b2db      	uxtb	r3, r3
 8010314:	f003 0307 	and.w	r3, r3, #7
 8010318:	733b      	strb	r3, [r7, #12]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 801031a:	7bbb      	ldrb	r3, [r7, #14]
 801031c:	7b3a      	ldrb	r2, [r7, #12]
 801031e:	4911      	ldr	r1, [pc, #68]	@ (8010364 <UARTEx_SetNbDataToProcess+0x94>)
 8010320:	5c8a      	ldrb	r2, [r1, r2]
 8010322:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[tx_fifo_threshold];
 8010326:	7b3a      	ldrb	r2, [r7, #12]
 8010328:	490f      	ldr	r1, [pc, #60]	@ (8010368 <UARTEx_SetNbDataToProcess+0x98>)
 801032a:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 801032c:	fb93 f3f2 	sdiv	r3, r3, r2
 8010330:	b29a      	uxth	r2, r3
 8010332:	687b      	ldr	r3, [r7, #4]
 8010334:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 8010338:	7bfb      	ldrb	r3, [r7, #15]
 801033a:	7b7a      	ldrb	r2, [r7, #13]
 801033c:	4909      	ldr	r1, [pc, #36]	@ (8010364 <UARTEx_SetNbDataToProcess+0x94>)
 801033e:	5c8a      	ldrb	r2, [r1, r2]
 8010340:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[rx_fifo_threshold];
 8010344:	7b7a      	ldrb	r2, [r7, #13]
 8010346:	4908      	ldr	r1, [pc, #32]	@ (8010368 <UARTEx_SetNbDataToProcess+0x98>)
 8010348:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 801034a:	fb93 f3f2 	sdiv	r3, r3, r2
 801034e:	b29a      	uxth	r2, r3
 8010350:	687b      	ldr	r3, [r7, #4]
 8010352:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
}
 8010356:	bf00      	nop
 8010358:	3714      	adds	r7, #20
 801035a:	46bd      	mov	sp, r7
 801035c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010360:	4770      	bx	lr
 8010362:	bf00      	nop
 8010364:	0803199c 	.word	0x0803199c
 8010368:	080319a4 	.word	0x080319a4

0801036c <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
 * This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
 801036c:	b580      	push	{r7, lr}
 801036e:	b082      	sub	sp, #8
 8010370:	af00      	add	r7, sp, #0
 8010372:	6078      	str	r0, [r7, #4]
 8010374:	6039      	str	r1, [r7, #0]
	tcpip_init(tcpip_init_done, arg);
 8010376:	6839      	ldr	r1, [r7, #0]
 8010378:	6878      	ldr	r0, [r7, #4]
 801037a:	f009 fa4b 	bl	8019814 <tcpip_init>
	LOCK_TCPIP_CORE();
 801037e:	f000 fda1 	bl	8010ec4 <sys_lock_tcpip_core>
}
 8010382:	bf00      	nop
 8010384:	3708      	adds	r7, #8
 8010386:	46bd      	mov	sp, r7
 8010388:	bd80      	pop	{r7, pc}
	...

0801038c <is_link_up>:
#define tcpip_init tcpip_init_wrap

uint8_t is_link_up(void)
{
 801038c:	b480      	push	{r7}
 801038e:	af00      	add	r7, sp, #0
	return netif_is_up(&gnetif);
 8010390:	4b05      	ldr	r3, [pc, #20]	@ (80103a8 <is_link_up+0x1c>)
 8010392:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010396:	f003 0301 	and.w	r3, r3, #1
 801039a:	b2db      	uxtb	r3, r3
}
 801039c:	4618      	mov	r0, r3
 801039e:	46bd      	mov	sp, r7
 80103a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80103a4:	4770      	bx	lr
 80103a6:	bf00      	nop
 80103a8:	24002254 	.word	0x24002254

080103ac <MX_LWIP_Init>:

/**
  * LwIP initialization function
  */
void MX_LWIP_Init(void)
{
 80103ac:	b580      	push	{r7, lr}
 80103ae:	b084      	sub	sp, #16
 80103b0:	af04      	add	r7, sp, #16
  /* IP addresses initialization without DHCP (IPv4) */
	ipaddr_aton(STATIC_IP, &ipaddr);
	ipaddr_aton(STATIC_MASK, &netmask);
	ipaddr_aton(STATIC_GW, &gw);
#else
    ip_addr_set_zero_ip4(&ipaddr);
 80103b2:	4b27      	ldr	r3, [pc, #156]	@ (8010450 <MX_LWIP_Init+0xa4>)
 80103b4:	2200      	movs	r2, #0
 80103b6:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&netmask);
 80103b8:	4b26      	ldr	r3, [pc, #152]	@ (8010454 <MX_LWIP_Init+0xa8>)
 80103ba:	2200      	movs	r2, #0
 80103bc:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&gw);
 80103be:	4b26      	ldr	r3, [pc, #152]	@ (8010458 <MX_LWIP_Init+0xac>)
 80103c0:	2200      	movs	r2, #0
 80103c2:	601a      	str	r2, [r3, #0]
#endif
	/* USER CODE END IP_ADDRESSES */

  /* Initilialize the LwIP stack with RTOS */
  tcpip_init( NULL, NULL );
 80103c4:	2100      	movs	r1, #0
 80103c6:	2000      	movs	r0, #0
 80103c8:	f7ff ffd0 	bl	801036c <tcpip_init_wrap>
//  IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
//  IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
//  IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);

  /* add the network interface (IPv4/IPv6) with RTOS */
  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 80103cc:	4b23      	ldr	r3, [pc, #140]	@ (801045c <MX_LWIP_Init+0xb0>)
 80103ce:	9302      	str	r3, [sp, #8]
 80103d0:	4b23      	ldr	r3, [pc, #140]	@ (8010460 <MX_LWIP_Init+0xb4>)
 80103d2:	9301      	str	r3, [sp, #4]
 80103d4:	2300      	movs	r3, #0
 80103d6:	9300      	str	r3, [sp, #0]
 80103d8:	4b1f      	ldr	r3, [pc, #124]	@ (8010458 <MX_LWIP_Init+0xac>)
 80103da:	4a1e      	ldr	r2, [pc, #120]	@ (8010454 <MX_LWIP_Init+0xa8>)
 80103dc:	491c      	ldr	r1, [pc, #112]	@ (8010450 <MX_LWIP_Init+0xa4>)
 80103de:	4821      	ldr	r0, [pc, #132]	@ (8010464 <MX_LWIP_Init+0xb8>)
 80103e0:	f00a f888 	bl	801a4f4 <netif_add>

  /* Registers the default network interface */
  netif_set_default(&gnetif);
 80103e4:	481f      	ldr	r0, [pc, #124]	@ (8010464 <MX_LWIP_Init+0xb8>)
 80103e6:	f00a fa43 	bl	801a870 <netif_set_default>

  if (netif_is_link_up(&gnetif))
 80103ea:	4b1e      	ldr	r3, [pc, #120]	@ (8010464 <MX_LWIP_Init+0xb8>)
 80103ec:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80103f0:	089b      	lsrs	r3, r3, #2
 80103f2:	f003 0301 	and.w	r3, r3, #1
 80103f6:	b2db      	uxtb	r3, r3
 80103f8:	2b00      	cmp	r3, #0
 80103fa:	d003      	beq.n	8010404 <MX_LWIP_Init+0x58>
  {
    /* When the netif is fully configured this function must be called */
    netif_set_up(&gnetif);
 80103fc:	4819      	ldr	r0, [pc, #100]	@ (8010464 <MX_LWIP_Init+0xb8>)
 80103fe:	f00a fa47 	bl	801a890 <netif_set_up>
 8010402:	e002      	b.n	801040a <MX_LWIP_Init+0x5e>
  }
  else
  {
    /* When the netif link is down this function must be called */
    netif_set_down(&gnetif);
 8010404:	4817      	ldr	r0, [pc, #92]	@ (8010464 <MX_LWIP_Init+0xb8>)
 8010406:	f00a fab1 	bl	801a96c <netif_set_down>
  }

  /* Set the link callback function, this function is called on change of link status*/
  netif_set_link_callback(&gnetif, ethernet_link_status_updated);
 801040a:	4917      	ldr	r1, [pc, #92]	@ (8010468 <MX_LWIP_Init+0xbc>)
 801040c:	4815      	ldr	r0, [pc, #84]	@ (8010464 <MX_LWIP_Init+0xb8>)
 801040e:	f00a fb4d 	bl	801aaac <netif_set_link_callback>

  /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 8010412:	2224      	movs	r2, #36	@ 0x24
 8010414:	2100      	movs	r1, #0
 8010416:	4815      	ldr	r0, [pc, #84]	@ (801046c <MX_LWIP_Init+0xc0>)
 8010418:	f01a fb32 	bl	802aa80 <memset>
  attributes.name = "EthLink";
 801041c:	4b13      	ldr	r3, [pc, #76]	@ (801046c <MX_LWIP_Init+0xc0>)
 801041e:	4a14      	ldr	r2, [pc, #80]	@ (8010470 <MX_LWIP_Init+0xc4>)
 8010420:	601a      	str	r2, [r3, #0]
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
 8010422:	4b12      	ldr	r3, [pc, #72]	@ (801046c <MX_LWIP_Init+0xc0>)
 8010424:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8010428:	615a      	str	r2, [r3, #20]
  attributes.priority = osPriorityBelowNormal;
 801042a:	4b10      	ldr	r3, [pc, #64]	@ (801046c <MX_LWIP_Init+0xc0>)
 801042c:	2210      	movs	r2, #16
 801042e:	619a      	str	r2, [r3, #24]
  osThreadNew(ethernet_link_thread, &gnetif, &attributes);
 8010430:	4a0e      	ldr	r2, [pc, #56]	@ (801046c <MX_LWIP_Init+0xc0>)
 8010432:	490c      	ldr	r1, [pc, #48]	@ (8010464 <MX_LWIP_Init+0xb8>)
 8010434:	480f      	ldr	r0, [pc, #60]	@ (8010474 <MX_LWIP_Init+0xc8>)
 8010436:	f000 feee 	bl	8011216 <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 3 */
  /* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
  netif_set_up(&gnetif);
 801043a:	480a      	ldr	r0, [pc, #40]	@ (8010464 <MX_LWIP_Init+0xb8>)
 801043c:	f00a fa28 	bl	801a890 <netif_set_up>
  dhcp_start(&gnetif);
 8010440:	4808      	ldr	r0, [pc, #32]	@ (8010464 <MX_LWIP_Init+0xb8>)
 8010442:	f012 fd15 	bl	8022e70 <dhcp_start>
#else
  netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
  /* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
  UNLOCK_TCPIP_CORE();
 8010446:	f000 fd4d 	bl	8010ee4 <sys_unlock_tcpip_core>

/* USER CODE END 3 */
}
 801044a:	bf00      	nop
 801044c:	46bd      	mov	sp, r7
 801044e:	bd80      	pop	{r7, pc}
 8010450:	2400228c 	.word	0x2400228c
 8010454:	24002290 	.word	0x24002290
 8010458:	24002294 	.word	0x24002294
 801045c:	0801972d 	.word	0x0801972d
 8010460:	0801092d 	.word	0x0801092d
 8010464:	24002254 	.word	0x24002254
 8010468:	08010479 	.word	0x08010479
 801046c:	24002298 	.word	0x24002298
 8010470:	0802d8bc 	.word	0x0802d8bc
 8010474:	08010bfd 	.word	0x08010bfd

08010478 <ethernet_link_status_updated>:
  * @brief  Notify the User about the network interface config status
  * @param  netif: the network interface
  * @retval None
  */
static void ethernet_link_status_updated(struct netif *netif)
{
 8010478:	b480      	push	{r7}
 801047a:	b083      	sub	sp, #12
 801047c:	af00      	add	r7, sp, #0
 801047e:	6078      	str	r0, [r7, #4]
  else /* netif is down */
  {
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
  }
}
 8010480:	bf00      	nop
 8010482:	370c      	adds	r7, #12
 8010484:	46bd      	mov	sp, r7
 8010486:	f85d 7b04 	ldr.w	r7, [sp], #4
 801048a:	4770      	bx	lr

0801048c <HAL_ETH_RxCpltCallback>:
  * @brief  Ethernet Rx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 801048c:	b580      	push	{r7, lr}
 801048e:	b082      	sub	sp, #8
 8010490:	af00      	add	r7, sp, #0
 8010492:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(RxPktSemaphore);
 8010494:	4b04      	ldr	r3, [pc, #16]	@ (80104a8 <HAL_ETH_RxCpltCallback+0x1c>)
 8010496:	681b      	ldr	r3, [r3, #0]
 8010498:	4618      	mov	r0, r3
 801049a:	f001 fa55 	bl	8011948 <osSemaphoreRelease>
}
 801049e:	bf00      	nop
 80104a0:	3708      	adds	r7, #8
 80104a2:	46bd      	mov	sp, r7
 80104a4:	bd80      	pop	{r7, pc}
 80104a6:	bf00      	nop
 80104a8:	240022c4 	.word	0x240022c4

080104ac <HAL_ETH_TxCpltCallback>:
  * @brief  Ethernet Tx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 80104ac:	b580      	push	{r7, lr}
 80104ae:	b082      	sub	sp, #8
 80104b0:	af00      	add	r7, sp, #0
 80104b2:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(TxPktSemaphore);
 80104b4:	4b04      	ldr	r3, [pc, #16]	@ (80104c8 <HAL_ETH_TxCpltCallback+0x1c>)
 80104b6:	681b      	ldr	r3, [r3, #0]
 80104b8:	4618      	mov	r0, r3
 80104ba:	f001 fa45 	bl	8011948 <osSemaphoreRelease>
}
 80104be:	bf00      	nop
 80104c0:	3708      	adds	r7, #8
 80104c2:	46bd      	mov	sp, r7
 80104c4:	bd80      	pop	{r7, pc}
 80104c6:	bf00      	nop
 80104c8:	240022c8 	.word	0x240022c8

080104cc <HAL_ETH_ErrorCallback>:
  * @brief  Ethernet DMA transfer error callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
 80104cc:	b580      	push	{r7, lr}
 80104ce:	b082      	sub	sp, #8
 80104d0:	af00      	add	r7, sp, #0
 80104d2:	6078      	str	r0, [r7, #4]
  if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
 80104d4:	6878      	ldr	r0, [r7, #4]
 80104d6:	f7f8 fe7d 	bl	80091d4 <HAL_ETH_GetDMAError>
 80104da:	4603      	mov	r3, r0
 80104dc:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80104e0:	2b80      	cmp	r3, #128	@ 0x80
 80104e2:	d104      	bne.n	80104ee <HAL_ETH_ErrorCallback+0x22>
  {
     osSemaphoreRelease(RxPktSemaphore);
 80104e4:	4b04      	ldr	r3, [pc, #16]	@ (80104f8 <HAL_ETH_ErrorCallback+0x2c>)
 80104e6:	681b      	ldr	r3, [r3, #0]
 80104e8:	4618      	mov	r0, r3
 80104ea:	f001 fa2d 	bl	8011948 <osSemaphoreRelease>
  }
}
 80104ee:	bf00      	nop
 80104f0:	3708      	adds	r7, #8
 80104f2:	46bd      	mov	sp, r7
 80104f4:	bd80      	pop	{r7, pc}
 80104f6:	bf00      	nop
 80104f8:	240022c4 	.word	0x240022c4

080104fc <low_level_init>:
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void low_level_init(struct netif *netif)
{
 80104fc:	b580      	push	{r7, lr}
 80104fe:	b0aa      	sub	sp, #168	@ 0xa8
 8010500:	af00      	add	r7, sp, #0
 8010502:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
 8010504:	2300      	movs	r3, #0
 8010506:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  uint32_t duplex, speed = 0;
 801050a:	2300      	movs	r3, #0
 801050c:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
  int32_t PHYLinkState = 0;
 8010510:	2300      	movs	r3, #0
 8010512:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
  ETH_MACConfigTypeDef MACConf = {0};
 8010516:	f107 0310 	add.w	r3, r7, #16
 801051a:	2264      	movs	r2, #100	@ 0x64
 801051c:	2100      	movs	r1, #0
 801051e:	4618      	mov	r0, r3
 8010520:	f01a faae 	bl	802aa80 <memset>
  /* Start ETH HAL Init */

   uint8_t MACAddr[6] ;
  heth.Instance = ETH;
 8010524:	4b86      	ldr	r3, [pc, #536]	@ (8010740 <low_level_init+0x244>)
 8010526:	4a87      	ldr	r2, [pc, #540]	@ (8010744 <low_level_init+0x248>)
 8010528:	601a      	str	r2, [r3, #0]
//  MACAddr[1] = 0x80;
//  MACAddr[2] = 0xE1;
//  MACAddr[3] = 0x00;
//  MACAddr[4] = 0x00;
//  MACAddr[5] = 0x00;
    MACAddr[0] = 0x7C;
 801052a:	237c      	movs	r3, #124	@ 0x7c
 801052c:	723b      	strb	r3, [r7, #8]
    MACAddr[1] = 0xF6;
 801052e:	23f6      	movs	r3, #246	@ 0xf6
 8010530:	727b      	strb	r3, [r7, #9]
    MACAddr[2] = 0x66;
 8010532:	2366      	movs	r3, #102	@ 0x66
 8010534:	72bb      	strb	r3, [r7, #10]
    MACAddr[3] = 0xE4;
 8010536:	23e4      	movs	r3, #228	@ 0xe4
 8010538:	72fb      	strb	r3, [r7, #11]
    MACAddr[4] = 0xB5;
 801053a:	23b5      	movs	r3, #181	@ 0xb5
 801053c:	733b      	strb	r3, [r7, #12]
    MACAddr[5] = 0x41;
 801053e:	2341      	movs	r3, #65	@ 0x41
 8010540:	737b      	strb	r3, [r7, #13]
  heth.Init.MACAddr = &MACAddr[0];
 8010542:	4a7f      	ldr	r2, [pc, #508]	@ (8010740 <low_level_init+0x244>)
 8010544:	f107 0308 	add.w	r3, r7, #8
 8010548:	6053      	str	r3, [r2, #4]
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
 801054a:	4b7d      	ldr	r3, [pc, #500]	@ (8010740 <low_level_init+0x244>)
 801054c:	2200      	movs	r2, #0
 801054e:	721a      	strb	r2, [r3, #8]
  heth.Init.TxDesc = DMATxDscrTab;
 8010550:	4b7b      	ldr	r3, [pc, #492]	@ (8010740 <low_level_init+0x244>)
 8010552:	4a7d      	ldr	r2, [pc, #500]	@ (8010748 <low_level_init+0x24c>)
 8010554:	60da      	str	r2, [r3, #12]
  heth.Init.RxDesc = DMARxDscrTab;
 8010556:	4b7a      	ldr	r3, [pc, #488]	@ (8010740 <low_level_init+0x244>)
 8010558:	4a7c      	ldr	r2, [pc, #496]	@ (801074c <low_level_init+0x250>)
 801055a:	611a      	str	r2, [r3, #16]
  heth.Init.RxBuffLen = 1536;
 801055c:	4b78      	ldr	r3, [pc, #480]	@ (8010740 <low_level_init+0x244>)
 801055e:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 8010562:	615a      	str	r2, [r3, #20]

  /* USER CODE BEGIN MACADDRESS */

  /* USER CODE END MACADDRESS */

  hal_eth_init_status = HAL_ETH_Init(&heth);
 8010564:	4876      	ldr	r0, [pc, #472]	@ (8010740 <low_level_init+0x244>)
 8010566:	f7f7 fe69 	bl	800823c <HAL_ETH_Init>
 801056a:	4603      	mov	r3, r0
 801056c:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 8010570:	2238      	movs	r2, #56	@ 0x38
 8010572:	2100      	movs	r1, #0
 8010574:	4876      	ldr	r0, [pc, #472]	@ (8010750 <low_level_init+0x254>)
 8010576:	f01a fa83 	bl	802aa80 <memset>
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 801057a:	4b75      	ldr	r3, [pc, #468]	@ (8010750 <low_level_init+0x254>)
 801057c:	2221      	movs	r2, #33	@ 0x21
 801057e:	601a      	str	r2, [r3, #0]
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 8010580:	4b73      	ldr	r3, [pc, #460]	@ (8010750 <low_level_init+0x254>)
 8010582:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8010586:	615a      	str	r2, [r3, #20]
  TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 8010588:	4b71      	ldr	r3, [pc, #452]	@ (8010750 <low_level_init+0x254>)
 801058a:	2200      	movs	r2, #0
 801058c:	611a      	str	r2, [r3, #16]

  /* End ETH HAL Init */

  /* Initialize the RX POOL */
  LWIP_MEMPOOL_INIT(RX_POOL);
 801058e:	4871      	ldr	r0, [pc, #452]	@ (8010754 <low_level_init+0x258>)
 8010590:	f009 fe6a 	bl	801a268 <memp_init_pool>

#if LWIP_ARP || LWIP_ETHERNET

  /* set MAC hardware address length */
  netif->hwaddr_len = ETH_HWADDR_LEN;
 8010594:	687b      	ldr	r3, [r7, #4]
 8010596:	2206      	movs	r2, #6
 8010598:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30

  /* set MAC hardware address */
  netif->hwaddr[0] =  heth.Init.MACAddr[0];
 801059c:	4b68      	ldr	r3, [pc, #416]	@ (8010740 <low_level_init+0x244>)
 801059e:	685b      	ldr	r3, [r3, #4]
 80105a0:	781a      	ldrb	r2, [r3, #0]
 80105a2:	687b      	ldr	r3, [r7, #4]
 80105a4:	f883 202a 	strb.w	r2, [r3, #42]	@ 0x2a
  netif->hwaddr[1] =  heth.Init.MACAddr[1];
 80105a8:	4b65      	ldr	r3, [pc, #404]	@ (8010740 <low_level_init+0x244>)
 80105aa:	685b      	ldr	r3, [r3, #4]
 80105ac:	785a      	ldrb	r2, [r3, #1]
 80105ae:	687b      	ldr	r3, [r7, #4]
 80105b0:	f883 202b 	strb.w	r2, [r3, #43]	@ 0x2b
  netif->hwaddr[2] =  heth.Init.MACAddr[2];
 80105b4:	4b62      	ldr	r3, [pc, #392]	@ (8010740 <low_level_init+0x244>)
 80105b6:	685b      	ldr	r3, [r3, #4]
 80105b8:	789a      	ldrb	r2, [r3, #2]
 80105ba:	687b      	ldr	r3, [r7, #4]
 80105bc:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
  netif->hwaddr[3] =  heth.Init.MACAddr[3];
 80105c0:	4b5f      	ldr	r3, [pc, #380]	@ (8010740 <low_level_init+0x244>)
 80105c2:	685b      	ldr	r3, [r3, #4]
 80105c4:	78da      	ldrb	r2, [r3, #3]
 80105c6:	687b      	ldr	r3, [r7, #4]
 80105c8:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
  netif->hwaddr[4] =  heth.Init.MACAddr[4];
 80105cc:	4b5c      	ldr	r3, [pc, #368]	@ (8010740 <low_level_init+0x244>)
 80105ce:	685b      	ldr	r3, [r3, #4]
 80105d0:	791a      	ldrb	r2, [r3, #4]
 80105d2:	687b      	ldr	r3, [r7, #4]
 80105d4:	f883 202e 	strb.w	r2, [r3, #46]	@ 0x2e
  netif->hwaddr[5] =  heth.Init.MACAddr[5];
 80105d8:	4b59      	ldr	r3, [pc, #356]	@ (8010740 <low_level_init+0x244>)
 80105da:	685b      	ldr	r3, [r3, #4]
 80105dc:	795a      	ldrb	r2, [r3, #5]
 80105de:	687b      	ldr	r3, [r7, #4]
 80105e0:	f883 202f 	strb.w	r2, [r3, #47]	@ 0x2f

  /* maximum transfer unit */
  netif->mtu = ETH_MAX_PAYLOAD;
 80105e4:	687b      	ldr	r3, [r7, #4]
 80105e6:	f240 52dc 	movw	r2, #1500	@ 0x5dc
 80105ea:	851a      	strh	r2, [r3, #40]	@ 0x28

  /* Accept broadcast address and ARP traffic */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  #if LWIP_ARP
    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 80105ec:	687b      	ldr	r3, [r7, #4]
 80105ee:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80105f2:	f043 030a 	orr.w	r3, r3, #10
 80105f6:	b2da      	uxtb	r2, r3
 80105f8:	687b      	ldr	r3, [r7, #4]
 80105fa:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  #else
    netif->flags |= NETIF_FLAG_BROADCAST;
  #endif /* LWIP_ARP */

  /* create a binary semaphore used for informing ethernetif of frame reception */
  RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 80105fe:	2200      	movs	r2, #0
 8010600:	2101      	movs	r1, #1
 8010602:	2001      	movs	r0, #1
 8010604:	f001 f8c5 	bl	8011792 <osSemaphoreNew>
 8010608:	4603      	mov	r3, r0
 801060a:	4a53      	ldr	r2, [pc, #332]	@ (8010758 <low_level_init+0x25c>)
 801060c:	6013      	str	r3, [r2, #0]

  /* create a binary semaphore used for informing ethernetif of frame transmission */
  TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 801060e:	2200      	movs	r2, #0
 8010610:	2101      	movs	r1, #1
 8010612:	2001      	movs	r0, #1
 8010614:	f001 f8bd 	bl	8011792 <osSemaphoreNew>
 8010618:	4603      	mov	r3, r0
 801061a:	4a50      	ldr	r2, [pc, #320]	@ (801075c <low_level_init+0x260>)
 801061c:	6013      	str	r3, [r2, #0]

  /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 801061e:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 8010622:	2224      	movs	r2, #36	@ 0x24
 8010624:	2100      	movs	r1, #0
 8010626:	4618      	mov	r0, r3
 8010628:	f01a fa2a 	bl	802aa80 <memset>
  attributes.name = "EthIf";
 801062c:	4b4c      	ldr	r3, [pc, #304]	@ (8010760 <low_level_init+0x264>)
 801062e:	677b      	str	r3, [r7, #116]	@ 0x74
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
 8010630:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8010634:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  attributes.priority = osPriorityRealtime;
 8010638:	2330      	movs	r3, #48	@ 0x30
 801063a:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
  osThreadNew(ethernetif_input, netif, &attributes);
 801063e:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 8010642:	461a      	mov	r2, r3
 8010644:	6879      	ldr	r1, [r7, #4]
 8010646:	4847      	ldr	r0, [pc, #284]	@ (8010764 <low_level_init+0x268>)
 8010648:	f000 fde5 	bl	8011216 <osThreadNew>

/* USER CODE BEGIN PHY_PRE_CONFIG */

/* USER CODE END PHY_PRE_CONFIG */
  /* Set PHY IO functions */
  DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
 801064c:	4946      	ldr	r1, [pc, #280]	@ (8010768 <low_level_init+0x26c>)
 801064e:	4847      	ldr	r0, [pc, #284]	@ (801076c <low_level_init+0x270>)
 8010650:	f7f4 fec9 	bl	80053e6 <DP83848_RegisterBusIO>

  /* Initialize the DP83848 ETH PHY */
  DP83848_Init(&DP83848);
 8010654:	4845      	ldr	r0, [pc, #276]	@ (801076c <low_level_init+0x270>)
 8010656:	f7f4 fef8 	bl	800544a <DP83848_Init>

  if (hal_eth_init_status == HAL_OK)
 801065a:	f897 309f 	ldrb.w	r3, [r7, #159]	@ 0x9f
 801065e:	2b00      	cmp	r3, #0
 8010660:	d168      	bne.n	8010734 <low_level_init+0x238>
  {
    PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010662:	4842      	ldr	r0, [pc, #264]	@ (801076c <low_level_init+0x270>)
 8010664:	f7f4 ff3e 	bl	80054e4 <DP83848_GetLinkState>
 8010668:	f8c7 0098 	str.w	r0, [r7, #152]	@ 0x98

    /* Get link state */
    if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
 801066c:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 8010670:	2b01      	cmp	r3, #1
 8010672:	dc06      	bgt.n	8010682 <low_level_init+0x186>
    {
      netif_set_link_down(netif);
 8010674:	6878      	ldr	r0, [r7, #4]
 8010676:	f00a f9e7 	bl	801aa48 <netif_set_link_down>
      netif_set_down(netif);
 801067a:	6878      	ldr	r0, [r7, #4]
 801067c:	f00a f976 	bl	801a96c <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */

/* USER CODE BEGIN LOW_LEVEL_INIT */

/* USER CODE END LOW_LEVEL_INIT */
}
 8010680:	e05a      	b.n	8010738 <low_level_init+0x23c>
      switch (PHYLinkState)
 8010682:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 8010686:	3b02      	subs	r3, #2
 8010688:	2b03      	cmp	r3, #3
 801068a:	d82b      	bhi.n	80106e4 <low_level_init+0x1e8>
 801068c:	a201      	add	r2, pc, #4	@ (adr r2, 8010694 <low_level_init+0x198>)
 801068e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8010692:	bf00      	nop
 8010694:	080106a5 	.word	0x080106a5
 8010698:	080106b7 	.word	0x080106b7
 801069c:	080106c7 	.word	0x080106c7
 80106a0:	080106d7 	.word	0x080106d7
        duplex = ETH_FULLDUPLEX_MODE;
 80106a4:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80106a8:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80106ac:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80106b0:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80106b4:	e01f      	b.n	80106f6 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 80106b6:	2300      	movs	r3, #0
 80106b8:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80106bc:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80106c0:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80106c4:	e017      	b.n	80106f6 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 80106c6:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80106ca:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 80106ce:	2300      	movs	r3, #0
 80106d0:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80106d4:	e00f      	b.n	80106f6 <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 80106d6:	2300      	movs	r3, #0
 80106d8:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 80106dc:	2300      	movs	r3, #0
 80106de:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80106e2:	e008      	b.n	80106f6 <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 80106e4:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80106e8:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80106ec:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80106f0:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80106f4:	bf00      	nop
    HAL_ETH_GetMACConfig(&heth, &MACConf);
 80106f6:	f107 0310 	add.w	r3, r7, #16
 80106fa:	4619      	mov	r1, r3
 80106fc:	4810      	ldr	r0, [pc, #64]	@ (8010740 <low_level_init+0x244>)
 80106fe:	f7f8 fb2b 	bl	8008d58 <HAL_ETH_GetMACConfig>
    MACConf.DuplexMode = duplex;
 8010702:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 8010706:	62bb      	str	r3, [r7, #40]	@ 0x28
    MACConf.Speed = speed;
 8010708:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 801070c:	627b      	str	r3, [r7, #36]	@ 0x24
    HAL_ETH_SetMACConfig(&heth, &MACConf);
 801070e:	f107 0310 	add.w	r3, r7, #16
 8010712:	4619      	mov	r1, r3
 8010714:	480a      	ldr	r0, [pc, #40]	@ (8010740 <low_level_init+0x244>)
 8010716:	f7f8 fcf3 	bl	8009100 <HAL_ETH_SetMACConfig>
    HAL_ETH_Start_IT(&heth);
 801071a:	4809      	ldr	r0, [pc, #36]	@ (8010740 <low_level_init+0x244>)
 801071c:	f7f7 fe8c 	bl	8008438 <HAL_ETH_Start_IT>
    netif_set_up(netif);
 8010720:	6878      	ldr	r0, [r7, #4]
 8010722:	f00a f8b5 	bl	801a890 <netif_set_up>
    netif_set_link_up(netif);
 8010726:	6878      	ldr	r0, [r7, #4]
 8010728:	f00a f954 	bl	801a9d4 <netif_set_link_up>
    ethernetif_notify_conn_changed(netif);
 801072c:	6878      	ldr	r0, [r7, #4]
 801072e:	f000 fb1b 	bl	8010d68 <ethernetif_notify_conn_changed>
}
 8010732:	e001      	b.n	8010738 <low_level_init+0x23c>
    Error_Handler();
 8010734:	f7f1 ffb0 	bl	8002698 <Error_Handler>
}
 8010738:	bf00      	nop
 801073a:	37a8      	adds	r7, #168	@ 0xa8
 801073c:	46bd      	mov	sp, r7
 801073e:	bd80      	pop	{r7, pc}
 8010740:	240022cc 	.word	0x240022cc
 8010744:	40028000 	.word	0x40028000
 8010748:	24040100 	.word	0x24040100
 801074c:	24040000 	.word	0x24040000
 8010750:	2400237c 	.word	0x2400237c
 8010754:	080319ac 	.word	0x080319ac
 8010758:	240022c4 	.word	0x240022c4
 801075c:	240022c8 	.word	0x240022c8
 8010760:	0802d8dc 	.word	0x0802d8dc
 8010764:	080108d9 	.word	0x080108d9
 8010768:	24000034 	.word	0x24000034
 801076c:	240023b4 	.word	0x240023b4

08010770 <low_level_output>:
 *       to become available since the stack doesn't retry to send a packet
 *       dropped because of memory failure (except for the TCP timers).
 */

static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
 8010770:	b580      	push	{r7, lr}
 8010772:	b092      	sub	sp, #72	@ 0x48
 8010774:	af00      	add	r7, sp, #0
 8010776:	6078      	str	r0, [r7, #4]
 8010778:	6039      	str	r1, [r7, #0]
  uint32_t i = 0U;
 801077a:	2300      	movs	r3, #0
 801077c:	647b      	str	r3, [r7, #68]	@ 0x44
  struct pbuf *q = NULL;
 801077e:	2300      	movs	r3, #0
 8010780:	643b      	str	r3, [r7, #64]	@ 0x40
  err_t errval = ERR_OK;
 8010782:	2300      	movs	r3, #0
 8010784:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
 8010788:	f107 030c 	add.w	r3, r7, #12
 801078c:	2230      	movs	r2, #48	@ 0x30
 801078e:	2100      	movs	r1, #0
 8010790:	4618      	mov	r0, r3
 8010792:	f01a f975 	bl	802aa80 <memset>

  memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
 8010796:	f107 030c 	add.w	r3, r7, #12
 801079a:	2230      	movs	r2, #48	@ 0x30
 801079c:	2100      	movs	r1, #0
 801079e:	4618      	mov	r0, r3
 80107a0:	f01a f96e 	bl	802aa80 <memset>

  for(q = p; q != NULL; q = q->next)
 80107a4:	683b      	ldr	r3, [r7, #0]
 80107a6:	643b      	str	r3, [r7, #64]	@ 0x40
 80107a8:	e045      	b.n	8010836 <low_level_output+0xc6>
  {
    if(i >= ETH_TX_DESC_CNT)
 80107aa:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80107ac:	2b03      	cmp	r3, #3
 80107ae:	d902      	bls.n	80107b6 <low_level_output+0x46>
      return ERR_IF;
 80107b0:	f06f 030b 	mvn.w	r3, #11
 80107b4:	e06c      	b.n	8010890 <low_level_output+0x120>

    Txbuffer[i].buffer = q->payload;
 80107b6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80107b8:	6859      	ldr	r1, [r3, #4]
 80107ba:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80107bc:	4613      	mov	r3, r2
 80107be:	005b      	lsls	r3, r3, #1
 80107c0:	4413      	add	r3, r2
 80107c2:	009b      	lsls	r3, r3, #2
 80107c4:	3348      	adds	r3, #72	@ 0x48
 80107c6:	443b      	add	r3, r7
 80107c8:	3b3c      	subs	r3, #60	@ 0x3c
 80107ca:	6019      	str	r1, [r3, #0]
    Txbuffer[i].len = q->len;
 80107cc:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80107ce:	895b      	ldrh	r3, [r3, #10]
 80107d0:	4619      	mov	r1, r3
 80107d2:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80107d4:	4613      	mov	r3, r2
 80107d6:	005b      	lsls	r3, r3, #1
 80107d8:	4413      	add	r3, r2
 80107da:	009b      	lsls	r3, r3, #2
 80107dc:	3348      	adds	r3, #72	@ 0x48
 80107de:	443b      	add	r3, r7
 80107e0:	3b38      	subs	r3, #56	@ 0x38
 80107e2:	6019      	str	r1, [r3, #0]

    if(i>0)
 80107e4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80107e6:	2b00      	cmp	r3, #0
 80107e8:	d011      	beq.n	801080e <low_level_output+0x9e>
    {
      Txbuffer[i-1].next = &Txbuffer[i];
 80107ea:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80107ec:	1e5a      	subs	r2, r3, #1
 80107ee:	f107 000c 	add.w	r0, r7, #12
 80107f2:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 80107f4:	460b      	mov	r3, r1
 80107f6:	005b      	lsls	r3, r3, #1
 80107f8:	440b      	add	r3, r1
 80107fa:	009b      	lsls	r3, r3, #2
 80107fc:	18c1      	adds	r1, r0, r3
 80107fe:	4613      	mov	r3, r2
 8010800:	005b      	lsls	r3, r3, #1
 8010802:	4413      	add	r3, r2
 8010804:	009b      	lsls	r3, r3, #2
 8010806:	3348      	adds	r3, #72	@ 0x48
 8010808:	443b      	add	r3, r7
 801080a:	3b34      	subs	r3, #52	@ 0x34
 801080c:	6019      	str	r1, [r3, #0]
    }

    if(q->next == NULL)
 801080e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010810:	681b      	ldr	r3, [r3, #0]
 8010812:	2b00      	cmp	r3, #0
 8010814:	d109      	bne.n	801082a <low_level_output+0xba>
    {
      Txbuffer[i].next = NULL;
 8010816:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010818:	4613      	mov	r3, r2
 801081a:	005b      	lsls	r3, r3, #1
 801081c:	4413      	add	r3, r2
 801081e:	009b      	lsls	r3, r3, #2
 8010820:	3348      	adds	r3, #72	@ 0x48
 8010822:	443b      	add	r3, r7
 8010824:	3b34      	subs	r3, #52	@ 0x34
 8010826:	2200      	movs	r2, #0
 8010828:	601a      	str	r2, [r3, #0]
    }

    i++;
 801082a:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801082c:	3301      	adds	r3, #1
 801082e:	647b      	str	r3, [r7, #68]	@ 0x44
  for(q = p; q != NULL; q = q->next)
 8010830:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010832:	681b      	ldr	r3, [r3, #0]
 8010834:	643b      	str	r3, [r7, #64]	@ 0x40
 8010836:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010838:	2b00      	cmp	r3, #0
 801083a:	d1b6      	bne.n	80107aa <low_level_output+0x3a>
  }

  TxConfig.Length = p->tot_len;
 801083c:	683b      	ldr	r3, [r7, #0]
 801083e:	891b      	ldrh	r3, [r3, #8]
 8010840:	461a      	mov	r2, r3
 8010842:	4b15      	ldr	r3, [pc, #84]	@ (8010898 <low_level_output+0x128>)
 8010844:	605a      	str	r2, [r3, #4]
  TxConfig.TxBuffer = Txbuffer;
 8010846:	4a14      	ldr	r2, [pc, #80]	@ (8010898 <low_level_output+0x128>)
 8010848:	f107 030c 	add.w	r3, r7, #12
 801084c:	6093      	str	r3, [r2, #8]
  TxConfig.pData = p;
 801084e:	4a12      	ldr	r2, [pc, #72]	@ (8010898 <low_level_output+0x128>)
 8010850:	683b      	ldr	r3, [r7, #0]
 8010852:	6353      	str	r3, [r2, #52]	@ 0x34

  pbuf_ref(p);
 8010854:	6838      	ldr	r0, [r7, #0]
 8010856:	f00a fdaf 	bl	801b3b8 <pbuf_ref>
#if 1
  if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
 801085a:	490f      	ldr	r1, [pc, #60]	@ (8010898 <low_level_output+0x128>)
 801085c:	480f      	ldr	r0, [pc, #60]	@ (801089c <low_level_output+0x12c>)
 801085e:	f7f7 fed7 	bl	8008610 <HAL_ETH_Transmit_IT>
 8010862:	4603      	mov	r3, r0
 8010864:	2b00      	cmp	r3, #0
 8010866:	d10e      	bne.n	8010886 <low_level_output+0x116>
    while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
 8010868:	bf00      	nop
 801086a:	4b0d      	ldr	r3, [pc, #52]	@ (80108a0 <low_level_output+0x130>)
 801086c:	681b      	ldr	r3, [r3, #0]
 801086e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8010872:	4618      	mov	r0, r3
 8010874:	f001 f816 	bl	80118a4 <osSemaphoreAcquire>
 8010878:	4603      	mov	r3, r0
 801087a:	2b00      	cmp	r3, #0
 801087c:	d1f5      	bne.n	801086a <low_level_output+0xfa>
    {
    }
//	osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
    HAL_ETH_ReleaseTxPacket(&heth);
 801087e:	4807      	ldr	r0, [pc, #28]	@ (801089c <low_level_output+0x12c>)
 8010880:	f7f8 f84d 	bl	800891e <HAL_ETH_ReleaseTxPacket>
 8010884:	e002      	b.n	801088c <low_level_output+0x11c>
  } else {
    pbuf_free(p);
 8010886:	6838      	ldr	r0, [r7, #0]
 8010888:	f00a fcf0 	bl	801b26c <pbuf_free>
  HAL_ETH_Transmit_IT(&heth, &TxConfig);
  osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
  HAL_ETH_ReleaseTxPacket(&heth);
#endif

  return errval;
 801088c:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 8010890:	4618      	mov	r0, r3
 8010892:	3748      	adds	r7, #72	@ 0x48
 8010894:	46bd      	mov	sp, r7
 8010896:	bd80      	pop	{r7, pc}
 8010898:	2400237c 	.word	0x2400237c
 801089c:	240022cc 	.word	0x240022cc
 80108a0:	240022c8 	.word	0x240022c8

080108a4 <low_level_input>:
 * @param netif the lwip network interface structure for this ethernetif
 * @return a pbuf filled with the received packet (including MAC header)
 *         NULL on memory error
   */
static struct pbuf * low_level_input(struct netif *netif)
{
 80108a4:	b580      	push	{r7, lr}
 80108a6:	b084      	sub	sp, #16
 80108a8:	af00      	add	r7, sp, #0
 80108aa:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 80108ac:	2300      	movs	r3, #0
 80108ae:	60fb      	str	r3, [r7, #12]

  if(RxAllocStatus == RX_ALLOC_OK)
 80108b0:	4b07      	ldr	r3, [pc, #28]	@ (80108d0 <low_level_input+0x2c>)
 80108b2:	781b      	ldrb	r3, [r3, #0]
 80108b4:	2b00      	cmp	r3, #0
 80108b6:	d105      	bne.n	80108c4 <low_level_input+0x20>
  {
    HAL_ETH_ReadData(&heth, (void **)&p);
 80108b8:	f107 030c 	add.w	r3, r7, #12
 80108bc:	4619      	mov	r1, r3
 80108be:	4805      	ldr	r0, [pc, #20]	@ (80108d4 <low_level_input+0x30>)
 80108c0:	f7f7 fef7 	bl	80086b2 <HAL_ETH_ReadData>
  }

  return p;
 80108c4:	68fb      	ldr	r3, [r7, #12]
}
 80108c6:	4618      	mov	r0, r3
 80108c8:	3710      	adds	r7, #16
 80108ca:	46bd      	mov	sp, r7
 80108cc:	bd80      	pop	{r7, pc}
 80108ce:	bf00      	nop
 80108d0:	240022c0 	.word	0x240022c0
 80108d4:	240022cc 	.word	0x240022cc

080108d8 <ethernetif_input>:
 * the appropriate input function is called.
 *
 * @param netif the lwip network interface structure for this ethernetif
 */
void ethernetif_input(void* argument)
{
 80108d8:	b580      	push	{r7, lr}
 80108da:	b084      	sub	sp, #16
 80108dc:	af00      	add	r7, sp, #0
 80108de:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 80108e0:	2300      	movs	r3, #0
 80108e2:	60fb      	str	r3, [r7, #12]
  struct netif *netif = (struct netif *) argument;
 80108e4:	687b      	ldr	r3, [r7, #4]
 80108e6:	60bb      	str	r3, [r7, #8]

  for( ;; )
  {
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 80108e8:	4b0f      	ldr	r3, [pc, #60]	@ (8010928 <ethernetif_input+0x50>)
 80108ea:	681b      	ldr	r3, [r3, #0]
 80108ec:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80108f0:	4618      	mov	r0, r3
 80108f2:	f000 ffd7 	bl	80118a4 <osSemaphoreAcquire>
 80108f6:	4603      	mov	r3, r0
 80108f8:	2b00      	cmp	r3, #0
 80108fa:	d1f5      	bne.n	80108e8 <ethernetif_input+0x10>
    {
      do
      {
        p = low_level_input( netif );
 80108fc:	68b8      	ldr	r0, [r7, #8]
 80108fe:	f7ff ffd1 	bl	80108a4 <low_level_input>
 8010902:	60f8      	str	r0, [r7, #12]
        if (p != NULL)
 8010904:	68fb      	ldr	r3, [r7, #12]
 8010906:	2b00      	cmp	r3, #0
 8010908:	d00a      	beq.n	8010920 <ethernetif_input+0x48>
        {
          if (netif->input( p, netif) != ERR_OK )
 801090a:	68bb      	ldr	r3, [r7, #8]
 801090c:	691b      	ldr	r3, [r3, #16]
 801090e:	68b9      	ldr	r1, [r7, #8]
 8010910:	68f8      	ldr	r0, [r7, #12]
 8010912:	4798      	blx	r3
 8010914:	4603      	mov	r3, r0
 8010916:	2b00      	cmp	r3, #0
 8010918:	d002      	beq.n	8010920 <ethernetif_input+0x48>
          {
            pbuf_free(p);
 801091a:	68f8      	ldr	r0, [r7, #12]
 801091c:	f00a fca6 	bl	801b26c <pbuf_free>
          }
        }
      } while(p!=NULL);
 8010920:	68fb      	ldr	r3, [r7, #12]
 8010922:	2b00      	cmp	r3, #0
 8010924:	d1ea      	bne.n	80108fc <ethernetif_input+0x24>
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 8010926:	e7df      	b.n	80108e8 <ethernetif_input+0x10>
 8010928:	240022c4 	.word	0x240022c4

0801092c <ethernetif_init>:
 * @return ERR_OK if the loopif is initialized
 *         ERR_MEM if private data couldn't be allocated
 *         any other err_t on error
 */
err_t ethernetif_init(struct netif *netif)
{
 801092c:	b580      	push	{r7, lr}
 801092e:	b082      	sub	sp, #8
 8010930:	af00      	add	r7, sp, #0
 8010932:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("netif != NULL", (netif != NULL));
 8010934:	687b      	ldr	r3, [r7, #4]
 8010936:	2b00      	cmp	r3, #0
 8010938:	d106      	bne.n	8010948 <ethernetif_init+0x1c>
 801093a:	4b0e      	ldr	r3, [pc, #56]	@ (8010974 <ethernetif_init+0x48>)
 801093c:	f240 2235 	movw	r2, #565	@ 0x235
 8010940:	490d      	ldr	r1, [pc, #52]	@ (8010978 <ethernetif_init+0x4c>)
 8010942:	480e      	ldr	r0, [pc, #56]	@ (801097c <ethernetif_init+0x50>)
 8010944:	f019 ff0a 	bl	802a75c <iprintf>
   * The last argument should be replaced with your link speed, in units
   * of bits per second.
   */
  // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);

  netif->name[0] = IFNAME0;
 8010948:	687b      	ldr	r3, [r7, #4]
 801094a:	2273      	movs	r2, #115	@ 0x73
 801094c:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  netif->name[1] = IFNAME1;
 8010950:	687b      	ldr	r3, [r7, #4]
 8010952:	2274      	movs	r2, #116	@ 0x74
 8010954:	f883 2033 	strb.w	r2, [r3, #51]	@ 0x33
   * is available...) */

#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
  netif->output = etharp_output;
 8010958:	687b      	ldr	r3, [r7, #4]
 801095a:	4a09      	ldr	r2, [pc, #36]	@ (8010980 <ethernetif_init+0x54>)
 801095c:	615a      	str	r2, [r3, #20]

#if LWIP_IPV6
  netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */

  netif->linkoutput = low_level_output;
 801095e:	687b      	ldr	r3, [r7, #4]
 8010960:	4a08      	ldr	r2, [pc, #32]	@ (8010984 <ethernetif_init+0x58>)
 8010962:	619a      	str	r2, [r3, #24]

  /* initialize the hardware */
  low_level_init(netif);
 8010964:	6878      	ldr	r0, [r7, #4]
 8010966:	f7ff fdc9 	bl	80104fc <low_level_init>

  return ERR_OK;
 801096a:	2300      	movs	r3, #0
}
 801096c:	4618      	mov	r0, r3
 801096e:	3708      	adds	r7, #8
 8010970:	46bd      	mov	sp, r7
 8010972:	bd80      	pop	{r7, pc}
 8010974:	0802d8e4 	.word	0x0802d8e4
 8010978:	0802d900 	.word	0x0802d900
 801097c:	0802d910 	.word	0x0802d910
 8010980:	08024dcd 	.word	0x08024dcd
 8010984:	08010771 	.word	0x08010771

08010988 <pbuf_free_custom>:
  * @brief  Custom Rx pbuf free callback
  * @param  pbuf: pbuf to be freed
  * @retval None
  */
void pbuf_free_custom(struct pbuf *p)
{
 8010988:	b580      	push	{r7, lr}
 801098a:	b084      	sub	sp, #16
 801098c:	af00      	add	r7, sp, #0
 801098e:	6078      	str	r0, [r7, #4]
  struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
 8010990:	687b      	ldr	r3, [r7, #4]
 8010992:	60fb      	str	r3, [r7, #12]
  LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
 8010994:	68f9      	ldr	r1, [r7, #12]
 8010996:	4809      	ldr	r0, [pc, #36]	@ (80109bc <pbuf_free_custom+0x34>)
 8010998:	f009 fd56 	bl	801a448 <memp_free_pool>

  /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
   * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */

  if (RxAllocStatus == RX_ALLOC_ERROR)
 801099c:	4b08      	ldr	r3, [pc, #32]	@ (80109c0 <pbuf_free_custom+0x38>)
 801099e:	781b      	ldrb	r3, [r3, #0]
 80109a0:	2b01      	cmp	r3, #1
 80109a2:	d107      	bne.n	80109b4 <pbuf_free_custom+0x2c>
  {
    RxAllocStatus = RX_ALLOC_OK;
 80109a4:	4b06      	ldr	r3, [pc, #24]	@ (80109c0 <pbuf_free_custom+0x38>)
 80109a6:	2200      	movs	r2, #0
 80109a8:	701a      	strb	r2, [r3, #0]
    osSemaphoreRelease(RxPktSemaphore);
 80109aa:	4b06      	ldr	r3, [pc, #24]	@ (80109c4 <pbuf_free_custom+0x3c>)
 80109ac:	681b      	ldr	r3, [r3, #0]
 80109ae:	4618      	mov	r0, r3
 80109b0:	f000 ffca 	bl	8011948 <osSemaphoreRelease>
  }
}
 80109b4:	bf00      	nop
 80109b6:	3710      	adds	r7, #16
 80109b8:	46bd      	mov	sp, r7
 80109ba:	bd80      	pop	{r7, pc}
 80109bc:	080319ac 	.word	0x080319ac
 80109c0:	240022c0 	.word	0x240022c0
 80109c4:	240022c4 	.word	0x240022c4

080109c8 <sys_now>:
*         when LWIP_TIMERS == 1 and NO_SYS == 1
* @param  None
* @retval Current Time value
*/
u32_t sys_now(void)
{
 80109c8:	b580      	push	{r7, lr}
 80109ca:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 80109cc:	f7f4 fe62 	bl	8005694 <HAL_GetTick>
 80109d0:	4603      	mov	r3, r0
}
 80109d2:	4618      	mov	r0, r3
 80109d4:	bd80      	pop	{r7, pc}
	...

080109d8 <HAL_ETH_MspInit>:
  * @param  ethHandle: ETH handle
  * @retval None
  */

void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
 80109d8:	b580      	push	{r7, lr}
 80109da:	b08e      	sub	sp, #56	@ 0x38
 80109dc:	af00      	add	r7, sp, #0
 80109de:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80109e0:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 80109e4:	2200      	movs	r2, #0
 80109e6:	601a      	str	r2, [r3, #0]
 80109e8:	605a      	str	r2, [r3, #4]
 80109ea:	609a      	str	r2, [r3, #8]
 80109ec:	60da      	str	r2, [r3, #12]
 80109ee:	611a      	str	r2, [r3, #16]
  if(ethHandle->Instance==ETH)
 80109f0:	687b      	ldr	r3, [r7, #4]
 80109f2:	681b      	ldr	r3, [r3, #0]
 80109f4:	4a55      	ldr	r2, [pc, #340]	@ (8010b4c <HAL_ETH_MspInit+0x174>)
 80109f6:	4293      	cmp	r3, r2
 80109f8:	f040 80a4 	bne.w	8010b44 <HAL_ETH_MspInit+0x16c>
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Enable Peripheral clock */
    __HAL_RCC_ETH1MAC_CLK_ENABLE();
 80109fc:	4b54      	ldr	r3, [pc, #336]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 80109fe:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a02:	4a53      	ldr	r2, [pc, #332]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a04:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
 8010a08:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010a0c:	4b50      	ldr	r3, [pc, #320]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a0e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a12:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8010a16:	623b      	str	r3, [r7, #32]
 8010a18:	6a3b      	ldr	r3, [r7, #32]
    __HAL_RCC_ETH1TX_CLK_ENABLE();
 8010a1a:	4b4d      	ldr	r3, [pc, #308]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a1c:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a20:	4a4b      	ldr	r2, [pc, #300]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a22:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8010a26:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010a2a:	4b49      	ldr	r3, [pc, #292]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a2c:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a30:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8010a34:	61fb      	str	r3, [r7, #28]
 8010a36:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_ETH1RX_CLK_ENABLE();
 8010a38:	4b45      	ldr	r3, [pc, #276]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a3a:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a3e:	4a44      	ldr	r2, [pc, #272]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a40:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8010a44:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010a48:	4b41      	ldr	r3, [pc, #260]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a4a:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010a4e:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8010a52:	61bb      	str	r3, [r7, #24]
 8010a54:	69bb      	ldr	r3, [r7, #24]

    __HAL_RCC_GPIOC_CLK_ENABLE();
 8010a56:	4b3e      	ldr	r3, [pc, #248]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a58:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010a5c:	4a3c      	ldr	r2, [pc, #240]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a5e:	f043 0304 	orr.w	r3, r3, #4
 8010a62:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010a66:	4b3a      	ldr	r3, [pc, #232]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a68:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010a6c:	f003 0304 	and.w	r3, r3, #4
 8010a70:	617b      	str	r3, [r7, #20]
 8010a72:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8010a74:	4b36      	ldr	r3, [pc, #216]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a76:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010a7a:	4a35      	ldr	r2, [pc, #212]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a7c:	f043 0301 	orr.w	r3, r3, #1
 8010a80:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010a84:	4b32      	ldr	r3, [pc, #200]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a86:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010a8a:	f003 0301 	and.w	r3, r3, #1
 8010a8e:	613b      	str	r3, [r7, #16]
 8010a90:	693b      	ldr	r3, [r7, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8010a92:	4b2f      	ldr	r3, [pc, #188]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a94:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010a98:	4a2d      	ldr	r2, [pc, #180]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010a9a:	f043 0302 	orr.w	r3, r3, #2
 8010a9e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010aa2:	4b2b      	ldr	r3, [pc, #172]	@ (8010b50 <HAL_ETH_MspInit+0x178>)
 8010aa4:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010aa8:	f003 0302 	and.w	r3, r3, #2
 8010aac:	60fb      	str	r3, [r7, #12]
 8010aae:	68fb      	ldr	r3, [r7, #12]
    PB11     ------> ETH_TX_EN
    PB12     ------> ETH_TXD0
    PB13     ------> ETH_TXD1
    PB8     ------> ETH_TXD3
    */
    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
 8010ab0:	233e      	movs	r3, #62	@ 0x3e
 8010ab2:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010ab4:	2302      	movs	r3, #2
 8010ab6:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010ab8:	2300      	movs	r3, #0
 8010aba:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010abc:	2303      	movs	r3, #3
 8010abe:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010ac0:	230b      	movs	r3, #11
 8010ac2:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8010ac4:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010ac8:	4619      	mov	r1, r3
 8010aca:	4822      	ldr	r0, [pc, #136]	@ (8010b54 <HAL_ETH_MspInit+0x17c>)
 8010acc:	f7f9 f912 	bl	8009cf4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
 8010ad0:	238f      	movs	r3, #143	@ 0x8f
 8010ad2:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010ad4:	2302      	movs	r3, #2
 8010ad6:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010ad8:	2300      	movs	r3, #0
 8010ada:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010adc:	2303      	movs	r3, #3
 8010ade:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010ae0:	230b      	movs	r3, #11
 8010ae2:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8010ae4:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010ae8:	4619      	mov	r1, r3
 8010aea:	481b      	ldr	r0, [pc, #108]	@ (8010b58 <HAL_ETH_MspInit+0x180>)
 8010aec:	f7f9 f902 	bl	8009cf4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
 8010af0:	f643 1303 	movw	r3, #14595	@ 0x3903
 8010af4:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_13|GPIO_PIN_8;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010af6:	2302      	movs	r3, #2
 8010af8:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010afa:	2300      	movs	r3, #0
 8010afc:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010afe:	2303      	movs	r3, #3
 8010b00:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010b02:	230b      	movs	r3, #11
 8010b04:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8010b06:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010b0a:	4619      	mov	r1, r3
 8010b0c:	4813      	ldr	r0, [pc, #76]	@ (8010b5c <HAL_ETH_MspInit+0x184>)
 8010b0e:	f7f9 f8f1 	bl	8009cf4 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8010b12:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8010b16:	627b      	str	r3, [r7, #36]	@ 0x24
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010b18:	2302      	movs	r3, #2
 8010b1a:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010b1c:	2300      	movs	r3, #0
 8010b1e:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010b20:	2303      	movs	r3, #3
 8010b22:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010b24:	230b      	movs	r3, #11
 8010b26:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8010b28:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010b2c:	4619      	mov	r1, r3
 8010b2e:	480b      	ldr	r0, [pc, #44]	@ (8010b5c <HAL_ETH_MspInit+0x184>)
 8010b30:	f7f9 f8e0 	bl	8009cf4 <HAL_GPIO_Init>

    /* Peripheral interrupt init */
    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
 8010b34:	2200      	movs	r2, #0
 8010b36:	2105      	movs	r1, #5
 8010b38:	203d      	movs	r0, #61	@ 0x3d
 8010b3a:	f7f4 feb3 	bl	80058a4 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ETH_IRQn);
 8010b3e:	203d      	movs	r0, #61	@ 0x3d
 8010b40:	f7f4 feca 	bl	80058d8 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }
}
 8010b44:	bf00      	nop
 8010b46:	3738      	adds	r7, #56	@ 0x38
 8010b48:	46bd      	mov	sp, r7
 8010b4a:	bd80      	pop	{r7, pc}
 8010b4c:	40028000 	.word	0x40028000
 8010b50:	58024400 	.word	0x58024400
 8010b54:	58020800 	.word	0x58020800
 8010b58:	58020000 	.word	0x58020000
 8010b5c:	58020400 	.word	0x58020400

08010b60 <ETH_PHY_IO_Init>:
  * @brief  Initializes the MDIO interface GPIO and clocks.
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_Init(void)
{
 8010b60:	b580      	push	{r7, lr}
 8010b62:	af00      	add	r7, sp, #0
  /* We assume that MDIO GPIO configuration is already done
     in the ETH_MspInit() else it should be done here
  */

  /* Configure the MDIO Clock */
  HAL_ETH_SetMDIOClockRange(&heth);
 8010b64:	4802      	ldr	r0, [pc, #8]	@ (8010b70 <ETH_PHY_IO_Init+0x10>)
 8010b66:	f7f8 fae5 	bl	8009134 <HAL_ETH_SetMDIOClockRange>

  return 0;
 8010b6a:	2300      	movs	r3, #0
}
 8010b6c:	4618      	mov	r0, r3
 8010b6e:	bd80      	pop	{r7, pc}
 8010b70:	240022cc 	.word	0x240022cc

08010b74 <ETH_PHY_IO_DeInit>:
  * @brief  De-Initializes the MDIO interface .
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_DeInit (void)
{
 8010b74:	b480      	push	{r7}
 8010b76:	af00      	add	r7, sp, #0
  return 0;
 8010b78:	2300      	movs	r3, #0
}
 8010b7a:	4618      	mov	r0, r3
 8010b7c:	46bd      	mov	sp, r7
 8010b7e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010b82:	4770      	bx	lr

08010b84 <ETH_PHY_IO_ReadReg>:
  * @param  RegAddr: PHY register address
  * @param  pRegVal: pointer to hold the register value
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
 8010b84:	b580      	push	{r7, lr}
 8010b86:	b084      	sub	sp, #16
 8010b88:	af00      	add	r7, sp, #0
 8010b8a:	60f8      	str	r0, [r7, #12]
 8010b8c:	60b9      	str	r1, [r7, #8]
 8010b8e:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
 8010b90:	687b      	ldr	r3, [r7, #4]
 8010b92:	68ba      	ldr	r2, [r7, #8]
 8010b94:	68f9      	ldr	r1, [r7, #12]
 8010b96:	4807      	ldr	r0, [pc, #28]	@ (8010bb4 <ETH_PHY_IO_ReadReg+0x30>)
 8010b98:	f7f8 f836 	bl	8008c08 <HAL_ETH_ReadPHYRegister>
 8010b9c:	4603      	mov	r3, r0
 8010b9e:	2b00      	cmp	r3, #0
 8010ba0:	d002      	beq.n	8010ba8 <ETH_PHY_IO_ReadReg+0x24>
  {
    return -1;
 8010ba2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010ba6:	e000      	b.n	8010baa <ETH_PHY_IO_ReadReg+0x26>
  }

  return 0;
 8010ba8:	2300      	movs	r3, #0
}
 8010baa:	4618      	mov	r0, r3
 8010bac:	3710      	adds	r7, #16
 8010bae:	46bd      	mov	sp, r7
 8010bb0:	bd80      	pop	{r7, pc}
 8010bb2:	bf00      	nop
 8010bb4:	240022cc 	.word	0x240022cc

08010bb8 <ETH_PHY_IO_WriteReg>:
  * @param  RegAddr: PHY register address
  * @param  RegVal: Value to be written
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
 8010bb8:	b580      	push	{r7, lr}
 8010bba:	b084      	sub	sp, #16
 8010bbc:	af00      	add	r7, sp, #0
 8010bbe:	60f8      	str	r0, [r7, #12]
 8010bc0:	60b9      	str	r1, [r7, #8]
 8010bc2:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
 8010bc4:	687b      	ldr	r3, [r7, #4]
 8010bc6:	68ba      	ldr	r2, [r7, #8]
 8010bc8:	68f9      	ldr	r1, [r7, #12]
 8010bca:	4807      	ldr	r0, [pc, #28]	@ (8010be8 <ETH_PHY_IO_WriteReg+0x30>)
 8010bcc:	f7f8 f870 	bl	8008cb0 <HAL_ETH_WritePHYRegister>
 8010bd0:	4603      	mov	r3, r0
 8010bd2:	2b00      	cmp	r3, #0
 8010bd4:	d002      	beq.n	8010bdc <ETH_PHY_IO_WriteReg+0x24>
  {
    return -1;
 8010bd6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010bda:	e000      	b.n	8010bde <ETH_PHY_IO_WriteReg+0x26>
  }

  return 0;
 8010bdc:	2300      	movs	r3, #0
}
 8010bde:	4618      	mov	r0, r3
 8010be0:	3710      	adds	r7, #16
 8010be2:	46bd      	mov	sp, r7
 8010be4:	bd80      	pop	{r7, pc}
 8010be6:	bf00      	nop
 8010be8:	240022cc 	.word	0x240022cc

08010bec <ETH_PHY_IO_GetTick>:
/**
  * @brief  Get the time in millisecons used for internal PHY driver process.
  * @retval Time value
  */
int32_t ETH_PHY_IO_GetTick(void)
{
 8010bec:	b580      	push	{r7, lr}
 8010bee:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010bf0:	f7f4 fd50 	bl	8005694 <HAL_GetTick>
 8010bf4:	4603      	mov	r3, r0
}
 8010bf6:	4618      	mov	r0, r3
 8010bf8:	bd80      	pop	{r7, pc}
	...

08010bfc <ethernet_link_thread>:
/**
  * @brief  Check the ETH link state then update ETH driver and netif link accordingly.
  * @retval None
  */
void ethernet_link_thread(void* argument)
{
 8010bfc:	b580      	push	{r7, lr}
 8010bfe:	b0a2      	sub	sp, #136	@ 0x88
 8010c00:	af00      	add	r7, sp, #0
 8010c02:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef MACConf = {0};
 8010c04:	f107 0310 	add.w	r3, r7, #16
 8010c08:	2264      	movs	r2, #100	@ 0x64
 8010c0a:	2100      	movs	r1, #0
 8010c0c:	4618      	mov	r0, r3
 8010c0e:	f019 ff37 	bl	802aa80 <memset>
  int32_t PHYLinkState = 0;
 8010c12:	2300      	movs	r3, #0
 8010c14:	67bb      	str	r3, [r7, #120]	@ 0x78
  uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
 8010c16:	2300      	movs	r3, #0
 8010c18:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010c1c:	2300      	movs	r3, #0
 8010c1e:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 8010c22:	2300      	movs	r3, #0
 8010c24:	67fb      	str	r3, [r7, #124]	@ 0x7c

  struct netif *netif = (struct netif *) argument;
 8010c26:	687b      	ldr	r3, [r7, #4]
 8010c28:	677b      	str	r3, [r7, #116]	@ 0x74
/* USER CODE BEGIN ETH link init */

#if USE_DHCP
  enum dhcp_states DHCP_state = DHCP_START;
 8010c2a:	2301      	movs	r3, #1
 8010c2c:	73fb      	strb	r3, [r7, #15]
//  LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */

  for(;;)
  {
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010c2e:	484a      	ldr	r0, [pc, #296]	@ (8010d58 <ethernet_link_thread+0x15c>)
 8010c30:	f7f4 fc58 	bl	80054e4 <DP83848_GetLinkState>
 8010c34:	67b8      	str	r0, [r7, #120]	@ 0x78

  if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
 8010c36:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8010c38:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010c3c:	089b      	lsrs	r3, r3, #2
 8010c3e:	f003 0301 	and.w	r3, r3, #1
 8010c42:	b2db      	uxtb	r3, r3
 8010c44:	2b00      	cmp	r3, #0
 8010c46:	d013      	beq.n	8010c70 <ethernet_link_thread+0x74>
 8010c48:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010c4a:	2b01      	cmp	r3, #1
 8010c4c:	dc10      	bgt.n	8010c70 <ethernet_link_thread+0x74>
  {
    HAL_ETH_Stop_IT(&heth);
 8010c4e:	4843      	ldr	r0, [pc, #268]	@ (8010d5c <ethernet_link_thread+0x160>)
 8010c50:	f7f7 fc66 	bl	8008520 <HAL_ETH_Stop_IT>
    LOCK_TCPIP_CORE();
 8010c54:	f000 f936 	bl	8010ec4 <sys_lock_tcpip_core>
    netif_set_down(netif);
 8010c58:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010c5a:	f009 fe87 	bl	801a96c <netif_set_down>
    netif_set_link_down(netif);
 8010c5e:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010c60:	f009 fef2 	bl	801aa48 <netif_set_link_down>
    UNLOCK_TCPIP_CORE();
 8010c64:	f000 f93e 	bl	8010ee4 <sys_unlock_tcpip_core>
    printf("Link down...\r\n");
 8010c68:	483d      	ldr	r0, [pc, #244]	@ (8010d60 <ethernet_link_thread+0x164>)
 8010c6a:	f019 fddf 	bl	802a82c <puts>
 8010c6e:	e067      	b.n	8010d40 <ethernet_link_thread+0x144>
  }
  else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
 8010c70:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8010c72:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010c76:	f003 0304 	and.w	r3, r3, #4
 8010c7a:	2b00      	cmp	r3, #0
 8010c7c:	d160      	bne.n	8010d40 <ethernet_link_thread+0x144>
 8010c7e:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010c80:	2b01      	cmp	r3, #1
 8010c82:	dd5d      	ble.n	8010d40 <ethernet_link_thread+0x144>
  {
    switch (PHYLinkState)
 8010c84:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010c86:	3b02      	subs	r3, #2
 8010c88:	2b03      	cmp	r3, #3
 8010c8a:	d833      	bhi.n	8010cf4 <ethernet_link_thread+0xf8>
 8010c8c:	a201      	add	r2, pc, #4	@ (adr r2, 8010c94 <ethernet_link_thread+0x98>)
 8010c8e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8010c92:	bf00      	nop
 8010c94:	08010ca5 	.word	0x08010ca5
 8010c98:	08010cbb 	.word	0x08010cbb
 8010c9c:	08010ccf 	.word	0x08010ccf
 8010ca0:	08010ce3 	.word	0x08010ce3
    {
    case DP83848_STATUS_100MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010ca4:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010ca8:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010caa:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8010cae:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010cb2:	2301      	movs	r3, #1
 8010cb4:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010cb8:	e01d      	b.n	8010cf6 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_100MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010cba:	2300      	movs	r3, #0
 8010cbc:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010cbe:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8010cc2:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010cc6:	2301      	movs	r3, #1
 8010cc8:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010ccc:	e013      	b.n	8010cf6 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010cce:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010cd2:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010cd4:	2300      	movs	r3, #0
 8010cd6:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010cda:	2301      	movs	r3, #1
 8010cdc:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010ce0:	e009      	b.n	8010cf6 <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010ce2:	2300      	movs	r3, #0
 8010ce4:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010ce6:	2300      	movs	r3, #0
 8010ce8:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010cec:	2301      	movs	r3, #1
 8010cee:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010cf2:	e000      	b.n	8010cf6 <ethernet_link_thread+0xfa>
    default:
      break;
 8010cf4:	bf00      	nop
    }

    if(linkchanged)
 8010cf6:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 8010cfa:	2b00      	cmp	r3, #0
 8010cfc:	d020      	beq.n	8010d40 <ethernet_link_thread+0x144>
    {
      /* Get MAC Config MAC */
      HAL_ETH_GetMACConfig(&heth, &MACConf);
 8010cfe:	f107 0310 	add.w	r3, r7, #16
 8010d02:	4619      	mov	r1, r3
 8010d04:	4815      	ldr	r0, [pc, #84]	@ (8010d5c <ethernet_link_thread+0x160>)
 8010d06:	f7f8 f827 	bl	8008d58 <HAL_ETH_GetMACConfig>
      MACConf.DuplexMode = duplex;
 8010d0a:	6ffb      	ldr	r3, [r7, #124]	@ 0x7c
 8010d0c:	62bb      	str	r3, [r7, #40]	@ 0x28
      MACConf.Speed = speed;
 8010d0e:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 8010d12:	627b      	str	r3, [r7, #36]	@ 0x24
      HAL_ETH_SetMACConfig(&heth, &MACConf);
 8010d14:	f107 0310 	add.w	r3, r7, #16
 8010d18:	4619      	mov	r1, r3
 8010d1a:	4810      	ldr	r0, [pc, #64]	@ (8010d5c <ethernet_link_thread+0x160>)
 8010d1c:	f7f8 f9f0 	bl	8009100 <HAL_ETH_SetMACConfig>
      HAL_ETH_Start_IT(&heth);
 8010d20:	480e      	ldr	r0, [pc, #56]	@ (8010d5c <ethernet_link_thread+0x160>)
 8010d22:	f7f7 fb89 	bl	8008438 <HAL_ETH_Start_IT>
      LOCK_TCPIP_CORE();
 8010d26:	f000 f8cd 	bl	8010ec4 <sys_lock_tcpip_core>
      netif_set_up(netif);
 8010d2a:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010d2c:	f009 fdb0 	bl	801a890 <netif_set_up>
      netif_set_link_up(netif);
 8010d30:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010d32:	f009 fe4f 	bl	801a9d4 <netif_set_link_up>
      UNLOCK_TCPIP_CORE();
 8010d36:	f000 f8d5 	bl	8010ee4 <sys_unlock_tcpip_core>
      printf("Link up...\r\n");
 8010d3a:	480a      	ldr	r0, [pc, #40]	@ (8010d64 <ethernet_link_thread+0x168>)
 8010d3c:	f019 fd76 	bl	802a82c <puts>
    }
  }

/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
  dhcp_sm(netif, &DHCP_state);
 8010d40:	f107 030f 	add.w	r3, r7, #15
 8010d44:	4619      	mov	r1, r3
 8010d46:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010d48:	f000 f922 	bl	8010f90 <dhcp_sm>
#endif
  /* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
//  UNLOCK_TCPIP_CORE();
  osDelay(pdMS_TO_TICKS(500));
 8010d4c:	f44f 70fa 	mov.w	r0, #500	@ 0x1f4
 8010d50:	f000 faff 	bl	8011352 <osDelay>
//  LOCK_TCPIP_CORE();
  continue; /* skip next osDelay */
 8010d54:	bf00      	nop
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010d56:	e76a      	b.n	8010c2e <ethernet_link_thread+0x32>
 8010d58:	240023b4 	.word	0x240023b4
 8010d5c:	240022cc 	.word	0x240022cc
 8010d60:	0802d938 	.word	0x0802d938
 8010d64:	0802d948 	.word	0x0802d948

08010d68 <ethernetif_notify_conn_changed>:
  * @brief  This function notify user about link status changement.
  * @param  netif: the network interface
  * @retval None
  */
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
 8010d68:	b480      	push	{r7}
 8010d6a:	b083      	sub	sp, #12
 8010d6c:	af00      	add	r7, sp, #0
 8010d6e:	6078      	str	r0, [r7, #4]
  /* NOTE : This is function could be implemented in user file
            when the callback is needed,
  */
}
 8010d70:	bf00      	nop
 8010d72:	370c      	adds	r7, #12
 8010d74:	46bd      	mov	sp, r7
 8010d76:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010d7a:	4770      	bx	lr

08010d7c <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
 8010d7c:	b580      	push	{r7, lr}
 8010d7e:	b086      	sub	sp, #24
 8010d80:	af02      	add	r7, sp, #8
 8010d82:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
  struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
 8010d84:	4812      	ldr	r0, [pc, #72]	@ (8010dd0 <HAL_ETH_RxAllocateCallback+0x54>)
 8010d86:	f009 faeb 	bl	801a360 <memp_malloc_pool>
 8010d8a:	60f8      	str	r0, [r7, #12]
  if (p)
 8010d8c:	68fb      	ldr	r3, [r7, #12]
 8010d8e:	2b00      	cmp	r3, #0
 8010d90:	d014      	beq.n	8010dbc <HAL_ETH_RxAllocateCallback+0x40>
  {
    /* Get the buff from the struct pbuf address. */
    *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
 8010d92:	68fb      	ldr	r3, [r7, #12]
 8010d94:	f103 0220 	add.w	r2, r3, #32
 8010d98:	687b      	ldr	r3, [r7, #4]
 8010d9a:	601a      	str	r2, [r3, #0]
    p->custom_free_function = pbuf_free_custom;
 8010d9c:	68fb      	ldr	r3, [r7, #12]
 8010d9e:	4a0d      	ldr	r2, [pc, #52]	@ (8010dd4 <HAL_ETH_RxAllocateCallback+0x58>)
 8010da0:	611a      	str	r2, [r3, #16]
    /* Initialize the struct pbuf.
    * This must be performed whenever a buffer's allocated because it may be
    * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
    pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
 8010da2:	687b      	ldr	r3, [r7, #4]
 8010da4:	681b      	ldr	r3, [r3, #0]
 8010da6:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 8010daa:	9201      	str	r2, [sp, #4]
 8010dac:	9300      	str	r3, [sp, #0]
 8010dae:	68fb      	ldr	r3, [r7, #12]
 8010db0:	2241      	movs	r2, #65	@ 0x41
 8010db2:	2100      	movs	r1, #0
 8010db4:	2000      	movs	r0, #0
 8010db6:	f00a f86f 	bl	801ae98 <pbuf_alloced_custom>
  {
    RxAllocStatus = RX_ALLOC_ERROR;
    *buff = NULL;
  }
/* USER CODE END HAL ETH RxAllocateCallback */
}
 8010dba:	e005      	b.n	8010dc8 <HAL_ETH_RxAllocateCallback+0x4c>
    RxAllocStatus = RX_ALLOC_ERROR;
 8010dbc:	4b06      	ldr	r3, [pc, #24]	@ (8010dd8 <HAL_ETH_RxAllocateCallback+0x5c>)
 8010dbe:	2201      	movs	r2, #1
 8010dc0:	701a      	strb	r2, [r3, #0]
    *buff = NULL;
 8010dc2:	687b      	ldr	r3, [r7, #4]
 8010dc4:	2200      	movs	r2, #0
 8010dc6:	601a      	str	r2, [r3, #0]
}
 8010dc8:	bf00      	nop
 8010dca:	3710      	adds	r7, #16
 8010dcc:	46bd      	mov	sp, r7
 8010dce:	bd80      	pop	{r7, pc}
 8010dd0:	080319ac 	.word	0x080319ac
 8010dd4:	08010989 	.word	0x08010989
 8010dd8:	240022c0 	.word	0x240022c0

08010ddc <HAL_ETH_RxLinkCallback>:

void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
 8010ddc:	b480      	push	{r7}
 8010dde:	b08d      	sub	sp, #52	@ 0x34
 8010de0:	af00      	add	r7, sp, #0
 8010de2:	60f8      	str	r0, [r7, #12]
 8010de4:	60b9      	str	r1, [r7, #8]
 8010de6:	607a      	str	r2, [r7, #4]
 8010de8:	807b      	strh	r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */

  struct pbuf **ppStart = (struct pbuf **)pStart;
 8010dea:	68fb      	ldr	r3, [r7, #12]
 8010dec:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf **ppEnd = (struct pbuf **)pEnd;
 8010dee:	68bb      	ldr	r3, [r7, #8]
 8010df0:	627b      	str	r3, [r7, #36]	@ 0x24
  struct pbuf *p = NULL;
 8010df2:	2300      	movs	r3, #0
 8010df4:	62fb      	str	r3, [r7, #44]	@ 0x2c

  /* Get the struct pbuf from the buff address. */
  p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
 8010df6:	687b      	ldr	r3, [r7, #4]
 8010df8:	3b20      	subs	r3, #32
 8010dfa:	62fb      	str	r3, [r7, #44]	@ 0x2c
  p->next = NULL;
 8010dfc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010dfe:	2200      	movs	r2, #0
 8010e00:	601a      	str	r2, [r3, #0]
  p->tot_len = 0;
 8010e02:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e04:	2200      	movs	r2, #0
 8010e06:	811a      	strh	r2, [r3, #8]
  p->len = Length;
 8010e08:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e0a:	887a      	ldrh	r2, [r7, #2]
 8010e0c:	815a      	strh	r2, [r3, #10]

  /* Chain the buffer. */
  if (!*ppStart)
 8010e0e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010e10:	681b      	ldr	r3, [r3, #0]
 8010e12:	2b00      	cmp	r3, #0
 8010e14:	d103      	bne.n	8010e1e <HAL_ETH_RxLinkCallback+0x42>
  {
    /* The first buffer of the packet. */
    *ppStart = p;
 8010e16:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010e18:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8010e1a:	601a      	str	r2, [r3, #0]
 8010e1c:	e003      	b.n	8010e26 <HAL_ETH_RxLinkCallback+0x4a>
  }
  else
  {
    /* Chain the buffer to the end of the packet. */
    (*ppEnd)->next = p;
 8010e1e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8010e20:	681b      	ldr	r3, [r3, #0]
 8010e22:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8010e24:	601a      	str	r2, [r3, #0]
  }
  *ppEnd  = p;
 8010e26:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8010e28:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8010e2a:	601a      	str	r2, [r3, #0]

  /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
   * set to its own length, plus the length of all the following pbufs in the chain. */
  for (p = *ppStart; p != NULL; p = p->next)
 8010e2c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010e2e:	681b      	ldr	r3, [r3, #0]
 8010e30:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8010e32:	e009      	b.n	8010e48 <HAL_ETH_RxLinkCallback+0x6c>
  {
    p->tot_len += Length;
 8010e34:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e36:	891a      	ldrh	r2, [r3, #8]
 8010e38:	887b      	ldrh	r3, [r7, #2]
 8010e3a:	4413      	add	r3, r2
 8010e3c:	b29a      	uxth	r2, r3
 8010e3e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e40:	811a      	strh	r2, [r3, #8]
  for (p = *ppStart; p != NULL; p = p->next)
 8010e42:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e44:	681b      	ldr	r3, [r3, #0]
 8010e46:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8010e48:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8010e4a:	2b00      	cmp	r3, #0
 8010e4c:	d1f2      	bne.n	8010e34 <HAL_ETH_RxLinkCallback+0x58>
  }

  /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
  SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
 8010e4e:	887b      	ldrh	r3, [r7, #2]
 8010e50:	687a      	ldr	r2, [r7, #4]
 8010e52:	623a      	str	r2, [r7, #32]
 8010e54:	61fb      	str	r3, [r7, #28]
  \param[in]   dsize   size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
{
  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    if ( dsize > 0 ) { 
 8010e56:	69fb      	ldr	r3, [r7, #28]
 8010e58:	2b00      	cmp	r3, #0
 8010e5a:	dd1d      	ble.n	8010e98 <HAL_ETH_RxLinkCallback+0xbc>
       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
 8010e5c:	6a3b      	ldr	r3, [r7, #32]
 8010e5e:	f003 021f 	and.w	r2, r3, #31
 8010e62:	69fb      	ldr	r3, [r7, #28]
 8010e64:	4413      	add	r3, r2
 8010e66:	61bb      	str	r3, [r7, #24]
      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
 8010e68:	6a3b      	ldr	r3, [r7, #32]
 8010e6a:	617b      	str	r3, [r7, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8010e6c:	f3bf 8f4f 	dsb	sy
}
 8010e70:	bf00      	nop
    
      __DSB();

      do {
        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
 8010e72:	4a0d      	ldr	r2, [pc, #52]	@ (8010ea8 <HAL_ETH_RxLinkCallback+0xcc>)
 8010e74:	697b      	ldr	r3, [r7, #20]
 8010e76:	f8c2 325c 	str.w	r3, [r2, #604]	@ 0x25c
        op_addr += __SCB_DCACHE_LINE_SIZE;
 8010e7a:	697b      	ldr	r3, [r7, #20]
 8010e7c:	3320      	adds	r3, #32
 8010e7e:	617b      	str	r3, [r7, #20]
        op_size -= __SCB_DCACHE_LINE_SIZE;
 8010e80:	69bb      	ldr	r3, [r7, #24]
 8010e82:	3b20      	subs	r3, #32
 8010e84:	61bb      	str	r3, [r7, #24]
      } while ( op_size > 0 );
 8010e86:	69bb      	ldr	r3, [r7, #24]
 8010e88:	2b00      	cmp	r3, #0
 8010e8a:	dcf2      	bgt.n	8010e72 <HAL_ETH_RxLinkCallback+0x96>
  __ASM volatile ("dsb 0xF":::"memory");
 8010e8c:	f3bf 8f4f 	dsb	sy
}
 8010e90:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8010e92:	f3bf 8f6f 	isb	sy
}
 8010e96:	bf00      	nop

      __DSB();
      __ISB();
    }
  #endif
}
 8010e98:	bf00      	nop

/* USER CODE END HAL ETH RxLinkCallback */
}
 8010e9a:	bf00      	nop
 8010e9c:	3734      	adds	r7, #52	@ 0x34
 8010e9e:	46bd      	mov	sp, r7
 8010ea0:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010ea4:	4770      	bx	lr
 8010ea6:	bf00      	nop
 8010ea8:	e000ed00 	.word	0xe000ed00

08010eac <HAL_ETH_TxFreeCallback>:

void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
 8010eac:	b580      	push	{r7, lr}
 8010eae:	b082      	sub	sp, #8
 8010eb0:	af00      	add	r7, sp, #0
 8010eb2:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */

  pbuf_free((struct pbuf *)buff);
 8010eb4:	6878      	ldr	r0, [r7, #4]
 8010eb6:	f00a f9d9 	bl	801b26c <pbuf_free>

/* USER CODE END HAL ETH TxFreeCallback */
}
 8010eba:	bf00      	nop
 8010ebc:	3708      	adds	r7, #8
 8010ebe:	46bd      	mov	sp, r7
 8010ec0:	bd80      	pop	{r7, pc}
	...

08010ec4 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */

static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;

void sys_lock_tcpip_core(void){
 8010ec4:	b580      	push	{r7, lr}
 8010ec6:	af00      	add	r7, sp, #0
	sys_mutex_lock(&lock_tcpip_core);
 8010ec8:	4804      	ldr	r0, [pc, #16]	@ (8010edc <sys_lock_tcpip_core+0x18>)
 8010eca:	f016 f975 	bl	80271b8 <sys_mutex_lock>
	lwip_core_lock_holder_thread_id = osThreadGetId();
 8010ece:	f000 fa35 	bl	801133c <osThreadGetId>
 8010ed2:	4603      	mov	r3, r0
 8010ed4:	4a02      	ldr	r2, [pc, #8]	@ (8010ee0 <sys_lock_tcpip_core+0x1c>)
 8010ed6:	6013      	str	r3, [r2, #0]
}
 8010ed8:	bf00      	nop
 8010eda:	bd80      	pop	{r7, pc}
 8010edc:	24024414 	.word	0x24024414
 8010ee0:	240023d4 	.word	0x240023d4

08010ee4 <sys_unlock_tcpip_core>:

void sys_unlock_tcpip_core(void){
 8010ee4:	b580      	push	{r7, lr}
 8010ee6:	af00      	add	r7, sp, #0
	lwip_core_lock_holder_thread_id = 0;
 8010ee8:	4b03      	ldr	r3, [pc, #12]	@ (8010ef8 <sys_unlock_tcpip_core+0x14>)
 8010eea:	2200      	movs	r2, #0
 8010eec:	601a      	str	r2, [r3, #0]
	sys_mutex_unlock(&lock_tcpip_core);
 8010eee:	4803      	ldr	r0, [pc, #12]	@ (8010efc <sys_unlock_tcpip_core+0x18>)
 8010ef0:	f016 f971 	bl	80271d6 <sys_mutex_unlock>
}
 8010ef4:	bf00      	nop
 8010ef6:	bd80      	pop	{r7, pc}
 8010ef8:	240023d4 	.word	0x240023d4
 8010efc:	24024414 	.word	0x24024414

08010f00 <sys_check_core_locking>:

void sys_check_core_locking(void){
 8010f00:	b580      	push	{r7, lr}
 8010f02:	b082      	sub	sp, #8
 8010f04:	af00      	add	r7, sp, #0
  /* Embedded systems should check we are NOT in an interrupt context here */

  LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
 8010f06:	4b15      	ldr	r3, [pc, #84]	@ (8010f5c <sys_check_core_locking+0x5c>)
 8010f08:	685b      	ldr	r3, [r3, #4]
 8010f0a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8010f0e:	2b00      	cmp	r3, #0
 8010f10:	d006      	beq.n	8010f20 <sys_check_core_locking+0x20>
 8010f12:	4b13      	ldr	r3, [pc, #76]	@ (8010f60 <sys_check_core_locking+0x60>)
 8010f14:	f240 4216 	movw	r2, #1046	@ 0x416
 8010f18:	4912      	ldr	r1, [pc, #72]	@ (8010f64 <sys_check_core_locking+0x64>)
 8010f1a:	4813      	ldr	r0, [pc, #76]	@ (8010f68 <sys_check_core_locking+0x68>)
 8010f1c:	f019 fc1e 	bl	802a75c <iprintf>

  if (lwip_tcpip_thread_id != 0) {
 8010f20:	4b12      	ldr	r3, [pc, #72]	@ (8010f6c <sys_check_core_locking+0x6c>)
 8010f22:	681b      	ldr	r3, [r3, #0]
 8010f24:	2b00      	cmp	r3, #0
 8010f26:	d014      	beq.n	8010f52 <sys_check_core_locking+0x52>
	  osThreadId_t current_thread_id = osThreadGetId();
 8010f28:	f000 fa08 	bl	801133c <osThreadGetId>
 8010f2c:	6078      	str	r0, [r7, #4]

#if LWIP_TCPIP_CORE_LOCKING
	LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
 8010f2e:	4b10      	ldr	r3, [pc, #64]	@ (8010f70 <sys_check_core_locking+0x70>)
 8010f30:	681b      	ldr	r3, [r3, #0]
 8010f32:	687a      	ldr	r2, [r7, #4]
 8010f34:	429a      	cmp	r2, r3
 8010f36:	d006      	beq.n	8010f46 <sys_check_core_locking+0x46>
 8010f38:	4b09      	ldr	r3, [pc, #36]	@ (8010f60 <sys_check_core_locking+0x60>)
 8010f3a:	f240 421c 	movw	r2, #1052	@ 0x41c
 8010f3e:	490d      	ldr	r1, [pc, #52]	@ (8010f74 <sys_check_core_locking+0x74>)
 8010f40:	4809      	ldr	r0, [pc, #36]	@ (8010f68 <sys_check_core_locking+0x68>)
 8010f42:	f019 fc0b 	bl	802a75c <iprintf>
	/* ETH_CODE: to easily check that example has correct handling of core lock
	 * This will trigger breakpoint (__BKPT)
	 */
#warning Below check should be removed in production code
	if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
 8010f46:	4b0a      	ldr	r3, [pc, #40]	@ (8010f70 <sys_check_core_locking+0x70>)
 8010f48:	681b      	ldr	r3, [r3, #0]
 8010f4a:	687a      	ldr	r2, [r7, #4]
 8010f4c:	429a      	cmp	r2, r3
 8010f4e:	d000      	beq.n	8010f52 <sys_check_core_locking+0x52>
 8010f50:	be00      	bkpt	0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
  }
}
 8010f52:	bf00      	nop
 8010f54:	3708      	adds	r7, #8
 8010f56:	46bd      	mov	sp, r7
 8010f58:	bd80      	pop	{r7, pc}
 8010f5a:	bf00      	nop
 8010f5c:	e000ed00 	.word	0xe000ed00
 8010f60:	0802d8e4 	.word	0x0802d8e4
 8010f64:	0802d954 	.word	0x0802d954
 8010f68:	0802d910 	.word	0x0802d910
 8010f6c:	240023d8 	.word	0x240023d8
 8010f70:	240023d4 	.word	0x240023d4
 8010f74:	0802d97c 	.word	0x0802d97c

08010f78 <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
 8010f78:	b580      	push	{r7, lr}
 8010f7a:	af00      	add	r7, sp, #0
	lwip_tcpip_thread_id = osThreadGetId();
 8010f7c:	f000 f9de 	bl	801133c <osThreadGetId>
 8010f80:	4603      	mov	r3, r0
 8010f82:	4a02      	ldr	r2, [pc, #8]	@ (8010f8c <sys_mark_tcpip_thread+0x14>)
 8010f84:	6013      	str	r3, [r2, #0]
}
 8010f86:	bf00      	nop
 8010f88:	bd80      	pop	{r7, pc}
 8010f8a:	bf00      	nop
 8010f8c:	240023d8 	.word	0x240023d8

08010f90 <dhcp_sm>:

#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
 8010f90:	b580      	push	{r7, lr}
 8010f92:	b08c      	sub	sp, #48	@ 0x30
 8010f94:	af00      	add	r7, sp, #0
 8010f96:	6078      	str	r0, [r7, #4]
 8010f98:	6039      	str	r1, [r7, #0]
	ip_addr_t gw;
#ifdef DHCP_USER_LOGS
	uint8_t iptxt[20];
#endif

	switch(*state)
 8010f9a:	683b      	ldr	r3, [r7, #0]
 8010f9c:	781b      	ldrb	r3, [r3, #0]
 8010f9e:	2b03      	cmp	r3, #3
 8010fa0:	d072      	beq.n	8011088 <dhcp_sm+0xf8>
 8010fa2:	2b03      	cmp	r3, #3
 8010fa4:	dc7b      	bgt.n	801109e <dhcp_sm+0x10e>
 8010fa6:	2b01      	cmp	r3, #1
 8010fa8:	d002      	beq.n	8010fb0 <dhcp_sm+0x20>
 8010faa:	2b02      	cmp	r3, #2
 8010fac:	d00a      	beq.n	8010fc4 <dhcp_sm+0x34>
	    	{
	    		*state = DHCP_START;
	    	}
	    	break;
	    default:
	    	break;
 8010fae:	e076      	b.n	801109e <dhcp_sm+0x10e>
	    	*state = DHCP_WAIT_ADDRESS;
 8010fb0:	683b      	ldr	r3, [r7, #0]
 8010fb2:	2202      	movs	r2, #2
 8010fb4:	701a      	strb	r2, [r3, #0]
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010fb6:	687b      	ldr	r3, [r7, #4]
 8010fb8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010fba:	62fb      	str	r3, [r7, #44]	@ 0x2c
			printf("  State: Looking for DHCP server ...\n");
 8010fbc:	483c      	ldr	r0, [pc, #240]	@ (80110b0 <dhcp_sm+0x120>)
 8010fbe:	f019 fc35 	bl	802a82c <puts>
	    	break;
 8010fc2:	e071      	b.n	80110a8 <dhcp_sm+0x118>
	    	if (dhcp_supplied_address(netif))
 8010fc4:	6878      	ldr	r0, [r7, #4]
 8010fc6:	f013 fa5b 	bl	8024480 <dhcp_supplied_address>
 8010fca:	4603      	mov	r3, r0
 8010fcc:	2b00      	cmp	r3, #0
 8010fce:	d015      	beq.n	8010ffc <dhcp_sm+0x6c>
	    		*state = DHCP_ADDRESS_ASSIGNED;
 8010fd0:	683b      	ldr	r3, [r7, #0]
 8010fd2:	2203      	movs	r2, #3
 8010fd4:	701a      	strb	r2, [r3, #0]
				sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 8010fd6:	687b      	ldr	r3, [r7, #4]
 8010fd8:	3304      	adds	r3, #4
 8010fda:	4618      	mov	r0, r3
 8010fdc:	f014 ffe8 	bl	8025fb0 <ip4addr_ntoa>
 8010fe0:	4602      	mov	r2, r0
 8010fe2:	f107 030c 	add.w	r3, r7, #12
 8010fe6:	4933      	ldr	r1, [pc, #204]	@ (80110b4 <dhcp_sm+0x124>)
 8010fe8:	4618      	mov	r0, r3
 8010fea:	f019 fc27 	bl	802a83c <siprintf>
				printf("IP address assigned by a DHCP server: %s\n", iptxt);
 8010fee:	f107 030c 	add.w	r3, r7, #12
 8010ff2:	4619      	mov	r1, r3
 8010ff4:	4830      	ldr	r0, [pc, #192]	@ (80110b8 <dhcp_sm+0x128>)
 8010ff6:	f019 fbb1 	bl	802a75c <iprintf>
	    	break;
 8010ffa:	e052      	b.n	80110a2 <dhcp_sm+0x112>
	    		dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8010ffc:	687b      	ldr	r3, [r7, #4]
 8010ffe:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011000:	62fb      	str	r3, [r7, #44]	@ 0x2c
				if (dhcp->tries > MAX_DHCP_TRIES)
 8011002:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011004:	799b      	ldrb	r3, [r3, #6]
 8011006:	2b04      	cmp	r3, #4
 8011008:	d94b      	bls.n	80110a2 <dhcp_sm+0x112>
					*state = DHCP_TIMEOUT;
 801100a:	683b      	ldr	r3, [r7, #0]
 801100c:	2204      	movs	r2, #4
 801100e:	701a      	strb	r2, [r3, #0]
					LOCK_TCPIP_CORE();
 8011010:	f7ff ff58 	bl	8010ec4 <sys_lock_tcpip_core>
					dhcp_stop(netif);
 8011014:	6878      	ldr	r0, [r7, #4]
 8011016:	f012 fc8b 	bl	8023930 <dhcp_stop>
					UNLOCK_TCPIP_CORE();
 801101a:	f7ff ff63 	bl	8010ee4 <sys_unlock_tcpip_core>
					ipaddr_aton(STATIC_IP, &ipaddr);
 801101e:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8011022:	4619      	mov	r1, r3
 8011024:	4825      	ldr	r0, [pc, #148]	@ (80110bc <dhcp_sm+0x12c>)
 8011026:	f014 fe99 	bl	8025d5c <ip4addr_aton>
					ipaddr_aton(STATIC_MASK, &netmask);
 801102a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 801102e:	4619      	mov	r1, r3
 8011030:	4823      	ldr	r0, [pc, #140]	@ (80110c0 <dhcp_sm+0x130>)
 8011032:	f014 fe93 	bl	8025d5c <ip4addr_aton>
					ipaddr_aton(STATIC_GW, &gw);
 8011036:	f107 0320 	add.w	r3, r7, #32
 801103a:	4619      	mov	r1, r3
 801103c:	4821      	ldr	r0, [pc, #132]	@ (80110c4 <dhcp_sm+0x134>)
 801103e:	f014 fe8d 	bl	8025d5c <ip4addr_aton>
					LOCK_TCPIP_CORE();
 8011042:	f7ff ff3f 	bl	8010ec4 <sys_lock_tcpip_core>
					netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
 8011046:	f107 0320 	add.w	r3, r7, #32
 801104a:	f107 0224 	add.w	r2, r7, #36	@ 0x24
 801104e:	f107 0128 	add.w	r1, r7, #40	@ 0x28
 8011052:	6878      	ldr	r0, [r7, #4]
 8011054:	f009 fbc0 	bl	801a7d8 <netif_set_addr>
					UNLOCK_TCPIP_CORE();
 8011058:	f7ff ff44 	bl	8010ee4 <sys_unlock_tcpip_core>
					sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 801105c:	687b      	ldr	r3, [r7, #4]
 801105e:	3304      	adds	r3, #4
 8011060:	4618      	mov	r0, r3
 8011062:	f014 ffa5 	bl	8025fb0 <ip4addr_ntoa>
 8011066:	4602      	mov	r2, r0
 8011068:	f107 030c 	add.w	r3, r7, #12
 801106c:	4911      	ldr	r1, [pc, #68]	@ (80110b4 <dhcp_sm+0x124>)
 801106e:	4618      	mov	r0, r3
 8011070:	f019 fbe4 	bl	802a83c <siprintf>
					printf("DHCP Timeout !! \n");
 8011074:	4814      	ldr	r0, [pc, #80]	@ (80110c8 <dhcp_sm+0x138>)
 8011076:	f019 fbd9 	bl	802a82c <puts>
					printf("Static IP address: %s\n", iptxt);
 801107a:	f107 030c 	add.w	r3, r7, #12
 801107e:	4619      	mov	r1, r3
 8011080:	4812      	ldr	r0, [pc, #72]	@ (80110cc <dhcp_sm+0x13c>)
 8011082:	f019 fb6b 	bl	802a75c <iprintf>
	    	break;
 8011086:	e00c      	b.n	80110a2 <dhcp_sm+0x112>
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8011088:	687b      	ldr	r3, [r7, #4]
 801108a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801108c:	62fb      	str	r3, [r7, #44]	@ 0x2c
	    	if(dhcp->state == 3)
 801108e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011090:	795b      	ldrb	r3, [r3, #5]
 8011092:	2b03      	cmp	r3, #3
 8011094:	d107      	bne.n	80110a6 <dhcp_sm+0x116>
	    		*state = DHCP_START;
 8011096:	683b      	ldr	r3, [r7, #0]
 8011098:	2201      	movs	r2, #1
 801109a:	701a      	strb	r2, [r3, #0]
	    	break;
 801109c:	e003      	b.n	80110a6 <dhcp_sm+0x116>
	    	break;
 801109e:	bf00      	nop
 80110a0:	e002      	b.n	80110a8 <dhcp_sm+0x118>
	    	break;
 80110a2:	bf00      	nop
 80110a4:	e000      	b.n	80110a8 <dhcp_sm+0x118>
	    	break;
 80110a6:	bf00      	nop
	    }
}
 80110a8:	bf00      	nop
 80110aa:	3730      	adds	r7, #48	@ 0x30
 80110ac:	46bd      	mov	sp, r7
 80110ae:	bd80      	pop	{r7, pc}
 80110b0:	0802d9a0 	.word	0x0802d9a0
 80110b4:	0802d9c8 	.word	0x0802d9c8
 80110b8:	0802d9cc 	.word	0x0802d9cc
 80110bc:	0802d9f8 	.word	0x0802d9f8
 80110c0:	0802da08 	.word	0x0802da08
 80110c4:	0802da18 	.word	0x0802da18
 80110c8:	0802da24 	.word	0x0802da24
 80110cc:	0802da38 	.word	0x0802da38

080110d0 <__NVIC_SetPriority>:
{
 80110d0:	b480      	push	{r7}
 80110d2:	b083      	sub	sp, #12
 80110d4:	af00      	add	r7, sp, #0
 80110d6:	4603      	mov	r3, r0
 80110d8:	6039      	str	r1, [r7, #0]
 80110da:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 80110dc:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80110e0:	2b00      	cmp	r3, #0
 80110e2:	db0a      	blt.n	80110fa <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80110e4:	683b      	ldr	r3, [r7, #0]
 80110e6:	b2da      	uxtb	r2, r3
 80110e8:	490c      	ldr	r1, [pc, #48]	@ (801111c <__NVIC_SetPriority+0x4c>)
 80110ea:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80110ee:	0112      	lsls	r2, r2, #4
 80110f0:	b2d2      	uxtb	r2, r2
 80110f2:	440b      	add	r3, r1
 80110f4:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 80110f8:	e00a      	b.n	8011110 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80110fa:	683b      	ldr	r3, [r7, #0]
 80110fc:	b2da      	uxtb	r2, r3
 80110fe:	4908      	ldr	r1, [pc, #32]	@ (8011120 <__NVIC_SetPriority+0x50>)
 8011100:	88fb      	ldrh	r3, [r7, #6]
 8011102:	f003 030f 	and.w	r3, r3, #15
 8011106:	3b04      	subs	r3, #4
 8011108:	0112      	lsls	r2, r2, #4
 801110a:	b2d2      	uxtb	r2, r2
 801110c:	440b      	add	r3, r1
 801110e:	761a      	strb	r2, [r3, #24]
}
 8011110:	bf00      	nop
 8011112:	370c      	adds	r7, #12
 8011114:	46bd      	mov	sp, r7
 8011116:	f85d 7b04 	ldr.w	r7, [sp], #4
 801111a:	4770      	bx	lr
 801111c:	e000e100 	.word	0xe000e100
 8011120:	e000ed00 	.word	0xe000ed00

08011124 <SysTick_Handler>:

/*
  SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
 8011124:	b580      	push	{r7, lr}
 8011126:	af00      	add	r7, sp, #0
  /* Clear overflow flag */
  SysTick->CTRL;
 8011128:	4b05      	ldr	r3, [pc, #20]	@ (8011140 <SysTick_Handler+0x1c>)
 801112a:	681b      	ldr	r3, [r3, #0]

  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
 801112c:	f003 fa3c 	bl	80145a8 <xTaskGetSchedulerState>
 8011130:	4603      	mov	r3, r0
 8011132:	2b01      	cmp	r3, #1
 8011134:	d001      	beq.n	801113a <SysTick_Handler+0x16>
    /* Call tick handler */
    xPortSysTickHandler();
 8011136:	f004 fc4f 	bl	80159d8 <xPortSysTickHandler>
  }
}
 801113a:	bf00      	nop
 801113c:	bd80      	pop	{r7, pc}
 801113e:	bf00      	nop
 8011140:	e000e010 	.word	0xe000e010

08011144 <SVC_Setup>:
#endif /* SysTick */

/*
  Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
 8011144:	b580      	push	{r7, lr}
 8011146:	af00      	add	r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
  /* Service Call interrupt might be configured before kernel start     */
  /* and when its priority is lower or equal to BASEPRI, svc intruction */
  /* causes a Hard Fault.                                               */
  NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
 8011148:	2100      	movs	r1, #0
 801114a:	f06f 0004 	mvn.w	r0, #4
 801114e:	f7ff ffbf 	bl	80110d0 <__NVIC_SetPriority>
#endif
}
 8011152:	bf00      	nop
 8011154:	bd80      	pop	{r7, pc}
	...

08011158 <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 8011158:	b480      	push	{r7}
 801115a:	b083      	sub	sp, #12
 801115c:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801115e:	f3ef 8305 	mrs	r3, IPSR
 8011162:	603b      	str	r3, [r7, #0]
  return(result);
 8011164:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 8011166:	2b00      	cmp	r3, #0
 8011168:	d003      	beq.n	8011172 <osKernelInitialize+0x1a>
    stat = osErrorISR;
 801116a:	f06f 0305 	mvn.w	r3, #5
 801116e:	607b      	str	r3, [r7, #4]
 8011170:	e00c      	b.n	801118c <osKernelInitialize+0x34>
  }
  else {
    if (KernelState == osKernelInactive) {
 8011172:	4b0a      	ldr	r3, [pc, #40]	@ (801119c <osKernelInitialize+0x44>)
 8011174:	681b      	ldr	r3, [r3, #0]
 8011176:	2b00      	cmp	r3, #0
 8011178:	d105      	bne.n	8011186 <osKernelInitialize+0x2e>
        EvrFreeRTOSSetup(0U);
      #endif
      #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
        vPortDefineHeapRegions (configHEAP_5_REGIONS);
      #endif
      KernelState = osKernelReady;
 801117a:	4b08      	ldr	r3, [pc, #32]	@ (801119c <osKernelInitialize+0x44>)
 801117c:	2201      	movs	r2, #1
 801117e:	601a      	str	r2, [r3, #0]
      stat = osOK;
 8011180:	2300      	movs	r3, #0
 8011182:	607b      	str	r3, [r7, #4]
 8011184:	e002      	b.n	801118c <osKernelInitialize+0x34>
    } else {
      stat = osError;
 8011186:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801118a:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 801118c:	687b      	ldr	r3, [r7, #4]
}
 801118e:	4618      	mov	r0, r3
 8011190:	370c      	adds	r7, #12
 8011192:	46bd      	mov	sp, r7
 8011194:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011198:	4770      	bx	lr
 801119a:	bf00      	nop
 801119c:	240023dc 	.word	0x240023dc

080111a0 <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 80111a0:	b580      	push	{r7, lr}
 80111a2:	b082      	sub	sp, #8
 80111a4:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80111a6:	f3ef 8305 	mrs	r3, IPSR
 80111aa:	603b      	str	r3, [r7, #0]
  return(result);
 80111ac:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 80111ae:	2b00      	cmp	r3, #0
 80111b0:	d003      	beq.n	80111ba <osKernelStart+0x1a>
    stat = osErrorISR;
 80111b2:	f06f 0305 	mvn.w	r3, #5
 80111b6:	607b      	str	r3, [r7, #4]
 80111b8:	e010      	b.n	80111dc <osKernelStart+0x3c>
  }
  else {
    if (KernelState == osKernelReady) {
 80111ba:	4b0b      	ldr	r3, [pc, #44]	@ (80111e8 <osKernelStart+0x48>)
 80111bc:	681b      	ldr	r3, [r3, #0]
 80111be:	2b01      	cmp	r3, #1
 80111c0:	d109      	bne.n	80111d6 <osKernelStart+0x36>
      /* Ensure SVC priority is at the reset value */
      SVC_Setup();
 80111c2:	f7ff ffbf 	bl	8011144 <SVC_Setup>
      /* Change state to enable IRQ masking check */
      KernelState = osKernelRunning;
 80111c6:	4b08      	ldr	r3, [pc, #32]	@ (80111e8 <osKernelStart+0x48>)
 80111c8:	2202      	movs	r2, #2
 80111ca:	601a      	str	r2, [r3, #0]
      /* Start the kernel scheduler */
      vTaskStartScheduler();
 80111cc:	f002 fd30 	bl	8013c30 <vTaskStartScheduler>
      stat = osOK;
 80111d0:	2300      	movs	r3, #0
 80111d2:	607b      	str	r3, [r7, #4]
 80111d4:	e002      	b.n	80111dc <osKernelStart+0x3c>
    } else {
      stat = osError;
 80111d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80111da:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 80111dc:	687b      	ldr	r3, [r7, #4]
}
 80111de:	4618      	mov	r0, r3
 80111e0:	3708      	adds	r7, #8
 80111e2:	46bd      	mov	sp, r7
 80111e4:	bd80      	pop	{r7, pc}
 80111e6:	bf00      	nop
 80111e8:	240023dc 	.word	0x240023dc

080111ec <osKernelGetTickCount>:
  }

  return (lock);
}

uint32_t osKernelGetTickCount (void) {
 80111ec:	b580      	push	{r7, lr}
 80111ee:	b082      	sub	sp, #8
 80111f0:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80111f2:	f3ef 8305 	mrs	r3, IPSR
 80111f6:	603b      	str	r3, [r7, #0]
  return(result);
 80111f8:	683b      	ldr	r3, [r7, #0]
  TickType_t ticks;

  if (IS_IRQ()) {
 80111fa:	2b00      	cmp	r3, #0
 80111fc:	d003      	beq.n	8011206 <osKernelGetTickCount+0x1a>
    ticks = xTaskGetTickCountFromISR();
 80111fe:	f002 fe43 	bl	8013e88 <xTaskGetTickCountFromISR>
 8011202:	6078      	str	r0, [r7, #4]
 8011204:	e002      	b.n	801120c <osKernelGetTickCount+0x20>
  } else {
    ticks = xTaskGetTickCount();
 8011206:	f002 fe2f 	bl	8013e68 <xTaskGetTickCount>
 801120a:	6078      	str	r0, [r7, #4]
  }

  return (ticks);
 801120c:	687b      	ldr	r3, [r7, #4]
}
 801120e:	4618      	mov	r0, r3
 8011210:	3708      	adds	r7, #8
 8011212:	46bd      	mov	sp, r7
 8011214:	bd80      	pop	{r7, pc}

08011216 <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 8011216:	b580      	push	{r7, lr}
 8011218:	b08e      	sub	sp, #56	@ 0x38
 801121a:	af04      	add	r7, sp, #16
 801121c:	60f8      	str	r0, [r7, #12]
 801121e:	60b9      	str	r1, [r7, #8]
 8011220:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8011222:	2300      	movs	r3, #0
 8011224:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011226:	f3ef 8305 	mrs	r3, IPSR
 801122a:	617b      	str	r3, [r7, #20]
  return(result);
 801122c:	697b      	ldr	r3, [r7, #20]

  if (!IS_IRQ() && (func != NULL)) {
 801122e:	2b00      	cmp	r3, #0
 8011230:	d17f      	bne.n	8011332 <osThreadNew+0x11c>
 8011232:	68fb      	ldr	r3, [r7, #12]
 8011234:	2b00      	cmp	r3, #0
 8011236:	d07c      	beq.n	8011332 <osThreadNew+0x11c>
    stack = configMINIMAL_STACK_SIZE;
 8011238:	f44f 7300 	mov.w	r3, #512	@ 0x200
 801123c:	623b      	str	r3, [r7, #32]
    prio  = (UBaseType_t)osPriorityNormal;
 801123e:	2318      	movs	r3, #24
 8011240:	61fb      	str	r3, [r7, #28]

    name = NULL;
 8011242:	2300      	movs	r3, #0
 8011244:	627b      	str	r3, [r7, #36]	@ 0x24
    mem  = -1;
 8011246:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801124a:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 801124c:	687b      	ldr	r3, [r7, #4]
 801124e:	2b00      	cmp	r3, #0
 8011250:	d045      	beq.n	80112de <osThreadNew+0xc8>
      if (attr->name != NULL) {
 8011252:	687b      	ldr	r3, [r7, #4]
 8011254:	681b      	ldr	r3, [r3, #0]
 8011256:	2b00      	cmp	r3, #0
 8011258:	d002      	beq.n	8011260 <osThreadNew+0x4a>
        name = attr->name;
 801125a:	687b      	ldr	r3, [r7, #4]
 801125c:	681b      	ldr	r3, [r3, #0]
 801125e:	627b      	str	r3, [r7, #36]	@ 0x24
      }
      if (attr->priority != osPriorityNone) {
 8011260:	687b      	ldr	r3, [r7, #4]
 8011262:	699b      	ldr	r3, [r3, #24]
 8011264:	2b00      	cmp	r3, #0
 8011266:	d002      	beq.n	801126e <osThreadNew+0x58>
        prio = (UBaseType_t)attr->priority;
 8011268:	687b      	ldr	r3, [r7, #4]
 801126a:	699b      	ldr	r3, [r3, #24]
 801126c:	61fb      	str	r3, [r7, #28]
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 801126e:	69fb      	ldr	r3, [r7, #28]
 8011270:	2b00      	cmp	r3, #0
 8011272:	d008      	beq.n	8011286 <osThreadNew+0x70>
 8011274:	69fb      	ldr	r3, [r7, #28]
 8011276:	2b38      	cmp	r3, #56	@ 0x38
 8011278:	d805      	bhi.n	8011286 <osThreadNew+0x70>
 801127a:	687b      	ldr	r3, [r7, #4]
 801127c:	685b      	ldr	r3, [r3, #4]
 801127e:	f003 0301 	and.w	r3, r3, #1
 8011282:	2b00      	cmp	r3, #0
 8011284:	d001      	beq.n	801128a <osThreadNew+0x74>
        return (NULL);
 8011286:	2300      	movs	r3, #0
 8011288:	e054      	b.n	8011334 <osThreadNew+0x11e>
      }

      if (attr->stack_size > 0U) {
 801128a:	687b      	ldr	r3, [r7, #4]
 801128c:	695b      	ldr	r3, [r3, #20]
 801128e:	2b00      	cmp	r3, #0
 8011290:	d003      	beq.n	801129a <osThreadNew+0x84>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 8011292:	687b      	ldr	r3, [r7, #4]
 8011294:	695b      	ldr	r3, [r3, #20]
 8011296:	089b      	lsrs	r3, r3, #2
 8011298:	623b      	str	r3, [r7, #32]
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 801129a:	687b      	ldr	r3, [r7, #4]
 801129c:	689b      	ldr	r3, [r3, #8]
 801129e:	2b00      	cmp	r3, #0
 80112a0:	d00e      	beq.n	80112c0 <osThreadNew+0xaa>
 80112a2:	687b      	ldr	r3, [r7, #4]
 80112a4:	68db      	ldr	r3, [r3, #12]
 80112a6:	2ba7      	cmp	r3, #167	@ 0xa7
 80112a8:	d90a      	bls.n	80112c0 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80112aa:	687b      	ldr	r3, [r7, #4]
 80112ac:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 80112ae:	2b00      	cmp	r3, #0
 80112b0:	d006      	beq.n	80112c0 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80112b2:	687b      	ldr	r3, [r7, #4]
 80112b4:	695b      	ldr	r3, [r3, #20]
 80112b6:	2b00      	cmp	r3, #0
 80112b8:	d002      	beq.n	80112c0 <osThreadNew+0xaa>
        mem = 1;
 80112ba:	2301      	movs	r3, #1
 80112bc:	61bb      	str	r3, [r7, #24]
 80112be:	e010      	b.n	80112e2 <osThreadNew+0xcc>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 80112c0:	687b      	ldr	r3, [r7, #4]
 80112c2:	689b      	ldr	r3, [r3, #8]
 80112c4:	2b00      	cmp	r3, #0
 80112c6:	d10c      	bne.n	80112e2 <osThreadNew+0xcc>
 80112c8:	687b      	ldr	r3, [r7, #4]
 80112ca:	68db      	ldr	r3, [r3, #12]
 80112cc:	2b00      	cmp	r3, #0
 80112ce:	d108      	bne.n	80112e2 <osThreadNew+0xcc>
 80112d0:	687b      	ldr	r3, [r7, #4]
 80112d2:	691b      	ldr	r3, [r3, #16]
 80112d4:	2b00      	cmp	r3, #0
 80112d6:	d104      	bne.n	80112e2 <osThreadNew+0xcc>
          mem = 0;
 80112d8:	2300      	movs	r3, #0
 80112da:	61bb      	str	r3, [r7, #24]
 80112dc:	e001      	b.n	80112e2 <osThreadNew+0xcc>
        }
      }
    }
    else {
      mem = 0;
 80112de:	2300      	movs	r3, #0
 80112e0:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 80112e2:	69bb      	ldr	r3, [r7, #24]
 80112e4:	2b01      	cmp	r3, #1
 80112e6:	d110      	bne.n	801130a <osThreadNew+0xf4>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 80112e8:	687b      	ldr	r3, [r7, #4]
 80112ea:	691b      	ldr	r3, [r3, #16]
                                                                                      (StaticTask_t *)attr->cb_mem);
 80112ec:	687a      	ldr	r2, [r7, #4]
 80112ee:	6892      	ldr	r2, [r2, #8]
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 80112f0:	9202      	str	r2, [sp, #8]
 80112f2:	9301      	str	r3, [sp, #4]
 80112f4:	69fb      	ldr	r3, [r7, #28]
 80112f6:	9300      	str	r3, [sp, #0]
 80112f8:	68bb      	ldr	r3, [r7, #8]
 80112fa:	6a3a      	ldr	r2, [r7, #32]
 80112fc:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80112fe:	68f8      	ldr	r0, [r7, #12]
 8011300:	f002 faa2 	bl	8013848 <xTaskCreateStatic>
 8011304:	4603      	mov	r3, r0
 8011306:	613b      	str	r3, [r7, #16]
 8011308:	e013      	b.n	8011332 <osThreadNew+0x11c>
      #endif
    }
    else {
      if (mem == 0) {
 801130a:	69bb      	ldr	r3, [r7, #24]
 801130c:	2b00      	cmp	r3, #0
 801130e:	d110      	bne.n	8011332 <osThreadNew+0x11c>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8011310:	6a3b      	ldr	r3, [r7, #32]
 8011312:	b29a      	uxth	r2, r3
 8011314:	f107 0310 	add.w	r3, r7, #16
 8011318:	9301      	str	r3, [sp, #4]
 801131a:	69fb      	ldr	r3, [r7, #28]
 801131c:	9300      	str	r3, [sp, #0]
 801131e:	68bb      	ldr	r3, [r7, #8]
 8011320:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8011322:	68f8      	ldr	r0, [r7, #12]
 8011324:	f002 faf0 	bl	8013908 <xTaskCreate>
 8011328:	4603      	mov	r3, r0
 801132a:	2b01      	cmp	r3, #1
 801132c:	d001      	beq.n	8011332 <osThreadNew+0x11c>
            hTask = NULL;
 801132e:	2300      	movs	r3, #0
 8011330:	613b      	str	r3, [r7, #16]
        #endif
      }
    }
  }

  return ((osThreadId_t)hTask);
 8011332:	693b      	ldr	r3, [r7, #16]
}
 8011334:	4618      	mov	r0, r3
 8011336:	3728      	adds	r7, #40	@ 0x28
 8011338:	46bd      	mov	sp, r7
 801133a:	bd80      	pop	{r7, pc}

0801133c <osThreadGetId>:
  }

  return (name);
}

osThreadId_t osThreadGetId (void) {
 801133c:	b580      	push	{r7, lr}
 801133e:	b082      	sub	sp, #8
 8011340:	af00      	add	r7, sp, #0
  osThreadId_t id;

  id = (osThreadId_t)xTaskGetCurrentTaskHandle();
 8011342:	f003 f921 	bl	8014588 <xTaskGetCurrentTaskHandle>
 8011346:	6078      	str	r0, [r7, #4]

  return (id);
 8011348:	687b      	ldr	r3, [r7, #4]
}
 801134a:	4618      	mov	r0, r3
 801134c:	3708      	adds	r7, #8
 801134e:	46bd      	mov	sp, r7
 8011350:	bd80      	pop	{r7, pc}

08011352 <osDelay>:
  /* Return flags before clearing */
  return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */

osStatus_t osDelay (uint32_t ticks) {
 8011352:	b580      	push	{r7, lr}
 8011354:	b084      	sub	sp, #16
 8011356:	af00      	add	r7, sp, #0
 8011358:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801135a:	f3ef 8305 	mrs	r3, IPSR
 801135e:	60bb      	str	r3, [r7, #8]
  return(result);
 8011360:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 8011362:	2b00      	cmp	r3, #0
 8011364:	d003      	beq.n	801136e <osDelay+0x1c>
    stat = osErrorISR;
 8011366:	f06f 0305 	mvn.w	r3, #5
 801136a:	60fb      	str	r3, [r7, #12]
 801136c:	e007      	b.n	801137e <osDelay+0x2c>
  }
  else {
    stat = osOK;
 801136e:	2300      	movs	r3, #0
 8011370:	60fb      	str	r3, [r7, #12]

    if (ticks != 0U) {
 8011372:	687b      	ldr	r3, [r7, #4]
 8011374:	2b00      	cmp	r3, #0
 8011376:	d002      	beq.n	801137e <osDelay+0x2c>
      vTaskDelay(ticks);
 8011378:	6878      	ldr	r0, [r7, #4]
 801137a:	f002 fc23 	bl	8013bc4 <vTaskDelay>
    }
  }

  return (stat);
 801137e:	68fb      	ldr	r3, [r7, #12]
}
 8011380:	4618      	mov	r0, r3
 8011382:	3710      	adds	r7, #16
 8011384:	46bd      	mov	sp, r7
 8011386:	bd80      	pop	{r7, pc}

08011388 <TimerCallback>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_TIMER == 1)

static void TimerCallback (TimerHandle_t hTimer) {
 8011388:	b580      	push	{r7, lr}
 801138a:	b084      	sub	sp, #16
 801138c:	af00      	add	r7, sp, #0
 801138e:	6078      	str	r0, [r7, #4]
  TimerCallback_t *callb;

  callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer);
 8011390:	6878      	ldr	r0, [r7, #4]
 8011392:	f004 f93b 	bl	801560c <pvTimerGetTimerID>
 8011396:	60f8      	str	r0, [r7, #12]

  if (callb != NULL) {
 8011398:	68fb      	ldr	r3, [r7, #12]
 801139a:	2b00      	cmp	r3, #0
 801139c:	d005      	beq.n	80113aa <TimerCallback+0x22>
    callb->func (callb->arg);
 801139e:	68fb      	ldr	r3, [r7, #12]
 80113a0:	681b      	ldr	r3, [r3, #0]
 80113a2:	68fa      	ldr	r2, [r7, #12]
 80113a4:	6852      	ldr	r2, [r2, #4]
 80113a6:	4610      	mov	r0, r2
 80113a8:	4798      	blx	r3
  }
}
 80113aa:	bf00      	nop
 80113ac:	3710      	adds	r7, #16
 80113ae:	46bd      	mov	sp, r7
 80113b0:	bd80      	pop	{r7, pc}
	...

080113b4 <osTimerNew>:

osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) {
 80113b4:	b580      	push	{r7, lr}
 80113b6:	b08c      	sub	sp, #48	@ 0x30
 80113b8:	af02      	add	r7, sp, #8
 80113ba:	60f8      	str	r0, [r7, #12]
 80113bc:	607a      	str	r2, [r7, #4]
 80113be:	603b      	str	r3, [r7, #0]
 80113c0:	460b      	mov	r3, r1
 80113c2:	72fb      	strb	r3, [r7, #11]
  TimerHandle_t hTimer;
  TimerCallback_t *callb;
  UBaseType_t reload;
  int32_t mem;

  hTimer = NULL;
 80113c4:	2300      	movs	r3, #0
 80113c6:	623b      	str	r3, [r7, #32]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80113c8:	f3ef 8305 	mrs	r3, IPSR
 80113cc:	613b      	str	r3, [r7, #16]
  return(result);
 80113ce:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (func != NULL)) {
 80113d0:	2b00      	cmp	r3, #0
 80113d2:	d163      	bne.n	801149c <osTimerNew+0xe8>
 80113d4:	68fb      	ldr	r3, [r7, #12]
 80113d6:	2b00      	cmp	r3, #0
 80113d8:	d060      	beq.n	801149c <osTimerNew+0xe8>
    /* Allocate memory to store callback function and argument */
    callb = pvPortMalloc (sizeof(TimerCallback_t));
 80113da:	2008      	movs	r0, #8
 80113dc:	f004 fb8e 	bl	8015afc <pvPortMalloc>
 80113e0:	6178      	str	r0, [r7, #20]

    if (callb != NULL) {
 80113e2:	697b      	ldr	r3, [r7, #20]
 80113e4:	2b00      	cmp	r3, #0
 80113e6:	d059      	beq.n	801149c <osTimerNew+0xe8>
      callb->func = func;
 80113e8:	697b      	ldr	r3, [r7, #20]
 80113ea:	68fa      	ldr	r2, [r7, #12]
 80113ec:	601a      	str	r2, [r3, #0]
      callb->arg  = argument;
 80113ee:	697b      	ldr	r3, [r7, #20]
 80113f0:	687a      	ldr	r2, [r7, #4]
 80113f2:	605a      	str	r2, [r3, #4]

      if (type == osTimerOnce) {
 80113f4:	7afb      	ldrb	r3, [r7, #11]
 80113f6:	2b00      	cmp	r3, #0
 80113f8:	d102      	bne.n	8011400 <osTimerNew+0x4c>
        reload = pdFALSE;
 80113fa:	2300      	movs	r3, #0
 80113fc:	61fb      	str	r3, [r7, #28]
 80113fe:	e001      	b.n	8011404 <osTimerNew+0x50>
      } else {
        reload = pdTRUE;
 8011400:	2301      	movs	r3, #1
 8011402:	61fb      	str	r3, [r7, #28]
      }

      mem  = -1;
 8011404:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011408:	61bb      	str	r3, [r7, #24]
      name = NULL;
 801140a:	2300      	movs	r3, #0
 801140c:	627b      	str	r3, [r7, #36]	@ 0x24

      if (attr != NULL) {
 801140e:	683b      	ldr	r3, [r7, #0]
 8011410:	2b00      	cmp	r3, #0
 8011412:	d01c      	beq.n	801144e <osTimerNew+0x9a>
        if (attr->name != NULL) {
 8011414:	683b      	ldr	r3, [r7, #0]
 8011416:	681b      	ldr	r3, [r3, #0]
 8011418:	2b00      	cmp	r3, #0
 801141a:	d002      	beq.n	8011422 <osTimerNew+0x6e>
          name = attr->name;
 801141c:	683b      	ldr	r3, [r7, #0]
 801141e:	681b      	ldr	r3, [r3, #0]
 8011420:	627b      	str	r3, [r7, #36]	@ 0x24
        }

        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) {
 8011422:	683b      	ldr	r3, [r7, #0]
 8011424:	689b      	ldr	r3, [r3, #8]
 8011426:	2b00      	cmp	r3, #0
 8011428:	d006      	beq.n	8011438 <osTimerNew+0x84>
 801142a:	683b      	ldr	r3, [r7, #0]
 801142c:	68db      	ldr	r3, [r3, #12]
 801142e:	2b2b      	cmp	r3, #43	@ 0x2b
 8011430:	d902      	bls.n	8011438 <osTimerNew+0x84>
          mem = 1;
 8011432:	2301      	movs	r3, #1
 8011434:	61bb      	str	r3, [r7, #24]
 8011436:	e00c      	b.n	8011452 <osTimerNew+0x9e>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8011438:	683b      	ldr	r3, [r7, #0]
 801143a:	689b      	ldr	r3, [r3, #8]
 801143c:	2b00      	cmp	r3, #0
 801143e:	d108      	bne.n	8011452 <osTimerNew+0x9e>
 8011440:	683b      	ldr	r3, [r7, #0]
 8011442:	68db      	ldr	r3, [r3, #12]
 8011444:	2b00      	cmp	r3, #0
 8011446:	d104      	bne.n	8011452 <osTimerNew+0x9e>
            mem = 0;
 8011448:	2300      	movs	r3, #0
 801144a:	61bb      	str	r3, [r7, #24]
 801144c:	e001      	b.n	8011452 <osTimerNew+0x9e>
          }
        }
      }
      else {
        mem = 0;
 801144e:	2300      	movs	r3, #0
 8011450:	61bb      	str	r3, [r7, #24]
      }

      if (mem == 1) {
 8011452:	69bb      	ldr	r3, [r7, #24]
 8011454:	2b01      	cmp	r3, #1
 8011456:	d10c      	bne.n	8011472 <osTimerNew+0xbe>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem);
 8011458:	683b      	ldr	r3, [r7, #0]
 801145a:	689b      	ldr	r3, [r3, #8]
 801145c:	9301      	str	r3, [sp, #4]
 801145e:	4b12      	ldr	r3, [pc, #72]	@ (80114a8 <osTimerNew+0xf4>)
 8011460:	9300      	str	r3, [sp, #0]
 8011462:	697b      	ldr	r3, [r7, #20]
 8011464:	69fa      	ldr	r2, [r7, #28]
 8011466:	2101      	movs	r1, #1
 8011468:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801146a:	f003 fd18 	bl	8014e9e <xTimerCreateStatic>
 801146e:	6238      	str	r0, [r7, #32]
 8011470:	e00b      	b.n	801148a <osTimerNew+0xd6>
        #endif
      }
      else {
        if (mem == 0) {
 8011472:	69bb      	ldr	r3, [r7, #24]
 8011474:	2b00      	cmp	r3, #0
 8011476:	d108      	bne.n	801148a <osTimerNew+0xd6>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback);
 8011478:	4b0b      	ldr	r3, [pc, #44]	@ (80114a8 <osTimerNew+0xf4>)
 801147a:	9300      	str	r3, [sp, #0]
 801147c:	697b      	ldr	r3, [r7, #20]
 801147e:	69fa      	ldr	r2, [r7, #28]
 8011480:	2101      	movs	r1, #1
 8011482:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8011484:	f003 fcea 	bl	8014e5c <xTimerCreate>
 8011488:	6238      	str	r0, [r7, #32]
          #endif
        }
      }

      if ((hTimer == NULL) && (callb != NULL)) {
 801148a:	6a3b      	ldr	r3, [r7, #32]
 801148c:	2b00      	cmp	r3, #0
 801148e:	d105      	bne.n	801149c <osTimerNew+0xe8>
 8011490:	697b      	ldr	r3, [r7, #20]
 8011492:	2b00      	cmp	r3, #0
 8011494:	d002      	beq.n	801149c <osTimerNew+0xe8>
        vPortFree (callb);
 8011496:	6978      	ldr	r0, [r7, #20]
 8011498:	f004 fbfe 	bl	8015c98 <vPortFree>
      }
    }
  }

  return ((osTimerId_t)hTimer);
 801149c:	6a3b      	ldr	r3, [r7, #32]
}
 801149e:	4618      	mov	r0, r3
 80114a0:	3728      	adds	r7, #40	@ 0x28
 80114a2:	46bd      	mov	sp, r7
 80114a4:	bd80      	pop	{r7, pc}
 80114a6:	bf00      	nop
 80114a8:	08011389 	.word	0x08011389

080114ac <osTimerStart>:
  }

  return (p);
}

osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks) {
 80114ac:	b580      	push	{r7, lr}
 80114ae:	b088      	sub	sp, #32
 80114b0:	af02      	add	r7, sp, #8
 80114b2:	6078      	str	r0, [r7, #4]
 80114b4:	6039      	str	r1, [r7, #0]
  TimerHandle_t hTimer = (TimerHandle_t)timer_id;
 80114b6:	687b      	ldr	r3, [r7, #4]
 80114b8:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80114ba:	f3ef 8305 	mrs	r3, IPSR
 80114be:	60fb      	str	r3, [r7, #12]
  return(result);
 80114c0:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

  if (IS_IRQ()) {
 80114c2:	2b00      	cmp	r3, #0
 80114c4:	d003      	beq.n	80114ce <osTimerStart+0x22>
    stat = osErrorISR;
 80114c6:	f06f 0305 	mvn.w	r3, #5
 80114ca:	617b      	str	r3, [r7, #20]
 80114cc:	e017      	b.n	80114fe <osTimerStart+0x52>
  }
  else if (hTimer == NULL) {
 80114ce:	693b      	ldr	r3, [r7, #16]
 80114d0:	2b00      	cmp	r3, #0
 80114d2:	d103      	bne.n	80114dc <osTimerStart+0x30>
    stat = osErrorParameter;
 80114d4:	f06f 0303 	mvn.w	r3, #3
 80114d8:	617b      	str	r3, [r7, #20]
 80114da:	e010      	b.n	80114fe <osTimerStart+0x52>
  }
  else {
    if (xTimerChangePeriod (hTimer, ticks, 0) == pdPASS) {
 80114dc:	2300      	movs	r3, #0
 80114de:	9300      	str	r3, [sp, #0]
 80114e0:	2300      	movs	r3, #0
 80114e2:	683a      	ldr	r2, [r7, #0]
 80114e4:	2104      	movs	r1, #4
 80114e6:	6938      	ldr	r0, [r7, #16]
 80114e8:	f003 fd56 	bl	8014f98 <xTimerGenericCommand>
 80114ec:	4603      	mov	r3, r0
 80114ee:	2b01      	cmp	r3, #1
 80114f0:	d102      	bne.n	80114f8 <osTimerStart+0x4c>
      stat = osOK;
 80114f2:	2300      	movs	r3, #0
 80114f4:	617b      	str	r3, [r7, #20]
 80114f6:	e002      	b.n	80114fe <osTimerStart+0x52>
    } else {
      stat = osErrorResource;
 80114f8:	f06f 0302 	mvn.w	r3, #2
 80114fc:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 80114fe:	697b      	ldr	r3, [r7, #20]
}
 8011500:	4618      	mov	r0, r3
 8011502:	3718      	adds	r7, #24
 8011504:	46bd      	mov	sp, r7
 8011506:	bd80      	pop	{r7, pc}

08011508 <osTimerStop>:

osStatus_t osTimerStop (osTimerId_t timer_id) {
 8011508:	b580      	push	{r7, lr}
 801150a:	b088      	sub	sp, #32
 801150c:	af02      	add	r7, sp, #8
 801150e:	6078      	str	r0, [r7, #4]
  TimerHandle_t hTimer = (TimerHandle_t)timer_id;
 8011510:	687b      	ldr	r3, [r7, #4]
 8011512:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011514:	f3ef 8305 	mrs	r3, IPSR
 8011518:	60fb      	str	r3, [r7, #12]
  return(result);
 801151a:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

  if (IS_IRQ()) {
 801151c:	2b00      	cmp	r3, #0
 801151e:	d003      	beq.n	8011528 <osTimerStop+0x20>
    stat = osErrorISR;
 8011520:	f06f 0305 	mvn.w	r3, #5
 8011524:	617b      	str	r3, [r7, #20]
 8011526:	e021      	b.n	801156c <osTimerStop+0x64>
  }
  else if (hTimer == NULL) {
 8011528:	693b      	ldr	r3, [r7, #16]
 801152a:	2b00      	cmp	r3, #0
 801152c:	d103      	bne.n	8011536 <osTimerStop+0x2e>
    stat = osErrorParameter;
 801152e:	f06f 0303 	mvn.w	r3, #3
 8011532:	617b      	str	r3, [r7, #20]
 8011534:	e01a      	b.n	801156c <osTimerStop+0x64>
  }
  else {
    if (xTimerIsTimerActive (hTimer) == pdFALSE) {
 8011536:	6938      	ldr	r0, [r7, #16]
 8011538:	f004 f83e 	bl	80155b8 <xTimerIsTimerActive>
 801153c:	4603      	mov	r3, r0
 801153e:	2b00      	cmp	r3, #0
 8011540:	d103      	bne.n	801154a <osTimerStop+0x42>
      stat = osErrorResource;
 8011542:	f06f 0302 	mvn.w	r3, #2
 8011546:	617b      	str	r3, [r7, #20]
 8011548:	e010      	b.n	801156c <osTimerStop+0x64>
    }
    else {
      if (xTimerStop (hTimer, 0) == pdPASS) {
 801154a:	2300      	movs	r3, #0
 801154c:	9300      	str	r3, [sp, #0]
 801154e:	2300      	movs	r3, #0
 8011550:	2200      	movs	r2, #0
 8011552:	2103      	movs	r1, #3
 8011554:	6938      	ldr	r0, [r7, #16]
 8011556:	f003 fd1f 	bl	8014f98 <xTimerGenericCommand>
 801155a:	4603      	mov	r3, r0
 801155c:	2b01      	cmp	r3, #1
 801155e:	d102      	bne.n	8011566 <osTimerStop+0x5e>
        stat = osOK;
 8011560:	2300      	movs	r3, #0
 8011562:	617b      	str	r3, [r7, #20]
 8011564:	e002      	b.n	801156c <osTimerStop+0x64>
      } else {
        stat = osError;
 8011566:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801156a:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 801156c:	697b      	ldr	r3, [r7, #20]
}
 801156e:	4618      	mov	r0, r3
 8011570:	3718      	adds	r7, #24
 8011572:	46bd      	mov	sp, r7
 8011574:	bd80      	pop	{r7, pc}

08011576 <osMutexNew>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)

osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
 8011576:	b580      	push	{r7, lr}
 8011578:	b088      	sub	sp, #32
 801157a:	af00      	add	r7, sp, #0
 801157c:	6078      	str	r0, [r7, #4]
  int32_t  mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hMutex = NULL;
 801157e:	2300      	movs	r3, #0
 8011580:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011582:	f3ef 8305 	mrs	r3, IPSR
 8011586:	60bb      	str	r3, [r7, #8]
  return(result);
 8011588:	68bb      	ldr	r3, [r7, #8]

  if (!IS_IRQ()) {
 801158a:	2b00      	cmp	r3, #0
 801158c:	d174      	bne.n	8011678 <osMutexNew+0x102>
    if (attr != NULL) {
 801158e:	687b      	ldr	r3, [r7, #4]
 8011590:	2b00      	cmp	r3, #0
 8011592:	d003      	beq.n	801159c <osMutexNew+0x26>
      type = attr->attr_bits;
 8011594:	687b      	ldr	r3, [r7, #4]
 8011596:	685b      	ldr	r3, [r3, #4]
 8011598:	61bb      	str	r3, [r7, #24]
 801159a:	e001      	b.n	80115a0 <osMutexNew+0x2a>
    } else {
      type = 0U;
 801159c:	2300      	movs	r3, #0
 801159e:	61bb      	str	r3, [r7, #24]
    }

    if ((type & osMutexRecursive) == osMutexRecursive) {
 80115a0:	69bb      	ldr	r3, [r7, #24]
 80115a2:	f003 0301 	and.w	r3, r3, #1
 80115a6:	2b00      	cmp	r3, #0
 80115a8:	d002      	beq.n	80115b0 <osMutexNew+0x3a>
      rmtx = 1U;
 80115aa:	2301      	movs	r3, #1
 80115ac:	617b      	str	r3, [r7, #20]
 80115ae:	e001      	b.n	80115b4 <osMutexNew+0x3e>
    } else {
      rmtx = 0U;
 80115b0:	2300      	movs	r3, #0
 80115b2:	617b      	str	r3, [r7, #20]
    }

    if ((type & osMutexRobust) != osMutexRobust) {
 80115b4:	69bb      	ldr	r3, [r7, #24]
 80115b6:	f003 0308 	and.w	r3, r3, #8
 80115ba:	2b00      	cmp	r3, #0
 80115bc:	d15c      	bne.n	8011678 <osMutexNew+0x102>
      mem = -1;
 80115be:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80115c2:	613b      	str	r3, [r7, #16]

      if (attr != NULL) {
 80115c4:	687b      	ldr	r3, [r7, #4]
 80115c6:	2b00      	cmp	r3, #0
 80115c8:	d015      	beq.n	80115f6 <osMutexNew+0x80>
        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 80115ca:	687b      	ldr	r3, [r7, #4]
 80115cc:	689b      	ldr	r3, [r3, #8]
 80115ce:	2b00      	cmp	r3, #0
 80115d0:	d006      	beq.n	80115e0 <osMutexNew+0x6a>
 80115d2:	687b      	ldr	r3, [r7, #4]
 80115d4:	68db      	ldr	r3, [r3, #12]
 80115d6:	2b4f      	cmp	r3, #79	@ 0x4f
 80115d8:	d902      	bls.n	80115e0 <osMutexNew+0x6a>
          mem = 1;
 80115da:	2301      	movs	r3, #1
 80115dc:	613b      	str	r3, [r7, #16]
 80115de:	e00c      	b.n	80115fa <osMutexNew+0x84>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 80115e0:	687b      	ldr	r3, [r7, #4]
 80115e2:	689b      	ldr	r3, [r3, #8]
 80115e4:	2b00      	cmp	r3, #0
 80115e6:	d108      	bne.n	80115fa <osMutexNew+0x84>
 80115e8:	687b      	ldr	r3, [r7, #4]
 80115ea:	68db      	ldr	r3, [r3, #12]
 80115ec:	2b00      	cmp	r3, #0
 80115ee:	d104      	bne.n	80115fa <osMutexNew+0x84>
            mem = 0;
 80115f0:	2300      	movs	r3, #0
 80115f2:	613b      	str	r3, [r7, #16]
 80115f4:	e001      	b.n	80115fa <osMutexNew+0x84>
          }
        }
      }
      else {
        mem = 0;
 80115f6:	2300      	movs	r3, #0
 80115f8:	613b      	str	r3, [r7, #16]
      }

      if (mem == 1) {
 80115fa:	693b      	ldr	r3, [r7, #16]
 80115fc:	2b01      	cmp	r3, #1
 80115fe:	d112      	bne.n	8011626 <osMutexNew+0xb0>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          if (rmtx != 0U) {
 8011600:	697b      	ldr	r3, [r7, #20]
 8011602:	2b00      	cmp	r3, #0
 8011604:	d007      	beq.n	8011616 <osMutexNew+0xa0>
            #if (configUSE_RECURSIVE_MUTEXES == 1)
            hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
 8011606:	687b      	ldr	r3, [r7, #4]
 8011608:	689b      	ldr	r3, [r3, #8]
 801160a:	4619      	mov	r1, r3
 801160c:	2004      	movs	r0, #4
 801160e:	f000 fdd8 	bl	80121c2 <xQueueCreateMutexStatic>
 8011612:	61f8      	str	r0, [r7, #28]
 8011614:	e016      	b.n	8011644 <osMutexNew+0xce>
            #endif
          }
          else {
            hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
 8011616:	687b      	ldr	r3, [r7, #4]
 8011618:	689b      	ldr	r3, [r3, #8]
 801161a:	4619      	mov	r1, r3
 801161c:	2001      	movs	r0, #1
 801161e:	f000 fdd0 	bl	80121c2 <xQueueCreateMutexStatic>
 8011622:	61f8      	str	r0, [r7, #28]
 8011624:	e00e      	b.n	8011644 <osMutexNew+0xce>
          }
        #endif
      }
      else {
        if (mem == 0) {
 8011626:	693b      	ldr	r3, [r7, #16]
 8011628:	2b00      	cmp	r3, #0
 801162a:	d10b      	bne.n	8011644 <osMutexNew+0xce>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            if (rmtx != 0U) {
 801162c:	697b      	ldr	r3, [r7, #20]
 801162e:	2b00      	cmp	r3, #0
 8011630:	d004      	beq.n	801163c <osMutexNew+0xc6>
              #if (configUSE_RECURSIVE_MUTEXES == 1)
              hMutex = xSemaphoreCreateRecursiveMutex ();
 8011632:	2004      	movs	r0, #4
 8011634:	f000 fdad 	bl	8012192 <xQueueCreateMutex>
 8011638:	61f8      	str	r0, [r7, #28]
 801163a:	e003      	b.n	8011644 <osMutexNew+0xce>
              #endif
            } else {
              hMutex = xSemaphoreCreateMutex ();
 801163c:	2001      	movs	r0, #1
 801163e:	f000 fda8 	bl	8012192 <xQueueCreateMutex>
 8011642:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }

      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hMutex != NULL) {
 8011644:	69fb      	ldr	r3, [r7, #28]
 8011646:	2b00      	cmp	r3, #0
 8011648:	d00c      	beq.n	8011664 <osMutexNew+0xee>
        if (attr != NULL) {
 801164a:	687b      	ldr	r3, [r7, #4]
 801164c:	2b00      	cmp	r3, #0
 801164e:	d003      	beq.n	8011658 <osMutexNew+0xe2>
          name = attr->name;
 8011650:	687b      	ldr	r3, [r7, #4]
 8011652:	681b      	ldr	r3, [r3, #0]
 8011654:	60fb      	str	r3, [r7, #12]
 8011656:	e001      	b.n	801165c <osMutexNew+0xe6>
        } else {
          name = NULL;
 8011658:	2300      	movs	r3, #0
 801165a:	60fb      	str	r3, [r7, #12]
        }
        vQueueAddToRegistry (hMutex, name);
 801165c:	68f9      	ldr	r1, [r7, #12]
 801165e:	69f8      	ldr	r0, [r7, #28]
 8011660:	f001 fcd2 	bl	8013008 <vQueueAddToRegistry>
      }
      #endif

      if ((hMutex != NULL) && (rmtx != 0U)) {
 8011664:	69fb      	ldr	r3, [r7, #28]
 8011666:	2b00      	cmp	r3, #0
 8011668:	d006      	beq.n	8011678 <osMutexNew+0x102>
 801166a:	697b      	ldr	r3, [r7, #20]
 801166c:	2b00      	cmp	r3, #0
 801166e:	d003      	beq.n	8011678 <osMutexNew+0x102>
        hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
 8011670:	69fb      	ldr	r3, [r7, #28]
 8011672:	f043 0301 	orr.w	r3, r3, #1
 8011676:	61fb      	str	r3, [r7, #28]
      }
    }
  }

  return ((osMutexId_t)hMutex);
 8011678:	69fb      	ldr	r3, [r7, #28]
}
 801167a:	4618      	mov	r0, r3
 801167c:	3720      	adds	r7, #32
 801167e:	46bd      	mov	sp, r7
 8011680:	bd80      	pop	{r7, pc}

08011682 <osMutexAcquire>:

osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
 8011682:	b580      	push	{r7, lr}
 8011684:	b086      	sub	sp, #24
 8011686:	af00      	add	r7, sp, #0
 8011688:	6078      	str	r0, [r7, #4]
 801168a:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 801168c:	687b      	ldr	r3, [r7, #4]
 801168e:	f023 0301 	bic.w	r3, r3, #1
 8011692:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8011694:	687b      	ldr	r3, [r7, #4]
 8011696:	f003 0301 	and.w	r3, r3, #1
 801169a:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 801169c:	2300      	movs	r3, #0
 801169e:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80116a0:	f3ef 8305 	mrs	r3, IPSR
 80116a4:	60bb      	str	r3, [r7, #8]
  return(result);
 80116a6:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 80116a8:	2b00      	cmp	r3, #0
 80116aa:	d003      	beq.n	80116b4 <osMutexAcquire+0x32>
    stat = osErrorISR;
 80116ac:	f06f 0305 	mvn.w	r3, #5
 80116b0:	617b      	str	r3, [r7, #20]
 80116b2:	e02c      	b.n	801170e <osMutexAcquire+0x8c>
  }
  else if (hMutex == NULL) {
 80116b4:	693b      	ldr	r3, [r7, #16]
 80116b6:	2b00      	cmp	r3, #0
 80116b8:	d103      	bne.n	80116c2 <osMutexAcquire+0x40>
    stat = osErrorParameter;
 80116ba:	f06f 0303 	mvn.w	r3, #3
 80116be:	617b      	str	r3, [r7, #20]
 80116c0:	e025      	b.n	801170e <osMutexAcquire+0x8c>
  }
  else {
    if (rmtx != 0U) {
 80116c2:	68fb      	ldr	r3, [r7, #12]
 80116c4:	2b00      	cmp	r3, #0
 80116c6:	d011      	beq.n	80116ec <osMutexAcquire+0x6a>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
 80116c8:	6839      	ldr	r1, [r7, #0]
 80116ca:	6938      	ldr	r0, [r7, #16]
 80116cc:	f000 fdc9 	bl	8012262 <xQueueTakeMutexRecursive>
 80116d0:	4603      	mov	r3, r0
 80116d2:	2b01      	cmp	r3, #1
 80116d4:	d01b      	beq.n	801170e <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 80116d6:	683b      	ldr	r3, [r7, #0]
 80116d8:	2b00      	cmp	r3, #0
 80116da:	d003      	beq.n	80116e4 <osMutexAcquire+0x62>
          stat = osErrorTimeout;
 80116dc:	f06f 0301 	mvn.w	r3, #1
 80116e0:	617b      	str	r3, [r7, #20]
 80116e2:	e014      	b.n	801170e <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 80116e4:	f06f 0302 	mvn.w	r3, #2
 80116e8:	617b      	str	r3, [r7, #20]
 80116ea:	e010      	b.n	801170e <osMutexAcquire+0x8c>
        }
      }
      #endif
    }
    else {
      if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
 80116ec:	6839      	ldr	r1, [r7, #0]
 80116ee:	6938      	ldr	r0, [r7, #16]
 80116f0:	f001 f96e 	bl	80129d0 <xQueueSemaphoreTake>
 80116f4:	4603      	mov	r3, r0
 80116f6:	2b01      	cmp	r3, #1
 80116f8:	d009      	beq.n	801170e <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 80116fa:	683b      	ldr	r3, [r7, #0]
 80116fc:	2b00      	cmp	r3, #0
 80116fe:	d003      	beq.n	8011708 <osMutexAcquire+0x86>
          stat = osErrorTimeout;
 8011700:	f06f 0301 	mvn.w	r3, #1
 8011704:	617b      	str	r3, [r7, #20]
 8011706:	e002      	b.n	801170e <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8011708:	f06f 0302 	mvn.w	r3, #2
 801170c:	617b      	str	r3, [r7, #20]
        }
      }
    }
  }

  return (stat);
 801170e:	697b      	ldr	r3, [r7, #20]
}
 8011710:	4618      	mov	r0, r3
 8011712:	3718      	adds	r7, #24
 8011714:	46bd      	mov	sp, r7
 8011716:	bd80      	pop	{r7, pc}

08011718 <osMutexRelease>:

osStatus_t osMutexRelease (osMutexId_t mutex_id) {
 8011718:	b580      	push	{r7, lr}
 801171a:	b086      	sub	sp, #24
 801171c:	af00      	add	r7, sp, #0
 801171e:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 8011720:	687b      	ldr	r3, [r7, #4]
 8011722:	f023 0301 	bic.w	r3, r3, #1
 8011726:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8011728:	687b      	ldr	r3, [r7, #4]
 801172a:	f003 0301 	and.w	r3, r3, #1
 801172e:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 8011730:	2300      	movs	r3, #0
 8011732:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011734:	f3ef 8305 	mrs	r3, IPSR
 8011738:	60bb      	str	r3, [r7, #8]
  return(result);
 801173a:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 801173c:	2b00      	cmp	r3, #0
 801173e:	d003      	beq.n	8011748 <osMutexRelease+0x30>
    stat = osErrorISR;
 8011740:	f06f 0305 	mvn.w	r3, #5
 8011744:	617b      	str	r3, [r7, #20]
 8011746:	e01f      	b.n	8011788 <osMutexRelease+0x70>
  }
  else if (hMutex == NULL) {
 8011748:	693b      	ldr	r3, [r7, #16]
 801174a:	2b00      	cmp	r3, #0
 801174c:	d103      	bne.n	8011756 <osMutexRelease+0x3e>
    stat = osErrorParameter;
 801174e:	f06f 0303 	mvn.w	r3, #3
 8011752:	617b      	str	r3, [r7, #20]
 8011754:	e018      	b.n	8011788 <osMutexRelease+0x70>
  }
  else {
    if (rmtx != 0U) {
 8011756:	68fb      	ldr	r3, [r7, #12]
 8011758:	2b00      	cmp	r3, #0
 801175a:	d009      	beq.n	8011770 <osMutexRelease+0x58>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
 801175c:	6938      	ldr	r0, [r7, #16]
 801175e:	f000 fd4b 	bl	80121f8 <xQueueGiveMutexRecursive>
 8011762:	4603      	mov	r3, r0
 8011764:	2b01      	cmp	r3, #1
 8011766:	d00f      	beq.n	8011788 <osMutexRelease+0x70>
        stat = osErrorResource;
 8011768:	f06f 0302 	mvn.w	r3, #2
 801176c:	617b      	str	r3, [r7, #20]
 801176e:	e00b      	b.n	8011788 <osMutexRelease+0x70>
      }
      #endif
    }
    else {
      if (xSemaphoreGive (hMutex) != pdPASS) {
 8011770:	2300      	movs	r3, #0
 8011772:	2200      	movs	r2, #0
 8011774:	2100      	movs	r1, #0
 8011776:	6938      	ldr	r0, [r7, #16]
 8011778:	f000 fe18 	bl	80123ac <xQueueGenericSend>
 801177c:	4603      	mov	r3, r0
 801177e:	2b01      	cmp	r3, #1
 8011780:	d002      	beq.n	8011788 <osMutexRelease+0x70>
        stat = osErrorResource;
 8011782:	f06f 0302 	mvn.w	r3, #2
 8011786:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8011788:	697b      	ldr	r3, [r7, #20]
}
 801178a:	4618      	mov	r0, r3
 801178c:	3718      	adds	r7, #24
 801178e:	46bd      	mov	sp, r7
 8011790:	bd80      	pop	{r7, pc}

08011792 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */

/*---------------------------------------------------------------------------*/

osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
 8011792:	b580      	push	{r7, lr}
 8011794:	b08a      	sub	sp, #40	@ 0x28
 8011796:	af02      	add	r7, sp, #8
 8011798:	60f8      	str	r0, [r7, #12]
 801179a:	60b9      	str	r1, [r7, #8]
 801179c:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hSemaphore = NULL;
 801179e:	2300      	movs	r3, #0
 80117a0:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80117a2:	f3ef 8305 	mrs	r3, IPSR
 80117a6:	613b      	str	r3, [r7, #16]
  return(result);
 80117a8:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
 80117aa:	2b00      	cmp	r3, #0
 80117ac:	d175      	bne.n	801189a <osSemaphoreNew+0x108>
 80117ae:	68fb      	ldr	r3, [r7, #12]
 80117b0:	2b00      	cmp	r3, #0
 80117b2:	d072      	beq.n	801189a <osSemaphoreNew+0x108>
 80117b4:	68ba      	ldr	r2, [r7, #8]
 80117b6:	68fb      	ldr	r3, [r7, #12]
 80117b8:	429a      	cmp	r2, r3
 80117ba:	d86e      	bhi.n	801189a <osSemaphoreNew+0x108>
    mem = -1;
 80117bc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80117c0:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 80117c2:	687b      	ldr	r3, [r7, #4]
 80117c4:	2b00      	cmp	r3, #0
 80117c6:	d015      	beq.n	80117f4 <osSemaphoreNew+0x62>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 80117c8:	687b      	ldr	r3, [r7, #4]
 80117ca:	689b      	ldr	r3, [r3, #8]
 80117cc:	2b00      	cmp	r3, #0
 80117ce:	d006      	beq.n	80117de <osSemaphoreNew+0x4c>
 80117d0:	687b      	ldr	r3, [r7, #4]
 80117d2:	68db      	ldr	r3, [r3, #12]
 80117d4:	2b4f      	cmp	r3, #79	@ 0x4f
 80117d6:	d902      	bls.n	80117de <osSemaphoreNew+0x4c>
        mem = 1;
 80117d8:	2301      	movs	r3, #1
 80117da:	61bb      	str	r3, [r7, #24]
 80117dc:	e00c      	b.n	80117f8 <osSemaphoreNew+0x66>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 80117de:	687b      	ldr	r3, [r7, #4]
 80117e0:	689b      	ldr	r3, [r3, #8]
 80117e2:	2b00      	cmp	r3, #0
 80117e4:	d108      	bne.n	80117f8 <osSemaphoreNew+0x66>
 80117e6:	687b      	ldr	r3, [r7, #4]
 80117e8:	68db      	ldr	r3, [r3, #12]
 80117ea:	2b00      	cmp	r3, #0
 80117ec:	d104      	bne.n	80117f8 <osSemaphoreNew+0x66>
          mem = 0;
 80117ee:	2300      	movs	r3, #0
 80117f0:	61bb      	str	r3, [r7, #24]
 80117f2:	e001      	b.n	80117f8 <osSemaphoreNew+0x66>
        }
      }
    }
    else {
      mem = 0;
 80117f4:	2300      	movs	r3, #0
 80117f6:	61bb      	str	r3, [r7, #24]
    }

    if (mem != -1) {
 80117f8:	69bb      	ldr	r3, [r7, #24]
 80117fa:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80117fe:	d04c      	beq.n	801189a <osSemaphoreNew+0x108>
      if (max_count == 1U) {
 8011800:	68fb      	ldr	r3, [r7, #12]
 8011802:	2b01      	cmp	r3, #1
 8011804:	d128      	bne.n	8011858 <osSemaphoreNew+0xc6>
        if (mem == 1) {
 8011806:	69bb      	ldr	r3, [r7, #24]
 8011808:	2b01      	cmp	r3, #1
 801180a:	d10a      	bne.n	8011822 <osSemaphoreNew+0x90>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
 801180c:	687b      	ldr	r3, [r7, #4]
 801180e:	689b      	ldr	r3, [r3, #8]
 8011810:	2203      	movs	r2, #3
 8011812:	9200      	str	r2, [sp, #0]
 8011814:	2200      	movs	r2, #0
 8011816:	2100      	movs	r1, #0
 8011818:	2001      	movs	r0, #1
 801181a:	f000 fbc5 	bl	8011fa8 <xQueueGenericCreateStatic>
 801181e:	61f8      	str	r0, [r7, #28]
 8011820:	e005      	b.n	801182e <osSemaphoreNew+0x9c>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinary();
 8011822:	2203      	movs	r2, #3
 8011824:	2100      	movs	r1, #0
 8011826:	2001      	movs	r0, #1
 8011828:	f000 fc3b 	bl	80120a2 <xQueueGenericCreate>
 801182c:	61f8      	str	r0, [r7, #28]
          #endif
        }

        if ((hSemaphore != NULL) && (initial_count != 0U)) {
 801182e:	69fb      	ldr	r3, [r7, #28]
 8011830:	2b00      	cmp	r3, #0
 8011832:	d022      	beq.n	801187a <osSemaphoreNew+0xe8>
 8011834:	68bb      	ldr	r3, [r7, #8]
 8011836:	2b00      	cmp	r3, #0
 8011838:	d01f      	beq.n	801187a <osSemaphoreNew+0xe8>
          if (xSemaphoreGive (hSemaphore) != pdPASS) {
 801183a:	2300      	movs	r3, #0
 801183c:	2200      	movs	r2, #0
 801183e:	2100      	movs	r1, #0
 8011840:	69f8      	ldr	r0, [r7, #28]
 8011842:	f000 fdb3 	bl	80123ac <xQueueGenericSend>
 8011846:	4603      	mov	r3, r0
 8011848:	2b01      	cmp	r3, #1
 801184a:	d016      	beq.n	801187a <osSemaphoreNew+0xe8>
            vSemaphoreDelete (hSemaphore);
 801184c:	69f8      	ldr	r0, [r7, #28]
 801184e:	f001 fa8f 	bl	8012d70 <vQueueDelete>
            hSemaphore = NULL;
 8011852:	2300      	movs	r3, #0
 8011854:	61fb      	str	r3, [r7, #28]
 8011856:	e010      	b.n	801187a <osSemaphoreNew+0xe8>
          }
        }
      }
      else {
        if (mem == 1) {
 8011858:	69bb      	ldr	r3, [r7, #24]
 801185a:	2b01      	cmp	r3, #1
 801185c:	d108      	bne.n	8011870 <osSemaphoreNew+0xde>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
 801185e:	687b      	ldr	r3, [r7, #4]
 8011860:	689b      	ldr	r3, [r3, #8]
 8011862:	461a      	mov	r2, r3
 8011864:	68b9      	ldr	r1, [r7, #8]
 8011866:	68f8      	ldr	r0, [r7, #12]
 8011868:	f000 fd32 	bl	80122d0 <xQueueCreateCountingSemaphoreStatic>
 801186c:	61f8      	str	r0, [r7, #28]
 801186e:	e004      	b.n	801187a <osSemaphoreNew+0xe8>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
 8011870:	68b9      	ldr	r1, [r7, #8]
 8011872:	68f8      	ldr	r0, [r7, #12]
 8011874:	f000 fd65 	bl	8012342 <xQueueCreateCountingSemaphore>
 8011878:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }
      
      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hSemaphore != NULL) {
 801187a:	69fb      	ldr	r3, [r7, #28]
 801187c:	2b00      	cmp	r3, #0
 801187e:	d00c      	beq.n	801189a <osSemaphoreNew+0x108>
        if (attr != NULL) {
 8011880:	687b      	ldr	r3, [r7, #4]
 8011882:	2b00      	cmp	r3, #0
 8011884:	d003      	beq.n	801188e <osSemaphoreNew+0xfc>
          name = attr->name;
 8011886:	687b      	ldr	r3, [r7, #4]
 8011888:	681b      	ldr	r3, [r3, #0]
 801188a:	617b      	str	r3, [r7, #20]
 801188c:	e001      	b.n	8011892 <osSemaphoreNew+0x100>
        } else {
          name = NULL;
 801188e:	2300      	movs	r3, #0
 8011890:	617b      	str	r3, [r7, #20]
        }
        vQueueAddToRegistry (hSemaphore, name);
 8011892:	6979      	ldr	r1, [r7, #20]
 8011894:	69f8      	ldr	r0, [r7, #28]
 8011896:	f001 fbb7 	bl	8013008 <vQueueAddToRegistry>
      }
      #endif
    }
  }

  return ((osSemaphoreId_t)hSemaphore);
 801189a:	69fb      	ldr	r3, [r7, #28]
}
 801189c:	4618      	mov	r0, r3
 801189e:	3720      	adds	r7, #32
 80118a0:	46bd      	mov	sp, r7
 80118a2:	bd80      	pop	{r7, pc}

080118a4 <osSemaphoreAcquire>:

osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
 80118a4:	b580      	push	{r7, lr}
 80118a6:	b086      	sub	sp, #24
 80118a8:	af00      	add	r7, sp, #0
 80118aa:	6078      	str	r0, [r7, #4]
 80118ac:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 80118ae:	687b      	ldr	r3, [r7, #4]
 80118b0:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 80118b2:	2300      	movs	r3, #0
 80118b4:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 80118b6:	693b      	ldr	r3, [r7, #16]
 80118b8:	2b00      	cmp	r3, #0
 80118ba:	d103      	bne.n	80118c4 <osSemaphoreAcquire+0x20>
    stat = osErrorParameter;
 80118bc:	f06f 0303 	mvn.w	r3, #3
 80118c0:	617b      	str	r3, [r7, #20]
 80118c2:	e039      	b.n	8011938 <osSemaphoreAcquire+0x94>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80118c4:	f3ef 8305 	mrs	r3, IPSR
 80118c8:	60fb      	str	r3, [r7, #12]
  return(result);
 80118ca:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 80118cc:	2b00      	cmp	r3, #0
 80118ce:	d022      	beq.n	8011916 <osSemaphoreAcquire+0x72>
    if (timeout != 0U) {
 80118d0:	683b      	ldr	r3, [r7, #0]
 80118d2:	2b00      	cmp	r3, #0
 80118d4:	d003      	beq.n	80118de <osSemaphoreAcquire+0x3a>
      stat = osErrorParameter;
 80118d6:	f06f 0303 	mvn.w	r3, #3
 80118da:	617b      	str	r3, [r7, #20]
 80118dc:	e02c      	b.n	8011938 <osSemaphoreAcquire+0x94>
    }
    else {
      yield = pdFALSE;
 80118de:	2300      	movs	r3, #0
 80118e0:	60bb      	str	r3, [r7, #8]

      if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
 80118e2:	f107 0308 	add.w	r3, r7, #8
 80118e6:	461a      	mov	r2, r3
 80118e8:	2100      	movs	r1, #0
 80118ea:	6938      	ldr	r0, [r7, #16]
 80118ec:	f001 f980 	bl	8012bf0 <xQueueReceiveFromISR>
 80118f0:	4603      	mov	r3, r0
 80118f2:	2b01      	cmp	r3, #1
 80118f4:	d003      	beq.n	80118fe <osSemaphoreAcquire+0x5a>
        stat = osErrorResource;
 80118f6:	f06f 0302 	mvn.w	r3, #2
 80118fa:	617b      	str	r3, [r7, #20]
 80118fc:	e01c      	b.n	8011938 <osSemaphoreAcquire+0x94>
      } else {
        portYIELD_FROM_ISR (yield);
 80118fe:	68bb      	ldr	r3, [r7, #8]
 8011900:	2b00      	cmp	r3, #0
 8011902:	d019      	beq.n	8011938 <osSemaphoreAcquire+0x94>
 8011904:	4b0f      	ldr	r3, [pc, #60]	@ (8011944 <osSemaphoreAcquire+0xa0>)
 8011906:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801190a:	601a      	str	r2, [r3, #0]
 801190c:	f3bf 8f4f 	dsb	sy
 8011910:	f3bf 8f6f 	isb	sy
 8011914:	e010      	b.n	8011938 <osSemaphoreAcquire+0x94>
      }
    }
  }
  else {
    if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
 8011916:	6839      	ldr	r1, [r7, #0]
 8011918:	6938      	ldr	r0, [r7, #16]
 801191a:	f001 f859 	bl	80129d0 <xQueueSemaphoreTake>
 801191e:	4603      	mov	r3, r0
 8011920:	2b01      	cmp	r3, #1
 8011922:	d009      	beq.n	8011938 <osSemaphoreAcquire+0x94>
      if (timeout != 0U) {
 8011924:	683b      	ldr	r3, [r7, #0]
 8011926:	2b00      	cmp	r3, #0
 8011928:	d003      	beq.n	8011932 <osSemaphoreAcquire+0x8e>
        stat = osErrorTimeout;
 801192a:	f06f 0301 	mvn.w	r3, #1
 801192e:	617b      	str	r3, [r7, #20]
 8011930:	e002      	b.n	8011938 <osSemaphoreAcquire+0x94>
      } else {
        stat = osErrorResource;
 8011932:	f06f 0302 	mvn.w	r3, #2
 8011936:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8011938:	697b      	ldr	r3, [r7, #20]
}
 801193a:	4618      	mov	r0, r3
 801193c:	3718      	adds	r7, #24
 801193e:	46bd      	mov	sp, r7
 8011940:	bd80      	pop	{r7, pc}
 8011942:	bf00      	nop
 8011944:	e000ed04 	.word	0xe000ed04

08011948 <osSemaphoreRelease>:

osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
 8011948:	b580      	push	{r7, lr}
 801194a:	b086      	sub	sp, #24
 801194c:	af00      	add	r7, sp, #0
 801194e:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011950:	687b      	ldr	r3, [r7, #4]
 8011952:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8011954:	2300      	movs	r3, #0
 8011956:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 8011958:	693b      	ldr	r3, [r7, #16]
 801195a:	2b00      	cmp	r3, #0
 801195c:	d103      	bne.n	8011966 <osSemaphoreRelease+0x1e>
    stat = osErrorParameter;
 801195e:	f06f 0303 	mvn.w	r3, #3
 8011962:	617b      	str	r3, [r7, #20]
 8011964:	e02c      	b.n	80119c0 <osSemaphoreRelease+0x78>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011966:	f3ef 8305 	mrs	r3, IPSR
 801196a:	60fb      	str	r3, [r7, #12]
  return(result);
 801196c:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 801196e:	2b00      	cmp	r3, #0
 8011970:	d01a      	beq.n	80119a8 <osSemaphoreRelease+0x60>
    yield = pdFALSE;
 8011972:	2300      	movs	r3, #0
 8011974:	60bb      	str	r3, [r7, #8]

    if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
 8011976:	f107 0308 	add.w	r3, r7, #8
 801197a:	4619      	mov	r1, r3
 801197c:	6938      	ldr	r0, [r7, #16]
 801197e:	f000 feb5 	bl	80126ec <xQueueGiveFromISR>
 8011982:	4603      	mov	r3, r0
 8011984:	2b01      	cmp	r3, #1
 8011986:	d003      	beq.n	8011990 <osSemaphoreRelease+0x48>
      stat = osErrorResource;
 8011988:	f06f 0302 	mvn.w	r3, #2
 801198c:	617b      	str	r3, [r7, #20]
 801198e:	e017      	b.n	80119c0 <osSemaphoreRelease+0x78>
    } else {
      portYIELD_FROM_ISR (yield);
 8011990:	68bb      	ldr	r3, [r7, #8]
 8011992:	2b00      	cmp	r3, #0
 8011994:	d014      	beq.n	80119c0 <osSemaphoreRelease+0x78>
 8011996:	4b0d      	ldr	r3, [pc, #52]	@ (80119cc <osSemaphoreRelease+0x84>)
 8011998:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801199c:	601a      	str	r2, [r3, #0]
 801199e:	f3bf 8f4f 	dsb	sy
 80119a2:	f3bf 8f6f 	isb	sy
 80119a6:	e00b      	b.n	80119c0 <osSemaphoreRelease+0x78>
    }
  }
  else {
    if (xSemaphoreGive (hSemaphore) != pdPASS) {
 80119a8:	2300      	movs	r3, #0
 80119aa:	2200      	movs	r2, #0
 80119ac:	2100      	movs	r1, #0
 80119ae:	6938      	ldr	r0, [r7, #16]
 80119b0:	f000 fcfc 	bl	80123ac <xQueueGenericSend>
 80119b4:	4603      	mov	r3, r0
 80119b6:	2b01      	cmp	r3, #1
 80119b8:	d002      	beq.n	80119c0 <osSemaphoreRelease+0x78>
      stat = osErrorResource;
 80119ba:	f06f 0302 	mvn.w	r3, #2
 80119be:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 80119c0:	697b      	ldr	r3, [r7, #20]
}
 80119c2:	4618      	mov	r0, r3
 80119c4:	3718      	adds	r7, #24
 80119c6:	46bd      	mov	sp, r7
 80119c8:	bd80      	pop	{r7, pc}
 80119ca:	bf00      	nop
 80119cc:	e000ed04 	.word	0xe000ed04

080119d0 <osSemaphoreDelete>:
  }

  return (count);
}

osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
 80119d0:	b580      	push	{r7, lr}
 80119d2:	b086      	sub	sp, #24
 80119d4:	af00      	add	r7, sp, #0
 80119d6:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 80119d8:	687b      	ldr	r3, [r7, #4]
 80119da:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80119dc:	f3ef 8305 	mrs	r3, IPSR
 80119e0:	60fb      	str	r3, [r7, #12]
  return(result);
 80119e2:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 80119e4:	2b00      	cmp	r3, #0
 80119e6:	d003      	beq.n	80119f0 <osSemaphoreDelete+0x20>
    stat = osErrorISR;
 80119e8:	f06f 0305 	mvn.w	r3, #5
 80119ec:	617b      	str	r3, [r7, #20]
 80119ee:	e00e      	b.n	8011a0e <osSemaphoreDelete+0x3e>
  }
  else if (hSemaphore == NULL) {
 80119f0:	693b      	ldr	r3, [r7, #16]
 80119f2:	2b00      	cmp	r3, #0
 80119f4:	d103      	bne.n	80119fe <osSemaphoreDelete+0x2e>
    stat = osErrorParameter;
 80119f6:	f06f 0303 	mvn.w	r3, #3
 80119fa:	617b      	str	r3, [r7, #20]
 80119fc:	e007      	b.n	8011a0e <osSemaphoreDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hSemaphore);
 80119fe:	6938      	ldr	r0, [r7, #16]
 8011a00:	f001 fb2c 	bl	801305c <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8011a04:	2300      	movs	r3, #0
 8011a06:	617b      	str	r3, [r7, #20]
    vSemaphoreDelete (hSemaphore);
 8011a08:	6938      	ldr	r0, [r7, #16]
 8011a0a:	f001 f9b1 	bl	8012d70 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8011a0e:	697b      	ldr	r3, [r7, #20]
}
 8011a10:	4618      	mov	r0, r3
 8011a12:	3718      	adds	r7, #24
 8011a14:	46bd      	mov	sp, r7
 8011a16:	bd80      	pop	{r7, pc}

08011a18 <osMessageQueueNew>:

/*---------------------------------------------------------------------------*/

osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
 8011a18:	b580      	push	{r7, lr}
 8011a1a:	b08a      	sub	sp, #40	@ 0x28
 8011a1c:	af02      	add	r7, sp, #8
 8011a1e:	60f8      	str	r0, [r7, #12]
 8011a20:	60b9      	str	r1, [r7, #8]
 8011a22:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hQueue = NULL;
 8011a24:	2300      	movs	r3, #0
 8011a26:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011a28:	f3ef 8305 	mrs	r3, IPSR
 8011a2c:	613b      	str	r3, [r7, #16]
  return(result);
 8011a2e:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
 8011a30:	2b00      	cmp	r3, #0
 8011a32:	d15f      	bne.n	8011af4 <osMessageQueueNew+0xdc>
 8011a34:	68fb      	ldr	r3, [r7, #12]
 8011a36:	2b00      	cmp	r3, #0
 8011a38:	d05c      	beq.n	8011af4 <osMessageQueueNew+0xdc>
 8011a3a:	68bb      	ldr	r3, [r7, #8]
 8011a3c:	2b00      	cmp	r3, #0
 8011a3e:	d059      	beq.n	8011af4 <osMessageQueueNew+0xdc>
    mem = -1;
 8011a40:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011a44:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8011a46:	687b      	ldr	r3, [r7, #4]
 8011a48:	2b00      	cmp	r3, #0
 8011a4a:	d029      	beq.n	8011aa0 <osMessageQueueNew+0x88>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011a4c:	687b      	ldr	r3, [r7, #4]
 8011a4e:	689b      	ldr	r3, [r3, #8]
 8011a50:	2b00      	cmp	r3, #0
 8011a52:	d012      	beq.n	8011a7a <osMessageQueueNew+0x62>
 8011a54:	687b      	ldr	r3, [r7, #4]
 8011a56:	68db      	ldr	r3, [r3, #12]
 8011a58:	2b4f      	cmp	r3, #79	@ 0x4f
 8011a5a:	d90e      	bls.n	8011a7a <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011a5c:	687b      	ldr	r3, [r7, #4]
 8011a5e:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011a60:	2b00      	cmp	r3, #0
 8011a62:	d00a      	beq.n	8011a7a <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011a64:	687b      	ldr	r3, [r7, #4]
 8011a66:	695a      	ldr	r2, [r3, #20]
 8011a68:	68fb      	ldr	r3, [r7, #12]
 8011a6a:	68b9      	ldr	r1, [r7, #8]
 8011a6c:	fb01 f303 	mul.w	r3, r1, r3
 8011a70:	429a      	cmp	r2, r3
 8011a72:	d302      	bcc.n	8011a7a <osMessageQueueNew+0x62>
        mem = 1;
 8011a74:	2301      	movs	r3, #1
 8011a76:	61bb      	str	r3, [r7, #24]
 8011a78:	e014      	b.n	8011aa4 <osMessageQueueNew+0x8c>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8011a7a:	687b      	ldr	r3, [r7, #4]
 8011a7c:	689b      	ldr	r3, [r3, #8]
 8011a7e:	2b00      	cmp	r3, #0
 8011a80:	d110      	bne.n	8011aa4 <osMessageQueueNew+0x8c>
 8011a82:	687b      	ldr	r3, [r7, #4]
 8011a84:	68db      	ldr	r3, [r3, #12]
 8011a86:	2b00      	cmp	r3, #0
 8011a88:	d10c      	bne.n	8011aa4 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8011a8a:	687b      	ldr	r3, [r7, #4]
 8011a8c:	691b      	ldr	r3, [r3, #16]
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8011a8e:	2b00      	cmp	r3, #0
 8011a90:	d108      	bne.n	8011aa4 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8011a92:	687b      	ldr	r3, [r7, #4]
 8011a94:	695b      	ldr	r3, [r3, #20]
 8011a96:	2b00      	cmp	r3, #0
 8011a98:	d104      	bne.n	8011aa4 <osMessageQueueNew+0x8c>
          mem = 0;
 8011a9a:	2300      	movs	r3, #0
 8011a9c:	61bb      	str	r3, [r7, #24]
 8011a9e:	e001      	b.n	8011aa4 <osMessageQueueNew+0x8c>
        }
      }
    }
    else {
      mem = 0;
 8011aa0:	2300      	movs	r3, #0
 8011aa2:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8011aa4:	69bb      	ldr	r3, [r7, #24]
 8011aa6:	2b01      	cmp	r3, #1
 8011aa8:	d10b      	bne.n	8011ac2 <osMessageQueueNew+0xaa>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
 8011aaa:	687b      	ldr	r3, [r7, #4]
 8011aac:	691a      	ldr	r2, [r3, #16]
 8011aae:	687b      	ldr	r3, [r7, #4]
 8011ab0:	689b      	ldr	r3, [r3, #8]
 8011ab2:	2100      	movs	r1, #0
 8011ab4:	9100      	str	r1, [sp, #0]
 8011ab6:	68b9      	ldr	r1, [r7, #8]
 8011ab8:	68f8      	ldr	r0, [r7, #12]
 8011aba:	f000 fa75 	bl	8011fa8 <xQueueGenericCreateStatic>
 8011abe:	61f8      	str	r0, [r7, #28]
 8011ac0:	e008      	b.n	8011ad4 <osMessageQueueNew+0xbc>
      #endif
    }
    else {
      if (mem == 0) {
 8011ac2:	69bb      	ldr	r3, [r7, #24]
 8011ac4:	2b00      	cmp	r3, #0
 8011ac6:	d105      	bne.n	8011ad4 <osMessageQueueNew+0xbc>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          hQueue = xQueueCreate (msg_count, msg_size);
 8011ac8:	2200      	movs	r2, #0
 8011aca:	68b9      	ldr	r1, [r7, #8]
 8011acc:	68f8      	ldr	r0, [r7, #12]
 8011ace:	f000 fae8 	bl	80120a2 <xQueueGenericCreate>
 8011ad2:	61f8      	str	r0, [r7, #28]
        #endif
      }
    }

    #if (configQUEUE_REGISTRY_SIZE > 0)
    if (hQueue != NULL) {
 8011ad4:	69fb      	ldr	r3, [r7, #28]
 8011ad6:	2b00      	cmp	r3, #0
 8011ad8:	d00c      	beq.n	8011af4 <osMessageQueueNew+0xdc>
      if (attr != NULL) {
 8011ada:	687b      	ldr	r3, [r7, #4]
 8011adc:	2b00      	cmp	r3, #0
 8011ade:	d003      	beq.n	8011ae8 <osMessageQueueNew+0xd0>
        name = attr->name;
 8011ae0:	687b      	ldr	r3, [r7, #4]
 8011ae2:	681b      	ldr	r3, [r3, #0]
 8011ae4:	617b      	str	r3, [r7, #20]
 8011ae6:	e001      	b.n	8011aec <osMessageQueueNew+0xd4>
      } else {
        name = NULL;
 8011ae8:	2300      	movs	r3, #0
 8011aea:	617b      	str	r3, [r7, #20]
      }
      vQueueAddToRegistry (hQueue, name);
 8011aec:	6979      	ldr	r1, [r7, #20]
 8011aee:	69f8      	ldr	r0, [r7, #28]
 8011af0:	f001 fa8a 	bl	8013008 <vQueueAddToRegistry>
    }
    #endif

  }

  return ((osMessageQueueId_t)hQueue);
 8011af4:	69fb      	ldr	r3, [r7, #28]
}
 8011af6:	4618      	mov	r0, r3
 8011af8:	3720      	adds	r7, #32
 8011afa:	46bd      	mov	sp, r7
 8011afc:	bd80      	pop	{r7, pc}
	...

08011b00 <osMessageQueuePut>:

osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
 8011b00:	b580      	push	{r7, lr}
 8011b02:	b088      	sub	sp, #32
 8011b04:	af00      	add	r7, sp, #0
 8011b06:	60f8      	str	r0, [r7, #12]
 8011b08:	60b9      	str	r1, [r7, #8]
 8011b0a:	603b      	str	r3, [r7, #0]
 8011b0c:	4613      	mov	r3, r2
 8011b0e:	71fb      	strb	r3, [r7, #7]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011b10:	68fb      	ldr	r3, [r7, #12]
 8011b12:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8011b14:	2300      	movs	r3, #0
 8011b16:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011b18:	f3ef 8305 	mrs	r3, IPSR
 8011b1c:	617b      	str	r3, [r7, #20]
  return(result);
 8011b1e:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011b20:	2b00      	cmp	r3, #0
 8011b22:	d028      	beq.n	8011b76 <osMessageQueuePut+0x76>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8011b24:	69bb      	ldr	r3, [r7, #24]
 8011b26:	2b00      	cmp	r3, #0
 8011b28:	d005      	beq.n	8011b36 <osMessageQueuePut+0x36>
 8011b2a:	68bb      	ldr	r3, [r7, #8]
 8011b2c:	2b00      	cmp	r3, #0
 8011b2e:	d002      	beq.n	8011b36 <osMessageQueuePut+0x36>
 8011b30:	683b      	ldr	r3, [r7, #0]
 8011b32:	2b00      	cmp	r3, #0
 8011b34:	d003      	beq.n	8011b3e <osMessageQueuePut+0x3e>
      stat = osErrorParameter;
 8011b36:	f06f 0303 	mvn.w	r3, #3
 8011b3a:	61fb      	str	r3, [r7, #28]
 8011b3c:	e038      	b.n	8011bb0 <osMessageQueuePut+0xb0>
    }
    else {
      yield = pdFALSE;
 8011b3e:	2300      	movs	r3, #0
 8011b40:	613b      	str	r3, [r7, #16]

      if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
 8011b42:	f107 0210 	add.w	r2, r7, #16
 8011b46:	2300      	movs	r3, #0
 8011b48:	68b9      	ldr	r1, [r7, #8]
 8011b4a:	69b8      	ldr	r0, [r7, #24]
 8011b4c:	f000 fd30 	bl	80125b0 <xQueueGenericSendFromISR>
 8011b50:	4603      	mov	r3, r0
 8011b52:	2b01      	cmp	r3, #1
 8011b54:	d003      	beq.n	8011b5e <osMessageQueuePut+0x5e>
        stat = osErrorResource;
 8011b56:	f06f 0302 	mvn.w	r3, #2
 8011b5a:	61fb      	str	r3, [r7, #28]
 8011b5c:	e028      	b.n	8011bb0 <osMessageQueuePut+0xb0>
      } else {
        portYIELD_FROM_ISR (yield);
 8011b5e:	693b      	ldr	r3, [r7, #16]
 8011b60:	2b00      	cmp	r3, #0
 8011b62:	d025      	beq.n	8011bb0 <osMessageQueuePut+0xb0>
 8011b64:	4b15      	ldr	r3, [pc, #84]	@ (8011bbc <osMessageQueuePut+0xbc>)
 8011b66:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011b6a:	601a      	str	r2, [r3, #0]
 8011b6c:	f3bf 8f4f 	dsb	sy
 8011b70:	f3bf 8f6f 	isb	sy
 8011b74:	e01c      	b.n	8011bb0 <osMessageQueuePut+0xb0>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8011b76:	69bb      	ldr	r3, [r7, #24]
 8011b78:	2b00      	cmp	r3, #0
 8011b7a:	d002      	beq.n	8011b82 <osMessageQueuePut+0x82>
 8011b7c:	68bb      	ldr	r3, [r7, #8]
 8011b7e:	2b00      	cmp	r3, #0
 8011b80:	d103      	bne.n	8011b8a <osMessageQueuePut+0x8a>
      stat = osErrorParameter;
 8011b82:	f06f 0303 	mvn.w	r3, #3
 8011b86:	61fb      	str	r3, [r7, #28]
 8011b88:	e012      	b.n	8011bb0 <osMessageQueuePut+0xb0>
    }
    else {
      if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8011b8a:	2300      	movs	r3, #0
 8011b8c:	683a      	ldr	r2, [r7, #0]
 8011b8e:	68b9      	ldr	r1, [r7, #8]
 8011b90:	69b8      	ldr	r0, [r7, #24]
 8011b92:	f000 fc0b 	bl	80123ac <xQueueGenericSend>
 8011b96:	4603      	mov	r3, r0
 8011b98:	2b01      	cmp	r3, #1
 8011b9a:	d009      	beq.n	8011bb0 <osMessageQueuePut+0xb0>
        if (timeout != 0U) {
 8011b9c:	683b      	ldr	r3, [r7, #0]
 8011b9e:	2b00      	cmp	r3, #0
 8011ba0:	d003      	beq.n	8011baa <osMessageQueuePut+0xaa>
          stat = osErrorTimeout;
 8011ba2:	f06f 0301 	mvn.w	r3, #1
 8011ba6:	61fb      	str	r3, [r7, #28]
 8011ba8:	e002      	b.n	8011bb0 <osMessageQueuePut+0xb0>
        } else {
          stat = osErrorResource;
 8011baa:	f06f 0302 	mvn.w	r3, #2
 8011bae:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011bb0:	69fb      	ldr	r3, [r7, #28]
}
 8011bb2:	4618      	mov	r0, r3
 8011bb4:	3720      	adds	r7, #32
 8011bb6:	46bd      	mov	sp, r7
 8011bb8:	bd80      	pop	{r7, pc}
 8011bba:	bf00      	nop
 8011bbc:	e000ed04 	.word	0xe000ed04

08011bc0 <osMessageQueueGet>:

osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
 8011bc0:	b580      	push	{r7, lr}
 8011bc2:	b088      	sub	sp, #32
 8011bc4:	af00      	add	r7, sp, #0
 8011bc6:	60f8      	str	r0, [r7, #12]
 8011bc8:	60b9      	str	r1, [r7, #8]
 8011bca:	607a      	str	r2, [r7, #4]
 8011bcc:	603b      	str	r3, [r7, #0]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011bce:	68fb      	ldr	r3, [r7, #12]
 8011bd0:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8011bd2:	2300      	movs	r3, #0
 8011bd4:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011bd6:	f3ef 8305 	mrs	r3, IPSR
 8011bda:	617b      	str	r3, [r7, #20]
  return(result);
 8011bdc:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011bde:	2b00      	cmp	r3, #0
 8011be0:	d028      	beq.n	8011c34 <osMessageQueueGet+0x74>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8011be2:	69bb      	ldr	r3, [r7, #24]
 8011be4:	2b00      	cmp	r3, #0
 8011be6:	d005      	beq.n	8011bf4 <osMessageQueueGet+0x34>
 8011be8:	68bb      	ldr	r3, [r7, #8]
 8011bea:	2b00      	cmp	r3, #0
 8011bec:	d002      	beq.n	8011bf4 <osMessageQueueGet+0x34>
 8011bee:	683b      	ldr	r3, [r7, #0]
 8011bf0:	2b00      	cmp	r3, #0
 8011bf2:	d003      	beq.n	8011bfc <osMessageQueueGet+0x3c>
      stat = osErrorParameter;
 8011bf4:	f06f 0303 	mvn.w	r3, #3
 8011bf8:	61fb      	str	r3, [r7, #28]
 8011bfa:	e037      	b.n	8011c6c <osMessageQueueGet+0xac>
    }
    else {
      yield = pdFALSE;
 8011bfc:	2300      	movs	r3, #0
 8011bfe:	613b      	str	r3, [r7, #16]

      if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
 8011c00:	f107 0310 	add.w	r3, r7, #16
 8011c04:	461a      	mov	r2, r3
 8011c06:	68b9      	ldr	r1, [r7, #8]
 8011c08:	69b8      	ldr	r0, [r7, #24]
 8011c0a:	f000 fff1 	bl	8012bf0 <xQueueReceiveFromISR>
 8011c0e:	4603      	mov	r3, r0
 8011c10:	2b01      	cmp	r3, #1
 8011c12:	d003      	beq.n	8011c1c <osMessageQueueGet+0x5c>
        stat = osErrorResource;
 8011c14:	f06f 0302 	mvn.w	r3, #2
 8011c18:	61fb      	str	r3, [r7, #28]
 8011c1a:	e027      	b.n	8011c6c <osMessageQueueGet+0xac>
      } else {
        portYIELD_FROM_ISR (yield);
 8011c1c:	693b      	ldr	r3, [r7, #16]
 8011c1e:	2b00      	cmp	r3, #0
 8011c20:	d024      	beq.n	8011c6c <osMessageQueueGet+0xac>
 8011c22:	4b15      	ldr	r3, [pc, #84]	@ (8011c78 <osMessageQueueGet+0xb8>)
 8011c24:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011c28:	601a      	str	r2, [r3, #0]
 8011c2a:	f3bf 8f4f 	dsb	sy
 8011c2e:	f3bf 8f6f 	isb	sy
 8011c32:	e01b      	b.n	8011c6c <osMessageQueueGet+0xac>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8011c34:	69bb      	ldr	r3, [r7, #24]
 8011c36:	2b00      	cmp	r3, #0
 8011c38:	d002      	beq.n	8011c40 <osMessageQueueGet+0x80>
 8011c3a:	68bb      	ldr	r3, [r7, #8]
 8011c3c:	2b00      	cmp	r3, #0
 8011c3e:	d103      	bne.n	8011c48 <osMessageQueueGet+0x88>
      stat = osErrorParameter;
 8011c40:	f06f 0303 	mvn.w	r3, #3
 8011c44:	61fb      	str	r3, [r7, #28]
 8011c46:	e011      	b.n	8011c6c <osMessageQueueGet+0xac>
    }
    else {
      if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8011c48:	683a      	ldr	r2, [r7, #0]
 8011c4a:	68b9      	ldr	r1, [r7, #8]
 8011c4c:	69b8      	ldr	r0, [r7, #24]
 8011c4e:	f000 fddd 	bl	801280c <xQueueReceive>
 8011c52:	4603      	mov	r3, r0
 8011c54:	2b01      	cmp	r3, #1
 8011c56:	d009      	beq.n	8011c6c <osMessageQueueGet+0xac>
        if (timeout != 0U) {
 8011c58:	683b      	ldr	r3, [r7, #0]
 8011c5a:	2b00      	cmp	r3, #0
 8011c5c:	d003      	beq.n	8011c66 <osMessageQueueGet+0xa6>
          stat = osErrorTimeout;
 8011c5e:	f06f 0301 	mvn.w	r3, #1
 8011c62:	61fb      	str	r3, [r7, #28]
 8011c64:	e002      	b.n	8011c6c <osMessageQueueGet+0xac>
        } else {
          stat = osErrorResource;
 8011c66:	f06f 0302 	mvn.w	r3, #2
 8011c6a:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011c6c:	69fb      	ldr	r3, [r7, #28]
}
 8011c6e:	4618      	mov	r0, r3
 8011c70:	3720      	adds	r7, #32
 8011c72:	46bd      	mov	sp, r7
 8011c74:	bd80      	pop	{r7, pc}
 8011c76:	bf00      	nop
 8011c78:	e000ed04 	.word	0xe000ed04

08011c7c <osMessageQueueGetCount>:
  }

  return (size);
}

uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
 8011c7c:	b580      	push	{r7, lr}
 8011c7e:	b086      	sub	sp, #24
 8011c80:	af00      	add	r7, sp, #0
 8011c82:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011c84:	687b      	ldr	r3, [r7, #4]
 8011c86:	613b      	str	r3, [r7, #16]
  UBaseType_t count;

  if (hQueue == NULL) {
 8011c88:	693b      	ldr	r3, [r7, #16]
 8011c8a:	2b00      	cmp	r3, #0
 8011c8c:	d102      	bne.n	8011c94 <osMessageQueueGetCount+0x18>
    count = 0U;
 8011c8e:	2300      	movs	r3, #0
 8011c90:	617b      	str	r3, [r7, #20]
 8011c92:	e00e      	b.n	8011cb2 <osMessageQueueGetCount+0x36>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011c94:	f3ef 8305 	mrs	r3, IPSR
 8011c98:	60fb      	str	r3, [r7, #12]
  return(result);
 8011c9a:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011c9c:	2b00      	cmp	r3, #0
 8011c9e:	d004      	beq.n	8011caa <osMessageQueueGetCount+0x2e>
    count = uxQueueMessagesWaitingFromISR (hQueue);
 8011ca0:	6938      	ldr	r0, [r7, #16]
 8011ca2:	f001 f846 	bl	8012d32 <uxQueueMessagesWaitingFromISR>
 8011ca6:	6178      	str	r0, [r7, #20]
 8011ca8:	e003      	b.n	8011cb2 <osMessageQueueGetCount+0x36>
  }
  else {
    count = uxQueueMessagesWaiting (hQueue);
 8011caa:	6938      	ldr	r0, [r7, #16]
 8011cac:	f001 f822 	bl	8012cf4 <uxQueueMessagesWaiting>
 8011cb0:	6178      	str	r0, [r7, #20]
  }

  return ((uint32_t)count);
 8011cb2:	697b      	ldr	r3, [r7, #20]
}
 8011cb4:	4618      	mov	r0, r3
 8011cb6:	3718      	adds	r7, #24
 8011cb8:	46bd      	mov	sp, r7
 8011cba:	bd80      	pop	{r7, pc}

08011cbc <osMessageQueueDelete>:
  }

  return (stat);
}

osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
 8011cbc:	b580      	push	{r7, lr}
 8011cbe:	b086      	sub	sp, #24
 8011cc0:	af00      	add	r7, sp, #0
 8011cc2:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011cc4:	687b      	ldr	r3, [r7, #4]
 8011cc6:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011cc8:	f3ef 8305 	mrs	r3, IPSR
 8011ccc:	60fb      	str	r3, [r7, #12]
  return(result);
 8011cce:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011cd0:	2b00      	cmp	r3, #0
 8011cd2:	d003      	beq.n	8011cdc <osMessageQueueDelete+0x20>
    stat = osErrorISR;
 8011cd4:	f06f 0305 	mvn.w	r3, #5
 8011cd8:	617b      	str	r3, [r7, #20]
 8011cda:	e00e      	b.n	8011cfa <osMessageQueueDelete+0x3e>
  }
  else if (hQueue == NULL) {
 8011cdc:	693b      	ldr	r3, [r7, #16]
 8011cde:	2b00      	cmp	r3, #0
 8011ce0:	d103      	bne.n	8011cea <osMessageQueueDelete+0x2e>
    stat = osErrorParameter;
 8011ce2:	f06f 0303 	mvn.w	r3, #3
 8011ce6:	617b      	str	r3, [r7, #20]
 8011ce8:	e007      	b.n	8011cfa <osMessageQueueDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hQueue);
 8011cea:	6938      	ldr	r0, [r7, #16]
 8011cec:	f001 f9b6 	bl	801305c <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8011cf0:	2300      	movs	r3, #0
 8011cf2:	617b      	str	r3, [r7, #20]
    vQueueDelete (hQueue);
 8011cf4:	6938      	ldr	r0, [r7, #16]
 8011cf6:	f001 f83b 	bl	8012d70 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8011cfa:	697b      	ldr	r3, [r7, #20]
}
 8011cfc:	4618      	mov	r0, r3
 8011cfe:	3718      	adds	r7, #24
 8011d00:	46bd      	mov	sp, r7
 8011d02:	bd80      	pop	{r7, pc}

08011d04 <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 8011d04:	b480      	push	{r7}
 8011d06:	b085      	sub	sp, #20
 8011d08:	af00      	add	r7, sp, #0
 8011d0a:	60f8      	str	r0, [r7, #12]
 8011d0c:	60b9      	str	r1, [r7, #8]
 8011d0e:	607a      	str	r2, [r7, #4]
  /* Idle task control block and stack */
  static StaticTask_t Idle_TCB;
  static StackType_t  Idle_Stack[configMINIMAL_STACK_SIZE];

  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 8011d10:	68fb      	ldr	r3, [r7, #12]
 8011d12:	4a07      	ldr	r2, [pc, #28]	@ (8011d30 <vApplicationGetIdleTaskMemory+0x2c>)
 8011d14:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 8011d16:	68bb      	ldr	r3, [r7, #8]
 8011d18:	4a06      	ldr	r2, [pc, #24]	@ (8011d34 <vApplicationGetIdleTaskMemory+0x30>)
 8011d1a:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 8011d1c:	687b      	ldr	r3, [r7, #4]
 8011d1e:	f44f 7200 	mov.w	r2, #512	@ 0x200
 8011d22:	601a      	str	r2, [r3, #0]
}
 8011d24:	bf00      	nop
 8011d26:	3714      	adds	r7, #20
 8011d28:	46bd      	mov	sp, r7
 8011d2a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011d2e:	4770      	bx	lr
 8011d30:	240023e0 	.word	0x240023e0
 8011d34:	24002488 	.word	0x24002488

08011d38 <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 8011d38:	b480      	push	{r7}
 8011d3a:	b085      	sub	sp, #20
 8011d3c:	af00      	add	r7, sp, #0
 8011d3e:	60f8      	str	r0, [r7, #12]
 8011d40:	60b9      	str	r1, [r7, #8]
 8011d42:	607a      	str	r2, [r7, #4]
  /* Timer task control block and stack */
  static StaticTask_t Timer_TCB;
  static StackType_t  Timer_Stack[configTIMER_TASK_STACK_DEPTH];

  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 8011d44:	68fb      	ldr	r3, [r7, #12]
 8011d46:	4a07      	ldr	r2, [pc, #28]	@ (8011d64 <vApplicationGetTimerTaskMemory+0x2c>)
 8011d48:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 8011d4a:	68bb      	ldr	r3, [r7, #8]
 8011d4c:	4a06      	ldr	r2, [pc, #24]	@ (8011d68 <vApplicationGetTimerTaskMemory+0x30>)
 8011d4e:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 8011d50:	687b      	ldr	r3, [r7, #4]
 8011d52:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8011d56:	601a      	str	r2, [r3, #0]
}
 8011d58:	bf00      	nop
 8011d5a:	3714      	adds	r7, #20
 8011d5c:	46bd      	mov	sp, r7
 8011d5e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011d62:	4770      	bx	lr
 8011d64:	24002c88 	.word	0x24002c88
 8011d68:	24002d30 	.word	0x24002d30

08011d6c <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 8011d6c:	b480      	push	{r7}
 8011d6e:	b083      	sub	sp, #12
 8011d70:	af00      	add	r7, sp, #0
 8011d72:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8011d74:	687b      	ldr	r3, [r7, #4]
 8011d76:	f103 0208 	add.w	r2, r3, #8
 8011d7a:	687b      	ldr	r3, [r7, #4]
 8011d7c:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 8011d7e:	687b      	ldr	r3, [r7, #4]
 8011d80:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8011d84:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8011d86:	687b      	ldr	r3, [r7, #4]
 8011d88:	f103 0208 	add.w	r2, r3, #8
 8011d8c:	687b      	ldr	r3, [r7, #4]
 8011d8e:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8011d90:	687b      	ldr	r3, [r7, #4]
 8011d92:	f103 0208 	add.w	r2, r3, #8
 8011d96:	687b      	ldr	r3, [r7, #4]
 8011d98:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 8011d9a:	687b      	ldr	r3, [r7, #4]
 8011d9c:	2200      	movs	r2, #0
 8011d9e:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 8011da0:	bf00      	nop
 8011da2:	370c      	adds	r7, #12
 8011da4:	46bd      	mov	sp, r7
 8011da6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011daa:	4770      	bx	lr

08011dac <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 8011dac:	b480      	push	{r7}
 8011dae:	b083      	sub	sp, #12
 8011db0:	af00      	add	r7, sp, #0
 8011db2:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pxContainer = NULL;
 8011db4:	687b      	ldr	r3, [r7, #4]
 8011db6:	2200      	movs	r2, #0
 8011db8:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 8011dba:	bf00      	nop
 8011dbc:	370c      	adds	r7, #12
 8011dbe:	46bd      	mov	sp, r7
 8011dc0:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011dc4:	4770      	bx	lr

08011dc6 <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8011dc6:	b480      	push	{r7}
 8011dc8:	b085      	sub	sp, #20
 8011dca:	af00      	add	r7, sp, #0
 8011dcc:	6078      	str	r0, [r7, #4]
 8011dce:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 8011dd0:	687b      	ldr	r3, [r7, #4]
 8011dd2:	685b      	ldr	r3, [r3, #4]
 8011dd4:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 8011dd6:	683b      	ldr	r3, [r7, #0]
 8011dd8:	68fa      	ldr	r2, [r7, #12]
 8011dda:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 8011ddc:	68fb      	ldr	r3, [r7, #12]
 8011dde:	689a      	ldr	r2, [r3, #8]
 8011de0:	683b      	ldr	r3, [r7, #0]
 8011de2:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 8011de4:	68fb      	ldr	r3, [r7, #12]
 8011de6:	689b      	ldr	r3, [r3, #8]
 8011de8:	683a      	ldr	r2, [r7, #0]
 8011dea:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 8011dec:	68fb      	ldr	r3, [r7, #12]
 8011dee:	683a      	ldr	r2, [r7, #0]
 8011df0:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pxContainer = pxList;
 8011df2:	683b      	ldr	r3, [r7, #0]
 8011df4:	687a      	ldr	r2, [r7, #4]
 8011df6:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8011df8:	687b      	ldr	r3, [r7, #4]
 8011dfa:	681b      	ldr	r3, [r3, #0]
 8011dfc:	1c5a      	adds	r2, r3, #1
 8011dfe:	687b      	ldr	r3, [r7, #4]
 8011e00:	601a      	str	r2, [r3, #0]
}
 8011e02:	bf00      	nop
 8011e04:	3714      	adds	r7, #20
 8011e06:	46bd      	mov	sp, r7
 8011e08:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011e0c:	4770      	bx	lr

08011e0e <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8011e0e:	b480      	push	{r7}
 8011e10:	b085      	sub	sp, #20
 8011e12:	af00      	add	r7, sp, #0
 8011e14:	6078      	str	r0, [r7, #4]
 8011e16:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 8011e18:	683b      	ldr	r3, [r7, #0]
 8011e1a:	681b      	ldr	r3, [r3, #0]
 8011e1c:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCBs which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 8011e1e:	68bb      	ldr	r3, [r7, #8]
 8011e20:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011e24:	d103      	bne.n	8011e2e <vListInsert+0x20>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 8011e26:	687b      	ldr	r3, [r7, #4]
 8011e28:	691b      	ldr	r3, [r3, #16]
 8011e2a:	60fb      	str	r3, [r7, #12]
 8011e2c:	e00c      	b.n	8011e48 <vListInsert+0x3a>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 8011e2e:	687b      	ldr	r3, [r7, #4]
 8011e30:	3308      	adds	r3, #8
 8011e32:	60fb      	str	r3, [r7, #12]
 8011e34:	e002      	b.n	8011e3c <vListInsert+0x2e>
 8011e36:	68fb      	ldr	r3, [r7, #12]
 8011e38:	685b      	ldr	r3, [r3, #4]
 8011e3a:	60fb      	str	r3, [r7, #12]
 8011e3c:	68fb      	ldr	r3, [r7, #12]
 8011e3e:	685b      	ldr	r3, [r3, #4]
 8011e40:	681b      	ldr	r3, [r3, #0]
 8011e42:	68ba      	ldr	r2, [r7, #8]
 8011e44:	429a      	cmp	r2, r3
 8011e46:	d2f6      	bcs.n	8011e36 <vListInsert+0x28>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 8011e48:	68fb      	ldr	r3, [r7, #12]
 8011e4a:	685a      	ldr	r2, [r3, #4]
 8011e4c:	683b      	ldr	r3, [r7, #0]
 8011e4e:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 8011e50:	683b      	ldr	r3, [r7, #0]
 8011e52:	685b      	ldr	r3, [r3, #4]
 8011e54:	683a      	ldr	r2, [r7, #0]
 8011e56:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 8011e58:	683b      	ldr	r3, [r7, #0]
 8011e5a:	68fa      	ldr	r2, [r7, #12]
 8011e5c:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 8011e5e:	68fb      	ldr	r3, [r7, #12]
 8011e60:	683a      	ldr	r2, [r7, #0]
 8011e62:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pxContainer = pxList;
 8011e64:	683b      	ldr	r3, [r7, #0]
 8011e66:	687a      	ldr	r2, [r7, #4]
 8011e68:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 8011e6a:	687b      	ldr	r3, [r7, #4]
 8011e6c:	681b      	ldr	r3, [r3, #0]
 8011e6e:	1c5a      	adds	r2, r3, #1
 8011e70:	687b      	ldr	r3, [r7, #4]
 8011e72:	601a      	str	r2, [r3, #0]
}
 8011e74:	bf00      	nop
 8011e76:	3714      	adds	r7, #20
 8011e78:	46bd      	mov	sp, r7
 8011e7a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011e7e:	4770      	bx	lr

08011e80 <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 8011e80:	b480      	push	{r7}
 8011e82:	b085      	sub	sp, #20
 8011e84:	af00      	add	r7, sp, #0
 8011e86:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
 8011e88:	687b      	ldr	r3, [r7, #4]
 8011e8a:	691b      	ldr	r3, [r3, #16]
 8011e8c:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 8011e8e:	687b      	ldr	r3, [r7, #4]
 8011e90:	685b      	ldr	r3, [r3, #4]
 8011e92:	687a      	ldr	r2, [r7, #4]
 8011e94:	6892      	ldr	r2, [r2, #8]
 8011e96:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 8011e98:	687b      	ldr	r3, [r7, #4]
 8011e9a:	689b      	ldr	r3, [r3, #8]
 8011e9c:	687a      	ldr	r2, [r7, #4]
 8011e9e:	6852      	ldr	r2, [r2, #4]
 8011ea0:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 8011ea2:	68fb      	ldr	r3, [r7, #12]
 8011ea4:	685b      	ldr	r3, [r3, #4]
 8011ea6:	687a      	ldr	r2, [r7, #4]
 8011ea8:	429a      	cmp	r2, r3
 8011eaa:	d103      	bne.n	8011eb4 <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 8011eac:	687b      	ldr	r3, [r7, #4]
 8011eae:	689a      	ldr	r2, [r3, #8]
 8011eb0:	68fb      	ldr	r3, [r7, #12]
 8011eb2:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pxContainer = NULL;
 8011eb4:	687b      	ldr	r3, [r7, #4]
 8011eb6:	2200      	movs	r2, #0
 8011eb8:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 8011eba:	68fb      	ldr	r3, [r7, #12]
 8011ebc:	681b      	ldr	r3, [r3, #0]
 8011ebe:	1e5a      	subs	r2, r3, #1
 8011ec0:	68fb      	ldr	r3, [r7, #12]
 8011ec2:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 8011ec4:	68fb      	ldr	r3, [r7, #12]
 8011ec6:	681b      	ldr	r3, [r3, #0]
}
 8011ec8:	4618      	mov	r0, r3
 8011eca:	3714      	adds	r7, #20
 8011ecc:	46bd      	mov	sp, r7
 8011ece:	f85d 7b04 	ldr.w	r7, [sp], #4
 8011ed2:	4770      	bx	lr

08011ed4 <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 8011ed4:	b580      	push	{r7, lr}
 8011ed6:	b084      	sub	sp, #16
 8011ed8:	af00      	add	r7, sp, #0
 8011eda:	6078      	str	r0, [r7, #4]
 8011edc:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
 8011ede:	687b      	ldr	r3, [r7, #4]
 8011ee0:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8011ee2:	68fb      	ldr	r3, [r7, #12]
 8011ee4:	2b00      	cmp	r3, #0
 8011ee6:	d10b      	bne.n	8011f00 <xQueueGenericReset+0x2c>

portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;

	__asm volatile
 8011ee8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011eec:	f383 8811 	msr	BASEPRI, r3
 8011ef0:	f3bf 8f6f 	isb	sy
 8011ef4:	f3bf 8f4f 	dsb	sy
 8011ef8:	60bb      	str	r3, [r7, #8]
		"	msr basepri, %0											\n" \
		"	isb														\n" \
		"	dsb														\n" \
		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);
}
 8011efa:	bf00      	nop
 8011efc:	bf00      	nop
 8011efe:	e7fd      	b.n	8011efc <xQueueGenericReset+0x28>

	taskENTER_CRITICAL();
 8011f00:	f003 fcda 	bl	80158b8 <vPortEnterCritical>
	{
		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011f04:	68fb      	ldr	r3, [r7, #12]
 8011f06:	681a      	ldr	r2, [r3, #0]
 8011f08:	68fb      	ldr	r3, [r7, #12]
 8011f0a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011f0c:	68f9      	ldr	r1, [r7, #12]
 8011f0e:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8011f10:	fb01 f303 	mul.w	r3, r1, r3
 8011f14:	441a      	add	r2, r3
 8011f16:	68fb      	ldr	r3, [r7, #12]
 8011f18:	609a      	str	r2, [r3, #8]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 8011f1a:	68fb      	ldr	r3, [r7, #12]
 8011f1c:	2200      	movs	r2, #0
 8011f1e:	639a      	str	r2, [r3, #56]	@ 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 8011f20:	68fb      	ldr	r3, [r7, #12]
 8011f22:	681a      	ldr	r2, [r3, #0]
 8011f24:	68fb      	ldr	r3, [r7, #12]
 8011f26:	605a      	str	r2, [r3, #4]
		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8011f28:	68fb      	ldr	r3, [r7, #12]
 8011f2a:	681a      	ldr	r2, [r3, #0]
 8011f2c:	68fb      	ldr	r3, [r7, #12]
 8011f2e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8011f30:	3b01      	subs	r3, #1
 8011f32:	68f9      	ldr	r1, [r7, #12]
 8011f34:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8011f36:	fb01 f303 	mul.w	r3, r1, r3
 8011f3a:	441a      	add	r2, r3
 8011f3c:	68fb      	ldr	r3, [r7, #12]
 8011f3e:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 8011f40:	68fb      	ldr	r3, [r7, #12]
 8011f42:	22ff      	movs	r2, #255	@ 0xff
 8011f44:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
		pxQueue->cTxLock = queueUNLOCKED;
 8011f48:	68fb      	ldr	r3, [r7, #12]
 8011f4a:	22ff      	movs	r2, #255	@ 0xff
 8011f4c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45

		if( xNewQueue == pdFALSE )
 8011f50:	683b      	ldr	r3, [r7, #0]
 8011f52:	2b00      	cmp	r3, #0
 8011f54:	d114      	bne.n	8011f80 <xQueueGenericReset+0xac>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8011f56:	68fb      	ldr	r3, [r7, #12]
 8011f58:	691b      	ldr	r3, [r3, #16]
 8011f5a:	2b00      	cmp	r3, #0
 8011f5c:	d01a      	beq.n	8011f94 <xQueueGenericReset+0xc0>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8011f5e:	68fb      	ldr	r3, [r7, #12]
 8011f60:	3310      	adds	r3, #16
 8011f62:	4618      	mov	r0, r3
 8011f64:	f002 f922 	bl	80141ac <xTaskRemoveFromEventList>
 8011f68:	4603      	mov	r3, r0
 8011f6a:	2b00      	cmp	r3, #0
 8011f6c:	d012      	beq.n	8011f94 <xQueueGenericReset+0xc0>
				{
					queueYIELD_IF_USING_PREEMPTION();
 8011f6e:	4b0d      	ldr	r3, [pc, #52]	@ (8011fa4 <xQueueGenericReset+0xd0>)
 8011f70:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011f74:	601a      	str	r2, [r3, #0]
 8011f76:	f3bf 8f4f 	dsb	sy
 8011f7a:	f3bf 8f6f 	isb	sy
 8011f7e:	e009      	b.n	8011f94 <xQueueGenericReset+0xc0>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 8011f80:	68fb      	ldr	r3, [r7, #12]
 8011f82:	3310      	adds	r3, #16
 8011f84:	4618      	mov	r0, r3
 8011f86:	f7ff fef1 	bl	8011d6c <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 8011f8a:	68fb      	ldr	r3, [r7, #12]
 8011f8c:	3324      	adds	r3, #36	@ 0x24
 8011f8e:	4618      	mov	r0, r3
 8011f90:	f7ff feec 	bl	8011d6c <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 8011f94:	f003 fcc2 	bl	801591c <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 8011f98:	2301      	movs	r3, #1
}
 8011f9a:	4618      	mov	r0, r3
 8011f9c:	3710      	adds	r7, #16
 8011f9e:	46bd      	mov	sp, r7
 8011fa0:	bd80      	pop	{r7, pc}
 8011fa2:	bf00      	nop
 8011fa4:	e000ed04 	.word	0xe000ed04

08011fa8 <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 8011fa8:	b580      	push	{r7, lr}
 8011faa:	b08e      	sub	sp, #56	@ 0x38
 8011fac:	af02      	add	r7, sp, #8
 8011fae:	60f8      	str	r0, [r7, #12]
 8011fb0:	60b9      	str	r1, [r7, #8]
 8011fb2:	607a      	str	r2, [r7, #4]
 8011fb4:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 8011fb6:	68fb      	ldr	r3, [r7, #12]
 8011fb8:	2b00      	cmp	r3, #0
 8011fba:	d10b      	bne.n	8011fd4 <xQueueGenericCreateStatic+0x2c>
	__asm volatile
 8011fbc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011fc0:	f383 8811 	msr	BASEPRI, r3
 8011fc4:	f3bf 8f6f 	isb	sy
 8011fc8:	f3bf 8f4f 	dsb	sy
 8011fcc:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 8011fce:	bf00      	nop
 8011fd0:	bf00      	nop
 8011fd2:	e7fd      	b.n	8011fd0 <xQueueGenericCreateStatic+0x28>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 8011fd4:	683b      	ldr	r3, [r7, #0]
 8011fd6:	2b00      	cmp	r3, #0
 8011fd8:	d10b      	bne.n	8011ff2 <xQueueGenericCreateStatic+0x4a>
	__asm volatile
 8011fda:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8011fde:	f383 8811 	msr	BASEPRI, r3
 8011fe2:	f3bf 8f6f 	isb	sy
 8011fe6:	f3bf 8f4f 	dsb	sy
 8011fea:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8011fec:	bf00      	nop
 8011fee:	bf00      	nop
 8011ff0:	e7fd      	b.n	8011fee <xQueueGenericCreateStatic+0x46>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 8011ff2:	687b      	ldr	r3, [r7, #4]
 8011ff4:	2b00      	cmp	r3, #0
 8011ff6:	d002      	beq.n	8011ffe <xQueueGenericCreateStatic+0x56>
 8011ff8:	68bb      	ldr	r3, [r7, #8]
 8011ffa:	2b00      	cmp	r3, #0
 8011ffc:	d001      	beq.n	8012002 <xQueueGenericCreateStatic+0x5a>
 8011ffe:	2301      	movs	r3, #1
 8012000:	e000      	b.n	8012004 <xQueueGenericCreateStatic+0x5c>
 8012002:	2300      	movs	r3, #0
 8012004:	2b00      	cmp	r3, #0
 8012006:	d10b      	bne.n	8012020 <xQueueGenericCreateStatic+0x78>
	__asm volatile
 8012008:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801200c:	f383 8811 	msr	BASEPRI, r3
 8012010:	f3bf 8f6f 	isb	sy
 8012014:	f3bf 8f4f 	dsb	sy
 8012018:	623b      	str	r3, [r7, #32]
}
 801201a:	bf00      	nop
 801201c:	bf00      	nop
 801201e:	e7fd      	b.n	801201c <xQueueGenericCreateStatic+0x74>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8012020:	687b      	ldr	r3, [r7, #4]
 8012022:	2b00      	cmp	r3, #0
 8012024:	d102      	bne.n	801202c <xQueueGenericCreateStatic+0x84>
 8012026:	68bb      	ldr	r3, [r7, #8]
 8012028:	2b00      	cmp	r3, #0
 801202a:	d101      	bne.n	8012030 <xQueueGenericCreateStatic+0x88>
 801202c:	2301      	movs	r3, #1
 801202e:	e000      	b.n	8012032 <xQueueGenericCreateStatic+0x8a>
 8012030:	2300      	movs	r3, #0
 8012032:	2b00      	cmp	r3, #0
 8012034:	d10b      	bne.n	801204e <xQueueGenericCreateStatic+0xa6>
	__asm volatile
 8012036:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801203a:	f383 8811 	msr	BASEPRI, r3
 801203e:	f3bf 8f6f 	isb	sy
 8012042:	f3bf 8f4f 	dsb	sy
 8012046:	61fb      	str	r3, [r7, #28]
}
 8012048:	bf00      	nop
 801204a:	bf00      	nop
 801204c:	e7fd      	b.n	801204a <xQueueGenericCreateStatic+0xa2>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 801204e:	2350      	movs	r3, #80	@ 0x50
 8012050:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( Queue_t ) );
 8012052:	697b      	ldr	r3, [r7, #20]
 8012054:	2b50      	cmp	r3, #80	@ 0x50
 8012056:	d00b      	beq.n	8012070 <xQueueGenericCreateStatic+0xc8>
	__asm volatile
 8012058:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801205c:	f383 8811 	msr	BASEPRI, r3
 8012060:	f3bf 8f6f 	isb	sy
 8012064:	f3bf 8f4f 	dsb	sy
 8012068:	61bb      	str	r3, [r7, #24]
}
 801206a:	bf00      	nop
 801206c:	bf00      	nop
 801206e:	e7fd      	b.n	801206c <xQueueGenericCreateStatic+0xc4>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8012070:	697b      	ldr	r3, [r7, #20]
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8012072:	683b      	ldr	r3, [r7, #0]
 8012074:	62fb      	str	r3, [r7, #44]	@ 0x2c

		if( pxNewQueue != NULL )
 8012076:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012078:	2b00      	cmp	r3, #0
 801207a:	d00d      	beq.n	8012098 <xQueueGenericCreateStatic+0xf0>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 801207c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801207e:	2201      	movs	r2, #1
 8012080:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8012084:	f897 2038 	ldrb.w	r2, [r7, #56]	@ 0x38
 8012088:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801208a:	9300      	str	r3, [sp, #0]
 801208c:	4613      	mov	r3, r2
 801208e:	687a      	ldr	r2, [r7, #4]
 8012090:	68b9      	ldr	r1, [r7, #8]
 8012092:	68f8      	ldr	r0, [r7, #12]
 8012094:	f000 f840 	bl	8012118 <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8012098:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
	}
 801209a:	4618      	mov	r0, r3
 801209c:	3730      	adds	r7, #48	@ 0x30
 801209e:	46bd      	mov	sp, r7
 80120a0:	bd80      	pop	{r7, pc}

080120a2 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
	{
 80120a2:	b580      	push	{r7, lr}
 80120a4:	b08a      	sub	sp, #40	@ 0x28
 80120a6:	af02      	add	r7, sp, #8
 80120a8:	60f8      	str	r0, [r7, #12]
 80120aa:	60b9      	str	r1, [r7, #8]
 80120ac:	4613      	mov	r3, r2
 80120ae:	71fb      	strb	r3, [r7, #7]
	Queue_t *pxNewQueue;
	size_t xQueueSizeInBytes;
	uint8_t *pucQueueStorage;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 80120b0:	68fb      	ldr	r3, [r7, #12]
 80120b2:	2b00      	cmp	r3, #0
 80120b4:	d10b      	bne.n	80120ce <xQueueGenericCreate+0x2c>
	__asm volatile
 80120b6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80120ba:	f383 8811 	msr	BASEPRI, r3
 80120be:	f3bf 8f6f 	isb	sy
 80120c2:	f3bf 8f4f 	dsb	sy
 80120c6:	613b      	str	r3, [r7, #16]
}
 80120c8:	bf00      	nop
 80120ca:	bf00      	nop
 80120cc:	e7fd      	b.n	80120ca <xQueueGenericCreate+0x28>

		/* Allocate enough space to hold the maximum number of items that
		can be in the queue at any time.  It is valid for uxItemSize to be
		zero in the case the queue is used as a semaphore. */
		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80120ce:	68fb      	ldr	r3, [r7, #12]
 80120d0:	68ba      	ldr	r2, [r7, #8]
 80120d2:	fb02 f303 	mul.w	r3, r2, r3
 80120d6:	61fb      	str	r3, [r7, #28]
		alignment requirements of the Queue_t structure - which in this case
		is an int8_t *.  Therefore, whenever the stack alignment requirements
		are greater than or equal to the pointer to char requirements the cast
		is safe.  In other cases alignment requirements are not strict (one or
		two bytes). */
		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 80120d8:	69fb      	ldr	r3, [r7, #28]
 80120da:	3350      	adds	r3, #80	@ 0x50
 80120dc:	4618      	mov	r0, r3
 80120de:	f003 fd0d 	bl	8015afc <pvPortMalloc>
 80120e2:	61b8      	str	r0, [r7, #24]

		if( pxNewQueue != NULL )
 80120e4:	69bb      	ldr	r3, [r7, #24]
 80120e6:	2b00      	cmp	r3, #0
 80120e8:	d011      	beq.n	801210e <xQueueGenericCreate+0x6c>
		{
			/* Jump past the queue structure to find the location of the queue
			storage area. */
			pucQueueStorage = ( uint8_t * ) pxNewQueue;
 80120ea:	69bb      	ldr	r3, [r7, #24]
 80120ec:	617b      	str	r3, [r7, #20]
			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 80120ee:	697b      	ldr	r3, [r7, #20]
 80120f0:	3350      	adds	r3, #80	@ 0x50
 80120f2:	617b      	str	r3, [r7, #20]
			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
			{
				/* Queues can be created either statically or dynamically, so
				note this task was created dynamically in case it is later
				deleted. */
				pxNewQueue->ucStaticallyAllocated = pdFALSE;
 80120f4:	69bb      	ldr	r3, [r7, #24]
 80120f6:	2200      	movs	r2, #0
 80120f8:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 80120fc:	79fa      	ldrb	r2, [r7, #7]
 80120fe:	69bb      	ldr	r3, [r7, #24]
 8012100:	9300      	str	r3, [sp, #0]
 8012102:	4613      	mov	r3, r2
 8012104:	697a      	ldr	r2, [r7, #20]
 8012106:	68b9      	ldr	r1, [r7, #8]
 8012108:	68f8      	ldr	r0, [r7, #12]
 801210a:	f000 f805 	bl	8012118 <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 801210e:	69bb      	ldr	r3, [r7, #24]
	}
 8012110:	4618      	mov	r0, r3
 8012112:	3720      	adds	r7, #32
 8012114:	46bd      	mov	sp, r7
 8012116:	bd80      	pop	{r7, pc}

08012118 <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 8012118:	b580      	push	{r7, lr}
 801211a:	b084      	sub	sp, #16
 801211c:	af00      	add	r7, sp, #0
 801211e:	60f8      	str	r0, [r7, #12]
 8012120:	60b9      	str	r1, [r7, #8]
 8012122:	607a      	str	r2, [r7, #4]
 8012124:	70fb      	strb	r3, [r7, #3]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 8012126:	68bb      	ldr	r3, [r7, #8]
 8012128:	2b00      	cmp	r3, #0
 801212a:	d103      	bne.n	8012134 <prvInitialiseNewQueue+0x1c>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 801212c:	69bb      	ldr	r3, [r7, #24]
 801212e:	69ba      	ldr	r2, [r7, #24]
 8012130:	601a      	str	r2, [r3, #0]
 8012132:	e002      	b.n	801213a <prvInitialiseNewQueue+0x22>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 8012134:	69bb      	ldr	r3, [r7, #24]
 8012136:	687a      	ldr	r2, [r7, #4]
 8012138:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 801213a:	69bb      	ldr	r3, [r7, #24]
 801213c:	68fa      	ldr	r2, [r7, #12]
 801213e:	63da      	str	r2, [r3, #60]	@ 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 8012140:	69bb      	ldr	r3, [r7, #24]
 8012142:	68ba      	ldr	r2, [r7, #8]
 8012144:	641a      	str	r2, [r3, #64]	@ 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 8012146:	2101      	movs	r1, #1
 8012148:	69b8      	ldr	r0, [r7, #24]
 801214a:	f7ff fec3 	bl	8011ed4 <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 801214e:	69bb      	ldr	r3, [r7, #24]
 8012150:	78fa      	ldrb	r2, [r7, #3]
 8012152:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 8012156:	bf00      	nop
 8012158:	3710      	adds	r7, #16
 801215a:	46bd      	mov	sp, r7
 801215c:	bd80      	pop	{r7, pc}

0801215e <prvInitialiseMutex>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static void prvInitialiseMutex( Queue_t *pxNewQueue )
	{
 801215e:	b580      	push	{r7, lr}
 8012160:	b082      	sub	sp, #8
 8012162:	af00      	add	r7, sp, #0
 8012164:	6078      	str	r0, [r7, #4]
		if( pxNewQueue != NULL )
 8012166:	687b      	ldr	r3, [r7, #4]
 8012168:	2b00      	cmp	r3, #0
 801216a:	d00e      	beq.n	801218a <prvInitialiseMutex+0x2c>
		{
			/* The queue create function will set all the queue structure members
			correctly for a generic queue, but this function is creating a
			mutex.  Overwrite those members that need to be set differently -
			in particular the information required for priority inheritance. */
			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 801216c:	687b      	ldr	r3, [r7, #4]
 801216e:	2200      	movs	r2, #0
 8012170:	609a      	str	r2, [r3, #8]
			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 8012172:	687b      	ldr	r3, [r7, #4]
 8012174:	2200      	movs	r2, #0
 8012176:	601a      	str	r2, [r3, #0]

			/* In case this is a recursive mutex. */
			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 8012178:	687b      	ldr	r3, [r7, #4]
 801217a:	2200      	movs	r2, #0
 801217c:	60da      	str	r2, [r3, #12]

			traceCREATE_MUTEX( pxNewQueue );

			/* Start with the semaphore in the expected state. */
			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 801217e:	2300      	movs	r3, #0
 8012180:	2200      	movs	r2, #0
 8012182:	2100      	movs	r1, #0
 8012184:	6878      	ldr	r0, [r7, #4]
 8012186:	f000 f911 	bl	80123ac <xQueueGenericSend>
		}
		else
		{
			traceCREATE_MUTEX_FAILED();
		}
	}
 801218a:	bf00      	nop
 801218c:	3708      	adds	r7, #8
 801218e:	46bd      	mov	sp, r7
 8012190:	bd80      	pop	{r7, pc}

08012192 <xQueueCreateMutex>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
	{
 8012192:	b580      	push	{r7, lr}
 8012194:	b086      	sub	sp, #24
 8012196:	af00      	add	r7, sp, #0
 8012198:	4603      	mov	r3, r0
 801219a:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 801219c:	2301      	movs	r3, #1
 801219e:	617b      	str	r3, [r7, #20]
 80121a0:	2300      	movs	r3, #0
 80121a2:	613b      	str	r3, [r7, #16]

		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 80121a4:	79fb      	ldrb	r3, [r7, #7]
 80121a6:	461a      	mov	r2, r3
 80121a8:	6939      	ldr	r1, [r7, #16]
 80121aa:	6978      	ldr	r0, [r7, #20]
 80121ac:	f7ff ff79 	bl	80120a2 <xQueueGenericCreate>
 80121b0:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 80121b2:	68f8      	ldr	r0, [r7, #12]
 80121b4:	f7ff ffd3 	bl	801215e <prvInitialiseMutex>

		return xNewQueue;
 80121b8:	68fb      	ldr	r3, [r7, #12]
	}
 80121ba:	4618      	mov	r0, r3
 80121bc:	3718      	adds	r7, #24
 80121be:	46bd      	mov	sp, r7
 80121c0:	bd80      	pop	{r7, pc}

080121c2 <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
	{
 80121c2:	b580      	push	{r7, lr}
 80121c4:	b088      	sub	sp, #32
 80121c6:	af02      	add	r7, sp, #8
 80121c8:	4603      	mov	r3, r0
 80121ca:	6039      	str	r1, [r7, #0]
 80121cc:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 80121ce:	2301      	movs	r3, #1
 80121d0:	617b      	str	r3, [r7, #20]
 80121d2:	2300      	movs	r3, #0
 80121d4:	613b      	str	r3, [r7, #16]

		/* Prevent compiler warnings about unused parameters if
		configUSE_TRACE_FACILITY does not equal 1. */
		( void ) ucQueueType;

		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 80121d6:	79fb      	ldrb	r3, [r7, #7]
 80121d8:	9300      	str	r3, [sp, #0]
 80121da:	683b      	ldr	r3, [r7, #0]
 80121dc:	2200      	movs	r2, #0
 80121de:	6939      	ldr	r1, [r7, #16]
 80121e0:	6978      	ldr	r0, [r7, #20]
 80121e2:	f7ff fee1 	bl	8011fa8 <xQueueGenericCreateStatic>
 80121e6:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 80121e8:	68f8      	ldr	r0, [r7, #12]
 80121ea:	f7ff ffb8 	bl	801215e <prvInitialiseMutex>

		return xNewQueue;
 80121ee:	68fb      	ldr	r3, [r7, #12]
	}
 80121f0:	4618      	mov	r0, r3
 80121f2:	3718      	adds	r7, #24
 80121f4:	46bd      	mov	sp, r7
 80121f6:	bd80      	pop	{r7, pc}

080121f8 <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
	{
 80121f8:	b590      	push	{r4, r7, lr}
 80121fa:	b087      	sub	sp, #28
 80121fc:	af00      	add	r7, sp, #0
 80121fe:	6078      	str	r0, [r7, #4]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8012200:	687b      	ldr	r3, [r7, #4]
 8012202:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8012204:	693b      	ldr	r3, [r7, #16]
 8012206:	2b00      	cmp	r3, #0
 8012208:	d10b      	bne.n	8012222 <xQueueGiveMutexRecursive+0x2a>
	__asm volatile
 801220a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801220e:	f383 8811 	msr	BASEPRI, r3
 8012212:	f3bf 8f6f 	isb	sy
 8012216:	f3bf 8f4f 	dsb	sy
 801221a:	60fb      	str	r3, [r7, #12]
}
 801221c:	bf00      	nop
 801221e:	bf00      	nop
 8012220:	e7fd      	b.n	801221e <xQueueGiveMutexRecursive+0x26>
		change outside of this task.  If this task does not hold the mutex then
		pxMutexHolder can never coincidentally equal the tasks handle, and as
		this is the only condition we are interested in it does not matter if
		pxMutexHolder is accessed simultaneously by another task.  Therefore no
		mutual exclusion is required to test the pxMutexHolder variable. */
		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8012222:	693b      	ldr	r3, [r7, #16]
 8012224:	689c      	ldr	r4, [r3, #8]
 8012226:	f002 f9af 	bl	8014588 <xTaskGetCurrentTaskHandle>
 801222a:	4603      	mov	r3, r0
 801222c:	429c      	cmp	r4, r3
 801222e:	d111      	bne.n	8012254 <xQueueGiveMutexRecursive+0x5c>
			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
			the task handle, therefore no underflow check is required.  Also,
			uxRecursiveCallCount is only modified by the mutex holder, and as
			there can only be one, no mutual exclusion is required to modify the
			uxRecursiveCallCount member. */
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 8012230:	693b      	ldr	r3, [r7, #16]
 8012232:	68db      	ldr	r3, [r3, #12]
 8012234:	1e5a      	subs	r2, r3, #1
 8012236:	693b      	ldr	r3, [r7, #16]
 8012238:	60da      	str	r2, [r3, #12]

			/* Has the recursive call count unwound to 0? */
			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 801223a:	693b      	ldr	r3, [r7, #16]
 801223c:	68db      	ldr	r3, [r3, #12]
 801223e:	2b00      	cmp	r3, #0
 8012240:	d105      	bne.n	801224e <xQueueGiveMutexRecursive+0x56>
			{
				/* Return the mutex.  This will automatically unblock any other
				task that might be waiting to access the mutex. */
				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 8012242:	2300      	movs	r3, #0
 8012244:	2200      	movs	r2, #0
 8012246:	2100      	movs	r1, #0
 8012248:	6938      	ldr	r0, [r7, #16]
 801224a:	f000 f8af 	bl	80123ac <xQueueGenericSend>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			xReturn = pdPASS;
 801224e:	2301      	movs	r3, #1
 8012250:	617b      	str	r3, [r7, #20]
 8012252:	e001      	b.n	8012258 <xQueueGiveMutexRecursive+0x60>
		}
		else
		{
			/* The mutex cannot be given because the calling task is not the
			holder. */
			xReturn = pdFAIL;
 8012254:	2300      	movs	r3, #0
 8012256:	617b      	str	r3, [r7, #20]

			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
		}

		return xReturn;
 8012258:	697b      	ldr	r3, [r7, #20]
	}
 801225a:	4618      	mov	r0, r3
 801225c:	371c      	adds	r7, #28
 801225e:	46bd      	mov	sp, r7
 8012260:	bd90      	pop	{r4, r7, pc}

08012262 <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
	{
 8012262:	b590      	push	{r4, r7, lr}
 8012264:	b087      	sub	sp, #28
 8012266:	af00      	add	r7, sp, #0
 8012268:	6078      	str	r0, [r7, #4]
 801226a:	6039      	str	r1, [r7, #0]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 801226c:	687b      	ldr	r3, [r7, #4]
 801226e:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8012270:	693b      	ldr	r3, [r7, #16]
 8012272:	2b00      	cmp	r3, #0
 8012274:	d10b      	bne.n	801228e <xQueueTakeMutexRecursive+0x2c>
	__asm volatile
 8012276:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801227a:	f383 8811 	msr	BASEPRI, r3
 801227e:	f3bf 8f6f 	isb	sy
 8012282:	f3bf 8f4f 	dsb	sy
 8012286:	60fb      	str	r3, [r7, #12]
}
 8012288:	bf00      	nop
 801228a:	bf00      	nop
 801228c:	e7fd      	b.n	801228a <xQueueTakeMutexRecursive+0x28>
		/* Comments regarding mutual exclusion as per those within
		xQueueGiveMutexRecursive(). */

		traceTAKE_MUTEX_RECURSIVE( pxMutex );

		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 801228e:	693b      	ldr	r3, [r7, #16]
 8012290:	689c      	ldr	r4, [r3, #8]
 8012292:	f002 f979 	bl	8014588 <xTaskGetCurrentTaskHandle>
 8012296:	4603      	mov	r3, r0
 8012298:	429c      	cmp	r4, r3
 801229a:	d107      	bne.n	80122ac <xQueueTakeMutexRecursive+0x4a>
		{
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 801229c:	693b      	ldr	r3, [r7, #16]
 801229e:	68db      	ldr	r3, [r3, #12]
 80122a0:	1c5a      	adds	r2, r3, #1
 80122a2:	693b      	ldr	r3, [r7, #16]
 80122a4:	60da      	str	r2, [r3, #12]
			xReturn = pdPASS;
 80122a6:	2301      	movs	r3, #1
 80122a8:	617b      	str	r3, [r7, #20]
 80122aa:	e00c      	b.n	80122c6 <xQueueTakeMutexRecursive+0x64>
		}
		else
		{
			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 80122ac:	6839      	ldr	r1, [r7, #0]
 80122ae:	6938      	ldr	r0, [r7, #16]
 80122b0:	f000 fb8e 	bl	80129d0 <xQueueSemaphoreTake>
 80122b4:	6178      	str	r0, [r7, #20]

			/* pdPASS will only be returned if the mutex was successfully
			obtained.  The calling task may have entered the Blocked state
			before reaching here. */
			if( xReturn != pdFAIL )
 80122b6:	697b      	ldr	r3, [r7, #20]
 80122b8:	2b00      	cmp	r3, #0
 80122ba:	d004      	beq.n	80122c6 <xQueueTakeMutexRecursive+0x64>
			{
				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 80122bc:	693b      	ldr	r3, [r7, #16]
 80122be:	68db      	ldr	r3, [r3, #12]
 80122c0:	1c5a      	adds	r2, r3, #1
 80122c2:	693b      	ldr	r3, [r7, #16]
 80122c4:	60da      	str	r2, [r3, #12]
			{
				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
			}
		}

		return xReturn;
 80122c6:	697b      	ldr	r3, [r7, #20]
	}
 80122c8:	4618      	mov	r0, r3
 80122ca:	371c      	adds	r7, #28
 80122cc:	46bd      	mov	sp, r7
 80122ce:	bd90      	pop	{r4, r7, pc}

080122d0 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
	{
 80122d0:	b580      	push	{r7, lr}
 80122d2:	b08a      	sub	sp, #40	@ 0x28
 80122d4:	af02      	add	r7, sp, #8
 80122d6:	60f8      	str	r0, [r7, #12]
 80122d8:	60b9      	str	r1, [r7, #8]
 80122da:	607a      	str	r2, [r7, #4]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 80122dc:	68fb      	ldr	r3, [r7, #12]
 80122de:	2b00      	cmp	r3, #0
 80122e0:	d10b      	bne.n	80122fa <xQueueCreateCountingSemaphoreStatic+0x2a>
	__asm volatile
 80122e2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80122e6:	f383 8811 	msr	BASEPRI, r3
 80122ea:	f3bf 8f6f 	isb	sy
 80122ee:	f3bf 8f4f 	dsb	sy
 80122f2:	61bb      	str	r3, [r7, #24]
}
 80122f4:	bf00      	nop
 80122f6:	bf00      	nop
 80122f8:	e7fd      	b.n	80122f6 <xQueueCreateCountingSemaphoreStatic+0x26>
		configASSERT( uxInitialCount <= uxMaxCount );
 80122fa:	68ba      	ldr	r2, [r7, #8]
 80122fc:	68fb      	ldr	r3, [r7, #12]
 80122fe:	429a      	cmp	r2, r3
 8012300:	d90b      	bls.n	801231a <xQueueCreateCountingSemaphoreStatic+0x4a>
	__asm volatile
 8012302:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012306:	f383 8811 	msr	BASEPRI, r3
 801230a:	f3bf 8f6f 	isb	sy
 801230e:	f3bf 8f4f 	dsb	sy
 8012312:	617b      	str	r3, [r7, #20]
}
 8012314:	bf00      	nop
 8012316:	bf00      	nop
 8012318:	e7fd      	b.n	8012316 <xQueueCreateCountingSemaphoreStatic+0x46>

		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801231a:	2302      	movs	r3, #2
 801231c:	9300      	str	r3, [sp, #0]
 801231e:	687b      	ldr	r3, [r7, #4]
 8012320:	2200      	movs	r2, #0
 8012322:	2100      	movs	r1, #0
 8012324:	68f8      	ldr	r0, [r7, #12]
 8012326:	f7ff fe3f 	bl	8011fa8 <xQueueGenericCreateStatic>
 801232a:	61f8      	str	r0, [r7, #28]

		if( xHandle != NULL )
 801232c:	69fb      	ldr	r3, [r7, #28]
 801232e:	2b00      	cmp	r3, #0
 8012330:	d002      	beq.n	8012338 <xQueueCreateCountingSemaphoreStatic+0x68>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 8012332:	69fb      	ldr	r3, [r7, #28]
 8012334:	68ba      	ldr	r2, [r7, #8]
 8012336:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 8012338:	69fb      	ldr	r3, [r7, #28]
	}
 801233a:	4618      	mov	r0, r3
 801233c:	3720      	adds	r7, #32
 801233e:	46bd      	mov	sp, r7
 8012340:	bd80      	pop	{r7, pc}

08012342 <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
	{
 8012342:	b580      	push	{r7, lr}
 8012344:	b086      	sub	sp, #24
 8012346:	af00      	add	r7, sp, #0
 8012348:	6078      	str	r0, [r7, #4]
 801234a:	6039      	str	r1, [r7, #0]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 801234c:	687b      	ldr	r3, [r7, #4]
 801234e:	2b00      	cmp	r3, #0
 8012350:	d10b      	bne.n	801236a <xQueueCreateCountingSemaphore+0x28>
	__asm volatile
 8012352:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012356:	f383 8811 	msr	BASEPRI, r3
 801235a:	f3bf 8f6f 	isb	sy
 801235e:	f3bf 8f4f 	dsb	sy
 8012362:	613b      	str	r3, [r7, #16]
}
 8012364:	bf00      	nop
 8012366:	bf00      	nop
 8012368:	e7fd      	b.n	8012366 <xQueueCreateCountingSemaphore+0x24>
		configASSERT( uxInitialCount <= uxMaxCount );
 801236a:	683a      	ldr	r2, [r7, #0]
 801236c:	687b      	ldr	r3, [r7, #4]
 801236e:	429a      	cmp	r2, r3
 8012370:	d90b      	bls.n	801238a <xQueueCreateCountingSemaphore+0x48>
	__asm volatile
 8012372:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012376:	f383 8811 	msr	BASEPRI, r3
 801237a:	f3bf 8f6f 	isb	sy
 801237e:	f3bf 8f4f 	dsb	sy
 8012382:	60fb      	str	r3, [r7, #12]
}
 8012384:	bf00      	nop
 8012386:	bf00      	nop
 8012388:	e7fd      	b.n	8012386 <xQueueCreateCountingSemaphore+0x44>

		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801238a:	2202      	movs	r2, #2
 801238c:	2100      	movs	r1, #0
 801238e:	6878      	ldr	r0, [r7, #4]
 8012390:	f7ff fe87 	bl	80120a2 <xQueueGenericCreate>
 8012394:	6178      	str	r0, [r7, #20]

		if( xHandle != NULL )
 8012396:	697b      	ldr	r3, [r7, #20]
 8012398:	2b00      	cmp	r3, #0
 801239a:	d002      	beq.n	80123a2 <xQueueCreateCountingSemaphore+0x60>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 801239c:	697b      	ldr	r3, [r7, #20]
 801239e:	683a      	ldr	r2, [r7, #0]
 80123a0:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 80123a2:	697b      	ldr	r3, [r7, #20]
	}
 80123a4:	4618      	mov	r0, r3
 80123a6:	3718      	adds	r7, #24
 80123a8:	46bd      	mov	sp, r7
 80123aa:	bd80      	pop	{r7, pc}

080123ac <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 80123ac:	b580      	push	{r7, lr}
 80123ae:	b08e      	sub	sp, #56	@ 0x38
 80123b0:	af00      	add	r7, sp, #0
 80123b2:	60f8      	str	r0, [r7, #12]
 80123b4:	60b9      	str	r1, [r7, #8]
 80123b6:	607a      	str	r2, [r7, #4]
 80123b8:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 80123ba:	2300      	movs	r3, #0
 80123bc:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 80123be:	68fb      	ldr	r3, [r7, #12]
 80123c0:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 80123c2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80123c4:	2b00      	cmp	r3, #0
 80123c6:	d10b      	bne.n	80123e0 <xQueueGenericSend+0x34>
	__asm volatile
 80123c8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80123cc:	f383 8811 	msr	BASEPRI, r3
 80123d0:	f3bf 8f6f 	isb	sy
 80123d4:	f3bf 8f4f 	dsb	sy
 80123d8:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 80123da:	bf00      	nop
 80123dc:	bf00      	nop
 80123de:	e7fd      	b.n	80123dc <xQueueGenericSend+0x30>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80123e0:	68bb      	ldr	r3, [r7, #8]
 80123e2:	2b00      	cmp	r3, #0
 80123e4:	d103      	bne.n	80123ee <xQueueGenericSend+0x42>
 80123e6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80123e8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80123ea:	2b00      	cmp	r3, #0
 80123ec:	d101      	bne.n	80123f2 <xQueueGenericSend+0x46>
 80123ee:	2301      	movs	r3, #1
 80123f0:	e000      	b.n	80123f4 <xQueueGenericSend+0x48>
 80123f2:	2300      	movs	r3, #0
 80123f4:	2b00      	cmp	r3, #0
 80123f6:	d10b      	bne.n	8012410 <xQueueGenericSend+0x64>
	__asm volatile
 80123f8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80123fc:	f383 8811 	msr	BASEPRI, r3
 8012400:	f3bf 8f6f 	isb	sy
 8012404:	f3bf 8f4f 	dsb	sy
 8012408:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801240a:	bf00      	nop
 801240c:	bf00      	nop
 801240e:	e7fd      	b.n	801240c <xQueueGenericSend+0x60>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8012410:	683b      	ldr	r3, [r7, #0]
 8012412:	2b02      	cmp	r3, #2
 8012414:	d103      	bne.n	801241e <xQueueGenericSend+0x72>
 8012416:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012418:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801241a:	2b01      	cmp	r3, #1
 801241c:	d101      	bne.n	8012422 <xQueueGenericSend+0x76>
 801241e:	2301      	movs	r3, #1
 8012420:	e000      	b.n	8012424 <xQueueGenericSend+0x78>
 8012422:	2300      	movs	r3, #0
 8012424:	2b00      	cmp	r3, #0
 8012426:	d10b      	bne.n	8012440 <xQueueGenericSend+0x94>
	__asm volatile
 8012428:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801242c:	f383 8811 	msr	BASEPRI, r3
 8012430:	f3bf 8f6f 	isb	sy
 8012434:	f3bf 8f4f 	dsb	sy
 8012438:	623b      	str	r3, [r7, #32]
}
 801243a:	bf00      	nop
 801243c:	bf00      	nop
 801243e:	e7fd      	b.n	801243c <xQueueGenericSend+0x90>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012440:	f002 f8b2 	bl	80145a8 <xTaskGetSchedulerState>
 8012444:	4603      	mov	r3, r0
 8012446:	2b00      	cmp	r3, #0
 8012448:	d102      	bne.n	8012450 <xQueueGenericSend+0xa4>
 801244a:	687b      	ldr	r3, [r7, #4]
 801244c:	2b00      	cmp	r3, #0
 801244e:	d101      	bne.n	8012454 <xQueueGenericSend+0xa8>
 8012450:	2301      	movs	r3, #1
 8012452:	e000      	b.n	8012456 <xQueueGenericSend+0xaa>
 8012454:	2300      	movs	r3, #0
 8012456:	2b00      	cmp	r3, #0
 8012458:	d10b      	bne.n	8012472 <xQueueGenericSend+0xc6>
	__asm volatile
 801245a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801245e:	f383 8811 	msr	BASEPRI, r3
 8012462:	f3bf 8f6f 	isb	sy
 8012466:	f3bf 8f4f 	dsb	sy
 801246a:	61fb      	str	r3, [r7, #28]
}
 801246c:	bf00      	nop
 801246e:	bf00      	nop
 8012470:	e7fd      	b.n	801246e <xQueueGenericSend+0xc2>
	/*lint -save -e904 This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012472:	f003 fa21 	bl	80158b8 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8012476:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012478:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801247a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801247c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801247e:	429a      	cmp	r2, r3
 8012480:	d302      	bcc.n	8012488 <xQueueGenericSend+0xdc>
 8012482:	683b      	ldr	r3, [r7, #0]
 8012484:	2b02      	cmp	r3, #2
 8012486:	d129      	bne.n	80124dc <xQueueGenericSend+0x130>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8012488:	683a      	ldr	r2, [r7, #0]
 801248a:	68b9      	ldr	r1, [r7, #8]
 801248c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801248e:	f000 fcab 	bl	8012de8 <prvCopyDataToQueue>
 8012492:	62f8      	str	r0, [r7, #44]	@ 0x2c

					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012494:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012496:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8012498:	2b00      	cmp	r3, #0
 801249a:	d010      	beq.n	80124be <xQueueGenericSend+0x112>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 801249c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801249e:	3324      	adds	r3, #36	@ 0x24
 80124a0:	4618      	mov	r0, r3
 80124a2:	f001 fe83 	bl	80141ac <xTaskRemoveFromEventList>
 80124a6:	4603      	mov	r3, r0
 80124a8:	2b00      	cmp	r3, #0
 80124aa:	d013      	beq.n	80124d4 <xQueueGenericSend+0x128>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 80124ac:	4b3f      	ldr	r3, [pc, #252]	@ (80125ac <xQueueGenericSend+0x200>)
 80124ae:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80124b2:	601a      	str	r2, [r3, #0]
 80124b4:	f3bf 8f4f 	dsb	sy
 80124b8:	f3bf 8f6f 	isb	sy
 80124bc:	e00a      	b.n	80124d4 <xQueueGenericSend+0x128>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 80124be:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80124c0:	2b00      	cmp	r3, #0
 80124c2:	d007      	beq.n	80124d4 <xQueueGenericSend+0x128>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 80124c4:	4b39      	ldr	r3, [pc, #228]	@ (80125ac <xQueueGenericSend+0x200>)
 80124c6:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80124ca:	601a      	str	r2, [r3, #0]
 80124cc:	f3bf 8f4f 	dsb	sy
 80124d0:	f3bf 8f6f 	isb	sy
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 80124d4:	f003 fa22 	bl	801591c <vPortExitCritical>
				return pdPASS;
 80124d8:	2301      	movs	r3, #1
 80124da:	e063      	b.n	80125a4 <xQueueGenericSend+0x1f8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 80124dc:	687b      	ldr	r3, [r7, #4]
 80124de:	2b00      	cmp	r3, #0
 80124e0:	d103      	bne.n	80124ea <xQueueGenericSend+0x13e>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 80124e2:	f003 fa1b 	bl	801591c <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 80124e6:	2300      	movs	r3, #0
 80124e8:	e05c      	b.n	80125a4 <xQueueGenericSend+0x1f8>
				}
				else if( xEntryTimeSet == pdFALSE )
 80124ea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80124ec:	2b00      	cmp	r3, #0
 80124ee:	d106      	bne.n	80124fe <xQueueGenericSend+0x152>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 80124f0:	f107 0314 	add.w	r3, r7, #20
 80124f4:	4618      	mov	r0, r3
 80124f6:	f001 fee5 	bl	80142c4 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 80124fa:	2301      	movs	r3, #1
 80124fc:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 80124fe:	f003 fa0d 	bl	801591c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012502:	f001 fc05 	bl	8013d10 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8012506:	f003 f9d7 	bl	80158b8 <vPortEnterCritical>
 801250a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801250c:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012510:	b25b      	sxtb	r3, r3
 8012512:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012516:	d103      	bne.n	8012520 <xQueueGenericSend+0x174>
 8012518:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801251a:	2200      	movs	r2, #0
 801251c:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012520:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012522:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012526:	b25b      	sxtb	r3, r3
 8012528:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801252c:	d103      	bne.n	8012536 <xQueueGenericSend+0x18a>
 801252e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012530:	2200      	movs	r2, #0
 8012532:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012536:	f003 f9f1 	bl	801591c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 801253a:	1d3a      	adds	r2, r7, #4
 801253c:	f107 0314 	add.w	r3, r7, #20
 8012540:	4611      	mov	r1, r2
 8012542:	4618      	mov	r0, r3
 8012544:	f001 fed4 	bl	80142f0 <xTaskCheckForTimeOut>
 8012548:	4603      	mov	r3, r0
 801254a:	2b00      	cmp	r3, #0
 801254c:	d124      	bne.n	8012598 <xQueueGenericSend+0x1ec>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 801254e:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012550:	f000 fd42 	bl	8012fd8 <prvIsQueueFull>
 8012554:	4603      	mov	r3, r0
 8012556:	2b00      	cmp	r3, #0
 8012558:	d018      	beq.n	801258c <xQueueGenericSend+0x1e0>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 801255a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801255c:	3310      	adds	r3, #16
 801255e:	687a      	ldr	r2, [r7, #4]
 8012560:	4611      	mov	r1, r2
 8012562:	4618      	mov	r0, r3
 8012564:	f001 fdd0 	bl	8014108 <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 8012568:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801256a:	f000 fccd 	bl	8012f08 <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 801256e:	f001 fbdd 	bl	8013d2c <xTaskResumeAll>
 8012572:	4603      	mov	r3, r0
 8012574:	2b00      	cmp	r3, #0
 8012576:	f47f af7c 	bne.w	8012472 <xQueueGenericSend+0xc6>
				{
					portYIELD_WITHIN_API();
 801257a:	4b0c      	ldr	r3, [pc, #48]	@ (80125ac <xQueueGenericSend+0x200>)
 801257c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012580:	601a      	str	r2, [r3, #0]
 8012582:	f3bf 8f4f 	dsb	sy
 8012586:	f3bf 8f6f 	isb	sy
 801258a:	e772      	b.n	8012472 <xQueueGenericSend+0xc6>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 801258c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801258e:	f000 fcbb 	bl	8012f08 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012592:	f001 fbcb 	bl	8013d2c <xTaskResumeAll>
 8012596:	e76c      	b.n	8012472 <xQueueGenericSend+0xc6>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 8012598:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801259a:	f000 fcb5 	bl	8012f08 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 801259e:	f001 fbc5 	bl	8013d2c <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 80125a2:	2300      	movs	r3, #0
		}
	} /*lint -restore */
}
 80125a4:	4618      	mov	r0, r3
 80125a6:	3738      	adds	r7, #56	@ 0x38
 80125a8:	46bd      	mov	sp, r7
 80125aa:	bd80      	pop	{r7, pc}
 80125ac:	e000ed04 	.word	0xe000ed04

080125b0 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 80125b0:	b580      	push	{r7, lr}
 80125b2:	b090      	sub	sp, #64	@ 0x40
 80125b4:	af00      	add	r7, sp, #0
 80125b6:	60f8      	str	r0, [r7, #12]
 80125b8:	60b9      	str	r1, [r7, #8]
 80125ba:	607a      	str	r2, [r7, #4]
 80125bc:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80125be:	68fb      	ldr	r3, [r7, #12]
 80125c0:	63bb      	str	r3, [r7, #56]	@ 0x38

	configASSERT( pxQueue );
 80125c2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80125c4:	2b00      	cmp	r3, #0
 80125c6:	d10b      	bne.n	80125e0 <xQueueGenericSendFromISR+0x30>
	__asm volatile
 80125c8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125cc:	f383 8811 	msr	BASEPRI, r3
 80125d0:	f3bf 8f6f 	isb	sy
 80125d4:	f3bf 8f4f 	dsb	sy
 80125d8:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 80125da:	bf00      	nop
 80125dc:	bf00      	nop
 80125de:	e7fd      	b.n	80125dc <xQueueGenericSendFromISR+0x2c>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80125e0:	68bb      	ldr	r3, [r7, #8]
 80125e2:	2b00      	cmp	r3, #0
 80125e4:	d103      	bne.n	80125ee <xQueueGenericSendFromISR+0x3e>
 80125e6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80125e8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80125ea:	2b00      	cmp	r3, #0
 80125ec:	d101      	bne.n	80125f2 <xQueueGenericSendFromISR+0x42>
 80125ee:	2301      	movs	r3, #1
 80125f0:	e000      	b.n	80125f4 <xQueueGenericSendFromISR+0x44>
 80125f2:	2300      	movs	r3, #0
 80125f4:	2b00      	cmp	r3, #0
 80125f6:	d10b      	bne.n	8012610 <xQueueGenericSendFromISR+0x60>
	__asm volatile
 80125f8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125fc:	f383 8811 	msr	BASEPRI, r3
 8012600:	f3bf 8f6f 	isb	sy
 8012604:	f3bf 8f4f 	dsb	sy
 8012608:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801260a:	bf00      	nop
 801260c:	bf00      	nop
 801260e:	e7fd      	b.n	801260c <xQueueGenericSendFromISR+0x5c>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8012610:	683b      	ldr	r3, [r7, #0]
 8012612:	2b02      	cmp	r3, #2
 8012614:	d103      	bne.n	801261e <xQueueGenericSendFromISR+0x6e>
 8012616:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012618:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801261a:	2b01      	cmp	r3, #1
 801261c:	d101      	bne.n	8012622 <xQueueGenericSendFromISR+0x72>
 801261e:	2301      	movs	r3, #1
 8012620:	e000      	b.n	8012624 <xQueueGenericSendFromISR+0x74>
 8012622:	2300      	movs	r3, #0
 8012624:	2b00      	cmp	r3, #0
 8012626:	d10b      	bne.n	8012640 <xQueueGenericSendFromISR+0x90>
	__asm volatile
 8012628:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801262c:	f383 8811 	msr	BASEPRI, r3
 8012630:	f3bf 8f6f 	isb	sy
 8012634:	f3bf 8f4f 	dsb	sy
 8012638:	623b      	str	r3, [r7, #32]
}
 801263a:	bf00      	nop
 801263c:	bf00      	nop
 801263e:	e7fd      	b.n	801263c <xQueueGenericSendFromISR+0x8c>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012640:	f003 fa1a 	bl	8015a78 <vPortValidateInterruptPriority>

portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;

	__asm volatile
 8012644:	f3ef 8211 	mrs	r2, BASEPRI
 8012648:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801264c:	f383 8811 	msr	BASEPRI, r3
 8012650:	f3bf 8f6f 	isb	sy
 8012654:	f3bf 8f4f 	dsb	sy
 8012658:	61fa      	str	r2, [r7, #28]
 801265a:	61bb      	str	r3, [r7, #24]
		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);

	/* This return will not be reached but is necessary to prevent compiler
	warnings. */
	return ulOriginalBASEPRI;
 801265c:	69fb      	ldr	r3, [r7, #28]
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 801265e:	637b      	str	r3, [r7, #52]	@ 0x34
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8012660:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012662:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012664:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012666:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012668:	429a      	cmp	r2, r3
 801266a:	d302      	bcc.n	8012672 <xQueueGenericSendFromISR+0xc2>
 801266c:	683b      	ldr	r3, [r7, #0]
 801266e:	2b02      	cmp	r3, #2
 8012670:	d12f      	bne.n	80126d2 <xQueueGenericSendFromISR+0x122>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8012672:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012674:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012678:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 801267c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801267e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012680:	62fb      	str	r3, [r7, #44]	@ 0x2c
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8012682:	683a      	ldr	r2, [r7, #0]
 8012684:	68b9      	ldr	r1, [r7, #8]
 8012686:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 8012688:	f000 fbae 	bl	8012de8 <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 801268c:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
 8012690:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012694:	d112      	bne.n	80126bc <xQueueGenericSendFromISR+0x10c>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012696:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012698:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801269a:	2b00      	cmp	r3, #0
 801269c:	d016      	beq.n	80126cc <xQueueGenericSendFromISR+0x11c>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 801269e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80126a0:	3324      	adds	r3, #36	@ 0x24
 80126a2:	4618      	mov	r0, r3
 80126a4:	f001 fd82 	bl	80141ac <xTaskRemoveFromEventList>
 80126a8:	4603      	mov	r3, r0
 80126aa:	2b00      	cmp	r3, #0
 80126ac:	d00e      	beq.n	80126cc <xQueueGenericSendFromISR+0x11c>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 80126ae:	687b      	ldr	r3, [r7, #4]
 80126b0:	2b00      	cmp	r3, #0
 80126b2:	d00b      	beq.n	80126cc <xQueueGenericSendFromISR+0x11c>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 80126b4:	687b      	ldr	r3, [r7, #4]
 80126b6:	2201      	movs	r2, #1
 80126b8:	601a      	str	r2, [r3, #0]
 80126ba:	e007      	b.n	80126cc <xQueueGenericSendFromISR+0x11c>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 80126bc:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
 80126c0:	3301      	adds	r3, #1
 80126c2:	b2db      	uxtb	r3, r3
 80126c4:	b25a      	sxtb	r2, r3
 80126c6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80126c8:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 80126cc:	2301      	movs	r3, #1
 80126ce:	63fb      	str	r3, [r7, #60]	@ 0x3c
		{
 80126d0:	e001      	b.n	80126d6 <xQueueGenericSendFromISR+0x126>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 80126d2:	2300      	movs	r3, #0
 80126d4:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80126d6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80126d8:	617b      	str	r3, [r7, #20]
}
/*-----------------------------------------------------------*/

portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
	__asm volatile
 80126da:	697b      	ldr	r3, [r7, #20]
 80126dc:	f383 8811 	msr	BASEPRI, r3
	(
		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
	);
}
 80126e0:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 80126e2:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 80126e4:	4618      	mov	r0, r3
 80126e6:	3740      	adds	r7, #64	@ 0x40
 80126e8:	46bd      	mov	sp, r7
 80126ea:	bd80      	pop	{r7, pc}

080126ec <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
 80126ec:	b580      	push	{r7, lr}
 80126ee:	b08e      	sub	sp, #56	@ 0x38
 80126f0:	af00      	add	r7, sp, #0
 80126f2:	6078      	str	r0, [r7, #4]
 80126f4:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80126f6:	687b      	ldr	r3, [r7, #4]
 80126f8:	633b      	str	r3, [r7, #48]	@ 0x30
	item size is 0.  Don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */

	configASSERT( pxQueue );
 80126fa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126fc:	2b00      	cmp	r3, #0
 80126fe:	d10b      	bne.n	8012718 <xQueueGiveFromISR+0x2c>
	__asm volatile
 8012700:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012704:	f383 8811 	msr	BASEPRI, r3
 8012708:	f3bf 8f6f 	isb	sy
 801270c:	f3bf 8f4f 	dsb	sy
 8012710:	623b      	str	r3, [r7, #32]
}
 8012712:	bf00      	nop
 8012714:	bf00      	nop
 8012716:	e7fd      	b.n	8012714 <xQueueGiveFromISR+0x28>

	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
	if the item size is not 0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8012718:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801271a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 801271c:	2b00      	cmp	r3, #0
 801271e:	d00b      	beq.n	8012738 <xQueueGiveFromISR+0x4c>
	__asm volatile
 8012720:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012724:	f383 8811 	msr	BASEPRI, r3
 8012728:	f3bf 8f6f 	isb	sy
 801272c:	f3bf 8f4f 	dsb	sy
 8012730:	61fb      	str	r3, [r7, #28]
}
 8012732:	bf00      	nop
 8012734:	bf00      	nop
 8012736:	e7fd      	b.n	8012734 <xQueueGiveFromISR+0x48>

	/* Normally a mutex would not be given from an interrupt, especially if
	there is a mutex holder, as priority inheritance makes no sense for an
	interrupts, only tasks. */
	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 8012738:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801273a:	681b      	ldr	r3, [r3, #0]
 801273c:	2b00      	cmp	r3, #0
 801273e:	d103      	bne.n	8012748 <xQueueGiveFromISR+0x5c>
 8012740:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012742:	689b      	ldr	r3, [r3, #8]
 8012744:	2b00      	cmp	r3, #0
 8012746:	d101      	bne.n	801274c <xQueueGiveFromISR+0x60>
 8012748:	2301      	movs	r3, #1
 801274a:	e000      	b.n	801274e <xQueueGiveFromISR+0x62>
 801274c:	2300      	movs	r3, #0
 801274e:	2b00      	cmp	r3, #0
 8012750:	d10b      	bne.n	801276a <xQueueGiveFromISR+0x7e>
	__asm volatile
 8012752:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012756:	f383 8811 	msr	BASEPRI, r3
 801275a:	f3bf 8f6f 	isb	sy
 801275e:	f3bf 8f4f 	dsb	sy
 8012762:	61bb      	str	r3, [r7, #24]
}
 8012764:	bf00      	nop
 8012766:	bf00      	nop
 8012768:	e7fd      	b.n	8012766 <xQueueGiveFromISR+0x7a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 801276a:	f003 f985 	bl	8015a78 <vPortValidateInterruptPriority>
	__asm volatile
 801276e:	f3ef 8211 	mrs	r2, BASEPRI
 8012772:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012776:	f383 8811 	msr	BASEPRI, r3
 801277a:	f3bf 8f6f 	isb	sy
 801277e:	f3bf 8f4f 	dsb	sy
 8012782:	617a      	str	r2, [r7, #20]
 8012784:	613b      	str	r3, [r7, #16]
	return ulOriginalBASEPRI;
 8012786:	697b      	ldr	r3, [r7, #20]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012788:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 801278a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801278c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 801278e:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* When the queue is used to implement a semaphore no data is ever
		moved through the queue but it is still valid to see if the queue 'has
		space'. */
		if( uxMessagesWaiting < pxQueue->uxLength )
 8012790:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012792:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012794:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012796:	429a      	cmp	r2, r3
 8012798:	d22b      	bcs.n	80127f2 <xQueueGiveFromISR+0x106>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 801279a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801279c:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80127a0:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			holder - and if there is a mutex holder then the mutex cannot be
			given from an ISR.  As this is the ISR version of the function it
			can be assumed there is no mutex holder and no need to determine if
			priority disinheritance is needed.  Simply increase the count of
			messages (semaphores) available. */
			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 80127a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80127a6:	1c5a      	adds	r2, r3, #1
 80127a8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127aa:	639a      	str	r2, [r3, #56]	@ 0x38

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 80127ac:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80127b0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80127b4:	d112      	bne.n	80127dc <xQueueGiveFromISR+0xf0>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 80127b6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127b8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80127ba:	2b00      	cmp	r3, #0
 80127bc:	d016      	beq.n	80127ec <xQueueGiveFromISR+0x100>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 80127be:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127c0:	3324      	adds	r3, #36	@ 0x24
 80127c2:	4618      	mov	r0, r3
 80127c4:	f001 fcf2 	bl	80141ac <xTaskRemoveFromEventList>
 80127c8:	4603      	mov	r3, r0
 80127ca:	2b00      	cmp	r3, #0
 80127cc:	d00e      	beq.n	80127ec <xQueueGiveFromISR+0x100>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 80127ce:	683b      	ldr	r3, [r7, #0]
 80127d0:	2b00      	cmp	r3, #0
 80127d2:	d00b      	beq.n	80127ec <xQueueGiveFromISR+0x100>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 80127d4:	683b      	ldr	r3, [r7, #0]
 80127d6:	2201      	movs	r2, #1
 80127d8:	601a      	str	r2, [r3, #0]
 80127da:	e007      	b.n	80127ec <xQueueGiveFromISR+0x100>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 80127dc:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80127e0:	3301      	adds	r3, #1
 80127e2:	b2db      	uxtb	r3, r3
 80127e4:	b25a      	sxtb	r2, r3
 80127e6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127e8:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 80127ec:	2301      	movs	r3, #1
 80127ee:	637b      	str	r3, [r7, #52]	@ 0x34
 80127f0:	e001      	b.n	80127f6 <xQueueGiveFromISR+0x10a>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 80127f2:	2300      	movs	r3, #0
 80127f4:	637b      	str	r3, [r7, #52]	@ 0x34
 80127f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127f8:	60fb      	str	r3, [r7, #12]
	__asm volatile
 80127fa:	68fb      	ldr	r3, [r7, #12]
 80127fc:	f383 8811 	msr	BASEPRI, r3
}
 8012800:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012802:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8012804:	4618      	mov	r0, r3
 8012806:	3738      	adds	r7, #56	@ 0x38
 8012808:	46bd      	mov	sp, r7
 801280a:	bd80      	pop	{r7, pc}

0801280c <xQueueReceive>:
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 801280c:	b580      	push	{r7, lr}
 801280e:	b08c      	sub	sp, #48	@ 0x30
 8012810:	af00      	add	r7, sp, #0
 8012812:	60f8      	str	r0, [r7, #12]
 8012814:	60b9      	str	r1, [r7, #8]
 8012816:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 8012818:	2300      	movs	r3, #0
 801281a:	62fb      	str	r3, [r7, #44]	@ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 801281c:	68fb      	ldr	r3, [r7, #12]
 801281e:	62bb      	str	r3, [r7, #40]	@ 0x28

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8012820:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012822:	2b00      	cmp	r3, #0
 8012824:	d10b      	bne.n	801283e <xQueueReceive+0x32>
	__asm volatile
 8012826:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801282a:	f383 8811 	msr	BASEPRI, r3
 801282e:	f3bf 8f6f 	isb	sy
 8012832:	f3bf 8f4f 	dsb	sy
 8012836:	623b      	str	r3, [r7, #32]
}
 8012838:	bf00      	nop
 801283a:	bf00      	nop
 801283c:	e7fd      	b.n	801283a <xQueueReceive+0x2e>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 801283e:	68bb      	ldr	r3, [r7, #8]
 8012840:	2b00      	cmp	r3, #0
 8012842:	d103      	bne.n	801284c <xQueueReceive+0x40>
 8012844:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012846:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012848:	2b00      	cmp	r3, #0
 801284a:	d101      	bne.n	8012850 <xQueueReceive+0x44>
 801284c:	2301      	movs	r3, #1
 801284e:	e000      	b.n	8012852 <xQueueReceive+0x46>
 8012850:	2300      	movs	r3, #0
 8012852:	2b00      	cmp	r3, #0
 8012854:	d10b      	bne.n	801286e <xQueueReceive+0x62>
	__asm volatile
 8012856:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801285a:	f383 8811 	msr	BASEPRI, r3
 801285e:	f3bf 8f6f 	isb	sy
 8012862:	f3bf 8f4f 	dsb	sy
 8012866:	61fb      	str	r3, [r7, #28]
}
 8012868:	bf00      	nop
 801286a:	bf00      	nop
 801286c:	e7fd      	b.n	801286a <xQueueReceive+0x5e>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 801286e:	f001 fe9b 	bl	80145a8 <xTaskGetSchedulerState>
 8012872:	4603      	mov	r3, r0
 8012874:	2b00      	cmp	r3, #0
 8012876:	d102      	bne.n	801287e <xQueueReceive+0x72>
 8012878:	687b      	ldr	r3, [r7, #4]
 801287a:	2b00      	cmp	r3, #0
 801287c:	d101      	bne.n	8012882 <xQueueReceive+0x76>
 801287e:	2301      	movs	r3, #1
 8012880:	e000      	b.n	8012884 <xQueueReceive+0x78>
 8012882:	2300      	movs	r3, #0
 8012884:	2b00      	cmp	r3, #0
 8012886:	d10b      	bne.n	80128a0 <xQueueReceive+0x94>
	__asm volatile
 8012888:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801288c:	f383 8811 	msr	BASEPRI, r3
 8012890:	f3bf 8f6f 	isb	sy
 8012894:	f3bf 8f4f 	dsb	sy
 8012898:	61bb      	str	r3, [r7, #24]
}
 801289a:	bf00      	nop
 801289c:	bf00      	nop
 801289e:	e7fd      	b.n	801289c <xQueueReceive+0x90>
	/*lint -save -e904  This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 80128a0:	f003 f80a 	bl	80158b8 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80128a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80128a6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80128a8:	627b      	str	r3, [r7, #36]	@ 0x24

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 80128aa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80128ac:	2b00      	cmp	r3, #0
 80128ae:	d01f      	beq.n	80128f0 <xQueueReceive+0xe4>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 80128b0:	68b9      	ldr	r1, [r7, #8]
 80128b2:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80128b4:	f000 fb02 	bl	8012ebc <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 80128b8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80128ba:	1e5a      	subs	r2, r3, #1
 80128bc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80128be:	639a      	str	r2, [r3, #56]	@ 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 80128c0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80128c2:	691b      	ldr	r3, [r3, #16]
 80128c4:	2b00      	cmp	r3, #0
 80128c6:	d00f      	beq.n	80128e8 <xQueueReceive+0xdc>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 80128c8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80128ca:	3310      	adds	r3, #16
 80128cc:	4618      	mov	r0, r3
 80128ce:	f001 fc6d 	bl	80141ac <xTaskRemoveFromEventList>
 80128d2:	4603      	mov	r3, r0
 80128d4:	2b00      	cmp	r3, #0
 80128d6:	d007      	beq.n	80128e8 <xQueueReceive+0xdc>
					{
						queueYIELD_IF_USING_PREEMPTION();
 80128d8:	4b3c      	ldr	r3, [pc, #240]	@ (80129cc <xQueueReceive+0x1c0>)
 80128da:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80128de:	601a      	str	r2, [r3, #0]
 80128e0:	f3bf 8f4f 	dsb	sy
 80128e4:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 80128e8:	f003 f818 	bl	801591c <vPortExitCritical>
				return pdPASS;
 80128ec:	2301      	movs	r3, #1
 80128ee:	e069      	b.n	80129c4 <xQueueReceive+0x1b8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 80128f0:	687b      	ldr	r3, [r7, #4]
 80128f2:	2b00      	cmp	r3, #0
 80128f4:	d103      	bne.n	80128fe <xQueueReceive+0xf2>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 80128f6:	f003 f811 	bl	801591c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 80128fa:	2300      	movs	r3, #0
 80128fc:	e062      	b.n	80129c4 <xQueueReceive+0x1b8>
				}
				else if( xEntryTimeSet == pdFALSE )
 80128fe:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012900:	2b00      	cmp	r3, #0
 8012902:	d106      	bne.n	8012912 <xQueueReceive+0x106>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8012904:	f107 0310 	add.w	r3, r7, #16
 8012908:	4618      	mov	r0, r3
 801290a:	f001 fcdb 	bl	80142c4 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 801290e:	2301      	movs	r3, #1
 8012910:	62fb      	str	r3, [r7, #44]	@ 0x2c
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8012912:	f003 f803 	bl	801591c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012916:	f001 f9fb 	bl	8013d10 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 801291a:	f002 ffcd 	bl	80158b8 <vPortEnterCritical>
 801291e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012920:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012924:	b25b      	sxtb	r3, r3
 8012926:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801292a:	d103      	bne.n	8012934 <xQueueReceive+0x128>
 801292c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801292e:	2200      	movs	r2, #0
 8012930:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012934:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012936:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801293a:	b25b      	sxtb	r3, r3
 801293c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012940:	d103      	bne.n	801294a <xQueueReceive+0x13e>
 8012942:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012944:	2200      	movs	r2, #0
 8012946:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 801294a:	f002 ffe7 	bl	801591c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 801294e:	1d3a      	adds	r2, r7, #4
 8012950:	f107 0310 	add.w	r3, r7, #16
 8012954:	4611      	mov	r1, r2
 8012956:	4618      	mov	r0, r3
 8012958:	f001 fcca 	bl	80142f0 <xTaskCheckForTimeOut>
 801295c:	4603      	mov	r3, r0
 801295e:	2b00      	cmp	r3, #0
 8012960:	d123      	bne.n	80129aa <xQueueReceive+0x19e>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012962:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012964:	f000 fb22 	bl	8012fac <prvIsQueueEmpty>
 8012968:	4603      	mov	r3, r0
 801296a:	2b00      	cmp	r3, #0
 801296c:	d017      	beq.n	801299e <xQueueReceive+0x192>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 801296e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012970:	3324      	adds	r3, #36	@ 0x24
 8012972:	687a      	ldr	r2, [r7, #4]
 8012974:	4611      	mov	r1, r2
 8012976:	4618      	mov	r0, r3
 8012978:	f001 fbc6 	bl	8014108 <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 801297c:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801297e:	f000 fac3 	bl	8012f08 <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012982:	f001 f9d3 	bl	8013d2c <xTaskResumeAll>
 8012986:	4603      	mov	r3, r0
 8012988:	2b00      	cmp	r3, #0
 801298a:	d189      	bne.n	80128a0 <xQueueReceive+0x94>
				{
					portYIELD_WITHIN_API();
 801298c:	4b0f      	ldr	r3, [pc, #60]	@ (80129cc <xQueueReceive+0x1c0>)
 801298e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012992:	601a      	str	r2, [r3, #0]
 8012994:	f3bf 8f4f 	dsb	sy
 8012998:	f3bf 8f6f 	isb	sy
 801299c:	e780      	b.n	80128a0 <xQueueReceive+0x94>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 801299e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80129a0:	f000 fab2 	bl	8012f08 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 80129a4:	f001 f9c2 	bl	8013d2c <xTaskResumeAll>
 80129a8:	e77a      	b.n	80128a0 <xQueueReceive+0x94>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 80129aa:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80129ac:	f000 faac 	bl	8012f08 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 80129b0:	f001 f9bc 	bl	8013d2c <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 80129b4:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80129b6:	f000 faf9 	bl	8012fac <prvIsQueueEmpty>
 80129ba:	4603      	mov	r3, r0
 80129bc:	2b00      	cmp	r3, #0
 80129be:	f43f af6f 	beq.w	80128a0 <xQueueReceive+0x94>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 80129c2:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 80129c4:	4618      	mov	r0, r3
 80129c6:	3730      	adds	r7, #48	@ 0x30
 80129c8:	46bd      	mov	sp, r7
 80129ca:	bd80      	pop	{r7, pc}
 80129cc:	e000ed04 	.word	0xe000ed04

080129d0 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/

BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
 80129d0:	b580      	push	{r7, lr}
 80129d2:	b08e      	sub	sp, #56	@ 0x38
 80129d4:	af00      	add	r7, sp, #0
 80129d6:	6078      	str	r0, [r7, #4]
 80129d8:	6039      	str	r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
 80129da:	2300      	movs	r3, #0
 80129dc:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 80129de:	687b      	ldr	r3, [r7, #4]
 80129e0:	62fb      	str	r3, [r7, #44]	@ 0x2c

#if( configUSE_MUTEXES == 1 )
	BaseType_t xInheritanceOccurred = pdFALSE;
 80129e2:	2300      	movs	r3, #0
 80129e4:	633b      	str	r3, [r7, #48]	@ 0x30
#endif

	/* Check the queue pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 80129e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80129e8:	2b00      	cmp	r3, #0
 80129ea:	d10b      	bne.n	8012a04 <xQueueSemaphoreTake+0x34>
	__asm volatile
 80129ec:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80129f0:	f383 8811 	msr	BASEPRI, r3
 80129f4:	f3bf 8f6f 	isb	sy
 80129f8:	f3bf 8f4f 	dsb	sy
 80129fc:	623b      	str	r3, [r7, #32]
}
 80129fe:	bf00      	nop
 8012a00:	bf00      	nop
 8012a02:	e7fd      	b.n	8012a00 <xQueueSemaphoreTake+0x30>

	/* Check this really is a semaphore, in which case the item size will be
	0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8012a04:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a06:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012a08:	2b00      	cmp	r3, #0
 8012a0a:	d00b      	beq.n	8012a24 <xQueueSemaphoreTake+0x54>
	__asm volatile
 8012a0c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a10:	f383 8811 	msr	BASEPRI, r3
 8012a14:	f3bf 8f6f 	isb	sy
 8012a18:	f3bf 8f4f 	dsb	sy
 8012a1c:	61fb      	str	r3, [r7, #28]
}
 8012a1e:	bf00      	nop
 8012a20:	bf00      	nop
 8012a22:	e7fd      	b.n	8012a20 <xQueueSemaphoreTake+0x50>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012a24:	f001 fdc0 	bl	80145a8 <xTaskGetSchedulerState>
 8012a28:	4603      	mov	r3, r0
 8012a2a:	2b00      	cmp	r3, #0
 8012a2c:	d102      	bne.n	8012a34 <xQueueSemaphoreTake+0x64>
 8012a2e:	683b      	ldr	r3, [r7, #0]
 8012a30:	2b00      	cmp	r3, #0
 8012a32:	d101      	bne.n	8012a38 <xQueueSemaphoreTake+0x68>
 8012a34:	2301      	movs	r3, #1
 8012a36:	e000      	b.n	8012a3a <xQueueSemaphoreTake+0x6a>
 8012a38:	2300      	movs	r3, #0
 8012a3a:	2b00      	cmp	r3, #0
 8012a3c:	d10b      	bne.n	8012a56 <xQueueSemaphoreTake+0x86>
	__asm volatile
 8012a3e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a42:	f383 8811 	msr	BASEPRI, r3
 8012a46:	f3bf 8f6f 	isb	sy
 8012a4a:	f3bf 8f4f 	dsb	sy
 8012a4e:	61bb      	str	r3, [r7, #24]
}
 8012a50:	bf00      	nop
 8012a52:	bf00      	nop
 8012a54:	e7fd      	b.n	8012a52 <xQueueSemaphoreTake+0x82>
	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012a56:	f002 ff2f 	bl	80158b8 <vPortEnterCritical>
		{
			/* Semaphores are queues with an item size of 0, and where the
			number of messages in the queue is the semaphore's count value. */
			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 8012a5a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a5c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012a5e:	62bb      	str	r3, [r7, #40]	@ 0x28

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 8012a60:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012a62:	2b00      	cmp	r3, #0
 8012a64:	d024      	beq.n	8012ab0 <xQueueSemaphoreTake+0xe0>
			{
				traceQUEUE_RECEIVE( pxQueue );

				/* Semaphores are queues with a data size of zero and where the
				messages waiting is the semaphore's count.  Reduce the count. */
				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 8012a66:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012a68:	1e5a      	subs	r2, r3, #1
 8012a6a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a6c:	639a      	str	r2, [r3, #56]	@ 0x38

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012a6e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a70:	681b      	ldr	r3, [r3, #0]
 8012a72:	2b00      	cmp	r3, #0
 8012a74:	d104      	bne.n	8012a80 <xQueueSemaphoreTake+0xb0>
					{
						/* Record the information required to implement
						priority inheritance should it become necessary. */
						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 8012a76:	f001 ff11 	bl	801489c <pvTaskIncrementMutexHeldCount>
 8012a7a:	4602      	mov	r2, r0
 8012a7c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a7e:	609a      	str	r2, [r3, #8]
				}
				#endif /* configUSE_MUTEXES */

				/* Check to see if other tasks are blocked waiting to give the
				semaphore, and if so, unblock the highest priority such task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012a80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a82:	691b      	ldr	r3, [r3, #16]
 8012a84:	2b00      	cmp	r3, #0
 8012a86:	d00f      	beq.n	8012aa8 <xQueueSemaphoreTake+0xd8>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012a88:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012a8a:	3310      	adds	r3, #16
 8012a8c:	4618      	mov	r0, r3
 8012a8e:	f001 fb8d 	bl	80141ac <xTaskRemoveFromEventList>
 8012a92:	4603      	mov	r3, r0
 8012a94:	2b00      	cmp	r3, #0
 8012a96:	d007      	beq.n	8012aa8 <xQueueSemaphoreTake+0xd8>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8012a98:	4b54      	ldr	r3, [pc, #336]	@ (8012bec <xQueueSemaphoreTake+0x21c>)
 8012a9a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012a9e:	601a      	str	r2, [r3, #0]
 8012aa0:	f3bf 8f4f 	dsb	sy
 8012aa4:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8012aa8:	f002 ff38 	bl	801591c <vPortExitCritical>
				return pdPASS;
 8012aac:	2301      	movs	r3, #1
 8012aae:	e098      	b.n	8012be2 <xQueueSemaphoreTake+0x212>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8012ab0:	683b      	ldr	r3, [r7, #0]
 8012ab2:	2b00      	cmp	r3, #0
 8012ab4:	d112      	bne.n	8012adc <xQueueSemaphoreTake+0x10c>
					/* For inheritance to have occurred there must have been an
					initial timeout, and an adjusted timeout cannot become 0, as
					if it were 0 the function would have exited. */
					#if( configUSE_MUTEXES == 1 )
					{
						configASSERT( xInheritanceOccurred == pdFALSE );
 8012ab6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ab8:	2b00      	cmp	r3, #0
 8012aba:	d00b      	beq.n	8012ad4 <xQueueSemaphoreTake+0x104>
	__asm volatile
 8012abc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012ac0:	f383 8811 	msr	BASEPRI, r3
 8012ac4:	f3bf 8f6f 	isb	sy
 8012ac8:	f3bf 8f4f 	dsb	sy
 8012acc:	617b      	str	r3, [r7, #20]
}
 8012ace:	bf00      	nop
 8012ad0:	bf00      	nop
 8012ad2:	e7fd      	b.n	8012ad0 <xQueueSemaphoreTake+0x100>
					}
					#endif /* configUSE_MUTEXES */

					/* The semaphore count was 0 and no block time is specified
					(or the block time has expired) so exit now. */
					taskEXIT_CRITICAL();
 8012ad4:	f002 ff22 	bl	801591c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8012ad8:	2300      	movs	r3, #0
 8012ada:	e082      	b.n	8012be2 <xQueueSemaphoreTake+0x212>
				}
				else if( xEntryTimeSet == pdFALSE )
 8012adc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012ade:	2b00      	cmp	r3, #0
 8012ae0:	d106      	bne.n	8012af0 <xQueueSemaphoreTake+0x120>
				{
					/* The semaphore count was 0 and a block time was specified
					so configure the timeout structure ready to block. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8012ae2:	f107 030c 	add.w	r3, r7, #12
 8012ae6:	4618      	mov	r0, r3
 8012ae8:	f001 fbec 	bl	80142c4 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8012aec:	2301      	movs	r3, #1
 8012aee:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8012af0:	f002 ff14 	bl	801591c <vPortExitCritical>

		/* Interrupts and other tasks can give to and take from the semaphore
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012af4:	f001 f90c 	bl	8013d10 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8012af8:	f002 fede 	bl	80158b8 <vPortEnterCritical>
 8012afc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012afe:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012b02:	b25b      	sxtb	r3, r3
 8012b04:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012b08:	d103      	bne.n	8012b12 <xQueueSemaphoreTake+0x142>
 8012b0a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b0c:	2200      	movs	r2, #0
 8012b0e:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012b12:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b14:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012b18:	b25b      	sxtb	r3, r3
 8012b1a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012b1e:	d103      	bne.n	8012b28 <xQueueSemaphoreTake+0x158>
 8012b20:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b22:	2200      	movs	r2, #0
 8012b24:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012b28:	f002 fef8 	bl	801591c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8012b2c:	463a      	mov	r2, r7
 8012b2e:	f107 030c 	add.w	r3, r7, #12
 8012b32:	4611      	mov	r1, r2
 8012b34:	4618      	mov	r0, r3
 8012b36:	f001 fbdb 	bl	80142f0 <xTaskCheckForTimeOut>
 8012b3a:	4603      	mov	r3, r0
 8012b3c:	2b00      	cmp	r3, #0
 8012b3e:	d132      	bne.n	8012ba6 <xQueueSemaphoreTake+0x1d6>
		{
			/* A block time is specified and not expired.  If the semaphore
			count is 0 then enter the Blocked state to wait for a semaphore to
			become available.  As semaphores are implemented with queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012b40:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012b42:	f000 fa33 	bl	8012fac <prvIsQueueEmpty>
 8012b46:	4603      	mov	r3, r0
 8012b48:	2b00      	cmp	r3, #0
 8012b4a:	d026      	beq.n	8012b9a <xQueueSemaphoreTake+0x1ca>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012b4c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b4e:	681b      	ldr	r3, [r3, #0]
 8012b50:	2b00      	cmp	r3, #0
 8012b52:	d109      	bne.n	8012b68 <xQueueSemaphoreTake+0x198>
					{
						taskENTER_CRITICAL();
 8012b54:	f002 feb0 	bl	80158b8 <vPortEnterCritical>
						{
							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 8012b58:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b5a:	689b      	ldr	r3, [r3, #8]
 8012b5c:	4618      	mov	r0, r3
 8012b5e:	f001 fd41 	bl	80145e4 <xTaskPriorityInherit>
 8012b62:	6338      	str	r0, [r7, #48]	@ 0x30
						}
						taskEXIT_CRITICAL();
 8012b64:	f002 feda 	bl	801591c <vPortExitCritical>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif

				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8012b68:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012b6a:	3324      	adds	r3, #36	@ 0x24
 8012b6c:	683a      	ldr	r2, [r7, #0]
 8012b6e:	4611      	mov	r1, r2
 8012b70:	4618      	mov	r0, r3
 8012b72:	f001 fac9 	bl	8014108 <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8012b76:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012b78:	f000 f9c6 	bl	8012f08 <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012b7c:	f001 f8d6 	bl	8013d2c <xTaskResumeAll>
 8012b80:	4603      	mov	r3, r0
 8012b82:	2b00      	cmp	r3, #0
 8012b84:	f47f af67 	bne.w	8012a56 <xQueueSemaphoreTake+0x86>
				{
					portYIELD_WITHIN_API();
 8012b88:	4b18      	ldr	r3, [pc, #96]	@ (8012bec <xQueueSemaphoreTake+0x21c>)
 8012b8a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012b8e:	601a      	str	r2, [r3, #0]
 8012b90:	f3bf 8f4f 	dsb	sy
 8012b94:	f3bf 8f6f 	isb	sy
 8012b98:	e75d      	b.n	8012a56 <xQueueSemaphoreTake+0x86>
			}
			else
			{
				/* There was no timeout and the semaphore count was not 0, so
				attempt to take the semaphore again. */
				prvUnlockQueue( pxQueue );
 8012b9a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012b9c:	f000 f9b4 	bl	8012f08 <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012ba0:	f001 f8c4 	bl	8013d2c <xTaskResumeAll>
 8012ba4:	e757      	b.n	8012a56 <xQueueSemaphoreTake+0x86>
			}
		}
		else
		{
			/* Timed out. */
			prvUnlockQueue( pxQueue );
 8012ba6:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012ba8:	f000 f9ae 	bl	8012f08 <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012bac:	f001 f8be 	bl	8013d2c <xTaskResumeAll>

			/* If the semaphore count is 0 exit now as the timeout has
			expired.  Otherwise return to attempt to take the semaphore that is
			known to be available.  As semaphores are implemented by queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012bb0:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012bb2:	f000 f9fb 	bl	8012fac <prvIsQueueEmpty>
 8012bb6:	4603      	mov	r3, r0
 8012bb8:	2b00      	cmp	r3, #0
 8012bba:	f43f af4c 	beq.w	8012a56 <xQueueSemaphoreTake+0x86>
				#if ( configUSE_MUTEXES == 1 )
				{
					/* xInheritanceOccurred could only have be set if
					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
					test the mutex type again to check it is actually a mutex. */
					if( xInheritanceOccurred != pdFALSE )
 8012bbe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012bc0:	2b00      	cmp	r3, #0
 8012bc2:	d00d      	beq.n	8012be0 <xQueueSemaphoreTake+0x210>
					{
						taskENTER_CRITICAL();
 8012bc4:	f002 fe78 	bl	80158b8 <vPortEnterCritical>
							/* This task blocking on the mutex caused another
							task to inherit this task's priority.  Now this task
							has timed out the priority should be disinherited
							again, but only as low as the next highest priority
							task that is waiting for the same mutex. */
							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 8012bc8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012bca:	f000 f8f5 	bl	8012db8 <prvGetDisinheritPriorityAfterTimeout>
 8012bce:	6278      	str	r0, [r7, #36]	@ 0x24
							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 8012bd0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012bd2:	689b      	ldr	r3, [r3, #8]
 8012bd4:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8012bd6:	4618      	mov	r0, r3
 8012bd8:	f001 fddc 	bl	8014794 <vTaskPriorityDisinheritAfterTimeout>
						}
						taskEXIT_CRITICAL();
 8012bdc:	f002 fe9e 	bl	801591c <vPortExitCritical>
					}
				}
				#endif /* configUSE_MUTEXES */

				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012be0:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8012be2:	4618      	mov	r0, r3
 8012be4:	3738      	adds	r7, #56	@ 0x38
 8012be6:	46bd      	mov	sp, r7
 8012be8:	bd80      	pop	{r7, pc}
 8012bea:	bf00      	nop
 8012bec:	e000ed04 	.word	0xe000ed04

08012bf0 <xQueueReceiveFromISR>:
	} /*lint -restore */
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8012bf0:	b580      	push	{r7, lr}
 8012bf2:	b08e      	sub	sp, #56	@ 0x38
 8012bf4:	af00      	add	r7, sp, #0
 8012bf6:	60f8      	str	r0, [r7, #12]
 8012bf8:	60b9      	str	r1, [r7, #8]
 8012bfa:	607a      	str	r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8012bfc:	68fb      	ldr	r3, [r7, #12]
 8012bfe:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8012c00:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012c02:	2b00      	cmp	r3, #0
 8012c04:	d10b      	bne.n	8012c1e <xQueueReceiveFromISR+0x2e>
	__asm volatile
 8012c06:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c0a:	f383 8811 	msr	BASEPRI, r3
 8012c0e:	f3bf 8f6f 	isb	sy
 8012c12:	f3bf 8f4f 	dsb	sy
 8012c16:	623b      	str	r3, [r7, #32]
}
 8012c18:	bf00      	nop
 8012c1a:	bf00      	nop
 8012c1c:	e7fd      	b.n	8012c1a <xQueueReceiveFromISR+0x2a>
	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8012c1e:	68bb      	ldr	r3, [r7, #8]
 8012c20:	2b00      	cmp	r3, #0
 8012c22:	d103      	bne.n	8012c2c <xQueueReceiveFromISR+0x3c>
 8012c24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012c26:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012c28:	2b00      	cmp	r3, #0
 8012c2a:	d101      	bne.n	8012c30 <xQueueReceiveFromISR+0x40>
 8012c2c:	2301      	movs	r3, #1
 8012c2e:	e000      	b.n	8012c32 <xQueueReceiveFromISR+0x42>
 8012c30:	2300      	movs	r3, #0
 8012c32:	2b00      	cmp	r3, #0
 8012c34:	d10b      	bne.n	8012c4e <xQueueReceiveFromISR+0x5e>
	__asm volatile
 8012c36:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c3a:	f383 8811 	msr	BASEPRI, r3
 8012c3e:	f3bf 8f6f 	isb	sy
 8012c42:	f3bf 8f4f 	dsb	sy
 8012c46:	61fb      	str	r3, [r7, #28]
}
 8012c48:	bf00      	nop
 8012c4a:	bf00      	nop
 8012c4c:	e7fd      	b.n	8012c4a <xQueueReceiveFromISR+0x5a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012c4e:	f002 ff13 	bl	8015a78 <vPortValidateInterruptPriority>
	__asm volatile
 8012c52:	f3ef 8211 	mrs	r2, BASEPRI
 8012c56:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012c5a:	f383 8811 	msr	BASEPRI, r3
 8012c5e:	f3bf 8f6f 	isb	sy
 8012c62:	f3bf 8f4f 	dsb	sy
 8012c66:	61ba      	str	r2, [r7, #24]
 8012c68:	617b      	str	r3, [r7, #20]
	return ulOriginalBASEPRI;
 8012c6a:	69bb      	ldr	r3, [r7, #24]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012c6c:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012c6e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012c70:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012c72:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* Cannot block in an ISR, so check there is data available. */
		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012c74:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c76:	2b00      	cmp	r3, #0
 8012c78:	d02f      	beq.n	8012cda <xQueueReceiveFromISR+0xea>
		{
			const int8_t cRxLock = pxQueue->cRxLock;
 8012c7a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012c7c:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012c80:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );

			prvCopyDataFromQueue( pxQueue, pvBuffer );
 8012c84:	68b9      	ldr	r1, [r7, #8]
 8012c86:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012c88:	f000 f918 	bl	8012ebc <prvCopyDataFromQueue>
			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8012c8c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c8e:	1e5a      	subs	r2, r3, #1
 8012c90:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012c92:	639a      	str	r2, [r3, #56]	@ 0x38

			/* If the queue is locked the event list will not be modified.
			Instead update the lock count so the task that unlocks the queue
			will know that an ISR has removed data while the queue was
			locked. */
			if( cRxLock == queueUNLOCKED )
 8012c94:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8012c98:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012c9c:	d112      	bne.n	8012cc4 <xQueueReceiveFromISR+0xd4>
			{
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012c9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ca0:	691b      	ldr	r3, [r3, #16]
 8012ca2:	2b00      	cmp	r3, #0
 8012ca4:	d016      	beq.n	8012cd4 <xQueueReceiveFromISR+0xe4>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012ca6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ca8:	3310      	adds	r3, #16
 8012caa:	4618      	mov	r0, r3
 8012cac:	f001 fa7e 	bl	80141ac <xTaskRemoveFromEventList>
 8012cb0:	4603      	mov	r3, r0
 8012cb2:	2b00      	cmp	r3, #0
 8012cb4:	d00e      	beq.n	8012cd4 <xQueueReceiveFromISR+0xe4>
					{
						/* The task waiting has a higher priority than us so
						force a context switch. */
						if( pxHigherPriorityTaskWoken != NULL )
 8012cb6:	687b      	ldr	r3, [r7, #4]
 8012cb8:	2b00      	cmp	r3, #0
 8012cba:	d00b      	beq.n	8012cd4 <xQueueReceiveFromISR+0xe4>
						{
							*pxHigherPriorityTaskWoken = pdTRUE;
 8012cbc:	687b      	ldr	r3, [r7, #4]
 8012cbe:	2201      	movs	r2, #1
 8012cc0:	601a      	str	r2, [r3, #0]
 8012cc2:	e007      	b.n	8012cd4 <xQueueReceiveFromISR+0xe4>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was removed while it was locked. */
				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 8012cc4:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012cc8:	3301      	adds	r3, #1
 8012cca:	b2db      	uxtb	r3, r3
 8012ccc:	b25a      	sxtb	r2, r3
 8012cce:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012cd0:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
			}

			xReturn = pdPASS;
 8012cd4:	2301      	movs	r3, #1
 8012cd6:	637b      	str	r3, [r7, #52]	@ 0x34
 8012cd8:	e001      	b.n	8012cde <xQueueReceiveFromISR+0xee>
		}
		else
		{
			xReturn = pdFAIL;
 8012cda:	2300      	movs	r3, #0
 8012cdc:	637b      	str	r3, [r7, #52]	@ 0x34
 8012cde:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012ce0:	613b      	str	r3, [r7, #16]
	__asm volatile
 8012ce2:	693b      	ldr	r3, [r7, #16]
 8012ce4:	f383 8811 	msr	BASEPRI, r3
}
 8012ce8:	bf00      	nop
			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012cea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8012cec:	4618      	mov	r0, r3
 8012cee:	3738      	adds	r7, #56	@ 0x38
 8012cf0:	46bd      	mov	sp, r7
 8012cf2:	bd80      	pop	{r7, pc}

08012cf4 <uxQueueMessagesWaiting>:
	return xReturn;
}
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
 8012cf4:	b580      	push	{r7, lr}
 8012cf6:	b084      	sub	sp, #16
 8012cf8:	af00      	add	r7, sp, #0
 8012cfa:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;

	configASSERT( xQueue );
 8012cfc:	687b      	ldr	r3, [r7, #4]
 8012cfe:	2b00      	cmp	r3, #0
 8012d00:	d10b      	bne.n	8012d1a <uxQueueMessagesWaiting+0x26>
	__asm volatile
 8012d02:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d06:	f383 8811 	msr	BASEPRI, r3
 8012d0a:	f3bf 8f6f 	isb	sy
 8012d0e:	f3bf 8f4f 	dsb	sy
 8012d12:	60bb      	str	r3, [r7, #8]
}
 8012d14:	bf00      	nop
 8012d16:	bf00      	nop
 8012d18:	e7fd      	b.n	8012d16 <uxQueueMessagesWaiting+0x22>

	taskENTER_CRITICAL();
 8012d1a:	f002 fdcd 	bl	80158b8 <vPortEnterCritical>
	{
		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 8012d1e:	687b      	ldr	r3, [r7, #4]
 8012d20:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012d22:	60fb      	str	r3, [r7, #12]
	}
	taskEXIT_CRITICAL();
 8012d24:	f002 fdfa 	bl	801591c <vPortExitCritical>

	return uxReturn;
 8012d28:	68fb      	ldr	r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8012d2a:	4618      	mov	r0, r3
 8012d2c:	3710      	adds	r7, #16
 8012d2e:	46bd      	mov	sp, r7
 8012d30:	bd80      	pop	{r7, pc}

08012d32 <uxQueueMessagesWaitingFromISR>:
	return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
 8012d32:	b480      	push	{r7}
 8012d34:	b087      	sub	sp, #28
 8012d36:	af00      	add	r7, sp, #0
 8012d38:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
 8012d3a:	687b      	ldr	r3, [r7, #4]
 8012d3c:	617b      	str	r3, [r7, #20]

	configASSERT( pxQueue );
 8012d3e:	697b      	ldr	r3, [r7, #20]
 8012d40:	2b00      	cmp	r3, #0
 8012d42:	d10b      	bne.n	8012d5c <uxQueueMessagesWaitingFromISR+0x2a>
	__asm volatile
 8012d44:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d48:	f383 8811 	msr	BASEPRI, r3
 8012d4c:	f3bf 8f6f 	isb	sy
 8012d50:	f3bf 8f4f 	dsb	sy
 8012d54:	60fb      	str	r3, [r7, #12]
}
 8012d56:	bf00      	nop
 8012d58:	bf00      	nop
 8012d5a:	e7fd      	b.n	8012d58 <uxQueueMessagesWaitingFromISR+0x26>
	uxReturn = pxQueue->uxMessagesWaiting;
 8012d5c:	697b      	ldr	r3, [r7, #20]
 8012d5e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012d60:	613b      	str	r3, [r7, #16]

	return uxReturn;
 8012d62:	693b      	ldr	r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8012d64:	4618      	mov	r0, r3
 8012d66:	371c      	adds	r7, #28
 8012d68:	46bd      	mov	sp, r7
 8012d6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012d6e:	4770      	bx	lr

08012d70 <vQueueDelete>:
/*-----------------------------------------------------------*/

void vQueueDelete( QueueHandle_t xQueue )
{
 8012d70:	b580      	push	{r7, lr}
 8012d72:	b084      	sub	sp, #16
 8012d74:	af00      	add	r7, sp, #0
 8012d76:	6078      	str	r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
 8012d78:	687b      	ldr	r3, [r7, #4]
 8012d7a:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8012d7c:	68fb      	ldr	r3, [r7, #12]
 8012d7e:	2b00      	cmp	r3, #0
 8012d80:	d10b      	bne.n	8012d9a <vQueueDelete+0x2a>
	__asm volatile
 8012d82:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d86:	f383 8811 	msr	BASEPRI, r3
 8012d8a:	f3bf 8f6f 	isb	sy
 8012d8e:	f3bf 8f4f 	dsb	sy
 8012d92:	60bb      	str	r3, [r7, #8]
}
 8012d94:	bf00      	nop
 8012d96:	bf00      	nop
 8012d98:	e7fd      	b.n	8012d96 <vQueueDelete+0x26>
	traceQUEUE_DELETE( pxQueue );

	#if ( configQUEUE_REGISTRY_SIZE > 0 )
	{
		vQueueUnregisterQueue( pxQueue );
 8012d9a:	68f8      	ldr	r0, [r7, #12]
 8012d9c:	f000 f95e 	bl	801305c <vQueueUnregisterQueue>
	}
	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
	{
		/* The queue could have been allocated statically or dynamically, so
		check before attempting to free the memory. */
		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 8012da0:	68fb      	ldr	r3, [r7, #12]
 8012da2:	f893 3046 	ldrb.w	r3, [r3, #70]	@ 0x46
 8012da6:	2b00      	cmp	r3, #0
 8012da8:	d102      	bne.n	8012db0 <vQueueDelete+0x40>
		{
			vPortFree( pxQueue );
 8012daa:	68f8      	ldr	r0, [r7, #12]
 8012dac:	f002 ff74 	bl	8015c98 <vPortFree>
		/* The queue must have been statically allocated, so is not going to be
		deleted.  Avoid compiler warnings about the unused parameter. */
		( void ) pxQueue;
	}
	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
 8012db0:	bf00      	nop
 8012db2:	3710      	adds	r7, #16
 8012db4:	46bd      	mov	sp, r7
 8012db6:	bd80      	pop	{r7, pc}

08012db8 <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
	{
 8012db8:	b480      	push	{r7}
 8012dba:	b085      	sub	sp, #20
 8012dbc:	af00      	add	r7, sp, #0
 8012dbe:	6078      	str	r0, [r7, #4]
		priority, but the waiting task times out, then the holder should
		disinherit the priority - but only down to the highest priority of any
		other tasks that are waiting for the same mutex.  For this purpose,
		return the priority of the highest priority task that is waiting for the
		mutex. */
		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 8012dc0:	687b      	ldr	r3, [r7, #4]
 8012dc2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8012dc4:	2b00      	cmp	r3, #0
 8012dc6:	d006      	beq.n	8012dd6 <prvGetDisinheritPriorityAfterTimeout+0x1e>
		{
			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 8012dc8:	687b      	ldr	r3, [r7, #4]
 8012dca:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8012dcc:	681b      	ldr	r3, [r3, #0]
 8012dce:	f1c3 0338 	rsb	r3, r3, #56	@ 0x38
 8012dd2:	60fb      	str	r3, [r7, #12]
 8012dd4:	e001      	b.n	8012dda <prvGetDisinheritPriorityAfterTimeout+0x22>
		}
		else
		{
			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 8012dd6:	2300      	movs	r3, #0
 8012dd8:	60fb      	str	r3, [r7, #12]
		}

		return uxHighestPriorityOfWaitingTasks;
 8012dda:	68fb      	ldr	r3, [r7, #12]
	}
 8012ddc:	4618      	mov	r0, r3
 8012dde:	3714      	adds	r7, #20
 8012de0:	46bd      	mov	sp, r7
 8012de2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012de6:	4770      	bx	lr

08012de8 <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 8012de8:	b580      	push	{r7, lr}
 8012dea:	b086      	sub	sp, #24
 8012dec:	af00      	add	r7, sp, #0
 8012dee:	60f8      	str	r0, [r7, #12]
 8012df0:	60b9      	str	r1, [r7, #8]
 8012df2:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 8012df4:	2300      	movs	r3, #0
 8012df6:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012df8:	68fb      	ldr	r3, [r7, #12]
 8012dfa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012dfc:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 8012dfe:	68fb      	ldr	r3, [r7, #12]
 8012e00:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e02:	2b00      	cmp	r3, #0
 8012e04:	d10d      	bne.n	8012e22 <prvCopyDataToQueue+0x3a>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012e06:	68fb      	ldr	r3, [r7, #12]
 8012e08:	681b      	ldr	r3, [r3, #0]
 8012e0a:	2b00      	cmp	r3, #0
 8012e0c:	d14d      	bne.n	8012eaa <prvCopyDataToQueue+0xc2>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 8012e0e:	68fb      	ldr	r3, [r7, #12]
 8012e10:	689b      	ldr	r3, [r3, #8]
 8012e12:	4618      	mov	r0, r3
 8012e14:	f001 fc4e 	bl	80146b4 <xTaskPriorityDisinherit>
 8012e18:	6178      	str	r0, [r7, #20]
				pxQueue->u.xSemaphore.xMutexHolder = NULL;
 8012e1a:	68fb      	ldr	r3, [r7, #12]
 8012e1c:	2200      	movs	r2, #0
 8012e1e:	609a      	str	r2, [r3, #8]
 8012e20:	e043      	b.n	8012eaa <prvCopyDataToQueue+0xc2>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 8012e22:	687b      	ldr	r3, [r7, #4]
 8012e24:	2b00      	cmp	r3, #0
 8012e26:	d119      	bne.n	8012e5c <prvCopyDataToQueue+0x74>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8012e28:	68fb      	ldr	r3, [r7, #12]
 8012e2a:	6858      	ldr	r0, [r3, #4]
 8012e2c:	68fb      	ldr	r3, [r7, #12]
 8012e2e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e30:	461a      	mov	r2, r3
 8012e32:	68b9      	ldr	r1, [r7, #8]
 8012e34:	f017 ff1b 	bl	802ac6e <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8012e38:	68fb      	ldr	r3, [r7, #12]
 8012e3a:	685a      	ldr	r2, [r3, #4]
 8012e3c:	68fb      	ldr	r3, [r7, #12]
 8012e3e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e40:	441a      	add	r2, r3
 8012e42:	68fb      	ldr	r3, [r7, #12]
 8012e44:	605a      	str	r2, [r3, #4]
		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8012e46:	68fb      	ldr	r3, [r7, #12]
 8012e48:	685a      	ldr	r2, [r3, #4]
 8012e4a:	68fb      	ldr	r3, [r7, #12]
 8012e4c:	689b      	ldr	r3, [r3, #8]
 8012e4e:	429a      	cmp	r2, r3
 8012e50:	d32b      	bcc.n	8012eaa <prvCopyDataToQueue+0xc2>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 8012e52:	68fb      	ldr	r3, [r7, #12]
 8012e54:	681a      	ldr	r2, [r3, #0]
 8012e56:	68fb      	ldr	r3, [r7, #12]
 8012e58:	605a      	str	r2, [r3, #4]
 8012e5a:	e026      	b.n	8012eaa <prvCopyDataToQueue+0xc2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 8012e5c:	68fb      	ldr	r3, [r7, #12]
 8012e5e:	68d8      	ldr	r0, [r3, #12]
 8012e60:	68fb      	ldr	r3, [r7, #12]
 8012e62:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e64:	461a      	mov	r2, r3
 8012e66:	68b9      	ldr	r1, [r7, #8]
 8012e68:	f017 ff01 	bl	802ac6e <memcpy>
		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 8012e6c:	68fb      	ldr	r3, [r7, #12]
 8012e6e:	68da      	ldr	r2, [r3, #12]
 8012e70:	68fb      	ldr	r3, [r7, #12]
 8012e72:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e74:	425b      	negs	r3, r3
 8012e76:	441a      	add	r2, r3
 8012e78:	68fb      	ldr	r3, [r7, #12]
 8012e7a:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8012e7c:	68fb      	ldr	r3, [r7, #12]
 8012e7e:	68da      	ldr	r2, [r3, #12]
 8012e80:	68fb      	ldr	r3, [r7, #12]
 8012e82:	681b      	ldr	r3, [r3, #0]
 8012e84:	429a      	cmp	r2, r3
 8012e86:	d207      	bcs.n	8012e98 <prvCopyDataToQueue+0xb0>
		{
			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 8012e88:	68fb      	ldr	r3, [r7, #12]
 8012e8a:	689a      	ldr	r2, [r3, #8]
 8012e8c:	68fb      	ldr	r3, [r7, #12]
 8012e8e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012e90:	425b      	negs	r3, r3
 8012e92:	441a      	add	r2, r3
 8012e94:	68fb      	ldr	r3, [r7, #12]
 8012e96:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 8012e98:	687b      	ldr	r3, [r7, #4]
 8012e9a:	2b02      	cmp	r3, #2
 8012e9c:	d105      	bne.n	8012eaa <prvCopyDataToQueue+0xc2>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012e9e:	693b      	ldr	r3, [r7, #16]
 8012ea0:	2b00      	cmp	r3, #0
 8012ea2:	d002      	beq.n	8012eaa <prvCopyDataToQueue+0xc2>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 8012ea4:	693b      	ldr	r3, [r7, #16]
 8012ea6:	3b01      	subs	r3, #1
 8012ea8:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8012eaa:	693b      	ldr	r3, [r7, #16]
 8012eac:	1c5a      	adds	r2, r3, #1
 8012eae:	68fb      	ldr	r3, [r7, #12]
 8012eb0:	639a      	str	r2, [r3, #56]	@ 0x38

	return xReturn;
 8012eb2:	697b      	ldr	r3, [r7, #20]
}
 8012eb4:	4618      	mov	r0, r3
 8012eb6:	3718      	adds	r7, #24
 8012eb8:	46bd      	mov	sp, r7
 8012eba:	bd80      	pop	{r7, pc}

08012ebc <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 8012ebc:	b580      	push	{r7, lr}
 8012ebe:	b082      	sub	sp, #8
 8012ec0:	af00      	add	r7, sp, #0
 8012ec2:	6078      	str	r0, [r7, #4]
 8012ec4:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 8012ec6:	687b      	ldr	r3, [r7, #4]
 8012ec8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012eca:	2b00      	cmp	r3, #0
 8012ecc:	d018      	beq.n	8012f00 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 8012ece:	687b      	ldr	r3, [r7, #4]
 8012ed0:	68da      	ldr	r2, [r3, #12]
 8012ed2:	687b      	ldr	r3, [r7, #4]
 8012ed4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012ed6:	441a      	add	r2, r3
 8012ed8:	687b      	ldr	r3, [r7, #4]
 8012eda:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 8012edc:	687b      	ldr	r3, [r7, #4]
 8012ede:	68da      	ldr	r2, [r3, #12]
 8012ee0:	687b      	ldr	r3, [r7, #4]
 8012ee2:	689b      	ldr	r3, [r3, #8]
 8012ee4:	429a      	cmp	r2, r3
 8012ee6:	d303      	bcc.n	8012ef0 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 8012ee8:	687b      	ldr	r3, [r7, #4]
 8012eea:	681a      	ldr	r2, [r3, #0]
 8012eec:	687b      	ldr	r3, [r7, #4]
 8012eee:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 8012ef0:	687b      	ldr	r3, [r7, #4]
 8012ef2:	68d9      	ldr	r1, [r3, #12]
 8012ef4:	687b      	ldr	r3, [r7, #4]
 8012ef6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012ef8:	461a      	mov	r2, r3
 8012efa:	6838      	ldr	r0, [r7, #0]
 8012efc:	f017 feb7 	bl	802ac6e <memcpy>
	}
}
 8012f00:	bf00      	nop
 8012f02:	3708      	adds	r7, #8
 8012f04:	46bd      	mov	sp, r7
 8012f06:	bd80      	pop	{r7, pc}

08012f08 <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 8012f08:	b580      	push	{r7, lr}
 8012f0a:	b084      	sub	sp, #16
 8012f0c:	af00      	add	r7, sp, #0
 8012f0e:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 8012f10:	f002 fcd2 	bl	80158b8 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 8012f14:	687b      	ldr	r3, [r7, #4]
 8012f16:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012f1a:	73fb      	strb	r3, [r7, #15]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8012f1c:	e011      	b.n	8012f42 <prvUnlockQueue+0x3a>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012f1e:	687b      	ldr	r3, [r7, #4]
 8012f20:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8012f22:	2b00      	cmp	r3, #0
 8012f24:	d012      	beq.n	8012f4c <prvUnlockQueue+0x44>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8012f26:	687b      	ldr	r3, [r7, #4]
 8012f28:	3324      	adds	r3, #36	@ 0x24
 8012f2a:	4618      	mov	r0, r3
 8012f2c:	f001 f93e 	bl	80141ac <xTaskRemoveFromEventList>
 8012f30:	4603      	mov	r3, r0
 8012f32:	2b00      	cmp	r3, #0
 8012f34:	d001      	beq.n	8012f3a <prvUnlockQueue+0x32>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 8012f36:	f001 fa3f 	bl	80143b8 <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 8012f3a:	7bfb      	ldrb	r3, [r7, #15]
 8012f3c:	3b01      	subs	r3, #1
 8012f3e:	b2db      	uxtb	r3, r3
 8012f40:	73fb      	strb	r3, [r7, #15]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8012f42:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8012f46:	2b00      	cmp	r3, #0
 8012f48:	dce9      	bgt.n	8012f1e <prvUnlockQueue+0x16>
 8012f4a:	e000      	b.n	8012f4e <prvUnlockQueue+0x46>
					break;
 8012f4c:	bf00      	nop
		}

		pxQueue->cTxLock = queueUNLOCKED;
 8012f4e:	687b      	ldr	r3, [r7, #4]
 8012f50:	22ff      	movs	r2, #255	@ 0xff
 8012f52:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
	}
	taskEXIT_CRITICAL();
 8012f56:	f002 fce1 	bl	801591c <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 8012f5a:	f002 fcad 	bl	80158b8 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 8012f5e:	687b      	ldr	r3, [r7, #4]
 8012f60:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012f64:	73bb      	strb	r3, [r7, #14]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 8012f66:	e011      	b.n	8012f8c <prvUnlockQueue+0x84>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012f68:	687b      	ldr	r3, [r7, #4]
 8012f6a:	691b      	ldr	r3, [r3, #16]
 8012f6c:	2b00      	cmp	r3, #0
 8012f6e:	d012      	beq.n	8012f96 <prvUnlockQueue+0x8e>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012f70:	687b      	ldr	r3, [r7, #4]
 8012f72:	3310      	adds	r3, #16
 8012f74:	4618      	mov	r0, r3
 8012f76:	f001 f919 	bl	80141ac <xTaskRemoveFromEventList>
 8012f7a:	4603      	mov	r3, r0
 8012f7c:	2b00      	cmp	r3, #0
 8012f7e:	d001      	beq.n	8012f84 <prvUnlockQueue+0x7c>
				{
					vTaskMissedYield();
 8012f80:	f001 fa1a 	bl	80143b8 <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 8012f84:	7bbb      	ldrb	r3, [r7, #14]
 8012f86:	3b01      	subs	r3, #1
 8012f88:	b2db      	uxtb	r3, r3
 8012f8a:	73bb      	strb	r3, [r7, #14]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 8012f8c:	f997 300e 	ldrsb.w	r3, [r7, #14]
 8012f90:	2b00      	cmp	r3, #0
 8012f92:	dce9      	bgt.n	8012f68 <prvUnlockQueue+0x60>
 8012f94:	e000      	b.n	8012f98 <prvUnlockQueue+0x90>
			}
			else
			{
				break;
 8012f96:	bf00      	nop
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 8012f98:	687b      	ldr	r3, [r7, #4]
 8012f9a:	22ff      	movs	r2, #255	@ 0xff
 8012f9c:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
	}
	taskEXIT_CRITICAL();
 8012fa0:	f002 fcbc 	bl	801591c <vPortExitCritical>
}
 8012fa4:	bf00      	nop
 8012fa6:	3710      	adds	r7, #16
 8012fa8:	46bd      	mov	sp, r7
 8012faa:	bd80      	pop	{r7, pc}

08012fac <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 8012fac:	b580      	push	{r7, lr}
 8012fae:	b084      	sub	sp, #16
 8012fb0:	af00      	add	r7, sp, #0
 8012fb2:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8012fb4:	f002 fc80 	bl	80158b8 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 8012fb8:	687b      	ldr	r3, [r7, #4]
 8012fba:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012fbc:	2b00      	cmp	r3, #0
 8012fbe:	d102      	bne.n	8012fc6 <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 8012fc0:	2301      	movs	r3, #1
 8012fc2:	60fb      	str	r3, [r7, #12]
 8012fc4:	e001      	b.n	8012fca <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 8012fc6:	2300      	movs	r3, #0
 8012fc8:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012fca:	f002 fca7 	bl	801591c <vPortExitCritical>

	return xReturn;
 8012fce:	68fb      	ldr	r3, [r7, #12]
}
 8012fd0:	4618      	mov	r0, r3
 8012fd2:	3710      	adds	r7, #16
 8012fd4:	46bd      	mov	sp, r7
 8012fd6:	bd80      	pop	{r7, pc}

08012fd8 <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 8012fd8:	b580      	push	{r7, lr}
 8012fda:	b084      	sub	sp, #16
 8012fdc:	af00      	add	r7, sp, #0
 8012fde:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 8012fe0:	f002 fc6a 	bl	80158b8 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 8012fe4:	687b      	ldr	r3, [r7, #4]
 8012fe6:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012fe8:	687b      	ldr	r3, [r7, #4]
 8012fea:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012fec:	429a      	cmp	r2, r3
 8012fee:	d102      	bne.n	8012ff6 <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 8012ff0:	2301      	movs	r3, #1
 8012ff2:	60fb      	str	r3, [r7, #12]
 8012ff4:	e001      	b.n	8012ffa <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 8012ff6:	2300      	movs	r3, #0
 8012ff8:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 8012ffa:	f002 fc8f 	bl	801591c <vPortExitCritical>

	return xReturn;
 8012ffe:	68fb      	ldr	r3, [r7, #12]
}
 8013000:	4618      	mov	r0, r3
 8013002:	3710      	adds	r7, #16
 8013004:	46bd      	mov	sp, r7
 8013006:	bd80      	pop	{r7, pc}

08013008 <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 8013008:	b480      	push	{r7}
 801300a:	b085      	sub	sp, #20
 801300c:	af00      	add	r7, sp, #0
 801300e:	6078      	str	r0, [r7, #4]
 8013010:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013012:	2300      	movs	r3, #0
 8013014:	60fb      	str	r3, [r7, #12]
 8013016:	e014      	b.n	8013042 <vQueueAddToRegistry+0x3a>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 8013018:	4a0f      	ldr	r2, [pc, #60]	@ (8013058 <vQueueAddToRegistry+0x50>)
 801301a:	68fb      	ldr	r3, [r7, #12]
 801301c:	f852 3033 	ldr.w	r3, [r2, r3, lsl #3]
 8013020:	2b00      	cmp	r3, #0
 8013022:	d10b      	bne.n	801303c <vQueueAddToRegistry+0x34>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 8013024:	490c      	ldr	r1, [pc, #48]	@ (8013058 <vQueueAddToRegistry+0x50>)
 8013026:	68fb      	ldr	r3, [r7, #12]
 8013028:	683a      	ldr	r2, [r7, #0]
 801302a:	f841 2033 	str.w	r2, [r1, r3, lsl #3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 801302e:	4a0a      	ldr	r2, [pc, #40]	@ (8013058 <vQueueAddToRegistry+0x50>)
 8013030:	68fb      	ldr	r3, [r7, #12]
 8013032:	00db      	lsls	r3, r3, #3
 8013034:	4413      	add	r3, r2
 8013036:	687a      	ldr	r2, [r7, #4]
 8013038:	605a      	str	r2, [r3, #4]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 801303a:	e006      	b.n	801304a <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 801303c:	68fb      	ldr	r3, [r7, #12]
 801303e:	3301      	adds	r3, #1
 8013040:	60fb      	str	r3, [r7, #12]
 8013042:	68fb      	ldr	r3, [r7, #12]
 8013044:	2b07      	cmp	r3, #7
 8013046:	d9e7      	bls.n	8013018 <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 8013048:	bf00      	nop
 801304a:	bf00      	nop
 801304c:	3714      	adds	r7, #20
 801304e:	46bd      	mov	sp, r7
 8013050:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013054:	4770      	bx	lr
 8013056:	bf00      	nop
 8013058:	24003d30 	.word	0x24003d30

0801305c <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueUnregisterQueue( QueueHandle_t xQueue )
	{
 801305c:	b480      	push	{r7}
 801305e:	b085      	sub	sp, #20
 8013060:	af00      	add	r7, sp, #0
 8013062:	6078      	str	r0, [r7, #4]
	UBaseType_t ux;

		/* See if the handle of the queue being unregistered in actually in the
		registry. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013064:	2300      	movs	r3, #0
 8013066:	60fb      	str	r3, [r7, #12]
 8013068:	e016      	b.n	8013098 <vQueueUnregisterQueue+0x3c>
		{
			if( xQueueRegistry[ ux ].xHandle == xQueue )
 801306a:	4a10      	ldr	r2, [pc, #64]	@ (80130ac <vQueueUnregisterQueue+0x50>)
 801306c:	68fb      	ldr	r3, [r7, #12]
 801306e:	00db      	lsls	r3, r3, #3
 8013070:	4413      	add	r3, r2
 8013072:	685b      	ldr	r3, [r3, #4]
 8013074:	687a      	ldr	r2, [r7, #4]
 8013076:	429a      	cmp	r2, r3
 8013078:	d10b      	bne.n	8013092 <vQueueUnregisterQueue+0x36>
			{
				/* Set the name to NULL to show that this slot if free again. */
				xQueueRegistry[ ux ].pcQueueName = NULL;
 801307a:	4a0c      	ldr	r2, [pc, #48]	@ (80130ac <vQueueUnregisterQueue+0x50>)
 801307c:	68fb      	ldr	r3, [r7, #12]
 801307e:	2100      	movs	r1, #0
 8013080:	f842 1033 	str.w	r1, [r2, r3, lsl #3]

				/* Set the handle to NULL to ensure the same queue handle cannot
				appear in the registry twice if it is added, removed, then
				added again. */
				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 8013084:	4a09      	ldr	r2, [pc, #36]	@ (80130ac <vQueueUnregisterQueue+0x50>)
 8013086:	68fb      	ldr	r3, [r7, #12]
 8013088:	00db      	lsls	r3, r3, #3
 801308a:	4413      	add	r3, r2
 801308c:	2200      	movs	r2, #0
 801308e:	605a      	str	r2, [r3, #4]
				break;
 8013090:	e006      	b.n	80130a0 <vQueueUnregisterQueue+0x44>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013092:	68fb      	ldr	r3, [r7, #12]
 8013094:	3301      	adds	r3, #1
 8013096:	60fb      	str	r3, [r7, #12]
 8013098:	68fb      	ldr	r3, [r7, #12]
 801309a:	2b07      	cmp	r3, #7
 801309c:	d9e5      	bls.n	801306a <vQueueUnregisterQueue+0xe>
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 801309e:	bf00      	nop
 80130a0:	bf00      	nop
 80130a2:	3714      	adds	r7, #20
 80130a4:	46bd      	mov	sp, r7
 80130a6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80130aa:	4770      	bx	lr
 80130ac:	24003d30 	.word	0x24003d30

080130b0 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 80130b0:	b580      	push	{r7, lr}
 80130b2:	b086      	sub	sp, #24
 80130b4:	af00      	add	r7, sp, #0
 80130b6:	60f8      	str	r0, [r7, #12]
 80130b8:	60b9      	str	r1, [r7, #8]
 80130ba:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = xQueue;
 80130bc:	68fb      	ldr	r3, [r7, #12]
 80130be:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 80130c0:	f002 fbfa 	bl	80158b8 <vPortEnterCritical>
 80130c4:	697b      	ldr	r3, [r7, #20]
 80130c6:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80130ca:	b25b      	sxtb	r3, r3
 80130cc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80130d0:	d103      	bne.n	80130da <vQueueWaitForMessageRestricted+0x2a>
 80130d2:	697b      	ldr	r3, [r7, #20]
 80130d4:	2200      	movs	r2, #0
 80130d6:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80130da:	697b      	ldr	r3, [r7, #20]
 80130dc:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80130e0:	b25b      	sxtb	r3, r3
 80130e2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80130e6:	d103      	bne.n	80130f0 <vQueueWaitForMessageRestricted+0x40>
 80130e8:	697b      	ldr	r3, [r7, #20]
 80130ea:	2200      	movs	r2, #0
 80130ec:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80130f0:	f002 fc14 	bl	801591c <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 80130f4:	697b      	ldr	r3, [r7, #20]
 80130f6:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80130f8:	2b00      	cmp	r3, #0
 80130fa:	d106      	bne.n	801310a <vQueueWaitForMessageRestricted+0x5a>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 80130fc:	697b      	ldr	r3, [r7, #20]
 80130fe:	3324      	adds	r3, #36	@ 0x24
 8013100:	687a      	ldr	r2, [r7, #4]
 8013102:	68b9      	ldr	r1, [r7, #8]
 8013104:	4618      	mov	r0, r3
 8013106:	f001 f825 	bl	8014154 <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 801310a:	6978      	ldr	r0, [r7, #20]
 801310c:	f7ff fefc 	bl	8012f08 <prvUnlockQueue>
	}
 8013110:	bf00      	nop
 8013112:	3718      	adds	r7, #24
 8013114:	46bd      	mov	sp, r7
 8013116:	bd80      	pop	{r7, pc}

08013118 <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
	{
 8013118:	b580      	push	{r7, lr}
 801311a:	b08c      	sub	sp, #48	@ 0x30
 801311c:	af02      	add	r7, sp, #8
 801311e:	60f8      	str	r0, [r7, #12]
 8013120:	60b9      	str	r1, [r7, #8]
 8013122:	607a      	str	r2, [r7, #4]

		/* In case the stream buffer is going to be used as a message buffer
		(that is, it will hold discrete messages with a little meta data that
		says how big the next message is) check the buffer will be large enough
		to hold at least one message. */
		if( xIsMessageBuffer == pdTRUE )
 8013124:	687b      	ldr	r3, [r7, #4]
 8013126:	2b01      	cmp	r3, #1
 8013128:	d111      	bne.n	801314e <xStreamBufferGenericCreate+0x36>
		{
			/* Is a message buffer but not statically allocated. */
			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 801312a:	2301      	movs	r3, #1
 801312c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8013130:	68fb      	ldr	r3, [r7, #12]
 8013132:	2b04      	cmp	r3, #4
 8013134:	d81d      	bhi.n	8013172 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 8013136:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801313a:	f383 8811 	msr	BASEPRI, r3
 801313e:	f3bf 8f6f 	isb	sy
 8013142:	f3bf 8f4f 	dsb	sy
 8013146:	61fb      	str	r3, [r7, #28]
}
 8013148:	bf00      	nop
 801314a:	bf00      	nop
 801314c:	e7fd      	b.n	801314a <xStreamBufferGenericCreate+0x32>
		}
		else
		{
			/* Not a message buffer and not statically allocated. */
			ucFlags = 0;
 801314e:	2300      	movs	r3, #0
 8013150:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > 0 );
 8013154:	68fb      	ldr	r3, [r7, #12]
 8013156:	2b00      	cmp	r3, #0
 8013158:	d10b      	bne.n	8013172 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 801315a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801315e:	f383 8811 	msr	BASEPRI, r3
 8013162:	f3bf 8f6f 	isb	sy
 8013166:	f3bf 8f4f 	dsb	sy
 801316a:	61bb      	str	r3, [r7, #24]
}
 801316c:	bf00      	nop
 801316e:	bf00      	nop
 8013170:	e7fd      	b.n	801316e <xStreamBufferGenericCreate+0x56>
		}
		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 8013172:	68ba      	ldr	r2, [r7, #8]
 8013174:	68fb      	ldr	r3, [r7, #12]
 8013176:	429a      	cmp	r2, r3
 8013178:	d90b      	bls.n	8013192 <xStreamBufferGenericCreate+0x7a>
	__asm volatile
 801317a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801317e:	f383 8811 	msr	BASEPRI, r3
 8013182:	f3bf 8f6f 	isb	sy
 8013186:	f3bf 8f4f 	dsb	sy
 801318a:	617b      	str	r3, [r7, #20]
}
 801318c:	bf00      	nop
 801318e:	bf00      	nop
 8013190:	e7fd      	b.n	801318e <xStreamBufferGenericCreate+0x76>

		/* A trigger level of 0 would cause a waiting task to unblock even when
		the buffer was empty. */
		if( xTriggerLevelBytes == ( size_t ) 0 )
 8013192:	68bb      	ldr	r3, [r7, #8]
 8013194:	2b00      	cmp	r3, #0
 8013196:	d101      	bne.n	801319c <xStreamBufferGenericCreate+0x84>
		{
			xTriggerLevelBytes = ( size_t ) 1;
 8013198:	2301      	movs	r3, #1
 801319a:	60bb      	str	r3, [r7, #8]
		and the buffer follows immediately after.  The requested size is
		incremented so the free space is returned as the user would expect -
		this is a quirk of the implementation that means otherwise the free
		space would be reported as one byte smaller than would be logically
		expected. */
		xBufferSizeBytes++;
 801319c:	68fb      	ldr	r3, [r7, #12]
 801319e:	3301      	adds	r3, #1
 80131a0:	60fb      	str	r3, [r7, #12]
		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 80131a2:	68fb      	ldr	r3, [r7, #12]
 80131a4:	3324      	adds	r3, #36	@ 0x24
 80131a6:	4618      	mov	r0, r3
 80131a8:	f002 fca8 	bl	8015afc <pvPortMalloc>
 80131ac:	6238      	str	r0, [r7, #32]

		if( pucAllocatedMemory != NULL )
 80131ae:	6a3b      	ldr	r3, [r7, #32]
 80131b0:	2b00      	cmp	r3, #0
 80131b2:	d00a      	beq.n	80131ca <xStreamBufferGenericCreate+0xb2>
		{
			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 80131b4:	6a3b      	ldr	r3, [r7, #32]
 80131b6:	f103 0124 	add.w	r1, r3, #36	@ 0x24
 80131ba:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80131be:	9300      	str	r3, [sp, #0]
 80131c0:	68bb      	ldr	r3, [r7, #8]
 80131c2:	68fa      	ldr	r2, [r7, #12]
 80131c4:	6a38      	ldr	r0, [r7, #32]
 80131c6:	f000 fb0b 	bl	80137e0 <prvInitialiseNewStreamBuffer>
		else
		{
			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
		}

		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 80131ca:	6a3b      	ldr	r3, [r7, #32]
	}
 80131cc:	4618      	mov	r0, r3
 80131ce:	3728      	adds	r7, #40	@ 0x28
 80131d0:	46bd      	mov	sp, r7
 80131d2:	bd80      	pop	{r7, pc}

080131d4 <xStreamBufferSpacesAvailable>:
	return xReturn;
}
/*-----------------------------------------------------------*/

size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
 80131d4:	b480      	push	{r7}
 80131d6:	b087      	sub	sp, #28
 80131d8:	af00      	add	r7, sp, #0
 80131da:	6078      	str	r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 80131dc:	687b      	ldr	r3, [r7, #4]
 80131de:	613b      	str	r3, [r7, #16]
size_t xSpace;

	configASSERT( pxStreamBuffer );
 80131e0:	693b      	ldr	r3, [r7, #16]
 80131e2:	2b00      	cmp	r3, #0
 80131e4:	d10b      	bne.n	80131fe <xStreamBufferSpacesAvailable+0x2a>
	__asm volatile
 80131e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80131ea:	f383 8811 	msr	BASEPRI, r3
 80131ee:	f3bf 8f6f 	isb	sy
 80131f2:	f3bf 8f4f 	dsb	sy
 80131f6:	60fb      	str	r3, [r7, #12]
}
 80131f8:	bf00      	nop
 80131fa:	bf00      	nop
 80131fc:	e7fd      	b.n	80131fa <xStreamBufferSpacesAvailable+0x26>

	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 80131fe:	693b      	ldr	r3, [r7, #16]
 8013200:	689a      	ldr	r2, [r3, #8]
 8013202:	693b      	ldr	r3, [r7, #16]
 8013204:	681b      	ldr	r3, [r3, #0]
 8013206:	4413      	add	r3, r2
 8013208:	617b      	str	r3, [r7, #20]
	xSpace -= pxStreamBuffer->xHead;
 801320a:	693b      	ldr	r3, [r7, #16]
 801320c:	685b      	ldr	r3, [r3, #4]
 801320e:	697a      	ldr	r2, [r7, #20]
 8013210:	1ad3      	subs	r3, r2, r3
 8013212:	617b      	str	r3, [r7, #20]
	xSpace -= ( size_t ) 1;
 8013214:	697b      	ldr	r3, [r7, #20]
 8013216:	3b01      	subs	r3, #1
 8013218:	617b      	str	r3, [r7, #20]

	if( xSpace >= pxStreamBuffer->xLength )
 801321a:	693b      	ldr	r3, [r7, #16]
 801321c:	689b      	ldr	r3, [r3, #8]
 801321e:	697a      	ldr	r2, [r7, #20]
 8013220:	429a      	cmp	r2, r3
 8013222:	d304      	bcc.n	801322e <xStreamBufferSpacesAvailable+0x5a>
	{
		xSpace -= pxStreamBuffer->xLength;
 8013224:	693b      	ldr	r3, [r7, #16]
 8013226:	689b      	ldr	r3, [r3, #8]
 8013228:	697a      	ldr	r2, [r7, #20]
 801322a:	1ad3      	subs	r3, r2, r3
 801322c:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xSpace;
 801322e:	697b      	ldr	r3, [r7, #20]
}
 8013230:	4618      	mov	r0, r3
 8013232:	371c      	adds	r7, #28
 8013234:	46bd      	mov	sp, r7
 8013236:	f85d 7b04 	ldr.w	r7, [sp], #4
 801323a:	4770      	bx	lr

0801323c <xStreamBufferSend>:

size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
						  const void *pvTxData,
						  size_t xDataLengthBytes,
						  TickType_t xTicksToWait )
{
 801323c:	b580      	push	{r7, lr}
 801323e:	b090      	sub	sp, #64	@ 0x40
 8013240:	af02      	add	r7, sp, #8
 8013242:	60f8      	str	r0, [r7, #12]
 8013244:	60b9      	str	r1, [r7, #8]
 8013246:	607a      	str	r2, [r7, #4]
 8013248:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 801324a:	68fb      	ldr	r3, [r7, #12]
 801324c:	62fb      	str	r3, [r7, #44]	@ 0x2c
size_t xReturn, xSpace = 0;
 801324e:	2300      	movs	r3, #0
 8013250:	637b      	str	r3, [r7, #52]	@ 0x34
size_t xRequiredSpace = xDataLengthBytes;
 8013252:	687b      	ldr	r3, [r7, #4]
 8013254:	633b      	str	r3, [r7, #48]	@ 0x30
TimeOut_t xTimeOut;

	configASSERT( pvTxData );
 8013256:	68bb      	ldr	r3, [r7, #8]
 8013258:	2b00      	cmp	r3, #0
 801325a:	d10b      	bne.n	8013274 <xStreamBufferSend+0x38>
	__asm volatile
 801325c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013260:	f383 8811 	msr	BASEPRI, r3
 8013264:	f3bf 8f6f 	isb	sy
 8013268:	f3bf 8f4f 	dsb	sy
 801326c:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801326e:	bf00      	nop
 8013270:	bf00      	nop
 8013272:	e7fd      	b.n	8013270 <xStreamBufferSend+0x34>
	configASSERT( pxStreamBuffer );
 8013274:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013276:	2b00      	cmp	r3, #0
 8013278:	d10b      	bne.n	8013292 <xStreamBufferSend+0x56>
	__asm volatile
 801327a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801327e:	f383 8811 	msr	BASEPRI, r3
 8013282:	f3bf 8f6f 	isb	sy
 8013286:	f3bf 8f4f 	dsb	sy
 801328a:	623b      	str	r3, [r7, #32]
}
 801328c:	bf00      	nop
 801328e:	bf00      	nop
 8013290:	e7fd      	b.n	801328e <xStreamBufferSend+0x52>

	/* This send function is used to write to both message buffers and stream
	buffers.  If this is a message buffer then the space needed must be
	increased by the amount of bytes needed to store the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 8013292:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013294:	7f1b      	ldrb	r3, [r3, #28]
 8013296:	f003 0301 	and.w	r3, r3, #1
 801329a:	2b00      	cmp	r3, #0
 801329c:	d012      	beq.n	80132c4 <xStreamBufferSend+0x88>
	{
		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 801329e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80132a0:	3304      	adds	r3, #4
 80132a2:	633b      	str	r3, [r7, #48]	@ 0x30

		/* Overflow? */
		configASSERT( xRequiredSpace > xDataLengthBytes );
 80132a4:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80132a6:	687b      	ldr	r3, [r7, #4]
 80132a8:	429a      	cmp	r2, r3
 80132aa:	d80b      	bhi.n	80132c4 <xStreamBufferSend+0x88>
	__asm volatile
 80132ac:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80132b0:	f383 8811 	msr	BASEPRI, r3
 80132b4:	f3bf 8f6f 	isb	sy
 80132b8:	f3bf 8f4f 	dsb	sy
 80132bc:	61fb      	str	r3, [r7, #28]
}
 80132be:	bf00      	nop
 80132c0:	bf00      	nop
 80132c2:	e7fd      	b.n	80132c0 <xStreamBufferSend+0x84>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 80132c4:	683b      	ldr	r3, [r7, #0]
 80132c6:	2b00      	cmp	r3, #0
 80132c8:	d03f      	beq.n	801334a <xStreamBufferSend+0x10e>
	{
		vTaskSetTimeOutState( &xTimeOut );
 80132ca:	f107 0310 	add.w	r3, r7, #16
 80132ce:	4618      	mov	r0, r3
 80132d0:	f000 ffd0 	bl	8014274 <vTaskSetTimeOutState>

		do
		{
			/* Wait until the required number of bytes are free in the message
			buffer. */
			taskENTER_CRITICAL();
 80132d4:	f002 faf0 	bl	80158b8 <vPortEnterCritical>
			{
				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 80132d8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80132da:	f7ff ff7b 	bl	80131d4 <xStreamBufferSpacesAvailable>
 80132de:	6378      	str	r0, [r7, #52]	@ 0x34

				if( xSpace < xRequiredSpace )
 80132e0:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 80132e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80132e4:	429a      	cmp	r2, r3
 80132e6:	d218      	bcs.n	801331a <xStreamBufferSend+0xde>
				{
					/* Clear notification state as going to wait for space. */
					( void ) xTaskNotifyStateClear( NULL );
 80132e8:	2000      	movs	r0, #0
 80132ea:	f001 fcf3 	bl	8014cd4 <xTaskNotifyStateClear>

					/* Should only be one writer. */
					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 80132ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80132f0:	695b      	ldr	r3, [r3, #20]
 80132f2:	2b00      	cmp	r3, #0
 80132f4:	d00b      	beq.n	801330e <xStreamBufferSend+0xd2>
	__asm volatile
 80132f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80132fa:	f383 8811 	msr	BASEPRI, r3
 80132fe:	f3bf 8f6f 	isb	sy
 8013302:	f3bf 8f4f 	dsb	sy
 8013306:	61bb      	str	r3, [r7, #24]
}
 8013308:	bf00      	nop
 801330a:	bf00      	nop
 801330c:	e7fd      	b.n	801330a <xStreamBufferSend+0xce>
					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 801330e:	f001 f93b 	bl	8014588 <xTaskGetCurrentTaskHandle>
 8013312:	4602      	mov	r2, r0
 8013314:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013316:	615a      	str	r2, [r3, #20]
 8013318:	e002      	b.n	8013320 <xStreamBufferSend+0xe4>
				}
				else
				{
					taskEXIT_CRITICAL();
 801331a:	f002 faff 	bl	801591c <vPortExitCritical>
					break;
 801331e:	e014      	b.n	801334a <xStreamBufferSend+0x10e>
				}
			}
			taskEXIT_CRITICAL();
 8013320:	f002 fafc 	bl	801591c <vPortExitCritical>

			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 8013324:	683b      	ldr	r3, [r7, #0]
 8013326:	2200      	movs	r2, #0
 8013328:	2100      	movs	r1, #0
 801332a:	2000      	movs	r0, #0
 801332c:	f001 faca 	bl	80148c4 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToSend = NULL;
 8013330:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013332:	2200      	movs	r2, #0
 8013334:	615a      	str	r2, [r3, #20]

		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 8013336:	463a      	mov	r2, r7
 8013338:	f107 0310 	add.w	r3, r7, #16
 801333c:	4611      	mov	r1, r2
 801333e:	4618      	mov	r0, r3
 8013340:	f000 ffd6 	bl	80142f0 <xTaskCheckForTimeOut>
 8013344:	4603      	mov	r3, r0
 8013346:	2b00      	cmp	r3, #0
 8013348:	d0c4      	beq.n	80132d4 <xStreamBufferSend+0x98>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xSpace == ( size_t ) 0 )
 801334a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801334c:	2b00      	cmp	r3, #0
 801334e:	d103      	bne.n	8013358 <xStreamBufferSend+0x11c>
	{
		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 8013350:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013352:	f7ff ff3f 	bl	80131d4 <xStreamBufferSpacesAvailable>
 8013356:	6378      	str	r0, [r7, #52]	@ 0x34
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 8013358:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801335a:	9300      	str	r3, [sp, #0]
 801335c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801335e:	687a      	ldr	r2, [r7, #4]
 8013360:	68b9      	ldr	r1, [r7, #8]
 8013362:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013364:	f000 f823 	bl	80133ae <prvWriteMessageToBuffer>
 8013368:	62b8      	str	r0, [r7, #40]	@ 0x28

	if( xReturn > ( size_t ) 0 )
 801336a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801336c:	2b00      	cmp	r3, #0
 801336e:	d019      	beq.n	80133a4 <xStreamBufferSend+0x168>
	{
		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );

		/* Was a task waiting for the data? */
		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 8013370:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013372:	f000 fa15 	bl	80137a0 <prvBytesInBuffer>
 8013376:	4602      	mov	r2, r0
 8013378:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801337a:	68db      	ldr	r3, [r3, #12]
 801337c:	429a      	cmp	r2, r3
 801337e:	d311      	bcc.n	80133a4 <xStreamBufferSend+0x168>
		{
			sbSEND_COMPLETED( pxStreamBuffer );
 8013380:	f000 fcc6 	bl	8013d10 <vTaskSuspendAll>
 8013384:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013386:	691b      	ldr	r3, [r3, #16]
 8013388:	2b00      	cmp	r3, #0
 801338a:	d009      	beq.n	80133a0 <xStreamBufferSend+0x164>
 801338c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801338e:	6918      	ldr	r0, [r3, #16]
 8013390:	2300      	movs	r3, #0
 8013392:	2200      	movs	r2, #0
 8013394:	2100      	movs	r1, #0
 8013396:	f001 faf5 	bl	8014984 <xTaskGenericNotify>
 801339a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801339c:	2200      	movs	r2, #0
 801339e:	611a      	str	r2, [r3, #16]
 80133a0:	f000 fcc4 	bl	8013d2c <xTaskResumeAll>
	{
		mtCOVERAGE_TEST_MARKER();
		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
	}

	return xReturn;
 80133a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 80133a6:	4618      	mov	r0, r3
 80133a8:	3738      	adds	r7, #56	@ 0x38
 80133aa:	46bd      	mov	sp, r7
 80133ac:	bd80      	pop	{r7, pc}

080133ae <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
									   const void * pvTxData,
									   size_t xDataLengthBytes,
									   size_t xSpace,
									   size_t xRequiredSpace )
{
 80133ae:	b580      	push	{r7, lr}
 80133b0:	b086      	sub	sp, #24
 80133b2:	af00      	add	r7, sp, #0
 80133b4:	60f8      	str	r0, [r7, #12]
 80133b6:	60b9      	str	r1, [r7, #8]
 80133b8:	607a      	str	r2, [r7, #4]
 80133ba:	603b      	str	r3, [r7, #0]
	BaseType_t xShouldWrite;
	size_t xReturn;

	if( xSpace == ( size_t ) 0 )
 80133bc:	683b      	ldr	r3, [r7, #0]
 80133be:	2b00      	cmp	r3, #0
 80133c0:	d102      	bne.n	80133c8 <prvWriteMessageToBuffer+0x1a>
	{
		/* Doesn't matter if this is a stream buffer or a message buffer, there
		is no space to write. */
		xShouldWrite = pdFALSE;
 80133c2:	2300      	movs	r3, #0
 80133c4:	617b      	str	r3, [r7, #20]
 80133c6:	e01d      	b.n	8013404 <prvWriteMessageToBuffer+0x56>
	}
	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
 80133c8:	68fb      	ldr	r3, [r7, #12]
 80133ca:	7f1b      	ldrb	r3, [r3, #28]
 80133cc:	f003 0301 	and.w	r3, r3, #1
 80133d0:	2b00      	cmp	r3, #0
 80133d2:	d108      	bne.n	80133e6 <prvWriteMessageToBuffer+0x38>
	{
		/* This is a stream buffer, as opposed to a message buffer, so writing a
		stream of bytes rather than discrete messages.  Write as many bytes as
		possible. */
		xShouldWrite = pdTRUE;
 80133d4:	2301      	movs	r3, #1
 80133d6:	617b      	str	r3, [r7, #20]
		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 80133d8:	687a      	ldr	r2, [r7, #4]
 80133da:	683b      	ldr	r3, [r7, #0]
 80133dc:	4293      	cmp	r3, r2
 80133de:	bf28      	it	cs
 80133e0:	4613      	movcs	r3, r2
 80133e2:	607b      	str	r3, [r7, #4]
 80133e4:	e00e      	b.n	8013404 <prvWriteMessageToBuffer+0x56>
	}
	else if( xSpace >= xRequiredSpace )
 80133e6:	683a      	ldr	r2, [r7, #0]
 80133e8:	6a3b      	ldr	r3, [r7, #32]
 80133ea:	429a      	cmp	r2, r3
 80133ec:	d308      	bcc.n	8013400 <prvWriteMessageToBuffer+0x52>
	{
		/* This is a message buffer, as opposed to a stream buffer, and there
		is enough space to write both the message length and the message itself
		into the buffer.  Start by writing the length of the data, the data
		itself will be written later in this function. */
		xShouldWrite = pdTRUE;
 80133ee:	2301      	movs	r3, #1
 80133f0:	617b      	str	r3, [r7, #20]
		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
 80133f2:	1d3b      	adds	r3, r7, #4
 80133f4:	2204      	movs	r2, #4
 80133f6:	4619      	mov	r1, r3
 80133f8:	68f8      	ldr	r0, [r7, #12]
 80133fa:	f000 f8df 	bl	80135bc <prvWriteBytesToBuffer>
 80133fe:	e001      	b.n	8013404 <prvWriteMessageToBuffer+0x56>
	}
	else
	{
		/* There is space available, but not enough space. */
		xShouldWrite = pdFALSE;
 8013400:	2300      	movs	r3, #0
 8013402:	617b      	str	r3, [r7, #20]
	}

	if( xShouldWrite != pdFALSE )
 8013404:	697b      	ldr	r3, [r7, #20]
 8013406:	2b00      	cmp	r3, #0
 8013408:	d007      	beq.n	801341a <prvWriteMessageToBuffer+0x6c>
	{
		/* Writes the data itself. */
		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
 801340a:	687b      	ldr	r3, [r7, #4]
 801340c:	461a      	mov	r2, r3
 801340e:	68b9      	ldr	r1, [r7, #8]
 8013410:	68f8      	ldr	r0, [r7, #12]
 8013412:	f000 f8d3 	bl	80135bc <prvWriteBytesToBuffer>
 8013416:	6138      	str	r0, [r7, #16]
 8013418:	e001      	b.n	801341e <prvWriteMessageToBuffer+0x70>
	}
	else
	{
		xReturn = 0;
 801341a:	2300      	movs	r3, #0
 801341c:	613b      	str	r3, [r7, #16]
	}

	return xReturn;
 801341e:	693b      	ldr	r3, [r7, #16]
}
 8013420:	4618      	mov	r0, r3
 8013422:	3718      	adds	r7, #24
 8013424:	46bd      	mov	sp, r7
 8013426:	bd80      	pop	{r7, pc}

08013428 <xStreamBufferReceive>:

size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
							 void *pvRxData,
							 size_t xBufferLengthBytes,
							 TickType_t xTicksToWait )
{
 8013428:	b580      	push	{r7, lr}
 801342a:	b08e      	sub	sp, #56	@ 0x38
 801342c:	af02      	add	r7, sp, #8
 801342e:	60f8      	str	r0, [r7, #12]
 8013430:	60b9      	str	r1, [r7, #8]
 8013432:	607a      	str	r2, [r7, #4]
 8013434:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 8013436:	68fb      	ldr	r3, [r7, #12]
 8013438:	623b      	str	r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 801343a:	2300      	movs	r3, #0
 801343c:	62fb      	str	r3, [r7, #44]	@ 0x2c

	configASSERT( pvRxData );
 801343e:	68bb      	ldr	r3, [r7, #8]
 8013440:	2b00      	cmp	r3, #0
 8013442:	d10b      	bne.n	801345c <xStreamBufferReceive+0x34>
	__asm volatile
 8013444:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013448:	f383 8811 	msr	BASEPRI, r3
 801344c:	f3bf 8f6f 	isb	sy
 8013450:	f3bf 8f4f 	dsb	sy
 8013454:	61fb      	str	r3, [r7, #28]
}
 8013456:	bf00      	nop
 8013458:	bf00      	nop
 801345a:	e7fd      	b.n	8013458 <xStreamBufferReceive+0x30>
	configASSERT( pxStreamBuffer );
 801345c:	6a3b      	ldr	r3, [r7, #32]
 801345e:	2b00      	cmp	r3, #0
 8013460:	d10b      	bne.n	801347a <xStreamBufferReceive+0x52>
	__asm volatile
 8013462:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013466:	f383 8811 	msr	BASEPRI, r3
 801346a:	f3bf 8f6f 	isb	sy
 801346e:	f3bf 8f4f 	dsb	sy
 8013472:	61bb      	str	r3, [r7, #24]
}
 8013474:	bf00      	nop
 8013476:	bf00      	nop
 8013478:	e7fd      	b.n	8013476 <xStreamBufferReceive+0x4e>
	/* This receive function is used by both message buffers, which store
	discrete messages, and stream buffers, which store a continuous stream of
	bytes.  Discrete messages include an additional
	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 801347a:	6a3b      	ldr	r3, [r7, #32]
 801347c:	7f1b      	ldrb	r3, [r3, #28]
 801347e:	f003 0301 	and.w	r3, r3, #1
 8013482:	2b00      	cmp	r3, #0
 8013484:	d002      	beq.n	801348c <xStreamBufferReceive+0x64>
	{
		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 8013486:	2304      	movs	r3, #4
 8013488:	627b      	str	r3, [r7, #36]	@ 0x24
 801348a:	e001      	b.n	8013490 <xStreamBufferReceive+0x68>
	}
	else
	{
		xBytesToStoreMessageLength = 0;
 801348c:	2300      	movs	r3, #0
 801348e:	627b      	str	r3, [r7, #36]	@ 0x24
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8013490:	683b      	ldr	r3, [r7, #0]
 8013492:	2b00      	cmp	r3, #0
 8013494:	d035      	beq.n	8013502 <xStreamBufferReceive+0xda>
	{
		/* Checking if there is data and clearing the notification state must be
		performed atomically. */
		taskENTER_CRITICAL();
 8013496:	f002 fa0f 	bl	80158b8 <vPortEnterCritical>
		{
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 801349a:	6a38      	ldr	r0, [r7, #32]
 801349c:	f000 f980 	bl	80137a0 <prvBytesInBuffer>
 80134a0:	62b8      	str	r0, [r7, #40]	@ 0x28
			/* If this function was invoked by a message buffer read then
			xBytesToStoreMessageLength holds the number of bytes used to hold
			the length of the next discrete message.  If this function was
			invoked by a stream buffer read then xBytesToStoreMessageLength will
			be 0. */
			if( xBytesAvailable <= xBytesToStoreMessageLength )
 80134a2:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80134a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80134a6:	429a      	cmp	r2, r3
 80134a8:	d817      	bhi.n	80134da <xStreamBufferReceive+0xb2>
			{
				/* Clear notification state as going to wait for data. */
				( void ) xTaskNotifyStateClear( NULL );
 80134aa:	2000      	movs	r0, #0
 80134ac:	f001 fc12 	bl	8014cd4 <xTaskNotifyStateClear>

				/* Should only be one reader. */
				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 80134b0:	6a3b      	ldr	r3, [r7, #32]
 80134b2:	691b      	ldr	r3, [r3, #16]
 80134b4:	2b00      	cmp	r3, #0
 80134b6:	d00b      	beq.n	80134d0 <xStreamBufferReceive+0xa8>
	__asm volatile
 80134b8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80134bc:	f383 8811 	msr	BASEPRI, r3
 80134c0:	f3bf 8f6f 	isb	sy
 80134c4:	f3bf 8f4f 	dsb	sy
 80134c8:	617b      	str	r3, [r7, #20]
}
 80134ca:	bf00      	nop
 80134cc:	bf00      	nop
 80134ce:	e7fd      	b.n	80134cc <xStreamBufferReceive+0xa4>
				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 80134d0:	f001 f85a 	bl	8014588 <xTaskGetCurrentTaskHandle>
 80134d4:	4602      	mov	r2, r0
 80134d6:	6a3b      	ldr	r3, [r7, #32]
 80134d8:	611a      	str	r2, [r3, #16]
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 80134da:	f002 fa1f 	bl	801591c <vPortExitCritical>

		if( xBytesAvailable <= xBytesToStoreMessageLength )
 80134de:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80134e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80134e2:	429a      	cmp	r2, r3
 80134e4:	d811      	bhi.n	801350a <xStreamBufferReceive+0xe2>
		{
			/* Wait for data to be available. */
			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 80134e6:	683b      	ldr	r3, [r7, #0]
 80134e8:	2200      	movs	r2, #0
 80134ea:	2100      	movs	r1, #0
 80134ec:	2000      	movs	r0, #0
 80134ee:	f001 f9e9 	bl	80148c4 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToReceive = NULL;
 80134f2:	6a3b      	ldr	r3, [r7, #32]
 80134f4:	2200      	movs	r2, #0
 80134f6:	611a      	str	r2, [r3, #16]

			/* Recheck the data available after blocking. */
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 80134f8:	6a38      	ldr	r0, [r7, #32]
 80134fa:	f000 f951 	bl	80137a0 <prvBytesInBuffer>
 80134fe:	62b8      	str	r0, [r7, #40]	@ 0x28
 8013500:	e003      	b.n	801350a <xStreamBufferReceive+0xe2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8013502:	6a38      	ldr	r0, [r7, #32]
 8013504:	f000 f94c 	bl	80137a0 <prvBytesInBuffer>
 8013508:	62b8      	str	r0, [r7, #40]	@ 0x28
	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
	holds the number of bytes used to store the message length) or a stream of
	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
	available must be greater than xBytesToStoreMessageLength to be able to
	read bytes from the buffer. */
	if( xBytesAvailable > xBytesToStoreMessageLength )
 801350a:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801350c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801350e:	429a      	cmp	r2, r3
 8013510:	d91d      	bls.n	801354e <xStreamBufferReceive+0x126>
	{
		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 8013512:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013514:	9300      	str	r3, [sp, #0]
 8013516:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013518:	687a      	ldr	r2, [r7, #4]
 801351a:	68b9      	ldr	r1, [r7, #8]
 801351c:	6a38      	ldr	r0, [r7, #32]
 801351e:	f000 f81b 	bl	8013558 <prvReadMessageFromBuffer>
 8013522:	62f8      	str	r0, [r7, #44]	@ 0x2c

		/* Was a task waiting for space in the buffer? */
		if( xReceivedLength != ( size_t ) 0 )
 8013524:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013526:	2b00      	cmp	r3, #0
 8013528:	d011      	beq.n	801354e <xStreamBufferReceive+0x126>
		{
			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
			sbRECEIVE_COMPLETED( pxStreamBuffer );
 801352a:	f000 fbf1 	bl	8013d10 <vTaskSuspendAll>
 801352e:	6a3b      	ldr	r3, [r7, #32]
 8013530:	695b      	ldr	r3, [r3, #20]
 8013532:	2b00      	cmp	r3, #0
 8013534:	d009      	beq.n	801354a <xStreamBufferReceive+0x122>
 8013536:	6a3b      	ldr	r3, [r7, #32]
 8013538:	6958      	ldr	r0, [r3, #20]
 801353a:	2300      	movs	r3, #0
 801353c:	2200      	movs	r2, #0
 801353e:	2100      	movs	r1, #0
 8013540:	f001 fa20 	bl	8014984 <xTaskGenericNotify>
 8013544:	6a3b      	ldr	r3, [r7, #32]
 8013546:	2200      	movs	r2, #0
 8013548:	615a      	str	r2, [r3, #20]
 801354a:	f000 fbef 	bl	8013d2c <xTaskResumeAll>
	{
		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
		mtCOVERAGE_TEST_MARKER();
	}

	return xReceivedLength;
 801354e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8013550:	4618      	mov	r0, r3
 8013552:	3730      	adds	r7, #48	@ 0x30
 8013554:	46bd      	mov	sp, r7
 8013556:	bd80      	pop	{r7, pc}

08013558 <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
										void *pvRxData,
										size_t xBufferLengthBytes,
										size_t xBytesAvailable,
										size_t xBytesToStoreMessageLength )
{
 8013558:	b580      	push	{r7, lr}
 801355a:	b088      	sub	sp, #32
 801355c:	af00      	add	r7, sp, #0
 801355e:	60f8      	str	r0, [r7, #12]
 8013560:	60b9      	str	r1, [r7, #8]
 8013562:	607a      	str	r2, [r7, #4]
 8013564:	603b      	str	r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;

	if( xBytesToStoreMessageLength != ( size_t ) 0 )
 8013566:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013568:	2b00      	cmp	r3, #0
 801356a:	d019      	beq.n	80135a0 <prvReadMessageFromBuffer+0x48>
	{
		/* A discrete message is being received.  First receive the length
		of the message.  A copy of the tail is stored so the buffer can be
		returned to its prior state if the length of the message is too
		large for the provided buffer. */
		xOriginalTail = pxStreamBuffer->xTail;
 801356c:	68fb      	ldr	r3, [r7, #12]
 801356e:	681b      	ldr	r3, [r3, #0]
 8013570:	61bb      	str	r3, [r7, #24]
		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
 8013572:	f107 0110 	add.w	r1, r7, #16
 8013576:	683b      	ldr	r3, [r7, #0]
 8013578:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801357a:	68f8      	ldr	r0, [r7, #12]
 801357c:	f000 f893 	bl	80136a6 <prvReadBytesFromBuffer>
		xNextMessageLength = ( size_t ) xTempNextMessageLength;
 8013580:	693b      	ldr	r3, [r7, #16]
 8013582:	61fb      	str	r3, [r7, #28]

		/* Reduce the number of bytes available by the number of bytes just
		read out. */
		xBytesAvailable -= xBytesToStoreMessageLength;
 8013584:	683a      	ldr	r2, [r7, #0]
 8013586:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013588:	1ad3      	subs	r3, r2, r3
 801358a:	603b      	str	r3, [r7, #0]

		/* Check there is enough space in the buffer provided by the
		user. */
		if( xNextMessageLength > xBufferLengthBytes )
 801358c:	69fa      	ldr	r2, [r7, #28]
 801358e:	687b      	ldr	r3, [r7, #4]
 8013590:	429a      	cmp	r2, r3
 8013592:	d907      	bls.n	80135a4 <prvReadMessageFromBuffer+0x4c>
		{
			/* The user has provided insufficient space to read the message
			so return the buffer to its previous state (so the length of
			the message is in the buffer again). */
			pxStreamBuffer->xTail = xOriginalTail;
 8013594:	68fb      	ldr	r3, [r7, #12]
 8013596:	69ba      	ldr	r2, [r7, #24]
 8013598:	601a      	str	r2, [r3, #0]
			xNextMessageLength = 0;
 801359a:	2300      	movs	r3, #0
 801359c:	61fb      	str	r3, [r7, #28]
 801359e:	e001      	b.n	80135a4 <prvReadMessageFromBuffer+0x4c>
	}
	else
	{
		/* A stream of bytes is being received (as opposed to a discrete
		message), so read as many bytes as possible. */
		xNextMessageLength = xBufferLengthBytes;
 80135a0:	687b      	ldr	r3, [r7, #4]
 80135a2:	61fb      	str	r3, [r7, #28]
	}

	/* Read the actual data. */
	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 80135a4:	683b      	ldr	r3, [r7, #0]
 80135a6:	69fa      	ldr	r2, [r7, #28]
 80135a8:	68b9      	ldr	r1, [r7, #8]
 80135aa:	68f8      	ldr	r0, [r7, #12]
 80135ac:	f000 f87b 	bl	80136a6 <prvReadBytesFromBuffer>
 80135b0:	6178      	str	r0, [r7, #20]

	return xReceivedLength;
 80135b2:	697b      	ldr	r3, [r7, #20]
}
 80135b4:	4618      	mov	r0, r3
 80135b6:	3720      	adds	r7, #32
 80135b8:	46bd      	mov	sp, r7
 80135ba:	bd80      	pop	{r7, pc}

080135bc <prvWriteBytesToBuffer>:
	return xReturn;
}
/*-----------------------------------------------------------*/

static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
 80135bc:	b580      	push	{r7, lr}
 80135be:	b08a      	sub	sp, #40	@ 0x28
 80135c0:	af00      	add	r7, sp, #0
 80135c2:	60f8      	str	r0, [r7, #12]
 80135c4:	60b9      	str	r1, [r7, #8]
 80135c6:	607a      	str	r2, [r7, #4]
size_t xNextHead, xFirstLength;

	configASSERT( xCount > ( size_t ) 0 );
 80135c8:	687b      	ldr	r3, [r7, #4]
 80135ca:	2b00      	cmp	r3, #0
 80135cc:	d10b      	bne.n	80135e6 <prvWriteBytesToBuffer+0x2a>
	__asm volatile
 80135ce:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80135d2:	f383 8811 	msr	BASEPRI, r3
 80135d6:	f3bf 8f6f 	isb	sy
 80135da:	f3bf 8f4f 	dsb	sy
 80135de:	61fb      	str	r3, [r7, #28]
}
 80135e0:	bf00      	nop
 80135e2:	bf00      	nop
 80135e4:	e7fd      	b.n	80135e2 <prvWriteBytesToBuffer+0x26>

	xNextHead = pxStreamBuffer->xHead;
 80135e6:	68fb      	ldr	r3, [r7, #12]
 80135e8:	685b      	ldr	r3, [r3, #4]
 80135ea:	627b      	str	r3, [r7, #36]	@ 0x24

	/* Calculate the number of bytes that can be added in the first write -
	which may be less than the total number of bytes that need to be added if
	the buffer will wrap back to the beginning. */
	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 80135ec:	68fb      	ldr	r3, [r7, #12]
 80135ee:	689a      	ldr	r2, [r3, #8]
 80135f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80135f2:	1ad3      	subs	r3, r2, r3
 80135f4:	687a      	ldr	r2, [r7, #4]
 80135f6:	4293      	cmp	r3, r2
 80135f8:	bf28      	it	cs
 80135fa:	4613      	movcs	r3, r2
 80135fc:	623b      	str	r3, [r7, #32]

	/* Write as many bytes as can be written in the first write. */
	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
 80135fe:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013600:	6a3b      	ldr	r3, [r7, #32]
 8013602:	441a      	add	r2, r3
 8013604:	68fb      	ldr	r3, [r7, #12]
 8013606:	689b      	ldr	r3, [r3, #8]
 8013608:	429a      	cmp	r2, r3
 801360a:	d90b      	bls.n	8013624 <prvWriteBytesToBuffer+0x68>
	__asm volatile
 801360c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013610:	f383 8811 	msr	BASEPRI, r3
 8013614:	f3bf 8f6f 	isb	sy
 8013618:	f3bf 8f4f 	dsb	sy
 801361c:	61bb      	str	r3, [r7, #24]
}
 801361e:	bf00      	nop
 8013620:	bf00      	nop
 8013622:	e7fd      	b.n	8013620 <prvWriteBytesToBuffer+0x64>
	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013624:	68fb      	ldr	r3, [r7, #12]
 8013626:	699a      	ldr	r2, [r3, #24]
 8013628:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801362a:	4413      	add	r3, r2
 801362c:	6a3a      	ldr	r2, [r7, #32]
 801362e:	68b9      	ldr	r1, [r7, #8]
 8013630:	4618      	mov	r0, r3
 8013632:	f017 fb1c 	bl	802ac6e <memcpy>

	/* If the number of bytes written was less than the number that could be
	written in the first write... */
	if( xCount > xFirstLength )
 8013636:	687a      	ldr	r2, [r7, #4]
 8013638:	6a3b      	ldr	r3, [r7, #32]
 801363a:	429a      	cmp	r2, r3
 801363c:	d91d      	bls.n	801367a <prvWriteBytesToBuffer+0xbe>
	{
		/* ...then write the remaining bytes to the start of the buffer. */
		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 801363e:	687a      	ldr	r2, [r7, #4]
 8013640:	6a3b      	ldr	r3, [r7, #32]
 8013642:	1ad2      	subs	r2, r2, r3
 8013644:	68fb      	ldr	r3, [r7, #12]
 8013646:	689b      	ldr	r3, [r3, #8]
 8013648:	429a      	cmp	r2, r3
 801364a:	d90b      	bls.n	8013664 <prvWriteBytesToBuffer+0xa8>
	__asm volatile
 801364c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013650:	f383 8811 	msr	BASEPRI, r3
 8013654:	f3bf 8f6f 	isb	sy
 8013658:	f3bf 8f4f 	dsb	sy
 801365c:	617b      	str	r3, [r7, #20]
}
 801365e:	bf00      	nop
 8013660:	bf00      	nop
 8013662:	e7fd      	b.n	8013660 <prvWriteBytesToBuffer+0xa4>
		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013664:	68fb      	ldr	r3, [r7, #12]
 8013666:	6998      	ldr	r0, [r3, #24]
 8013668:	68ba      	ldr	r2, [r7, #8]
 801366a:	6a3b      	ldr	r3, [r7, #32]
 801366c:	18d1      	adds	r1, r2, r3
 801366e:	687a      	ldr	r2, [r7, #4]
 8013670:	6a3b      	ldr	r3, [r7, #32]
 8013672:	1ad3      	subs	r3, r2, r3
 8013674:	461a      	mov	r2, r3
 8013676:	f017 fafa 	bl	802ac6e <memcpy>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xNextHead += xCount;
 801367a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801367c:	687b      	ldr	r3, [r7, #4]
 801367e:	4413      	add	r3, r2
 8013680:	627b      	str	r3, [r7, #36]	@ 0x24
	if( xNextHead >= pxStreamBuffer->xLength )
 8013682:	68fb      	ldr	r3, [r7, #12]
 8013684:	689b      	ldr	r3, [r3, #8]
 8013686:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013688:	429a      	cmp	r2, r3
 801368a:	d304      	bcc.n	8013696 <prvWriteBytesToBuffer+0xda>
	{
		xNextHead -= pxStreamBuffer->xLength;
 801368c:	68fb      	ldr	r3, [r7, #12]
 801368e:	689b      	ldr	r3, [r3, #8]
 8013690:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013692:	1ad3      	subs	r3, r2, r3
 8013694:	627b      	str	r3, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxStreamBuffer->xHead = xNextHead;
 8013696:	68fb      	ldr	r3, [r7, #12]
 8013698:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801369a:	605a      	str	r2, [r3, #4]

	return xCount;
 801369c:	687b      	ldr	r3, [r7, #4]
}
 801369e:	4618      	mov	r0, r3
 80136a0:	3728      	adds	r7, #40	@ 0x28
 80136a2:	46bd      	mov	sp, r7
 80136a4:	bd80      	pop	{r7, pc}

080136a6 <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/

static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
 80136a6:	b580      	push	{r7, lr}
 80136a8:	b08a      	sub	sp, #40	@ 0x28
 80136aa:	af00      	add	r7, sp, #0
 80136ac:	60f8      	str	r0, [r7, #12]
 80136ae:	60b9      	str	r1, [r7, #8]
 80136b0:	607a      	str	r2, [r7, #4]
 80136b2:	603b      	str	r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;

	/* Use the minimum of the wanted bytes and the available bytes. */
	xCount = configMIN( xBytesAvailable, xMaxCount );
 80136b4:	687a      	ldr	r2, [r7, #4]
 80136b6:	683b      	ldr	r3, [r7, #0]
 80136b8:	4293      	cmp	r3, r2
 80136ba:	bf28      	it	cs
 80136bc:	4613      	movcs	r3, r2
 80136be:	623b      	str	r3, [r7, #32]

	if( xCount > ( size_t ) 0 )
 80136c0:	6a3b      	ldr	r3, [r7, #32]
 80136c2:	2b00      	cmp	r3, #0
 80136c4:	d067      	beq.n	8013796 <prvReadBytesFromBuffer+0xf0>
	{
		xNextTail = pxStreamBuffer->xTail;
 80136c6:	68fb      	ldr	r3, [r7, #12]
 80136c8:	681b      	ldr	r3, [r3, #0]
 80136ca:	627b      	str	r3, [r7, #36]	@ 0x24

		/* Calculate the number of bytes that can be read - which may be
		less than the number wanted if the data wraps around to the start of
		the buffer. */
		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 80136cc:	68fb      	ldr	r3, [r7, #12]
 80136ce:	689a      	ldr	r2, [r3, #8]
 80136d0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80136d2:	1ad3      	subs	r3, r2, r3
 80136d4:	6a3a      	ldr	r2, [r7, #32]
 80136d6:	4293      	cmp	r3, r2
 80136d8:	bf28      	it	cs
 80136da:	4613      	movcs	r3, r2
 80136dc:	61fb      	str	r3, [r7, #28]

		/* Obtain the number of bytes it is possible to obtain in the first
		read.  Asserts check bounds of read and write. */
		configASSERT( xFirstLength <= xMaxCount );
 80136de:	69fa      	ldr	r2, [r7, #28]
 80136e0:	687b      	ldr	r3, [r7, #4]
 80136e2:	429a      	cmp	r2, r3
 80136e4:	d90b      	bls.n	80136fe <prvReadBytesFromBuffer+0x58>
	__asm volatile
 80136e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80136ea:	f383 8811 	msr	BASEPRI, r3
 80136ee:	f3bf 8f6f 	isb	sy
 80136f2:	f3bf 8f4f 	dsb	sy
 80136f6:	61bb      	str	r3, [r7, #24]
}
 80136f8:	bf00      	nop
 80136fa:	bf00      	nop
 80136fc:	e7fd      	b.n	80136fa <prvReadBytesFromBuffer+0x54>
		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
 80136fe:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013700:	69fb      	ldr	r3, [r7, #28]
 8013702:	441a      	add	r2, r3
 8013704:	68fb      	ldr	r3, [r7, #12]
 8013706:	689b      	ldr	r3, [r3, #8]
 8013708:	429a      	cmp	r2, r3
 801370a:	d90b      	bls.n	8013724 <prvReadBytesFromBuffer+0x7e>
	__asm volatile
 801370c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013710:	f383 8811 	msr	BASEPRI, r3
 8013714:	f3bf 8f6f 	isb	sy
 8013718:	f3bf 8f4f 	dsb	sy
 801371c:	617b      	str	r3, [r7, #20]
}
 801371e:	bf00      	nop
 8013720:	bf00      	nop
 8013722:	e7fd      	b.n	8013720 <prvReadBytesFromBuffer+0x7a>
		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013724:	68fb      	ldr	r3, [r7, #12]
 8013726:	699a      	ldr	r2, [r3, #24]
 8013728:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801372a:	4413      	add	r3, r2
 801372c:	69fa      	ldr	r2, [r7, #28]
 801372e:	4619      	mov	r1, r3
 8013730:	68b8      	ldr	r0, [r7, #8]
 8013732:	f017 fa9c 	bl	802ac6e <memcpy>

		/* If the total number of wanted bytes is greater than the number
		that could be read in the first read... */
		if( xCount > xFirstLength )
 8013736:	6a3a      	ldr	r2, [r7, #32]
 8013738:	69fb      	ldr	r3, [r7, #28]
 801373a:	429a      	cmp	r2, r3
 801373c:	d91a      	bls.n	8013774 <prvReadBytesFromBuffer+0xce>
		{
			/*...then read the remaining bytes from the start of the buffer. */
			configASSERT( xCount <= xMaxCount );
 801373e:	6a3a      	ldr	r2, [r7, #32]
 8013740:	687b      	ldr	r3, [r7, #4]
 8013742:	429a      	cmp	r2, r3
 8013744:	d90b      	bls.n	801375e <prvReadBytesFromBuffer+0xb8>
	__asm volatile
 8013746:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801374a:	f383 8811 	msr	BASEPRI, r3
 801374e:	f3bf 8f6f 	isb	sy
 8013752:	f3bf 8f4f 	dsb	sy
 8013756:	613b      	str	r3, [r7, #16]
}
 8013758:	bf00      	nop
 801375a:	bf00      	nop
 801375c:	e7fd      	b.n	801375a <prvReadBytesFromBuffer+0xb4>
			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 801375e:	68ba      	ldr	r2, [r7, #8]
 8013760:	69fb      	ldr	r3, [r7, #28]
 8013762:	18d0      	adds	r0, r2, r3
 8013764:	68fb      	ldr	r3, [r7, #12]
 8013766:	6999      	ldr	r1, [r3, #24]
 8013768:	6a3a      	ldr	r2, [r7, #32]
 801376a:	69fb      	ldr	r3, [r7, #28]
 801376c:	1ad3      	subs	r3, r2, r3
 801376e:	461a      	mov	r2, r3
 8013770:	f017 fa7d 	bl	802ac6e <memcpy>
			mtCOVERAGE_TEST_MARKER();
		}

		/* Move the tail pointer to effectively remove the data read from
		the buffer. */
		xNextTail += xCount;
 8013774:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013776:	6a3b      	ldr	r3, [r7, #32]
 8013778:	4413      	add	r3, r2
 801377a:	627b      	str	r3, [r7, #36]	@ 0x24

		if( xNextTail >= pxStreamBuffer->xLength )
 801377c:	68fb      	ldr	r3, [r7, #12]
 801377e:	689b      	ldr	r3, [r3, #8]
 8013780:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013782:	429a      	cmp	r2, r3
 8013784:	d304      	bcc.n	8013790 <prvReadBytesFromBuffer+0xea>
		{
			xNextTail -= pxStreamBuffer->xLength;
 8013786:	68fb      	ldr	r3, [r7, #12]
 8013788:	689b      	ldr	r3, [r3, #8]
 801378a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801378c:	1ad3      	subs	r3, r2, r3
 801378e:	627b      	str	r3, [r7, #36]	@ 0x24
		}

		pxStreamBuffer->xTail = xNextTail;
 8013790:	68fb      	ldr	r3, [r7, #12]
 8013792:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013794:	601a      	str	r2, [r3, #0]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8013796:	6a3b      	ldr	r3, [r7, #32]
}
 8013798:	4618      	mov	r0, r3
 801379a:	3728      	adds	r7, #40	@ 0x28
 801379c:	46bd      	mov	sp, r7
 801379e:	bd80      	pop	{r7, pc}

080137a0 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/

static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
 80137a0:	b480      	push	{r7}
 80137a2:	b085      	sub	sp, #20
 80137a4:	af00      	add	r7, sp, #0
 80137a6:	6078      	str	r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;

	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 80137a8:	687b      	ldr	r3, [r7, #4]
 80137aa:	689a      	ldr	r2, [r3, #8]
 80137ac:	687b      	ldr	r3, [r7, #4]
 80137ae:	685b      	ldr	r3, [r3, #4]
 80137b0:	4413      	add	r3, r2
 80137b2:	60fb      	str	r3, [r7, #12]
	xCount -= pxStreamBuffer->xTail;
 80137b4:	687b      	ldr	r3, [r7, #4]
 80137b6:	681b      	ldr	r3, [r3, #0]
 80137b8:	68fa      	ldr	r2, [r7, #12]
 80137ba:	1ad3      	subs	r3, r2, r3
 80137bc:	60fb      	str	r3, [r7, #12]
	if ( xCount >= pxStreamBuffer->xLength )
 80137be:	687b      	ldr	r3, [r7, #4]
 80137c0:	689b      	ldr	r3, [r3, #8]
 80137c2:	68fa      	ldr	r2, [r7, #12]
 80137c4:	429a      	cmp	r2, r3
 80137c6:	d304      	bcc.n	80137d2 <prvBytesInBuffer+0x32>
	{
		xCount -= pxStreamBuffer->xLength;
 80137c8:	687b      	ldr	r3, [r7, #4]
 80137ca:	689b      	ldr	r3, [r3, #8]
 80137cc:	68fa      	ldr	r2, [r7, #12]
 80137ce:	1ad3      	subs	r3, r2, r3
 80137d0:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 80137d2:	68fb      	ldr	r3, [r7, #12]
}
 80137d4:	4618      	mov	r0, r3
 80137d6:	3714      	adds	r7, #20
 80137d8:	46bd      	mov	sp, r7
 80137da:	f85d 7b04 	ldr.w	r7, [sp], #4
 80137de:	4770      	bx	lr

080137e0 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
										  uint8_t * const pucBuffer,
										  size_t xBufferSizeBytes,
										  size_t xTriggerLevelBytes,
										  uint8_t ucFlags )
{
 80137e0:	b580      	push	{r7, lr}
 80137e2:	b086      	sub	sp, #24
 80137e4:	af00      	add	r7, sp, #0
 80137e6:	60f8      	str	r0, [r7, #12]
 80137e8:	60b9      	str	r1, [r7, #8]
 80137ea:	607a      	str	r2, [r7, #4]
 80137ec:	603b      	str	r3, [r7, #0]
	#if( configASSERT_DEFINED == 1 )
	{
		/* The value written just has to be identifiable when looking at the
		memory.  Don't use 0xA5 as that is the stack fill value and could
		result in confusion as to what is actually being observed. */
		const BaseType_t xWriteValue = 0x55;
 80137ee:	2355      	movs	r3, #85	@ 0x55
 80137f0:	617b      	str	r3, [r7, #20]
		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 80137f2:	687a      	ldr	r2, [r7, #4]
 80137f4:	6979      	ldr	r1, [r7, #20]
 80137f6:	68b8      	ldr	r0, [r7, #8]
 80137f8:	f017 f942 	bl	802aa80 <memset>
 80137fc:	4602      	mov	r2, r0
 80137fe:	68bb      	ldr	r3, [r7, #8]
 8013800:	4293      	cmp	r3, r2
 8013802:	d00b      	beq.n	801381c <prvInitialiseNewStreamBuffer+0x3c>
	__asm volatile
 8013804:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013808:	f383 8811 	msr	BASEPRI, r3
 801380c:	f3bf 8f6f 	isb	sy
 8013810:	f3bf 8f4f 	dsb	sy
 8013814:	613b      	str	r3, [r7, #16]
}
 8013816:	bf00      	nop
 8013818:	bf00      	nop
 801381a:	e7fd      	b.n	8013818 <prvInitialiseNewStreamBuffer+0x38>
	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
	#endif

	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 801381c:	2224      	movs	r2, #36	@ 0x24
 801381e:	2100      	movs	r1, #0
 8013820:	68f8      	ldr	r0, [r7, #12]
 8013822:	f017 f92d 	bl	802aa80 <memset>
	pxStreamBuffer->pucBuffer = pucBuffer;
 8013826:	68fb      	ldr	r3, [r7, #12]
 8013828:	68ba      	ldr	r2, [r7, #8]
 801382a:	619a      	str	r2, [r3, #24]
	pxStreamBuffer->xLength = xBufferSizeBytes;
 801382c:	68fb      	ldr	r3, [r7, #12]
 801382e:	687a      	ldr	r2, [r7, #4]
 8013830:	609a      	str	r2, [r3, #8]
	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 8013832:	68fb      	ldr	r3, [r7, #12]
 8013834:	683a      	ldr	r2, [r7, #0]
 8013836:	60da      	str	r2, [r3, #12]
	pxStreamBuffer->ucFlags = ucFlags;
 8013838:	68fb      	ldr	r3, [r7, #12]
 801383a:	f897 2020 	ldrb.w	r2, [r7, #32]
 801383e:	771a      	strb	r2, [r3, #28]
}
 8013840:	bf00      	nop
 8013842:	3718      	adds	r7, #24
 8013844:	46bd      	mov	sp, r7
 8013846:	bd80      	pop	{r7, pc}

08013848 <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 8013848:	b580      	push	{r7, lr}
 801384a:	b08e      	sub	sp, #56	@ 0x38
 801384c:	af04      	add	r7, sp, #16
 801384e:	60f8      	str	r0, [r7, #12]
 8013850:	60b9      	str	r1, [r7, #8]
 8013852:	607a      	str	r2, [r7, #4]
 8013854:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 8013856:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013858:	2b00      	cmp	r3, #0
 801385a:	d10b      	bne.n	8013874 <xTaskCreateStatic+0x2c>
	__asm volatile
 801385c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013860:	f383 8811 	msr	BASEPRI, r3
 8013864:	f3bf 8f6f 	isb	sy
 8013868:	f3bf 8f4f 	dsb	sy
 801386c:	623b      	str	r3, [r7, #32]
}
 801386e:	bf00      	nop
 8013870:	bf00      	nop
 8013872:	e7fd      	b.n	8013870 <xTaskCreateStatic+0x28>
		configASSERT( pxTaskBuffer != NULL );
 8013874:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8013876:	2b00      	cmp	r3, #0
 8013878:	d10b      	bne.n	8013892 <xTaskCreateStatic+0x4a>
	__asm volatile
 801387a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801387e:	f383 8811 	msr	BASEPRI, r3
 8013882:	f3bf 8f6f 	isb	sy
 8013886:	f3bf 8f4f 	dsb	sy
 801388a:	61fb      	str	r3, [r7, #28]
}
 801388c:	bf00      	nop
 801388e:	bf00      	nop
 8013890:	e7fd      	b.n	801388e <xTaskCreateStatic+0x46>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 8013892:	23a8      	movs	r3, #168	@ 0xa8
 8013894:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( TCB_t ) );
 8013896:	693b      	ldr	r3, [r7, #16]
 8013898:	2ba8      	cmp	r3, #168	@ 0xa8
 801389a:	d00b      	beq.n	80138b4 <xTaskCreateStatic+0x6c>
	__asm volatile
 801389c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80138a0:	f383 8811 	msr	BASEPRI, r3
 80138a4:	f3bf 8f6f 	isb	sy
 80138a8:	f3bf 8f4f 	dsb	sy
 80138ac:	61bb      	str	r3, [r7, #24]
}
 80138ae:	bf00      	nop
 80138b0:	bf00      	nop
 80138b2:	e7fd      	b.n	80138b0 <xTaskCreateStatic+0x68>
			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 80138b4:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 80138b6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80138b8:	2b00      	cmp	r3, #0
 80138ba:	d01e      	beq.n	80138fa <xTaskCreateStatic+0xb2>
 80138bc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80138be:	2b00      	cmp	r3, #0
 80138c0:	d01b      	beq.n	80138fa <xTaskCreateStatic+0xb2>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 80138c2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80138c4:	627b      	str	r3, [r7, #36]	@ 0x24
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 80138c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80138c8:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 80138ca:	631a      	str	r2, [r3, #48]	@ 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 80138cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80138ce:	2202      	movs	r2, #2
 80138d0:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 80138d4:	2300      	movs	r3, #0
 80138d6:	9303      	str	r3, [sp, #12]
 80138d8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80138da:	9302      	str	r3, [sp, #8]
 80138dc:	f107 0314 	add.w	r3, r7, #20
 80138e0:	9301      	str	r3, [sp, #4]
 80138e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80138e4:	9300      	str	r3, [sp, #0]
 80138e6:	683b      	ldr	r3, [r7, #0]
 80138e8:	687a      	ldr	r2, [r7, #4]
 80138ea:	68b9      	ldr	r1, [r7, #8]
 80138ec:	68f8      	ldr	r0, [r7, #12]
 80138ee:	f000 f851 	bl	8013994 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 80138f2:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80138f4:	f000 f8f6 	bl	8013ae4 <prvAddNewTaskToReadyList>
 80138f8:	e001      	b.n	80138fe <xTaskCreateStatic+0xb6>
		}
		else
		{
			xReturn = NULL;
 80138fa:	2300      	movs	r3, #0
 80138fc:	617b      	str	r3, [r7, #20]
		}

		return xReturn;
 80138fe:	697b      	ldr	r3, [r7, #20]
	}
 8013900:	4618      	mov	r0, r3
 8013902:	3728      	adds	r7, #40	@ 0x28
 8013904:	46bd      	mov	sp, r7
 8013906:	bd80      	pop	{r7, pc}

08013908 <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 8013908:	b580      	push	{r7, lr}
 801390a:	b08c      	sub	sp, #48	@ 0x30
 801390c:	af04      	add	r7, sp, #16
 801390e:	60f8      	str	r0, [r7, #12]
 8013910:	60b9      	str	r1, [r7, #8]
 8013912:	603b      	str	r3, [r7, #0]
 8013914:	4613      	mov	r3, r2
 8013916:	80fb      	strh	r3, [r7, #6]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 8013918:	88fb      	ldrh	r3, [r7, #6]
 801391a:	009b      	lsls	r3, r3, #2
 801391c:	4618      	mov	r0, r3
 801391e:	f002 f8ed 	bl	8015afc <pvPortMalloc>
 8013922:	6178      	str	r0, [r7, #20]

			if( pxStack != NULL )
 8013924:	697b      	ldr	r3, [r7, #20]
 8013926:	2b00      	cmp	r3, #0
 8013928:	d00e      	beq.n	8013948 <xTaskCreate+0x40>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 801392a:	20a8      	movs	r0, #168	@ 0xa8
 801392c:	f002 f8e6 	bl	8015afc <pvPortMalloc>
 8013930:	61f8      	str	r0, [r7, #28]

				if( pxNewTCB != NULL )
 8013932:	69fb      	ldr	r3, [r7, #28]
 8013934:	2b00      	cmp	r3, #0
 8013936:	d003      	beq.n	8013940 <xTaskCreate+0x38>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 8013938:	69fb      	ldr	r3, [r7, #28]
 801393a:	697a      	ldr	r2, [r7, #20]
 801393c:	631a      	str	r2, [r3, #48]	@ 0x30
 801393e:	e005      	b.n	801394c <xTaskCreate+0x44>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 8013940:	6978      	ldr	r0, [r7, #20]
 8013942:	f002 f9a9 	bl	8015c98 <vPortFree>
 8013946:	e001      	b.n	801394c <xTaskCreate+0x44>
				}
			}
			else
			{
				pxNewTCB = NULL;
 8013948:	2300      	movs	r3, #0
 801394a:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 801394c:	69fb      	ldr	r3, [r7, #28]
 801394e:	2b00      	cmp	r3, #0
 8013950:	d017      	beq.n	8013982 <xTaskCreate+0x7a>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 8013952:	69fb      	ldr	r3, [r7, #28]
 8013954:	2200      	movs	r2, #0
 8013956:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 801395a:	88fa      	ldrh	r2, [r7, #6]
 801395c:	2300      	movs	r3, #0
 801395e:	9303      	str	r3, [sp, #12]
 8013960:	69fb      	ldr	r3, [r7, #28]
 8013962:	9302      	str	r3, [sp, #8]
 8013964:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013966:	9301      	str	r3, [sp, #4]
 8013968:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801396a:	9300      	str	r3, [sp, #0]
 801396c:	683b      	ldr	r3, [r7, #0]
 801396e:	68b9      	ldr	r1, [r7, #8]
 8013970:	68f8      	ldr	r0, [r7, #12]
 8013972:	f000 f80f 	bl	8013994 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8013976:	69f8      	ldr	r0, [r7, #28]
 8013978:	f000 f8b4 	bl	8013ae4 <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 801397c:	2301      	movs	r3, #1
 801397e:	61bb      	str	r3, [r7, #24]
 8013980:	e002      	b.n	8013988 <xTaskCreate+0x80>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 8013982:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8013986:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 8013988:	69bb      	ldr	r3, [r7, #24]
	}
 801398a:	4618      	mov	r0, r3
 801398c:	3720      	adds	r7, #32
 801398e:	46bd      	mov	sp, r7
 8013990:	bd80      	pop	{r7, pc}
	...

08013994 <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 8013994:	b580      	push	{r7, lr}
 8013996:	b088      	sub	sp, #32
 8013998:	af00      	add	r7, sp, #0
 801399a:	60f8      	str	r0, [r7, #12]
 801399c:	60b9      	str	r1, [r7, #8]
 801399e:	607a      	str	r2, [r7, #4]
 80139a0:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 80139a2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80139a4:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 80139a6:	687b      	ldr	r3, [r7, #4]
 80139a8:	009b      	lsls	r3, r3, #2
 80139aa:	461a      	mov	r2, r3
 80139ac:	21a5      	movs	r1, #165	@ 0xa5
 80139ae:	f017 f867 	bl	802aa80 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 80139b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80139b4:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 80139b6:	6879      	ldr	r1, [r7, #4]
 80139b8:	f06f 4340 	mvn.w	r3, #3221225472	@ 0xc0000000
 80139bc:	440b      	add	r3, r1
 80139be:	009b      	lsls	r3, r3, #2
 80139c0:	4413      	add	r3, r2
 80139c2:	61bb      	str	r3, [r7, #24]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 80139c4:	69bb      	ldr	r3, [r7, #24]
 80139c6:	f023 0307 	bic.w	r3, r3, #7
 80139ca:	61bb      	str	r3, [r7, #24]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 80139cc:	69bb      	ldr	r3, [r7, #24]
 80139ce:	f003 0307 	and.w	r3, r3, #7
 80139d2:	2b00      	cmp	r3, #0
 80139d4:	d00b      	beq.n	80139ee <prvInitialiseNewTask+0x5a>
	__asm volatile
 80139d6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80139da:	f383 8811 	msr	BASEPRI, r3
 80139de:	f3bf 8f6f 	isb	sy
 80139e2:	f3bf 8f4f 	dsb	sy
 80139e6:	617b      	str	r3, [r7, #20]
}
 80139e8:	bf00      	nop
 80139ea:	bf00      	nop
 80139ec:	e7fd      	b.n	80139ea <prvInitialiseNewTask+0x56>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	if( pcName != NULL )
 80139ee:	68bb      	ldr	r3, [r7, #8]
 80139f0:	2b00      	cmp	r3, #0
 80139f2:	d01f      	beq.n	8013a34 <prvInitialiseNewTask+0xa0>
	{
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 80139f4:	2300      	movs	r3, #0
 80139f6:	61fb      	str	r3, [r7, #28]
 80139f8:	e012      	b.n	8013a20 <prvInitialiseNewTask+0x8c>
		{
			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 80139fa:	68ba      	ldr	r2, [r7, #8]
 80139fc:	69fb      	ldr	r3, [r7, #28]
 80139fe:	4413      	add	r3, r2
 8013a00:	7819      	ldrb	r1, [r3, #0]
 8013a02:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013a04:	69fb      	ldr	r3, [r7, #28]
 8013a06:	4413      	add	r3, r2
 8013a08:	3334      	adds	r3, #52	@ 0x34
 8013a0a:	460a      	mov	r2, r1
 8013a0c:	701a      	strb	r2, [r3, #0]

			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
			configMAX_TASK_NAME_LEN characters just in case the memory after the
			string is not accessible (extremely unlikely). */
			if( pcName[ x ] == ( char ) 0x00 )
 8013a0e:	68ba      	ldr	r2, [r7, #8]
 8013a10:	69fb      	ldr	r3, [r7, #28]
 8013a12:	4413      	add	r3, r2
 8013a14:	781b      	ldrb	r3, [r3, #0]
 8013a16:	2b00      	cmp	r3, #0
 8013a18:	d006      	beq.n	8013a28 <prvInitialiseNewTask+0x94>
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8013a1a:	69fb      	ldr	r3, [r7, #28]
 8013a1c:	3301      	adds	r3, #1
 8013a1e:	61fb      	str	r3, [r7, #28]
 8013a20:	69fb      	ldr	r3, [r7, #28]
 8013a22:	2b0f      	cmp	r3, #15
 8013a24:	d9e9      	bls.n	80139fa <prvInitialiseNewTask+0x66>
 8013a26:	e000      	b.n	8013a2a <prvInitialiseNewTask+0x96>
			{
				break;
 8013a28:	bf00      	nop
			}
		}

		/* Ensure the name string is terminated in the case that the string length
		was greater or equal to configMAX_TASK_NAME_LEN. */
		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 8013a2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a2c:	2200      	movs	r2, #0
 8013a2e:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 8013a32:	e003      	b.n	8013a3c <prvInitialiseNewTask+0xa8>
	}
	else
	{
		/* The task has not been given a name, so just ensure there is a NULL
		terminator when it is read out. */
		pxNewTCB->pcTaskName[ 0 ] = 0x00;
 8013a34:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a36:	2200      	movs	r2, #0
 8013a38:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
	}

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 8013a3c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013a3e:	2b37      	cmp	r3, #55	@ 0x37
 8013a40:	d901      	bls.n	8013a46 <prvInitialiseNewTask+0xb2>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 8013a42:	2337      	movs	r3, #55	@ 0x37
 8013a44:	62bb      	str	r3, [r7, #40]	@ 0x28
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 8013a46:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a48:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013a4a:	62da      	str	r2, [r3, #44]	@ 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 8013a4c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a4e:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013a50:	64da      	str	r2, [r3, #76]	@ 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 8013a52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a54:	2200      	movs	r2, #0
 8013a56:	651a      	str	r2, [r3, #80]	@ 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 8013a58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a5a:	3304      	adds	r3, #4
 8013a5c:	4618      	mov	r0, r3
 8013a5e:	f7fe f9a5 	bl	8011dac <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 8013a62:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a64:	3318      	adds	r3, #24
 8013a66:	4618      	mov	r0, r3
 8013a68:	f7fe f9a0 	bl	8011dac <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 8013a6c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a6e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013a70:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013a72:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013a74:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8013a78:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a7a:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 8013a7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a7e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013a80:	625a      	str	r2, [r3, #36]	@ 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 8013a82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a84:	2200      	movs	r2, #0
 8013a86:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8013a8a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a8c:	2200      	movs	r2, #0
 8013a8e:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
	#if ( configUSE_NEWLIB_REENTRANT == 1 )
	{
		/* Initialise this task's Newlib reent structure.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 8013a92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013a94:	3354      	adds	r3, #84	@ 0x54
 8013a96:	224c      	movs	r2, #76	@ 0x4c
 8013a98:	2100      	movs	r1, #0
 8013a9a:	4618      	mov	r0, r3
 8013a9c:	f016 fff0 	bl	802aa80 <memset>
 8013aa0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013aa2:	4a0d      	ldr	r2, [pc, #52]	@ (8013ad8 <prvInitialiseNewTask+0x144>)
 8013aa4:	659a      	str	r2, [r3, #88]	@ 0x58
 8013aa6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013aa8:	4a0c      	ldr	r2, [pc, #48]	@ (8013adc <prvInitialiseNewTask+0x148>)
 8013aaa:	65da      	str	r2, [r3, #92]	@ 0x5c
 8013aac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013aae:	4a0c      	ldr	r2, [pc, #48]	@ (8013ae0 <prvInitialiseNewTask+0x14c>)
 8013ab0:	661a      	str	r2, [r3, #96]	@ 0x60
			}
			#endif /* portSTACK_GROWTH */
		}
		#else /* portHAS_STACK_OVERFLOW_CHECKING */
		{
			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 8013ab2:	683a      	ldr	r2, [r7, #0]
 8013ab4:	68f9      	ldr	r1, [r7, #12]
 8013ab6:	69b8      	ldr	r0, [r7, #24]
 8013ab8:	f001 fdca 	bl	8015650 <pxPortInitialiseStack>
 8013abc:	4602      	mov	r2, r0
 8013abe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013ac0:	601a      	str	r2, [r3, #0]
		}
		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( pxCreatedTask != NULL )
 8013ac2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013ac4:	2b00      	cmp	r3, #0
 8013ac6:	d002      	beq.n	8013ace <prvInitialiseNewTask+0x13a>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 8013ac8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013aca:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013acc:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013ace:	bf00      	nop
 8013ad0:	3720      	adds	r7, #32
 8013ad2:	46bd      	mov	sp, r7
 8013ad4:	bd80      	pop	{r7, pc}
 8013ad6:	bf00      	nop
 8013ad8:	2402b124 	.word	0x2402b124
 8013adc:	2402b18c 	.word	0x2402b18c
 8013ae0:	2402b1f4 	.word	0x2402b1f4

08013ae4 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 8013ae4:	b580      	push	{r7, lr}
 8013ae6:	b082      	sub	sp, #8
 8013ae8:	af00      	add	r7, sp, #0
 8013aea:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 8013aec:	f001 fee4 	bl	80158b8 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 8013af0:	4b2d      	ldr	r3, [pc, #180]	@ (8013ba8 <prvAddNewTaskToReadyList+0xc4>)
 8013af2:	681b      	ldr	r3, [r3, #0]
 8013af4:	3301      	adds	r3, #1
 8013af6:	4a2c      	ldr	r2, [pc, #176]	@ (8013ba8 <prvAddNewTaskToReadyList+0xc4>)
 8013af8:	6013      	str	r3, [r2, #0]
		if( pxCurrentTCB == NULL )
 8013afa:	4b2c      	ldr	r3, [pc, #176]	@ (8013bac <prvAddNewTaskToReadyList+0xc8>)
 8013afc:	681b      	ldr	r3, [r3, #0]
 8013afe:	2b00      	cmp	r3, #0
 8013b00:	d109      	bne.n	8013b16 <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 8013b02:	4a2a      	ldr	r2, [pc, #168]	@ (8013bac <prvAddNewTaskToReadyList+0xc8>)
 8013b04:	687b      	ldr	r3, [r7, #4]
 8013b06:	6013      	str	r3, [r2, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 8013b08:	4b27      	ldr	r3, [pc, #156]	@ (8013ba8 <prvAddNewTaskToReadyList+0xc4>)
 8013b0a:	681b      	ldr	r3, [r3, #0]
 8013b0c:	2b01      	cmp	r3, #1
 8013b0e:	d110      	bne.n	8013b32 <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 8013b10:	f000 fc76 	bl	8014400 <prvInitialiseTaskLists>
 8013b14:	e00d      	b.n	8013b32 <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 8013b16:	4b26      	ldr	r3, [pc, #152]	@ (8013bb0 <prvAddNewTaskToReadyList+0xcc>)
 8013b18:	681b      	ldr	r3, [r3, #0]
 8013b1a:	2b00      	cmp	r3, #0
 8013b1c:	d109      	bne.n	8013b32 <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 8013b1e:	4b23      	ldr	r3, [pc, #140]	@ (8013bac <prvAddNewTaskToReadyList+0xc8>)
 8013b20:	681b      	ldr	r3, [r3, #0]
 8013b22:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013b24:	687b      	ldr	r3, [r7, #4]
 8013b26:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013b28:	429a      	cmp	r2, r3
 8013b2a:	d802      	bhi.n	8013b32 <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 8013b2c:	4a1f      	ldr	r2, [pc, #124]	@ (8013bac <prvAddNewTaskToReadyList+0xc8>)
 8013b2e:	687b      	ldr	r3, [r7, #4]
 8013b30:	6013      	str	r3, [r2, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 8013b32:	4b20      	ldr	r3, [pc, #128]	@ (8013bb4 <prvAddNewTaskToReadyList+0xd0>)
 8013b34:	681b      	ldr	r3, [r3, #0]
 8013b36:	3301      	adds	r3, #1
 8013b38:	4a1e      	ldr	r2, [pc, #120]	@ (8013bb4 <prvAddNewTaskToReadyList+0xd0>)
 8013b3a:	6013      	str	r3, [r2, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 8013b3c:	4b1d      	ldr	r3, [pc, #116]	@ (8013bb4 <prvAddNewTaskToReadyList+0xd0>)
 8013b3e:	681a      	ldr	r2, [r3, #0]
 8013b40:	687b      	ldr	r3, [r7, #4]
 8013b42:	645a      	str	r2, [r3, #68]	@ 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 8013b44:	687b      	ldr	r3, [r7, #4]
 8013b46:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013b48:	4b1b      	ldr	r3, [pc, #108]	@ (8013bb8 <prvAddNewTaskToReadyList+0xd4>)
 8013b4a:	681b      	ldr	r3, [r3, #0]
 8013b4c:	429a      	cmp	r2, r3
 8013b4e:	d903      	bls.n	8013b58 <prvAddNewTaskToReadyList+0x74>
 8013b50:	687b      	ldr	r3, [r7, #4]
 8013b52:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013b54:	4a18      	ldr	r2, [pc, #96]	@ (8013bb8 <prvAddNewTaskToReadyList+0xd4>)
 8013b56:	6013      	str	r3, [r2, #0]
 8013b58:	687b      	ldr	r3, [r7, #4]
 8013b5a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013b5c:	4613      	mov	r3, r2
 8013b5e:	009b      	lsls	r3, r3, #2
 8013b60:	4413      	add	r3, r2
 8013b62:	009b      	lsls	r3, r3, #2
 8013b64:	4a15      	ldr	r2, [pc, #84]	@ (8013bbc <prvAddNewTaskToReadyList+0xd8>)
 8013b66:	441a      	add	r2, r3
 8013b68:	687b      	ldr	r3, [r7, #4]
 8013b6a:	3304      	adds	r3, #4
 8013b6c:	4619      	mov	r1, r3
 8013b6e:	4610      	mov	r0, r2
 8013b70:	f7fe f929 	bl	8011dc6 <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8013b74:	f001 fed2 	bl	801591c <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 8013b78:	4b0d      	ldr	r3, [pc, #52]	@ (8013bb0 <prvAddNewTaskToReadyList+0xcc>)
 8013b7a:	681b      	ldr	r3, [r3, #0]
 8013b7c:	2b00      	cmp	r3, #0
 8013b7e:	d00e      	beq.n	8013b9e <prvAddNewTaskToReadyList+0xba>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 8013b80:	4b0a      	ldr	r3, [pc, #40]	@ (8013bac <prvAddNewTaskToReadyList+0xc8>)
 8013b82:	681b      	ldr	r3, [r3, #0]
 8013b84:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013b86:	687b      	ldr	r3, [r7, #4]
 8013b88:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013b8a:	429a      	cmp	r2, r3
 8013b8c:	d207      	bcs.n	8013b9e <prvAddNewTaskToReadyList+0xba>
		{
			taskYIELD_IF_USING_PREEMPTION();
 8013b8e:	4b0c      	ldr	r3, [pc, #48]	@ (8013bc0 <prvAddNewTaskToReadyList+0xdc>)
 8013b90:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013b94:	601a      	str	r2, [r3, #0]
 8013b96:	f3bf 8f4f 	dsb	sy
 8013b9a:	f3bf 8f6f 	isb	sy
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013b9e:	bf00      	nop
 8013ba0:	3708      	adds	r7, #8
 8013ba2:	46bd      	mov	sp, r7
 8013ba4:	bd80      	pop	{r7, pc}
 8013ba6:	bf00      	nop
 8013ba8:	24004244 	.word	0x24004244
 8013bac:	24003d70 	.word	0x24003d70
 8013bb0:	24004250 	.word	0x24004250
 8013bb4:	24004260 	.word	0x24004260
 8013bb8:	2400424c 	.word	0x2400424c
 8013bbc:	24003d74 	.word	0x24003d74
 8013bc0:	e000ed04 	.word	0xe000ed04

08013bc4 <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 8013bc4:	b580      	push	{r7, lr}
 8013bc6:	b084      	sub	sp, #16
 8013bc8:	af00      	add	r7, sp, #0
 8013bca:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 8013bcc:	2300      	movs	r3, #0
 8013bce:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 8013bd0:	687b      	ldr	r3, [r7, #4]
 8013bd2:	2b00      	cmp	r3, #0
 8013bd4:	d018      	beq.n	8013c08 <vTaskDelay+0x44>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 8013bd6:	4b14      	ldr	r3, [pc, #80]	@ (8013c28 <vTaskDelay+0x64>)
 8013bd8:	681b      	ldr	r3, [r3, #0]
 8013bda:	2b00      	cmp	r3, #0
 8013bdc:	d00b      	beq.n	8013bf6 <vTaskDelay+0x32>
	__asm volatile
 8013bde:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013be2:	f383 8811 	msr	BASEPRI, r3
 8013be6:	f3bf 8f6f 	isb	sy
 8013bea:	f3bf 8f4f 	dsb	sy
 8013bee:	60bb      	str	r3, [r7, #8]
}
 8013bf0:	bf00      	nop
 8013bf2:	bf00      	nop
 8013bf4:	e7fd      	b.n	8013bf2 <vTaskDelay+0x2e>
			vTaskSuspendAll();
 8013bf6:	f000 f88b 	bl	8013d10 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 8013bfa:	2100      	movs	r1, #0
 8013bfc:	6878      	ldr	r0, [r7, #4]
 8013bfe:	f001 f88f 	bl	8014d20 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 8013c02:	f000 f893 	bl	8013d2c <xTaskResumeAll>
 8013c06:	60f8      	str	r0, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 8013c08:	68fb      	ldr	r3, [r7, #12]
 8013c0a:	2b00      	cmp	r3, #0
 8013c0c:	d107      	bne.n	8013c1e <vTaskDelay+0x5a>
		{
			portYIELD_WITHIN_API();
 8013c0e:	4b07      	ldr	r3, [pc, #28]	@ (8013c2c <vTaskDelay+0x68>)
 8013c10:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013c14:	601a      	str	r2, [r3, #0]
 8013c16:	f3bf 8f4f 	dsb	sy
 8013c1a:	f3bf 8f6f 	isb	sy
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8013c1e:	bf00      	nop
 8013c20:	3710      	adds	r7, #16
 8013c22:	46bd      	mov	sp, r7
 8013c24:	bd80      	pop	{r7, pc}
 8013c26:	bf00      	nop
 8013c28:	2400426c 	.word	0x2400426c
 8013c2c:	e000ed04 	.word	0xe000ed04

08013c30 <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 8013c30:	b580      	push	{r7, lr}
 8013c32:	b08a      	sub	sp, #40	@ 0x28
 8013c34:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 8013c36:	2300      	movs	r3, #0
 8013c38:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 8013c3a:	2300      	movs	r3, #0
 8013c3c:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 8013c3e:	463a      	mov	r2, r7
 8013c40:	1d39      	adds	r1, r7, #4
 8013c42:	f107 0308 	add.w	r3, r7, #8
 8013c46:	4618      	mov	r0, r3
 8013c48:	f7fe f85c 	bl	8011d04 <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 8013c4c:	6839      	ldr	r1, [r7, #0]
 8013c4e:	687b      	ldr	r3, [r7, #4]
 8013c50:	68ba      	ldr	r2, [r7, #8]
 8013c52:	9202      	str	r2, [sp, #8]
 8013c54:	9301      	str	r3, [sp, #4]
 8013c56:	2300      	movs	r3, #0
 8013c58:	9300      	str	r3, [sp, #0]
 8013c5a:	2300      	movs	r3, #0
 8013c5c:	460a      	mov	r2, r1
 8013c5e:	4924      	ldr	r1, [pc, #144]	@ (8013cf0 <vTaskStartScheduler+0xc0>)
 8013c60:	4824      	ldr	r0, [pc, #144]	@ (8013cf4 <vTaskStartScheduler+0xc4>)
 8013c62:	f7ff fdf1 	bl	8013848 <xTaskCreateStatic>
 8013c66:	4603      	mov	r3, r0
 8013c68:	4a23      	ldr	r2, [pc, #140]	@ (8013cf8 <vTaskStartScheduler+0xc8>)
 8013c6a:	6013      	str	r3, [r2, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 8013c6c:	4b22      	ldr	r3, [pc, #136]	@ (8013cf8 <vTaskStartScheduler+0xc8>)
 8013c6e:	681b      	ldr	r3, [r3, #0]
 8013c70:	2b00      	cmp	r3, #0
 8013c72:	d002      	beq.n	8013c7a <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 8013c74:	2301      	movs	r3, #1
 8013c76:	617b      	str	r3, [r7, #20]
 8013c78:	e001      	b.n	8013c7e <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 8013c7a:	2300      	movs	r3, #0
 8013c7c:	617b      	str	r3, [r7, #20]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 8013c7e:	697b      	ldr	r3, [r7, #20]
 8013c80:	2b01      	cmp	r3, #1
 8013c82:	d102      	bne.n	8013c8a <vTaskStartScheduler+0x5a>
		{
			xReturn = xTimerCreateTimerTask();
 8013c84:	f001 f8a0 	bl	8014dc8 <xTimerCreateTimerTask>
 8013c88:	6178      	str	r0, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 8013c8a:	697b      	ldr	r3, [r7, #20]
 8013c8c:	2b01      	cmp	r3, #1
 8013c8e:	d11b      	bne.n	8013cc8 <vTaskStartScheduler+0x98>
	__asm volatile
 8013c90:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013c94:	f383 8811 	msr	BASEPRI, r3
 8013c98:	f3bf 8f6f 	isb	sy
 8013c9c:	f3bf 8f4f 	dsb	sy
 8013ca0:	613b      	str	r3, [r7, #16]
}
 8013ca2:	bf00      	nop
		{
			/* Switch Newlib's _impure_ptr variable to point to the _reent
			structure specific to the task that will run first.
			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013ca4:	4b15      	ldr	r3, [pc, #84]	@ (8013cfc <vTaskStartScheduler+0xcc>)
 8013ca6:	681b      	ldr	r3, [r3, #0]
 8013ca8:	3354      	adds	r3, #84	@ 0x54
 8013caa:	4a15      	ldr	r2, [pc, #84]	@ (8013d00 <vTaskStartScheduler+0xd0>)
 8013cac:	6013      	str	r3, [r2, #0]
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8013cae:	4b15      	ldr	r3, [pc, #84]	@ (8013d04 <vTaskStartScheduler+0xd4>)
 8013cb0:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8013cb4:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 8013cb6:	4b14      	ldr	r3, [pc, #80]	@ (8013d08 <vTaskStartScheduler+0xd8>)
 8013cb8:	2201      	movs	r2, #1
 8013cba:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 8013cbc:	4b13      	ldr	r3, [pc, #76]	@ (8013d0c <vTaskStartScheduler+0xdc>)
 8013cbe:	2200      	movs	r2, #0
 8013cc0:	601a      	str	r2, [r3, #0]

		traceTASK_SWITCHED_IN();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 8013cc2:	f001 fd55 	bl	8015770 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 8013cc6:	e00f      	b.n	8013ce8 <vTaskStartScheduler+0xb8>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 8013cc8:	697b      	ldr	r3, [r7, #20]
 8013cca:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013cce:	d10b      	bne.n	8013ce8 <vTaskStartScheduler+0xb8>
	__asm volatile
 8013cd0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013cd4:	f383 8811 	msr	BASEPRI, r3
 8013cd8:	f3bf 8f6f 	isb	sy
 8013cdc:	f3bf 8f4f 	dsb	sy
 8013ce0:	60fb      	str	r3, [r7, #12]
}
 8013ce2:	bf00      	nop
 8013ce4:	bf00      	nop
 8013ce6:	e7fd      	b.n	8013ce4 <vTaskStartScheduler+0xb4>
}
 8013ce8:	bf00      	nop
 8013cea:	3718      	adds	r7, #24
 8013cec:	46bd      	mov	sp, r7
 8013cee:	bd80      	pop	{r7, pc}
 8013cf0:	0802da50 	.word	0x0802da50
 8013cf4:	080143d1 	.word	0x080143d1
 8013cf8:	24004268 	.word	0x24004268
 8013cfc:	24003d70 	.word	0x24003d70
 8013d00:	240001d4 	.word	0x240001d4
 8013d04:	24004264 	.word	0x24004264
 8013d08:	24004250 	.word	0x24004250
 8013d0c:	24004248 	.word	0x24004248

08013d10 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 8013d10:	b480      	push	{r7}
 8013d12:	af00      	add	r7, sp, #0
	do not otherwise exhibit real time behaviour. */
	portSOFTWARE_BARRIER();

	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
	is used to allow calls to vTaskSuspendAll() to nest. */
	++uxSchedulerSuspended;
 8013d14:	4b04      	ldr	r3, [pc, #16]	@ (8013d28 <vTaskSuspendAll+0x18>)
 8013d16:	681b      	ldr	r3, [r3, #0]
 8013d18:	3301      	adds	r3, #1
 8013d1a:	4a03      	ldr	r2, [pc, #12]	@ (8013d28 <vTaskSuspendAll+0x18>)
 8013d1c:	6013      	str	r3, [r2, #0]

	/* Enforces ordering for ports and optimised compilers that may otherwise place
	the above increment elsewhere. */
	portMEMORY_BARRIER();
}
 8013d1e:	bf00      	nop
 8013d20:	46bd      	mov	sp, r7
 8013d22:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013d26:	4770      	bx	lr
 8013d28:	2400426c 	.word	0x2400426c

08013d2c <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 8013d2c:	b580      	push	{r7, lr}
 8013d2e:	b084      	sub	sp, #16
 8013d30:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 8013d32:	2300      	movs	r3, #0
 8013d34:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 8013d36:	2300      	movs	r3, #0
 8013d38:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 8013d3a:	4b42      	ldr	r3, [pc, #264]	@ (8013e44 <xTaskResumeAll+0x118>)
 8013d3c:	681b      	ldr	r3, [r3, #0]
 8013d3e:	2b00      	cmp	r3, #0
 8013d40:	d10b      	bne.n	8013d5a <xTaskResumeAll+0x2e>
	__asm volatile
 8013d42:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013d46:	f383 8811 	msr	BASEPRI, r3
 8013d4a:	f3bf 8f6f 	isb	sy
 8013d4e:	f3bf 8f4f 	dsb	sy
 8013d52:	603b      	str	r3, [r7, #0]
}
 8013d54:	bf00      	nop
 8013d56:	bf00      	nop
 8013d58:	e7fd      	b.n	8013d56 <xTaskResumeAll+0x2a>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 8013d5a:	f001 fdad 	bl	80158b8 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 8013d5e:	4b39      	ldr	r3, [pc, #228]	@ (8013e44 <xTaskResumeAll+0x118>)
 8013d60:	681b      	ldr	r3, [r3, #0]
 8013d62:	3b01      	subs	r3, #1
 8013d64:	4a37      	ldr	r2, [pc, #220]	@ (8013e44 <xTaskResumeAll+0x118>)
 8013d66:	6013      	str	r3, [r2, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013d68:	4b36      	ldr	r3, [pc, #216]	@ (8013e44 <xTaskResumeAll+0x118>)
 8013d6a:	681b      	ldr	r3, [r3, #0]
 8013d6c:	2b00      	cmp	r3, #0
 8013d6e:	d162      	bne.n	8013e36 <xTaskResumeAll+0x10a>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 8013d70:	4b35      	ldr	r3, [pc, #212]	@ (8013e48 <xTaskResumeAll+0x11c>)
 8013d72:	681b      	ldr	r3, [r3, #0]
 8013d74:	2b00      	cmp	r3, #0
 8013d76:	d05e      	beq.n	8013e36 <xTaskResumeAll+0x10a>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8013d78:	e02f      	b.n	8013dda <xTaskResumeAll+0xae>
				{
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013d7a:	4b34      	ldr	r3, [pc, #208]	@ (8013e4c <xTaskResumeAll+0x120>)
 8013d7c:	68db      	ldr	r3, [r3, #12]
 8013d7e:	68db      	ldr	r3, [r3, #12]
 8013d80:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8013d82:	68fb      	ldr	r3, [r7, #12]
 8013d84:	3318      	adds	r3, #24
 8013d86:	4618      	mov	r0, r3
 8013d88:	f7fe f87a 	bl	8011e80 <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013d8c:	68fb      	ldr	r3, [r7, #12]
 8013d8e:	3304      	adds	r3, #4
 8013d90:	4618      	mov	r0, r3
 8013d92:	f7fe f875 	bl	8011e80 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8013d96:	68fb      	ldr	r3, [r7, #12]
 8013d98:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013d9a:	4b2d      	ldr	r3, [pc, #180]	@ (8013e50 <xTaskResumeAll+0x124>)
 8013d9c:	681b      	ldr	r3, [r3, #0]
 8013d9e:	429a      	cmp	r2, r3
 8013da0:	d903      	bls.n	8013daa <xTaskResumeAll+0x7e>
 8013da2:	68fb      	ldr	r3, [r7, #12]
 8013da4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013da6:	4a2a      	ldr	r2, [pc, #168]	@ (8013e50 <xTaskResumeAll+0x124>)
 8013da8:	6013      	str	r3, [r2, #0]
 8013daa:	68fb      	ldr	r3, [r7, #12]
 8013dac:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013dae:	4613      	mov	r3, r2
 8013db0:	009b      	lsls	r3, r3, #2
 8013db2:	4413      	add	r3, r2
 8013db4:	009b      	lsls	r3, r3, #2
 8013db6:	4a27      	ldr	r2, [pc, #156]	@ (8013e54 <xTaskResumeAll+0x128>)
 8013db8:	441a      	add	r2, r3
 8013dba:	68fb      	ldr	r3, [r7, #12]
 8013dbc:	3304      	adds	r3, #4
 8013dbe:	4619      	mov	r1, r3
 8013dc0:	4610      	mov	r0, r2
 8013dc2:	f7fe f800 	bl	8011dc6 <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8013dc6:	68fb      	ldr	r3, [r7, #12]
 8013dc8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013dca:	4b23      	ldr	r3, [pc, #140]	@ (8013e58 <xTaskResumeAll+0x12c>)
 8013dcc:	681b      	ldr	r3, [r3, #0]
 8013dce:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013dd0:	429a      	cmp	r2, r3
 8013dd2:	d302      	bcc.n	8013dda <xTaskResumeAll+0xae>
					{
						xYieldPending = pdTRUE;
 8013dd4:	4b21      	ldr	r3, [pc, #132]	@ (8013e5c <xTaskResumeAll+0x130>)
 8013dd6:	2201      	movs	r2, #1
 8013dd8:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 8013dda:	4b1c      	ldr	r3, [pc, #112]	@ (8013e4c <xTaskResumeAll+0x120>)
 8013ddc:	681b      	ldr	r3, [r3, #0]
 8013dde:	2b00      	cmp	r3, #0
 8013de0:	d1cb      	bne.n	8013d7a <xTaskResumeAll+0x4e>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 8013de2:	68fb      	ldr	r3, [r7, #12]
 8013de4:	2b00      	cmp	r3, #0
 8013de6:	d001      	beq.n	8013dec <xTaskResumeAll+0xc0>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 8013de8:	f000 fbae 	bl	8014548 <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 8013dec:	4b1c      	ldr	r3, [pc, #112]	@ (8013e60 <xTaskResumeAll+0x134>)
 8013dee:	681b      	ldr	r3, [r3, #0]
 8013df0:	607b      	str	r3, [r7, #4]

					if( xPendedCounts > ( TickType_t ) 0U )
 8013df2:	687b      	ldr	r3, [r7, #4]
 8013df4:	2b00      	cmp	r3, #0
 8013df6:	d010      	beq.n	8013e1a <xTaskResumeAll+0xee>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 8013df8:	f000 f858 	bl	8013eac <xTaskIncrementTick>
 8013dfc:	4603      	mov	r3, r0
 8013dfe:	2b00      	cmp	r3, #0
 8013e00:	d002      	beq.n	8013e08 <xTaskResumeAll+0xdc>
							{
								xYieldPending = pdTRUE;
 8013e02:	4b16      	ldr	r3, [pc, #88]	@ (8013e5c <xTaskResumeAll+0x130>)
 8013e04:	2201      	movs	r2, #1
 8013e06:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--xPendedCounts;
 8013e08:	687b      	ldr	r3, [r7, #4]
 8013e0a:	3b01      	subs	r3, #1
 8013e0c:	607b      	str	r3, [r7, #4]
						} while( xPendedCounts > ( TickType_t ) 0U );
 8013e0e:	687b      	ldr	r3, [r7, #4]
 8013e10:	2b00      	cmp	r3, #0
 8013e12:	d1f1      	bne.n	8013df8 <xTaskResumeAll+0xcc>

						xPendedTicks = 0;
 8013e14:	4b12      	ldr	r3, [pc, #72]	@ (8013e60 <xTaskResumeAll+0x134>)
 8013e16:	2200      	movs	r2, #0
 8013e18:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 8013e1a:	4b10      	ldr	r3, [pc, #64]	@ (8013e5c <xTaskResumeAll+0x130>)
 8013e1c:	681b      	ldr	r3, [r3, #0]
 8013e1e:	2b00      	cmp	r3, #0
 8013e20:	d009      	beq.n	8013e36 <xTaskResumeAll+0x10a>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 8013e22:	2301      	movs	r3, #1
 8013e24:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 8013e26:	4b0f      	ldr	r3, [pc, #60]	@ (8013e64 <xTaskResumeAll+0x138>)
 8013e28:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013e2c:	601a      	str	r2, [r3, #0]
 8013e2e:	f3bf 8f4f 	dsb	sy
 8013e32:	f3bf 8f6f 	isb	sy
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 8013e36:	f001 fd71 	bl	801591c <vPortExitCritical>

	return xAlreadyYielded;
 8013e3a:	68bb      	ldr	r3, [r7, #8]
}
 8013e3c:	4618      	mov	r0, r3
 8013e3e:	3710      	adds	r7, #16
 8013e40:	46bd      	mov	sp, r7
 8013e42:	bd80      	pop	{r7, pc}
 8013e44:	2400426c 	.word	0x2400426c
 8013e48:	24004244 	.word	0x24004244
 8013e4c:	24004204 	.word	0x24004204
 8013e50:	2400424c 	.word	0x2400424c
 8013e54:	24003d74 	.word	0x24003d74
 8013e58:	24003d70 	.word	0x24003d70
 8013e5c:	24004258 	.word	0x24004258
 8013e60:	24004254 	.word	0x24004254
 8013e64:	e000ed04 	.word	0xe000ed04

08013e68 <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 8013e68:	b480      	push	{r7}
 8013e6a:	b083      	sub	sp, #12
 8013e6c:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 8013e6e:	4b05      	ldr	r3, [pc, #20]	@ (8013e84 <xTaskGetTickCount+0x1c>)
 8013e70:	681b      	ldr	r3, [r3, #0]
 8013e72:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 8013e74:	687b      	ldr	r3, [r7, #4]
}
 8013e76:	4618      	mov	r0, r3
 8013e78:	370c      	adds	r7, #12
 8013e7a:	46bd      	mov	sp, r7
 8013e7c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013e80:	4770      	bx	lr
 8013e82:	bf00      	nop
 8013e84:	24004248 	.word	0x24004248

08013e88 <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCountFromISR( void )
{
 8013e88:	b580      	push	{r7, lr}
 8013e8a:	b082      	sub	sp, #8
 8013e8c:	af00      	add	r7, sp, #0
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8013e8e:	f001 fdf3 	bl	8015a78 <vPortValidateInterruptPriority>

	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 8013e92:	2300      	movs	r3, #0
 8013e94:	607b      	str	r3, [r7, #4]
	{
		xReturn = xTickCount;
 8013e96:	4b04      	ldr	r3, [pc, #16]	@ (8013ea8 <xTaskGetTickCountFromISR+0x20>)
 8013e98:	681b      	ldr	r3, [r3, #0]
 8013e9a:	603b      	str	r3, [r7, #0]
	}
	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8013e9c:	683b      	ldr	r3, [r7, #0]
}
 8013e9e:	4618      	mov	r0, r3
 8013ea0:	3708      	adds	r7, #8
 8013ea2:	46bd      	mov	sp, r7
 8013ea4:	bd80      	pop	{r7, pc}
 8013ea6:	bf00      	nop
 8013ea8:	24004248 	.word	0x24004248

08013eac <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 8013eac:	b580      	push	{r7, lr}
 8013eae:	b086      	sub	sp, #24
 8013eb0:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 8013eb2:	2300      	movs	r3, #0
 8013eb4:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8013eb6:	4b4f      	ldr	r3, [pc, #316]	@ (8013ff4 <xTaskIncrementTick+0x148>)
 8013eb8:	681b      	ldr	r3, [r3, #0]
 8013eba:	2b00      	cmp	r3, #0
 8013ebc:	f040 8090 	bne.w	8013fe0 <xTaskIncrementTick+0x134>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 8013ec0:	4b4d      	ldr	r3, [pc, #308]	@ (8013ff8 <xTaskIncrementTick+0x14c>)
 8013ec2:	681b      	ldr	r3, [r3, #0]
 8013ec4:	3301      	adds	r3, #1
 8013ec6:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 8013ec8:	4a4b      	ldr	r2, [pc, #300]	@ (8013ff8 <xTaskIncrementTick+0x14c>)
 8013eca:	693b      	ldr	r3, [r7, #16]
 8013ecc:	6013      	str	r3, [r2, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 8013ece:	693b      	ldr	r3, [r7, #16]
 8013ed0:	2b00      	cmp	r3, #0
 8013ed2:	d121      	bne.n	8013f18 <xTaskIncrementTick+0x6c>
		{
			taskSWITCH_DELAYED_LISTS();
 8013ed4:	4b49      	ldr	r3, [pc, #292]	@ (8013ffc <xTaskIncrementTick+0x150>)
 8013ed6:	681b      	ldr	r3, [r3, #0]
 8013ed8:	681b      	ldr	r3, [r3, #0]
 8013eda:	2b00      	cmp	r3, #0
 8013edc:	d00b      	beq.n	8013ef6 <xTaskIncrementTick+0x4a>
	__asm volatile
 8013ede:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013ee2:	f383 8811 	msr	BASEPRI, r3
 8013ee6:	f3bf 8f6f 	isb	sy
 8013eea:	f3bf 8f4f 	dsb	sy
 8013eee:	603b      	str	r3, [r7, #0]
}
 8013ef0:	bf00      	nop
 8013ef2:	bf00      	nop
 8013ef4:	e7fd      	b.n	8013ef2 <xTaskIncrementTick+0x46>
 8013ef6:	4b41      	ldr	r3, [pc, #260]	@ (8013ffc <xTaskIncrementTick+0x150>)
 8013ef8:	681b      	ldr	r3, [r3, #0]
 8013efa:	60fb      	str	r3, [r7, #12]
 8013efc:	4b40      	ldr	r3, [pc, #256]	@ (8014000 <xTaskIncrementTick+0x154>)
 8013efe:	681b      	ldr	r3, [r3, #0]
 8013f00:	4a3e      	ldr	r2, [pc, #248]	@ (8013ffc <xTaskIncrementTick+0x150>)
 8013f02:	6013      	str	r3, [r2, #0]
 8013f04:	4a3e      	ldr	r2, [pc, #248]	@ (8014000 <xTaskIncrementTick+0x154>)
 8013f06:	68fb      	ldr	r3, [r7, #12]
 8013f08:	6013      	str	r3, [r2, #0]
 8013f0a:	4b3e      	ldr	r3, [pc, #248]	@ (8014004 <xTaskIncrementTick+0x158>)
 8013f0c:	681b      	ldr	r3, [r3, #0]
 8013f0e:	3301      	adds	r3, #1
 8013f10:	4a3c      	ldr	r2, [pc, #240]	@ (8014004 <xTaskIncrementTick+0x158>)
 8013f12:	6013      	str	r3, [r2, #0]
 8013f14:	f000 fb18 	bl	8014548 <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 8013f18:	4b3b      	ldr	r3, [pc, #236]	@ (8014008 <xTaskIncrementTick+0x15c>)
 8013f1a:	681b      	ldr	r3, [r3, #0]
 8013f1c:	693a      	ldr	r2, [r7, #16]
 8013f1e:	429a      	cmp	r2, r3
 8013f20:	d349      	bcc.n	8013fb6 <xTaskIncrementTick+0x10a>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8013f22:	4b36      	ldr	r3, [pc, #216]	@ (8013ffc <xTaskIncrementTick+0x150>)
 8013f24:	681b      	ldr	r3, [r3, #0]
 8013f26:	681b      	ldr	r3, [r3, #0]
 8013f28:	2b00      	cmp	r3, #0
 8013f2a:	d104      	bne.n	8013f36 <xTaskIncrementTick+0x8a>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013f2c:	4b36      	ldr	r3, [pc, #216]	@ (8014008 <xTaskIncrementTick+0x15c>)
 8013f2e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8013f32:	601a      	str	r2, [r3, #0]
					break;
 8013f34:	e03f      	b.n	8013fb6 <xTaskIncrementTick+0x10a>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8013f36:	4b31      	ldr	r3, [pc, #196]	@ (8013ffc <xTaskIncrementTick+0x150>)
 8013f38:	681b      	ldr	r3, [r3, #0]
 8013f3a:	68db      	ldr	r3, [r3, #12]
 8013f3c:	68db      	ldr	r3, [r3, #12]
 8013f3e:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 8013f40:	68bb      	ldr	r3, [r7, #8]
 8013f42:	685b      	ldr	r3, [r3, #4]
 8013f44:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 8013f46:	693a      	ldr	r2, [r7, #16]
 8013f48:	687b      	ldr	r3, [r7, #4]
 8013f4a:	429a      	cmp	r2, r3
 8013f4c:	d203      	bcs.n	8013f56 <xTaskIncrementTick+0xaa>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 8013f4e:	4a2e      	ldr	r2, [pc, #184]	@ (8014008 <xTaskIncrementTick+0x15c>)
 8013f50:	687b      	ldr	r3, [r7, #4]
 8013f52:	6013      	str	r3, [r2, #0]
						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
 8013f54:	e02f      	b.n	8013fb6 <xTaskIncrementTick+0x10a>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8013f56:	68bb      	ldr	r3, [r7, #8]
 8013f58:	3304      	adds	r3, #4
 8013f5a:	4618      	mov	r0, r3
 8013f5c:	f7fd ff90 	bl	8011e80 <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 8013f60:	68bb      	ldr	r3, [r7, #8]
 8013f62:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8013f64:	2b00      	cmp	r3, #0
 8013f66:	d004      	beq.n	8013f72 <xTaskIncrementTick+0xc6>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8013f68:	68bb      	ldr	r3, [r7, #8]
 8013f6a:	3318      	adds	r3, #24
 8013f6c:	4618      	mov	r0, r3
 8013f6e:	f7fd ff87 	bl	8011e80 <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 8013f72:	68bb      	ldr	r3, [r7, #8]
 8013f74:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013f76:	4b25      	ldr	r3, [pc, #148]	@ (801400c <xTaskIncrementTick+0x160>)
 8013f78:	681b      	ldr	r3, [r3, #0]
 8013f7a:	429a      	cmp	r2, r3
 8013f7c:	d903      	bls.n	8013f86 <xTaskIncrementTick+0xda>
 8013f7e:	68bb      	ldr	r3, [r7, #8]
 8013f80:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013f82:	4a22      	ldr	r2, [pc, #136]	@ (801400c <xTaskIncrementTick+0x160>)
 8013f84:	6013      	str	r3, [r2, #0]
 8013f86:	68bb      	ldr	r3, [r7, #8]
 8013f88:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013f8a:	4613      	mov	r3, r2
 8013f8c:	009b      	lsls	r3, r3, #2
 8013f8e:	4413      	add	r3, r2
 8013f90:	009b      	lsls	r3, r3, #2
 8013f92:	4a1f      	ldr	r2, [pc, #124]	@ (8014010 <xTaskIncrementTick+0x164>)
 8013f94:	441a      	add	r2, r3
 8013f96:	68bb      	ldr	r3, [r7, #8]
 8013f98:	3304      	adds	r3, #4
 8013f9a:	4619      	mov	r1, r3
 8013f9c:	4610      	mov	r0, r2
 8013f9e:	f7fd ff12 	bl	8011dc6 <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 8013fa2:	68bb      	ldr	r3, [r7, #8]
 8013fa4:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013fa6:	4b1b      	ldr	r3, [pc, #108]	@ (8014014 <xTaskIncrementTick+0x168>)
 8013fa8:	681b      	ldr	r3, [r3, #0]
 8013faa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013fac:	429a      	cmp	r2, r3
 8013fae:	d3b8      	bcc.n	8013f22 <xTaskIncrementTick+0x76>
						{
							xSwitchRequired = pdTRUE;
 8013fb0:	2301      	movs	r3, #1
 8013fb2:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8013fb4:	e7b5      	b.n	8013f22 <xTaskIncrementTick+0x76>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 8013fb6:	4b17      	ldr	r3, [pc, #92]	@ (8014014 <xTaskIncrementTick+0x168>)
 8013fb8:	681b      	ldr	r3, [r3, #0]
 8013fba:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013fbc:	4914      	ldr	r1, [pc, #80]	@ (8014010 <xTaskIncrementTick+0x164>)
 8013fbe:	4613      	mov	r3, r2
 8013fc0:	009b      	lsls	r3, r3, #2
 8013fc2:	4413      	add	r3, r2
 8013fc4:	009b      	lsls	r3, r3, #2
 8013fc6:	440b      	add	r3, r1
 8013fc8:	681b      	ldr	r3, [r3, #0]
 8013fca:	2b01      	cmp	r3, #1
 8013fcc:	d901      	bls.n	8013fd2 <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 8013fce:	2301      	movs	r3, #1
 8013fd0:	617b      	str	r3, [r7, #20]
		}
		#endif /* configUSE_TICK_HOOK */

		#if ( configUSE_PREEMPTION == 1 )
		{
			if( xYieldPending != pdFALSE )
 8013fd2:	4b11      	ldr	r3, [pc, #68]	@ (8014018 <xTaskIncrementTick+0x16c>)
 8013fd4:	681b      	ldr	r3, [r3, #0]
 8013fd6:	2b00      	cmp	r3, #0
 8013fd8:	d007      	beq.n	8013fea <xTaskIncrementTick+0x13e>
			{
				xSwitchRequired = pdTRUE;
 8013fda:	2301      	movs	r3, #1
 8013fdc:	617b      	str	r3, [r7, #20]
 8013fde:	e004      	b.n	8013fea <xTaskIncrementTick+0x13e>
		}
		#endif /* configUSE_PREEMPTION */
	}
	else
	{
		++xPendedTicks;
 8013fe0:	4b0e      	ldr	r3, [pc, #56]	@ (801401c <xTaskIncrementTick+0x170>)
 8013fe2:	681b      	ldr	r3, [r3, #0]
 8013fe4:	3301      	adds	r3, #1
 8013fe6:	4a0d      	ldr	r2, [pc, #52]	@ (801401c <xTaskIncrementTick+0x170>)
 8013fe8:	6013      	str	r3, [r2, #0]
			vApplicationTickHook();
		}
		#endif
	}

	return xSwitchRequired;
 8013fea:	697b      	ldr	r3, [r7, #20]
}
 8013fec:	4618      	mov	r0, r3
 8013fee:	3718      	adds	r7, #24
 8013ff0:	46bd      	mov	sp, r7
 8013ff2:	bd80      	pop	{r7, pc}
 8013ff4:	2400426c 	.word	0x2400426c
 8013ff8:	24004248 	.word	0x24004248
 8013ffc:	240041fc 	.word	0x240041fc
 8014000:	24004200 	.word	0x24004200
 8014004:	2400425c 	.word	0x2400425c
 8014008:	24004264 	.word	0x24004264
 801400c:	2400424c 	.word	0x2400424c
 8014010:	24003d74 	.word	0x24003d74
 8014014:	24003d70 	.word	0x24003d70
 8014018:	24004258 	.word	0x24004258
 801401c:	24004254 	.word	0x24004254

08014020 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8014020:	b580      	push	{r7, lr}
 8014022:	b084      	sub	sp, #16
 8014024:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 8014026:	4b32      	ldr	r3, [pc, #200]	@ (80140f0 <vTaskSwitchContext+0xd0>)
 8014028:	681b      	ldr	r3, [r3, #0]
 801402a:	2b00      	cmp	r3, #0
 801402c:	d003      	beq.n	8014036 <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 801402e:	4b31      	ldr	r3, [pc, #196]	@ (80140f4 <vTaskSwitchContext+0xd4>)
 8014030:	2201      	movs	r2, #1
 8014032:	601a      	str	r2, [r3, #0]
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 8014034:	e058      	b.n	80140e8 <vTaskSwitchContext+0xc8>
		xYieldPending = pdFALSE;
 8014036:	4b2f      	ldr	r3, [pc, #188]	@ (80140f4 <vTaskSwitchContext+0xd4>)
 8014038:	2200      	movs	r2, #0
 801403a:	601a      	str	r2, [r3, #0]
		taskCHECK_FOR_STACK_OVERFLOW();
 801403c:	4b2e      	ldr	r3, [pc, #184]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 801403e:	681b      	ldr	r3, [r3, #0]
 8014040:	681a      	ldr	r2, [r3, #0]
 8014042:	4b2d      	ldr	r3, [pc, #180]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 8014044:	681b      	ldr	r3, [r3, #0]
 8014046:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8014048:	429a      	cmp	r2, r3
 801404a:	d808      	bhi.n	801405e <vTaskSwitchContext+0x3e>
 801404c:	4b2a      	ldr	r3, [pc, #168]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 801404e:	681a      	ldr	r2, [r3, #0]
 8014050:	4b29      	ldr	r3, [pc, #164]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 8014052:	681b      	ldr	r3, [r3, #0]
 8014054:	3334      	adds	r3, #52	@ 0x34
 8014056:	4619      	mov	r1, r3
 8014058:	4610      	mov	r0, r2
 801405a:	f7ed fe22 	bl	8001ca2 <vApplicationStackOverflowHook>
		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801405e:	4b27      	ldr	r3, [pc, #156]	@ (80140fc <vTaskSwitchContext+0xdc>)
 8014060:	681b      	ldr	r3, [r3, #0]
 8014062:	60fb      	str	r3, [r7, #12]
 8014064:	e011      	b.n	801408a <vTaskSwitchContext+0x6a>
 8014066:	68fb      	ldr	r3, [r7, #12]
 8014068:	2b00      	cmp	r3, #0
 801406a:	d10b      	bne.n	8014084 <vTaskSwitchContext+0x64>
	__asm volatile
 801406c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014070:	f383 8811 	msr	BASEPRI, r3
 8014074:	f3bf 8f6f 	isb	sy
 8014078:	f3bf 8f4f 	dsb	sy
 801407c:	607b      	str	r3, [r7, #4]
}
 801407e:	bf00      	nop
 8014080:	bf00      	nop
 8014082:	e7fd      	b.n	8014080 <vTaskSwitchContext+0x60>
 8014084:	68fb      	ldr	r3, [r7, #12]
 8014086:	3b01      	subs	r3, #1
 8014088:	60fb      	str	r3, [r7, #12]
 801408a:	491d      	ldr	r1, [pc, #116]	@ (8014100 <vTaskSwitchContext+0xe0>)
 801408c:	68fa      	ldr	r2, [r7, #12]
 801408e:	4613      	mov	r3, r2
 8014090:	009b      	lsls	r3, r3, #2
 8014092:	4413      	add	r3, r2
 8014094:	009b      	lsls	r3, r3, #2
 8014096:	440b      	add	r3, r1
 8014098:	681b      	ldr	r3, [r3, #0]
 801409a:	2b00      	cmp	r3, #0
 801409c:	d0e3      	beq.n	8014066 <vTaskSwitchContext+0x46>
 801409e:	68fa      	ldr	r2, [r7, #12]
 80140a0:	4613      	mov	r3, r2
 80140a2:	009b      	lsls	r3, r3, #2
 80140a4:	4413      	add	r3, r2
 80140a6:	009b      	lsls	r3, r3, #2
 80140a8:	4a15      	ldr	r2, [pc, #84]	@ (8014100 <vTaskSwitchContext+0xe0>)
 80140aa:	4413      	add	r3, r2
 80140ac:	60bb      	str	r3, [r7, #8]
 80140ae:	68bb      	ldr	r3, [r7, #8]
 80140b0:	685b      	ldr	r3, [r3, #4]
 80140b2:	685a      	ldr	r2, [r3, #4]
 80140b4:	68bb      	ldr	r3, [r7, #8]
 80140b6:	605a      	str	r2, [r3, #4]
 80140b8:	68bb      	ldr	r3, [r7, #8]
 80140ba:	685a      	ldr	r2, [r3, #4]
 80140bc:	68bb      	ldr	r3, [r7, #8]
 80140be:	3308      	adds	r3, #8
 80140c0:	429a      	cmp	r2, r3
 80140c2:	d104      	bne.n	80140ce <vTaskSwitchContext+0xae>
 80140c4:	68bb      	ldr	r3, [r7, #8]
 80140c6:	685b      	ldr	r3, [r3, #4]
 80140c8:	685a      	ldr	r2, [r3, #4]
 80140ca:	68bb      	ldr	r3, [r7, #8]
 80140cc:	605a      	str	r2, [r3, #4]
 80140ce:	68bb      	ldr	r3, [r7, #8]
 80140d0:	685b      	ldr	r3, [r3, #4]
 80140d2:	68db      	ldr	r3, [r3, #12]
 80140d4:	4a08      	ldr	r2, [pc, #32]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 80140d6:	6013      	str	r3, [r2, #0]
 80140d8:	4a08      	ldr	r2, [pc, #32]	@ (80140fc <vTaskSwitchContext+0xdc>)
 80140da:	68fb      	ldr	r3, [r7, #12]
 80140dc:	6013      	str	r3, [r2, #0]
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 80140de:	4b06      	ldr	r3, [pc, #24]	@ (80140f8 <vTaskSwitchContext+0xd8>)
 80140e0:	681b      	ldr	r3, [r3, #0]
 80140e2:	3354      	adds	r3, #84	@ 0x54
 80140e4:	4a07      	ldr	r2, [pc, #28]	@ (8014104 <vTaskSwitchContext+0xe4>)
 80140e6:	6013      	str	r3, [r2, #0]
}
 80140e8:	bf00      	nop
 80140ea:	3710      	adds	r7, #16
 80140ec:	46bd      	mov	sp, r7
 80140ee:	bd80      	pop	{r7, pc}
 80140f0:	2400426c 	.word	0x2400426c
 80140f4:	24004258 	.word	0x24004258
 80140f8:	24003d70 	.word	0x24003d70
 80140fc:	2400424c 	.word	0x2400424c
 8014100:	24003d74 	.word	0x24003d74
 8014104:	240001d4 	.word	0x240001d4

08014108 <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 8014108:	b580      	push	{r7, lr}
 801410a:	b084      	sub	sp, #16
 801410c:	af00      	add	r7, sp, #0
 801410e:	6078      	str	r0, [r7, #4]
 8014110:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 8014112:	687b      	ldr	r3, [r7, #4]
 8014114:	2b00      	cmp	r3, #0
 8014116:	d10b      	bne.n	8014130 <vTaskPlaceOnEventList+0x28>
	__asm volatile
 8014118:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801411c:	f383 8811 	msr	BASEPRI, r3
 8014120:	f3bf 8f6f 	isb	sy
 8014124:	f3bf 8f4f 	dsb	sy
 8014128:	60fb      	str	r3, [r7, #12]
}
 801412a:	bf00      	nop
 801412c:	bf00      	nop
 801412e:	e7fd      	b.n	801412c <vTaskPlaceOnEventList+0x24>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8014130:	4b07      	ldr	r3, [pc, #28]	@ (8014150 <vTaskPlaceOnEventList+0x48>)
 8014132:	681b      	ldr	r3, [r3, #0]
 8014134:	3318      	adds	r3, #24
 8014136:	4619      	mov	r1, r3
 8014138:	6878      	ldr	r0, [r7, #4]
 801413a:	f7fd fe68 	bl	8011e0e <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 801413e:	2101      	movs	r1, #1
 8014140:	6838      	ldr	r0, [r7, #0]
 8014142:	f000 fded 	bl	8014d20 <prvAddCurrentTaskToDelayedList>
}
 8014146:	bf00      	nop
 8014148:	3710      	adds	r7, #16
 801414a:	46bd      	mov	sp, r7
 801414c:	bd80      	pop	{r7, pc}
 801414e:	bf00      	nop
 8014150:	24003d70 	.word	0x24003d70

08014154 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8014154:	b580      	push	{r7, lr}
 8014156:	b086      	sub	sp, #24
 8014158:	af00      	add	r7, sp, #0
 801415a:	60f8      	str	r0, [r7, #12]
 801415c:	60b9      	str	r1, [r7, #8]
 801415e:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 8014160:	68fb      	ldr	r3, [r7, #12]
 8014162:	2b00      	cmp	r3, #0
 8014164:	d10b      	bne.n	801417e <vTaskPlaceOnEventListRestricted+0x2a>
	__asm volatile
 8014166:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801416a:	f383 8811 	msr	BASEPRI, r3
 801416e:	f3bf 8f6f 	isb	sy
 8014172:	f3bf 8f4f 	dsb	sy
 8014176:	617b      	str	r3, [r7, #20]
}
 8014178:	bf00      	nop
 801417a:	bf00      	nop
 801417c:	e7fd      	b.n	801417a <vTaskPlaceOnEventListRestricted+0x26>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 801417e:	4b0a      	ldr	r3, [pc, #40]	@ (80141a8 <vTaskPlaceOnEventListRestricted+0x54>)
 8014180:	681b      	ldr	r3, [r3, #0]
 8014182:	3318      	adds	r3, #24
 8014184:	4619      	mov	r1, r3
 8014186:	68f8      	ldr	r0, [r7, #12]
 8014188:	f7fd fe1d 	bl	8011dc6 <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 801418c:	687b      	ldr	r3, [r7, #4]
 801418e:	2b00      	cmp	r3, #0
 8014190:	d002      	beq.n	8014198 <vTaskPlaceOnEventListRestricted+0x44>
		{
			xTicksToWait = portMAX_DELAY;
 8014192:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8014196:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 8014198:	6879      	ldr	r1, [r7, #4]
 801419a:	68b8      	ldr	r0, [r7, #8]
 801419c:	f000 fdc0 	bl	8014d20 <prvAddCurrentTaskToDelayedList>
	}
 80141a0:	bf00      	nop
 80141a2:	3718      	adds	r7, #24
 80141a4:	46bd      	mov	sp, r7
 80141a6:	bd80      	pop	{r7, pc}
 80141a8:	24003d70 	.word	0x24003d70

080141ac <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 80141ac:	b580      	push	{r7, lr}
 80141ae:	b086      	sub	sp, #24
 80141b0:	af00      	add	r7, sp, #0
 80141b2:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80141b4:	687b      	ldr	r3, [r7, #4]
 80141b6:	68db      	ldr	r3, [r3, #12]
 80141b8:	68db      	ldr	r3, [r3, #12]
 80141ba:	613b      	str	r3, [r7, #16]
	configASSERT( pxUnblockedTCB );
 80141bc:	693b      	ldr	r3, [r7, #16]
 80141be:	2b00      	cmp	r3, #0
 80141c0:	d10b      	bne.n	80141da <xTaskRemoveFromEventList+0x2e>
	__asm volatile
 80141c2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80141c6:	f383 8811 	msr	BASEPRI, r3
 80141ca:	f3bf 8f6f 	isb	sy
 80141ce:	f3bf 8f4f 	dsb	sy
 80141d2:	60fb      	str	r3, [r7, #12]
}
 80141d4:	bf00      	nop
 80141d6:	bf00      	nop
 80141d8:	e7fd      	b.n	80141d6 <xTaskRemoveFromEventList+0x2a>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 80141da:	693b      	ldr	r3, [r7, #16]
 80141dc:	3318      	adds	r3, #24
 80141de:	4618      	mov	r0, r3
 80141e0:	f7fd fe4e 	bl	8011e80 <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80141e4:	4b1d      	ldr	r3, [pc, #116]	@ (801425c <xTaskRemoveFromEventList+0xb0>)
 80141e6:	681b      	ldr	r3, [r3, #0]
 80141e8:	2b00      	cmp	r3, #0
 80141ea:	d11d      	bne.n	8014228 <xTaskRemoveFromEventList+0x7c>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 80141ec:	693b      	ldr	r3, [r7, #16]
 80141ee:	3304      	adds	r3, #4
 80141f0:	4618      	mov	r0, r3
 80141f2:	f7fd fe45 	bl	8011e80 <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 80141f6:	693b      	ldr	r3, [r7, #16]
 80141f8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80141fa:	4b19      	ldr	r3, [pc, #100]	@ (8014260 <xTaskRemoveFromEventList+0xb4>)
 80141fc:	681b      	ldr	r3, [r3, #0]
 80141fe:	429a      	cmp	r2, r3
 8014200:	d903      	bls.n	801420a <xTaskRemoveFromEventList+0x5e>
 8014202:	693b      	ldr	r3, [r7, #16]
 8014204:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014206:	4a16      	ldr	r2, [pc, #88]	@ (8014260 <xTaskRemoveFromEventList+0xb4>)
 8014208:	6013      	str	r3, [r2, #0]
 801420a:	693b      	ldr	r3, [r7, #16]
 801420c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801420e:	4613      	mov	r3, r2
 8014210:	009b      	lsls	r3, r3, #2
 8014212:	4413      	add	r3, r2
 8014214:	009b      	lsls	r3, r3, #2
 8014216:	4a13      	ldr	r2, [pc, #76]	@ (8014264 <xTaskRemoveFromEventList+0xb8>)
 8014218:	441a      	add	r2, r3
 801421a:	693b      	ldr	r3, [r7, #16]
 801421c:	3304      	adds	r3, #4
 801421e:	4619      	mov	r1, r3
 8014220:	4610      	mov	r0, r2
 8014222:	f7fd fdd0 	bl	8011dc6 <vListInsertEnd>
 8014226:	e005      	b.n	8014234 <xTaskRemoveFromEventList+0x88>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 8014228:	693b      	ldr	r3, [r7, #16]
 801422a:	3318      	adds	r3, #24
 801422c:	4619      	mov	r1, r3
 801422e:	480e      	ldr	r0, [pc, #56]	@ (8014268 <xTaskRemoveFromEventList+0xbc>)
 8014230:	f7fd fdc9 	bl	8011dc6 <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014234:	693b      	ldr	r3, [r7, #16]
 8014236:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014238:	4b0c      	ldr	r3, [pc, #48]	@ (801426c <xTaskRemoveFromEventList+0xc0>)
 801423a:	681b      	ldr	r3, [r3, #0]
 801423c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801423e:	429a      	cmp	r2, r3
 8014240:	d905      	bls.n	801424e <xTaskRemoveFromEventList+0xa2>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 8014242:	2301      	movs	r3, #1
 8014244:	617b      	str	r3, [r7, #20]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 8014246:	4b0a      	ldr	r3, [pc, #40]	@ (8014270 <xTaskRemoveFromEventList+0xc4>)
 8014248:	2201      	movs	r2, #1
 801424a:	601a      	str	r2, [r3, #0]
 801424c:	e001      	b.n	8014252 <xTaskRemoveFromEventList+0xa6>
	}
	else
	{
		xReturn = pdFALSE;
 801424e:	2300      	movs	r3, #0
 8014250:	617b      	str	r3, [r7, #20]
	}

	return xReturn;
 8014252:	697b      	ldr	r3, [r7, #20]
}
 8014254:	4618      	mov	r0, r3
 8014256:	3718      	adds	r7, #24
 8014258:	46bd      	mov	sp, r7
 801425a:	bd80      	pop	{r7, pc}
 801425c:	2400426c 	.word	0x2400426c
 8014260:	2400424c 	.word	0x2400424c
 8014264:	24003d74 	.word	0x24003d74
 8014268:	24004204 	.word	0x24004204
 801426c:	24003d70 	.word	0x24003d70
 8014270:	24004258 	.word	0x24004258

08014274 <vTaskSetTimeOutState>:
	}
}
/*-----------------------------------------------------------*/

void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8014274:	b580      	push	{r7, lr}
 8014276:	b084      	sub	sp, #16
 8014278:	af00      	add	r7, sp, #0
 801427a:	6078      	str	r0, [r7, #4]
	configASSERT( pxTimeOut );
 801427c:	687b      	ldr	r3, [r7, #4]
 801427e:	2b00      	cmp	r3, #0
 8014280:	d10b      	bne.n	801429a <vTaskSetTimeOutState+0x26>
	__asm volatile
 8014282:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014286:	f383 8811 	msr	BASEPRI, r3
 801428a:	f3bf 8f6f 	isb	sy
 801428e:	f3bf 8f4f 	dsb	sy
 8014292:	60fb      	str	r3, [r7, #12]
}
 8014294:	bf00      	nop
 8014296:	bf00      	nop
 8014298:	e7fd      	b.n	8014296 <vTaskSetTimeOutState+0x22>
	taskENTER_CRITICAL();
 801429a:	f001 fb0d 	bl	80158b8 <vPortEnterCritical>
	{
		pxTimeOut->xOverflowCount = xNumOfOverflows;
 801429e:	4b07      	ldr	r3, [pc, #28]	@ (80142bc <vTaskSetTimeOutState+0x48>)
 80142a0:	681a      	ldr	r2, [r3, #0]
 80142a2:	687b      	ldr	r3, [r7, #4]
 80142a4:	601a      	str	r2, [r3, #0]
		pxTimeOut->xTimeOnEntering = xTickCount;
 80142a6:	4b06      	ldr	r3, [pc, #24]	@ (80142c0 <vTaskSetTimeOutState+0x4c>)
 80142a8:	681a      	ldr	r2, [r3, #0]
 80142aa:	687b      	ldr	r3, [r7, #4]
 80142ac:	605a      	str	r2, [r3, #4]
	}
	taskEXIT_CRITICAL();
 80142ae:	f001 fb35 	bl	801591c <vPortExitCritical>
}
 80142b2:	bf00      	nop
 80142b4:	3710      	adds	r7, #16
 80142b6:	46bd      	mov	sp, r7
 80142b8:	bd80      	pop	{r7, pc}
 80142ba:	bf00      	nop
 80142bc:	2400425c 	.word	0x2400425c
 80142c0:	24004248 	.word	0x24004248

080142c4 <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 80142c4:	b480      	push	{r7}
 80142c6:	b083      	sub	sp, #12
 80142c8:	af00      	add	r7, sp, #0
 80142ca:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 80142cc:	4b06      	ldr	r3, [pc, #24]	@ (80142e8 <vTaskInternalSetTimeOutState+0x24>)
 80142ce:	681a      	ldr	r2, [r3, #0]
 80142d0:	687b      	ldr	r3, [r7, #4]
 80142d2:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 80142d4:	4b05      	ldr	r3, [pc, #20]	@ (80142ec <vTaskInternalSetTimeOutState+0x28>)
 80142d6:	681a      	ldr	r2, [r3, #0]
 80142d8:	687b      	ldr	r3, [r7, #4]
 80142da:	605a      	str	r2, [r3, #4]
}
 80142dc:	bf00      	nop
 80142de:	370c      	adds	r7, #12
 80142e0:	46bd      	mov	sp, r7
 80142e2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80142e6:	4770      	bx	lr
 80142e8:	2400425c 	.word	0x2400425c
 80142ec:	24004248 	.word	0x24004248

080142f0 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 80142f0:	b580      	push	{r7, lr}
 80142f2:	b088      	sub	sp, #32
 80142f4:	af00      	add	r7, sp, #0
 80142f6:	6078      	str	r0, [r7, #4]
 80142f8:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 80142fa:	687b      	ldr	r3, [r7, #4]
 80142fc:	2b00      	cmp	r3, #0
 80142fe:	d10b      	bne.n	8014318 <xTaskCheckForTimeOut+0x28>
	__asm volatile
 8014300:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014304:	f383 8811 	msr	BASEPRI, r3
 8014308:	f3bf 8f6f 	isb	sy
 801430c:	f3bf 8f4f 	dsb	sy
 8014310:	613b      	str	r3, [r7, #16]
}
 8014312:	bf00      	nop
 8014314:	bf00      	nop
 8014316:	e7fd      	b.n	8014314 <xTaskCheckForTimeOut+0x24>
	configASSERT( pxTicksToWait );
 8014318:	683b      	ldr	r3, [r7, #0]
 801431a:	2b00      	cmp	r3, #0
 801431c:	d10b      	bne.n	8014336 <xTaskCheckForTimeOut+0x46>
	__asm volatile
 801431e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014322:	f383 8811 	msr	BASEPRI, r3
 8014326:	f3bf 8f6f 	isb	sy
 801432a:	f3bf 8f4f 	dsb	sy
 801432e:	60fb      	str	r3, [r7, #12]
}
 8014330:	bf00      	nop
 8014332:	bf00      	nop
 8014334:	e7fd      	b.n	8014332 <xTaskCheckForTimeOut+0x42>

	taskENTER_CRITICAL();
 8014336:	f001 fabf 	bl	80158b8 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 801433a:	4b1d      	ldr	r3, [pc, #116]	@ (80143b0 <xTaskCheckForTimeOut+0xc0>)
 801433c:	681b      	ldr	r3, [r3, #0]
 801433e:	61bb      	str	r3, [r7, #24]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 8014340:	687b      	ldr	r3, [r7, #4]
 8014342:	685b      	ldr	r3, [r3, #4]
 8014344:	69ba      	ldr	r2, [r7, #24]
 8014346:	1ad3      	subs	r3, r2, r3
 8014348:	617b      	str	r3, [r7, #20]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 801434a:	683b      	ldr	r3, [r7, #0]
 801434c:	681b      	ldr	r3, [r3, #0]
 801434e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014352:	d102      	bne.n	801435a <xTaskCheckForTimeOut+0x6a>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 8014354:	2300      	movs	r3, #0
 8014356:	61fb      	str	r3, [r7, #28]
 8014358:	e023      	b.n	80143a2 <xTaskCheckForTimeOut+0xb2>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 801435a:	687b      	ldr	r3, [r7, #4]
 801435c:	681a      	ldr	r2, [r3, #0]
 801435e:	4b15      	ldr	r3, [pc, #84]	@ (80143b4 <xTaskCheckForTimeOut+0xc4>)
 8014360:	681b      	ldr	r3, [r3, #0]
 8014362:	429a      	cmp	r2, r3
 8014364:	d007      	beq.n	8014376 <xTaskCheckForTimeOut+0x86>
 8014366:	687b      	ldr	r3, [r7, #4]
 8014368:	685b      	ldr	r3, [r3, #4]
 801436a:	69ba      	ldr	r2, [r7, #24]
 801436c:	429a      	cmp	r2, r3
 801436e:	d302      	bcc.n	8014376 <xTaskCheckForTimeOut+0x86>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 8014370:	2301      	movs	r3, #1
 8014372:	61fb      	str	r3, [r7, #28]
 8014374:	e015      	b.n	80143a2 <xTaskCheckForTimeOut+0xb2>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 8014376:	683b      	ldr	r3, [r7, #0]
 8014378:	681b      	ldr	r3, [r3, #0]
 801437a:	697a      	ldr	r2, [r7, #20]
 801437c:	429a      	cmp	r2, r3
 801437e:	d20b      	bcs.n	8014398 <xTaskCheckForTimeOut+0xa8>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 8014380:	683b      	ldr	r3, [r7, #0]
 8014382:	681a      	ldr	r2, [r3, #0]
 8014384:	697b      	ldr	r3, [r7, #20]
 8014386:	1ad2      	subs	r2, r2, r3
 8014388:	683b      	ldr	r3, [r7, #0]
 801438a:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 801438c:	6878      	ldr	r0, [r7, #4]
 801438e:	f7ff ff99 	bl	80142c4 <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 8014392:	2300      	movs	r3, #0
 8014394:	61fb      	str	r3, [r7, #28]
 8014396:	e004      	b.n	80143a2 <xTaskCheckForTimeOut+0xb2>
		}
		else
		{
			*pxTicksToWait = 0;
 8014398:	683b      	ldr	r3, [r7, #0]
 801439a:	2200      	movs	r2, #0
 801439c:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 801439e:	2301      	movs	r3, #1
 80143a0:	61fb      	str	r3, [r7, #28]
		}
	}
	taskEXIT_CRITICAL();
 80143a2:	f001 fabb 	bl	801591c <vPortExitCritical>

	return xReturn;
 80143a6:	69fb      	ldr	r3, [r7, #28]
}
 80143a8:	4618      	mov	r0, r3
 80143aa:	3720      	adds	r7, #32
 80143ac:	46bd      	mov	sp, r7
 80143ae:	bd80      	pop	{r7, pc}
 80143b0:	24004248 	.word	0x24004248
 80143b4:	2400425c 	.word	0x2400425c

080143b8 <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 80143b8:	b480      	push	{r7}
 80143ba:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 80143bc:	4b03      	ldr	r3, [pc, #12]	@ (80143cc <vTaskMissedYield+0x14>)
 80143be:	2201      	movs	r2, #1
 80143c0:	601a      	str	r2, [r3, #0]
}
 80143c2:	bf00      	nop
 80143c4:	46bd      	mov	sp, r7
 80143c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80143ca:	4770      	bx	lr
 80143cc:	24004258 	.word	0x24004258

080143d0 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 80143d0:	b580      	push	{r7, lr}
 80143d2:	b082      	sub	sp, #8
 80143d4:	af00      	add	r7, sp, #0
 80143d6:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 80143d8:	f000 f852 	bl	8014480 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 80143dc:	4b06      	ldr	r3, [pc, #24]	@ (80143f8 <prvIdleTask+0x28>)
 80143de:	681b      	ldr	r3, [r3, #0]
 80143e0:	2b01      	cmp	r3, #1
 80143e2:	d9f9      	bls.n	80143d8 <prvIdleTask+0x8>
			{
				taskYIELD();
 80143e4:	4b05      	ldr	r3, [pc, #20]	@ (80143fc <prvIdleTask+0x2c>)
 80143e6:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80143ea:	601a      	str	r2, [r3, #0]
 80143ec:	f3bf 8f4f 	dsb	sy
 80143f0:	f3bf 8f6f 	isb	sy
		prvCheckTasksWaitingTermination();
 80143f4:	e7f0      	b.n	80143d8 <prvIdleTask+0x8>
 80143f6:	bf00      	nop
 80143f8:	24003d74 	.word	0x24003d74
 80143fc:	e000ed04 	.word	0xe000ed04

08014400 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8014400:	b580      	push	{r7, lr}
 8014402:	b082      	sub	sp, #8
 8014404:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8014406:	2300      	movs	r3, #0
 8014408:	607b      	str	r3, [r7, #4]
 801440a:	e00c      	b.n	8014426 <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 801440c:	687a      	ldr	r2, [r7, #4]
 801440e:	4613      	mov	r3, r2
 8014410:	009b      	lsls	r3, r3, #2
 8014412:	4413      	add	r3, r2
 8014414:	009b      	lsls	r3, r3, #2
 8014416:	4a12      	ldr	r2, [pc, #72]	@ (8014460 <prvInitialiseTaskLists+0x60>)
 8014418:	4413      	add	r3, r2
 801441a:	4618      	mov	r0, r3
 801441c:	f7fd fca6 	bl	8011d6c <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8014420:	687b      	ldr	r3, [r7, #4]
 8014422:	3301      	adds	r3, #1
 8014424:	607b      	str	r3, [r7, #4]
 8014426:	687b      	ldr	r3, [r7, #4]
 8014428:	2b37      	cmp	r3, #55	@ 0x37
 801442a:	d9ef      	bls.n	801440c <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 801442c:	480d      	ldr	r0, [pc, #52]	@ (8014464 <prvInitialiseTaskLists+0x64>)
 801442e:	f7fd fc9d 	bl	8011d6c <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 8014432:	480d      	ldr	r0, [pc, #52]	@ (8014468 <prvInitialiseTaskLists+0x68>)
 8014434:	f7fd fc9a 	bl	8011d6c <vListInitialise>
	vListInitialise( &xPendingReadyList );
 8014438:	480c      	ldr	r0, [pc, #48]	@ (801446c <prvInitialiseTaskLists+0x6c>)
 801443a:	f7fd fc97 	bl	8011d6c <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 801443e:	480c      	ldr	r0, [pc, #48]	@ (8014470 <prvInitialiseTaskLists+0x70>)
 8014440:	f7fd fc94 	bl	8011d6c <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 8014444:	480b      	ldr	r0, [pc, #44]	@ (8014474 <prvInitialiseTaskLists+0x74>)
 8014446:	f7fd fc91 	bl	8011d6c <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 801444a:	4b0b      	ldr	r3, [pc, #44]	@ (8014478 <prvInitialiseTaskLists+0x78>)
 801444c:	4a05      	ldr	r2, [pc, #20]	@ (8014464 <prvInitialiseTaskLists+0x64>)
 801444e:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 8014450:	4b0a      	ldr	r3, [pc, #40]	@ (801447c <prvInitialiseTaskLists+0x7c>)
 8014452:	4a05      	ldr	r2, [pc, #20]	@ (8014468 <prvInitialiseTaskLists+0x68>)
 8014454:	601a      	str	r2, [r3, #0]
}
 8014456:	bf00      	nop
 8014458:	3708      	adds	r7, #8
 801445a:	46bd      	mov	sp, r7
 801445c:	bd80      	pop	{r7, pc}
 801445e:	bf00      	nop
 8014460:	24003d74 	.word	0x24003d74
 8014464:	240041d4 	.word	0x240041d4
 8014468:	240041e8 	.word	0x240041e8
 801446c:	24004204 	.word	0x24004204
 8014470:	24004218 	.word	0x24004218
 8014474:	24004230 	.word	0x24004230
 8014478:	240041fc 	.word	0x240041fc
 801447c:	24004200 	.word	0x24004200

08014480 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 8014480:	b580      	push	{r7, lr}
 8014482:	b082      	sub	sp, #8
 8014484:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 8014486:	e019      	b.n	80144bc <prvCheckTasksWaitingTermination+0x3c>
		{
			taskENTER_CRITICAL();
 8014488:	f001 fa16 	bl	80158b8 <vPortEnterCritical>
			{
				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801448c:	4b10      	ldr	r3, [pc, #64]	@ (80144d0 <prvCheckTasksWaitingTermination+0x50>)
 801448e:	68db      	ldr	r3, [r3, #12]
 8014490:	68db      	ldr	r3, [r3, #12]
 8014492:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014494:	687b      	ldr	r3, [r7, #4]
 8014496:	3304      	adds	r3, #4
 8014498:	4618      	mov	r0, r3
 801449a:	f7fd fcf1 	bl	8011e80 <uxListRemove>
				--uxCurrentNumberOfTasks;
 801449e:	4b0d      	ldr	r3, [pc, #52]	@ (80144d4 <prvCheckTasksWaitingTermination+0x54>)
 80144a0:	681b      	ldr	r3, [r3, #0]
 80144a2:	3b01      	subs	r3, #1
 80144a4:	4a0b      	ldr	r2, [pc, #44]	@ (80144d4 <prvCheckTasksWaitingTermination+0x54>)
 80144a6:	6013      	str	r3, [r2, #0]
				--uxDeletedTasksWaitingCleanUp;
 80144a8:	4b0b      	ldr	r3, [pc, #44]	@ (80144d8 <prvCheckTasksWaitingTermination+0x58>)
 80144aa:	681b      	ldr	r3, [r3, #0]
 80144ac:	3b01      	subs	r3, #1
 80144ae:	4a0a      	ldr	r2, [pc, #40]	@ (80144d8 <prvCheckTasksWaitingTermination+0x58>)
 80144b0:	6013      	str	r3, [r2, #0]
			}
			taskEXIT_CRITICAL();
 80144b2:	f001 fa33 	bl	801591c <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 80144b6:	6878      	ldr	r0, [r7, #4]
 80144b8:	f000 f810 	bl	80144dc <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 80144bc:	4b06      	ldr	r3, [pc, #24]	@ (80144d8 <prvCheckTasksWaitingTermination+0x58>)
 80144be:	681b      	ldr	r3, [r3, #0]
 80144c0:	2b00      	cmp	r3, #0
 80144c2:	d1e1      	bne.n	8014488 <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 80144c4:	bf00      	nop
 80144c6:	bf00      	nop
 80144c8:	3708      	adds	r7, #8
 80144ca:	46bd      	mov	sp, r7
 80144cc:	bd80      	pop	{r7, pc}
 80144ce:	bf00      	nop
 80144d0:	24004218 	.word	0x24004218
 80144d4:	24004244 	.word	0x24004244
 80144d8:	2400422c 	.word	0x2400422c

080144dc <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 80144dc:	b580      	push	{r7, lr}
 80144de:	b084      	sub	sp, #16
 80144e0:	af00      	add	r7, sp, #0
 80144e2:	6078      	str	r0, [r7, #4]
		to the task to free any memory allocated at the application level.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		#if ( configUSE_NEWLIB_REENTRANT == 1 )
		{
			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
 80144e4:	687b      	ldr	r3, [r7, #4]
 80144e6:	3354      	adds	r3, #84	@ 0x54
 80144e8:	4618      	mov	r0, r3
 80144ea:	f016 faf7 	bl	802aadc <_reclaim_reent>
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 80144ee:	687b      	ldr	r3, [r7, #4]
 80144f0:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 80144f4:	2b00      	cmp	r3, #0
 80144f6:	d108      	bne.n	801450a <prvDeleteTCB+0x2e>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 80144f8:	687b      	ldr	r3, [r7, #4]
 80144fa:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80144fc:	4618      	mov	r0, r3
 80144fe:	f001 fbcb 	bl	8015c98 <vPortFree>
				vPortFree( pxTCB );
 8014502:	6878      	ldr	r0, [r7, #4]
 8014504:	f001 fbc8 	bl	8015c98 <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 8014508:	e019      	b.n	801453e <prvDeleteTCB+0x62>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 801450a:	687b      	ldr	r3, [r7, #4]
 801450c:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8014510:	2b01      	cmp	r3, #1
 8014512:	d103      	bne.n	801451c <prvDeleteTCB+0x40>
				vPortFree( pxTCB );
 8014514:	6878      	ldr	r0, [r7, #4]
 8014516:	f001 fbbf 	bl	8015c98 <vPortFree>
	}
 801451a:	e010      	b.n	801453e <prvDeleteTCB+0x62>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 801451c:	687b      	ldr	r3, [r7, #4]
 801451e:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8014522:	2b02      	cmp	r3, #2
 8014524:	d00b      	beq.n	801453e <prvDeleteTCB+0x62>
	__asm volatile
 8014526:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801452a:	f383 8811 	msr	BASEPRI, r3
 801452e:	f3bf 8f6f 	isb	sy
 8014532:	f3bf 8f4f 	dsb	sy
 8014536:	60fb      	str	r3, [r7, #12]
}
 8014538:	bf00      	nop
 801453a:	bf00      	nop
 801453c:	e7fd      	b.n	801453a <prvDeleteTCB+0x5e>
	}
 801453e:	bf00      	nop
 8014540:	3710      	adds	r7, #16
 8014542:	46bd      	mov	sp, r7
 8014544:	bd80      	pop	{r7, pc}
	...

08014548 <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 8014548:	b480      	push	{r7}
 801454a:	b083      	sub	sp, #12
 801454c:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 801454e:	4b0c      	ldr	r3, [pc, #48]	@ (8014580 <prvResetNextTaskUnblockTime+0x38>)
 8014550:	681b      	ldr	r3, [r3, #0]
 8014552:	681b      	ldr	r3, [r3, #0]
 8014554:	2b00      	cmp	r3, #0
 8014556:	d104      	bne.n	8014562 <prvResetNextTaskUnblockTime+0x1a>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 8014558:	4b0a      	ldr	r3, [pc, #40]	@ (8014584 <prvResetNextTaskUnblockTime+0x3c>)
 801455a:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801455e:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 8014560:	e008      	b.n	8014574 <prvResetNextTaskUnblockTime+0x2c>
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014562:	4b07      	ldr	r3, [pc, #28]	@ (8014580 <prvResetNextTaskUnblockTime+0x38>)
 8014564:	681b      	ldr	r3, [r3, #0]
 8014566:	68db      	ldr	r3, [r3, #12]
 8014568:	68db      	ldr	r3, [r3, #12]
 801456a:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 801456c:	687b      	ldr	r3, [r7, #4]
 801456e:	685b      	ldr	r3, [r3, #4]
 8014570:	4a04      	ldr	r2, [pc, #16]	@ (8014584 <prvResetNextTaskUnblockTime+0x3c>)
 8014572:	6013      	str	r3, [r2, #0]
}
 8014574:	bf00      	nop
 8014576:	370c      	adds	r7, #12
 8014578:	46bd      	mov	sp, r7
 801457a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801457e:	4770      	bx	lr
 8014580:	240041fc 	.word	0x240041fc
 8014584:	24004264 	.word	0x24004264

08014588 <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )

	TaskHandle_t xTaskGetCurrentTaskHandle( void )
	{
 8014588:	b480      	push	{r7}
 801458a:	b083      	sub	sp, #12
 801458c:	af00      	add	r7, sp, #0
	TaskHandle_t xReturn;

		/* A critical section is not required as this is not called from
		an interrupt and the current TCB will always be the same for any
		individual execution thread. */
		xReturn = pxCurrentTCB;
 801458e:	4b05      	ldr	r3, [pc, #20]	@ (80145a4 <xTaskGetCurrentTaskHandle+0x1c>)
 8014590:	681b      	ldr	r3, [r3, #0]
 8014592:	607b      	str	r3, [r7, #4]

		return xReturn;
 8014594:	687b      	ldr	r3, [r7, #4]
	}
 8014596:	4618      	mov	r0, r3
 8014598:	370c      	adds	r7, #12
 801459a:	46bd      	mov	sp, r7
 801459c:	f85d 7b04 	ldr.w	r7, [sp], #4
 80145a0:	4770      	bx	lr
 80145a2:	bf00      	nop
 80145a4:	24003d70 	.word	0x24003d70

080145a8 <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 80145a8:	b480      	push	{r7}
 80145aa:	b083      	sub	sp, #12
 80145ac:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 80145ae:	4b0b      	ldr	r3, [pc, #44]	@ (80145dc <xTaskGetSchedulerState+0x34>)
 80145b0:	681b      	ldr	r3, [r3, #0]
 80145b2:	2b00      	cmp	r3, #0
 80145b4:	d102      	bne.n	80145bc <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 80145b6:	2301      	movs	r3, #1
 80145b8:	607b      	str	r3, [r7, #4]
 80145ba:	e008      	b.n	80145ce <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80145bc:	4b08      	ldr	r3, [pc, #32]	@ (80145e0 <xTaskGetSchedulerState+0x38>)
 80145be:	681b      	ldr	r3, [r3, #0]
 80145c0:	2b00      	cmp	r3, #0
 80145c2:	d102      	bne.n	80145ca <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 80145c4:	2302      	movs	r3, #2
 80145c6:	607b      	str	r3, [r7, #4]
 80145c8:	e001      	b.n	80145ce <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 80145ca:	2300      	movs	r3, #0
 80145cc:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 80145ce:	687b      	ldr	r3, [r7, #4]
	}
 80145d0:	4618      	mov	r0, r3
 80145d2:	370c      	adds	r7, #12
 80145d4:	46bd      	mov	sp, r7
 80145d6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80145da:	4770      	bx	lr
 80145dc:	24004250 	.word	0x24004250
 80145e0:	2400426c 	.word	0x2400426c

080145e4 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
	{
 80145e4:	b580      	push	{r7, lr}
 80145e6:	b084      	sub	sp, #16
 80145e8:	af00      	add	r7, sp, #0
 80145ea:	6078      	str	r0, [r7, #4]
	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 80145ec:	687b      	ldr	r3, [r7, #4]
 80145ee:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 80145f0:	2300      	movs	r3, #0
 80145f2:	60fb      	str	r3, [r7, #12]

		/* If the mutex was given back by an interrupt while the queue was
		locked then the mutex holder might now be NULL.  _RB_ Is this still
		needed as interrupts can no longer use mutexes? */
		if( pxMutexHolder != NULL )
 80145f4:	687b      	ldr	r3, [r7, #4]
 80145f6:	2b00      	cmp	r3, #0
 80145f8:	d051      	beq.n	801469e <xTaskPriorityInherit+0xba>
		{
			/* If the holder of the mutex has a priority below the priority of
			the task attempting to obtain the mutex then it will temporarily
			inherit the priority of the task attempting to obtain the mutex. */
			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 80145fa:	68bb      	ldr	r3, [r7, #8]
 80145fc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80145fe:	4b2a      	ldr	r3, [pc, #168]	@ (80146a8 <xTaskPriorityInherit+0xc4>)
 8014600:	681b      	ldr	r3, [r3, #0]
 8014602:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014604:	429a      	cmp	r2, r3
 8014606:	d241      	bcs.n	801468c <xTaskPriorityInherit+0xa8>
			{
				/* Adjust the mutex holder state to account for its new
				priority.  Only reset the event list item value if the value is
				not being used for anything else. */
				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 8014608:	68bb      	ldr	r3, [r7, #8]
 801460a:	699b      	ldr	r3, [r3, #24]
 801460c:	2b00      	cmp	r3, #0
 801460e:	db06      	blt.n	801461e <xTaskPriorityInherit+0x3a>
				{
					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014610:	4b25      	ldr	r3, [pc, #148]	@ (80146a8 <xTaskPriorityInherit+0xc4>)
 8014612:	681b      	ldr	r3, [r3, #0]
 8014614:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014616:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 801461a:	68bb      	ldr	r3, [r7, #8]
 801461c:	619a      	str	r2, [r3, #24]
					mtCOVERAGE_TEST_MARKER();
				}

				/* If the task being modified is in the ready state it will need
				to be moved into a new list. */
				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 801461e:	68bb      	ldr	r3, [r7, #8]
 8014620:	6959      	ldr	r1, [r3, #20]
 8014622:	68bb      	ldr	r3, [r7, #8]
 8014624:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014626:	4613      	mov	r3, r2
 8014628:	009b      	lsls	r3, r3, #2
 801462a:	4413      	add	r3, r2
 801462c:	009b      	lsls	r3, r3, #2
 801462e:	4a1f      	ldr	r2, [pc, #124]	@ (80146ac <xTaskPriorityInherit+0xc8>)
 8014630:	4413      	add	r3, r2
 8014632:	4299      	cmp	r1, r3
 8014634:	d122      	bne.n	801467c <xTaskPriorityInherit+0x98>
				{
					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014636:	68bb      	ldr	r3, [r7, #8]
 8014638:	3304      	adds	r3, #4
 801463a:	4618      	mov	r0, r3
 801463c:	f7fd fc20 	bl	8011e80 <uxListRemove>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* Inherit the priority before being moved into the new list. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8014640:	4b19      	ldr	r3, [pc, #100]	@ (80146a8 <xTaskPriorityInherit+0xc4>)
 8014642:	681b      	ldr	r3, [r3, #0]
 8014644:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014646:	68bb      	ldr	r3, [r7, #8]
 8014648:	62da      	str	r2, [r3, #44]	@ 0x2c
					prvAddTaskToReadyList( pxMutexHolderTCB );
 801464a:	68bb      	ldr	r3, [r7, #8]
 801464c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801464e:	4b18      	ldr	r3, [pc, #96]	@ (80146b0 <xTaskPriorityInherit+0xcc>)
 8014650:	681b      	ldr	r3, [r3, #0]
 8014652:	429a      	cmp	r2, r3
 8014654:	d903      	bls.n	801465e <xTaskPriorityInherit+0x7a>
 8014656:	68bb      	ldr	r3, [r7, #8]
 8014658:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801465a:	4a15      	ldr	r2, [pc, #84]	@ (80146b0 <xTaskPriorityInherit+0xcc>)
 801465c:	6013      	str	r3, [r2, #0]
 801465e:	68bb      	ldr	r3, [r7, #8]
 8014660:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014662:	4613      	mov	r3, r2
 8014664:	009b      	lsls	r3, r3, #2
 8014666:	4413      	add	r3, r2
 8014668:	009b      	lsls	r3, r3, #2
 801466a:	4a10      	ldr	r2, [pc, #64]	@ (80146ac <xTaskPriorityInherit+0xc8>)
 801466c:	441a      	add	r2, r3
 801466e:	68bb      	ldr	r3, [r7, #8]
 8014670:	3304      	adds	r3, #4
 8014672:	4619      	mov	r1, r3
 8014674:	4610      	mov	r0, r2
 8014676:	f7fd fba6 	bl	8011dc6 <vListInsertEnd>
 801467a:	e004      	b.n	8014686 <xTaskPriorityInherit+0xa2>
				}
				else
				{
					/* Just inherit the priority. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 801467c:	4b0a      	ldr	r3, [pc, #40]	@ (80146a8 <xTaskPriorityInherit+0xc4>)
 801467e:	681b      	ldr	r3, [r3, #0]
 8014680:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014682:	68bb      	ldr	r3, [r7, #8]
 8014684:	62da      	str	r2, [r3, #44]	@ 0x2c
				}

				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );

				/* Inheritance occurred. */
				xReturn = pdTRUE;
 8014686:	2301      	movs	r3, #1
 8014688:	60fb      	str	r3, [r7, #12]
 801468a:	e008      	b.n	801469e <xTaskPriorityInherit+0xba>
			}
			else
			{
				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 801468c:	68bb      	ldr	r3, [r7, #8]
 801468e:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8014690:	4b05      	ldr	r3, [pc, #20]	@ (80146a8 <xTaskPriorityInherit+0xc4>)
 8014692:	681b      	ldr	r3, [r3, #0]
 8014694:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014696:	429a      	cmp	r2, r3
 8014698:	d201      	bcs.n	801469e <xTaskPriorityInherit+0xba>
					current priority of the mutex holder is not lower than the
					priority of the task attempting to take the mutex.
					Therefore the mutex holder must have already inherited a
					priority, but inheritance would have occurred if that had
					not been the case. */
					xReturn = pdTRUE;
 801469a:	2301      	movs	r3, #1
 801469c:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 801469e:	68fb      	ldr	r3, [r7, #12]
	}
 80146a0:	4618      	mov	r0, r3
 80146a2:	3710      	adds	r7, #16
 80146a4:	46bd      	mov	sp, r7
 80146a6:	bd80      	pop	{r7, pc}
 80146a8:	24003d70 	.word	0x24003d70
 80146ac:	24003d74 	.word	0x24003d74
 80146b0:	2400424c 	.word	0x2400424c

080146b4 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 80146b4:	b580      	push	{r7, lr}
 80146b6:	b086      	sub	sp, #24
 80146b8:	af00      	add	r7, sp, #0
 80146ba:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = pxMutexHolder;
 80146bc:	687b      	ldr	r3, [r7, #4]
 80146be:	613b      	str	r3, [r7, #16]
	BaseType_t xReturn = pdFALSE;
 80146c0:	2300      	movs	r3, #0
 80146c2:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 80146c4:	687b      	ldr	r3, [r7, #4]
 80146c6:	2b00      	cmp	r3, #0
 80146c8:	d058      	beq.n	801477c <xTaskPriorityDisinherit+0xc8>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 80146ca:	4b2f      	ldr	r3, [pc, #188]	@ (8014788 <xTaskPriorityDisinherit+0xd4>)
 80146cc:	681b      	ldr	r3, [r3, #0]
 80146ce:	693a      	ldr	r2, [r7, #16]
 80146d0:	429a      	cmp	r2, r3
 80146d2:	d00b      	beq.n	80146ec <xTaskPriorityDisinherit+0x38>
	__asm volatile
 80146d4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146d8:	f383 8811 	msr	BASEPRI, r3
 80146dc:	f3bf 8f6f 	isb	sy
 80146e0:	f3bf 8f4f 	dsb	sy
 80146e4:	60fb      	str	r3, [r7, #12]
}
 80146e6:	bf00      	nop
 80146e8:	bf00      	nop
 80146ea:	e7fd      	b.n	80146e8 <xTaskPriorityDisinherit+0x34>
			configASSERT( pxTCB->uxMutexesHeld );
 80146ec:	693b      	ldr	r3, [r7, #16]
 80146ee:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80146f0:	2b00      	cmp	r3, #0
 80146f2:	d10b      	bne.n	801470c <xTaskPriorityDisinherit+0x58>
	__asm volatile
 80146f4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80146f8:	f383 8811 	msr	BASEPRI, r3
 80146fc:	f3bf 8f6f 	isb	sy
 8014700:	f3bf 8f4f 	dsb	sy
 8014704:	60bb      	str	r3, [r7, #8]
}
 8014706:	bf00      	nop
 8014708:	bf00      	nop
 801470a:	e7fd      	b.n	8014708 <xTaskPriorityDisinherit+0x54>
			( pxTCB->uxMutexesHeld )--;
 801470c:	693b      	ldr	r3, [r7, #16]
 801470e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014710:	1e5a      	subs	r2, r3, #1
 8014712:	693b      	ldr	r3, [r7, #16]
 8014714:	651a      	str	r2, [r3, #80]	@ 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 8014716:	693b      	ldr	r3, [r7, #16]
 8014718:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801471a:	693b      	ldr	r3, [r7, #16]
 801471c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 801471e:	429a      	cmp	r2, r3
 8014720:	d02c      	beq.n	801477c <xTaskPriorityDisinherit+0xc8>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 8014722:	693b      	ldr	r3, [r7, #16]
 8014724:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014726:	2b00      	cmp	r3, #0
 8014728:	d128      	bne.n	801477c <xTaskPriorityDisinherit+0xc8>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready/delayed list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 801472a:	693b      	ldr	r3, [r7, #16]
 801472c:	3304      	adds	r3, #4
 801472e:	4618      	mov	r0, r3
 8014730:	f7fd fba6 	bl	8011e80 <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 8014734:	693b      	ldr	r3, [r7, #16]
 8014736:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8014738:	693b      	ldr	r3, [r7, #16]
 801473a:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 801473c:	693b      	ldr	r3, [r7, #16]
 801473e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014740:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8014744:	693b      	ldr	r3, [r7, #16]
 8014746:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 8014748:	693b      	ldr	r3, [r7, #16]
 801474a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801474c:	4b0f      	ldr	r3, [pc, #60]	@ (801478c <xTaskPriorityDisinherit+0xd8>)
 801474e:	681b      	ldr	r3, [r3, #0]
 8014750:	429a      	cmp	r2, r3
 8014752:	d903      	bls.n	801475c <xTaskPriorityDisinherit+0xa8>
 8014754:	693b      	ldr	r3, [r7, #16]
 8014756:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014758:	4a0c      	ldr	r2, [pc, #48]	@ (801478c <xTaskPriorityDisinherit+0xd8>)
 801475a:	6013      	str	r3, [r2, #0]
 801475c:	693b      	ldr	r3, [r7, #16]
 801475e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014760:	4613      	mov	r3, r2
 8014762:	009b      	lsls	r3, r3, #2
 8014764:	4413      	add	r3, r2
 8014766:	009b      	lsls	r3, r3, #2
 8014768:	4a09      	ldr	r2, [pc, #36]	@ (8014790 <xTaskPriorityDisinherit+0xdc>)
 801476a:	441a      	add	r2, r3
 801476c:	693b      	ldr	r3, [r7, #16]
 801476e:	3304      	adds	r3, #4
 8014770:	4619      	mov	r1, r3
 8014772:	4610      	mov	r0, r2
 8014774:	f7fd fb27 	bl	8011dc6 <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 8014778:	2301      	movs	r3, #1
 801477a:	617b      	str	r3, [r7, #20]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 801477c:	697b      	ldr	r3, [r7, #20]
	}
 801477e:	4618      	mov	r0, r3
 8014780:	3718      	adds	r7, #24
 8014782:	46bd      	mov	sp, r7
 8014784:	bd80      	pop	{r7, pc}
 8014786:	bf00      	nop
 8014788:	24003d70 	.word	0x24003d70
 801478c:	2400424c 	.word	0x2400424c
 8014790:	24003d74 	.word	0x24003d74

08014794 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
	{
 8014794:	b580      	push	{r7, lr}
 8014796:	b088      	sub	sp, #32
 8014798:	af00      	add	r7, sp, #0
 801479a:	6078      	str	r0, [r7, #4]
 801479c:	6039      	str	r1, [r7, #0]
	TCB_t * const pxTCB = pxMutexHolder;
 801479e:	687b      	ldr	r3, [r7, #4]
 80147a0:	61bb      	str	r3, [r7, #24]
	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 80147a2:	2301      	movs	r3, #1
 80147a4:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 80147a6:	687b      	ldr	r3, [r7, #4]
 80147a8:	2b00      	cmp	r3, #0
 80147aa:	d06c      	beq.n	8014886 <vTaskPriorityDisinheritAfterTimeout+0xf2>
		{
			/* If pxMutexHolder is not NULL then the holder must hold at least
			one mutex. */
			configASSERT( pxTCB->uxMutexesHeld );
 80147ac:	69bb      	ldr	r3, [r7, #24]
 80147ae:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80147b0:	2b00      	cmp	r3, #0
 80147b2:	d10b      	bne.n	80147cc <vTaskPriorityDisinheritAfterTimeout+0x38>
	__asm volatile
 80147b4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80147b8:	f383 8811 	msr	BASEPRI, r3
 80147bc:	f3bf 8f6f 	isb	sy
 80147c0:	f3bf 8f4f 	dsb	sy
 80147c4:	60fb      	str	r3, [r7, #12]
}
 80147c6:	bf00      	nop
 80147c8:	bf00      	nop
 80147ca:	e7fd      	b.n	80147c8 <vTaskPriorityDisinheritAfterTimeout+0x34>

			/* Determine the priority to which the priority of the task that
			holds the mutex should be set.  This will be the greater of the
			holding task's base priority and the priority of the highest
			priority task that is waiting to obtain the mutex. */
			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 80147cc:	69bb      	ldr	r3, [r7, #24]
 80147ce:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80147d0:	683a      	ldr	r2, [r7, #0]
 80147d2:	429a      	cmp	r2, r3
 80147d4:	d902      	bls.n	80147dc <vTaskPriorityDisinheritAfterTimeout+0x48>
			{
				uxPriorityToUse = uxHighestPriorityWaitingTask;
 80147d6:	683b      	ldr	r3, [r7, #0]
 80147d8:	61fb      	str	r3, [r7, #28]
 80147da:	e002      	b.n	80147e2 <vTaskPriorityDisinheritAfterTimeout+0x4e>
			}
			else
			{
				uxPriorityToUse = pxTCB->uxBasePriority;
 80147dc:	69bb      	ldr	r3, [r7, #24]
 80147de:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80147e0:	61fb      	str	r3, [r7, #28]
			}

			/* Does the priority need to change? */
			if( pxTCB->uxPriority != uxPriorityToUse )
 80147e2:	69bb      	ldr	r3, [r7, #24]
 80147e4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80147e6:	69fa      	ldr	r2, [r7, #28]
 80147e8:	429a      	cmp	r2, r3
 80147ea:	d04c      	beq.n	8014886 <vTaskPriorityDisinheritAfterTimeout+0xf2>
			{
				/* Only disinherit if no other mutexes are held.  This is a
				simplification in the priority inheritance implementation.  If
				the task that holds the mutex is also holding other mutexes then
				the other mutexes may have caused the priority inheritance. */
				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 80147ec:	69bb      	ldr	r3, [r7, #24]
 80147ee:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80147f0:	697a      	ldr	r2, [r7, #20]
 80147f2:	429a      	cmp	r2, r3
 80147f4:	d147      	bne.n	8014886 <vTaskPriorityDisinheritAfterTimeout+0xf2>
				{
					/* If a task has timed out because it already holds the
					mutex it was trying to obtain then it cannot of inherited
					its own priority. */
					configASSERT( pxTCB != pxCurrentTCB );
 80147f6:	4b26      	ldr	r3, [pc, #152]	@ (8014890 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
 80147f8:	681b      	ldr	r3, [r3, #0]
 80147fa:	69ba      	ldr	r2, [r7, #24]
 80147fc:	429a      	cmp	r2, r3
 80147fe:	d10b      	bne.n	8014818 <vTaskPriorityDisinheritAfterTimeout+0x84>
	__asm volatile
 8014800:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014804:	f383 8811 	msr	BASEPRI, r3
 8014808:	f3bf 8f6f 	isb	sy
 801480c:	f3bf 8f4f 	dsb	sy
 8014810:	60bb      	str	r3, [r7, #8]
}
 8014812:	bf00      	nop
 8014814:	bf00      	nop
 8014816:	e7fd      	b.n	8014814 <vTaskPriorityDisinheritAfterTimeout+0x80>

					/* Disinherit the priority, remembering the previous
					priority to facilitate determining the subject task's
					state. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					uxPriorityUsedOnEntry = pxTCB->uxPriority;
 8014818:	69bb      	ldr	r3, [r7, #24]
 801481a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801481c:	613b      	str	r3, [r7, #16]
					pxTCB->uxPriority = uxPriorityToUse;
 801481e:	69bb      	ldr	r3, [r7, #24]
 8014820:	69fa      	ldr	r2, [r7, #28]
 8014822:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Only reset the event list item value if the value is not
					being used for anything else. */
					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 8014824:	69bb      	ldr	r3, [r7, #24]
 8014826:	699b      	ldr	r3, [r3, #24]
 8014828:	2b00      	cmp	r3, #0
 801482a:	db04      	blt.n	8014836 <vTaskPriorityDisinheritAfterTimeout+0xa2>
					{
						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 801482c:	69fb      	ldr	r3, [r7, #28]
 801482e:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8014832:	69bb      	ldr	r3, [r7, #24]
 8014834:	619a      	str	r2, [r3, #24]
					then the task that holds the mutex could be in either the
					Ready, Blocked or Suspended states.  Only remove the task
					from its current state list if it is in the Ready state as
					the task's priority is going to change and there is one
					Ready list per priority. */
					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 8014836:	69bb      	ldr	r3, [r7, #24]
 8014838:	6959      	ldr	r1, [r3, #20]
 801483a:	693a      	ldr	r2, [r7, #16]
 801483c:	4613      	mov	r3, r2
 801483e:	009b      	lsls	r3, r3, #2
 8014840:	4413      	add	r3, r2
 8014842:	009b      	lsls	r3, r3, #2
 8014844:	4a13      	ldr	r2, [pc, #76]	@ (8014894 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8014846:	4413      	add	r3, r2
 8014848:	4299      	cmp	r1, r3
 801484a:	d11c      	bne.n	8014886 <vTaskPriorityDisinheritAfterTimeout+0xf2>
					{
						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 801484c:	69bb      	ldr	r3, [r7, #24]
 801484e:	3304      	adds	r3, #4
 8014850:	4618      	mov	r0, r3
 8014852:	f7fd fb15 	bl	8011e80 <uxListRemove>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}

						prvAddTaskToReadyList( pxTCB );
 8014856:	69bb      	ldr	r3, [r7, #24]
 8014858:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801485a:	4b0f      	ldr	r3, [pc, #60]	@ (8014898 <vTaskPriorityDisinheritAfterTimeout+0x104>)
 801485c:	681b      	ldr	r3, [r3, #0]
 801485e:	429a      	cmp	r2, r3
 8014860:	d903      	bls.n	801486a <vTaskPriorityDisinheritAfterTimeout+0xd6>
 8014862:	69bb      	ldr	r3, [r7, #24]
 8014864:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014866:	4a0c      	ldr	r2, [pc, #48]	@ (8014898 <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8014868:	6013      	str	r3, [r2, #0]
 801486a:	69bb      	ldr	r3, [r7, #24]
 801486c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801486e:	4613      	mov	r3, r2
 8014870:	009b      	lsls	r3, r3, #2
 8014872:	4413      	add	r3, r2
 8014874:	009b      	lsls	r3, r3, #2
 8014876:	4a07      	ldr	r2, [pc, #28]	@ (8014894 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8014878:	441a      	add	r2, r3
 801487a:	69bb      	ldr	r3, [r7, #24]
 801487c:	3304      	adds	r3, #4
 801487e:	4619      	mov	r1, r3
 8014880:	4610      	mov	r0, r2
 8014882:	f7fd faa0 	bl	8011dc6 <vListInsertEnd>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8014886:	bf00      	nop
 8014888:	3720      	adds	r7, #32
 801488a:	46bd      	mov	sp, r7
 801488c:	bd80      	pop	{r7, pc}
 801488e:	bf00      	nop
 8014890:	24003d70 	.word	0x24003d70
 8014894:	24003d74 	.word	0x24003d74
 8014898:	2400424c 	.word	0x2400424c

0801489c <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
	{
 801489c:	b480      	push	{r7}
 801489e:	af00      	add	r7, sp, #0
		/* If xSemaphoreCreateMutex() is called before any tasks have been created
		then pxCurrentTCB will be NULL. */
		if( pxCurrentTCB != NULL )
 80148a0:	4b07      	ldr	r3, [pc, #28]	@ (80148c0 <pvTaskIncrementMutexHeldCount+0x24>)
 80148a2:	681b      	ldr	r3, [r3, #0]
 80148a4:	2b00      	cmp	r3, #0
 80148a6:	d004      	beq.n	80148b2 <pvTaskIncrementMutexHeldCount+0x16>
		{
			( pxCurrentTCB->uxMutexesHeld )++;
 80148a8:	4b05      	ldr	r3, [pc, #20]	@ (80148c0 <pvTaskIncrementMutexHeldCount+0x24>)
 80148aa:	681b      	ldr	r3, [r3, #0]
 80148ac:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 80148ae:	3201      	adds	r2, #1
 80148b0:	651a      	str	r2, [r3, #80]	@ 0x50
		}

		return pxCurrentTCB;
 80148b2:	4b03      	ldr	r3, [pc, #12]	@ (80148c0 <pvTaskIncrementMutexHeldCount+0x24>)
 80148b4:	681b      	ldr	r3, [r3, #0]
	}
 80148b6:	4618      	mov	r0, r3
 80148b8:	46bd      	mov	sp, r7
 80148ba:	f85d 7b04 	ldr.w	r7, [sp], #4
 80148be:	4770      	bx	lr
 80148c0:	24003d70 	.word	0x24003d70

080148c4 <xTaskNotifyWait>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
	{
 80148c4:	b580      	push	{r7, lr}
 80148c6:	b086      	sub	sp, #24
 80148c8:	af00      	add	r7, sp, #0
 80148ca:	60f8      	str	r0, [r7, #12]
 80148cc:	60b9      	str	r1, [r7, #8]
 80148ce:	607a      	str	r2, [r7, #4]
 80148d0:	603b      	str	r3, [r7, #0]
	BaseType_t xReturn;

		taskENTER_CRITICAL();
 80148d2:	f000 fff1 	bl	80158b8 <vPortEnterCritical>
		{
			/* Only block if a notification is not already pending. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 80148d6:	4b29      	ldr	r3, [pc, #164]	@ (801497c <xTaskNotifyWait+0xb8>)
 80148d8:	681b      	ldr	r3, [r3, #0]
 80148da:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 80148de:	b2db      	uxtb	r3, r3
 80148e0:	2b02      	cmp	r3, #2
 80148e2:	d01c      	beq.n	801491e <xTaskNotifyWait+0x5a>
			{
				/* Clear bits in the task's notification value as bits may get
				set	by the notifying task or interrupt.  This can be used to
				clear the value to zero. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
 80148e4:	4b25      	ldr	r3, [pc, #148]	@ (801497c <xTaskNotifyWait+0xb8>)
 80148e6:	681b      	ldr	r3, [r3, #0]
 80148e8:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 80148ec:	68fa      	ldr	r2, [r7, #12]
 80148ee:	43d2      	mvns	r2, r2
 80148f0:	400a      	ands	r2, r1
 80148f2:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0

				/* Mark this task as waiting for a notification. */
				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
 80148f6:	4b21      	ldr	r3, [pc, #132]	@ (801497c <xTaskNotifyWait+0xb8>)
 80148f8:	681b      	ldr	r3, [r3, #0]
 80148fa:	2201      	movs	r2, #1
 80148fc:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

				if( xTicksToWait > ( TickType_t ) 0 )
 8014900:	683b      	ldr	r3, [r7, #0]
 8014902:	2b00      	cmp	r3, #0
 8014904:	d00b      	beq.n	801491e <xTaskNotifyWait+0x5a>
				{
					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8014906:	2101      	movs	r1, #1
 8014908:	6838      	ldr	r0, [r7, #0]
 801490a:	f000 fa09 	bl	8014d20 <prvAddCurrentTaskToDelayedList>

					/* All ports are written to allow a yield in a critical
					section (some will yield immediately, others wait until the
					critical section exits) - but it is not something that
					application code should ever do. */
					portYIELD_WITHIN_API();
 801490e:	4b1c      	ldr	r3, [pc, #112]	@ (8014980 <xTaskNotifyWait+0xbc>)
 8014910:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014914:	601a      	str	r2, [r3, #0]
 8014916:	f3bf 8f4f 	dsb	sy
 801491a:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 801491e:	f000 fffd 	bl	801591c <vPortExitCritical>

		taskENTER_CRITICAL();
 8014922:	f000 ffc9 	bl	80158b8 <vPortEnterCritical>
		{
			traceTASK_NOTIFY_WAIT();

			if( pulNotificationValue != NULL )
 8014926:	687b      	ldr	r3, [r7, #4]
 8014928:	2b00      	cmp	r3, #0
 801492a:	d005      	beq.n	8014938 <xTaskNotifyWait+0x74>
			{
				/* Output the current notification value, which may or may not
				have changed. */
				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
 801492c:	4b13      	ldr	r3, [pc, #76]	@ (801497c <xTaskNotifyWait+0xb8>)
 801492e:	681b      	ldr	r3, [r3, #0]
 8014930:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014934:	687b      	ldr	r3, [r7, #4]
 8014936:	601a      	str	r2, [r3, #0]

			/* If ucNotifyValue is set then either the task never entered the
			blocked state (because a notification was already pending) or the
			task unblocked because of a notification.  Otherwise the task
			unblocked because of a timeout. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 8014938:	4b10      	ldr	r3, [pc, #64]	@ (801497c <xTaskNotifyWait+0xb8>)
 801493a:	681b      	ldr	r3, [r3, #0]
 801493c:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014940:	b2db      	uxtb	r3, r3
 8014942:	2b02      	cmp	r3, #2
 8014944:	d002      	beq.n	801494c <xTaskNotifyWait+0x88>
			{
				/* A notification was not received. */
				xReturn = pdFALSE;
 8014946:	2300      	movs	r3, #0
 8014948:	617b      	str	r3, [r7, #20]
 801494a:	e00a      	b.n	8014962 <xTaskNotifyWait+0x9e>
			}
			else
			{
				/* A notification was already pending or a notification was
				received while the task was waiting. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
 801494c:	4b0b      	ldr	r3, [pc, #44]	@ (801497c <xTaskNotifyWait+0xb8>)
 801494e:	681b      	ldr	r3, [r3, #0]
 8014950:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8014954:	68ba      	ldr	r2, [r7, #8]
 8014956:	43d2      	mvns	r2, r2
 8014958:	400a      	ands	r2, r1
 801495a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
				xReturn = pdTRUE;
 801495e:	2301      	movs	r3, #1
 8014960:	617b      	str	r3, [r7, #20]
			}

			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8014962:	4b06      	ldr	r3, [pc, #24]	@ (801497c <xTaskNotifyWait+0xb8>)
 8014964:	681b      	ldr	r3, [r3, #0]
 8014966:	2200      	movs	r2, #0
 8014968:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
		}
		taskEXIT_CRITICAL();
 801496c:	f000 ffd6 	bl	801591c <vPortExitCritical>

		return xReturn;
 8014970:	697b      	ldr	r3, [r7, #20]
	}
 8014972:	4618      	mov	r0, r3
 8014974:	3718      	adds	r7, #24
 8014976:	46bd      	mov	sp, r7
 8014978:	bd80      	pop	{r7, pc}
 801497a:	bf00      	nop
 801497c:	24003d70 	.word	0x24003d70
 8014980:	e000ed04 	.word	0xe000ed04

08014984 <xTaskGenericNotify>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
	{
 8014984:	b580      	push	{r7, lr}
 8014986:	b08a      	sub	sp, #40	@ 0x28
 8014988:	af00      	add	r7, sp, #0
 801498a:	60f8      	str	r0, [r7, #12]
 801498c:	60b9      	str	r1, [r7, #8]
 801498e:	603b      	str	r3, [r7, #0]
 8014990:	4613      	mov	r3, r2
 8014992:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	BaseType_t xReturn = pdPASS;
 8014994:	2301      	movs	r3, #1
 8014996:	627b      	str	r3, [r7, #36]	@ 0x24
	uint8_t ucOriginalNotifyState;

		configASSERT( xTaskToNotify );
 8014998:	68fb      	ldr	r3, [r7, #12]
 801499a:	2b00      	cmp	r3, #0
 801499c:	d10b      	bne.n	80149b6 <xTaskGenericNotify+0x32>
	__asm volatile
 801499e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80149a2:	f383 8811 	msr	BASEPRI, r3
 80149a6:	f3bf 8f6f 	isb	sy
 80149aa:	f3bf 8f4f 	dsb	sy
 80149ae:	61bb      	str	r3, [r7, #24]
}
 80149b0:	bf00      	nop
 80149b2:	bf00      	nop
 80149b4:	e7fd      	b.n	80149b2 <xTaskGenericNotify+0x2e>
		pxTCB = xTaskToNotify;
 80149b6:	68fb      	ldr	r3, [r7, #12]
 80149b8:	623b      	str	r3, [r7, #32]

		taskENTER_CRITICAL();
 80149ba:	f000 ff7d 	bl	80158b8 <vPortEnterCritical>
		{
			if( pulPreviousNotificationValue != NULL )
 80149be:	683b      	ldr	r3, [r7, #0]
 80149c0:	2b00      	cmp	r3, #0
 80149c2:	d004      	beq.n	80149ce <xTaskGenericNotify+0x4a>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 80149c4:	6a3b      	ldr	r3, [r7, #32]
 80149c6:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 80149ca:	683b      	ldr	r3, [r7, #0]
 80149cc:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 80149ce:	6a3b      	ldr	r3, [r7, #32]
 80149d0:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 80149d4:	77fb      	strb	r3, [r7, #31]

			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 80149d6:	6a3b      	ldr	r3, [r7, #32]
 80149d8:	2202      	movs	r2, #2
 80149da:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 80149de:	79fb      	ldrb	r3, [r7, #7]
 80149e0:	2b04      	cmp	r3, #4
 80149e2:	d82e      	bhi.n	8014a42 <xTaskGenericNotify+0xbe>
 80149e4:	a201      	add	r2, pc, #4	@ (adr r2, 80149ec <xTaskGenericNotify+0x68>)
 80149e6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80149ea:	bf00      	nop
 80149ec:	08014a67 	.word	0x08014a67
 80149f0:	08014a01 	.word	0x08014a01
 80149f4:	08014a13 	.word	0x08014a13
 80149f8:	08014a23 	.word	0x08014a23
 80149fc:	08014a2d 	.word	0x08014a2d
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8014a00:	6a3b      	ldr	r3, [r7, #32]
 8014a02:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014a06:	68bb      	ldr	r3, [r7, #8]
 8014a08:	431a      	orrs	r2, r3
 8014a0a:	6a3b      	ldr	r3, [r7, #32]
 8014a0c:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014a10:	e02c      	b.n	8014a6c <xTaskGenericNotify+0xe8>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8014a12:	6a3b      	ldr	r3, [r7, #32]
 8014a14:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014a18:	1c5a      	adds	r2, r3, #1
 8014a1a:	6a3b      	ldr	r3, [r7, #32]
 8014a1c:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014a20:	e024      	b.n	8014a6c <xTaskGenericNotify+0xe8>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8014a22:	6a3b      	ldr	r3, [r7, #32]
 8014a24:	68ba      	ldr	r2, [r7, #8]
 8014a26:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014a2a:	e01f      	b.n	8014a6c <xTaskGenericNotify+0xe8>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014a2c:	7ffb      	ldrb	r3, [r7, #31]
 8014a2e:	2b02      	cmp	r3, #2
 8014a30:	d004      	beq.n	8014a3c <xTaskGenericNotify+0xb8>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8014a32:	6a3b      	ldr	r3, [r7, #32]
 8014a34:	68ba      	ldr	r2, [r7, #8]
 8014a36:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014a3a:	e017      	b.n	8014a6c <xTaskGenericNotify+0xe8>
						xReturn = pdFAIL;
 8014a3c:	2300      	movs	r3, #0
 8014a3e:	627b      	str	r3, [r7, #36]	@ 0x24
					break;
 8014a40:	e014      	b.n	8014a6c <xTaskGenericNotify+0xe8>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8014a42:	6a3b      	ldr	r3, [r7, #32]
 8014a44:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014a48:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014a4c:	d00d      	beq.n	8014a6a <xTaskGenericNotify+0xe6>
	__asm volatile
 8014a4e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014a52:	f383 8811 	msr	BASEPRI, r3
 8014a56:	f3bf 8f6f 	isb	sy
 8014a5a:	f3bf 8f4f 	dsb	sy
 8014a5e:	617b      	str	r3, [r7, #20]
}
 8014a60:	bf00      	nop
 8014a62:	bf00      	nop
 8014a64:	e7fd      	b.n	8014a62 <xTaskGenericNotify+0xde>
					break;
 8014a66:	bf00      	nop
 8014a68:	e000      	b.n	8014a6c <xTaskGenericNotify+0xe8>

					break;
 8014a6a:	bf00      	nop

			traceTASK_NOTIFY();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014a6c:	7ffb      	ldrb	r3, [r7, #31]
 8014a6e:	2b01      	cmp	r3, #1
 8014a70:	d13b      	bne.n	8014aea <xTaskGenericNotify+0x166>
			{
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014a72:	6a3b      	ldr	r3, [r7, #32]
 8014a74:	3304      	adds	r3, #4
 8014a76:	4618      	mov	r0, r3
 8014a78:	f7fd fa02 	bl	8011e80 <uxListRemove>
				prvAddTaskToReadyList( pxTCB );
 8014a7c:	6a3b      	ldr	r3, [r7, #32]
 8014a7e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014a80:	4b1d      	ldr	r3, [pc, #116]	@ (8014af8 <xTaskGenericNotify+0x174>)
 8014a82:	681b      	ldr	r3, [r3, #0]
 8014a84:	429a      	cmp	r2, r3
 8014a86:	d903      	bls.n	8014a90 <xTaskGenericNotify+0x10c>
 8014a88:	6a3b      	ldr	r3, [r7, #32]
 8014a8a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014a8c:	4a1a      	ldr	r2, [pc, #104]	@ (8014af8 <xTaskGenericNotify+0x174>)
 8014a8e:	6013      	str	r3, [r2, #0]
 8014a90:	6a3b      	ldr	r3, [r7, #32]
 8014a92:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014a94:	4613      	mov	r3, r2
 8014a96:	009b      	lsls	r3, r3, #2
 8014a98:	4413      	add	r3, r2
 8014a9a:	009b      	lsls	r3, r3, #2
 8014a9c:	4a17      	ldr	r2, [pc, #92]	@ (8014afc <xTaskGenericNotify+0x178>)
 8014a9e:	441a      	add	r2, r3
 8014aa0:	6a3b      	ldr	r3, [r7, #32]
 8014aa2:	3304      	adds	r3, #4
 8014aa4:	4619      	mov	r1, r3
 8014aa6:	4610      	mov	r0, r2
 8014aa8:	f7fd f98d 	bl	8011dc6 <vListInsertEnd>

				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8014aac:	6a3b      	ldr	r3, [r7, #32]
 8014aae:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014ab0:	2b00      	cmp	r3, #0
 8014ab2:	d00b      	beq.n	8014acc <xTaskGenericNotify+0x148>
	__asm volatile
 8014ab4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014ab8:	f383 8811 	msr	BASEPRI, r3
 8014abc:	f3bf 8f6f 	isb	sy
 8014ac0:	f3bf 8f4f 	dsb	sy
 8014ac4:	613b      	str	r3, [r7, #16]
}
 8014ac6:	bf00      	nop
 8014ac8:	bf00      	nop
 8014aca:	e7fd      	b.n	8014ac8 <xTaskGenericNotify+0x144>
					earliest possible time. */
					prvResetNextTaskUnblockTime();
				}
				#endif

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014acc:	6a3b      	ldr	r3, [r7, #32]
 8014ace:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014ad0:	4b0b      	ldr	r3, [pc, #44]	@ (8014b00 <xTaskGenericNotify+0x17c>)
 8014ad2:	681b      	ldr	r3, [r3, #0]
 8014ad4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014ad6:	429a      	cmp	r2, r3
 8014ad8:	d907      	bls.n	8014aea <xTaskGenericNotify+0x166>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					taskYIELD_IF_USING_PREEMPTION();
 8014ada:	4b0a      	ldr	r3, [pc, #40]	@ (8014b04 <xTaskGenericNotify+0x180>)
 8014adc:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014ae0:	601a      	str	r2, [r3, #0]
 8014ae2:	f3bf 8f4f 	dsb	sy
 8014ae6:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8014aea:	f000 ff17 	bl	801591c <vPortExitCritical>

		return xReturn;
 8014aee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
	}
 8014af0:	4618      	mov	r0, r3
 8014af2:	3728      	adds	r7, #40	@ 0x28
 8014af4:	46bd      	mov	sp, r7
 8014af6:	bd80      	pop	{r7, pc}
 8014af8:	2400424c 	.word	0x2400424c
 8014afc:	24003d74 	.word	0x24003d74
 8014b00:	24003d70 	.word	0x24003d70
 8014b04:	e000ed04 	.word	0xe000ed04

08014b08 <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
	{
 8014b08:	b580      	push	{r7, lr}
 8014b0a:	b08e      	sub	sp, #56	@ 0x38
 8014b0c:	af00      	add	r7, sp, #0
 8014b0e:	60f8      	str	r0, [r7, #12]
 8014b10:	60b9      	str	r1, [r7, #8]
 8014b12:	603b      	str	r3, [r7, #0]
 8014b14:	4613      	mov	r3, r2
 8014b16:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	uint8_t ucOriginalNotifyState;
	BaseType_t xReturn = pdPASS;
 8014b18:	2301      	movs	r3, #1
 8014b1a:	637b      	str	r3, [r7, #52]	@ 0x34
	UBaseType_t uxSavedInterruptStatus;

		configASSERT( xTaskToNotify );
 8014b1c:	68fb      	ldr	r3, [r7, #12]
 8014b1e:	2b00      	cmp	r3, #0
 8014b20:	d10b      	bne.n	8014b3a <xTaskGenericNotifyFromISR+0x32>
	__asm volatile
 8014b22:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b26:	f383 8811 	msr	BASEPRI, r3
 8014b2a:	f3bf 8f6f 	isb	sy
 8014b2e:	f3bf 8f4f 	dsb	sy
 8014b32:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8014b34:	bf00      	nop
 8014b36:	bf00      	nop
 8014b38:	e7fd      	b.n	8014b36 <xTaskGenericNotifyFromISR+0x2e>
		below the maximum system call interrupt priority.  FreeRTOS maintains a
		separate interrupt safe API to ensure interrupt entry is as fast and as
		simple as possible.  More information (albeit Cortex-M specific) is
		provided on the following link:
		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8014b3a:	f000 ff9d 	bl	8015a78 <vPortValidateInterruptPriority>

		pxTCB = xTaskToNotify;
 8014b3e:	68fb      	ldr	r3, [r7, #12]
 8014b40:	633b      	str	r3, [r7, #48]	@ 0x30
	__asm volatile
 8014b42:	f3ef 8211 	mrs	r2, BASEPRI
 8014b46:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b4a:	f383 8811 	msr	BASEPRI, r3
 8014b4e:	f3bf 8f6f 	isb	sy
 8014b52:	f3bf 8f4f 	dsb	sy
 8014b56:	623a      	str	r2, [r7, #32]
 8014b58:	61fb      	str	r3, [r7, #28]
	return ulOriginalBASEPRI;
 8014b5a:	6a3b      	ldr	r3, [r7, #32]

		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8014b5c:	62fb      	str	r3, [r7, #44]	@ 0x2c
		{
			if( pulPreviousNotificationValue != NULL )
 8014b5e:	683b      	ldr	r3, [r7, #0]
 8014b60:	2b00      	cmp	r3, #0
 8014b62:	d004      	beq.n	8014b6e <xTaskGenericNotifyFromISR+0x66>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8014b64:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014b66:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014b6a:	683b      	ldr	r3, [r7, #0]
 8014b6c:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8014b6e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014b70:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014b74:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8014b78:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014b7a:	2202      	movs	r2, #2
 8014b7c:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8014b80:	79fb      	ldrb	r3, [r7, #7]
 8014b82:	2b04      	cmp	r3, #4
 8014b84:	d82e      	bhi.n	8014be4 <xTaskGenericNotifyFromISR+0xdc>
 8014b86:	a201      	add	r2, pc, #4	@ (adr r2, 8014b8c <xTaskGenericNotifyFromISR+0x84>)
 8014b88:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014b8c:	08014c09 	.word	0x08014c09
 8014b90:	08014ba1 	.word	0x08014ba1
 8014b94:	08014bb3 	.word	0x08014bb3
 8014b98:	08014bc3 	.word	0x08014bc3
 8014b9c:	08014bcd 	.word	0x08014bcd
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8014ba0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014ba2:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014ba6:	68bb      	ldr	r3, [r7, #8]
 8014ba8:	431a      	orrs	r2, r3
 8014baa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014bac:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014bb0:	e02d      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8014bb2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014bb4:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014bb8:	1c5a      	adds	r2, r3, #1
 8014bba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014bbc:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014bc0:	e025      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8014bc2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014bc4:	68ba      	ldr	r2, [r7, #8]
 8014bc6:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014bca:	e020      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014bcc:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014bd0:	2b02      	cmp	r3, #2
 8014bd2:	d004      	beq.n	8014bde <xTaskGenericNotifyFromISR+0xd6>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8014bd4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014bd6:	68ba      	ldr	r2, [r7, #8]
 8014bd8:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014bdc:	e017      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>
						xReturn = pdFAIL;
 8014bde:	2300      	movs	r3, #0
 8014be0:	637b      	str	r3, [r7, #52]	@ 0x34
					break;
 8014be2:	e014      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8014be4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014be6:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014bea:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014bee:	d00d      	beq.n	8014c0c <xTaskGenericNotifyFromISR+0x104>
	__asm volatile
 8014bf0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014bf4:	f383 8811 	msr	BASEPRI, r3
 8014bf8:	f3bf 8f6f 	isb	sy
 8014bfc:	f3bf 8f4f 	dsb	sy
 8014c00:	61bb      	str	r3, [r7, #24]
}
 8014c02:	bf00      	nop
 8014c04:	bf00      	nop
 8014c06:	e7fd      	b.n	8014c04 <xTaskGenericNotifyFromISR+0xfc>
					break;
 8014c08:	bf00      	nop
 8014c0a:	e000      	b.n	8014c0e <xTaskGenericNotifyFromISR+0x106>
					break;
 8014c0c:	bf00      	nop

			traceTASK_NOTIFY_FROM_ISR();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014c0e:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014c12:	2b01      	cmp	r3, #1
 8014c14:	d147      	bne.n	8014ca6 <xTaskGenericNotifyFromISR+0x19e>
			{
				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8014c16:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c18:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014c1a:	2b00      	cmp	r3, #0
 8014c1c:	d00b      	beq.n	8014c36 <xTaskGenericNotifyFromISR+0x12e>
	__asm volatile
 8014c1e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014c22:	f383 8811 	msr	BASEPRI, r3
 8014c26:	f3bf 8f6f 	isb	sy
 8014c2a:	f3bf 8f4f 	dsb	sy
 8014c2e:	617b      	str	r3, [r7, #20]
}
 8014c30:	bf00      	nop
 8014c32:	bf00      	nop
 8014c34:	e7fd      	b.n	8014c32 <xTaskGenericNotifyFromISR+0x12a>

				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8014c36:	4b21      	ldr	r3, [pc, #132]	@ (8014cbc <xTaskGenericNotifyFromISR+0x1b4>)
 8014c38:	681b      	ldr	r3, [r3, #0]
 8014c3a:	2b00      	cmp	r3, #0
 8014c3c:	d11d      	bne.n	8014c7a <xTaskGenericNotifyFromISR+0x172>
				{
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014c3e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c40:	3304      	adds	r3, #4
 8014c42:	4618      	mov	r0, r3
 8014c44:	f7fd f91c 	bl	8011e80 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8014c48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c4a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014c4c:	4b1c      	ldr	r3, [pc, #112]	@ (8014cc0 <xTaskGenericNotifyFromISR+0x1b8>)
 8014c4e:	681b      	ldr	r3, [r3, #0]
 8014c50:	429a      	cmp	r2, r3
 8014c52:	d903      	bls.n	8014c5c <xTaskGenericNotifyFromISR+0x154>
 8014c54:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014c58:	4a19      	ldr	r2, [pc, #100]	@ (8014cc0 <xTaskGenericNotifyFromISR+0x1b8>)
 8014c5a:	6013      	str	r3, [r2, #0]
 8014c5c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c5e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014c60:	4613      	mov	r3, r2
 8014c62:	009b      	lsls	r3, r3, #2
 8014c64:	4413      	add	r3, r2
 8014c66:	009b      	lsls	r3, r3, #2
 8014c68:	4a16      	ldr	r2, [pc, #88]	@ (8014cc4 <xTaskGenericNotifyFromISR+0x1bc>)
 8014c6a:	441a      	add	r2, r3
 8014c6c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c6e:	3304      	adds	r3, #4
 8014c70:	4619      	mov	r1, r3
 8014c72:	4610      	mov	r0, r2
 8014c74:	f7fd f8a7 	bl	8011dc6 <vListInsertEnd>
 8014c78:	e005      	b.n	8014c86 <xTaskGenericNotifyFromISR+0x17e>
				}
				else
				{
					/* The delayed and ready lists cannot be accessed, so hold
					this task pending until the scheduler is resumed. */
					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 8014c7a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c7c:	3318      	adds	r3, #24
 8014c7e:	4619      	mov	r1, r3
 8014c80:	4811      	ldr	r0, [pc, #68]	@ (8014cc8 <xTaskGenericNotifyFromISR+0x1c0>)
 8014c82:	f7fd f8a0 	bl	8011dc6 <vListInsertEnd>
				}

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014c86:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014c88:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014c8a:	4b10      	ldr	r3, [pc, #64]	@ (8014ccc <xTaskGenericNotifyFromISR+0x1c4>)
 8014c8c:	681b      	ldr	r3, [r3, #0]
 8014c8e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014c90:	429a      	cmp	r2, r3
 8014c92:	d908      	bls.n	8014ca6 <xTaskGenericNotifyFromISR+0x19e>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					if( pxHigherPriorityTaskWoken != NULL )
 8014c94:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8014c96:	2b00      	cmp	r3, #0
 8014c98:	d002      	beq.n	8014ca0 <xTaskGenericNotifyFromISR+0x198>
					{
						*pxHigherPriorityTaskWoken = pdTRUE;
 8014c9a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8014c9c:	2201      	movs	r2, #1
 8014c9e:	601a      	str	r2, [r3, #0]
					}

					/* Mark that a yield is pending in case the user is not
					using the "xHigherPriorityTaskWoken" parameter to an ISR
					safe FreeRTOS function. */
					xYieldPending = pdTRUE;
 8014ca0:	4b0b      	ldr	r3, [pc, #44]	@ (8014cd0 <xTaskGenericNotifyFromISR+0x1c8>)
 8014ca2:	2201      	movs	r2, #1
 8014ca4:	601a      	str	r2, [r3, #0]
 8014ca6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014ca8:	613b      	str	r3, [r7, #16]
	__asm volatile
 8014caa:	693b      	ldr	r3, [r7, #16]
 8014cac:	f383 8811 	msr	BASEPRI, r3
}
 8014cb0:	bf00      	nop
				}
			}
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

		return xReturn;
 8014cb2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
	}
 8014cb4:	4618      	mov	r0, r3
 8014cb6:	3738      	adds	r7, #56	@ 0x38
 8014cb8:	46bd      	mov	sp, r7
 8014cba:	bd80      	pop	{r7, pc}
 8014cbc:	2400426c 	.word	0x2400426c
 8014cc0:	2400424c 	.word	0x2400424c
 8014cc4:	24003d74 	.word	0x24003d74
 8014cc8:	24004204 	.word	0x24004204
 8014ccc:	24003d70 	.word	0x24003d70
 8014cd0:	24004258 	.word	0x24004258

08014cd4 <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
	{
 8014cd4:	b580      	push	{r7, lr}
 8014cd6:	b084      	sub	sp, #16
 8014cd8:	af00      	add	r7, sp, #0
 8014cda:	6078      	str	r0, [r7, #4]
	TCB_t *pxTCB;
	BaseType_t xReturn;

		/* If null is passed in here then it is the calling task that is having
		its notification state cleared. */
		pxTCB = prvGetTCBFromHandle( xTask );
 8014cdc:	687b      	ldr	r3, [r7, #4]
 8014cde:	2b00      	cmp	r3, #0
 8014ce0:	d102      	bne.n	8014ce8 <xTaskNotifyStateClear+0x14>
 8014ce2:	4b0e      	ldr	r3, [pc, #56]	@ (8014d1c <xTaskNotifyStateClear+0x48>)
 8014ce4:	681b      	ldr	r3, [r3, #0]
 8014ce6:	e000      	b.n	8014cea <xTaskNotifyStateClear+0x16>
 8014ce8:	687b      	ldr	r3, [r7, #4]
 8014cea:	60bb      	str	r3, [r7, #8]

		taskENTER_CRITICAL();
 8014cec:	f000 fde4 	bl	80158b8 <vPortEnterCritical>
		{
			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
 8014cf0:	68bb      	ldr	r3, [r7, #8]
 8014cf2:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014cf6:	b2db      	uxtb	r3, r3
 8014cf8:	2b02      	cmp	r3, #2
 8014cfa:	d106      	bne.n	8014d0a <xTaskNotifyStateClear+0x36>
			{
				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8014cfc:	68bb      	ldr	r3, [r7, #8]
 8014cfe:	2200      	movs	r2, #0
 8014d00:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
				xReturn = pdPASS;
 8014d04:	2301      	movs	r3, #1
 8014d06:	60fb      	str	r3, [r7, #12]
 8014d08:	e001      	b.n	8014d0e <xTaskNotifyStateClear+0x3a>
			}
			else
			{
				xReturn = pdFAIL;
 8014d0a:	2300      	movs	r3, #0
 8014d0c:	60fb      	str	r3, [r7, #12]
			}
		}
		taskEXIT_CRITICAL();
 8014d0e:	f000 fe05 	bl	801591c <vPortExitCritical>

		return xReturn;
 8014d12:	68fb      	ldr	r3, [r7, #12]
	}
 8014d14:	4618      	mov	r0, r3
 8014d16:	3710      	adds	r7, #16
 8014d18:	46bd      	mov	sp, r7
 8014d1a:	bd80      	pop	{r7, pc}
 8014d1c:	24003d70 	.word	0x24003d70

08014d20 <prvAddCurrentTaskToDelayedList>:

#endif
/*-----------------------------------------------------------*/

static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 8014d20:	b580      	push	{r7, lr}
 8014d22:	b084      	sub	sp, #16
 8014d24:	af00      	add	r7, sp, #0
 8014d26:	6078      	str	r0, [r7, #4]
 8014d28:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 8014d2a:	4b21      	ldr	r3, [pc, #132]	@ (8014db0 <prvAddCurrentTaskToDelayedList+0x90>)
 8014d2c:	681b      	ldr	r3, [r3, #0]
 8014d2e:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014d30:	4b20      	ldr	r3, [pc, #128]	@ (8014db4 <prvAddCurrentTaskToDelayedList+0x94>)
 8014d32:	681b      	ldr	r3, [r3, #0]
 8014d34:	3304      	adds	r3, #4
 8014d36:	4618      	mov	r0, r3
 8014d38:	f7fd f8a2 	bl	8011e80 <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 8014d3c:	687b      	ldr	r3, [r7, #4]
 8014d3e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014d42:	d10a      	bne.n	8014d5a <prvAddCurrentTaskToDelayedList+0x3a>
 8014d44:	683b      	ldr	r3, [r7, #0]
 8014d46:	2b00      	cmp	r3, #0
 8014d48:	d007      	beq.n	8014d5a <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8014d4a:	4b1a      	ldr	r3, [pc, #104]	@ (8014db4 <prvAddCurrentTaskToDelayedList+0x94>)
 8014d4c:	681b      	ldr	r3, [r3, #0]
 8014d4e:	3304      	adds	r3, #4
 8014d50:	4619      	mov	r1, r3
 8014d52:	4819      	ldr	r0, [pc, #100]	@ (8014db8 <prvAddCurrentTaskToDelayedList+0x98>)
 8014d54:	f7fd f837 	bl	8011dc6 <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 8014d58:	e026      	b.n	8014da8 <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 8014d5a:	68fa      	ldr	r2, [r7, #12]
 8014d5c:	687b      	ldr	r3, [r7, #4]
 8014d5e:	4413      	add	r3, r2
 8014d60:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 8014d62:	4b14      	ldr	r3, [pc, #80]	@ (8014db4 <prvAddCurrentTaskToDelayedList+0x94>)
 8014d64:	681b      	ldr	r3, [r3, #0]
 8014d66:	68ba      	ldr	r2, [r7, #8]
 8014d68:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 8014d6a:	68ba      	ldr	r2, [r7, #8]
 8014d6c:	68fb      	ldr	r3, [r7, #12]
 8014d6e:	429a      	cmp	r2, r3
 8014d70:	d209      	bcs.n	8014d86 <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8014d72:	4b12      	ldr	r3, [pc, #72]	@ (8014dbc <prvAddCurrentTaskToDelayedList+0x9c>)
 8014d74:	681a      	ldr	r2, [r3, #0]
 8014d76:	4b0f      	ldr	r3, [pc, #60]	@ (8014db4 <prvAddCurrentTaskToDelayedList+0x94>)
 8014d78:	681b      	ldr	r3, [r3, #0]
 8014d7a:	3304      	adds	r3, #4
 8014d7c:	4619      	mov	r1, r3
 8014d7e:	4610      	mov	r0, r2
 8014d80:	f7fd f845 	bl	8011e0e <vListInsert>
}
 8014d84:	e010      	b.n	8014da8 <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8014d86:	4b0e      	ldr	r3, [pc, #56]	@ (8014dc0 <prvAddCurrentTaskToDelayedList+0xa0>)
 8014d88:	681a      	ldr	r2, [r3, #0]
 8014d8a:	4b0a      	ldr	r3, [pc, #40]	@ (8014db4 <prvAddCurrentTaskToDelayedList+0x94>)
 8014d8c:	681b      	ldr	r3, [r3, #0]
 8014d8e:	3304      	adds	r3, #4
 8014d90:	4619      	mov	r1, r3
 8014d92:	4610      	mov	r0, r2
 8014d94:	f7fd f83b 	bl	8011e0e <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 8014d98:	4b0a      	ldr	r3, [pc, #40]	@ (8014dc4 <prvAddCurrentTaskToDelayedList+0xa4>)
 8014d9a:	681b      	ldr	r3, [r3, #0]
 8014d9c:	68ba      	ldr	r2, [r7, #8]
 8014d9e:	429a      	cmp	r2, r3
 8014da0:	d202      	bcs.n	8014da8 <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 8014da2:	4a08      	ldr	r2, [pc, #32]	@ (8014dc4 <prvAddCurrentTaskToDelayedList+0xa4>)
 8014da4:	68bb      	ldr	r3, [r7, #8]
 8014da6:	6013      	str	r3, [r2, #0]
}
 8014da8:	bf00      	nop
 8014daa:	3710      	adds	r7, #16
 8014dac:	46bd      	mov	sp, r7
 8014dae:	bd80      	pop	{r7, pc}
 8014db0:	24004248 	.word	0x24004248
 8014db4:	24003d70 	.word	0x24003d70
 8014db8:	24004230 	.word	0x24004230
 8014dbc:	24004200 	.word	0x24004200
 8014dc0:	240041fc 	.word	0x240041fc
 8014dc4:	24004264 	.word	0x24004264

08014dc8 <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 8014dc8:	b580      	push	{r7, lr}
 8014dca:	b08a      	sub	sp, #40	@ 0x28
 8014dcc:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 8014dce:	2300      	movs	r3, #0
 8014dd0:	617b      	str	r3, [r7, #20]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 8014dd2:	f000 fbb1 	bl	8015538 <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 8014dd6:	4b1d      	ldr	r3, [pc, #116]	@ (8014e4c <xTimerCreateTimerTask+0x84>)
 8014dd8:	681b      	ldr	r3, [r3, #0]
 8014dda:	2b00      	cmp	r3, #0
 8014ddc:	d021      	beq.n	8014e22 <xTimerCreateTimerTask+0x5a>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 8014dde:	2300      	movs	r3, #0
 8014de0:	60fb      	str	r3, [r7, #12]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 8014de2:	2300      	movs	r3, #0
 8014de4:	60bb      	str	r3, [r7, #8]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 8014de6:	1d3a      	adds	r2, r7, #4
 8014de8:	f107 0108 	add.w	r1, r7, #8
 8014dec:	f107 030c 	add.w	r3, r7, #12
 8014df0:	4618      	mov	r0, r3
 8014df2:	f7fc ffa1 	bl	8011d38 <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 8014df6:	6879      	ldr	r1, [r7, #4]
 8014df8:	68bb      	ldr	r3, [r7, #8]
 8014dfa:	68fa      	ldr	r2, [r7, #12]
 8014dfc:	9202      	str	r2, [sp, #8]
 8014dfe:	9301      	str	r3, [sp, #4]
 8014e00:	2302      	movs	r3, #2
 8014e02:	9300      	str	r3, [sp, #0]
 8014e04:	2300      	movs	r3, #0
 8014e06:	460a      	mov	r2, r1
 8014e08:	4911      	ldr	r1, [pc, #68]	@ (8014e50 <xTimerCreateTimerTask+0x88>)
 8014e0a:	4812      	ldr	r0, [pc, #72]	@ (8014e54 <xTimerCreateTimerTask+0x8c>)
 8014e0c:	f7fe fd1c 	bl	8013848 <xTaskCreateStatic>
 8014e10:	4603      	mov	r3, r0
 8014e12:	4a11      	ldr	r2, [pc, #68]	@ (8014e58 <xTimerCreateTimerTask+0x90>)
 8014e14:	6013      	str	r3, [r2, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 8014e16:	4b10      	ldr	r3, [pc, #64]	@ (8014e58 <xTimerCreateTimerTask+0x90>)
 8014e18:	681b      	ldr	r3, [r3, #0]
 8014e1a:	2b00      	cmp	r3, #0
 8014e1c:	d001      	beq.n	8014e22 <xTimerCreateTimerTask+0x5a>
			{
				xReturn = pdPASS;
 8014e1e:	2301      	movs	r3, #1
 8014e20:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 8014e22:	697b      	ldr	r3, [r7, #20]
 8014e24:	2b00      	cmp	r3, #0
 8014e26:	d10b      	bne.n	8014e40 <xTimerCreateTimerTask+0x78>
	__asm volatile
 8014e28:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014e2c:	f383 8811 	msr	BASEPRI, r3
 8014e30:	f3bf 8f6f 	isb	sy
 8014e34:	f3bf 8f4f 	dsb	sy
 8014e38:	613b      	str	r3, [r7, #16]
}
 8014e3a:	bf00      	nop
 8014e3c:	bf00      	nop
 8014e3e:	e7fd      	b.n	8014e3c <xTimerCreateTimerTask+0x74>
	return xReturn;
 8014e40:	697b      	ldr	r3, [r7, #20]
}
 8014e42:	4618      	mov	r0, r3
 8014e44:	3718      	adds	r7, #24
 8014e46:	46bd      	mov	sp, r7
 8014e48:	bd80      	pop	{r7, pc}
 8014e4a:	bf00      	nop
 8014e4c:	240042a0 	.word	0x240042a0
 8014e50:	0802da58 	.word	0x0802da58
 8014e54:	080150d1 	.word	0x080150d1
 8014e58:	240042a4 	.word	0x240042a4

08014e5c <xTimerCreate>:
	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
								const TickType_t xTimerPeriodInTicks,
								const UBaseType_t uxAutoReload,
								void * const pvTimerID,
								TimerCallbackFunction_t pxCallbackFunction )
	{
 8014e5c:	b580      	push	{r7, lr}
 8014e5e:	b088      	sub	sp, #32
 8014e60:	af02      	add	r7, sp, #8
 8014e62:	60f8      	str	r0, [r7, #12]
 8014e64:	60b9      	str	r1, [r7, #8]
 8014e66:	607a      	str	r2, [r7, #4]
 8014e68:	603b      	str	r3, [r7, #0]
	Timer_t *pxNewTimer;

		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
 8014e6a:	202c      	movs	r0, #44	@ 0x2c
 8014e6c:	f000 fe46 	bl	8015afc <pvPortMalloc>
 8014e70:	6178      	str	r0, [r7, #20]

		if( pxNewTimer != NULL )
 8014e72:	697b      	ldr	r3, [r7, #20]
 8014e74:	2b00      	cmp	r3, #0
 8014e76:	d00d      	beq.n	8014e94 <xTimerCreate+0x38>
		{
			/* Status is thus far zero as the timer is not created statically
			and has not been started.  The auto-reload bit may get set in
			prvInitialiseNewTimer. */
			pxNewTimer->ucStatus = 0x00;
 8014e78:	697b      	ldr	r3, [r7, #20]
 8014e7a:	2200      	movs	r2, #0
 8014e7c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 8014e80:	697b      	ldr	r3, [r7, #20]
 8014e82:	9301      	str	r3, [sp, #4]
 8014e84:	6a3b      	ldr	r3, [r7, #32]
 8014e86:	9300      	str	r3, [sp, #0]
 8014e88:	683b      	ldr	r3, [r7, #0]
 8014e8a:	687a      	ldr	r2, [r7, #4]
 8014e8c:	68b9      	ldr	r1, [r7, #8]
 8014e8e:	68f8      	ldr	r0, [r7, #12]
 8014e90:	f000 f845 	bl	8014f1e <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 8014e94:	697b      	ldr	r3, [r7, #20]
	}
 8014e96:	4618      	mov	r0, r3
 8014e98:	3718      	adds	r7, #24
 8014e9a:	46bd      	mov	sp, r7
 8014e9c:	bd80      	pop	{r7, pc}

08014e9e <xTimerCreateStatic>:
										const TickType_t xTimerPeriodInTicks,
										const UBaseType_t uxAutoReload,
										void * const pvTimerID,
										TimerCallbackFunction_t pxCallbackFunction,
										StaticTimer_t *pxTimerBuffer )
	{
 8014e9e:	b580      	push	{r7, lr}
 8014ea0:	b08a      	sub	sp, #40	@ 0x28
 8014ea2:	af02      	add	r7, sp, #8
 8014ea4:	60f8      	str	r0, [r7, #12]
 8014ea6:	60b9      	str	r1, [r7, #8]
 8014ea8:	607a      	str	r2, [r7, #4]
 8014eaa:	603b      	str	r3, [r7, #0]
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTimer_t equals the size of the real timer
			structure. */
			volatile size_t xSize = sizeof( StaticTimer_t );
 8014eac:	232c      	movs	r3, #44	@ 0x2c
 8014eae:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( Timer_t ) );
 8014eb0:	693b      	ldr	r3, [r7, #16]
 8014eb2:	2b2c      	cmp	r3, #44	@ 0x2c
 8014eb4:	d00b      	beq.n	8014ece <xTimerCreateStatic+0x30>
	__asm volatile
 8014eb6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014eba:	f383 8811 	msr	BASEPRI, r3
 8014ebe:	f3bf 8f6f 	isb	sy
 8014ec2:	f3bf 8f4f 	dsb	sy
 8014ec6:	61bb      	str	r3, [r7, #24]
}
 8014ec8:	bf00      	nop
 8014eca:	bf00      	nop
 8014ecc:	e7fd      	b.n	8014eca <xTimerCreateStatic+0x2c>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8014ece:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */

		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
		configASSERT( pxTimerBuffer );
 8014ed0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014ed2:	2b00      	cmp	r3, #0
 8014ed4:	d10b      	bne.n	8014eee <xTimerCreateStatic+0x50>
	__asm volatile
 8014ed6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014eda:	f383 8811 	msr	BASEPRI, r3
 8014ede:	f3bf 8f6f 	isb	sy
 8014ee2:	f3bf 8f4f 	dsb	sy
 8014ee6:	617b      	str	r3, [r7, #20]
}
 8014ee8:	bf00      	nop
 8014eea:	bf00      	nop
 8014eec:	e7fd      	b.n	8014eea <xTimerCreateStatic+0x4c>
		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
 8014eee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014ef0:	61fb      	str	r3, [r7, #28]

		if( pxNewTimer != NULL )
 8014ef2:	69fb      	ldr	r3, [r7, #28]
 8014ef4:	2b00      	cmp	r3, #0
 8014ef6:	d00d      	beq.n	8014f14 <xTimerCreateStatic+0x76>
		{
			/* Timers can be created statically or dynamically so note this
			timer was created statically in case it is later deleted.  The
			auto-reload bit may get set in prvInitialiseNewTimer(). */
			pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
 8014ef8:	69fb      	ldr	r3, [r7, #28]
 8014efa:	2202      	movs	r2, #2
 8014efc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 8014f00:	69fb      	ldr	r3, [r7, #28]
 8014f02:	9301      	str	r3, [sp, #4]
 8014f04:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8014f06:	9300      	str	r3, [sp, #0]
 8014f08:	683b      	ldr	r3, [r7, #0]
 8014f0a:	687a      	ldr	r2, [r7, #4]
 8014f0c:	68b9      	ldr	r1, [r7, #8]
 8014f0e:	68f8      	ldr	r0, [r7, #12]
 8014f10:	f000 f805 	bl	8014f1e <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 8014f14:	69fb      	ldr	r3, [r7, #28]
	}
 8014f16:	4618      	mov	r0, r3
 8014f18:	3720      	adds	r7, #32
 8014f1a:	46bd      	mov	sp, r7
 8014f1c:	bd80      	pop	{r7, pc}

08014f1e <prvInitialiseNewTimer>:
									const TickType_t xTimerPeriodInTicks,
									const UBaseType_t uxAutoReload,
									void * const pvTimerID,
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer )
{
 8014f1e:	b580      	push	{r7, lr}
 8014f20:	b086      	sub	sp, #24
 8014f22:	af00      	add	r7, sp, #0
 8014f24:	60f8      	str	r0, [r7, #12]
 8014f26:	60b9      	str	r1, [r7, #8]
 8014f28:	607a      	str	r2, [r7, #4]
 8014f2a:	603b      	str	r3, [r7, #0]
	/* 0 is not a valid value for xTimerPeriodInTicks. */
	configASSERT( ( xTimerPeriodInTicks > 0 ) );
 8014f2c:	68bb      	ldr	r3, [r7, #8]
 8014f2e:	2b00      	cmp	r3, #0
 8014f30:	d10b      	bne.n	8014f4a <prvInitialiseNewTimer+0x2c>
	__asm volatile
 8014f32:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014f36:	f383 8811 	msr	BASEPRI, r3
 8014f3a:	f3bf 8f6f 	isb	sy
 8014f3e:	f3bf 8f4f 	dsb	sy
 8014f42:	617b      	str	r3, [r7, #20]
}
 8014f44:	bf00      	nop
 8014f46:	bf00      	nop
 8014f48:	e7fd      	b.n	8014f46 <prvInitialiseNewTimer+0x28>

	if( pxNewTimer != NULL )
 8014f4a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f4c:	2b00      	cmp	r3, #0
 8014f4e:	d01e      	beq.n	8014f8e <prvInitialiseNewTimer+0x70>
	{
		/* Ensure the infrastructure used by the timer service task has been
		created/initialised. */
		prvCheckForValidListAndQueue();
 8014f50:	f000 faf2 	bl	8015538 <prvCheckForValidListAndQueue>

		/* Initialise the timer structure members using the function
		parameters. */
		pxNewTimer->pcTimerName = pcTimerName;
 8014f54:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f56:	68fa      	ldr	r2, [r7, #12]
 8014f58:	601a      	str	r2, [r3, #0]
		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
 8014f5a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f5c:	68ba      	ldr	r2, [r7, #8]
 8014f5e:	619a      	str	r2, [r3, #24]
		pxNewTimer->pvTimerID = pvTimerID;
 8014f60:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f62:	683a      	ldr	r2, [r7, #0]
 8014f64:	61da      	str	r2, [r3, #28]
		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
 8014f66:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f68:	6a3a      	ldr	r2, [r7, #32]
 8014f6a:	621a      	str	r2, [r3, #32]
		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
 8014f6c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f6e:	3304      	adds	r3, #4
 8014f70:	4618      	mov	r0, r3
 8014f72:	f7fc ff1b 	bl	8011dac <vListInitialiseItem>
		if( uxAutoReload != pdFALSE )
 8014f76:	687b      	ldr	r3, [r7, #4]
 8014f78:	2b00      	cmp	r3, #0
 8014f7a:	d008      	beq.n	8014f8e <prvInitialiseNewTimer+0x70>
		{
			pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
 8014f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f7e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8014f82:	f043 0304 	orr.w	r3, r3, #4
 8014f86:	b2da      	uxtb	r2, r3
 8014f88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8014f8a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		}
		traceTIMER_CREATE( pxNewTimer );
	}
}
 8014f8e:	bf00      	nop
 8014f90:	3718      	adds	r7, #24
 8014f92:	46bd      	mov	sp, r7
 8014f94:	bd80      	pop	{r7, pc}
	...

08014f98 <xTimerGenericCommand>:
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 8014f98:	b580      	push	{r7, lr}
 8014f9a:	b08a      	sub	sp, #40	@ 0x28
 8014f9c:	af00      	add	r7, sp, #0
 8014f9e:	60f8      	str	r0, [r7, #12]
 8014fa0:	60b9      	str	r1, [r7, #8]
 8014fa2:	607a      	str	r2, [r7, #4]
 8014fa4:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 8014fa6:	2300      	movs	r3, #0
 8014fa8:	627b      	str	r3, [r7, #36]	@ 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 8014faa:	68fb      	ldr	r3, [r7, #12]
 8014fac:	2b00      	cmp	r3, #0
 8014fae:	d10b      	bne.n	8014fc8 <xTimerGenericCommand+0x30>
	__asm volatile
 8014fb0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014fb4:	f383 8811 	msr	BASEPRI, r3
 8014fb8:	f3bf 8f6f 	isb	sy
 8014fbc:	f3bf 8f4f 	dsb	sy
 8014fc0:	623b      	str	r3, [r7, #32]
}
 8014fc2:	bf00      	nop
 8014fc4:	bf00      	nop
 8014fc6:	e7fd      	b.n	8014fc4 <xTimerGenericCommand+0x2c>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 8014fc8:	4b19      	ldr	r3, [pc, #100]	@ (8015030 <xTimerGenericCommand+0x98>)
 8014fca:	681b      	ldr	r3, [r3, #0]
 8014fcc:	2b00      	cmp	r3, #0
 8014fce:	d02a      	beq.n	8015026 <xTimerGenericCommand+0x8e>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 8014fd0:	68bb      	ldr	r3, [r7, #8]
 8014fd2:	613b      	str	r3, [r7, #16]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 8014fd4:	687b      	ldr	r3, [r7, #4]
 8014fd6:	617b      	str	r3, [r7, #20]
		xMessage.u.xTimerParameters.pxTimer = xTimer;
 8014fd8:	68fb      	ldr	r3, [r7, #12]
 8014fda:	61bb      	str	r3, [r7, #24]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 8014fdc:	68bb      	ldr	r3, [r7, #8]
 8014fde:	2b05      	cmp	r3, #5
 8014fe0:	dc18      	bgt.n	8015014 <xTimerGenericCommand+0x7c>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 8014fe2:	f7ff fae1 	bl	80145a8 <xTaskGetSchedulerState>
 8014fe6:	4603      	mov	r3, r0
 8014fe8:	2b02      	cmp	r3, #2
 8014fea:	d109      	bne.n	8015000 <xTimerGenericCommand+0x68>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 8014fec:	4b10      	ldr	r3, [pc, #64]	@ (8015030 <xTimerGenericCommand+0x98>)
 8014fee:	6818      	ldr	r0, [r3, #0]
 8014ff0:	f107 0110 	add.w	r1, r7, #16
 8014ff4:	2300      	movs	r3, #0
 8014ff6:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8014ff8:	f7fd f9d8 	bl	80123ac <xQueueGenericSend>
 8014ffc:	6278      	str	r0, [r7, #36]	@ 0x24
 8014ffe:	e012      	b.n	8015026 <xTimerGenericCommand+0x8e>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 8015000:	4b0b      	ldr	r3, [pc, #44]	@ (8015030 <xTimerGenericCommand+0x98>)
 8015002:	6818      	ldr	r0, [r3, #0]
 8015004:	f107 0110 	add.w	r1, r7, #16
 8015008:	2300      	movs	r3, #0
 801500a:	2200      	movs	r2, #0
 801500c:	f7fd f9ce 	bl	80123ac <xQueueGenericSend>
 8015010:	6278      	str	r0, [r7, #36]	@ 0x24
 8015012:	e008      	b.n	8015026 <xTimerGenericCommand+0x8e>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 8015014:	4b06      	ldr	r3, [pc, #24]	@ (8015030 <xTimerGenericCommand+0x98>)
 8015016:	6818      	ldr	r0, [r3, #0]
 8015018:	f107 0110 	add.w	r1, r7, #16
 801501c:	2300      	movs	r3, #0
 801501e:	683a      	ldr	r2, [r7, #0]
 8015020:	f7fd fac6 	bl	80125b0 <xQueueGenericSendFromISR>
 8015024:	6278      	str	r0, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 8015026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8015028:	4618      	mov	r0, r3
 801502a:	3728      	adds	r7, #40	@ 0x28
 801502c:	46bd      	mov	sp, r7
 801502e:	bd80      	pop	{r7, pc}
 8015030:	240042a0 	.word	0x240042a0

08015034 <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8015034:	b580      	push	{r7, lr}
 8015036:	b088      	sub	sp, #32
 8015038:	af02      	add	r7, sp, #8
 801503a:	6078      	str	r0, [r7, #4]
 801503c:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801503e:	4b23      	ldr	r3, [pc, #140]	@ (80150cc <prvProcessExpiredTimer+0x98>)
 8015040:	681b      	ldr	r3, [r3, #0]
 8015042:	68db      	ldr	r3, [r3, #12]
 8015044:	68db      	ldr	r3, [r3, #12]
 8015046:	617b      	str	r3, [r7, #20]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8015048:	697b      	ldr	r3, [r7, #20]
 801504a:	3304      	adds	r3, #4
 801504c:	4618      	mov	r0, r3
 801504e:	f7fc ff17 	bl	8011e80 <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto-reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8015052:	697b      	ldr	r3, [r7, #20]
 8015054:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015058:	f003 0304 	and.w	r3, r3, #4
 801505c:	2b00      	cmp	r3, #0
 801505e:	d023      	beq.n	80150a8 <prvProcessExpiredTimer+0x74>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 8015060:	697b      	ldr	r3, [r7, #20]
 8015062:	699a      	ldr	r2, [r3, #24]
 8015064:	687b      	ldr	r3, [r7, #4]
 8015066:	18d1      	adds	r1, r2, r3
 8015068:	687b      	ldr	r3, [r7, #4]
 801506a:	683a      	ldr	r2, [r7, #0]
 801506c:	6978      	ldr	r0, [r7, #20]
 801506e:	f000 f8d5 	bl	801521c <prvInsertTimerInActiveList>
 8015072:	4603      	mov	r3, r0
 8015074:	2b00      	cmp	r3, #0
 8015076:	d020      	beq.n	80150ba <prvProcessExpiredTimer+0x86>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 8015078:	2300      	movs	r3, #0
 801507a:	9300      	str	r3, [sp, #0]
 801507c:	2300      	movs	r3, #0
 801507e:	687a      	ldr	r2, [r7, #4]
 8015080:	2100      	movs	r1, #0
 8015082:	6978      	ldr	r0, [r7, #20]
 8015084:	f7ff ff88 	bl	8014f98 <xTimerGenericCommand>
 8015088:	6138      	str	r0, [r7, #16]
			configASSERT( xResult );
 801508a:	693b      	ldr	r3, [r7, #16]
 801508c:	2b00      	cmp	r3, #0
 801508e:	d114      	bne.n	80150ba <prvProcessExpiredTimer+0x86>
	__asm volatile
 8015090:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015094:	f383 8811 	msr	BASEPRI, r3
 8015098:	f3bf 8f6f 	isb	sy
 801509c:	f3bf 8f4f 	dsb	sy
 80150a0:	60fb      	str	r3, [r7, #12]
}
 80150a2:	bf00      	nop
 80150a4:	bf00      	nop
 80150a6:	e7fd      	b.n	80150a4 <prvProcessExpiredTimer+0x70>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80150a8:	697b      	ldr	r3, [r7, #20]
 80150aa:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80150ae:	f023 0301 	bic.w	r3, r3, #1
 80150b2:	b2da      	uxtb	r2, r3
 80150b4:	697b      	ldr	r3, [r7, #20]
 80150b6:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80150ba:	697b      	ldr	r3, [r7, #20]
 80150bc:	6a1b      	ldr	r3, [r3, #32]
 80150be:	6978      	ldr	r0, [r7, #20]
 80150c0:	4798      	blx	r3
}
 80150c2:	bf00      	nop
 80150c4:	3718      	adds	r7, #24
 80150c6:	46bd      	mov	sp, r7
 80150c8:	bd80      	pop	{r7, pc}
 80150ca:	bf00      	nop
 80150cc:	24004298 	.word	0x24004298

080150d0 <prvTimerTask>:
/*-----------------------------------------------------------*/

static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
 80150d0:	b580      	push	{r7, lr}
 80150d2:	b084      	sub	sp, #16
 80150d4:	af00      	add	r7, sp, #0
 80150d6:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80150d8:	f107 0308 	add.w	r3, r7, #8
 80150dc:	4618      	mov	r0, r3
 80150de:	f000 f859 	bl	8015194 <prvGetNextExpireTime>
 80150e2:	60f8      	str	r0, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 80150e4:	68bb      	ldr	r3, [r7, #8]
 80150e6:	4619      	mov	r1, r3
 80150e8:	68f8      	ldr	r0, [r7, #12]
 80150ea:	f000 f805 	bl	80150f8 <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 80150ee:	f000 f8d7 	bl	80152a0 <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80150f2:	bf00      	nop
 80150f4:	e7f0      	b.n	80150d8 <prvTimerTask+0x8>
	...

080150f8 <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 80150f8:	b580      	push	{r7, lr}
 80150fa:	b084      	sub	sp, #16
 80150fc:	af00      	add	r7, sp, #0
 80150fe:	6078      	str	r0, [r7, #4]
 8015100:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 8015102:	f7fe fe05 	bl	8013d10 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8015106:	f107 0308 	add.w	r3, r7, #8
 801510a:	4618      	mov	r0, r3
 801510c:	f000 f866 	bl	80151dc <prvSampleTimeNow>
 8015110:	60f8      	str	r0, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 8015112:	68bb      	ldr	r3, [r7, #8]
 8015114:	2b00      	cmp	r3, #0
 8015116:	d130      	bne.n	801517a <prvProcessTimerOrBlockTask+0x82>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 8015118:	683b      	ldr	r3, [r7, #0]
 801511a:	2b00      	cmp	r3, #0
 801511c:	d10a      	bne.n	8015134 <prvProcessTimerOrBlockTask+0x3c>
 801511e:	687a      	ldr	r2, [r7, #4]
 8015120:	68fb      	ldr	r3, [r7, #12]
 8015122:	429a      	cmp	r2, r3
 8015124:	d806      	bhi.n	8015134 <prvProcessTimerOrBlockTask+0x3c>
			{
				( void ) xTaskResumeAll();
 8015126:	f7fe fe01 	bl	8013d2c <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 801512a:	68f9      	ldr	r1, [r7, #12]
 801512c:	6878      	ldr	r0, [r7, #4]
 801512e:	f7ff ff81 	bl	8015034 <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 8015132:	e024      	b.n	801517e <prvProcessTimerOrBlockTask+0x86>
				if( xListWasEmpty != pdFALSE )
 8015134:	683b      	ldr	r3, [r7, #0]
 8015136:	2b00      	cmp	r3, #0
 8015138:	d008      	beq.n	801514c <prvProcessTimerOrBlockTask+0x54>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 801513a:	4b13      	ldr	r3, [pc, #76]	@ (8015188 <prvProcessTimerOrBlockTask+0x90>)
 801513c:	681b      	ldr	r3, [r3, #0]
 801513e:	681b      	ldr	r3, [r3, #0]
 8015140:	2b00      	cmp	r3, #0
 8015142:	d101      	bne.n	8015148 <prvProcessTimerOrBlockTask+0x50>
 8015144:	2301      	movs	r3, #1
 8015146:	e000      	b.n	801514a <prvProcessTimerOrBlockTask+0x52>
 8015148:	2300      	movs	r3, #0
 801514a:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 801514c:	4b0f      	ldr	r3, [pc, #60]	@ (801518c <prvProcessTimerOrBlockTask+0x94>)
 801514e:	6818      	ldr	r0, [r3, #0]
 8015150:	687a      	ldr	r2, [r7, #4]
 8015152:	68fb      	ldr	r3, [r7, #12]
 8015154:	1ad3      	subs	r3, r2, r3
 8015156:	683a      	ldr	r2, [r7, #0]
 8015158:	4619      	mov	r1, r3
 801515a:	f7fd ffa9 	bl	80130b0 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 801515e:	f7fe fde5 	bl	8013d2c <xTaskResumeAll>
 8015162:	4603      	mov	r3, r0
 8015164:	2b00      	cmp	r3, #0
 8015166:	d10a      	bne.n	801517e <prvProcessTimerOrBlockTask+0x86>
					portYIELD_WITHIN_API();
 8015168:	4b09      	ldr	r3, [pc, #36]	@ (8015190 <prvProcessTimerOrBlockTask+0x98>)
 801516a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 801516e:	601a      	str	r2, [r3, #0]
 8015170:	f3bf 8f4f 	dsb	sy
 8015174:	f3bf 8f6f 	isb	sy
}
 8015178:	e001      	b.n	801517e <prvProcessTimerOrBlockTask+0x86>
			( void ) xTaskResumeAll();
 801517a:	f7fe fdd7 	bl	8013d2c <xTaskResumeAll>
}
 801517e:	bf00      	nop
 8015180:	3710      	adds	r7, #16
 8015182:	46bd      	mov	sp, r7
 8015184:	bd80      	pop	{r7, pc}
 8015186:	bf00      	nop
 8015188:	2400429c 	.word	0x2400429c
 801518c:	240042a0 	.word	0x240042a0
 8015190:	e000ed04 	.word	0xe000ed04

08015194 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 8015194:	b480      	push	{r7}
 8015196:	b085      	sub	sp, #20
 8015198:	af00      	add	r7, sp, #0
 801519a:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 801519c:	4b0e      	ldr	r3, [pc, #56]	@ (80151d8 <prvGetNextExpireTime+0x44>)
 801519e:	681b      	ldr	r3, [r3, #0]
 80151a0:	681b      	ldr	r3, [r3, #0]
 80151a2:	2b00      	cmp	r3, #0
 80151a4:	d101      	bne.n	80151aa <prvGetNextExpireTime+0x16>
 80151a6:	2201      	movs	r2, #1
 80151a8:	e000      	b.n	80151ac <prvGetNextExpireTime+0x18>
 80151aa:	2200      	movs	r2, #0
 80151ac:	687b      	ldr	r3, [r7, #4]
 80151ae:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 80151b0:	687b      	ldr	r3, [r7, #4]
 80151b2:	681b      	ldr	r3, [r3, #0]
 80151b4:	2b00      	cmp	r3, #0
 80151b6:	d105      	bne.n	80151c4 <prvGetNextExpireTime+0x30>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80151b8:	4b07      	ldr	r3, [pc, #28]	@ (80151d8 <prvGetNextExpireTime+0x44>)
 80151ba:	681b      	ldr	r3, [r3, #0]
 80151bc:	68db      	ldr	r3, [r3, #12]
 80151be:	681b      	ldr	r3, [r3, #0]
 80151c0:	60fb      	str	r3, [r7, #12]
 80151c2:	e001      	b.n	80151c8 <prvGetNextExpireTime+0x34>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 80151c4:	2300      	movs	r3, #0
 80151c6:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 80151c8:	68fb      	ldr	r3, [r7, #12]
}
 80151ca:	4618      	mov	r0, r3
 80151cc:	3714      	adds	r7, #20
 80151ce:	46bd      	mov	sp, r7
 80151d0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80151d4:	4770      	bx	lr
 80151d6:	bf00      	nop
 80151d8:	24004298 	.word	0x24004298

080151dc <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 80151dc:	b580      	push	{r7, lr}
 80151de:	b084      	sub	sp, #16
 80151e0:	af00      	add	r7, sp, #0
 80151e2:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 80151e4:	f7fe fe40 	bl	8013e68 <xTaskGetTickCount>
 80151e8:	60f8      	str	r0, [r7, #12]

	if( xTimeNow < xLastTime )
 80151ea:	4b0b      	ldr	r3, [pc, #44]	@ (8015218 <prvSampleTimeNow+0x3c>)
 80151ec:	681b      	ldr	r3, [r3, #0]
 80151ee:	68fa      	ldr	r2, [r7, #12]
 80151f0:	429a      	cmp	r2, r3
 80151f2:	d205      	bcs.n	8015200 <prvSampleTimeNow+0x24>
	{
		prvSwitchTimerLists();
 80151f4:	f000 f93a 	bl	801546c <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 80151f8:	687b      	ldr	r3, [r7, #4]
 80151fa:	2201      	movs	r2, #1
 80151fc:	601a      	str	r2, [r3, #0]
 80151fe:	e002      	b.n	8015206 <prvSampleTimeNow+0x2a>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 8015200:	687b      	ldr	r3, [r7, #4]
 8015202:	2200      	movs	r2, #0
 8015204:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 8015206:	4a04      	ldr	r2, [pc, #16]	@ (8015218 <prvSampleTimeNow+0x3c>)
 8015208:	68fb      	ldr	r3, [r7, #12]
 801520a:	6013      	str	r3, [r2, #0]

	return xTimeNow;
 801520c:	68fb      	ldr	r3, [r7, #12]
}
 801520e:	4618      	mov	r0, r3
 8015210:	3710      	adds	r7, #16
 8015212:	46bd      	mov	sp, r7
 8015214:	bd80      	pop	{r7, pc}
 8015216:	bf00      	nop
 8015218:	240042a8 	.word	0x240042a8

0801521c <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 801521c:	b580      	push	{r7, lr}
 801521e:	b086      	sub	sp, #24
 8015220:	af00      	add	r7, sp, #0
 8015222:	60f8      	str	r0, [r7, #12]
 8015224:	60b9      	str	r1, [r7, #8]
 8015226:	607a      	str	r2, [r7, #4]
 8015228:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 801522a:	2300      	movs	r3, #0
 801522c:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 801522e:	68fb      	ldr	r3, [r7, #12]
 8015230:	68ba      	ldr	r2, [r7, #8]
 8015232:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8015234:	68fb      	ldr	r3, [r7, #12]
 8015236:	68fa      	ldr	r2, [r7, #12]
 8015238:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 801523a:	68ba      	ldr	r2, [r7, #8]
 801523c:	687b      	ldr	r3, [r7, #4]
 801523e:	429a      	cmp	r2, r3
 8015240:	d812      	bhi.n	8015268 <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8015242:	687a      	ldr	r2, [r7, #4]
 8015244:	683b      	ldr	r3, [r7, #0]
 8015246:	1ad2      	subs	r2, r2, r3
 8015248:	68fb      	ldr	r3, [r7, #12]
 801524a:	699b      	ldr	r3, [r3, #24]
 801524c:	429a      	cmp	r2, r3
 801524e:	d302      	bcc.n	8015256 <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 8015250:	2301      	movs	r3, #1
 8015252:	617b      	str	r3, [r7, #20]
 8015254:	e01b      	b.n	801528e <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 8015256:	4b10      	ldr	r3, [pc, #64]	@ (8015298 <prvInsertTimerInActiveList+0x7c>)
 8015258:	681a      	ldr	r2, [r3, #0]
 801525a:	68fb      	ldr	r3, [r7, #12]
 801525c:	3304      	adds	r3, #4
 801525e:	4619      	mov	r1, r3
 8015260:	4610      	mov	r0, r2
 8015262:	f7fc fdd4 	bl	8011e0e <vListInsert>
 8015266:	e012      	b.n	801528e <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 8015268:	687a      	ldr	r2, [r7, #4]
 801526a:	683b      	ldr	r3, [r7, #0]
 801526c:	429a      	cmp	r2, r3
 801526e:	d206      	bcs.n	801527e <prvInsertTimerInActiveList+0x62>
 8015270:	68ba      	ldr	r2, [r7, #8]
 8015272:	683b      	ldr	r3, [r7, #0]
 8015274:	429a      	cmp	r2, r3
 8015276:	d302      	bcc.n	801527e <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 8015278:	2301      	movs	r3, #1
 801527a:	617b      	str	r3, [r7, #20]
 801527c:	e007      	b.n	801528e <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 801527e:	4b07      	ldr	r3, [pc, #28]	@ (801529c <prvInsertTimerInActiveList+0x80>)
 8015280:	681a      	ldr	r2, [r3, #0]
 8015282:	68fb      	ldr	r3, [r7, #12]
 8015284:	3304      	adds	r3, #4
 8015286:	4619      	mov	r1, r3
 8015288:	4610      	mov	r0, r2
 801528a:	f7fc fdc0 	bl	8011e0e <vListInsert>
		}
	}

	return xProcessTimerNow;
 801528e:	697b      	ldr	r3, [r7, #20]
}
 8015290:	4618      	mov	r0, r3
 8015292:	3718      	adds	r7, #24
 8015294:	46bd      	mov	sp, r7
 8015296:	bd80      	pop	{r7, pc}
 8015298:	2400429c 	.word	0x2400429c
 801529c:	24004298 	.word	0x24004298

080152a0 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 80152a0:	b580      	push	{r7, lr}
 80152a2:	b08e      	sub	sp, #56	@ 0x38
 80152a4:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 80152a6:	e0ce      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 80152a8:	687b      	ldr	r3, [r7, #4]
 80152aa:	2b00      	cmp	r3, #0
 80152ac:	da19      	bge.n	80152e2 <prvProcessReceivedCommands+0x42>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 80152ae:	1d3b      	adds	r3, r7, #4
 80152b0:	3304      	adds	r3, #4
 80152b2:	62fb      	str	r3, [r7, #44]	@ 0x2c

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 80152b4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80152b6:	2b00      	cmp	r3, #0
 80152b8:	d10b      	bne.n	80152d2 <prvProcessReceivedCommands+0x32>
	__asm volatile
 80152ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80152be:	f383 8811 	msr	BASEPRI, r3
 80152c2:	f3bf 8f6f 	isb	sy
 80152c6:	f3bf 8f4f 	dsb	sy
 80152ca:	61fb      	str	r3, [r7, #28]
}
 80152cc:	bf00      	nop
 80152ce:	bf00      	nop
 80152d0:	e7fd      	b.n	80152ce <prvProcessReceivedCommands+0x2e>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 80152d2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80152d4:	681b      	ldr	r3, [r3, #0]
 80152d6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80152d8:	6850      	ldr	r0, [r2, #4]
 80152da:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80152dc:	6892      	ldr	r2, [r2, #8]
 80152de:	4611      	mov	r1, r2
 80152e0:	4798      	blx	r3
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 80152e2:	687b      	ldr	r3, [r7, #4]
 80152e4:	2b00      	cmp	r3, #0
 80152e6:	f2c0 80ae 	blt.w	8015446 <prvProcessReceivedCommands+0x1a6>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 80152ea:	68fb      	ldr	r3, [r7, #12]
 80152ec:	62bb      	str	r3, [r7, #40]	@ 0x28

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 80152ee:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80152f0:	695b      	ldr	r3, [r3, #20]
 80152f2:	2b00      	cmp	r3, #0
 80152f4:	d004      	beq.n	8015300 <prvProcessReceivedCommands+0x60>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80152f6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80152f8:	3304      	adds	r3, #4
 80152fa:	4618      	mov	r0, r3
 80152fc:	f7fc fdc0 	bl	8011e80 <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8015300:	463b      	mov	r3, r7
 8015302:	4618      	mov	r0, r3
 8015304:	f7ff ff6a 	bl	80151dc <prvSampleTimeNow>
 8015308:	6278      	str	r0, [r7, #36]	@ 0x24

			switch( xMessage.xMessageID )
 801530a:	687b      	ldr	r3, [r7, #4]
 801530c:	2b09      	cmp	r3, #9
 801530e:	f200 8097 	bhi.w	8015440 <prvProcessReceivedCommands+0x1a0>
 8015312:	a201      	add	r2, pc, #4	@ (adr r2, 8015318 <prvProcessReceivedCommands+0x78>)
 8015314:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8015318:	08015341 	.word	0x08015341
 801531c:	08015341 	.word	0x08015341
 8015320:	08015341 	.word	0x08015341
 8015324:	080153b7 	.word	0x080153b7
 8015328:	080153cb 	.word	0x080153cb
 801532c:	08015417 	.word	0x08015417
 8015330:	08015341 	.word	0x08015341
 8015334:	08015341 	.word	0x08015341
 8015338:	080153b7 	.word	0x080153b7
 801533c:	080153cb 	.word	0x080153cb
				case tmrCOMMAND_START_FROM_ISR :
				case tmrCOMMAND_RESET :
				case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8015340:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015342:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015346:	f043 0301 	orr.w	r3, r3, #1
 801534a:	b2da      	uxtb	r2, r3
 801534c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801534e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 8015352:	68ba      	ldr	r2, [r7, #8]
 8015354:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015356:	699b      	ldr	r3, [r3, #24]
 8015358:	18d1      	adds	r1, r2, r3
 801535a:	68bb      	ldr	r3, [r7, #8]
 801535c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801535e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015360:	f7ff ff5c 	bl	801521c <prvInsertTimerInActiveList>
 8015364:	4603      	mov	r3, r0
 8015366:	2b00      	cmp	r3, #0
 8015368:	d06c      	beq.n	8015444 <prvProcessReceivedCommands+0x1a4>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 801536a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801536c:	6a1b      	ldr	r3, [r3, #32]
 801536e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015370:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8015372:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015374:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015378:	f003 0304 	and.w	r3, r3, #4
 801537c:	2b00      	cmp	r3, #0
 801537e:	d061      	beq.n	8015444 <prvProcessReceivedCommands+0x1a4>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 8015380:	68ba      	ldr	r2, [r7, #8]
 8015382:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015384:	699b      	ldr	r3, [r3, #24]
 8015386:	441a      	add	r2, r3
 8015388:	2300      	movs	r3, #0
 801538a:	9300      	str	r3, [sp, #0]
 801538c:	2300      	movs	r3, #0
 801538e:	2100      	movs	r1, #0
 8015390:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015392:	f7ff fe01 	bl	8014f98 <xTimerGenericCommand>
 8015396:	6238      	str	r0, [r7, #32]
							configASSERT( xResult );
 8015398:	6a3b      	ldr	r3, [r7, #32]
 801539a:	2b00      	cmp	r3, #0
 801539c:	d152      	bne.n	8015444 <prvProcessReceivedCommands+0x1a4>
	__asm volatile
 801539e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80153a2:	f383 8811 	msr	BASEPRI, r3
 80153a6:	f3bf 8f6f 	isb	sy
 80153aa:	f3bf 8f4f 	dsb	sy
 80153ae:	61bb      	str	r3, [r7, #24]
}
 80153b0:	bf00      	nop
 80153b2:	bf00      	nop
 80153b4:	e7fd      	b.n	80153b2 <prvProcessReceivedCommands+0x112>
					break;

				case tmrCOMMAND_STOP :
				case tmrCOMMAND_STOP_FROM_ISR :
					/* The timer has already been removed from the active list. */
					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80153b6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153b8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80153bc:	f023 0301 	bic.w	r3, r3, #1
 80153c0:	b2da      	uxtb	r2, r3
 80153c2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153c4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 80153c8:	e03d      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 80153ca:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153cc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80153d0:	f043 0301 	orr.w	r3, r3, #1
 80153d4:	b2da      	uxtb	r2, r3
 80153d6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153d8:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 80153dc:	68ba      	ldr	r2, [r7, #8]
 80153de:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153e0:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 80153e2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80153e4:	699b      	ldr	r3, [r3, #24]
 80153e6:	2b00      	cmp	r3, #0
 80153e8:	d10b      	bne.n	8015402 <prvProcessReceivedCommands+0x162>
	__asm volatile
 80153ea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80153ee:	f383 8811 	msr	BASEPRI, r3
 80153f2:	f3bf 8f6f 	isb	sy
 80153f6:	f3bf 8f4f 	dsb	sy
 80153fa:	617b      	str	r3, [r7, #20]
}
 80153fc:	bf00      	nop
 80153fe:	bf00      	nop
 8015400:	e7fd      	b.n	80153fe <prvProcessReceivedCommands+0x15e>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 8015402:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015404:	699a      	ldr	r2, [r3, #24]
 8015406:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015408:	18d1      	adds	r1, r2, r3
 801540a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801540c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801540e:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015410:	f7ff ff04 	bl	801521c <prvInsertTimerInActiveList>
					break;
 8015414:	e017      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>
					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
					{
						/* The timer has already been removed from the active list,
						just free up the memory if the memory was dynamically
						allocated. */
						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 8015416:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015418:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801541c:	f003 0302 	and.w	r3, r3, #2
 8015420:	2b00      	cmp	r3, #0
 8015422:	d103      	bne.n	801542c <prvProcessReceivedCommands+0x18c>
						{
							vPortFree( pxTimer );
 8015424:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015426:	f000 fc37 	bl	8015c98 <vPortFree>
						no need to free the memory - just mark the timer as
						"not active". */
						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 801542a:	e00c      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>
							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 801542c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801542e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015432:	f023 0301 	bic.w	r3, r3, #1
 8015436:	b2da      	uxtb	r2, r3
 8015438:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801543a:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 801543e:	e002      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>

				default	:
					/* Don't expect to get here. */
					break;
 8015440:	bf00      	nop
 8015442:	e000      	b.n	8015446 <prvProcessReceivedCommands+0x1a6>
					break;
 8015444:	bf00      	nop
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 8015446:	4b08      	ldr	r3, [pc, #32]	@ (8015468 <prvProcessReceivedCommands+0x1c8>)
 8015448:	681b      	ldr	r3, [r3, #0]
 801544a:	1d39      	adds	r1, r7, #4
 801544c:	2200      	movs	r2, #0
 801544e:	4618      	mov	r0, r3
 8015450:	f7fd f9dc 	bl	801280c <xQueueReceive>
 8015454:	4603      	mov	r3, r0
 8015456:	2b00      	cmp	r3, #0
 8015458:	f47f af26 	bne.w	80152a8 <prvProcessReceivedCommands+0x8>
			}
		}
	}
}
 801545c:	bf00      	nop
 801545e:	bf00      	nop
 8015460:	3730      	adds	r7, #48	@ 0x30
 8015462:	46bd      	mov	sp, r7
 8015464:	bd80      	pop	{r7, pc}
 8015466:	bf00      	nop
 8015468:	240042a0 	.word	0x240042a0

0801546c <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 801546c:	b580      	push	{r7, lr}
 801546e:	b088      	sub	sp, #32
 8015470:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8015472:	e049      	b.n	8015508 <prvSwitchTimerLists+0x9c>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8015474:	4b2e      	ldr	r3, [pc, #184]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 8015476:	681b      	ldr	r3, [r3, #0]
 8015478:	68db      	ldr	r3, [r3, #12]
 801547a:	681b      	ldr	r3, [r3, #0]
 801547c:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801547e:	4b2c      	ldr	r3, [pc, #176]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 8015480:	681b      	ldr	r3, [r3, #0]
 8015482:	68db      	ldr	r3, [r3, #12]
 8015484:	68db      	ldr	r3, [r3, #12]
 8015486:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 8015488:	68fb      	ldr	r3, [r7, #12]
 801548a:	3304      	adds	r3, #4
 801548c:	4618      	mov	r0, r3
 801548e:	f7fc fcf7 	bl	8011e80 <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8015492:	68fb      	ldr	r3, [r7, #12]
 8015494:	6a1b      	ldr	r3, [r3, #32]
 8015496:	68f8      	ldr	r0, [r7, #12]
 8015498:	4798      	blx	r3

		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 801549a:	68fb      	ldr	r3, [r7, #12]
 801549c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80154a0:	f003 0304 	and.w	r3, r3, #4
 80154a4:	2b00      	cmp	r3, #0
 80154a6:	d02f      	beq.n	8015508 <prvSwitchTimerLists+0x9c>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 80154a8:	68fb      	ldr	r3, [r7, #12]
 80154aa:	699b      	ldr	r3, [r3, #24]
 80154ac:	693a      	ldr	r2, [r7, #16]
 80154ae:	4413      	add	r3, r2
 80154b0:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 80154b2:	68ba      	ldr	r2, [r7, #8]
 80154b4:	693b      	ldr	r3, [r7, #16]
 80154b6:	429a      	cmp	r2, r3
 80154b8:	d90e      	bls.n	80154d8 <prvSwitchTimerLists+0x6c>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 80154ba:	68fb      	ldr	r3, [r7, #12]
 80154bc:	68ba      	ldr	r2, [r7, #8]
 80154be:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 80154c0:	68fb      	ldr	r3, [r7, #12]
 80154c2:	68fa      	ldr	r2, [r7, #12]
 80154c4:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 80154c6:	4b1a      	ldr	r3, [pc, #104]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 80154c8:	681a      	ldr	r2, [r3, #0]
 80154ca:	68fb      	ldr	r3, [r7, #12]
 80154cc:	3304      	adds	r3, #4
 80154ce:	4619      	mov	r1, r3
 80154d0:	4610      	mov	r0, r2
 80154d2:	f7fc fc9c 	bl	8011e0e <vListInsert>
 80154d6:	e017      	b.n	8015508 <prvSwitchTimerLists+0x9c>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 80154d8:	2300      	movs	r3, #0
 80154da:	9300      	str	r3, [sp, #0]
 80154dc:	2300      	movs	r3, #0
 80154de:	693a      	ldr	r2, [r7, #16]
 80154e0:	2100      	movs	r1, #0
 80154e2:	68f8      	ldr	r0, [r7, #12]
 80154e4:	f7ff fd58 	bl	8014f98 <xTimerGenericCommand>
 80154e8:	6078      	str	r0, [r7, #4]
				configASSERT( xResult );
 80154ea:	687b      	ldr	r3, [r7, #4]
 80154ec:	2b00      	cmp	r3, #0
 80154ee:	d10b      	bne.n	8015508 <prvSwitchTimerLists+0x9c>
	__asm volatile
 80154f0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80154f4:	f383 8811 	msr	BASEPRI, r3
 80154f8:	f3bf 8f6f 	isb	sy
 80154fc:	f3bf 8f4f 	dsb	sy
 8015500:	603b      	str	r3, [r7, #0]
}
 8015502:	bf00      	nop
 8015504:	bf00      	nop
 8015506:	e7fd      	b.n	8015504 <prvSwitchTimerLists+0x98>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8015508:	4b09      	ldr	r3, [pc, #36]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 801550a:	681b      	ldr	r3, [r3, #0]
 801550c:	681b      	ldr	r3, [r3, #0]
 801550e:	2b00      	cmp	r3, #0
 8015510:	d1b0      	bne.n	8015474 <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 8015512:	4b07      	ldr	r3, [pc, #28]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 8015514:	681b      	ldr	r3, [r3, #0]
 8015516:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 8015518:	4b06      	ldr	r3, [pc, #24]	@ (8015534 <prvSwitchTimerLists+0xc8>)
 801551a:	681b      	ldr	r3, [r3, #0]
 801551c:	4a04      	ldr	r2, [pc, #16]	@ (8015530 <prvSwitchTimerLists+0xc4>)
 801551e:	6013      	str	r3, [r2, #0]
	pxOverflowTimerList = pxTemp;
 8015520:	4a04      	ldr	r2, [pc, #16]	@ (8015534 <prvSwitchTimerLists+0xc8>)
 8015522:	697b      	ldr	r3, [r7, #20]
 8015524:	6013      	str	r3, [r2, #0]
}
 8015526:	bf00      	nop
 8015528:	3718      	adds	r7, #24
 801552a:	46bd      	mov	sp, r7
 801552c:	bd80      	pop	{r7, pc}
 801552e:	bf00      	nop
 8015530:	24004298 	.word	0x24004298
 8015534:	2400429c 	.word	0x2400429c

08015538 <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 8015538:	b580      	push	{r7, lr}
 801553a:	b082      	sub	sp, #8
 801553c:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 801553e:	f000 f9bb 	bl	80158b8 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 8015542:	4b15      	ldr	r3, [pc, #84]	@ (8015598 <prvCheckForValidListAndQueue+0x60>)
 8015544:	681b      	ldr	r3, [r3, #0]
 8015546:	2b00      	cmp	r3, #0
 8015548:	d120      	bne.n	801558c <prvCheckForValidListAndQueue+0x54>
		{
			vListInitialise( &xActiveTimerList1 );
 801554a:	4814      	ldr	r0, [pc, #80]	@ (801559c <prvCheckForValidListAndQueue+0x64>)
 801554c:	f7fc fc0e 	bl	8011d6c <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 8015550:	4813      	ldr	r0, [pc, #76]	@ (80155a0 <prvCheckForValidListAndQueue+0x68>)
 8015552:	f7fc fc0b 	bl	8011d6c <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 8015556:	4b13      	ldr	r3, [pc, #76]	@ (80155a4 <prvCheckForValidListAndQueue+0x6c>)
 8015558:	4a10      	ldr	r2, [pc, #64]	@ (801559c <prvCheckForValidListAndQueue+0x64>)
 801555a:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 801555c:	4b12      	ldr	r3, [pc, #72]	@ (80155a8 <prvCheckForValidListAndQueue+0x70>)
 801555e:	4a10      	ldr	r2, [pc, #64]	@ (80155a0 <prvCheckForValidListAndQueue+0x68>)
 8015560:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 8015562:	2300      	movs	r3, #0
 8015564:	9300      	str	r3, [sp, #0]
 8015566:	4b11      	ldr	r3, [pc, #68]	@ (80155ac <prvCheckForValidListAndQueue+0x74>)
 8015568:	4a11      	ldr	r2, [pc, #68]	@ (80155b0 <prvCheckForValidListAndQueue+0x78>)
 801556a:	2110      	movs	r1, #16
 801556c:	200a      	movs	r0, #10
 801556e:	f7fc fd1b 	bl	8011fa8 <xQueueGenericCreateStatic>
 8015572:	4603      	mov	r3, r0
 8015574:	4a08      	ldr	r2, [pc, #32]	@ (8015598 <prvCheckForValidListAndQueue+0x60>)
 8015576:	6013      	str	r3, [r2, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 8015578:	4b07      	ldr	r3, [pc, #28]	@ (8015598 <prvCheckForValidListAndQueue+0x60>)
 801557a:	681b      	ldr	r3, [r3, #0]
 801557c:	2b00      	cmp	r3, #0
 801557e:	d005      	beq.n	801558c <prvCheckForValidListAndQueue+0x54>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 8015580:	4b05      	ldr	r3, [pc, #20]	@ (8015598 <prvCheckForValidListAndQueue+0x60>)
 8015582:	681b      	ldr	r3, [r3, #0]
 8015584:	490b      	ldr	r1, [pc, #44]	@ (80155b4 <prvCheckForValidListAndQueue+0x7c>)
 8015586:	4618      	mov	r0, r3
 8015588:	f7fd fd3e 	bl	8013008 <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 801558c:	f000 f9c6 	bl	801591c <vPortExitCritical>
}
 8015590:	bf00      	nop
 8015592:	46bd      	mov	sp, r7
 8015594:	bd80      	pop	{r7, pc}
 8015596:	bf00      	nop
 8015598:	240042a0 	.word	0x240042a0
 801559c:	24004270 	.word	0x24004270
 80155a0:	24004284 	.word	0x24004284
 80155a4:	24004298 	.word	0x24004298
 80155a8:	2400429c 	.word	0x2400429c
 80155ac:	2400434c 	.word	0x2400434c
 80155b0:	240042ac 	.word	0x240042ac
 80155b4:	0802da60 	.word	0x0802da60

080155b8 <xTimerIsTimerActive>:
/*-----------------------------------------------------------*/

BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
{
 80155b8:	b580      	push	{r7, lr}
 80155ba:	b086      	sub	sp, #24
 80155bc:	af00      	add	r7, sp, #0
 80155be:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;
Timer_t *pxTimer = xTimer;
 80155c0:	687b      	ldr	r3, [r7, #4]
 80155c2:	613b      	str	r3, [r7, #16]

	configASSERT( xTimer );
 80155c4:	687b      	ldr	r3, [r7, #4]
 80155c6:	2b00      	cmp	r3, #0
 80155c8:	d10b      	bne.n	80155e2 <xTimerIsTimerActive+0x2a>
	__asm volatile
 80155ca:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80155ce:	f383 8811 	msr	BASEPRI, r3
 80155d2:	f3bf 8f6f 	isb	sy
 80155d6:	f3bf 8f4f 	dsb	sy
 80155da:	60fb      	str	r3, [r7, #12]
}
 80155dc:	bf00      	nop
 80155de:	bf00      	nop
 80155e0:	e7fd      	b.n	80155de <xTimerIsTimerActive+0x26>

	/* Is the timer in the list of active timers? */
	taskENTER_CRITICAL();
 80155e2:	f000 f969 	bl	80158b8 <vPortEnterCritical>
	{
		if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
 80155e6:	693b      	ldr	r3, [r7, #16]
 80155e8:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80155ec:	f003 0301 	and.w	r3, r3, #1
 80155f0:	2b00      	cmp	r3, #0
 80155f2:	d102      	bne.n	80155fa <xTimerIsTimerActive+0x42>
		{
			xReturn = pdFALSE;
 80155f4:	2300      	movs	r3, #0
 80155f6:	617b      	str	r3, [r7, #20]
 80155f8:	e001      	b.n	80155fe <xTimerIsTimerActive+0x46>
		}
		else
		{
			xReturn = pdTRUE;
 80155fa:	2301      	movs	r3, #1
 80155fc:	617b      	str	r3, [r7, #20]
		}
	}
	taskEXIT_CRITICAL();
 80155fe:	f000 f98d 	bl	801591c <vPortExitCritical>

	return xReturn;
 8015602:	697b      	ldr	r3, [r7, #20]
} /*lint !e818 Can't be pointer to const due to the typedef. */
 8015604:	4618      	mov	r0, r3
 8015606:	3718      	adds	r7, #24
 8015608:	46bd      	mov	sp, r7
 801560a:	bd80      	pop	{r7, pc}

0801560c <pvTimerGetTimerID>:
/*-----------------------------------------------------------*/

void *pvTimerGetTimerID( const TimerHandle_t xTimer )
{
 801560c:	b580      	push	{r7, lr}
 801560e:	b086      	sub	sp, #24
 8015610:	af00      	add	r7, sp, #0
 8015612:	6078      	str	r0, [r7, #4]
Timer_t * const pxTimer = xTimer;
 8015614:	687b      	ldr	r3, [r7, #4]
 8015616:	617b      	str	r3, [r7, #20]
void *pvReturn;

	configASSERT( xTimer );
 8015618:	687b      	ldr	r3, [r7, #4]
 801561a:	2b00      	cmp	r3, #0
 801561c:	d10b      	bne.n	8015636 <pvTimerGetTimerID+0x2a>
	__asm volatile
 801561e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015622:	f383 8811 	msr	BASEPRI, r3
 8015626:	f3bf 8f6f 	isb	sy
 801562a:	f3bf 8f4f 	dsb	sy
 801562e:	60fb      	str	r3, [r7, #12]
}
 8015630:	bf00      	nop
 8015632:	bf00      	nop
 8015634:	e7fd      	b.n	8015632 <pvTimerGetTimerID+0x26>

	taskENTER_CRITICAL();
 8015636:	f000 f93f 	bl	80158b8 <vPortEnterCritical>
	{
		pvReturn = pxTimer->pvTimerID;
 801563a:	697b      	ldr	r3, [r7, #20]
 801563c:	69db      	ldr	r3, [r3, #28]
 801563e:	613b      	str	r3, [r7, #16]
	}
	taskEXIT_CRITICAL();
 8015640:	f000 f96c 	bl	801591c <vPortExitCritical>

	return pvReturn;
 8015644:	693b      	ldr	r3, [r7, #16]
}
 8015646:	4618      	mov	r0, r3
 8015648:	3718      	adds	r7, #24
 801564a:	46bd      	mov	sp, r7
 801564c:	bd80      	pop	{r7, pc}
	...

08015650 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 8015650:	b480      	push	{r7}
 8015652:	b085      	sub	sp, #20
 8015654:	af00      	add	r7, sp, #0
 8015656:	60f8      	str	r0, [r7, #12]
 8015658:	60b9      	str	r1, [r7, #8]
 801565a:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */

	/* Offset added to account for the way the MCU uses the stack on entry/exit
	of interrupts, and to ensure alignment. */
	pxTopOfStack--;
 801565c:	68fb      	ldr	r3, [r7, #12]
 801565e:	3b04      	subs	r3, #4
 8015660:	60fb      	str	r3, [r7, #12]

	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 8015662:	68fb      	ldr	r3, [r7, #12]
 8015664:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
 8015668:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801566a:	68fb      	ldr	r3, [r7, #12]
 801566c:	3b04      	subs	r3, #4
 801566e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
 8015670:	68bb      	ldr	r3, [r7, #8]
 8015672:	f023 0201 	bic.w	r2, r3, #1
 8015676:	68fb      	ldr	r3, [r7, #12]
 8015678:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801567a:	68fb      	ldr	r3, [r7, #12]
 801567c:	3b04      	subs	r3, #4
 801567e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 8015680:	4a0c      	ldr	r2, [pc, #48]	@ (80156b4 <pxPortInitialiseStack+0x64>)
 8015682:	68fb      	ldr	r3, [r7, #12]
 8015684:	601a      	str	r2, [r3, #0]

	/* Save code space by skipping register initialisation. */
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 8015686:	68fb      	ldr	r3, [r7, #12]
 8015688:	3b14      	subs	r3, #20
 801568a:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 801568c:	687a      	ldr	r2, [r7, #4]
 801568e:	68fb      	ldr	r3, [r7, #12]
 8015690:	601a      	str	r2, [r3, #0]

	/* A save method is being used that requires each task to maintain its
	own exec return value. */
	pxTopOfStack--;
 8015692:	68fb      	ldr	r3, [r7, #12]
 8015694:	3b04      	subs	r3, #4
 8015696:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_EXC_RETURN;
 8015698:	68fb      	ldr	r3, [r7, #12]
 801569a:	f06f 0202 	mvn.w	r2, #2
 801569e:	601a      	str	r2, [r3, #0]

	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
 80156a0:	68fb      	ldr	r3, [r7, #12]
 80156a2:	3b20      	subs	r3, #32
 80156a4:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 80156a6:	68fb      	ldr	r3, [r7, #12]
}
 80156a8:	4618      	mov	r0, r3
 80156aa:	3714      	adds	r7, #20
 80156ac:	46bd      	mov	sp, r7
 80156ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80156b2:	4770      	bx	lr
 80156b4:	080156b9 	.word	0x080156b9

080156b8 <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 80156b8:	b480      	push	{r7}
 80156ba:	b085      	sub	sp, #20
 80156bc:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0;
 80156be:	2300      	movs	r3, #0
 80156c0:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 80156c2:	4b13      	ldr	r3, [pc, #76]	@ (8015710 <prvTaskExitError+0x58>)
 80156c4:	681b      	ldr	r3, [r3, #0]
 80156c6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80156ca:	d00b      	beq.n	80156e4 <prvTaskExitError+0x2c>
	__asm volatile
 80156cc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80156d0:	f383 8811 	msr	BASEPRI, r3
 80156d4:	f3bf 8f6f 	isb	sy
 80156d8:	f3bf 8f4f 	dsb	sy
 80156dc:	60fb      	str	r3, [r7, #12]
}
 80156de:	bf00      	nop
 80156e0:	bf00      	nop
 80156e2:	e7fd      	b.n	80156e0 <prvTaskExitError+0x28>
	__asm volatile
 80156e4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80156e8:	f383 8811 	msr	BASEPRI, r3
 80156ec:	f3bf 8f6f 	isb	sy
 80156f0:	f3bf 8f4f 	dsb	sy
 80156f4:	60bb      	str	r3, [r7, #8]
}
 80156f6:	bf00      	nop
	portDISABLE_INTERRUPTS();
	while( ulDummy == 0 )
 80156f8:	bf00      	nop
 80156fa:	687b      	ldr	r3, [r7, #4]
 80156fc:	2b00      	cmp	r3, #0
 80156fe:	d0fc      	beq.n	80156fa <prvTaskExitError+0x42>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 8015700:	bf00      	nop
 8015702:	bf00      	nop
 8015704:	3714      	adds	r7, #20
 8015706:	46bd      	mov	sp, r7
 8015708:	f85d 7b04 	ldr.w	r7, [sp], #4
 801570c:	4770      	bx	lr
 801570e:	bf00      	nop
 8015710:	24000048 	.word	0x24000048
	...

08015720 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
	__asm volatile (
 8015720:	4b07      	ldr	r3, [pc, #28]	@ (8015740 <pxCurrentTCBConst2>)
 8015722:	6819      	ldr	r1, [r3, #0]
 8015724:	6808      	ldr	r0, [r1, #0]
 8015726:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 801572a:	f380 8809 	msr	PSP, r0
 801572e:	f3bf 8f6f 	isb	sy
 8015732:	f04f 0000 	mov.w	r0, #0
 8015736:	f380 8811 	msr	BASEPRI, r0
 801573a:	4770      	bx	lr
 801573c:	f3af 8000 	nop.w

08015740 <pxCurrentTCBConst2>:
 8015740:	24003d70 	.word	0x24003d70
					"	bx r14							\n"
					"									\n"
					"	.align 4						\n"
					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
				);
}
 8015744:	bf00      	nop
 8015746:	bf00      	nop

08015748 <prvPortStartFirstTask>:
{
	/* Start the first task.  This also clears the bit that indicates the FPU is
	in use in case the FPU was used before the scheduler was started - which
	would otherwise result in the unnecessary leaving of space in the SVC stack
	for lazy saving of FPU registers. */
	__asm volatile(
 8015748:	4808      	ldr	r0, [pc, #32]	@ (801576c <prvPortStartFirstTask+0x24>)
 801574a:	6800      	ldr	r0, [r0, #0]
 801574c:	6800      	ldr	r0, [r0, #0]
 801574e:	f380 8808 	msr	MSP, r0
 8015752:	f04f 0000 	mov.w	r0, #0
 8015756:	f380 8814 	msr	CONTROL, r0
 801575a:	b662      	cpsie	i
 801575c:	b661      	cpsie	f
 801575e:	f3bf 8f4f 	dsb	sy
 8015762:	f3bf 8f6f 	isb	sy
 8015766:	df00      	svc	0
 8015768:	bf00      	nop
					" dsb					\n"
					" isb					\n"
					" svc 0					\n" /* System call to start first task. */
					" nop					\n"
				);
}
 801576a:	bf00      	nop
 801576c:	e000ed08 	.word	0xe000ed08

08015770 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 8015770:	b580      	push	{r7, lr}
 8015772:	b086      	sub	sp, #24
 8015774:	af00      	add	r7, sp, #0
	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* This port can be used on all revisions of the Cortex-M7 core other than
	the r0p1 parts.  r0p1 parts should use the port from the
	/source/portable/GCC/ARM_CM7/r0p1 directory. */
	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 8015776:	4b47      	ldr	r3, [pc, #284]	@ (8015894 <xPortStartScheduler+0x124>)
 8015778:	681b      	ldr	r3, [r3, #0]
 801577a:	4a47      	ldr	r2, [pc, #284]	@ (8015898 <xPortStartScheduler+0x128>)
 801577c:	4293      	cmp	r3, r2
 801577e:	d10b      	bne.n	8015798 <xPortStartScheduler+0x28>
	__asm volatile
 8015780:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015784:	f383 8811 	msr	BASEPRI, r3
 8015788:	f3bf 8f6f 	isb	sy
 801578c:	f3bf 8f4f 	dsb	sy
 8015790:	613b      	str	r3, [r7, #16]
}
 8015792:	bf00      	nop
 8015794:	bf00      	nop
 8015796:	e7fd      	b.n	8015794 <xPortStartScheduler+0x24>
	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 8015798:	4b3e      	ldr	r3, [pc, #248]	@ (8015894 <xPortStartScheduler+0x124>)
 801579a:	681b      	ldr	r3, [r3, #0]
 801579c:	4a3f      	ldr	r2, [pc, #252]	@ (801589c <xPortStartScheduler+0x12c>)
 801579e:	4293      	cmp	r3, r2
 80157a0:	d10b      	bne.n	80157ba <xPortStartScheduler+0x4a>
	__asm volatile
 80157a2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80157a6:	f383 8811 	msr	BASEPRI, r3
 80157aa:	f3bf 8f6f 	isb	sy
 80157ae:	f3bf 8f4f 	dsb	sy
 80157b2:	60fb      	str	r3, [r7, #12]
}
 80157b4:	bf00      	nop
 80157b6:	bf00      	nop
 80157b8:	e7fd      	b.n	80157b6 <xPortStartScheduler+0x46>

	#if( configASSERT_DEFINED == 1 )
	{
		volatile uint32_t ulOriginalPriority;
		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 80157ba:	4b39      	ldr	r3, [pc, #228]	@ (80158a0 <xPortStartScheduler+0x130>)
 80157bc:	617b      	str	r3, [r7, #20]
		functions can be called.  ISR safe functions are those that end in
		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
		ensure interrupt entry is as fast and simple as possible.

		Save the interrupt priority value that is about to be clobbered. */
		ulOriginalPriority = *pucFirstUserPriorityRegister;
 80157be:	697b      	ldr	r3, [r7, #20]
 80157c0:	781b      	ldrb	r3, [r3, #0]
 80157c2:	b2db      	uxtb	r3, r3
 80157c4:	607b      	str	r3, [r7, #4]

		/* Determine the number of priority bits available.  First write to all
		possible bits. */
		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 80157c6:	697b      	ldr	r3, [r7, #20]
 80157c8:	22ff      	movs	r2, #255	@ 0xff
 80157ca:	701a      	strb	r2, [r3, #0]

		/* Read the value back to see how many bits stuck. */
		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 80157cc:	697b      	ldr	r3, [r7, #20]
 80157ce:	781b      	ldrb	r3, [r3, #0]
 80157d0:	b2db      	uxtb	r3, r3
 80157d2:	70fb      	strb	r3, [r7, #3]

		/* Use the same mask on the maximum system call priority. */
		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 80157d4:	78fb      	ldrb	r3, [r7, #3]
 80157d6:	b2db      	uxtb	r3, r3
 80157d8:	f003 0350 	and.w	r3, r3, #80	@ 0x50
 80157dc:	b2da      	uxtb	r2, r3
 80157de:	4b31      	ldr	r3, [pc, #196]	@ (80158a4 <xPortStartScheduler+0x134>)
 80157e0:	701a      	strb	r2, [r3, #0]

		/* Calculate the maximum acceptable priority group value for the number
		of bits read back. */
		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 80157e2:	4b31      	ldr	r3, [pc, #196]	@ (80158a8 <xPortStartScheduler+0x138>)
 80157e4:	2207      	movs	r2, #7
 80157e6:	601a      	str	r2, [r3, #0]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 80157e8:	e009      	b.n	80157fe <xPortStartScheduler+0x8e>
		{
			ulMaxPRIGROUPValue--;
 80157ea:	4b2f      	ldr	r3, [pc, #188]	@ (80158a8 <xPortStartScheduler+0x138>)
 80157ec:	681b      	ldr	r3, [r3, #0]
 80157ee:	3b01      	subs	r3, #1
 80157f0:	4a2d      	ldr	r2, [pc, #180]	@ (80158a8 <xPortStartScheduler+0x138>)
 80157f2:	6013      	str	r3, [r2, #0]
			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 80157f4:	78fb      	ldrb	r3, [r7, #3]
 80157f6:	b2db      	uxtb	r3, r3
 80157f8:	005b      	lsls	r3, r3, #1
 80157fa:	b2db      	uxtb	r3, r3
 80157fc:	70fb      	strb	r3, [r7, #3]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 80157fe:	78fb      	ldrb	r3, [r7, #3]
 8015800:	b2db      	uxtb	r3, r3
 8015802:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8015806:	2b80      	cmp	r3, #128	@ 0x80
 8015808:	d0ef      	beq.n	80157ea <xPortStartScheduler+0x7a>
		#ifdef configPRIO_BITS
		{
			/* Check the FreeRTOS configuration that defines the number of
			priority bits matches the number of priority bits actually queried
			from the hardware. */
			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 801580a:	4b27      	ldr	r3, [pc, #156]	@ (80158a8 <xPortStartScheduler+0x138>)
 801580c:	681b      	ldr	r3, [r3, #0]
 801580e:	f1c3 0307 	rsb	r3, r3, #7
 8015812:	2b04      	cmp	r3, #4
 8015814:	d00b      	beq.n	801582e <xPortStartScheduler+0xbe>
	__asm volatile
 8015816:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801581a:	f383 8811 	msr	BASEPRI, r3
 801581e:	f3bf 8f6f 	isb	sy
 8015822:	f3bf 8f4f 	dsb	sy
 8015826:	60bb      	str	r3, [r7, #8]
}
 8015828:	bf00      	nop
 801582a:	bf00      	nop
 801582c:	e7fd      	b.n	801582a <xPortStartScheduler+0xba>
		}
		#endif

		/* Shift the priority group value back to its position within the AIRCR
		register. */
		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 801582e:	4b1e      	ldr	r3, [pc, #120]	@ (80158a8 <xPortStartScheduler+0x138>)
 8015830:	681b      	ldr	r3, [r3, #0]
 8015832:	021b      	lsls	r3, r3, #8
 8015834:	4a1c      	ldr	r2, [pc, #112]	@ (80158a8 <xPortStartScheduler+0x138>)
 8015836:	6013      	str	r3, [r2, #0]
		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 8015838:	4b1b      	ldr	r3, [pc, #108]	@ (80158a8 <xPortStartScheduler+0x138>)
 801583a:	681b      	ldr	r3, [r3, #0]
 801583c:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 8015840:	4a19      	ldr	r2, [pc, #100]	@ (80158a8 <xPortStartScheduler+0x138>)
 8015842:	6013      	str	r3, [r2, #0]

		/* Restore the clobbered interrupt priority register to its original
		value. */
		*pucFirstUserPriorityRegister = ulOriginalPriority;
 8015844:	687b      	ldr	r3, [r7, #4]
 8015846:	b2da      	uxtb	r2, r3
 8015848:	697b      	ldr	r3, [r7, #20]
 801584a:	701a      	strb	r2, [r3, #0]
	}
	#endif /* conifgASSERT_DEFINED */

	/* Make PendSV and SysTick the lowest priority interrupts. */
	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
 801584c:	4b17      	ldr	r3, [pc, #92]	@ (80158ac <xPortStartScheduler+0x13c>)
 801584e:	681b      	ldr	r3, [r3, #0]
 8015850:	4a16      	ldr	r2, [pc, #88]	@ (80158ac <xPortStartScheduler+0x13c>)
 8015852:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8015856:	6013      	str	r3, [r2, #0]
	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 8015858:	4b14      	ldr	r3, [pc, #80]	@ (80158ac <xPortStartScheduler+0x13c>)
 801585a:	681b      	ldr	r3, [r3, #0]
 801585c:	4a13      	ldr	r2, [pc, #76]	@ (80158ac <xPortStartScheduler+0x13c>)
 801585e:	f043 4370 	orr.w	r3, r3, #4026531840	@ 0xf0000000
 8015862:	6013      	str	r3, [r2, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	vPortSetupTimerInterrupt();
 8015864:	f000 f8da 	bl	8015a1c <vPortSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 8015868:	4b11      	ldr	r3, [pc, #68]	@ (80158b0 <xPortStartScheduler+0x140>)
 801586a:	2200      	movs	r2, #0
 801586c:	601a      	str	r2, [r3, #0]

	/* Ensure the VFP is enabled - it should be anyway. */
	vPortEnableVFP();
 801586e:	f000 f8f9 	bl	8015a64 <vPortEnableVFP>

	/* Lazy save always. */
	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 8015872:	4b10      	ldr	r3, [pc, #64]	@ (80158b4 <xPortStartScheduler+0x144>)
 8015874:	681b      	ldr	r3, [r3, #0]
 8015876:	4a0f      	ldr	r2, [pc, #60]	@ (80158b4 <xPortStartScheduler+0x144>)
 8015878:	f043 4340 	orr.w	r3, r3, #3221225472	@ 0xc0000000
 801587c:	6013      	str	r3, [r2, #0]

	/* Start the first task. */
	prvPortStartFirstTask();
 801587e:	f7ff ff63 	bl	8015748 <prvPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 8015882:	f7fe fbcd 	bl	8014020 <vTaskSwitchContext>
	prvTaskExitError();
 8015886:	f7ff ff17 	bl	80156b8 <prvTaskExitError>

	/* Should not get here! */
	return 0;
 801588a:	2300      	movs	r3, #0
}
 801588c:	4618      	mov	r0, r3
 801588e:	3718      	adds	r7, #24
 8015890:	46bd      	mov	sp, r7
 8015892:	bd80      	pop	{r7, pc}
 8015894:	e000ed00 	.word	0xe000ed00
 8015898:	410fc271 	.word	0x410fc271
 801589c:	410fc270 	.word	0x410fc270
 80158a0:	e000e400 	.word	0xe000e400
 80158a4:	2400439c 	.word	0x2400439c
 80158a8:	240043a0 	.word	0x240043a0
 80158ac:	e000ed20 	.word	0xe000ed20
 80158b0:	24000048 	.word	0x24000048
 80158b4:	e000ef34 	.word	0xe000ef34

080158b8 <vPortEnterCritical>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 80158b8:	b480      	push	{r7}
 80158ba:	b083      	sub	sp, #12
 80158bc:	af00      	add	r7, sp, #0
	__asm volatile
 80158be:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80158c2:	f383 8811 	msr	BASEPRI, r3
 80158c6:	f3bf 8f6f 	isb	sy
 80158ca:	f3bf 8f4f 	dsb	sy
 80158ce:	607b      	str	r3, [r7, #4]
}
 80158d0:	bf00      	nop
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
 80158d2:	4b10      	ldr	r3, [pc, #64]	@ (8015914 <vPortEnterCritical+0x5c>)
 80158d4:	681b      	ldr	r3, [r3, #0]
 80158d6:	3301      	adds	r3, #1
 80158d8:	4a0e      	ldr	r2, [pc, #56]	@ (8015914 <vPortEnterCritical+0x5c>)
 80158da:	6013      	str	r3, [r2, #0]
	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( uxCriticalNesting == 1 )
 80158dc:	4b0d      	ldr	r3, [pc, #52]	@ (8015914 <vPortEnterCritical+0x5c>)
 80158de:	681b      	ldr	r3, [r3, #0]
 80158e0:	2b01      	cmp	r3, #1
 80158e2:	d110      	bne.n	8015906 <vPortEnterCritical+0x4e>
	{
		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 80158e4:	4b0c      	ldr	r3, [pc, #48]	@ (8015918 <vPortEnterCritical+0x60>)
 80158e6:	681b      	ldr	r3, [r3, #0]
 80158e8:	b2db      	uxtb	r3, r3
 80158ea:	2b00      	cmp	r3, #0
 80158ec:	d00b      	beq.n	8015906 <vPortEnterCritical+0x4e>
	__asm volatile
 80158ee:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80158f2:	f383 8811 	msr	BASEPRI, r3
 80158f6:	f3bf 8f6f 	isb	sy
 80158fa:	f3bf 8f4f 	dsb	sy
 80158fe:	603b      	str	r3, [r7, #0]
}
 8015900:	bf00      	nop
 8015902:	bf00      	nop
 8015904:	e7fd      	b.n	8015902 <vPortEnterCritical+0x4a>
	}
}
 8015906:	bf00      	nop
 8015908:	370c      	adds	r7, #12
 801590a:	46bd      	mov	sp, r7
 801590c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015910:	4770      	bx	lr
 8015912:	bf00      	nop
 8015914:	24000048 	.word	0x24000048
 8015918:	e000ed04 	.word	0xe000ed04

0801591c <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 801591c:	b480      	push	{r7}
 801591e:	b083      	sub	sp, #12
 8015920:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 8015922:	4b12      	ldr	r3, [pc, #72]	@ (801596c <vPortExitCritical+0x50>)
 8015924:	681b      	ldr	r3, [r3, #0]
 8015926:	2b00      	cmp	r3, #0
 8015928:	d10b      	bne.n	8015942 <vPortExitCritical+0x26>
	__asm volatile
 801592a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801592e:	f383 8811 	msr	BASEPRI, r3
 8015932:	f3bf 8f6f 	isb	sy
 8015936:	f3bf 8f4f 	dsb	sy
 801593a:	607b      	str	r3, [r7, #4]
}
 801593c:	bf00      	nop
 801593e:	bf00      	nop
 8015940:	e7fd      	b.n	801593e <vPortExitCritical+0x22>
	uxCriticalNesting--;
 8015942:	4b0a      	ldr	r3, [pc, #40]	@ (801596c <vPortExitCritical+0x50>)
 8015944:	681b      	ldr	r3, [r3, #0]
 8015946:	3b01      	subs	r3, #1
 8015948:	4a08      	ldr	r2, [pc, #32]	@ (801596c <vPortExitCritical+0x50>)
 801594a:	6013      	str	r3, [r2, #0]
	if( uxCriticalNesting == 0 )
 801594c:	4b07      	ldr	r3, [pc, #28]	@ (801596c <vPortExitCritical+0x50>)
 801594e:	681b      	ldr	r3, [r3, #0]
 8015950:	2b00      	cmp	r3, #0
 8015952:	d105      	bne.n	8015960 <vPortExitCritical+0x44>
 8015954:	2300      	movs	r3, #0
 8015956:	603b      	str	r3, [r7, #0]
	__asm volatile
 8015958:	683b      	ldr	r3, [r7, #0]
 801595a:	f383 8811 	msr	BASEPRI, r3
}
 801595e:	bf00      	nop
	{
		portENABLE_INTERRUPTS();
	}
}
 8015960:	bf00      	nop
 8015962:	370c      	adds	r7, #12
 8015964:	46bd      	mov	sp, r7
 8015966:	f85d 7b04 	ldr.w	r7, [sp], #4
 801596a:	4770      	bx	lr
 801596c:	24000048 	.word	0x24000048

08015970 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 8015970:	f3ef 8009 	mrs	r0, PSP
 8015974:	f3bf 8f6f 	isb	sy
 8015978:	4b15      	ldr	r3, [pc, #84]	@ (80159d0 <pxCurrentTCBConst>)
 801597a:	681a      	ldr	r2, [r3, #0]
 801597c:	f01e 0f10 	tst.w	lr, #16
 8015980:	bf08      	it	eq
 8015982:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
 8015986:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 801598a:	6010      	str	r0, [r2, #0]
 801598c:	e92d 0009 	stmdb	sp!, {r0, r3}
 8015990:	f04f 0050 	mov.w	r0, #80	@ 0x50
 8015994:	f380 8811 	msr	BASEPRI, r0
 8015998:	f3bf 8f4f 	dsb	sy
 801599c:	f3bf 8f6f 	isb	sy
 80159a0:	f7fe fb3e 	bl	8014020 <vTaskSwitchContext>
 80159a4:	f04f 0000 	mov.w	r0, #0
 80159a8:	f380 8811 	msr	BASEPRI, r0
 80159ac:	bc09      	pop	{r0, r3}
 80159ae:	6819      	ldr	r1, [r3, #0]
 80159b0:	6808      	ldr	r0, [r1, #0]
 80159b2:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 80159b6:	f01e 0f10 	tst.w	lr, #16
 80159ba:	bf08      	it	eq
 80159bc:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
 80159c0:	f380 8809 	msr	PSP, r0
 80159c4:	f3bf 8f6f 	isb	sy
 80159c8:	4770      	bx	lr
 80159ca:	bf00      	nop
 80159cc:	f3af 8000 	nop.w

080159d0 <pxCurrentTCBConst>:
 80159d0:	24003d70 	.word	0x24003d70
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
	);
}
 80159d4:	bf00      	nop
 80159d6:	bf00      	nop

080159d8 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 80159d8:	b580      	push	{r7, lr}
 80159da:	b082      	sub	sp, #8
 80159dc:	af00      	add	r7, sp, #0
	__asm volatile
 80159de:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80159e2:	f383 8811 	msr	BASEPRI, r3
 80159e6:	f3bf 8f6f 	isb	sy
 80159ea:	f3bf 8f4f 	dsb	sy
 80159ee:	607b      	str	r3, [r7, #4]
}
 80159f0:	bf00      	nop
	save and then restore the interrupt mask value as its value is already
	known. */
	portDISABLE_INTERRUPTS();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 80159f2:	f7fe fa5b 	bl	8013eac <xTaskIncrementTick>
 80159f6:	4603      	mov	r3, r0
 80159f8:	2b00      	cmp	r3, #0
 80159fa:	d003      	beq.n	8015a04 <xPortSysTickHandler+0x2c>
		{
			/* A context switch is required.  Context switching is performed in
			the PendSV interrupt.  Pend the PendSV interrupt. */
			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 80159fc:	4b06      	ldr	r3, [pc, #24]	@ (8015a18 <xPortSysTickHandler+0x40>)
 80159fe:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8015a02:	601a      	str	r2, [r3, #0]
 8015a04:	2300      	movs	r3, #0
 8015a06:	603b      	str	r3, [r7, #0]
	__asm volatile
 8015a08:	683b      	ldr	r3, [r7, #0]
 8015a0a:	f383 8811 	msr	BASEPRI, r3
}
 8015a0e:	bf00      	nop
		}
	}
	portENABLE_INTERRUPTS();
}
 8015a10:	bf00      	nop
 8015a12:	3708      	adds	r7, #8
 8015a14:	46bd      	mov	sp, r7
 8015a16:	bd80      	pop	{r7, pc}
 8015a18:	e000ed04 	.word	0xe000ed04

08015a1c <vPortSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
 8015a1c:	b480      	push	{r7}
 8015a1e:	af00      	add	r7, sp, #0
		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
	}
	#endif /* configUSE_TICKLESS_IDLE */

	/* Stop and clear the SysTick. */
	portNVIC_SYSTICK_CTRL_REG = 0UL;
 8015a20:	4b0b      	ldr	r3, [pc, #44]	@ (8015a50 <vPortSetupTimerInterrupt+0x34>)
 8015a22:	2200      	movs	r2, #0
 8015a24:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 8015a26:	4b0b      	ldr	r3, [pc, #44]	@ (8015a54 <vPortSetupTimerInterrupt+0x38>)
 8015a28:	2200      	movs	r2, #0
 8015a2a:	601a      	str	r2, [r3, #0]

	/* Configure SysTick to interrupt at the requested rate. */
	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 8015a2c:	4b0a      	ldr	r3, [pc, #40]	@ (8015a58 <vPortSetupTimerInterrupt+0x3c>)
 8015a2e:	681b      	ldr	r3, [r3, #0]
 8015a30:	4a0a      	ldr	r2, [pc, #40]	@ (8015a5c <vPortSetupTimerInterrupt+0x40>)
 8015a32:	fba2 2303 	umull	r2, r3, r2, r3
 8015a36:	099b      	lsrs	r3, r3, #6
 8015a38:	4a09      	ldr	r2, [pc, #36]	@ (8015a60 <vPortSetupTimerInterrupt+0x44>)
 8015a3a:	3b01      	subs	r3, #1
 8015a3c:	6013      	str	r3, [r2, #0]
	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 8015a3e:	4b04      	ldr	r3, [pc, #16]	@ (8015a50 <vPortSetupTimerInterrupt+0x34>)
 8015a40:	2207      	movs	r2, #7
 8015a42:	601a      	str	r2, [r3, #0]
}
 8015a44:	bf00      	nop
 8015a46:	46bd      	mov	sp, r7
 8015a48:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015a4c:	4770      	bx	lr
 8015a4e:	bf00      	nop
 8015a50:	e000e010 	.word	0xe000e010
 8015a54:	e000e018 	.word	0xe000e018
 8015a58:	2400000c 	.word	0x2400000c
 8015a5c:	10624dd3 	.word	0x10624dd3
 8015a60:	e000e014 	.word	0xe000e014

08015a64 <vPortEnableVFP>:
/*-----------------------------------------------------------*/

/* This is a naked function. */
static void vPortEnableVFP( void )
{
	__asm volatile
 8015a64:	f8df 000c 	ldr.w	r0, [pc, #12]	@ 8015a74 <vPortEnableVFP+0x10>
 8015a68:	6801      	ldr	r1, [r0, #0]
 8015a6a:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8015a6e:	6001      	str	r1, [r0, #0]
 8015a70:	4770      	bx	lr
		"								\n"
		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
		"	str r1, [r0]				\n"
		"	bx r14						"
	);
}
 8015a72:	bf00      	nop
 8015a74:	e000ed88 	.word	0xe000ed88

08015a78 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/

#if( configASSERT_DEFINED == 1 )

	void vPortValidateInterruptPriority( void )
	{
 8015a78:	b480      	push	{r7}
 8015a7a:	b085      	sub	sp, #20
 8015a7c:	af00      	add	r7, sp, #0
	uint32_t ulCurrentInterrupt;
	uint8_t ucCurrentPriority;

		/* Obtain the number of the currently executing interrupt. */
		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
 8015a7e:	f3ef 8305 	mrs	r3, IPSR
 8015a82:	60fb      	str	r3, [r7, #12]

		/* Is the interrupt number a user defined interrupt? */
		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 8015a84:	68fb      	ldr	r3, [r7, #12]
 8015a86:	2b0f      	cmp	r3, #15
 8015a88:	d915      	bls.n	8015ab6 <vPortValidateInterruptPriority+0x3e>
		{
			/* Look up the interrupt's priority. */
			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 8015a8a:	4a18      	ldr	r2, [pc, #96]	@ (8015aec <vPortValidateInterruptPriority+0x74>)
 8015a8c:	68fb      	ldr	r3, [r7, #12]
 8015a8e:	4413      	add	r3, r2
 8015a90:	781b      	ldrb	r3, [r3, #0]
 8015a92:	72fb      	strb	r3, [r7, #11]
			interrupt entry is as fast and simple as possible.

			The following links provide detailed information:
			http://www.freertos.org/RTOS-Cortex-M3-M4.html
			http://www.freertos.org/FAQHelp.html */
			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 8015a94:	4b16      	ldr	r3, [pc, #88]	@ (8015af0 <vPortValidateInterruptPriority+0x78>)
 8015a96:	781b      	ldrb	r3, [r3, #0]
 8015a98:	7afa      	ldrb	r2, [r7, #11]
 8015a9a:	429a      	cmp	r2, r3
 8015a9c:	d20b      	bcs.n	8015ab6 <vPortValidateInterruptPriority+0x3e>
	__asm volatile
 8015a9e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015aa2:	f383 8811 	msr	BASEPRI, r3
 8015aa6:	f3bf 8f6f 	isb	sy
 8015aaa:	f3bf 8f4f 	dsb	sy
 8015aae:	607b      	str	r3, [r7, #4]
}
 8015ab0:	bf00      	nop
 8015ab2:	bf00      	nop
 8015ab4:	e7fd      	b.n	8015ab2 <vPortValidateInterruptPriority+0x3a>
		configuration then the correct setting can be achieved on all Cortex-M
		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
		scheduler.  Note however that some vendor specific peripheral libraries
		assume a non-zero priority group setting, in which cases using a value
		of zero will result in unpredictable behaviour. */
		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 8015ab6:	4b0f      	ldr	r3, [pc, #60]	@ (8015af4 <vPortValidateInterruptPriority+0x7c>)
 8015ab8:	681b      	ldr	r3, [r3, #0]
 8015aba:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 8015abe:	4b0e      	ldr	r3, [pc, #56]	@ (8015af8 <vPortValidateInterruptPriority+0x80>)
 8015ac0:	681b      	ldr	r3, [r3, #0]
 8015ac2:	429a      	cmp	r2, r3
 8015ac4:	d90b      	bls.n	8015ade <vPortValidateInterruptPriority+0x66>
	__asm volatile
 8015ac6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015aca:	f383 8811 	msr	BASEPRI, r3
 8015ace:	f3bf 8f6f 	isb	sy
 8015ad2:	f3bf 8f4f 	dsb	sy
 8015ad6:	603b      	str	r3, [r7, #0]
}
 8015ad8:	bf00      	nop
 8015ada:	bf00      	nop
 8015adc:	e7fd      	b.n	8015ada <vPortValidateInterruptPriority+0x62>
	}
 8015ade:	bf00      	nop
 8015ae0:	3714      	adds	r7, #20
 8015ae2:	46bd      	mov	sp, r7
 8015ae4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015ae8:	4770      	bx	lr
 8015aea:	bf00      	nop
 8015aec:	e000e3f0 	.word	0xe000e3f0
 8015af0:	2400439c 	.word	0x2400439c
 8015af4:	e000ed0c 	.word	0xe000ed0c
 8015af8:	240043a0 	.word	0x240043a0

08015afc <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 8015afc:	b580      	push	{r7, lr}
 8015afe:	b08a      	sub	sp, #40	@ 0x28
 8015b00:	af00      	add	r7, sp, #0
 8015b02:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 8015b04:	2300      	movs	r3, #0
 8015b06:	61fb      	str	r3, [r7, #28]

	vTaskSuspendAll();
 8015b08:	f7fe f902 	bl	8013d10 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 8015b0c:	4b5c      	ldr	r3, [pc, #368]	@ (8015c80 <pvPortMalloc+0x184>)
 8015b0e:	681b      	ldr	r3, [r3, #0]
 8015b10:	2b00      	cmp	r3, #0
 8015b12:	d101      	bne.n	8015b18 <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 8015b14:	f000 f924 	bl	8015d60 <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 8015b18:	4b5a      	ldr	r3, [pc, #360]	@ (8015c84 <pvPortMalloc+0x188>)
 8015b1a:	681a      	ldr	r2, [r3, #0]
 8015b1c:	687b      	ldr	r3, [r7, #4]
 8015b1e:	4013      	ands	r3, r2
 8015b20:	2b00      	cmp	r3, #0
 8015b22:	f040 8095 	bne.w	8015c50 <pvPortMalloc+0x154>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 8015b26:	687b      	ldr	r3, [r7, #4]
 8015b28:	2b00      	cmp	r3, #0
 8015b2a:	d01e      	beq.n	8015b6a <pvPortMalloc+0x6e>
			{
				xWantedSize += xHeapStructSize;
 8015b2c:	2208      	movs	r2, #8
 8015b2e:	687b      	ldr	r3, [r7, #4]
 8015b30:	4413      	add	r3, r2
 8015b32:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 8015b34:	687b      	ldr	r3, [r7, #4]
 8015b36:	f003 0307 	and.w	r3, r3, #7
 8015b3a:	2b00      	cmp	r3, #0
 8015b3c:	d015      	beq.n	8015b6a <pvPortMalloc+0x6e>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 8015b3e:	687b      	ldr	r3, [r7, #4]
 8015b40:	f023 0307 	bic.w	r3, r3, #7
 8015b44:	3308      	adds	r3, #8
 8015b46:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 8015b48:	687b      	ldr	r3, [r7, #4]
 8015b4a:	f003 0307 	and.w	r3, r3, #7
 8015b4e:	2b00      	cmp	r3, #0
 8015b50:	d00b      	beq.n	8015b6a <pvPortMalloc+0x6e>
	__asm volatile
 8015b52:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015b56:	f383 8811 	msr	BASEPRI, r3
 8015b5a:	f3bf 8f6f 	isb	sy
 8015b5e:	f3bf 8f4f 	dsb	sy
 8015b62:	617b      	str	r3, [r7, #20]
}
 8015b64:	bf00      	nop
 8015b66:	bf00      	nop
 8015b68:	e7fd      	b.n	8015b66 <pvPortMalloc+0x6a>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 8015b6a:	687b      	ldr	r3, [r7, #4]
 8015b6c:	2b00      	cmp	r3, #0
 8015b6e:	d06f      	beq.n	8015c50 <pvPortMalloc+0x154>
 8015b70:	4b45      	ldr	r3, [pc, #276]	@ (8015c88 <pvPortMalloc+0x18c>)
 8015b72:	681b      	ldr	r3, [r3, #0]
 8015b74:	687a      	ldr	r2, [r7, #4]
 8015b76:	429a      	cmp	r2, r3
 8015b78:	d86a      	bhi.n	8015c50 <pvPortMalloc+0x154>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 8015b7a:	4b44      	ldr	r3, [pc, #272]	@ (8015c8c <pvPortMalloc+0x190>)
 8015b7c:	623b      	str	r3, [r7, #32]
				pxBlock = xStart.pxNextFreeBlock;
 8015b7e:	4b43      	ldr	r3, [pc, #268]	@ (8015c8c <pvPortMalloc+0x190>)
 8015b80:	681b      	ldr	r3, [r3, #0]
 8015b82:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8015b84:	e004      	b.n	8015b90 <pvPortMalloc+0x94>
				{
					pxPreviousBlock = pxBlock;
 8015b86:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015b88:	623b      	str	r3, [r7, #32]
					pxBlock = pxBlock->pxNextFreeBlock;
 8015b8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015b8c:	681b      	ldr	r3, [r3, #0]
 8015b8e:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8015b90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015b92:	685b      	ldr	r3, [r3, #4]
 8015b94:	687a      	ldr	r2, [r7, #4]
 8015b96:	429a      	cmp	r2, r3
 8015b98:	d903      	bls.n	8015ba2 <pvPortMalloc+0xa6>
 8015b9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015b9c:	681b      	ldr	r3, [r3, #0]
 8015b9e:	2b00      	cmp	r3, #0
 8015ba0:	d1f1      	bne.n	8015b86 <pvPortMalloc+0x8a>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8015ba2:	4b37      	ldr	r3, [pc, #220]	@ (8015c80 <pvPortMalloc+0x184>)
 8015ba4:	681b      	ldr	r3, [r3, #0]
 8015ba6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015ba8:	429a      	cmp	r2, r3
 8015baa:	d051      	beq.n	8015c50 <pvPortMalloc+0x154>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 8015bac:	6a3b      	ldr	r3, [r7, #32]
 8015bae:	681b      	ldr	r3, [r3, #0]
 8015bb0:	2208      	movs	r2, #8
 8015bb2:	4413      	add	r3, r2
 8015bb4:	61fb      	str	r3, [r7, #28]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8015bb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015bb8:	681a      	ldr	r2, [r3, #0]
 8015bba:	6a3b      	ldr	r3, [r7, #32]
 8015bbc:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 8015bbe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015bc0:	685a      	ldr	r2, [r3, #4]
 8015bc2:	687b      	ldr	r3, [r7, #4]
 8015bc4:	1ad2      	subs	r2, r2, r3
 8015bc6:	2308      	movs	r3, #8
 8015bc8:	005b      	lsls	r3, r3, #1
 8015bca:	429a      	cmp	r2, r3
 8015bcc:	d920      	bls.n	8015c10 <pvPortMalloc+0x114>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 8015bce:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015bd0:	687b      	ldr	r3, [r7, #4]
 8015bd2:	4413      	add	r3, r2
 8015bd4:	61bb      	str	r3, [r7, #24]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8015bd6:	69bb      	ldr	r3, [r7, #24]
 8015bd8:	f003 0307 	and.w	r3, r3, #7
 8015bdc:	2b00      	cmp	r3, #0
 8015bde:	d00b      	beq.n	8015bf8 <pvPortMalloc+0xfc>
	__asm volatile
 8015be0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015be4:	f383 8811 	msr	BASEPRI, r3
 8015be8:	f3bf 8f6f 	isb	sy
 8015bec:	f3bf 8f4f 	dsb	sy
 8015bf0:	613b      	str	r3, [r7, #16]
}
 8015bf2:	bf00      	nop
 8015bf4:	bf00      	nop
 8015bf6:	e7fd      	b.n	8015bf4 <pvPortMalloc+0xf8>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 8015bf8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015bfa:	685a      	ldr	r2, [r3, #4]
 8015bfc:	687b      	ldr	r3, [r7, #4]
 8015bfe:	1ad2      	subs	r2, r2, r3
 8015c00:	69bb      	ldr	r3, [r7, #24]
 8015c02:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 8015c04:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c06:	687a      	ldr	r2, [r7, #4]
 8015c08:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 8015c0a:	69b8      	ldr	r0, [r7, #24]
 8015c0c:	f000 f90a 	bl	8015e24 <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 8015c10:	4b1d      	ldr	r3, [pc, #116]	@ (8015c88 <pvPortMalloc+0x18c>)
 8015c12:	681a      	ldr	r2, [r3, #0]
 8015c14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c16:	685b      	ldr	r3, [r3, #4]
 8015c18:	1ad3      	subs	r3, r2, r3
 8015c1a:	4a1b      	ldr	r2, [pc, #108]	@ (8015c88 <pvPortMalloc+0x18c>)
 8015c1c:	6013      	str	r3, [r2, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 8015c1e:	4b1a      	ldr	r3, [pc, #104]	@ (8015c88 <pvPortMalloc+0x18c>)
 8015c20:	681a      	ldr	r2, [r3, #0]
 8015c22:	4b1b      	ldr	r3, [pc, #108]	@ (8015c90 <pvPortMalloc+0x194>)
 8015c24:	681b      	ldr	r3, [r3, #0]
 8015c26:	429a      	cmp	r2, r3
 8015c28:	d203      	bcs.n	8015c32 <pvPortMalloc+0x136>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 8015c2a:	4b17      	ldr	r3, [pc, #92]	@ (8015c88 <pvPortMalloc+0x18c>)
 8015c2c:	681b      	ldr	r3, [r3, #0]
 8015c2e:	4a18      	ldr	r2, [pc, #96]	@ (8015c90 <pvPortMalloc+0x194>)
 8015c30:	6013      	str	r3, [r2, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 8015c32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c34:	685a      	ldr	r2, [r3, #4]
 8015c36:	4b13      	ldr	r3, [pc, #76]	@ (8015c84 <pvPortMalloc+0x188>)
 8015c38:	681b      	ldr	r3, [r3, #0]
 8015c3a:	431a      	orrs	r2, r3
 8015c3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c3e:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 8015c40:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015c42:	2200      	movs	r2, #0
 8015c44:	601a      	str	r2, [r3, #0]
					xNumberOfSuccessfulAllocations++;
 8015c46:	4b13      	ldr	r3, [pc, #76]	@ (8015c94 <pvPortMalloc+0x198>)
 8015c48:	681b      	ldr	r3, [r3, #0]
 8015c4a:	3301      	adds	r3, #1
 8015c4c:	4a11      	ldr	r2, [pc, #68]	@ (8015c94 <pvPortMalloc+0x198>)
 8015c4e:	6013      	str	r3, [r2, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 8015c50:	f7fe f86c 	bl	8013d2c <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 8015c54:	69fb      	ldr	r3, [r7, #28]
 8015c56:	f003 0307 	and.w	r3, r3, #7
 8015c5a:	2b00      	cmp	r3, #0
 8015c5c:	d00b      	beq.n	8015c76 <pvPortMalloc+0x17a>
	__asm volatile
 8015c5e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015c62:	f383 8811 	msr	BASEPRI, r3
 8015c66:	f3bf 8f6f 	isb	sy
 8015c6a:	f3bf 8f4f 	dsb	sy
 8015c6e:	60fb      	str	r3, [r7, #12]
}
 8015c70:	bf00      	nop
 8015c72:	bf00      	nop
 8015c74:	e7fd      	b.n	8015c72 <pvPortMalloc+0x176>
	return pvReturn;
 8015c76:	69fb      	ldr	r3, [r7, #28]
}
 8015c78:	4618      	mov	r0, r3
 8015c7a:	3728      	adds	r7, #40	@ 0x28
 8015c7c:	46bd      	mov	sp, r7
 8015c7e:	bd80      	pop	{r7, pc}
 8015c80:	240243ac 	.word	0x240243ac
 8015c84:	240243c0 	.word	0x240243c0
 8015c88:	240243b0 	.word	0x240243b0
 8015c8c:	240243a4 	.word	0x240243a4
 8015c90:	240243b4 	.word	0x240243b4
 8015c94:	240243b8 	.word	0x240243b8

08015c98 <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 8015c98:	b580      	push	{r7, lr}
 8015c9a:	b086      	sub	sp, #24
 8015c9c:	af00      	add	r7, sp, #0
 8015c9e:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8015ca0:	687b      	ldr	r3, [r7, #4]
 8015ca2:	617b      	str	r3, [r7, #20]
BlockLink_t *pxLink;

	if( pv != NULL )
 8015ca4:	687b      	ldr	r3, [r7, #4]
 8015ca6:	2b00      	cmp	r3, #0
 8015ca8:	d04f      	beq.n	8015d4a <vPortFree+0xb2>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 8015caa:	2308      	movs	r3, #8
 8015cac:	425b      	negs	r3, r3
 8015cae:	697a      	ldr	r2, [r7, #20]
 8015cb0:	4413      	add	r3, r2
 8015cb2:	617b      	str	r3, [r7, #20]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8015cb4:	697b      	ldr	r3, [r7, #20]
 8015cb6:	613b      	str	r3, [r7, #16]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8015cb8:	693b      	ldr	r3, [r7, #16]
 8015cba:	685a      	ldr	r2, [r3, #4]
 8015cbc:	4b25      	ldr	r3, [pc, #148]	@ (8015d54 <vPortFree+0xbc>)
 8015cbe:	681b      	ldr	r3, [r3, #0]
 8015cc0:	4013      	ands	r3, r2
 8015cc2:	2b00      	cmp	r3, #0
 8015cc4:	d10b      	bne.n	8015cde <vPortFree+0x46>
	__asm volatile
 8015cc6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015cca:	f383 8811 	msr	BASEPRI, r3
 8015cce:	f3bf 8f6f 	isb	sy
 8015cd2:	f3bf 8f4f 	dsb	sy
 8015cd6:	60fb      	str	r3, [r7, #12]
}
 8015cd8:	bf00      	nop
 8015cda:	bf00      	nop
 8015cdc:	e7fd      	b.n	8015cda <vPortFree+0x42>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 8015cde:	693b      	ldr	r3, [r7, #16]
 8015ce0:	681b      	ldr	r3, [r3, #0]
 8015ce2:	2b00      	cmp	r3, #0
 8015ce4:	d00b      	beq.n	8015cfe <vPortFree+0x66>
	__asm volatile
 8015ce6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015cea:	f383 8811 	msr	BASEPRI, r3
 8015cee:	f3bf 8f6f 	isb	sy
 8015cf2:	f3bf 8f4f 	dsb	sy
 8015cf6:	60bb      	str	r3, [r7, #8]
}
 8015cf8:	bf00      	nop
 8015cfa:	bf00      	nop
 8015cfc:	e7fd      	b.n	8015cfa <vPortFree+0x62>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 8015cfe:	693b      	ldr	r3, [r7, #16]
 8015d00:	685a      	ldr	r2, [r3, #4]
 8015d02:	4b14      	ldr	r3, [pc, #80]	@ (8015d54 <vPortFree+0xbc>)
 8015d04:	681b      	ldr	r3, [r3, #0]
 8015d06:	4013      	ands	r3, r2
 8015d08:	2b00      	cmp	r3, #0
 8015d0a:	d01e      	beq.n	8015d4a <vPortFree+0xb2>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 8015d0c:	693b      	ldr	r3, [r7, #16]
 8015d0e:	681b      	ldr	r3, [r3, #0]
 8015d10:	2b00      	cmp	r3, #0
 8015d12:	d11a      	bne.n	8015d4a <vPortFree+0xb2>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8015d14:	693b      	ldr	r3, [r7, #16]
 8015d16:	685a      	ldr	r2, [r3, #4]
 8015d18:	4b0e      	ldr	r3, [pc, #56]	@ (8015d54 <vPortFree+0xbc>)
 8015d1a:	681b      	ldr	r3, [r3, #0]
 8015d1c:	43db      	mvns	r3, r3
 8015d1e:	401a      	ands	r2, r3
 8015d20:	693b      	ldr	r3, [r7, #16]
 8015d22:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8015d24:	f7fd fff4 	bl	8013d10 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8015d28:	693b      	ldr	r3, [r7, #16]
 8015d2a:	685a      	ldr	r2, [r3, #4]
 8015d2c:	4b0a      	ldr	r3, [pc, #40]	@ (8015d58 <vPortFree+0xc0>)
 8015d2e:	681b      	ldr	r3, [r3, #0]
 8015d30:	4413      	add	r3, r2
 8015d32:	4a09      	ldr	r2, [pc, #36]	@ (8015d58 <vPortFree+0xc0>)
 8015d34:	6013      	str	r3, [r2, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8015d36:	6938      	ldr	r0, [r7, #16]
 8015d38:	f000 f874 	bl	8015e24 <prvInsertBlockIntoFreeList>
					xNumberOfSuccessfulFrees++;
 8015d3c:	4b07      	ldr	r3, [pc, #28]	@ (8015d5c <vPortFree+0xc4>)
 8015d3e:	681b      	ldr	r3, [r3, #0]
 8015d40:	3301      	adds	r3, #1
 8015d42:	4a06      	ldr	r2, [pc, #24]	@ (8015d5c <vPortFree+0xc4>)
 8015d44:	6013      	str	r3, [r2, #0]
				}
				( void ) xTaskResumeAll();
 8015d46:	f7fd fff1 	bl	8013d2c <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 8015d4a:	bf00      	nop
 8015d4c:	3718      	adds	r7, #24
 8015d4e:	46bd      	mov	sp, r7
 8015d50:	bd80      	pop	{r7, pc}
 8015d52:	bf00      	nop
 8015d54:	240243c0 	.word	0x240243c0
 8015d58:	240243b0 	.word	0x240243b0
 8015d5c:	240243bc 	.word	0x240243bc

08015d60 <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 8015d60:	b480      	push	{r7}
 8015d62:	b085      	sub	sp, #20
 8015d64:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 8015d66:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
 8015d6a:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 8015d6c:	4b27      	ldr	r3, [pc, #156]	@ (8015e0c <prvHeapInit+0xac>)
 8015d6e:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 8015d70:	68fb      	ldr	r3, [r7, #12]
 8015d72:	f003 0307 	and.w	r3, r3, #7
 8015d76:	2b00      	cmp	r3, #0
 8015d78:	d00c      	beq.n	8015d94 <prvHeapInit+0x34>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 8015d7a:	68fb      	ldr	r3, [r7, #12]
 8015d7c:	3307      	adds	r3, #7
 8015d7e:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8015d80:	68fb      	ldr	r3, [r7, #12]
 8015d82:	f023 0307 	bic.w	r3, r3, #7
 8015d86:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 8015d88:	68ba      	ldr	r2, [r7, #8]
 8015d8a:	68fb      	ldr	r3, [r7, #12]
 8015d8c:	1ad3      	subs	r3, r2, r3
 8015d8e:	4a1f      	ldr	r2, [pc, #124]	@ (8015e0c <prvHeapInit+0xac>)
 8015d90:	4413      	add	r3, r2
 8015d92:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 8015d94:	68fb      	ldr	r3, [r7, #12]
 8015d96:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 8015d98:	4a1d      	ldr	r2, [pc, #116]	@ (8015e10 <prvHeapInit+0xb0>)
 8015d9a:	687b      	ldr	r3, [r7, #4]
 8015d9c:	6013      	str	r3, [r2, #0]
	xStart.xBlockSize = ( size_t ) 0;
 8015d9e:	4b1c      	ldr	r3, [pc, #112]	@ (8015e10 <prvHeapInit+0xb0>)
 8015da0:	2200      	movs	r2, #0
 8015da2:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 8015da4:	687b      	ldr	r3, [r7, #4]
 8015da6:	68ba      	ldr	r2, [r7, #8]
 8015da8:	4413      	add	r3, r2
 8015daa:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 8015dac:	2208      	movs	r2, #8
 8015dae:	68fb      	ldr	r3, [r7, #12]
 8015db0:	1a9b      	subs	r3, r3, r2
 8015db2:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8015db4:	68fb      	ldr	r3, [r7, #12]
 8015db6:	f023 0307 	bic.w	r3, r3, #7
 8015dba:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 8015dbc:	68fb      	ldr	r3, [r7, #12]
 8015dbe:	4a15      	ldr	r2, [pc, #84]	@ (8015e14 <prvHeapInit+0xb4>)
 8015dc0:	6013      	str	r3, [r2, #0]
	pxEnd->xBlockSize = 0;
 8015dc2:	4b14      	ldr	r3, [pc, #80]	@ (8015e14 <prvHeapInit+0xb4>)
 8015dc4:	681b      	ldr	r3, [r3, #0]
 8015dc6:	2200      	movs	r2, #0
 8015dc8:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 8015dca:	4b12      	ldr	r3, [pc, #72]	@ (8015e14 <prvHeapInit+0xb4>)
 8015dcc:	681b      	ldr	r3, [r3, #0]
 8015dce:	2200      	movs	r2, #0
 8015dd0:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 8015dd2:	687b      	ldr	r3, [r7, #4]
 8015dd4:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 8015dd6:	683b      	ldr	r3, [r7, #0]
 8015dd8:	68fa      	ldr	r2, [r7, #12]
 8015dda:	1ad2      	subs	r2, r2, r3
 8015ddc:	683b      	ldr	r3, [r7, #0]
 8015dde:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 8015de0:	4b0c      	ldr	r3, [pc, #48]	@ (8015e14 <prvHeapInit+0xb4>)
 8015de2:	681a      	ldr	r2, [r3, #0]
 8015de4:	683b      	ldr	r3, [r7, #0]
 8015de6:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015de8:	683b      	ldr	r3, [r7, #0]
 8015dea:	685b      	ldr	r3, [r3, #4]
 8015dec:	4a0a      	ldr	r2, [pc, #40]	@ (8015e18 <prvHeapInit+0xb8>)
 8015dee:	6013      	str	r3, [r2, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 8015df0:	683b      	ldr	r3, [r7, #0]
 8015df2:	685b      	ldr	r3, [r3, #4]
 8015df4:	4a09      	ldr	r2, [pc, #36]	@ (8015e1c <prvHeapInit+0xbc>)
 8015df6:	6013      	str	r3, [r2, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 8015df8:	4b09      	ldr	r3, [pc, #36]	@ (8015e20 <prvHeapInit+0xc0>)
 8015dfa:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8015dfe:	601a      	str	r2, [r3, #0]
}
 8015e00:	bf00      	nop
 8015e02:	3714      	adds	r7, #20
 8015e04:	46bd      	mov	sp, r7
 8015e06:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015e0a:	4770      	bx	lr
 8015e0c:	240043a4 	.word	0x240043a4
 8015e10:	240243a4 	.word	0x240243a4
 8015e14:	240243ac 	.word	0x240243ac
 8015e18:	240243b4 	.word	0x240243b4
 8015e1c:	240243b0 	.word	0x240243b0
 8015e20:	240243c0 	.word	0x240243c0

08015e24 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 8015e24:	b480      	push	{r7}
 8015e26:	b085      	sub	sp, #20
 8015e28:	af00      	add	r7, sp, #0
 8015e2a:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 8015e2c:	4b28      	ldr	r3, [pc, #160]	@ (8015ed0 <prvInsertBlockIntoFreeList+0xac>)
 8015e2e:	60fb      	str	r3, [r7, #12]
 8015e30:	e002      	b.n	8015e38 <prvInsertBlockIntoFreeList+0x14>
 8015e32:	68fb      	ldr	r3, [r7, #12]
 8015e34:	681b      	ldr	r3, [r3, #0]
 8015e36:	60fb      	str	r3, [r7, #12]
 8015e38:	68fb      	ldr	r3, [r7, #12]
 8015e3a:	681b      	ldr	r3, [r3, #0]
 8015e3c:	687a      	ldr	r2, [r7, #4]
 8015e3e:	429a      	cmp	r2, r3
 8015e40:	d8f7      	bhi.n	8015e32 <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 8015e42:	68fb      	ldr	r3, [r7, #12]
 8015e44:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 8015e46:	68fb      	ldr	r3, [r7, #12]
 8015e48:	685b      	ldr	r3, [r3, #4]
 8015e4a:	68ba      	ldr	r2, [r7, #8]
 8015e4c:	4413      	add	r3, r2
 8015e4e:	687a      	ldr	r2, [r7, #4]
 8015e50:	429a      	cmp	r2, r3
 8015e52:	d108      	bne.n	8015e66 <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 8015e54:	68fb      	ldr	r3, [r7, #12]
 8015e56:	685a      	ldr	r2, [r3, #4]
 8015e58:	687b      	ldr	r3, [r7, #4]
 8015e5a:	685b      	ldr	r3, [r3, #4]
 8015e5c:	441a      	add	r2, r3
 8015e5e:	68fb      	ldr	r3, [r7, #12]
 8015e60:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 8015e62:	68fb      	ldr	r3, [r7, #12]
 8015e64:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 8015e66:	687b      	ldr	r3, [r7, #4]
 8015e68:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 8015e6a:	687b      	ldr	r3, [r7, #4]
 8015e6c:	685b      	ldr	r3, [r3, #4]
 8015e6e:	68ba      	ldr	r2, [r7, #8]
 8015e70:	441a      	add	r2, r3
 8015e72:	68fb      	ldr	r3, [r7, #12]
 8015e74:	681b      	ldr	r3, [r3, #0]
 8015e76:	429a      	cmp	r2, r3
 8015e78:	d118      	bne.n	8015eac <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 8015e7a:	68fb      	ldr	r3, [r7, #12]
 8015e7c:	681a      	ldr	r2, [r3, #0]
 8015e7e:	4b15      	ldr	r3, [pc, #84]	@ (8015ed4 <prvInsertBlockIntoFreeList+0xb0>)
 8015e80:	681b      	ldr	r3, [r3, #0]
 8015e82:	429a      	cmp	r2, r3
 8015e84:	d00d      	beq.n	8015ea2 <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 8015e86:	687b      	ldr	r3, [r7, #4]
 8015e88:	685a      	ldr	r2, [r3, #4]
 8015e8a:	68fb      	ldr	r3, [r7, #12]
 8015e8c:	681b      	ldr	r3, [r3, #0]
 8015e8e:	685b      	ldr	r3, [r3, #4]
 8015e90:	441a      	add	r2, r3
 8015e92:	687b      	ldr	r3, [r7, #4]
 8015e94:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 8015e96:	68fb      	ldr	r3, [r7, #12]
 8015e98:	681b      	ldr	r3, [r3, #0]
 8015e9a:	681a      	ldr	r2, [r3, #0]
 8015e9c:	687b      	ldr	r3, [r7, #4]
 8015e9e:	601a      	str	r2, [r3, #0]
 8015ea0:	e008      	b.n	8015eb4 <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 8015ea2:	4b0c      	ldr	r3, [pc, #48]	@ (8015ed4 <prvInsertBlockIntoFreeList+0xb0>)
 8015ea4:	681a      	ldr	r2, [r3, #0]
 8015ea6:	687b      	ldr	r3, [r7, #4]
 8015ea8:	601a      	str	r2, [r3, #0]
 8015eaa:	e003      	b.n	8015eb4 <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 8015eac:	68fb      	ldr	r3, [r7, #12]
 8015eae:	681a      	ldr	r2, [r3, #0]
 8015eb0:	687b      	ldr	r3, [r7, #4]
 8015eb2:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 8015eb4:	68fa      	ldr	r2, [r7, #12]
 8015eb6:	687b      	ldr	r3, [r7, #4]
 8015eb8:	429a      	cmp	r2, r3
 8015eba:	d002      	beq.n	8015ec2 <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 8015ebc:	68fb      	ldr	r3, [r7, #12]
 8015ebe:	687a      	ldr	r2, [r7, #4]
 8015ec0:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8015ec2:	bf00      	nop
 8015ec4:	3714      	adds	r7, #20
 8015ec6:	46bd      	mov	sp, r7
 8015ec8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015ecc:	4770      	bx	lr
 8015ece:	bf00      	nop
 8015ed0:	240243a4 	.word	0x240243a4
 8015ed4:	240243ac 	.word	0x240243ac

08015ed8 <netconn_apimsg>:
 * @param apimsg a struct containing the function to call and its parameters
 * @return ERR_OK if the function was called, another err_t if not
 */
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
 8015ed8:	b580      	push	{r7, lr}
 8015eda:	b084      	sub	sp, #16
 8015edc:	af00      	add	r7, sp, #0
 8015ede:	6078      	str	r0, [r7, #4]
 8015ee0:	6039      	str	r1, [r7, #0]
  err_t err;

#ifdef LWIP_DEBUG
  /* catch functions that don't set err */
  apimsg->err = ERR_VAL;
 8015ee2:	683b      	ldr	r3, [r7, #0]
 8015ee4:	22fa      	movs	r2, #250	@ 0xfa
 8015ee6:	711a      	strb	r2, [r3, #4]

#if LWIP_NETCONN_SEM_PER_THREAD
  apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */

  err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
 8015ee8:	683b      	ldr	r3, [r7, #0]
 8015eea:	681b      	ldr	r3, [r3, #0]
 8015eec:	330c      	adds	r3, #12
 8015eee:	461a      	mov	r2, r3
 8015ef0:	6839      	ldr	r1, [r7, #0]
 8015ef2:	6878      	ldr	r0, [r7, #4]
 8015ef4:	f003 fc7c 	bl	80197f0 <tcpip_send_msg_wait_sem>
 8015ef8:	4603      	mov	r3, r0
 8015efa:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8015efc:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8015f00:	2b00      	cmp	r3, #0
 8015f02:	d103      	bne.n	8015f0c <netconn_apimsg+0x34>
    return apimsg->err;
 8015f04:	683b      	ldr	r3, [r7, #0]
 8015f06:	f993 3004 	ldrsb.w	r3, [r3, #4]
 8015f0a:	e001      	b.n	8015f10 <netconn_apimsg+0x38>
  }
  return err;
 8015f0c:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8015f10:	4618      	mov	r0, r3
 8015f12:	3710      	adds	r7, #16
 8015f14:	46bd      	mov	sp, r7
 8015f16:	bd80      	pop	{r7, pc}

08015f18 <netconn_new_with_proto_and_callback>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
 8015f18:	b580      	push	{r7, lr}
 8015f1a:	b08c      	sub	sp, #48	@ 0x30
 8015f1c:	af00      	add	r7, sp, #0
 8015f1e:	4603      	mov	r3, r0
 8015f20:	603a      	str	r2, [r7, #0]
 8015f22:	71fb      	strb	r3, [r7, #7]
 8015f24:	460b      	mov	r3, r1
 8015f26:	71bb      	strb	r3, [r7, #6]
  struct netconn *conn;
  API_MSG_VAR_DECLARE(msg);
  API_MSG_VAR_ALLOC_RETURN_NULL(msg);

  conn = netconn_alloc(t, callback);
 8015f28:	79fb      	ldrb	r3, [r7, #7]
 8015f2a:	6839      	ldr	r1, [r7, #0]
 8015f2c:	4618      	mov	r0, r3
 8015f2e:	f001 f8ad 	bl	801708c <netconn_alloc>
 8015f32:	62f8      	str	r0, [r7, #44]	@ 0x2c
  if (conn != NULL) {
 8015f34:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015f36:	2b00      	cmp	r3, #0
 8015f38:	d054      	beq.n	8015fe4 <netconn_new_with_proto_and_callback+0xcc>
    err_t err;

    API_MSG_VAR_REF(msg).msg.n.proto = proto;
 8015f3a:	79bb      	ldrb	r3, [r7, #6]
 8015f3c:	743b      	strb	r3, [r7, #16]
    API_MSG_VAR_REF(msg).conn = conn;
 8015f3e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015f40:	60bb      	str	r3, [r7, #8]
    err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
 8015f42:	f107 0308 	add.w	r3, r7, #8
 8015f46:	4619      	mov	r1, r3
 8015f48:	4829      	ldr	r0, [pc, #164]	@ (8015ff0 <netconn_new_with_proto_and_callback+0xd8>)
 8015f4a:	f7ff ffc5 	bl	8015ed8 <netconn_apimsg>
 8015f4e:	4603      	mov	r3, r0
 8015f50:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    if (err != ERR_OK) {
 8015f54:	f997 302b 	ldrsb.w	r3, [r7, #43]	@ 0x2b
 8015f58:	2b00      	cmp	r3, #0
 8015f5a:	d043      	beq.n	8015fe4 <netconn_new_with_proto_and_callback+0xcc>
      LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
 8015f5c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015f5e:	685b      	ldr	r3, [r3, #4]
 8015f60:	2b00      	cmp	r3, #0
 8015f62:	d005      	beq.n	8015f70 <netconn_new_with_proto_and_callback+0x58>
 8015f64:	4b23      	ldr	r3, [pc, #140]	@ (8015ff4 <netconn_new_with_proto_and_callback+0xdc>)
 8015f66:	22a3      	movs	r2, #163	@ 0xa3
 8015f68:	4923      	ldr	r1, [pc, #140]	@ (8015ff8 <netconn_new_with_proto_and_callback+0xe0>)
 8015f6a:	4824      	ldr	r0, [pc, #144]	@ (8015ffc <netconn_new_with_proto_and_callback+0xe4>)
 8015f6c:	f014 fbf6 	bl	802a75c <iprintf>
      LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
 8015f70:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015f72:	3310      	adds	r3, #16
 8015f74:	4618      	mov	r0, r3
 8015f76:	f011 f851 	bl	802701c <sys_mbox_valid>
 8015f7a:	4603      	mov	r3, r0
 8015f7c:	2b00      	cmp	r3, #0
 8015f7e:	d105      	bne.n	8015f8c <netconn_new_with_proto_and_callback+0x74>
 8015f80:	4b1c      	ldr	r3, [pc, #112]	@ (8015ff4 <netconn_new_with_proto_and_callback+0xdc>)
 8015f82:	22a4      	movs	r2, #164	@ 0xa4
 8015f84:	491e      	ldr	r1, [pc, #120]	@ (8016000 <netconn_new_with_proto_and_callback+0xe8>)
 8015f86:	481d      	ldr	r0, [pc, #116]	@ (8015ffc <netconn_new_with_proto_and_callback+0xe4>)
 8015f88:	f014 fbe8 	bl	802a75c <iprintf>
#if LWIP_TCP
      LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
 8015f8c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015f8e:	3314      	adds	r3, #20
 8015f90:	4618      	mov	r0, r3
 8015f92:	f011 f843 	bl	802701c <sys_mbox_valid>
 8015f96:	4603      	mov	r3, r0
 8015f98:	2b00      	cmp	r3, #0
 8015f9a:	d005      	beq.n	8015fa8 <netconn_new_with_proto_and_callback+0x90>
 8015f9c:	4b15      	ldr	r3, [pc, #84]	@ (8015ff4 <netconn_new_with_proto_and_callback+0xdc>)
 8015f9e:	22a6      	movs	r2, #166	@ 0xa6
 8015fa0:	4918      	ldr	r1, [pc, #96]	@ (8016004 <netconn_new_with_proto_and_callback+0xec>)
 8015fa2:	4816      	ldr	r0, [pc, #88]	@ (8015ffc <netconn_new_with_proto_and_callback+0xe4>)
 8015fa4:	f014 fbda 	bl	802a75c <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
      LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
 8015fa8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015faa:	330c      	adds	r3, #12
 8015fac:	4618      	mov	r0, r3
 8015fae:	f011 f8c3 	bl	8027138 <sys_sem_valid>
 8015fb2:	4603      	mov	r3, r0
 8015fb4:	2b00      	cmp	r3, #0
 8015fb6:	d105      	bne.n	8015fc4 <netconn_new_with_proto_and_callback+0xac>
 8015fb8:	4b0e      	ldr	r3, [pc, #56]	@ (8015ff4 <netconn_new_with_proto_and_callback+0xdc>)
 8015fba:	22a9      	movs	r2, #169	@ 0xa9
 8015fbc:	4912      	ldr	r1, [pc, #72]	@ (8016008 <netconn_new_with_proto_and_callback+0xf0>)
 8015fbe:	480f      	ldr	r0, [pc, #60]	@ (8015ffc <netconn_new_with_proto_and_callback+0xe4>)
 8015fc0:	f014 fbcc 	bl	802a75c <iprintf>
      sys_sem_free(&conn->op_completed);
 8015fc4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015fc6:	330c      	adds	r3, #12
 8015fc8:	4618      	mov	r0, r3
 8015fca:	f011 f8a8 	bl	802711e <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
      sys_mbox_free(&conn->recvmbox);
 8015fce:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8015fd0:	3310      	adds	r3, #16
 8015fd2:	4618      	mov	r0, r3
 8015fd4:	f010 ffae 	bl	8026f34 <sys_mbox_free>
      memp_free(MEMP_NETCONN, conn);
 8015fd8:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8015fda:	2007      	movs	r0, #7
 8015fdc:	f004 fa58 	bl	801a490 <memp_free>
      API_MSG_VAR_FREE(msg);
      return NULL;
 8015fe0:	2300      	movs	r3, #0
 8015fe2:	e000      	b.n	8015fe6 <netconn_new_with_proto_and_callback+0xce>
    }
  }
  API_MSG_VAR_FREE(msg);
  return conn;
 8015fe4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8015fe6:	4618      	mov	r0, r3
 8015fe8:	3730      	adds	r7, #48	@ 0x30
 8015fea:	46bd      	mov	sp, r7
 8015fec:	bd80      	pop	{r7, pc}
 8015fee:	bf00      	nop
 8015ff0:	08017061 	.word	0x08017061
 8015ff4:	0802da68 	.word	0x0802da68
 8015ff8:	0802da9c 	.word	0x0802da9c
 8015ffc:	0802dac0 	.word	0x0802dac0
 8016000:	0802dae8 	.word	0x0802dae8
 8016004:	0802db00 	.word	0x0802db00
 8016008:	0802db24 	.word	0x0802db24

0801600c <netconn_prepare_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_prepare_delete(struct netconn *conn)
{
 801600c:	b580      	push	{r7, lr}
 801600e:	b08c      	sub	sp, #48	@ 0x30
 8016010:	af00      	add	r7, sp, #0
 8016012:	6078      	str	r0, [r7, #4]
  err_t err;
  API_MSG_VAR_DECLARE(msg);

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8016014:	687b      	ldr	r3, [r7, #4]
 8016016:	2b00      	cmp	r3, #0
 8016018:	d101      	bne.n	801601e <netconn_prepare_delete+0x12>
    return ERR_OK;
 801601a:	2300      	movs	r3, #0
 801601c:	e014      	b.n	8016048 <netconn_prepare_delete+0x3c>
  }

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 801601e:	687b      	ldr	r3, [r7, #4]
 8016020:	60fb      	str	r3, [r7, #12]
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8016022:	2329      	movs	r3, #41	@ 0x29
 8016024:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
 8016026:	f107 030c 	add.w	r3, r7, #12
 801602a:	4619      	mov	r1, r3
 801602c:	4808      	ldr	r0, [pc, #32]	@ (8016050 <netconn_prepare_delete+0x44>)
 801602e:	f7ff ff53 	bl	8015ed8 <netconn_apimsg>
 8016032:	4603      	mov	r3, r0
 8016034:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  if (err != ERR_OK) {
 8016038:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 801603c:	2b00      	cmp	r3, #0
 801603e:	d002      	beq.n	8016046 <netconn_prepare_delete+0x3a>
    return err;
 8016040:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8016044:	e000      	b.n	8016048 <netconn_prepare_delete+0x3c>
  }
  return ERR_OK;
 8016046:	2300      	movs	r3, #0
}
 8016048:	4618      	mov	r0, r3
 801604a:	3730      	adds	r7, #48	@ 0x30
 801604c:	46bd      	mov	sp, r7
 801604e:	bd80      	pop	{r7, pc}
 8016050:	080175e5 	.word	0x080175e5

08016054 <netconn_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_delete(struct netconn *conn)
{
 8016054:	b580      	push	{r7, lr}
 8016056:	b084      	sub	sp, #16
 8016058:	af00      	add	r7, sp, #0
 801605a:	6078      	str	r0, [r7, #4]
  err_t err;

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 801605c:	687b      	ldr	r3, [r7, #4]
 801605e:	2b00      	cmp	r3, #0
 8016060:	d101      	bne.n	8016066 <netconn_delete+0x12>
    return ERR_OK;
 8016062:	2300      	movs	r3, #0
 8016064:	e00d      	b.n	8016082 <netconn_delete+0x2e>
    /* Already called netconn_prepare_delete() before */
    err = ERR_OK;
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    err = netconn_prepare_delete(conn);
 8016066:	6878      	ldr	r0, [r7, #4]
 8016068:	f7ff ffd0 	bl	801600c <netconn_prepare_delete>
 801606c:	4603      	mov	r3, r0
 801606e:	73fb      	strb	r3, [r7, #15]
  }
  if (err == ERR_OK) {
 8016070:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8016074:	2b00      	cmp	r3, #0
 8016076:	d102      	bne.n	801607e <netconn_delete+0x2a>
    netconn_free(conn);
 8016078:	6878      	ldr	r0, [r7, #4]
 801607a:	f001 f881 	bl	8017180 <netconn_free>
  }
  return err;
 801607e:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8016082:	4618      	mov	r0, r3
 8016084:	3710      	adds	r7, #16
 8016086:	46bd      	mov	sp, r7
 8016088:	bd80      	pop	{r7, pc}
	...

0801608c <netconn_getaddr>:
 * @return ERR_CONN for invalid connections
 *         ERR_OK if the information was retrieved
 */
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
 801608c:	b580      	push	{r7, lr}
 801608e:	b08e      	sub	sp, #56	@ 0x38
 8016090:	af00      	add	r7, sp, #0
 8016092:	60f8      	str	r0, [r7, #12]
 8016094:	60b9      	str	r1, [r7, #8]
 8016096:	607a      	str	r2, [r7, #4]
 8016098:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
 801609a:	68fb      	ldr	r3, [r7, #12]
 801609c:	2b00      	cmp	r3, #0
 801609e:	d109      	bne.n	80160b4 <netconn_getaddr+0x28>
 80160a0:	4b1d      	ldr	r3, [pc, #116]	@ (8016118 <netconn_getaddr+0x8c>)
 80160a2:	f44f 7289 	mov.w	r2, #274	@ 0x112
 80160a6:	491d      	ldr	r1, [pc, #116]	@ (801611c <netconn_getaddr+0x90>)
 80160a8:	481d      	ldr	r0, [pc, #116]	@ (8016120 <netconn_getaddr+0x94>)
 80160aa:	f014 fb57 	bl	802a75c <iprintf>
 80160ae:	f06f 030f 	mvn.w	r3, #15
 80160b2:	e02d      	b.n	8016110 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
 80160b4:	68bb      	ldr	r3, [r7, #8]
 80160b6:	2b00      	cmp	r3, #0
 80160b8:	d109      	bne.n	80160ce <netconn_getaddr+0x42>
 80160ba:	4b17      	ldr	r3, [pc, #92]	@ (8016118 <netconn_getaddr+0x8c>)
 80160bc:	f240 1213 	movw	r2, #275	@ 0x113
 80160c0:	4918      	ldr	r1, [pc, #96]	@ (8016124 <netconn_getaddr+0x98>)
 80160c2:	4817      	ldr	r0, [pc, #92]	@ (8016120 <netconn_getaddr+0x94>)
 80160c4:	f014 fb4a 	bl	802a75c <iprintf>
 80160c8:	f06f 030f 	mvn.w	r3, #15
 80160cc:	e020      	b.n	8016110 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
 80160ce:	687b      	ldr	r3, [r7, #4]
 80160d0:	2b00      	cmp	r3, #0
 80160d2:	d109      	bne.n	80160e8 <netconn_getaddr+0x5c>
 80160d4:	4b10      	ldr	r3, [pc, #64]	@ (8016118 <netconn_getaddr+0x8c>)
 80160d6:	f44f 728a 	mov.w	r2, #276	@ 0x114
 80160da:	4913      	ldr	r1, [pc, #76]	@ (8016128 <netconn_getaddr+0x9c>)
 80160dc:	4810      	ldr	r0, [pc, #64]	@ (8016120 <netconn_getaddr+0x94>)
 80160de:	f014 fb3d 	bl	802a75c <iprintf>
 80160e2:	f06f 030f 	mvn.w	r3, #15
 80160e6:	e013      	b.n	8016110 <netconn_getaddr+0x84>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80160e8:	68fb      	ldr	r3, [r7, #12]
 80160ea:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.ad.local = local;
 80160ec:	78fb      	ldrb	r3, [r7, #3]
 80160ee:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
#if LWIP_MPU_COMPATIBLE
  err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
  *addr = msg->msg.ad.ipaddr;
  *port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
  msg.msg.ad.ipaddr = addr;
 80160f2:	68bb      	ldr	r3, [r7, #8]
 80160f4:	61fb      	str	r3, [r7, #28]
  msg.msg.ad.port = port;
 80160f6:	687b      	ldr	r3, [r7, #4]
 80160f8:	623b      	str	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
 80160fa:	f107 0314 	add.w	r3, r7, #20
 80160fe:	4619      	mov	r1, r3
 8016100:	480a      	ldr	r0, [pc, #40]	@ (801612c <netconn_getaddr+0xa0>)
 8016102:	f7ff fee9 	bl	8015ed8 <netconn_apimsg>
 8016106:	4603      	mov	r3, r0
 8016108:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
  API_MSG_VAR_FREE(msg);

  return err;
 801610c:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016110:	4618      	mov	r0, r3
 8016112:	3738      	adds	r7, #56	@ 0x38
 8016114:	46bd      	mov	sp, r7
 8016116:	bd80      	pop	{r7, pc}
 8016118:	0802da68 	.word	0x0802da68
 801611c:	0802db40 	.word	0x0802db40
 8016120:	0802dac0 	.word	0x0802dac0
 8016124:	0802db60 	.word	0x0802db60
 8016128:	0802db80 	.word	0x0802db80
 801612c:	08018041 	.word	0x08018041

08016130 <netconn_connect>:
 * @param port the remote port to connect to (no used for RAW)
 * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
 */
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
 8016130:	b580      	push	{r7, lr}
 8016132:	b08e      	sub	sp, #56	@ 0x38
 8016134:	af00      	add	r7, sp, #0
 8016136:	60f8      	str	r0, [r7, #12]
 8016138:	60b9      	str	r1, [r7, #8]
 801613a:	4613      	mov	r3, r2
 801613c:	80fb      	strh	r3, [r7, #6]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
 801613e:	68fb      	ldr	r3, [r7, #12]
 8016140:	2b00      	cmp	r3, #0
 8016142:	d109      	bne.n	8016158 <netconn_connect+0x28>
 8016144:	4b11      	ldr	r3, [pc, #68]	@ (801618c <netconn_connect+0x5c>)
 8016146:	f44f 72bf 	mov.w	r2, #382	@ 0x17e
 801614a:	4911      	ldr	r1, [pc, #68]	@ (8016190 <netconn_connect+0x60>)
 801614c:	4811      	ldr	r0, [pc, #68]	@ (8016194 <netconn_connect+0x64>)
 801614e:	f014 fb05 	bl	802a75c <iprintf>
 8016152:	f06f 030f 	mvn.w	r3, #15
 8016156:	e015      	b.n	8016184 <netconn_connect+0x54>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
  if (addr == NULL) {
 8016158:	68bb      	ldr	r3, [r7, #8]
 801615a:	2b00      	cmp	r3, #0
 801615c:	d101      	bne.n	8016162 <netconn_connect+0x32>
    addr = IP4_ADDR_ANY;
 801615e:	4b0e      	ldr	r3, [pc, #56]	@ (8016198 <netconn_connect+0x68>)
 8016160:	60bb      	str	r3, [r7, #8]
  }
#endif /* LWIP_IPV4 */

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8016162:	68fb      	ldr	r3, [r7, #12]
 8016164:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
 8016166:	68bb      	ldr	r3, [r7, #8]
 8016168:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.bc.port = port;
 801616a:	88fb      	ldrh	r3, [r7, #6]
 801616c:	843b      	strh	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
 801616e:	f107 0314 	add.w	r3, r7, #20
 8016172:	4619      	mov	r1, r3
 8016174:	4809      	ldr	r0, [pc, #36]	@ (801619c <netconn_connect+0x6c>)
 8016176:	f7ff feaf 	bl	8015ed8 <netconn_apimsg>
 801617a:	4603      	mov	r3, r0
 801617c:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  API_MSG_VAR_FREE(msg);

  return err;
 8016180:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016184:	4618      	mov	r0, r3
 8016186:	3738      	adds	r7, #56	@ 0x38
 8016188:	46bd      	mov	sp, r7
 801618a:	bd80      	pop	{r7, pc}
 801618c:	0802da68 	.word	0x0802da68
 8016190:	0802dbdc 	.word	0x0802dbdc
 8016194:	0802dac0 	.word	0x0802dac0
 8016198:	08031b58 	.word	0x08031b58
 801619c:	080178d1 	.word	0x080178d1

080161a0 <netconn_disconnect>:
 * @param conn the netconn to disconnect
 * @return See @ref err_t
 */
err_t
netconn_disconnect(struct netconn *conn)
{
 80161a0:	b580      	push	{r7, lr}
 80161a2:	b08c      	sub	sp, #48	@ 0x30
 80161a4:	af00      	add	r7, sp, #0
 80161a6:	6078      	str	r0, [r7, #4]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
 80161a8:	687b      	ldr	r3, [r7, #4]
 80161aa:	2b00      	cmp	r3, #0
 80161ac:	d109      	bne.n	80161c2 <netconn_disconnect+0x22>
 80161ae:	4b0d      	ldr	r3, [pc, #52]	@ (80161e4 <netconn_disconnect+0x44>)
 80161b0:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 80161b4:	490c      	ldr	r1, [pc, #48]	@ (80161e8 <netconn_disconnect+0x48>)
 80161b6:	480d      	ldr	r0, [pc, #52]	@ (80161ec <netconn_disconnect+0x4c>)
 80161b8:	f014 fad0 	bl	802a75c <iprintf>
 80161bc:	f06f 030f 	mvn.w	r3, #15
 80161c0:	e00c      	b.n	80161dc <netconn_disconnect+0x3c>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80161c2:	687b      	ldr	r3, [r7, #4]
 80161c4:	60fb      	str	r3, [r7, #12]
  err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
 80161c6:	f107 030c 	add.w	r3, r7, #12
 80161ca:	4619      	mov	r1, r3
 80161cc:	4808      	ldr	r0, [pc, #32]	@ (80161f0 <netconn_disconnect+0x50>)
 80161ce:	f7ff fe83 	bl	8015ed8 <netconn_apimsg>
 80161d2:	4603      	mov	r3, r0
 80161d4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 80161d8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80161dc:	4618      	mov	r0, r3
 80161de:	3730      	adds	r7, #48	@ 0x30
 80161e0:	46bd      	mov	sp, r7
 80161e2:	bd80      	pop	{r7, pc}
 80161e4:	0802da68 	.word	0x0802da68
 80161e8:	0802dbfc 	.word	0x0802dbfc
 80161ec:	0802dac0 	.word	0x0802dac0
 80161f0:	08017a51 	.word	0x08017a51

080161f4 <netconn_recv_data>:
 *         ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
 *         ERR_TIMEOUT if the netconn has a receive timeout and no data was received
 */
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
 80161f4:	b580      	push	{r7, lr}
 80161f6:	b08a      	sub	sp, #40	@ 0x28
 80161f8:	af00      	add	r7, sp, #0
 80161fa:	60f8      	str	r0, [r7, #12]
 80161fc:	60b9      	str	r1, [r7, #8]
 80161fe:	4613      	mov	r3, r2
 8016200:	71fb      	strb	r3, [r7, #7]
  void *buf = NULL;
 8016202:	2300      	movs	r3, #0
 8016204:	61bb      	str	r3, [r7, #24]
  u16_t len;

  LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
 8016206:	68bb      	ldr	r3, [r7, #8]
 8016208:	2b00      	cmp	r3, #0
 801620a:	d109      	bne.n	8016220 <netconn_recv_data+0x2c>
 801620c:	4b64      	ldr	r3, [pc, #400]	@ (80163a0 <netconn_recv_data+0x1ac>)
 801620e:	f44f 7212 	mov.w	r2, #584	@ 0x248
 8016212:	4964      	ldr	r1, [pc, #400]	@ (80163a4 <netconn_recv_data+0x1b0>)
 8016214:	4864      	ldr	r0, [pc, #400]	@ (80163a8 <netconn_recv_data+0x1b4>)
 8016216:	f014 faa1 	bl	802a75c <iprintf>
 801621a:	f06f 030f 	mvn.w	r3, #15
 801621e:	e0bb      	b.n	8016398 <netconn_recv_data+0x1a4>
  *new_buf = NULL;
 8016220:	68bb      	ldr	r3, [r7, #8]
 8016222:	2200      	movs	r2, #0
 8016224:	601a      	str	r2, [r3, #0]
  LWIP_ERROR("netconn_recv: invalid conn",    (conn != NULL),    return ERR_ARG;);
 8016226:	68fb      	ldr	r3, [r7, #12]
 8016228:	2b00      	cmp	r3, #0
 801622a:	d109      	bne.n	8016240 <netconn_recv_data+0x4c>
 801622c:	4b5c      	ldr	r3, [pc, #368]	@ (80163a0 <netconn_recv_data+0x1ac>)
 801622e:	f240 224a 	movw	r2, #586	@ 0x24a
 8016232:	495e      	ldr	r1, [pc, #376]	@ (80163ac <netconn_recv_data+0x1b8>)
 8016234:	485c      	ldr	r0, [pc, #368]	@ (80163a8 <netconn_recv_data+0x1b4>)
 8016236:	f014 fa91 	bl	802a75c <iprintf>
 801623a:	f06f 030f 	mvn.w	r3, #15
 801623e:	e0ab      	b.n	8016398 <netconn_recv_data+0x1a4>

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 8016240:	68fb      	ldr	r3, [r7, #12]
 8016242:	3310      	adds	r3, #16
 8016244:	4618      	mov	r0, r3
 8016246:	f010 fee9 	bl	802701c <sys_mbox_valid>
 801624a:	4603      	mov	r3, r0
 801624c:	2b00      	cmp	r3, #0
 801624e:	d10e      	bne.n	801626e <netconn_recv_data+0x7a>
    err_t err = netconn_err(conn);
 8016250:	68f8      	ldr	r0, [r7, #12]
 8016252:	f000 fb1f 	bl	8016894 <netconn_err>
 8016256:	4603      	mov	r3, r0
 8016258:	77fb      	strb	r3, [r7, #31]
    if (err != ERR_OK) {
 801625a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801625e:	2b00      	cmp	r3, #0
 8016260:	d002      	beq.n	8016268 <netconn_recv_data+0x74>
      /* return pending error */
      return err;
 8016262:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016266:	e097      	b.n	8016398 <netconn_recv_data+0x1a4>
    }
    return ERR_CONN;
 8016268:	f06f 030a 	mvn.w	r3, #10
 801626c:	e094      	b.n	8016398 <netconn_recv_data+0x1a4>
  }

  NETCONN_MBOX_WAITING_INC(conn);
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 801626e:	68fb      	ldr	r3, [r7, #12]
 8016270:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016274:	f003 0302 	and.w	r3, r3, #2
 8016278:	2b00      	cmp	r3, #0
 801627a:	d110      	bne.n	801629e <netconn_recv_data+0xaa>
 801627c:	79fb      	ldrb	r3, [r7, #7]
 801627e:	f003 0304 	and.w	r3, r3, #4
 8016282:	2b00      	cmp	r3, #0
 8016284:	d10b      	bne.n	801629e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8016286:	68fb      	ldr	r3, [r7, #12]
 8016288:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801628c:	f003 0301 	and.w	r3, r3, #1
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8016290:	2b00      	cmp	r3, #0
 8016292:	d104      	bne.n	801629e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8016294:	68fb      	ldr	r3, [r7, #12]
 8016296:	f993 3008 	ldrsb.w	r3, [r3, #8]
 801629a:	2b00      	cmp	r3, #0
 801629c:	d025      	beq.n	80162ea <netconn_recv_data+0xf6>
    if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
 801629e:	68fb      	ldr	r3, [r7, #12]
 80162a0:	3310      	adds	r3, #16
 80162a2:	f107 0218 	add.w	r2, r7, #24
 80162a6:	4611      	mov	r1, r2
 80162a8:	4618      	mov	r0, r3
 80162aa:	f010 fea0 	bl	8026fee <sys_arch_mbox_tryfetch>
 80162ae:	4603      	mov	r3, r0
 80162b0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80162b4:	d12a      	bne.n	801630c <netconn_recv_data+0x118>
      err_t err;
      NETCONN_MBOX_WAITING_DEC(conn);
      err = netconn_err(conn);
 80162b6:	68f8      	ldr	r0, [r7, #12]
 80162b8:	f000 faec 	bl	8016894 <netconn_err>
 80162bc:	4603      	mov	r3, r0
 80162be:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
      if (err != ERR_OK) {
 80162c2:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 80162c6:	2b00      	cmp	r3, #0
 80162c8:	d002      	beq.n	80162d0 <netconn_recv_data+0xdc>
        /* return pending error */
        return err;
 80162ca:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 80162ce:	e063      	b.n	8016398 <netconn_recv_data+0x1a4>
      }
      if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
 80162d0:	68fb      	ldr	r3, [r7, #12]
 80162d2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80162d6:	f003 0301 	and.w	r3, r3, #1
 80162da:	2b00      	cmp	r3, #0
 80162dc:	d002      	beq.n	80162e4 <netconn_recv_data+0xf0>
        return ERR_CONN;
 80162de:	f06f 030a 	mvn.w	r3, #10
 80162e2:	e059      	b.n	8016398 <netconn_recv_data+0x1a4>
      }
      return ERR_WOULDBLOCK;
 80162e4:	f06f 0306 	mvn.w	r3, #6
 80162e8:	e056      	b.n	8016398 <netconn_recv_data+0x1a4>
    }
  } else {
#if LWIP_SO_RCVTIMEO
    if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
 80162ea:	68fb      	ldr	r3, [r7, #12]
 80162ec:	f103 0010 	add.w	r0, r3, #16
 80162f0:	68fb      	ldr	r3, [r7, #12]
 80162f2:	69da      	ldr	r2, [r3, #28]
 80162f4:	f107 0318 	add.w	r3, r7, #24
 80162f8:	4619      	mov	r1, r3
 80162fa:	f010 fe47 	bl	8026f8c <sys_arch_mbox_fetch>
 80162fe:	4603      	mov	r3, r0
 8016300:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016304:	d102      	bne.n	801630c <netconn_recv_data+0x118>
      NETCONN_MBOX_WAITING_DEC(conn);
      return ERR_TIMEOUT;
 8016306:	f06f 0302 	mvn.w	r3, #2
 801630a:	e045      	b.n	8016398 <netconn_recv_data+0x1a4>
  }
#endif

#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
  if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
 801630c:	68fb      	ldr	r3, [r7, #12]
 801630e:	781b      	ldrb	r3, [r3, #0]
 8016310:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016314:	2b10      	cmp	r3, #16
 8016316:	d117      	bne.n	8016348 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
  {
    err_t err;
    /* Check if this is an error message or a pbuf */
    if (lwip_netconn_is_err_msg(buf, &err)) {
 8016318:	69bb      	ldr	r3, [r7, #24]
 801631a:	f107 0217 	add.w	r2, r7, #23
 801631e:	4611      	mov	r1, r2
 8016320:	4618      	mov	r0, r3
 8016322:	f000 fb09 	bl	8016938 <lwip_netconn_is_err_msg>
 8016326:	4603      	mov	r3, r0
 8016328:	2b00      	cmp	r3, #0
 801632a:	d009      	beq.n	8016340 <netconn_recv_data+0x14c>
      /* new_buf has been zeroed above already */
      if (err == ERR_CLSD) {
 801632c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016330:	f113 0f0f 	cmn.w	r3, #15
 8016334:	d101      	bne.n	801633a <netconn_recv_data+0x146>
        /* connection closed translates to ERR_OK with *new_buf == NULL */
        return ERR_OK;
 8016336:	2300      	movs	r3, #0
 8016338:	e02e      	b.n	8016398 <netconn_recv_data+0x1a4>
      }
      return err;
 801633a:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801633e:	e02b      	b.n	8016398 <netconn_recv_data+0x1a4>
    }
    len = ((struct pbuf *)buf)->tot_len;
 8016340:	69bb      	ldr	r3, [r7, #24]
 8016342:	891b      	ldrh	r3, [r3, #8]
 8016344:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8016346:	e00d      	b.n	8016364 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
  else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
  {
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8016348:	69bb      	ldr	r3, [r7, #24]
 801634a:	2b00      	cmp	r3, #0
 801634c:	d106      	bne.n	801635c <netconn_recv_data+0x168>
 801634e:	4b14      	ldr	r3, [pc, #80]	@ (80163a0 <netconn_recv_data+0x1ac>)
 8016350:	f240 2291 	movw	r2, #657	@ 0x291
 8016354:	4916      	ldr	r1, [pc, #88]	@ (80163b0 <netconn_recv_data+0x1bc>)
 8016356:	4814      	ldr	r0, [pc, #80]	@ (80163a8 <netconn_recv_data+0x1b4>)
 8016358:	f014 fa00 	bl	802a75c <iprintf>
    len = netbuf_len((struct netbuf *)buf);
 801635c:	69bb      	ldr	r3, [r7, #24]
 801635e:	681b      	ldr	r3, [r3, #0]
 8016360:	891b      	ldrh	r3, [r3, #8]
 8016362:	84fb      	strh	r3, [r7, #38]	@ 0x26
  }
#endif /* (LWIP_UDP || LWIP_RAW) */

#if LWIP_SO_RCVBUF
  SYS_ARCH_DEC(conn->recv_avail, len);
 8016364:	f010 ff64 	bl	8027230 <sys_arch_protect>
 8016368:	6238      	str	r0, [r7, #32]
 801636a:	68fb      	ldr	r3, [r7, #12]
 801636c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801636e:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8016370:	1ad2      	subs	r2, r2, r3
 8016372:	68fb      	ldr	r3, [r7, #12]
 8016374:	625a      	str	r2, [r3, #36]	@ 0x24
 8016376:	6a38      	ldr	r0, [r7, #32]
 8016378:	f010 ff68 	bl	802724c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
  /* Register event with callback */
  API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
 801637c:	68fb      	ldr	r3, [r7, #12]
 801637e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016380:	2b00      	cmp	r3, #0
 8016382:	d005      	beq.n	8016390 <netconn_recv_data+0x19c>
 8016384:	68fb      	ldr	r3, [r7, #12]
 8016386:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016388:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 801638a:	2101      	movs	r1, #1
 801638c:	68f8      	ldr	r0, [r7, #12]
 801638e:	4798      	blx	r3

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));

  *new_buf = buf;
 8016390:	69ba      	ldr	r2, [r7, #24]
 8016392:	68bb      	ldr	r3, [r7, #8]
 8016394:	601a      	str	r2, [r3, #0]
  /* don't set conn->last_err: it's only ERR_OK, anyway */
  return ERR_OK;
 8016396:	2300      	movs	r3, #0
}
 8016398:	4618      	mov	r0, r3
 801639a:	3728      	adds	r7, #40	@ 0x28
 801639c:	46bd      	mov	sp, r7
 801639e:	bd80      	pop	{r7, pc}
 80163a0:	0802da68 	.word	0x0802da68
 80163a4:	0802dc80 	.word	0x0802dc80
 80163a8:	0802dac0 	.word	0x0802dac0
 80163ac:	0802dca0 	.word	0x0802dca0
 80163b0:	0802dcbc 	.word	0x0802dcbc

080163b4 <netconn_tcp_recvd_msg>:

#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
 80163b4:	b580      	push	{r7, lr}
 80163b6:	b084      	sub	sp, #16
 80163b8:	af00      	add	r7, sp, #0
 80163ba:	60f8      	str	r0, [r7, #12]
 80163bc:	60b9      	str	r1, [r7, #8]
 80163be:	607a      	str	r2, [r7, #4]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 80163c0:	68fb      	ldr	r3, [r7, #12]
 80163c2:	2b00      	cmp	r3, #0
 80163c4:	d005      	beq.n	80163d2 <netconn_tcp_recvd_msg+0x1e>
 80163c6:	68fb      	ldr	r3, [r7, #12]
 80163c8:	781b      	ldrb	r3, [r3, #0]
 80163ca:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80163ce:	2b10      	cmp	r3, #16
 80163d0:	d009      	beq.n	80163e6 <netconn_tcp_recvd_msg+0x32>
 80163d2:	4b0c      	ldr	r3, [pc, #48]	@ (8016404 <netconn_tcp_recvd_msg+0x50>)
 80163d4:	f240 22a7 	movw	r2, #679	@ 0x2a7
 80163d8:	490b      	ldr	r1, [pc, #44]	@ (8016408 <netconn_tcp_recvd_msg+0x54>)
 80163da:	480c      	ldr	r0, [pc, #48]	@ (801640c <netconn_tcp_recvd_msg+0x58>)
 80163dc:	f014 f9be 	bl	802a75c <iprintf>
 80163e0:	f06f 030f 	mvn.w	r3, #15
 80163e4:	e00a      	b.n	80163fc <netconn_tcp_recvd_msg+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  msg->conn = conn;
 80163e6:	687b      	ldr	r3, [r7, #4]
 80163e8:	68fa      	ldr	r2, [r7, #12]
 80163ea:	601a      	str	r2, [r3, #0]
  msg->msg.r.len = len;
 80163ec:	687b      	ldr	r3, [r7, #4]
 80163ee:	68ba      	ldr	r2, [r7, #8]
 80163f0:	609a      	str	r2, [r3, #8]

  return netconn_apimsg(lwip_netconn_do_recv, msg);
 80163f2:	6879      	ldr	r1, [r7, #4]
 80163f4:	4806      	ldr	r0, [pc, #24]	@ (8016410 <netconn_tcp_recvd_msg+0x5c>)
 80163f6:	f7ff fd6f 	bl	8015ed8 <netconn_apimsg>
 80163fa:	4603      	mov	r3, r0
}
 80163fc:	4618      	mov	r0, r3
 80163fe:	3710      	adds	r7, #16
 8016400:	46bd      	mov	sp, r7
 8016402:	bd80      	pop	{r7, pc}
 8016404:	0802da68 	.word	0x0802da68
 8016408:	0802dcc8 	.word	0x0802dcc8
 801640c:	0802dac0 	.word	0x0802dac0
 8016410:	08017b27 	.word	0x08017b27

08016414 <netconn_tcp_recvd>:

err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
 8016414:	b580      	push	{r7, lr}
 8016416:	b08c      	sub	sp, #48	@ 0x30
 8016418:	af00      	add	r7, sp, #0
 801641a:	6078      	str	r0, [r7, #4]
 801641c:	6039      	str	r1, [r7, #0]
  err_t err;
  API_MSG_VAR_DECLARE(msg);
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 801641e:	687b      	ldr	r3, [r7, #4]
 8016420:	2b00      	cmp	r3, #0
 8016422:	d005      	beq.n	8016430 <netconn_tcp_recvd+0x1c>
 8016424:	687b      	ldr	r3, [r7, #4]
 8016426:	781b      	ldrb	r3, [r3, #0]
 8016428:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801642c:	2b10      	cmp	r3, #16
 801642e:	d009      	beq.n	8016444 <netconn_tcp_recvd+0x30>
 8016430:	4b0c      	ldr	r3, [pc, #48]	@ (8016464 <netconn_tcp_recvd+0x50>)
 8016432:	f240 22b5 	movw	r2, #693	@ 0x2b5
 8016436:	490c      	ldr	r1, [pc, #48]	@ (8016468 <netconn_tcp_recvd+0x54>)
 8016438:	480c      	ldr	r0, [pc, #48]	@ (801646c <netconn_tcp_recvd+0x58>)
 801643a:	f014 f98f 	bl	802a75c <iprintf>
 801643e:	f06f 030f 	mvn.w	r3, #15
 8016442:	e00b      	b.n	801645c <netconn_tcp_recvd+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  API_MSG_VAR_ALLOC(msg);
  err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
 8016444:	f107 030c 	add.w	r3, r7, #12
 8016448:	461a      	mov	r2, r3
 801644a:	6839      	ldr	r1, [r7, #0]
 801644c:	6878      	ldr	r0, [r7, #4]
 801644e:	f7ff ffb1 	bl	80163b4 <netconn_tcp_recvd_msg>
 8016452:	4603      	mov	r3, r0
 8016454:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);
  return err;
 8016458:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801645c:	4618      	mov	r0, r3
 801645e:	3730      	adds	r7, #48	@ 0x30
 8016460:	46bd      	mov	sp, r7
 8016462:	bd80      	pop	{r7, pc}
 8016464:	0802da68 	.word	0x0802da68
 8016468:	0802dcc8 	.word	0x0802dcc8
 801646c:	0802dac0 	.word	0x0802dac0

08016470 <netconn_recv_data_tcp>:

static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8016470:	b580      	push	{r7, lr}
 8016472:	b090      	sub	sp, #64	@ 0x40
 8016474:	af00      	add	r7, sp, #0
 8016476:	60f8      	str	r0, [r7, #12]
 8016478:	60b9      	str	r1, [r7, #8]
 801647a:	4613      	mov	r3, r2
 801647c:	71fb      	strb	r3, [r7, #7]
  API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
  msg = NULL;
#endif

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 801647e:	68fb      	ldr	r3, [r7, #12]
 8016480:	3310      	adds	r3, #16
 8016482:	4618      	mov	r0, r3
 8016484:	f010 fdca 	bl	802701c <sys_mbox_valid>
 8016488:	4603      	mov	r3, r0
 801648a:	2b00      	cmp	r3, #0
 801648c:	d102      	bne.n	8016494 <netconn_recv_data_tcp+0x24>
    /* This only happens when calling this function more than once *after* receiving FIN */
    return ERR_CONN;
 801648e:	f06f 030a 	mvn.w	r3, #10
 8016492:	e072      	b.n	801657a <netconn_recv_data_tcp+0x10a>
  }
  if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
 8016494:	68fb      	ldr	r3, [r7, #12]
 8016496:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801649a:	b25b      	sxtb	r3, r3
 801649c:	2b00      	cmp	r3, #0
 801649e:	da09      	bge.n	80164b4 <netconn_recv_data_tcp+0x44>
    netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
 80164a0:	68fb      	ldr	r3, [r7, #12]
 80164a2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80164a6:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80164aa:	b2da      	uxtb	r2, r3
 80164ac:	68fb      	ldr	r3, [r7, #12]
 80164ae:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
    goto handle_fin;
 80164b2:	e03b      	b.n	801652c <netconn_recv_data_tcp+0xbc>
    /* need to allocate API message here so empty message pool does not result in event loss
      * see bug #47512: MPU_COMPATIBLE may fail on empty pool */
    API_MSG_VAR_ALLOC(msg);
  }

  err = netconn_recv_data(conn, (void **)new_buf, apiflags);
 80164b4:	79fb      	ldrb	r3, [r7, #7]
 80164b6:	461a      	mov	r2, r3
 80164b8:	68b9      	ldr	r1, [r7, #8]
 80164ba:	68f8      	ldr	r0, [r7, #12]
 80164bc:	f7ff fe9a 	bl	80161f4 <netconn_recv_data>
 80164c0:	4603      	mov	r3, r0
 80164c2:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  if (err != ERR_OK) {
 80164c6:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80164ca:	2b00      	cmp	r3, #0
 80164cc:	d002      	beq.n	80164d4 <netconn_recv_data_tcp+0x64>
    if (!(apiflags & NETCONN_NOAUTORCVD)) {
      API_MSG_VAR_FREE(msg);
    }
    return err;
 80164ce:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80164d2:	e052      	b.n	801657a <netconn_recv_data_tcp+0x10a>
  }
  buf = *new_buf;
 80164d4:	68bb      	ldr	r3, [r7, #8]
 80164d6:	681b      	ldr	r3, [r3, #0]
 80164d8:	63bb      	str	r3, [r7, #56]	@ 0x38
  if (!(apiflags & NETCONN_NOAUTORCVD)) {
 80164da:	79fb      	ldrb	r3, [r7, #7]
 80164dc:	f003 0308 	and.w	r3, r3, #8
 80164e0:	2b00      	cmp	r3, #0
 80164e2:	d10e      	bne.n	8016502 <netconn_recv_data_tcp+0x92>
    /* Let the stack know that we have taken the data. */
    u16_t len = buf ? buf->tot_len : 1;
 80164e4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80164e6:	2b00      	cmp	r3, #0
 80164e8:	d002      	beq.n	80164f0 <netconn_recv_data_tcp+0x80>
 80164ea:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80164ec:	891b      	ldrh	r3, [r3, #8]
 80164ee:	e000      	b.n	80164f2 <netconn_recv_data_tcp+0x82>
 80164f0:	2301      	movs	r3, #1
 80164f2:	86fb      	strh	r3, [r7, #54]	@ 0x36
    /* don't care for the return value of lwip_netconn_do_recv */
    /* @todo: this should really be fixed, e.g. by retrying in poll on error */
    netconn_tcp_recvd_msg(conn, len,  &API_VAR_REF(msg));
 80164f4:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 80164f6:	f107 0214 	add.w	r2, r7, #20
 80164fa:	4619      	mov	r1, r3
 80164fc:	68f8      	ldr	r0, [r7, #12]
 80164fe:	f7ff ff59 	bl	80163b4 <netconn_tcp_recvd_msg>
    API_MSG_VAR_FREE(msg);
  }

  /* If we are closed, we indicate that we no longer wish to use the socket */
  if (buf == NULL) {
 8016502:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8016504:	2b00      	cmp	r3, #0
 8016506:	d136      	bne.n	8016576 <netconn_recv_data_tcp+0x106>
    if (apiflags & NETCONN_NOFIN) {
 8016508:	79fb      	ldrb	r3, [r7, #7]
 801650a:	f003 0310 	and.w	r3, r3, #16
 801650e:	2b00      	cmp	r3, #0
 8016510:	d00b      	beq.n	801652a <netconn_recv_data_tcp+0xba>
      /* received a FIN but the caller cannot handle it right now:
         re-enqueue it and return "no data" */
      netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
 8016512:	68fb      	ldr	r3, [r7, #12]
 8016514:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016518:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 801651c:	b2da      	uxtb	r2, r3
 801651e:	68fb      	ldr	r3, [r7, #12]
 8016520:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      return ERR_WOULDBLOCK;
 8016524:	f06f 0306 	mvn.w	r3, #6
 8016528:	e027      	b.n	801657a <netconn_recv_data_tcp+0x10a>
    } else {
handle_fin:
 801652a:	bf00      	nop
      API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
 801652c:	68fb      	ldr	r3, [r7, #12]
 801652e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016530:	2b00      	cmp	r3, #0
 8016532:	d005      	beq.n	8016540 <netconn_recv_data_tcp+0xd0>
 8016534:	68fb      	ldr	r3, [r7, #12]
 8016536:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016538:	2200      	movs	r2, #0
 801653a:	2101      	movs	r1, #1
 801653c:	68f8      	ldr	r0, [r7, #12]
 801653e:	4798      	blx	r3
      if (conn->pcb.ip == NULL) {
 8016540:	68fb      	ldr	r3, [r7, #12]
 8016542:	685b      	ldr	r3, [r3, #4]
 8016544:	2b00      	cmp	r3, #0
 8016546:	d10f      	bne.n	8016568 <netconn_recv_data_tcp+0xf8>
        /* race condition: RST during recv */
        err = netconn_err(conn);
 8016548:	68f8      	ldr	r0, [r7, #12]
 801654a:	f000 f9a3 	bl	8016894 <netconn_err>
 801654e:	4603      	mov	r3, r0
 8016550:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
        if (err != ERR_OK) {
 8016554:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8016558:	2b00      	cmp	r3, #0
 801655a:	d002      	beq.n	8016562 <netconn_recv_data_tcp+0xf2>
          return err;
 801655c:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8016560:	e00b      	b.n	801657a <netconn_recv_data_tcp+0x10a>
        }
        return ERR_RST;
 8016562:	f06f 030d 	mvn.w	r3, #13
 8016566:	e008      	b.n	801657a <netconn_recv_data_tcp+0x10a>
      }
      /* RX side is closed, so deallocate the recvmbox */
      netconn_close_shutdown(conn, NETCONN_SHUT_RD);
 8016568:	2101      	movs	r1, #1
 801656a:	68f8      	ldr	r0, [r7, #12]
 801656c:	f000 f962 	bl	8016834 <netconn_close_shutdown>
      /* Don' store ERR_CLSD as conn->err since we are only half-closed */
      return ERR_CLSD;
 8016570:	f06f 030e 	mvn.w	r3, #14
 8016574:	e001      	b.n	801657a <netconn_recv_data_tcp+0x10a>
    }
  }
  return err;
 8016576:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 801657a:	4618      	mov	r0, r3
 801657c:	3740      	adds	r7, #64	@ 0x40
 801657e:	46bd      	mov	sp, r7
 8016580:	bd80      	pop	{r7, pc}
	...

08016584 <netconn_recv_tcp_pbuf_flags>:
 *                memory error or another error, @see netconn_recv_data)
 *         ERR_ARG if conn is not a TCP netconn
 */
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8016584:	b580      	push	{r7, lr}
 8016586:	b084      	sub	sp, #16
 8016588:	af00      	add	r7, sp, #0
 801658a:	60f8      	str	r0, [r7, #12]
 801658c:	60b9      	str	r1, [r7, #8]
 801658e:	4613      	mov	r3, r2
 8016590:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8016592:	68fb      	ldr	r3, [r7, #12]
 8016594:	2b00      	cmp	r3, #0
 8016596:	d005      	beq.n	80165a4 <netconn_recv_tcp_pbuf_flags+0x20>
 8016598:	68fb      	ldr	r3, [r7, #12]
 801659a:	781b      	ldrb	r3, [r3, #0]
 801659c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80165a0:	2b10      	cmp	r3, #16
 80165a2:	d009      	beq.n	80165b8 <netconn_recv_tcp_pbuf_flags+0x34>
 80165a4:	4b0a      	ldr	r3, [pc, #40]	@ (80165d0 <netconn_recv_tcp_pbuf_flags+0x4c>)
 80165a6:	f240 3225 	movw	r2, #805	@ 0x325
 80165aa:	490a      	ldr	r1, [pc, #40]	@ (80165d4 <netconn_recv_tcp_pbuf_flags+0x50>)
 80165ac:	480a      	ldr	r0, [pc, #40]	@ (80165d8 <netconn_recv_tcp_pbuf_flags+0x54>)
 80165ae:	f014 f8d5 	bl	802a75c <iprintf>
 80165b2:	f06f 030f 	mvn.w	r3, #15
 80165b6:	e006      	b.n	80165c6 <netconn_recv_tcp_pbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data_tcp(conn, new_buf, apiflags);
 80165b8:	79fb      	ldrb	r3, [r7, #7]
 80165ba:	461a      	mov	r2, r3
 80165bc:	68b9      	ldr	r1, [r7, #8]
 80165be:	68f8      	ldr	r0, [r7, #12]
 80165c0:	f7ff ff56 	bl	8016470 <netconn_recv_data_tcp>
 80165c4:	4603      	mov	r3, r0
}
 80165c6:	4618      	mov	r0, r3
 80165c8:	3710      	adds	r7, #16
 80165ca:	46bd      	mov	sp, r7
 80165cc:	bd80      	pop	{r7, pc}
 80165ce:	bf00      	nop
 80165d0:	0802da68 	.word	0x0802da68
 80165d4:	0802dcc8 	.word	0x0802dcc8
 80165d8:	0802dac0 	.word	0x0802dac0

080165dc <netconn_recv_udp_raw_netbuf_flags>:
 *                memory error or another error)
 *         ERR_ARG if conn is not a UDP/RAW netconn
 */
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
 80165dc:	b580      	push	{r7, lr}
 80165de:	b084      	sub	sp, #16
 80165e0:	af00      	add	r7, sp, #0
 80165e2:	60f8      	str	r0, [r7, #12]
 80165e4:	60b9      	str	r1, [r7, #8]
 80165e6:	4613      	mov	r3, r2
 80165e8:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
 80165ea:	68fb      	ldr	r3, [r7, #12]
 80165ec:	2b00      	cmp	r3, #0
 80165ee:	d005      	beq.n	80165fc <netconn_recv_udp_raw_netbuf_flags+0x20>
 80165f0:	68fb      	ldr	r3, [r7, #12]
 80165f2:	781b      	ldrb	r3, [r3, #0]
 80165f4:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80165f8:	2b10      	cmp	r3, #16
 80165fa:	d109      	bne.n	8016610 <netconn_recv_udp_raw_netbuf_flags+0x34>
 80165fc:	4b0a      	ldr	r3, [pc, #40]	@ (8016628 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
 80165fe:	f44f 7253 	mov.w	r2, #844	@ 0x34c
 8016602:	490a      	ldr	r1, [pc, #40]	@ (801662c <netconn_recv_udp_raw_netbuf_flags+0x50>)
 8016604:	480a      	ldr	r0, [pc, #40]	@ (8016630 <netconn_recv_udp_raw_netbuf_flags+0x54>)
 8016606:	f014 f8a9 	bl	802a75c <iprintf>
 801660a:	f06f 030f 	mvn.w	r3, #15
 801660e:	e006      	b.n	801661e <netconn_recv_udp_raw_netbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data(conn, (void **)new_buf, apiflags);
 8016610:	79fb      	ldrb	r3, [r7, #7]
 8016612:	461a      	mov	r2, r3
 8016614:	68b9      	ldr	r1, [r7, #8]
 8016616:	68f8      	ldr	r0, [r7, #12]
 8016618:	f7ff fdec 	bl	80161f4 <netconn_recv_data>
 801661c:	4603      	mov	r3, r0
}
 801661e:	4618      	mov	r0, r3
 8016620:	3710      	adds	r7, #16
 8016622:	46bd      	mov	sp, r7
 8016624:	bd80      	pop	{r7, pc}
 8016626:	bf00      	nop
 8016628:	0802da68 	.word	0x0802da68
 801662c:	0802dcec 	.word	0x0802dcec
 8016630:	0802dac0 	.word	0x0802dac0

08016634 <netconn_send>:
 * @param buf a netbuf containing the data to send
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
 8016634:	b580      	push	{r7, lr}
 8016636:	b08c      	sub	sp, #48	@ 0x30
 8016638:	af00      	add	r7, sp, #0
 801663a:	6078      	str	r0, [r7, #4]
 801663c:	6039      	str	r1, [r7, #0]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_send: invalid conn",  (conn != NULL), return ERR_ARG;);
 801663e:	687b      	ldr	r3, [r7, #4]
 8016640:	2b00      	cmp	r3, #0
 8016642:	d109      	bne.n	8016658 <netconn_send+0x24>
 8016644:	4b0e      	ldr	r3, [pc, #56]	@ (8016680 <netconn_send+0x4c>)
 8016646:	f240 32b2 	movw	r2, #946	@ 0x3b2
 801664a:	490e      	ldr	r1, [pc, #56]	@ (8016684 <netconn_send+0x50>)
 801664c:	480e      	ldr	r0, [pc, #56]	@ (8016688 <netconn_send+0x54>)
 801664e:	f014 f885 	bl	802a75c <iprintf>
 8016652:	f06f 030f 	mvn.w	r3, #15
 8016656:	e00e      	b.n	8016676 <netconn_send+0x42>

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8016658:	687b      	ldr	r3, [r7, #4]
 801665a:	60fb      	str	r3, [r7, #12]
  API_MSG_VAR_REF(msg).msg.b = buf;
 801665c:	683b      	ldr	r3, [r7, #0]
 801665e:	617b      	str	r3, [r7, #20]
  err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
 8016660:	f107 030c 	add.w	r3, r7, #12
 8016664:	4619      	mov	r1, r3
 8016666:	4809      	ldr	r0, [pc, #36]	@ (801668c <netconn_send+0x58>)
 8016668:	f7ff fc36 	bl	8015ed8 <netconn_apimsg>
 801666c:	4603      	mov	r3, r0
 801666e:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8016672:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8016676:	4618      	mov	r0, r3
 8016678:	3730      	adds	r7, #48	@ 0x30
 801667a:	46bd      	mov	sp, r7
 801667c:	bd80      	pop	{r7, pc}
 801667e:	bf00      	nop
 8016680:	0802da68 	.word	0x0802da68
 8016684:	0802dd24 	.word	0x0802dd24
 8016688:	0802dac0 	.word	0x0802dac0
 801668c:	08017a8d 	.word	0x08017a8d

08016690 <netconn_write_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
                     u8_t apiflags, size_t *bytes_written)
{
 8016690:	b580      	push	{r7, lr}
 8016692:	b088      	sub	sp, #32
 8016694:	af02      	add	r7, sp, #8
 8016696:	60f8      	str	r0, [r7, #12]
 8016698:	60b9      	str	r1, [r7, #8]
 801669a:	607a      	str	r2, [r7, #4]
 801669c:	70fb      	strb	r3, [r7, #3]
  struct netvector vector;
  vector.ptr = dataptr;
 801669e:	68bb      	ldr	r3, [r7, #8]
 80166a0:	613b      	str	r3, [r7, #16]
  vector.len = size;
 80166a2:	687b      	ldr	r3, [r7, #4]
 80166a4:	617b      	str	r3, [r7, #20]
  return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
 80166a6:	78fa      	ldrb	r2, [r7, #3]
 80166a8:	f107 0110 	add.w	r1, r7, #16
 80166ac:	6a3b      	ldr	r3, [r7, #32]
 80166ae:	9300      	str	r3, [sp, #0]
 80166b0:	4613      	mov	r3, r2
 80166b2:	2201      	movs	r2, #1
 80166b4:	68f8      	ldr	r0, [r7, #12]
 80166b6:	f000 f805 	bl	80166c4 <netconn_write_vectors_partly>
 80166ba:	4603      	mov	r3, r0
}
 80166bc:	4618      	mov	r0, r3
 80166be:	3718      	adds	r7, #24
 80166c0:	46bd      	mov	sp, r7
 80166c2:	bd80      	pop	{r7, pc}

080166c4 <netconn_write_vectors_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
                             u8_t apiflags, size_t *bytes_written)
{
 80166c4:	b580      	push	{r7, lr}
 80166c6:	b092      	sub	sp, #72	@ 0x48
 80166c8:	af00      	add	r7, sp, #0
 80166ca:	60f8      	str	r0, [r7, #12]
 80166cc:	60b9      	str	r1, [r7, #8]
 80166ce:	4611      	mov	r1, r2
 80166d0:	461a      	mov	r2, r3
 80166d2:	460b      	mov	r3, r1
 80166d4:	80fb      	strh	r3, [r7, #6]
 80166d6:	4613      	mov	r3, r2
 80166d8:	717b      	strb	r3, [r7, #5]
  err_t err;
  u8_t dontblock;
  size_t size;
  int i;

  LWIP_ERROR("netconn_write: invalid conn",  (conn != NULL), return ERR_ARG;);
 80166da:	68fb      	ldr	r3, [r7, #12]
 80166dc:	2b00      	cmp	r3, #0
 80166de:	d109      	bne.n	80166f4 <netconn_write_vectors_partly+0x30>
 80166e0:	4b4e      	ldr	r3, [pc, #312]	@ (801681c <netconn_write_vectors_partly+0x158>)
 80166e2:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 80166e6:	494e      	ldr	r1, [pc, #312]	@ (8016820 <netconn_write_vectors_partly+0x15c>)
 80166e8:	484e      	ldr	r0, [pc, #312]	@ (8016824 <netconn_write_vectors_partly+0x160>)
 80166ea:	f014 f837 	bl	802a75c <iprintf>
 80166ee:	f06f 030f 	mvn.w	r3, #15
 80166f2:	e08f      	b.n	8016814 <netconn_write_vectors_partly+0x150>
  LWIP_ERROR("netconn_write: invalid conn->type",  (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
 80166f4:	68fb      	ldr	r3, [r7, #12]
 80166f6:	781b      	ldrb	r3, [r3, #0]
 80166f8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80166fc:	2b10      	cmp	r3, #16
 80166fe:	d009      	beq.n	8016714 <netconn_write_vectors_partly+0x50>
 8016700:	4b46      	ldr	r3, [pc, #280]	@ (801681c <netconn_write_vectors_partly+0x158>)
 8016702:	f240 32ef 	movw	r2, #1007	@ 0x3ef
 8016706:	4948      	ldr	r1, [pc, #288]	@ (8016828 <netconn_write_vectors_partly+0x164>)
 8016708:	4846      	ldr	r0, [pc, #280]	@ (8016824 <netconn_write_vectors_partly+0x160>)
 801670a:	f014 f827 	bl	802a75c <iprintf>
 801670e:	f06f 0305 	mvn.w	r3, #5
 8016712:	e07f      	b.n	8016814 <netconn_write_vectors_partly+0x150>
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8016714:	68fb      	ldr	r3, [r7, #12]
 8016716:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801671a:	f003 0302 	and.w	r3, r3, #2
 801671e:	2b00      	cmp	r3, #0
 8016720:	d104      	bne.n	801672c <netconn_write_vectors_partly+0x68>
 8016722:	797b      	ldrb	r3, [r7, #5]
 8016724:	f003 0304 	and.w	r3, r3, #4
 8016728:	2b00      	cmp	r3, #0
 801672a:	d001      	beq.n	8016730 <netconn_write_vectors_partly+0x6c>
 801672c:	2301      	movs	r3, #1
 801672e:	e000      	b.n	8016732 <netconn_write_vectors_partly+0x6e>
 8016730:	2300      	movs	r3, #0
 8016732:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
#if LWIP_SO_SNDTIMEO
  if (conn->send_timeout != 0) {
    dontblock = 1;
  }
#endif /* LWIP_SO_SNDTIMEO */
  if (dontblock && !bytes_written) {
 8016736:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 801673a:	2b00      	cmp	r3, #0
 801673c:	d005      	beq.n	801674a <netconn_write_vectors_partly+0x86>
 801673e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016740:	2b00      	cmp	r3, #0
 8016742:	d102      	bne.n	801674a <netconn_write_vectors_partly+0x86>
    /* This implies netconn_write() cannot be used for non-blocking send, since
       it has no way to return the number of bytes written. */
    return ERR_VAL;
 8016744:	f06f 0305 	mvn.w	r3, #5
 8016748:	e064      	b.n	8016814 <netconn_write_vectors_partly+0x150>
  }

  /* sum up the total size */
  size = 0;
 801674a:	2300      	movs	r3, #0
 801674c:	647b      	str	r3, [r7, #68]	@ 0x44
  for (i = 0; i < vectorcnt; i++) {
 801674e:	2300      	movs	r3, #0
 8016750:	643b      	str	r3, [r7, #64]	@ 0x40
 8016752:	e015      	b.n	8016780 <netconn_write_vectors_partly+0xbc>
    size += vectors[i].len;
 8016754:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8016756:	00db      	lsls	r3, r3, #3
 8016758:	68ba      	ldr	r2, [r7, #8]
 801675a:	4413      	add	r3, r2
 801675c:	685b      	ldr	r3, [r3, #4]
 801675e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8016760:	4413      	add	r3, r2
 8016762:	647b      	str	r3, [r7, #68]	@ 0x44
    if (size < vectors[i].len) {
 8016764:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8016766:	00db      	lsls	r3, r3, #3
 8016768:	68ba      	ldr	r2, [r7, #8]
 801676a:	4413      	add	r3, r2
 801676c:	685b      	ldr	r3, [r3, #4]
 801676e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8016770:	429a      	cmp	r2, r3
 8016772:	d202      	bcs.n	801677a <netconn_write_vectors_partly+0xb6>
      /* overflow */
      return ERR_VAL;
 8016774:	f06f 0305 	mvn.w	r3, #5
 8016778:	e04c      	b.n	8016814 <netconn_write_vectors_partly+0x150>
  for (i = 0; i < vectorcnt; i++) {
 801677a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801677c:	3301      	adds	r3, #1
 801677e:	643b      	str	r3, [r7, #64]	@ 0x40
 8016780:	88fb      	ldrh	r3, [r7, #6]
 8016782:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8016784:	429a      	cmp	r2, r3
 8016786:	dbe5      	blt.n	8016754 <netconn_write_vectors_partly+0x90>
    }
  }
  if (size == 0) {
 8016788:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801678a:	2b00      	cmp	r3, #0
 801678c:	d101      	bne.n	8016792 <netconn_write_vectors_partly+0xce>
    return ERR_OK;
 801678e:	2300      	movs	r3, #0
 8016790:	e040      	b.n	8016814 <netconn_write_vectors_partly+0x150>
  } else if (size > SSIZE_MAX) {
 8016792:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8016794:	2b00      	cmp	r3, #0
 8016796:	da0a      	bge.n	80167ae <netconn_write_vectors_partly+0xea>
    ssize_t limited;
    /* this is required by the socket layer (cannot send full size_t range) */
    if (!bytes_written) {
 8016798:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 801679a:	2b00      	cmp	r3, #0
 801679c:	d102      	bne.n	80167a4 <netconn_write_vectors_partly+0xe0>
      return ERR_VAL;
 801679e:	f06f 0305 	mvn.w	r3, #5
 80167a2:	e037      	b.n	8016814 <netconn_write_vectors_partly+0x150>
    }
    /* limit the amount of data to send */
    limited = SSIZE_MAX;
 80167a4:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 80167a8:	63bb      	str	r3, [r7, #56]	@ 0x38
    size = (size_t)limited;
 80167aa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80167ac:	647b      	str	r3, [r7, #68]	@ 0x44
  }

  API_MSG_VAR_ALLOC(msg);
  /* non-blocking write sends as much  */
  API_MSG_VAR_REF(msg).conn = conn;
 80167ae:	68fb      	ldr	r3, [r7, #12]
 80167b0:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.w.vector = vectors;
 80167b2:	68bb      	ldr	r3, [r7, #8]
 80167b4:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
 80167b6:	88fb      	ldrh	r3, [r7, #6]
 80167b8:	843b      	strh	r3, [r7, #32]
  API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
 80167ba:	2300      	movs	r3, #0
 80167bc:	627b      	str	r3, [r7, #36]	@ 0x24
  API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
 80167be:	797b      	ldrb	r3, [r7, #5]
 80167c0:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  API_MSG_VAR_REF(msg).msg.w.len = size;
 80167c4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80167c6:	62bb      	str	r3, [r7, #40]	@ 0x28
  API_MSG_VAR_REF(msg).msg.w.offset = 0;
 80167c8:	2300      	movs	r3, #0
 80167ca:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif /* LWIP_SO_SNDTIMEO */

  /* For locking the core: this _can_ be delayed on low memory/low send buffer,
     but if it is, this is done inside api_msg.c:do_write(), so we can use the
     non-blocking version here. */
  err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
 80167cc:	f107 0314 	add.w	r3, r7, #20
 80167d0:	4619      	mov	r1, r3
 80167d2:	4816      	ldr	r0, [pc, #88]	@ (801682c <netconn_write_vectors_partly+0x168>)
 80167d4:	f7ff fb80 	bl	8015ed8 <netconn_apimsg>
 80167d8:	4603      	mov	r3, r0
 80167da:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  if (err == ERR_OK) {
 80167de:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
 80167e2:	2b00      	cmp	r3, #0
 80167e4:	d114      	bne.n	8016810 <netconn_write_vectors_partly+0x14c>
    if (bytes_written != NULL) {
 80167e6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80167e8:	2b00      	cmp	r3, #0
 80167ea:	d002      	beq.n	80167f2 <netconn_write_vectors_partly+0x12e>
      *bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
 80167ec:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80167ee:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80167f0:	601a      	str	r2, [r3, #0]
    }
    /* for blocking, check all requested bytes were written, NOTE: send_timeout is
       treated as dontblock (see dontblock assignment above) */
    if (!dontblock) {
 80167f2:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 80167f6:	2b00      	cmp	r3, #0
 80167f8:	d10a      	bne.n	8016810 <netconn_write_vectors_partly+0x14c>
      LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
 80167fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80167fc:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80167fe:	429a      	cmp	r2, r3
 8016800:	d006      	beq.n	8016810 <netconn_write_vectors_partly+0x14c>
 8016802:	4b06      	ldr	r3, [pc, #24]	@ (801681c <netconn_write_vectors_partly+0x158>)
 8016804:	f44f 6286 	mov.w	r2, #1072	@ 0x430
 8016808:	4909      	ldr	r1, [pc, #36]	@ (8016830 <netconn_write_vectors_partly+0x16c>)
 801680a:	4806      	ldr	r0, [pc, #24]	@ (8016824 <netconn_write_vectors_partly+0x160>)
 801680c:	f013 ffa6 	bl	802a75c <iprintf>
    }
  }
  API_MSG_VAR_FREE(msg);

  return err;
 8016810:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016814:	4618      	mov	r0, r3
 8016816:	3748      	adds	r7, #72	@ 0x48
 8016818:	46bd      	mov	sp, r7
 801681a:	bd80      	pop	{r7, pc}
 801681c:	0802da68 	.word	0x0802da68
 8016820:	0802dd40 	.word	0x0802dd40
 8016824:	0802dac0 	.word	0x0802dac0
 8016828:	0802dd5c 	.word	0x0802dd5c
 801682c:	08017f31 	.word	0x08017f31
 8016830:	0802dd80 	.word	0x0802dd80

08016834 <netconn_close_shutdown>:
 * @param how fully close or only shutdown one side?
 * @return ERR_OK if the netconn was closed, any other err_t on error
 */
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
 8016834:	b580      	push	{r7, lr}
 8016836:	b08c      	sub	sp, #48	@ 0x30
 8016838:	af00      	add	r7, sp, #0
 801683a:	6078      	str	r0, [r7, #4]
 801683c:	460b      	mov	r3, r1
 801683e:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;
  LWIP_UNUSED_ARG(how);

  LWIP_ERROR("netconn_close: invalid conn",  (conn != NULL), return ERR_ARG;);
 8016840:	687b      	ldr	r3, [r7, #4]
 8016842:	2b00      	cmp	r3, #0
 8016844:	d109      	bne.n	801685a <netconn_close_shutdown+0x26>
 8016846:	4b0f      	ldr	r3, [pc, #60]	@ (8016884 <netconn_close_shutdown+0x50>)
 8016848:	f240 4247 	movw	r2, #1095	@ 0x447
 801684c:	490e      	ldr	r1, [pc, #56]	@ (8016888 <netconn_close_shutdown+0x54>)
 801684e:	480f      	ldr	r0, [pc, #60]	@ (801688c <netconn_close_shutdown+0x58>)
 8016850:	f013 ff84 	bl	802a75c <iprintf>
 8016854:	f06f 030f 	mvn.w	r3, #15
 8016858:	e010      	b.n	801687c <netconn_close_shutdown+0x48>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 801685a:	687b      	ldr	r3, [r7, #4]
 801685c:	60fb      	str	r3, [r7, #12]
#if LWIP_TCP
  /* shutting down both ends is the same as closing */
  API_MSG_VAR_REF(msg).msg.sd.shut = how;
 801685e:	78fb      	ldrb	r3, [r7, #3]
 8016860:	753b      	strb	r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8016862:	2329      	movs	r3, #41	@ 0x29
 8016864:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
  err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
 8016866:	f107 030c 	add.w	r3, r7, #12
 801686a:	4619      	mov	r1, r3
 801686c:	4808      	ldr	r0, [pc, #32]	@ (8016890 <netconn_close_shutdown+0x5c>)
 801686e:	f7ff fb33 	bl	8015ed8 <netconn_apimsg>
 8016872:	4603      	mov	r3, r0
 8016874:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8016878:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801687c:	4618      	mov	r0, r3
 801687e:	3730      	adds	r7, #48	@ 0x30
 8016880:	46bd      	mov	sp, r7
 8016882:	bd80      	pop	{r7, pc}
 8016884:	0802da68 	.word	0x0802da68
 8016888:	0802dda4 	.word	0x0802dda4
 801688c:	0802dac0 	.word	0x0802dac0
 8016890:	0801814d 	.word	0x0801814d

08016894 <netconn_err>:
 * @param conn the netconn to get the error from
 * @return and pending error or ERR_OK if no error was pending
 */
err_t
netconn_err(struct netconn *conn)
{
 8016894:	b580      	push	{r7, lr}
 8016896:	b084      	sub	sp, #16
 8016898:	af00      	add	r7, sp, #0
 801689a:	6078      	str	r0, [r7, #4]
  err_t err;
  SYS_ARCH_DECL_PROTECT(lev);
  if (conn == NULL) {
 801689c:	687b      	ldr	r3, [r7, #4]
 801689e:	2b00      	cmp	r3, #0
 80168a0:	d101      	bne.n	80168a6 <netconn_err+0x12>
    return ERR_OK;
 80168a2:	2300      	movs	r3, #0
 80168a4:	e00d      	b.n	80168c2 <netconn_err+0x2e>
  }
  SYS_ARCH_PROTECT(lev);
 80168a6:	f010 fcc3 	bl	8027230 <sys_arch_protect>
 80168aa:	60f8      	str	r0, [r7, #12]
  err = conn->pending_err;
 80168ac:	687b      	ldr	r3, [r7, #4]
 80168ae:	7a1b      	ldrb	r3, [r3, #8]
 80168b0:	72fb      	strb	r3, [r7, #11]
  conn->pending_err = ERR_OK;
 80168b2:	687b      	ldr	r3, [r7, #4]
 80168b4:	2200      	movs	r2, #0
 80168b6:	721a      	strb	r2, [r3, #8]
  SYS_ARCH_UNPROTECT(lev);
 80168b8:	68f8      	ldr	r0, [r7, #12]
 80168ba:	f010 fcc7 	bl	802724c <sys_arch_unprotect>
  return err;
 80168be:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80168c2:	4618      	mov	r0, r3
 80168c4:	3710      	adds	r7, #16
 80168c6:	46bd      	mov	sp, r7
 80168c8:	bd80      	pop	{r7, pc}
	...

080168cc <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;

/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
 80168cc:	b580      	push	{r7, lr}
 80168ce:	b082      	sub	sp, #8
 80168d0:	af00      	add	r7, sp, #0
 80168d2:	4603      	mov	r3, r0
 80168d4:	71fb      	strb	r3, [r7, #7]
  switch (err) {
 80168d6:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80168da:	f113 0f0d 	cmn.w	r3, #13
 80168de:	d009      	beq.n	80168f4 <lwip_netconn_err_to_msg+0x28>
 80168e0:	f113 0f0d 	cmn.w	r3, #13
 80168e4:	dc0c      	bgt.n	8016900 <lwip_netconn_err_to_msg+0x34>
 80168e6:	f113 0f0f 	cmn.w	r3, #15
 80168ea:	d007      	beq.n	80168fc <lwip_netconn_err_to_msg+0x30>
 80168ec:	f113 0f0e 	cmn.w	r3, #14
 80168f0:	d002      	beq.n	80168f8 <lwip_netconn_err_to_msg+0x2c>
 80168f2:	e005      	b.n	8016900 <lwip_netconn_err_to_msg+0x34>
    case ERR_ABRT:
      return LWIP_CONST_CAST(void *, &netconn_aborted);
 80168f4:	4b0a      	ldr	r3, [pc, #40]	@ (8016920 <lwip_netconn_err_to_msg+0x54>)
 80168f6:	e00e      	b.n	8016916 <lwip_netconn_err_to_msg+0x4a>
    case ERR_RST:
      return LWIP_CONST_CAST(void *, &netconn_reset);
 80168f8:	4b0a      	ldr	r3, [pc, #40]	@ (8016924 <lwip_netconn_err_to_msg+0x58>)
 80168fa:	e00c      	b.n	8016916 <lwip_netconn_err_to_msg+0x4a>
    case ERR_CLSD:
      return LWIP_CONST_CAST(void *, &netconn_closed);
 80168fc:	4b0a      	ldr	r3, [pc, #40]	@ (8016928 <lwip_netconn_err_to_msg+0x5c>)
 80168fe:	e00a      	b.n	8016916 <lwip_netconn_err_to_msg+0x4a>
    default:
      LWIP_ASSERT("unhandled error", err == ERR_OK);
 8016900:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8016904:	2b00      	cmp	r3, #0
 8016906:	d005      	beq.n	8016914 <lwip_netconn_err_to_msg+0x48>
 8016908:	4b08      	ldr	r3, [pc, #32]	@ (801692c <lwip_netconn_err_to_msg+0x60>)
 801690a:	227d      	movs	r2, #125	@ 0x7d
 801690c:	4908      	ldr	r1, [pc, #32]	@ (8016930 <lwip_netconn_err_to_msg+0x64>)
 801690e:	4809      	ldr	r0, [pc, #36]	@ (8016934 <lwip_netconn_err_to_msg+0x68>)
 8016910:	f013 ff24 	bl	802a75c <iprintf>
      return NULL;
 8016914:	2300      	movs	r3, #0
  }
}
 8016916:	4618      	mov	r0, r3
 8016918:	3708      	adds	r7, #8
 801691a:	46bd      	mov	sp, r7
 801691c:	bd80      	pop	{r7, pc}
 801691e:	bf00      	nop
 8016920:	080319bc 	.word	0x080319bc
 8016924:	080319bd 	.word	0x080319bd
 8016928:	080319be 	.word	0x080319be
 801692c:	0802ddc0 	.word	0x0802ddc0
 8016930:	0802ddf4 	.word	0x0802ddf4
 8016934:	0802de04 	.word	0x0802de04

08016938 <lwip_netconn_is_err_msg>:

int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
 8016938:	b580      	push	{r7, lr}
 801693a:	b082      	sub	sp, #8
 801693c:	af00      	add	r7, sp, #0
 801693e:	6078      	str	r0, [r7, #4]
 8016940:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("err != NULL", err != NULL);
 8016942:	683b      	ldr	r3, [r7, #0]
 8016944:	2b00      	cmp	r3, #0
 8016946:	d105      	bne.n	8016954 <lwip_netconn_is_err_msg+0x1c>
 8016948:	4b12      	ldr	r3, [pc, #72]	@ (8016994 <lwip_netconn_is_err_msg+0x5c>)
 801694a:	2285      	movs	r2, #133	@ 0x85
 801694c:	4912      	ldr	r1, [pc, #72]	@ (8016998 <lwip_netconn_is_err_msg+0x60>)
 801694e:	4813      	ldr	r0, [pc, #76]	@ (801699c <lwip_netconn_is_err_msg+0x64>)
 8016950:	f013 ff04 	bl	802a75c <iprintf>

  if (msg == &netconn_aborted) {
 8016954:	687b      	ldr	r3, [r7, #4]
 8016956:	4a12      	ldr	r2, [pc, #72]	@ (80169a0 <lwip_netconn_is_err_msg+0x68>)
 8016958:	4293      	cmp	r3, r2
 801695a:	d104      	bne.n	8016966 <lwip_netconn_is_err_msg+0x2e>
    *err = ERR_ABRT;
 801695c:	683b      	ldr	r3, [r7, #0]
 801695e:	22f3      	movs	r2, #243	@ 0xf3
 8016960:	701a      	strb	r2, [r3, #0]
    return 1;
 8016962:	2301      	movs	r3, #1
 8016964:	e012      	b.n	801698c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_reset) {
 8016966:	687b      	ldr	r3, [r7, #4]
 8016968:	4a0e      	ldr	r2, [pc, #56]	@ (80169a4 <lwip_netconn_is_err_msg+0x6c>)
 801696a:	4293      	cmp	r3, r2
 801696c:	d104      	bne.n	8016978 <lwip_netconn_is_err_msg+0x40>
    *err = ERR_RST;
 801696e:	683b      	ldr	r3, [r7, #0]
 8016970:	22f2      	movs	r2, #242	@ 0xf2
 8016972:	701a      	strb	r2, [r3, #0]
    return 1;
 8016974:	2301      	movs	r3, #1
 8016976:	e009      	b.n	801698c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_closed) {
 8016978:	687b      	ldr	r3, [r7, #4]
 801697a:	4a0b      	ldr	r2, [pc, #44]	@ (80169a8 <lwip_netconn_is_err_msg+0x70>)
 801697c:	4293      	cmp	r3, r2
 801697e:	d104      	bne.n	801698a <lwip_netconn_is_err_msg+0x52>
    *err = ERR_CLSD;
 8016980:	683b      	ldr	r3, [r7, #0]
 8016982:	22f1      	movs	r2, #241	@ 0xf1
 8016984:	701a      	strb	r2, [r3, #0]
    return 1;
 8016986:	2301      	movs	r3, #1
 8016988:	e000      	b.n	801698c <lwip_netconn_is_err_msg+0x54>
  }
  return 0;
 801698a:	2300      	movs	r3, #0
}
 801698c:	4618      	mov	r0, r3
 801698e:	3708      	adds	r7, #8
 8016990:	46bd      	mov	sp, r7
 8016992:	bd80      	pop	{r7, pc}
 8016994:	0802ddc0 	.word	0x0802ddc0
 8016998:	0802de2c 	.word	0x0802de2c
 801699c:	0802de04 	.word	0x0802de04
 80169a0:	080319bc 	.word	0x080319bc
 80169a4:	080319bd 	.word	0x080319bd
 80169a8:	080319be 	.word	0x080319be

080169ac <recv_udp>:
 * @see udp.h (struct udp_pcb.recv) for parameters
 */
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
         const ip_addr_t *addr, u16_t port)
{
 80169ac:	b580      	push	{r7, lr}
 80169ae:	b08a      	sub	sp, #40	@ 0x28
 80169b0:	af00      	add	r7, sp, #0
 80169b2:	60f8      	str	r0, [r7, #12]
 80169b4:	60b9      	str	r1, [r7, #8]
 80169b6:	607a      	str	r2, [r7, #4]
 80169b8:	603b      	str	r3, [r7, #0]
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
  LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
 80169ba:	68bb      	ldr	r3, [r7, #8]
 80169bc:	2b00      	cmp	r3, #0
 80169be:	d105      	bne.n	80169cc <recv_udp+0x20>
 80169c0:	4b43      	ldr	r3, [pc, #268]	@ (8016ad0 <recv_udp+0x124>)
 80169c2:	22e5      	movs	r2, #229	@ 0xe5
 80169c4:	4943      	ldr	r1, [pc, #268]	@ (8016ad4 <recv_udp+0x128>)
 80169c6:	4844      	ldr	r0, [pc, #272]	@ (8016ad8 <recv_udp+0x12c>)
 80169c8:	f013 fec8 	bl	802a75c <iprintf>
  LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
 80169cc:	68fb      	ldr	r3, [r7, #12]
 80169ce:	2b00      	cmp	r3, #0
 80169d0:	d105      	bne.n	80169de <recv_udp+0x32>
 80169d2:	4b3f      	ldr	r3, [pc, #252]	@ (8016ad0 <recv_udp+0x124>)
 80169d4:	22e6      	movs	r2, #230	@ 0xe6
 80169d6:	4941      	ldr	r1, [pc, #260]	@ (8016adc <recv_udp+0x130>)
 80169d8:	483f      	ldr	r0, [pc, #252]	@ (8016ad8 <recv_udp+0x12c>)
 80169da:	f013 febf 	bl	802a75c <iprintf>
  conn = (struct netconn *)arg;
 80169de:	68fb      	ldr	r3, [r7, #12]
 80169e0:	627b      	str	r3, [r7, #36]	@ 0x24

  if (conn == NULL) {
 80169e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80169e4:	2b00      	cmp	r3, #0
 80169e6:	d103      	bne.n	80169f0 <recv_udp+0x44>
    pbuf_free(p);
 80169e8:	6878      	ldr	r0, [r7, #4]
 80169ea:	f004 fc3f 	bl	801b26c <pbuf_free>
    return;
 80169ee:	e06b      	b.n	8016ac8 <recv_udp+0x11c>
  }

  LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
 80169f0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80169f2:	685b      	ldr	r3, [r3, #4]
 80169f4:	68ba      	ldr	r2, [r7, #8]
 80169f6:	429a      	cmp	r2, r3
 80169f8:	d005      	beq.n	8016a06 <recv_udp+0x5a>
 80169fa:	4b35      	ldr	r3, [pc, #212]	@ (8016ad0 <recv_udp+0x124>)
 80169fc:	22ee      	movs	r2, #238	@ 0xee
 80169fe:	4938      	ldr	r1, [pc, #224]	@ (8016ae0 <recv_udp+0x134>)
 8016a00:	4835      	ldr	r0, [pc, #212]	@ (8016ad8 <recv_udp+0x12c>)
 8016a02:	f013 feab 	bl	802a75c <iprintf>

#if LWIP_SO_RCVBUF
  SYS_ARCH_GET(conn->recv_avail, recv_avail);
 8016a06:	f010 fc13 	bl	8027230 <sys_arch_protect>
 8016a0a:	6238      	str	r0, [r7, #32]
 8016a0c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016a0e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8016a10:	61fb      	str	r3, [r7, #28]
 8016a12:	6a38      	ldr	r0, [r7, #32]
 8016a14:	f010 fc1a 	bl	802724c <sys_arch_unprotect>
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016a18:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016a1a:	3310      	adds	r3, #16
 8016a1c:	4618      	mov	r0, r3
 8016a1e:	f010 fafd 	bl	802701c <sys_mbox_valid>
 8016a22:	4603      	mov	r3, r0
 8016a24:	2b00      	cmp	r3, #0
 8016a26:	d008      	beq.n	8016a3a <recv_udp+0x8e>
      ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
 8016a28:	687b      	ldr	r3, [r7, #4]
 8016a2a:	891b      	ldrh	r3, [r3, #8]
 8016a2c:	461a      	mov	r2, r3
 8016a2e:	69fb      	ldr	r3, [r7, #28]
 8016a30:	441a      	add	r2, r3
 8016a32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016a34:	6a1b      	ldr	r3, [r3, #32]
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016a36:	429a      	cmp	r2, r3
 8016a38:	dd03      	ble.n	8016a42 <recv_udp+0x96>
#else  /* LWIP_SO_RCVBUF */
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
    pbuf_free(p);
 8016a3a:	6878      	ldr	r0, [r7, #4]
 8016a3c:	f004 fc16 	bl	801b26c <pbuf_free>
    return;
 8016a40:	e042      	b.n	8016ac8 <recv_udp+0x11c>
  }

  buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
 8016a42:	2006      	movs	r0, #6
 8016a44:	f003 fcae 	bl	801a3a4 <memp_malloc>
 8016a48:	61b8      	str	r0, [r7, #24]
  if (buf == NULL) {
 8016a4a:	69bb      	ldr	r3, [r7, #24]
 8016a4c:	2b00      	cmp	r3, #0
 8016a4e:	d103      	bne.n	8016a58 <recv_udp+0xac>
    pbuf_free(p);
 8016a50:	6878      	ldr	r0, [r7, #4]
 8016a52:	f004 fc0b 	bl	801b26c <pbuf_free>
    return;
 8016a56:	e037      	b.n	8016ac8 <recv_udp+0x11c>
  } else {
    buf->p = p;
 8016a58:	69bb      	ldr	r3, [r7, #24]
 8016a5a:	687a      	ldr	r2, [r7, #4]
 8016a5c:	601a      	str	r2, [r3, #0]
    buf->ptr = p;
 8016a5e:	69bb      	ldr	r3, [r7, #24]
 8016a60:	687a      	ldr	r2, [r7, #4]
 8016a62:	605a      	str	r2, [r3, #4]
    ip_addr_set(&buf->addr, addr);
 8016a64:	683b      	ldr	r3, [r7, #0]
 8016a66:	2b00      	cmp	r3, #0
 8016a68:	d002      	beq.n	8016a70 <recv_udp+0xc4>
 8016a6a:	683b      	ldr	r3, [r7, #0]
 8016a6c:	681b      	ldr	r3, [r3, #0]
 8016a6e:	e000      	b.n	8016a72 <recv_udp+0xc6>
 8016a70:	2300      	movs	r3, #0
 8016a72:	69ba      	ldr	r2, [r7, #24]
 8016a74:	6093      	str	r3, [r2, #8]
    buf->port = port;
 8016a76:	69bb      	ldr	r3, [r7, #24]
 8016a78:	8e3a      	ldrh	r2, [r7, #48]	@ 0x30
 8016a7a:	819a      	strh	r2, [r3, #12]
      buf->toport_chksum = udphdr->dest;
    }
#endif /* LWIP_NETBUF_RECVINFO */
  }

  len = p->tot_len;
 8016a7c:	687b      	ldr	r3, [r7, #4]
 8016a7e:	891b      	ldrh	r3, [r3, #8]
 8016a80:	82fb      	strh	r3, [r7, #22]
  if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
 8016a82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016a84:	3310      	adds	r3, #16
 8016a86:	69b9      	ldr	r1, [r7, #24]
 8016a88:	4618      	mov	r0, r3
 8016a8a:	f010 fa65 	bl	8026f58 <sys_mbox_trypost>
 8016a8e:	4603      	mov	r3, r0
 8016a90:	2b00      	cmp	r3, #0
 8016a92:	d003      	beq.n	8016a9c <recv_udp+0xf0>
    netbuf_delete(buf);
 8016a94:	69b8      	ldr	r0, [r7, #24]
 8016a96:	f001 fbff 	bl	8018298 <netbuf_delete>
    return;
 8016a9a:	e015      	b.n	8016ac8 <recv_udp+0x11c>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8016a9c:	f010 fbc8 	bl	8027230 <sys_arch_protect>
 8016aa0:	6138      	str	r0, [r7, #16]
 8016aa2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016aa4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016aa6:	8afb      	ldrh	r3, [r7, #22]
 8016aa8:	441a      	add	r2, r3
 8016aaa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016aac:	625a      	str	r2, [r3, #36]	@ 0x24
 8016aae:	6938      	ldr	r0, [r7, #16]
 8016ab0:	f010 fbcc 	bl	802724c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8016ab4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016ab6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016ab8:	2b00      	cmp	r3, #0
 8016aba:	d005      	beq.n	8016ac8 <recv_udp+0x11c>
 8016abc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016abe:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016ac0:	8afa      	ldrh	r2, [r7, #22]
 8016ac2:	2100      	movs	r1, #0
 8016ac4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8016ac6:	4798      	blx	r3
  }
}
 8016ac8:	3728      	adds	r7, #40	@ 0x28
 8016aca:	46bd      	mov	sp, r7
 8016acc:	bd80      	pop	{r7, pc}
 8016ace:	bf00      	nop
 8016ad0:	0802ddc0 	.word	0x0802ddc0
 8016ad4:	0802de38 	.word	0x0802de38
 8016ad8:	0802de04 	.word	0x0802de04
 8016adc:	0802de5c 	.word	0x0802de5c
 8016ae0:	0802de7c 	.word	0x0802de7c

08016ae4 <recv_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.recv) for parameters and return value
 */
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 8016ae4:	b580      	push	{r7, lr}
 8016ae6:	b088      	sub	sp, #32
 8016ae8:	af00      	add	r7, sp, #0
 8016aea:	60f8      	str	r0, [r7, #12]
 8016aec:	60b9      	str	r1, [r7, #8]
 8016aee:	607a      	str	r2, [r7, #4]
 8016af0:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  u16_t len;
  void *msg;

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
 8016af2:	68bb      	ldr	r3, [r7, #8]
 8016af4:	2b00      	cmp	r3, #0
 8016af6:	d106      	bne.n	8016b06 <recv_tcp+0x22>
 8016af8:	4b3c      	ldr	r3, [pc, #240]	@ (8016bec <recv_tcp+0x108>)
 8016afa:	f44f 7296 	mov.w	r2, #300	@ 0x12c
 8016afe:	493c      	ldr	r1, [pc, #240]	@ (8016bf0 <recv_tcp+0x10c>)
 8016b00:	483c      	ldr	r0, [pc, #240]	@ (8016bf4 <recv_tcp+0x110>)
 8016b02:	f013 fe2b 	bl	802a75c <iprintf>
  LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
 8016b06:	68fb      	ldr	r3, [r7, #12]
 8016b08:	2b00      	cmp	r3, #0
 8016b0a:	d106      	bne.n	8016b1a <recv_tcp+0x36>
 8016b0c:	4b37      	ldr	r3, [pc, #220]	@ (8016bec <recv_tcp+0x108>)
 8016b0e:	f240 122d 	movw	r2, #301	@ 0x12d
 8016b12:	4939      	ldr	r1, [pc, #228]	@ (8016bf8 <recv_tcp+0x114>)
 8016b14:	4837      	ldr	r0, [pc, #220]	@ (8016bf4 <recv_tcp+0x110>)
 8016b16:	f013 fe21 	bl	802a75c <iprintf>
  LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
 8016b1a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8016b1e:	2b00      	cmp	r3, #0
 8016b20:	d006      	beq.n	8016b30 <recv_tcp+0x4c>
 8016b22:	4b32      	ldr	r3, [pc, #200]	@ (8016bec <recv_tcp+0x108>)
 8016b24:	f44f 7297 	mov.w	r2, #302	@ 0x12e
 8016b28:	4934      	ldr	r1, [pc, #208]	@ (8016bfc <recv_tcp+0x118>)
 8016b2a:	4832      	ldr	r0, [pc, #200]	@ (8016bf4 <recv_tcp+0x110>)
 8016b2c:	f013 fe16 	bl	802a75c <iprintf>
  LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
  conn = (struct netconn *)arg;
 8016b30:	68fb      	ldr	r3, [r7, #12]
 8016b32:	617b      	str	r3, [r7, #20]

  if (conn == NULL) {
 8016b34:	697b      	ldr	r3, [r7, #20]
 8016b36:	2b00      	cmp	r3, #0
 8016b38:	d102      	bne.n	8016b40 <recv_tcp+0x5c>
    return ERR_VAL;
 8016b3a:	f06f 0305 	mvn.w	r3, #5
 8016b3e:	e051      	b.n	8016be4 <recv_tcp+0x100>
  }
  LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
 8016b40:	697b      	ldr	r3, [r7, #20]
 8016b42:	685b      	ldr	r3, [r3, #4]
 8016b44:	68ba      	ldr	r2, [r7, #8]
 8016b46:	429a      	cmp	r2, r3
 8016b48:	d006      	beq.n	8016b58 <recv_tcp+0x74>
 8016b4a:	4b28      	ldr	r3, [pc, #160]	@ (8016bec <recv_tcp+0x108>)
 8016b4c:	f240 1235 	movw	r2, #309	@ 0x135
 8016b50:	492b      	ldr	r1, [pc, #172]	@ (8016c00 <recv_tcp+0x11c>)
 8016b52:	4828      	ldr	r0, [pc, #160]	@ (8016bf4 <recv_tcp+0x110>)
 8016b54:	f013 fe02 	bl	802a75c <iprintf>

  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8016b58:	697b      	ldr	r3, [r7, #20]
 8016b5a:	3310      	adds	r3, #16
 8016b5c:	4618      	mov	r0, r3
 8016b5e:	f010 fa5d 	bl	802701c <sys_mbox_valid>
 8016b62:	4603      	mov	r3, r0
 8016b64:	2b00      	cmp	r3, #0
 8016b66:	d10d      	bne.n	8016b84 <recv_tcp+0xa0>
    /* recvmbox already deleted */
    if (p != NULL) {
 8016b68:	687b      	ldr	r3, [r7, #4]
 8016b6a:	2b00      	cmp	r3, #0
 8016b6c:	d008      	beq.n	8016b80 <recv_tcp+0x9c>
      tcp_recved(pcb, p->tot_len);
 8016b6e:	687b      	ldr	r3, [r7, #4]
 8016b70:	891b      	ldrh	r3, [r3, #8]
 8016b72:	4619      	mov	r1, r3
 8016b74:	68b8      	ldr	r0, [r7, #8]
 8016b76:	f005 f9e5 	bl	801bf44 <tcp_recved>
      pbuf_free(p);
 8016b7a:	6878      	ldr	r0, [r7, #4]
 8016b7c:	f004 fb76 	bl	801b26c <pbuf_free>
    }
    return ERR_OK;
 8016b80:	2300      	movs	r3, #0
 8016b82:	e02f      	b.n	8016be4 <recv_tcp+0x100>
  }
  /* Unlike for UDP or RAW pcbs, don't check for available space
     using recv_avail since that could break the connection
     (data is already ACKed) */

  if (p != NULL) {
 8016b84:	687b      	ldr	r3, [r7, #4]
 8016b86:	2b00      	cmp	r3, #0
 8016b88:	d005      	beq.n	8016b96 <recv_tcp+0xb2>
    msg = p;
 8016b8a:	687b      	ldr	r3, [r7, #4]
 8016b8c:	61bb      	str	r3, [r7, #24]
    len = p->tot_len;
 8016b8e:	687b      	ldr	r3, [r7, #4]
 8016b90:	891b      	ldrh	r3, [r3, #8]
 8016b92:	83fb      	strh	r3, [r7, #30]
 8016b94:	e003      	b.n	8016b9e <recv_tcp+0xba>
  } else {
    msg = LWIP_CONST_CAST(void *, &netconn_closed);
 8016b96:	4b1b      	ldr	r3, [pc, #108]	@ (8016c04 <recv_tcp+0x120>)
 8016b98:	61bb      	str	r3, [r7, #24]
    len = 0;
 8016b9a:	2300      	movs	r3, #0
 8016b9c:	83fb      	strh	r3, [r7, #30]
  }

  if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
 8016b9e:	697b      	ldr	r3, [r7, #20]
 8016ba0:	3310      	adds	r3, #16
 8016ba2:	69b9      	ldr	r1, [r7, #24]
 8016ba4:	4618      	mov	r0, r3
 8016ba6:	f010 f9d7 	bl	8026f58 <sys_mbox_trypost>
 8016baa:	4603      	mov	r3, r0
 8016bac:	2b00      	cmp	r3, #0
 8016bae:	d002      	beq.n	8016bb6 <recv_tcp+0xd2>
    /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
    return ERR_MEM;
 8016bb0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8016bb4:	e016      	b.n	8016be4 <recv_tcp+0x100>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8016bb6:	f010 fb3b 	bl	8027230 <sys_arch_protect>
 8016bba:	6138      	str	r0, [r7, #16]
 8016bbc:	697b      	ldr	r3, [r7, #20]
 8016bbe:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016bc0:	8bfb      	ldrh	r3, [r7, #30]
 8016bc2:	441a      	add	r2, r3
 8016bc4:	697b      	ldr	r3, [r7, #20]
 8016bc6:	625a      	str	r2, [r3, #36]	@ 0x24
 8016bc8:	6938      	ldr	r0, [r7, #16]
 8016bca:	f010 fb3f 	bl	802724c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8016bce:	697b      	ldr	r3, [r7, #20]
 8016bd0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016bd2:	2b00      	cmp	r3, #0
 8016bd4:	d005      	beq.n	8016be2 <recv_tcp+0xfe>
 8016bd6:	697b      	ldr	r3, [r7, #20]
 8016bd8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016bda:	8bfa      	ldrh	r2, [r7, #30]
 8016bdc:	2100      	movs	r1, #0
 8016bde:	6978      	ldr	r0, [r7, #20]
 8016be0:	4798      	blx	r3
  }

  return ERR_OK;
 8016be2:	2300      	movs	r3, #0
}
 8016be4:	4618      	mov	r0, r3
 8016be6:	3720      	adds	r7, #32
 8016be8:	46bd      	mov	sp, r7
 8016bea:	bd80      	pop	{r7, pc}
 8016bec:	0802ddc0 	.word	0x0802ddc0
 8016bf0:	0802de9c 	.word	0x0802de9c
 8016bf4:	0802de04 	.word	0x0802de04
 8016bf8:	0802dec0 	.word	0x0802dec0
 8016bfc:	0802dee0 	.word	0x0802dee0
 8016c00:	0802def8 	.word	0x0802def8
 8016c04:	080319be 	.word	0x080319be

08016c08 <poll_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.poll) for parameters and return value
 */
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
 8016c08:	b580      	push	{r7, lr}
 8016c0a:	b084      	sub	sp, #16
 8016c0c:	af00      	add	r7, sp, #0
 8016c0e:	6078      	str	r0, [r7, #4]
 8016c10:	6039      	str	r1, [r7, #0]
  struct netconn *conn = (struct netconn *)arg;
 8016c12:	687b      	ldr	r3, [r7, #4]
 8016c14:	60fb      	str	r3, [r7, #12]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016c16:	68fb      	ldr	r3, [r7, #12]
 8016c18:	2b00      	cmp	r3, #0
 8016c1a:	d106      	bne.n	8016c2a <poll_tcp+0x22>
 8016c1c:	4b2b      	ldr	r3, [pc, #172]	@ (8016ccc <poll_tcp+0xc4>)
 8016c1e:	f44f 72b5 	mov.w	r2, #362	@ 0x16a
 8016c22:	492b      	ldr	r1, [pc, #172]	@ (8016cd0 <poll_tcp+0xc8>)
 8016c24:	482b      	ldr	r0, [pc, #172]	@ (8016cd4 <poll_tcp+0xcc>)
 8016c26:	f013 fd99 	bl	802a75c <iprintf>

  if (conn->state == NETCONN_WRITE) {
 8016c2a:	68fb      	ldr	r3, [r7, #12]
 8016c2c:	785b      	ldrb	r3, [r3, #1]
 8016c2e:	2b01      	cmp	r3, #1
 8016c30:	d104      	bne.n	8016c3c <poll_tcp+0x34>
    lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8016c32:	2101      	movs	r1, #1
 8016c34:	68f8      	ldr	r0, [r7, #12]
 8016c36:	f000 ffab 	bl	8017b90 <lwip_netconn_do_writemore>
 8016c3a:	e016      	b.n	8016c6a <poll_tcp+0x62>
  } else if (conn->state == NETCONN_CLOSE) {
 8016c3c:	68fb      	ldr	r3, [r7, #12]
 8016c3e:	785b      	ldrb	r3, [r3, #1]
 8016c40:	2b04      	cmp	r3, #4
 8016c42:	d112      	bne.n	8016c6a <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
    if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
 8016c44:	68fb      	ldr	r3, [r7, #12]
 8016c46:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c48:	2b00      	cmp	r3, #0
 8016c4a:	d00a      	beq.n	8016c62 <poll_tcp+0x5a>
 8016c4c:	68fb      	ldr	r3, [r7, #12]
 8016c4e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c50:	7a5b      	ldrb	r3, [r3, #9]
 8016c52:	2b00      	cmp	r3, #0
 8016c54:	d005      	beq.n	8016c62 <poll_tcp+0x5a>
      conn->current_msg->msg.sd.polls_left--;
 8016c56:	68fb      	ldr	r3, [r7, #12]
 8016c58:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016c5a:	7a5a      	ldrb	r2, [r3, #9]
 8016c5c:	3a01      	subs	r2, #1
 8016c5e:	b2d2      	uxtb	r2, r2
 8016c60:	725a      	strb	r2, [r3, #9]
    }
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
    lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8016c62:	2101      	movs	r1, #1
 8016c64:	68f8      	ldr	r0, [r7, #12]
 8016c66:	f000 fb53 	bl	8017310 <lwip_netconn_do_close_internal>
  }
  /* @todo: implement connect timeout here? */

  /* Did a nonblocking write fail before? Then check available write-space. */
  if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
 8016c6a:	68fb      	ldr	r3, [r7, #12]
 8016c6c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016c70:	f003 0310 	and.w	r3, r3, #16
 8016c74:	2b00      	cmp	r3, #0
 8016c76:	d024      	beq.n	8016cc2 <poll_tcp+0xba>
    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016c78:	68fb      	ldr	r3, [r7, #12]
 8016c7a:	685b      	ldr	r3, [r3, #4]
 8016c7c:	2b00      	cmp	r3, #0
 8016c7e:	d020      	beq.n	8016cc2 <poll_tcp+0xba>
 8016c80:	68fb      	ldr	r3, [r7, #12]
 8016c82:	685b      	ldr	r3, [r3, #4]
 8016c84:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016c88:	f640 3269 	movw	r2, #2921	@ 0xb69
 8016c8c:	4293      	cmp	r3, r2
 8016c8e:	d918      	bls.n	8016cc2 <poll_tcp+0xba>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8016c90:	68fb      	ldr	r3, [r7, #12]
 8016c92:	685b      	ldr	r3, [r3, #4]
 8016c94:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016c98:	2b07      	cmp	r3, #7
 8016c9a:	d812      	bhi.n	8016cc2 <poll_tcp+0xba>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8016c9c:	68fb      	ldr	r3, [r7, #12]
 8016c9e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016ca2:	f023 0310 	bic.w	r3, r3, #16
 8016ca6:	b2da      	uxtb	r2, r3
 8016ca8:	68fb      	ldr	r3, [r7, #12]
 8016caa:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016cae:	68fb      	ldr	r3, [r7, #12]
 8016cb0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016cb2:	2b00      	cmp	r3, #0
 8016cb4:	d005      	beq.n	8016cc2 <poll_tcp+0xba>
 8016cb6:	68fb      	ldr	r3, [r7, #12]
 8016cb8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016cba:	2200      	movs	r2, #0
 8016cbc:	2102      	movs	r1, #2
 8016cbe:	68f8      	ldr	r0, [r7, #12]
 8016cc0:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8016cc2:	2300      	movs	r3, #0
}
 8016cc4:	4618      	mov	r0, r3
 8016cc6:	3710      	adds	r7, #16
 8016cc8:	46bd      	mov	sp, r7
 8016cca:	bd80      	pop	{r7, pc}
 8016ccc:	0802ddc0 	.word	0x0802ddc0
 8016cd0:	0802df18 	.word	0x0802df18
 8016cd4:	0802de04 	.word	0x0802de04

08016cd8 <sent_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.sent) for parameters and return value
 */
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
 8016cd8:	b580      	push	{r7, lr}
 8016cda:	b086      	sub	sp, #24
 8016cdc:	af00      	add	r7, sp, #0
 8016cde:	60f8      	str	r0, [r7, #12]
 8016ce0:	60b9      	str	r1, [r7, #8]
 8016ce2:	4613      	mov	r3, r2
 8016ce4:	80fb      	strh	r3, [r7, #6]
  struct netconn *conn = (struct netconn *)arg;
 8016ce6:	68fb      	ldr	r3, [r7, #12]
 8016ce8:	617b      	str	r3, [r7, #20]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016cea:	697b      	ldr	r3, [r7, #20]
 8016cec:	2b00      	cmp	r3, #0
 8016cee:	d106      	bne.n	8016cfe <sent_tcp+0x26>
 8016cf0:	4b22      	ldr	r3, [pc, #136]	@ (8016d7c <sent_tcp+0xa4>)
 8016cf2:	f240 1293 	movw	r2, #403	@ 0x193
 8016cf6:	4922      	ldr	r1, [pc, #136]	@ (8016d80 <sent_tcp+0xa8>)
 8016cf8:	4822      	ldr	r0, [pc, #136]	@ (8016d84 <sent_tcp+0xac>)
 8016cfa:	f013 fd2f 	bl	802a75c <iprintf>

  if (conn) {
 8016cfe:	697b      	ldr	r3, [r7, #20]
 8016d00:	2b00      	cmp	r3, #0
 8016d02:	d035      	beq.n	8016d70 <sent_tcp+0x98>
    if (conn->state == NETCONN_WRITE) {
 8016d04:	697b      	ldr	r3, [r7, #20]
 8016d06:	785b      	ldrb	r3, [r3, #1]
 8016d08:	2b01      	cmp	r3, #1
 8016d0a:	d104      	bne.n	8016d16 <sent_tcp+0x3e>
      lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8016d0c:	2101      	movs	r1, #1
 8016d0e:	6978      	ldr	r0, [r7, #20]
 8016d10:	f000 ff3e 	bl	8017b90 <lwip_netconn_do_writemore>
 8016d14:	e007      	b.n	8016d26 <sent_tcp+0x4e>
    } else if (conn->state == NETCONN_CLOSE) {
 8016d16:	697b      	ldr	r3, [r7, #20]
 8016d18:	785b      	ldrb	r3, [r3, #1]
 8016d1a:	2b04      	cmp	r3, #4
 8016d1c:	d103      	bne.n	8016d26 <sent_tcp+0x4e>
      lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8016d1e:	2101      	movs	r1, #1
 8016d20:	6978      	ldr	r0, [r7, #20]
 8016d22:	f000 faf5 	bl	8017310 <lwip_netconn_do_close_internal>
    }

    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016d26:	697b      	ldr	r3, [r7, #20]
 8016d28:	685b      	ldr	r3, [r3, #4]
 8016d2a:	2b00      	cmp	r3, #0
 8016d2c:	d020      	beq.n	8016d70 <sent_tcp+0x98>
 8016d2e:	697b      	ldr	r3, [r7, #20]
 8016d30:	685b      	ldr	r3, [r3, #4]
 8016d32:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016d36:	f640 3269 	movw	r2, #2921	@ 0xb69
 8016d3a:	4293      	cmp	r3, r2
 8016d3c:	d918      	bls.n	8016d70 <sent_tcp+0x98>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8016d3e:	697b      	ldr	r3, [r7, #20]
 8016d40:	685b      	ldr	r3, [r3, #4]
 8016d42:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016d46:	2b07      	cmp	r3, #7
 8016d48:	d812      	bhi.n	8016d70 <sent_tcp+0x98>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8016d4a:	697b      	ldr	r3, [r7, #20]
 8016d4c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016d50:	f023 0310 	bic.w	r3, r3, #16
 8016d54:	b2da      	uxtb	r2, r3
 8016d56:	697b      	ldr	r3, [r7, #20]
 8016d58:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
 8016d5c:	697b      	ldr	r3, [r7, #20]
 8016d5e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016d60:	2b00      	cmp	r3, #0
 8016d62:	d005      	beq.n	8016d70 <sent_tcp+0x98>
 8016d64:	697b      	ldr	r3, [r7, #20]
 8016d66:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016d68:	88fa      	ldrh	r2, [r7, #6]
 8016d6a:	2102      	movs	r1, #2
 8016d6c:	6978      	ldr	r0, [r7, #20]
 8016d6e:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8016d70:	2300      	movs	r3, #0
}
 8016d72:	4618      	mov	r0, r3
 8016d74:	3718      	adds	r7, #24
 8016d76:	46bd      	mov	sp, r7
 8016d78:	bd80      	pop	{r7, pc}
 8016d7a:	bf00      	nop
 8016d7c:	0802ddc0 	.word	0x0802ddc0
 8016d80:	0802df18 	.word	0x0802df18
 8016d84:	0802de04 	.word	0x0802de04

08016d88 <err_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.err) for parameters
 */
static void
err_tcp(void *arg, err_t err)
{
 8016d88:	b580      	push	{r7, lr}
 8016d8a:	b088      	sub	sp, #32
 8016d8c:	af00      	add	r7, sp, #0
 8016d8e:	6078      	str	r0, [r7, #4]
 8016d90:	460b      	mov	r3, r1
 8016d92:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  enum netconn_state old_state;
  void *mbox_msg;
  SYS_ARCH_DECL_PROTECT(lev);

  conn = (struct netconn *)arg;
 8016d94:	687b      	ldr	r3, [r7, #4]
 8016d96:	61fb      	str	r3, [r7, #28]
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016d98:	69fb      	ldr	r3, [r7, #28]
 8016d9a:	2b00      	cmp	r3, #0
 8016d9c:	d106      	bne.n	8016dac <err_tcp+0x24>
 8016d9e:	4b61      	ldr	r3, [pc, #388]	@ (8016f24 <err_tcp+0x19c>)
 8016da0:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8016da4:	4960      	ldr	r1, [pc, #384]	@ (8016f28 <err_tcp+0x1a0>)
 8016da6:	4861      	ldr	r0, [pc, #388]	@ (8016f2c <err_tcp+0x1a4>)
 8016da8:	f013 fcd8 	bl	802a75c <iprintf>

  SYS_ARCH_PROTECT(lev);
 8016dac:	f010 fa40 	bl	8027230 <sys_arch_protect>
 8016db0:	61b8      	str	r0, [r7, #24]

  /* when err is called, the pcb is deallocated, so delete the reference */
  conn->pcb.tcp = NULL;
 8016db2:	69fb      	ldr	r3, [r7, #28]
 8016db4:	2200      	movs	r2, #0
 8016db6:	605a      	str	r2, [r3, #4]
  /* store pending error */
  conn->pending_err = err;
 8016db8:	69fb      	ldr	r3, [r7, #28]
 8016dba:	78fa      	ldrb	r2, [r7, #3]
 8016dbc:	721a      	strb	r2, [r3, #8]
  /* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
  conn->flags |= NETCONN_FLAG_MBOXCLOSED;
 8016dbe:	69fb      	ldr	r3, [r7, #28]
 8016dc0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016dc4:	f043 0301 	orr.w	r3, r3, #1
 8016dc8:	b2da      	uxtb	r2, r3
 8016dca:	69fb      	ldr	r3, [r7, #28]
 8016dcc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

  /* reset conn->state now before waking up other threads */
  old_state = conn->state;
 8016dd0:	69fb      	ldr	r3, [r7, #28]
 8016dd2:	785b      	ldrb	r3, [r3, #1]
 8016dd4:	75fb      	strb	r3, [r7, #23]
  conn->state = NETCONN_NONE;
 8016dd6:	69fb      	ldr	r3, [r7, #28]
 8016dd8:	2200      	movs	r2, #0
 8016dda:	705a      	strb	r2, [r3, #1]

  SYS_ARCH_UNPROTECT(lev);
 8016ddc:	69b8      	ldr	r0, [r7, #24]
 8016dde:	f010 fa35 	bl	802724c <sys_arch_unprotect>

  /* Notify the user layer about a connection error. Used to signal select. */
  API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 8016de2:	69fb      	ldr	r3, [r7, #28]
 8016de4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016de6:	2b00      	cmp	r3, #0
 8016de8:	d005      	beq.n	8016df6 <err_tcp+0x6e>
 8016dea:	69fb      	ldr	r3, [r7, #28]
 8016dec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016dee:	2200      	movs	r2, #0
 8016df0:	2104      	movs	r1, #4
 8016df2:	69f8      	ldr	r0, [r7, #28]
 8016df4:	4798      	blx	r3
  /* Try to release selects pending on 'read' or 'write', too.
     They will get an error if they actually try to read or write. */
  API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8016df6:	69fb      	ldr	r3, [r7, #28]
 8016df8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016dfa:	2b00      	cmp	r3, #0
 8016dfc:	d005      	beq.n	8016e0a <err_tcp+0x82>
 8016dfe:	69fb      	ldr	r3, [r7, #28]
 8016e00:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016e02:	2200      	movs	r2, #0
 8016e04:	2100      	movs	r1, #0
 8016e06:	69f8      	ldr	r0, [r7, #28]
 8016e08:	4798      	blx	r3
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016e0a:	69fb      	ldr	r3, [r7, #28]
 8016e0c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016e0e:	2b00      	cmp	r3, #0
 8016e10:	d005      	beq.n	8016e1e <err_tcp+0x96>
 8016e12:	69fb      	ldr	r3, [r7, #28]
 8016e14:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016e16:	2200      	movs	r2, #0
 8016e18:	2102      	movs	r1, #2
 8016e1a:	69f8      	ldr	r0, [r7, #28]
 8016e1c:	4798      	blx	r3

  mbox_msg = lwip_netconn_err_to_msg(err);
 8016e1e:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8016e22:	4618      	mov	r0, r3
 8016e24:	f7ff fd52 	bl	80168cc <lwip_netconn_err_to_msg>
 8016e28:	6138      	str	r0, [r7, #16]
  /* pass error message to recvmbox to wake up pending recv */
  if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8016e2a:	69fb      	ldr	r3, [r7, #28]
 8016e2c:	3310      	adds	r3, #16
 8016e2e:	4618      	mov	r0, r3
 8016e30:	f010 f8f4 	bl	802701c <sys_mbox_valid>
 8016e34:	4603      	mov	r3, r0
 8016e36:	2b00      	cmp	r3, #0
 8016e38:	d005      	beq.n	8016e46 <err_tcp+0xbe>
    /* use trypost to prevent deadlock */
    sys_mbox_trypost(&conn->recvmbox, mbox_msg);
 8016e3a:	69fb      	ldr	r3, [r7, #28]
 8016e3c:	3310      	adds	r3, #16
 8016e3e:	6939      	ldr	r1, [r7, #16]
 8016e40:	4618      	mov	r0, r3
 8016e42:	f010 f889 	bl	8026f58 <sys_mbox_trypost>
  }
  /* pass error message to acceptmbox to wake up pending accept */
  if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
 8016e46:	69fb      	ldr	r3, [r7, #28]
 8016e48:	3314      	adds	r3, #20
 8016e4a:	4618      	mov	r0, r3
 8016e4c:	f010 f8e6 	bl	802701c <sys_mbox_valid>
 8016e50:	4603      	mov	r3, r0
 8016e52:	2b00      	cmp	r3, #0
 8016e54:	d005      	beq.n	8016e62 <err_tcp+0xda>
    /* use trypost to preven deadlock */
    sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
 8016e56:	69fb      	ldr	r3, [r7, #28]
 8016e58:	3314      	adds	r3, #20
 8016e5a:	6939      	ldr	r1, [r7, #16]
 8016e5c:	4618      	mov	r0, r3
 8016e5e:	f010 f87b 	bl	8026f58 <sys_mbox_trypost>
  }

  if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
 8016e62:	7dfb      	ldrb	r3, [r7, #23]
 8016e64:	2b01      	cmp	r3, #1
 8016e66:	d005      	beq.n	8016e74 <err_tcp+0xec>
 8016e68:	7dfb      	ldrb	r3, [r7, #23]
 8016e6a:	2b04      	cmp	r3, #4
 8016e6c:	d002      	beq.n	8016e74 <err_tcp+0xec>
 8016e6e:	7dfb      	ldrb	r3, [r7, #23]
 8016e70:	2b03      	cmp	r3, #3
 8016e72:	d146      	bne.n	8016f02 <err_tcp+0x17a>
      (old_state == NETCONN_CONNECT)) {
    /* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
       since the pcb has already been deleted! */
    int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
 8016e74:	69fb      	ldr	r3, [r7, #28]
 8016e76:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016e7a:	f003 0304 	and.w	r3, r3, #4
 8016e7e:	2b00      	cmp	r3, #0
 8016e80:	bf14      	ite	ne
 8016e82:	2301      	movne	r3, #1
 8016e84:	2300      	moveq	r3, #0
 8016e86:	b2db      	uxtb	r3, r3
 8016e88:	60fb      	str	r3, [r7, #12]
    SET_NONBLOCKING_CONNECT(conn, 0);
 8016e8a:	69fb      	ldr	r3, [r7, #28]
 8016e8c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016e90:	f023 0304 	bic.w	r3, r3, #4
 8016e94:	b2da      	uxtb	r2, r3
 8016e96:	69fb      	ldr	r3, [r7, #28]
 8016e98:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

    if (!was_nonblocking_connect) {
 8016e9c:	68fb      	ldr	r3, [r7, #12]
 8016e9e:	2b00      	cmp	r3, #0
 8016ea0:	d13b      	bne.n	8016f1a <err_tcp+0x192>
      sys_sem_t *op_completed_sem;
      /* set error return code */
      LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8016ea2:	69fb      	ldr	r3, [r7, #28]
 8016ea4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ea6:	2b00      	cmp	r3, #0
 8016ea8:	d106      	bne.n	8016eb8 <err_tcp+0x130>
 8016eaa:	4b1e      	ldr	r3, [pc, #120]	@ (8016f24 <err_tcp+0x19c>)
 8016eac:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 8016eb0:	491f      	ldr	r1, [pc, #124]	@ (8016f30 <err_tcp+0x1a8>)
 8016eb2:	481e      	ldr	r0, [pc, #120]	@ (8016f2c <err_tcp+0x1a4>)
 8016eb4:	f013 fc52 	bl	802a75c <iprintf>
      if (old_state == NETCONN_CLOSE) {
 8016eb8:	7dfb      	ldrb	r3, [r7, #23]
 8016eba:	2b04      	cmp	r3, #4
 8016ebc:	d104      	bne.n	8016ec8 <err_tcp+0x140>
        /* let close succeed: the connection is closed after all... */
        conn->current_msg->err = ERR_OK;
 8016ebe:	69fb      	ldr	r3, [r7, #28]
 8016ec0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ec2:	2200      	movs	r2, #0
 8016ec4:	711a      	strb	r2, [r3, #4]
 8016ec6:	e003      	b.n	8016ed0 <err_tcp+0x148>
      } else {
        /* Write and connect fail */
        conn->current_msg->err = err;
 8016ec8:	69fb      	ldr	r3, [r7, #28]
 8016eca:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ecc:	78fa      	ldrb	r2, [r7, #3]
 8016ece:	711a      	strb	r2, [r3, #4]
      }
      op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8016ed0:	69fb      	ldr	r3, [r7, #28]
 8016ed2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016ed4:	681b      	ldr	r3, [r3, #0]
 8016ed6:	330c      	adds	r3, #12
 8016ed8:	60bb      	str	r3, [r7, #8]
      LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
 8016eda:	68b8      	ldr	r0, [r7, #8]
 8016edc:	f010 f92c 	bl	8027138 <sys_sem_valid>
 8016ee0:	4603      	mov	r3, r0
 8016ee2:	2b00      	cmp	r3, #0
 8016ee4:	d106      	bne.n	8016ef4 <err_tcp+0x16c>
 8016ee6:	4b0f      	ldr	r3, [pc, #60]	@ (8016f24 <err_tcp+0x19c>)
 8016ee8:	f240 12ef 	movw	r2, #495	@ 0x1ef
 8016eec:	4911      	ldr	r1, [pc, #68]	@ (8016f34 <err_tcp+0x1ac>)
 8016eee:	480f      	ldr	r0, [pc, #60]	@ (8016f2c <err_tcp+0x1a4>)
 8016ef0:	f013 fc34 	bl	802a75c <iprintf>
      conn->current_msg = NULL;
 8016ef4:	69fb      	ldr	r3, [r7, #28]
 8016ef6:	2200      	movs	r2, #0
 8016ef8:	62da      	str	r2, [r3, #44]	@ 0x2c
      /* wake up the waiting task */
      sys_sem_signal(op_completed_sem);
 8016efa:	68b8      	ldr	r0, [r7, #8]
 8016efc:	f010 f902 	bl	8027104 <sys_sem_signal>
      (old_state == NETCONN_CONNECT)) {
 8016f00:	e00b      	b.n	8016f1a <err_tcp+0x192>
    } else {
      /* @todo: test what happens for error on nonblocking connect */
    }
  } else {
    LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
 8016f02:	69fb      	ldr	r3, [r7, #28]
 8016f04:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f06:	2b00      	cmp	r3, #0
 8016f08:	d008      	beq.n	8016f1c <err_tcp+0x194>
 8016f0a:	4b06      	ldr	r3, [pc, #24]	@ (8016f24 <err_tcp+0x19c>)
 8016f0c:	f240 12f7 	movw	r2, #503	@ 0x1f7
 8016f10:	4909      	ldr	r1, [pc, #36]	@ (8016f38 <err_tcp+0x1b0>)
 8016f12:	4806      	ldr	r0, [pc, #24]	@ (8016f2c <err_tcp+0x1a4>)
 8016f14:	f013 fc22 	bl	802a75c <iprintf>
  }
}
 8016f18:	e000      	b.n	8016f1c <err_tcp+0x194>
      (old_state == NETCONN_CONNECT)) {
 8016f1a:	bf00      	nop
}
 8016f1c:	bf00      	nop
 8016f1e:	3720      	adds	r7, #32
 8016f20:	46bd      	mov	sp, r7
 8016f22:	bd80      	pop	{r7, pc}
 8016f24:	0802ddc0 	.word	0x0802ddc0
 8016f28:	0802df18 	.word	0x0802df18
 8016f2c:	0802de04 	.word	0x0802de04
 8016f30:	0802df28 	.word	0x0802df28
 8016f34:	0802df44 	.word	0x0802df44
 8016f38:	0802df60 	.word	0x0802df60

08016f3c <setup_tcp>:
 *
 * @param conn the TCP netconn to setup
 */
static void
setup_tcp(struct netconn *conn)
{
 8016f3c:	b580      	push	{r7, lr}
 8016f3e:	b084      	sub	sp, #16
 8016f40:	af00      	add	r7, sp, #0
 8016f42:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *pcb;

  pcb = conn->pcb.tcp;
 8016f44:	687b      	ldr	r3, [r7, #4]
 8016f46:	685b      	ldr	r3, [r3, #4]
 8016f48:	60fb      	str	r3, [r7, #12]
  tcp_arg(pcb, conn);
 8016f4a:	6879      	ldr	r1, [r7, #4]
 8016f4c:	68f8      	ldr	r0, [r7, #12]
 8016f4e:	f005 ffe3 	bl	801cf18 <tcp_arg>
  tcp_recv(pcb, recv_tcp);
 8016f52:	490a      	ldr	r1, [pc, #40]	@ (8016f7c <setup_tcp+0x40>)
 8016f54:	68f8      	ldr	r0, [r7, #12]
 8016f56:	f005 fff1 	bl	801cf3c <tcp_recv>
  tcp_sent(pcb, sent_tcp);
 8016f5a:	4909      	ldr	r1, [pc, #36]	@ (8016f80 <setup_tcp+0x44>)
 8016f5c:	68f8      	ldr	r0, [r7, #12]
 8016f5e:	f006 f811 	bl	801cf84 <tcp_sent>
  tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
 8016f62:	2202      	movs	r2, #2
 8016f64:	4907      	ldr	r1, [pc, #28]	@ (8016f84 <setup_tcp+0x48>)
 8016f66:	68f8      	ldr	r0, [r7, #12]
 8016f68:	f006 f86c 	bl	801d044 <tcp_poll>
  tcp_err(pcb, err_tcp);
 8016f6c:	4906      	ldr	r1, [pc, #24]	@ (8016f88 <setup_tcp+0x4c>)
 8016f6e:	68f8      	ldr	r0, [r7, #12]
 8016f70:	f006 f82c 	bl	801cfcc <tcp_err>
}
 8016f74:	bf00      	nop
 8016f76:	3710      	adds	r7, #16
 8016f78:	46bd      	mov	sp, r7
 8016f7a:	bd80      	pop	{r7, pc}
 8016f7c:	08016ae5 	.word	0x08016ae5
 8016f80:	08016cd9 	.word	0x08016cd9
 8016f84:	08016c09 	.word	0x08016c09
 8016f88:	08016d89 	.word	0x08016d89

08016f8c <pcb_new>:
 *
 * @param msg the api_msg describing the connection type
 */
static void
pcb_new(struct api_msg *msg)
{
 8016f8c:	b590      	push	{r4, r7, lr}
 8016f8e:	b085      	sub	sp, #20
 8016f90:	af00      	add	r7, sp, #0
 8016f92:	6078      	str	r0, [r7, #4]
  enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
 8016f94:	2300      	movs	r3, #0
 8016f96:	73fb      	strb	r3, [r7, #15]

  LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
 8016f98:	687b      	ldr	r3, [r7, #4]
 8016f9a:	681b      	ldr	r3, [r3, #0]
 8016f9c:	685b      	ldr	r3, [r3, #4]
 8016f9e:	2b00      	cmp	r3, #0
 8016fa0:	d006      	beq.n	8016fb0 <pcb_new+0x24>
 8016fa2:	4b2b      	ldr	r3, [pc, #172]	@ (8017050 <pcb_new+0xc4>)
 8016fa4:	f240 2265 	movw	r2, #613	@ 0x265
 8016fa8:	492a      	ldr	r1, [pc, #168]	@ (8017054 <pcb_new+0xc8>)
 8016faa:	482b      	ldr	r0, [pc, #172]	@ (8017058 <pcb_new+0xcc>)
 8016fac:	f013 fbd6 	bl	802a75c <iprintf>
    iptype = IPADDR_TYPE_ANY;
  }
#endif

  /* Allocate a PCB for this connection */
  switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8016fb0:	687b      	ldr	r3, [r7, #4]
 8016fb2:	681b      	ldr	r3, [r3, #0]
 8016fb4:	781b      	ldrb	r3, [r3, #0]
 8016fb6:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016fba:	2b10      	cmp	r3, #16
 8016fbc:	d022      	beq.n	8017004 <pcb_new+0x78>
 8016fbe:	2b20      	cmp	r3, #32
 8016fc0:	d133      	bne.n	801702a <pcb_new+0x9e>
      }
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      msg->conn->pcb.udp = udp_new_ip_type(iptype);
 8016fc2:	687b      	ldr	r3, [r7, #4]
 8016fc4:	681c      	ldr	r4, [r3, #0]
 8016fc6:	7bfb      	ldrb	r3, [r7, #15]
 8016fc8:	4618      	mov	r0, r3
 8016fca:	f00b fb94 	bl	80226f6 <udp_new_ip_type>
 8016fce:	4603      	mov	r3, r0
 8016fd0:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.udp != NULL) {
 8016fd2:	687b      	ldr	r3, [r7, #4]
 8016fd4:	681b      	ldr	r3, [r3, #0]
 8016fd6:	685b      	ldr	r3, [r3, #4]
 8016fd8:	2b00      	cmp	r3, #0
 8016fda:	d02a      	beq.n	8017032 <pcb_new+0xa6>
#if LWIP_UDPLITE
        if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
        }
#endif /* LWIP_UDPLITE */
        if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
 8016fdc:	687b      	ldr	r3, [r7, #4]
 8016fde:	681b      	ldr	r3, [r3, #0]
 8016fe0:	781b      	ldrb	r3, [r3, #0]
 8016fe2:	2b22      	cmp	r3, #34	@ 0x22
 8016fe4:	d104      	bne.n	8016ff0 <pcb_new+0x64>
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
 8016fe6:	687b      	ldr	r3, [r7, #4]
 8016fe8:	681b      	ldr	r3, [r3, #0]
 8016fea:	685b      	ldr	r3, [r3, #4]
 8016fec:	2201      	movs	r2, #1
 8016fee:	741a      	strb	r2, [r3, #16]
        }
        udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
 8016ff0:	687b      	ldr	r3, [r7, #4]
 8016ff2:	681b      	ldr	r3, [r3, #0]
 8016ff4:	6858      	ldr	r0, [r3, #4]
 8016ff6:	687b      	ldr	r3, [r7, #4]
 8016ff8:	681b      	ldr	r3, [r3, #0]
 8016ffa:	461a      	mov	r2, r3
 8016ffc:	4917      	ldr	r1, [pc, #92]	@ (801705c <pcb_new+0xd0>)
 8016ffe:	f00b fafb 	bl	80225f8 <udp_recv>
      }
      break;
 8017002:	e016      	b.n	8017032 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
 8017004:	687b      	ldr	r3, [r7, #4]
 8017006:	681c      	ldr	r4, [r3, #0]
 8017008:	7bfb      	ldrb	r3, [r7, #15]
 801700a:	4618      	mov	r0, r3
 801700c:	f005 ff76 	bl	801cefc <tcp_new_ip_type>
 8017010:	4603      	mov	r3, r0
 8017012:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.tcp != NULL) {
 8017014:	687b      	ldr	r3, [r7, #4]
 8017016:	681b      	ldr	r3, [r3, #0]
 8017018:	685b      	ldr	r3, [r3, #4]
 801701a:	2b00      	cmp	r3, #0
 801701c:	d00b      	beq.n	8017036 <pcb_new+0xaa>
        setup_tcp(msg->conn);
 801701e:	687b      	ldr	r3, [r7, #4]
 8017020:	681b      	ldr	r3, [r3, #0]
 8017022:	4618      	mov	r0, r3
 8017024:	f7ff ff8a 	bl	8016f3c <setup_tcp>
      }
      break;
 8017028:	e005      	b.n	8017036 <pcb_new+0xaa>
#endif /* LWIP_TCP */
    default:
      /* Unsupported netconn type, e.g. protocol disabled */
      msg->err = ERR_VAL;
 801702a:	687b      	ldr	r3, [r7, #4]
 801702c:	22fa      	movs	r2, #250	@ 0xfa
 801702e:	711a      	strb	r2, [r3, #4]
      return;
 8017030:	e00a      	b.n	8017048 <pcb_new+0xbc>
      break;
 8017032:	bf00      	nop
 8017034:	e000      	b.n	8017038 <pcb_new+0xac>
      break;
 8017036:	bf00      	nop
  }
  if (msg->conn->pcb.ip == NULL) {
 8017038:	687b      	ldr	r3, [r7, #4]
 801703a:	681b      	ldr	r3, [r3, #0]
 801703c:	685b      	ldr	r3, [r3, #4]
 801703e:	2b00      	cmp	r3, #0
 8017040:	d102      	bne.n	8017048 <pcb_new+0xbc>
    msg->err = ERR_MEM;
 8017042:	687b      	ldr	r3, [r7, #4]
 8017044:	22ff      	movs	r2, #255	@ 0xff
 8017046:	711a      	strb	r2, [r3, #4]
  }
}
 8017048:	3714      	adds	r7, #20
 801704a:	46bd      	mov	sp, r7
 801704c:	bd90      	pop	{r4, r7, pc}
 801704e:	bf00      	nop
 8017050:	0802ddc0 	.word	0x0802ddc0
 8017054:	0802dfa4 	.word	0x0802dfa4
 8017058:	0802de04 	.word	0x0802de04
 801705c:	080169ad 	.word	0x080169ad

08017060 <lwip_netconn_do_newconn>:
 *
 * @param m the api_msg describing the connection type
 */
void
lwip_netconn_do_newconn(void *m)
{
 8017060:	b580      	push	{r7, lr}
 8017062:	b084      	sub	sp, #16
 8017064:	af00      	add	r7, sp, #0
 8017066:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017068:	687b      	ldr	r3, [r7, #4]
 801706a:	60fb      	str	r3, [r7, #12]

  msg->err = ERR_OK;
 801706c:	68fb      	ldr	r3, [r7, #12]
 801706e:	2200      	movs	r2, #0
 8017070:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp == NULL) {
 8017072:	68fb      	ldr	r3, [r7, #12]
 8017074:	681b      	ldr	r3, [r3, #0]
 8017076:	685b      	ldr	r3, [r3, #4]
 8017078:	2b00      	cmp	r3, #0
 801707a:	d102      	bne.n	8017082 <lwip_netconn_do_newconn+0x22>
    pcb_new(msg);
 801707c:	68f8      	ldr	r0, [r7, #12]
 801707e:	f7ff ff85 	bl	8016f8c <pcb_new>
  /* Else? This "new" connection already has a PCB allocated. */
  /* Is this an error condition? Should it be deleted? */
  /* We currently just are happy and return. */

  TCPIP_APIMSG_ACK(msg);
}
 8017082:	bf00      	nop
 8017084:	3710      	adds	r7, #16
 8017086:	46bd      	mov	sp, r7
 8017088:	bd80      	pop	{r7, pc}
	...

0801708c <netconn_alloc>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
 801708c:	b580      	push	{r7, lr}
 801708e:	b086      	sub	sp, #24
 8017090:	af00      	add	r7, sp, #0
 8017092:	4603      	mov	r3, r0
 8017094:	6039      	str	r1, [r7, #0]
 8017096:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int size;
  u8_t init_flags = 0;
 8017098:	2300      	movs	r3, #0
 801709a:	74fb      	strb	r3, [r7, #19]

  conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
 801709c:	2007      	movs	r0, #7
 801709e:	f003 f981 	bl	801a3a4 <memp_malloc>
 80170a2:	60f8      	str	r0, [r7, #12]
  if (conn == NULL) {
 80170a4:	68fb      	ldr	r3, [r7, #12]
 80170a6:	2b00      	cmp	r3, #0
 80170a8:	d101      	bne.n	80170ae <netconn_alloc+0x22>
    return NULL;
 80170aa:	2300      	movs	r3, #0
 80170ac:	e05c      	b.n	8017168 <netconn_alloc+0xdc>
  }

  conn->pending_err = ERR_OK;
 80170ae:	68fb      	ldr	r3, [r7, #12]
 80170b0:	2200      	movs	r2, #0
 80170b2:	721a      	strb	r2, [r3, #8]
  conn->type = t;
 80170b4:	68fb      	ldr	r3, [r7, #12]
 80170b6:	79fa      	ldrb	r2, [r7, #7]
 80170b8:	701a      	strb	r2, [r3, #0]
  conn->pcb.tcp = NULL;
 80170ba:	68fb      	ldr	r3, [r7, #12]
 80170bc:	2200      	movs	r2, #0
 80170be:	605a      	str	r2, [r3, #4]

  /* If all sizes are the same, every compiler should optimize this switch to nothing */
  switch (NETCONNTYPE_GROUP(t)) {
 80170c0:	79fb      	ldrb	r3, [r7, #7]
 80170c2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80170c6:	2b10      	cmp	r3, #16
 80170c8:	d004      	beq.n	80170d4 <netconn_alloc+0x48>
 80170ca:	2b20      	cmp	r3, #32
 80170cc:	d105      	bne.n	80170da <netconn_alloc+0x4e>
      size = DEFAULT_RAW_RECVMBOX_SIZE;
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      size = DEFAULT_UDP_RECVMBOX_SIZE;
 80170ce:	2306      	movs	r3, #6
 80170d0:	617b      	str	r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
      init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 80170d2:	e00a      	b.n	80170ea <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      size = DEFAULT_TCP_RECVMBOX_SIZE;
 80170d4:	2306      	movs	r3, #6
 80170d6:	617b      	str	r3, [r7, #20]
      break;
 80170d8:	e007      	b.n	80170ea <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
    default:
      LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
 80170da:	4b25      	ldr	r3, [pc, #148]	@ (8017170 <netconn_alloc+0xe4>)
 80170dc:	f240 22e5 	movw	r2, #741	@ 0x2e5
 80170e0:	4924      	ldr	r1, [pc, #144]	@ (8017174 <netconn_alloc+0xe8>)
 80170e2:	4825      	ldr	r0, [pc, #148]	@ (8017178 <netconn_alloc+0xec>)
 80170e4:	f013 fb3a 	bl	802a75c <iprintf>
      goto free_and_return;
 80170e8:	e039      	b.n	801715e <netconn_alloc+0xd2>
  }

  if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
 80170ea:	68fb      	ldr	r3, [r7, #12]
 80170ec:	3310      	adds	r3, #16
 80170ee:	6979      	ldr	r1, [r7, #20]
 80170f0:	4618      	mov	r0, r3
 80170f2:	f00f ff05 	bl	8026f00 <sys_mbox_new>
 80170f6:	4603      	mov	r3, r0
 80170f8:	2b00      	cmp	r3, #0
 80170fa:	d12f      	bne.n	801715c <netconn_alloc+0xd0>
    goto free_and_return;
  }
#if !LWIP_NETCONN_SEM_PER_THREAD
  if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
 80170fc:	68fb      	ldr	r3, [r7, #12]
 80170fe:	330c      	adds	r3, #12
 8017100:	2100      	movs	r1, #0
 8017102:	4618      	mov	r0, r3
 8017104:	f00f ffa8 	bl	8027058 <sys_sem_new>
 8017108:	4603      	mov	r3, r0
 801710a:	2b00      	cmp	r3, #0
 801710c:	d005      	beq.n	801711a <netconn_alloc+0x8e>
    sys_mbox_free(&conn->recvmbox);
 801710e:	68fb      	ldr	r3, [r7, #12]
 8017110:	3310      	adds	r3, #16
 8017112:	4618      	mov	r0, r3
 8017114:	f00f ff0e 	bl	8026f34 <sys_mbox_free>
    goto free_and_return;
 8017118:	e021      	b.n	801715e <netconn_alloc+0xd2>
  }
#endif

#if LWIP_TCP
  sys_mbox_set_invalid(&conn->acceptmbox);
 801711a:	68fb      	ldr	r3, [r7, #12]
 801711c:	3314      	adds	r3, #20
 801711e:	4618      	mov	r0, r3
 8017120:	f00f ff8d 	bl	802703e <sys_mbox_set_invalid>
#endif
  conn->state        = NETCONN_NONE;
 8017124:	68fb      	ldr	r3, [r7, #12]
 8017126:	2200      	movs	r2, #0
 8017128:	705a      	strb	r2, [r3, #1]
#if LWIP_SOCKET
  /* initialize socket to -1 since 0 is a valid socket */
  conn->socket       = -1;
 801712a:	68fb      	ldr	r3, [r7, #12]
 801712c:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8017130:	619a      	str	r2, [r3, #24]
#endif /* LWIP_SOCKET */
  conn->callback     = callback;
 8017132:	68fb      	ldr	r3, [r7, #12]
 8017134:	683a      	ldr	r2, [r7, #0]
 8017136:	631a      	str	r2, [r3, #48]	@ 0x30
#if LWIP_TCP
  conn->current_msg  = NULL;
 8017138:	68fb      	ldr	r3, [r7, #12]
 801713a:	2200      	movs	r2, #0
 801713c:	62da      	str	r2, [r3, #44]	@ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
  conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
  conn->recv_timeout = 0;
 801713e:	68fb      	ldr	r3, [r7, #12]
 8017140:	2200      	movs	r2, #0
 8017142:	61da      	str	r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
  conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
 8017144:	68fb      	ldr	r3, [r7, #12]
 8017146:	4a0d      	ldr	r2, [pc, #52]	@ (801717c <netconn_alloc+0xf0>)
 8017148:	621a      	str	r2, [r3, #32]
  conn->recv_avail   = 0;
 801714a:	68fb      	ldr	r3, [r7, #12]
 801714c:	2200      	movs	r2, #0
 801714e:	625a      	str	r2, [r3, #36]	@ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
  conn->linger = -1;
#endif /* LWIP_SO_LINGER */
  conn->flags = init_flags;
 8017150:	68fb      	ldr	r3, [r7, #12]
 8017152:	7cfa      	ldrb	r2, [r7, #19]
 8017154:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  return conn;
 8017158:	68fb      	ldr	r3, [r7, #12]
 801715a:	e005      	b.n	8017168 <netconn_alloc+0xdc>
    goto free_and_return;
 801715c:	bf00      	nop
free_and_return:
  memp_free(MEMP_NETCONN, conn);
 801715e:	68f9      	ldr	r1, [r7, #12]
 8017160:	2007      	movs	r0, #7
 8017162:	f003 f995 	bl	801a490 <memp_free>
  return NULL;
 8017166:	2300      	movs	r3, #0
}
 8017168:	4618      	mov	r0, r3
 801716a:	3718      	adds	r7, #24
 801716c:	46bd      	mov	sp, r7
 801716e:	bd80      	pop	{r7, pc}
 8017170:	0802ddc0 	.word	0x0802ddc0
 8017174:	0802dfc4 	.word	0x0802dfc4
 8017178:	0802de04 	.word	0x0802de04
 801717c:	77359400 	.word	0x77359400

08017180 <netconn_free>:
 *
 * @param conn the netconn to free
 */
void
netconn_free(struct netconn *conn)
{
 8017180:	b580      	push	{r7, lr}
 8017182:	b082      	sub	sp, #8
 8017184:	af00      	add	r7, sp, #0
 8017186:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
 8017188:	687b      	ldr	r3, [r7, #4]
 801718a:	685b      	ldr	r3, [r3, #4]
 801718c:	2b00      	cmp	r3, #0
 801718e:	d006      	beq.n	801719e <netconn_free+0x1e>
 8017190:	4b1b      	ldr	r3, [pc, #108]	@ (8017200 <netconn_free+0x80>)
 8017192:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 8017196:	491b      	ldr	r1, [pc, #108]	@ (8017204 <netconn_free+0x84>)
 8017198:	481b      	ldr	r0, [pc, #108]	@ (8017208 <netconn_free+0x88>)
 801719a:	f013 fadf 	bl	802a75c <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
  /* in fullduplex, netconn is drained here */
  netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  LWIP_ASSERT("recvmbox must be deallocated before calling this function",
 801719e:	687b      	ldr	r3, [r7, #4]
 80171a0:	3310      	adds	r3, #16
 80171a2:	4618      	mov	r0, r3
 80171a4:	f00f ff3a 	bl	802701c <sys_mbox_valid>
 80171a8:	4603      	mov	r3, r0
 80171aa:	2b00      	cmp	r3, #0
 80171ac:	d006      	beq.n	80171bc <netconn_free+0x3c>
 80171ae:	4b14      	ldr	r3, [pc, #80]	@ (8017200 <netconn_free+0x80>)
 80171b0:	f240 3223 	movw	r2, #803	@ 0x323
 80171b4:	4915      	ldr	r1, [pc, #84]	@ (801720c <netconn_free+0x8c>)
 80171b6:	4814      	ldr	r0, [pc, #80]	@ (8017208 <netconn_free+0x88>)
 80171b8:	f013 fad0 	bl	802a75c <iprintf>
              !sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
  LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
 80171bc:	687b      	ldr	r3, [r7, #4]
 80171be:	3314      	adds	r3, #20
 80171c0:	4618      	mov	r0, r3
 80171c2:	f00f ff2b 	bl	802701c <sys_mbox_valid>
 80171c6:	4603      	mov	r3, r0
 80171c8:	2b00      	cmp	r3, #0
 80171ca:	d006      	beq.n	80171da <netconn_free+0x5a>
 80171cc:	4b0c      	ldr	r3, [pc, #48]	@ (8017200 <netconn_free+0x80>)
 80171ce:	f240 3226 	movw	r2, #806	@ 0x326
 80171d2:	490f      	ldr	r1, [pc, #60]	@ (8017210 <netconn_free+0x90>)
 80171d4:	480c      	ldr	r0, [pc, #48]	@ (8017208 <netconn_free+0x88>)
 80171d6:	f013 fac1 	bl	802a75c <iprintf>
              !sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */

#if !LWIP_NETCONN_SEM_PER_THREAD
  sys_sem_free(&conn->op_completed);
 80171da:	687b      	ldr	r3, [r7, #4]
 80171dc:	330c      	adds	r3, #12
 80171de:	4618      	mov	r0, r3
 80171e0:	f00f ff9d 	bl	802711e <sys_sem_free>
  sys_sem_set_invalid(&conn->op_completed);
 80171e4:	687b      	ldr	r3, [r7, #4]
 80171e6:	330c      	adds	r3, #12
 80171e8:	4618      	mov	r0, r3
 80171ea:	f00f ffb6 	bl	802715a <sys_sem_set_invalid>
#endif

  memp_free(MEMP_NETCONN, conn);
 80171ee:	6879      	ldr	r1, [r7, #4]
 80171f0:	2007      	movs	r0, #7
 80171f2:	f003 f94d 	bl	801a490 <memp_free>
}
 80171f6:	bf00      	nop
 80171f8:	3708      	adds	r7, #8
 80171fa:	46bd      	mov	sp, r7
 80171fc:	bd80      	pop	{r7, pc}
 80171fe:	bf00      	nop
 8017200:	0802ddc0 	.word	0x0802ddc0
 8017204:	0802dfec 	.word	0x0802dfec
 8017208:	0802de04 	.word	0x0802de04
 801720c:	0802e01c 	.word	0x0802e01c
 8017210:	0802e058 	.word	0x0802e058

08017214 <netconn_drain>:
 * @bytes_drained bytes drained from recvmbox
 * @accepts_drained pending connections drained from acceptmbox
 */
static void
netconn_drain(struct netconn *conn)
{
 8017214:	b580      	push	{r7, lr}
 8017216:	b086      	sub	sp, #24
 8017218:	af00      	add	r7, sp, #0
 801721a:	6078      	str	r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
  LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  /* Delete and drain the recvmbox. */
  if (sys_mbox_valid(&conn->recvmbox)) {
 801721c:	687b      	ldr	r3, [r7, #4]
 801721e:	3310      	adds	r3, #16
 8017220:	4618      	mov	r0, r3
 8017222:	f00f fefb 	bl	802701c <sys_mbox_valid>
 8017226:	4603      	mov	r3, r0
 8017228:	2b00      	cmp	r3, #0
 801722a:	d02f      	beq.n	801728c <netconn_drain+0x78>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 801722c:	e018      	b.n	8017260 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
#if LWIP_TCP
        if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
 801722e:	687b      	ldr	r3, [r7, #4]
 8017230:	781b      	ldrb	r3, [r3, #0]
 8017232:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017236:	2b10      	cmp	r3, #16
 8017238:	d10e      	bne.n	8017258 <netconn_drain+0x44>
          err_t err;
          if (!lwip_netconn_is_err_msg(mem, &err)) {
 801723a:	693b      	ldr	r3, [r7, #16]
 801723c:	f107 020f 	add.w	r2, r7, #15
 8017240:	4611      	mov	r1, r2
 8017242:	4618      	mov	r0, r3
 8017244:	f7ff fb78 	bl	8016938 <lwip_netconn_is_err_msg>
 8017248:	4603      	mov	r3, r0
 801724a:	2b00      	cmp	r3, #0
 801724c:	d108      	bne.n	8017260 <netconn_drain+0x4c>
            pbuf_free((struct pbuf *)mem);
 801724e:	693b      	ldr	r3, [r7, #16]
 8017250:	4618      	mov	r0, r3
 8017252:	f004 f80b 	bl	801b26c <pbuf_free>
 8017256:	e003      	b.n	8017260 <netconn_drain+0x4c>
          }
        } else
#endif /* LWIP_TCP */
        {
          netbuf_delete((struct netbuf *)mem);
 8017258:	693b      	ldr	r3, [r7, #16]
 801725a:	4618      	mov	r0, r3
 801725c:	f001 f81c 	bl	8018298 <netbuf_delete>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8017260:	687b      	ldr	r3, [r7, #4]
 8017262:	3310      	adds	r3, #16
 8017264:	f107 0210 	add.w	r2, r7, #16
 8017268:	4611      	mov	r1, r2
 801726a:	4618      	mov	r0, r3
 801726c:	f00f febf 	bl	8026fee <sys_arch_mbox_tryfetch>
 8017270:	4603      	mov	r3, r0
 8017272:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017276:	d1da      	bne.n	801722e <netconn_drain+0x1a>
        }
      }
    }
    sys_mbox_free(&conn->recvmbox);
 8017278:	687b      	ldr	r3, [r7, #4]
 801727a:	3310      	adds	r3, #16
 801727c:	4618      	mov	r0, r3
 801727e:	f00f fe59 	bl	8026f34 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->recvmbox);
 8017282:	687b      	ldr	r3, [r7, #4]
 8017284:	3310      	adds	r3, #16
 8017286:	4618      	mov	r0, r3
 8017288:	f00f fed9 	bl	802703e <sys_mbox_set_invalid>
  }

  /* Delete and drain the acceptmbox. */
#if LWIP_TCP
  if (sys_mbox_valid(&conn->acceptmbox)) {
 801728c:	687b      	ldr	r3, [r7, #4]
 801728e:	3314      	adds	r3, #20
 8017290:	4618      	mov	r0, r3
 8017292:	f00f fec3 	bl	802701c <sys_mbox_valid>
 8017296:	4603      	mov	r3, r0
 8017298:	2b00      	cmp	r3, #0
 801729a:	d034      	beq.n	8017306 <netconn_drain+0xf2>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801729c:	e01d      	b.n	80172da <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
        err_t err;
        if (!lwip_netconn_is_err_msg(mem, &err)) {
 801729e:	693b      	ldr	r3, [r7, #16]
 80172a0:	f107 020e 	add.w	r2, r7, #14
 80172a4:	4611      	mov	r1, r2
 80172a6:	4618      	mov	r0, r3
 80172a8:	f7ff fb46 	bl	8016938 <lwip_netconn_is_err_msg>
 80172ac:	4603      	mov	r3, r0
 80172ae:	2b00      	cmp	r3, #0
 80172b0:	d113      	bne.n	80172da <netconn_drain+0xc6>
          struct netconn *newconn = (struct netconn *)mem;
 80172b2:	693b      	ldr	r3, [r7, #16]
 80172b4:	617b      	str	r3, [r7, #20]
          /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
          /* pcb might be set to NULL already by err_tcp() */
          /* drain recvmbox */
          netconn_drain(newconn);
 80172b6:	6978      	ldr	r0, [r7, #20]
 80172b8:	f7ff ffac 	bl	8017214 <netconn_drain>
          if (newconn->pcb.tcp != NULL) {
 80172bc:	697b      	ldr	r3, [r7, #20]
 80172be:	685b      	ldr	r3, [r3, #4]
 80172c0:	2b00      	cmp	r3, #0
 80172c2:	d007      	beq.n	80172d4 <netconn_drain+0xc0>
            tcp_abort(newconn->pcb.tcp);
 80172c4:	697b      	ldr	r3, [r7, #20]
 80172c6:	685b      	ldr	r3, [r3, #4]
 80172c8:	4618      	mov	r0, r3
 80172ca:	f004 fdd5 	bl	801be78 <tcp_abort>
            newconn->pcb.tcp = NULL;
 80172ce:	697b      	ldr	r3, [r7, #20]
 80172d0:	2200      	movs	r2, #0
 80172d2:	605a      	str	r2, [r3, #4]
          }
          netconn_free(newconn);
 80172d4:	6978      	ldr	r0, [r7, #20]
 80172d6:	f7ff ff53 	bl	8017180 <netconn_free>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 80172da:	687b      	ldr	r3, [r7, #4]
 80172dc:	3314      	adds	r3, #20
 80172de:	f107 0210 	add.w	r2, r7, #16
 80172e2:	4611      	mov	r1, r2
 80172e4:	4618      	mov	r0, r3
 80172e6:	f00f fe82 	bl	8026fee <sys_arch_mbox_tryfetch>
 80172ea:	4603      	mov	r3, r0
 80172ec:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80172f0:	d1d5      	bne.n	801729e <netconn_drain+0x8a>
        }
      }
    }
    sys_mbox_free(&conn->acceptmbox);
 80172f2:	687b      	ldr	r3, [r7, #4]
 80172f4:	3314      	adds	r3, #20
 80172f6:	4618      	mov	r0, r3
 80172f8:	f00f fe1c 	bl	8026f34 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->acceptmbox);
 80172fc:	687b      	ldr	r3, [r7, #4]
 80172fe:	3314      	adds	r3, #20
 8017300:	4618      	mov	r0, r3
 8017302:	f00f fe9c 	bl	802703e <sys_mbox_set_invalid>
  }
#endif /* LWIP_TCP */
}
 8017306:	bf00      	nop
 8017308:	3718      	adds	r7, #24
 801730a:	46bd      	mov	sp, r7
 801730c:	bd80      	pop	{r7, pc}
	...

08017310 <lwip_netconn_do_close_internal>:
 *
 * @param conn the TCP netconn to close
 */
static err_t
lwip_netconn_do_close_internal(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8017310:	b580      	push	{r7, lr}
 8017312:	b086      	sub	sp, #24
 8017314:	af00      	add	r7, sp, #0
 8017316:	6078      	str	r0, [r7, #4]
 8017318:	460b      	mov	r3, r1
 801731a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  u8_t shut, shut_rx, shut_tx, shut_close;
  u8_t close_finished = 0;
 801731c:	2300      	movs	r3, #0
 801731e:	757b      	strb	r3, [r7, #21]
  struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
  u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */

  LWIP_ASSERT("invalid conn", (conn != NULL));
 8017320:	687b      	ldr	r3, [r7, #4]
 8017322:	2b00      	cmp	r3, #0
 8017324:	d106      	bne.n	8017334 <lwip_netconn_do_close_internal+0x24>
 8017326:	4b87      	ldr	r3, [pc, #540]	@ (8017544 <lwip_netconn_do_close_internal+0x234>)
 8017328:	f240 32a2 	movw	r2, #930	@ 0x3a2
 801732c:	4986      	ldr	r1, [pc, #536]	@ (8017548 <lwip_netconn_do_close_internal+0x238>)
 801732e:	4887      	ldr	r0, [pc, #540]	@ (801754c <lwip_netconn_do_close_internal+0x23c>)
 8017330:	f013 fa14 	bl	802a75c <iprintf>
  LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
 8017334:	687b      	ldr	r3, [r7, #4]
 8017336:	781b      	ldrb	r3, [r3, #0]
 8017338:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801733c:	2b10      	cmp	r3, #16
 801733e:	d006      	beq.n	801734e <lwip_netconn_do_close_internal+0x3e>
 8017340:	4b80      	ldr	r3, [pc, #512]	@ (8017544 <lwip_netconn_do_close_internal+0x234>)
 8017342:	f240 32a3 	movw	r2, #931	@ 0x3a3
 8017346:	4982      	ldr	r1, [pc, #520]	@ (8017550 <lwip_netconn_do_close_internal+0x240>)
 8017348:	4880      	ldr	r0, [pc, #512]	@ (801754c <lwip_netconn_do_close_internal+0x23c>)
 801734a:	f013 fa07 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
 801734e:	687b      	ldr	r3, [r7, #4]
 8017350:	785b      	ldrb	r3, [r3, #1]
 8017352:	2b04      	cmp	r3, #4
 8017354:	d006      	beq.n	8017364 <lwip_netconn_do_close_internal+0x54>
 8017356:	4b7b      	ldr	r3, [pc, #492]	@ (8017544 <lwip_netconn_do_close_internal+0x234>)
 8017358:	f44f 7269 	mov.w	r2, #932	@ 0x3a4
 801735c:	497d      	ldr	r1, [pc, #500]	@ (8017554 <lwip_netconn_do_close_internal+0x244>)
 801735e:	487b      	ldr	r0, [pc, #492]	@ (801754c <lwip_netconn_do_close_internal+0x23c>)
 8017360:	f013 f9fc 	bl	802a75c <iprintf>
  LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
 8017364:	687b      	ldr	r3, [r7, #4]
 8017366:	685b      	ldr	r3, [r3, #4]
 8017368:	2b00      	cmp	r3, #0
 801736a:	d106      	bne.n	801737a <lwip_netconn_do_close_internal+0x6a>
 801736c:	4b75      	ldr	r3, [pc, #468]	@ (8017544 <lwip_netconn_do_close_internal+0x234>)
 801736e:	f240 32a5 	movw	r2, #933	@ 0x3a5
 8017372:	4979      	ldr	r1, [pc, #484]	@ (8017558 <lwip_netconn_do_close_internal+0x248>)
 8017374:	4875      	ldr	r0, [pc, #468]	@ (801754c <lwip_netconn_do_close_internal+0x23c>)
 8017376:	f013 f9f1 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 801737a:	687b      	ldr	r3, [r7, #4]
 801737c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801737e:	2b00      	cmp	r3, #0
 8017380:	d106      	bne.n	8017390 <lwip_netconn_do_close_internal+0x80>
 8017382:	4b70      	ldr	r3, [pc, #448]	@ (8017544 <lwip_netconn_do_close_internal+0x234>)
 8017384:	f240 32a6 	movw	r2, #934	@ 0x3a6
 8017388:	4974      	ldr	r1, [pc, #464]	@ (801755c <lwip_netconn_do_close_internal+0x24c>)
 801738a:	4870      	ldr	r0, [pc, #448]	@ (801754c <lwip_netconn_do_close_internal+0x23c>)
 801738c:	f013 f9e6 	bl	802a75c <iprintf>

  tpcb = conn->pcb.tcp;
 8017390:	687b      	ldr	r3, [r7, #4]
 8017392:	685b      	ldr	r3, [r3, #4]
 8017394:	613b      	str	r3, [r7, #16]
  shut = conn->current_msg->msg.sd.shut;
 8017396:	687b      	ldr	r3, [r7, #4]
 8017398:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801739a:	7a1b      	ldrb	r3, [r3, #8]
 801739c:	73fb      	strb	r3, [r7, #15]
  shut_rx = shut & NETCONN_SHUT_RD;
 801739e:	7bfb      	ldrb	r3, [r7, #15]
 80173a0:	f003 0301 	and.w	r3, r3, #1
 80173a4:	73bb      	strb	r3, [r7, #14]
  shut_tx = shut & NETCONN_SHUT_WR;
 80173a6:	7bfb      	ldrb	r3, [r7, #15]
 80173a8:	f003 0302 	and.w	r3, r3, #2
 80173ac:	737b      	strb	r3, [r7, #13]
  /* shutting down both ends is the same as closing
     (also if RD or WR side was shut down before already) */
  if (shut == NETCONN_SHUT_RDWR) {
 80173ae:	7bfb      	ldrb	r3, [r7, #15]
 80173b0:	2b03      	cmp	r3, #3
 80173b2:	d102      	bne.n	80173ba <lwip_netconn_do_close_internal+0xaa>
    shut_close = 1;
 80173b4:	2301      	movs	r3, #1
 80173b6:	75bb      	strb	r3, [r7, #22]
 80173b8:	e01f      	b.n	80173fa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_rx &&
 80173ba:	7bbb      	ldrb	r3, [r7, #14]
 80173bc:	2b00      	cmp	r3, #0
 80173be:	d00e      	beq.n	80173de <lwip_netconn_do_close_internal+0xce>
             ((tpcb->state == FIN_WAIT_1) ||
 80173c0:	693b      	ldr	r3, [r7, #16]
 80173c2:	7d1b      	ldrb	r3, [r3, #20]
  } else if (shut_rx &&
 80173c4:	2b05      	cmp	r3, #5
 80173c6:	d007      	beq.n	80173d8 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == FIN_WAIT_2) ||
 80173c8:	693b      	ldr	r3, [r7, #16]
 80173ca:	7d1b      	ldrb	r3, [r3, #20]
             ((tpcb->state == FIN_WAIT_1) ||
 80173cc:	2b06      	cmp	r3, #6
 80173ce:	d003      	beq.n	80173d8 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == CLOSING))) {
 80173d0:	693b      	ldr	r3, [r7, #16]
 80173d2:	7d1b      	ldrb	r3, [r3, #20]
              (tpcb->state == FIN_WAIT_2) ||
 80173d4:	2b08      	cmp	r3, #8
 80173d6:	d102      	bne.n	80173de <lwip_netconn_do_close_internal+0xce>
    shut_close = 1;
 80173d8:	2301      	movs	r3, #1
 80173da:	75bb      	strb	r3, [r7, #22]
 80173dc:	e00d      	b.n	80173fa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
 80173de:	7b7b      	ldrb	r3, [r7, #13]
 80173e0:	2b00      	cmp	r3, #0
 80173e2:	d008      	beq.n	80173f6 <lwip_netconn_do_close_internal+0xe6>
 80173e4:	693b      	ldr	r3, [r7, #16]
 80173e6:	8b5b      	ldrh	r3, [r3, #26]
 80173e8:	f003 0310 	and.w	r3, r3, #16
 80173ec:	2b00      	cmp	r3, #0
 80173ee:	d002      	beq.n	80173f6 <lwip_netconn_do_close_internal+0xe6>
    shut_close = 1;
 80173f0:	2301      	movs	r3, #1
 80173f2:	75bb      	strb	r3, [r7, #22]
 80173f4:	e001      	b.n	80173fa <lwip_netconn_do_close_internal+0xea>
  } else {
    shut_close = 0;
 80173f6:	2300      	movs	r3, #0
 80173f8:	75bb      	strb	r3, [r7, #22]
  }

  /* Set back some callback pointers */
  if (shut_close) {
 80173fa:	7dbb      	ldrb	r3, [r7, #22]
 80173fc:	2b00      	cmp	r3, #0
 80173fe:	d003      	beq.n	8017408 <lwip_netconn_do_close_internal+0xf8>
    tcp_arg(tpcb, NULL);
 8017400:	2100      	movs	r1, #0
 8017402:	6938      	ldr	r0, [r7, #16]
 8017404:	f005 fd88 	bl	801cf18 <tcp_arg>
  }
  if (tpcb->state == LISTEN) {
 8017408:	693b      	ldr	r3, [r7, #16]
 801740a:	7d1b      	ldrb	r3, [r3, #20]
 801740c:	2b01      	cmp	r3, #1
 801740e:	d104      	bne.n	801741a <lwip_netconn_do_close_internal+0x10a>
    tcp_accept(tpcb, NULL);
 8017410:	2100      	movs	r1, #0
 8017412:	6938      	ldr	r0, [r7, #16]
 8017414:	f005 fdfe 	bl	801d014 <tcp_accept>
 8017418:	e01d      	b.n	8017456 <lwip_netconn_do_close_internal+0x146>
  } else {
    /* some callbacks have to be reset if tcp_close is not successful */
    if (shut_rx) {
 801741a:	7bbb      	ldrb	r3, [r7, #14]
 801741c:	2b00      	cmp	r3, #0
 801741e:	d007      	beq.n	8017430 <lwip_netconn_do_close_internal+0x120>
      tcp_recv(tpcb, NULL);
 8017420:	2100      	movs	r1, #0
 8017422:	6938      	ldr	r0, [r7, #16]
 8017424:	f005 fd8a 	bl	801cf3c <tcp_recv>
      tcp_accept(tpcb, NULL);
 8017428:	2100      	movs	r1, #0
 801742a:	6938      	ldr	r0, [r7, #16]
 801742c:	f005 fdf2 	bl	801d014 <tcp_accept>
    }
    if (shut_tx) {
 8017430:	7b7b      	ldrb	r3, [r7, #13]
 8017432:	2b00      	cmp	r3, #0
 8017434:	d003      	beq.n	801743e <lwip_netconn_do_close_internal+0x12e>
      tcp_sent(tpcb, NULL);
 8017436:	2100      	movs	r1, #0
 8017438:	6938      	ldr	r0, [r7, #16]
 801743a:	f005 fda3 	bl	801cf84 <tcp_sent>
    }
    if (shut_close) {
 801743e:	7dbb      	ldrb	r3, [r7, #22]
 8017440:	2b00      	cmp	r3, #0
 8017442:	d008      	beq.n	8017456 <lwip_netconn_do_close_internal+0x146>
      tcp_poll(tpcb, NULL, 0);
 8017444:	2200      	movs	r2, #0
 8017446:	2100      	movs	r1, #0
 8017448:	6938      	ldr	r0, [r7, #16]
 801744a:	f005 fdfb 	bl	801d044 <tcp_poll>
      tcp_err(tpcb, NULL);
 801744e:	2100      	movs	r1, #0
 8017450:	6938      	ldr	r0, [r7, #16]
 8017452:	f005 fdbb 	bl	801cfcc <tcp_err>
    }
  }
  /* Try to close the connection */
  if (shut_close) {
 8017456:	7dbb      	ldrb	r3, [r7, #22]
 8017458:	2b00      	cmp	r3, #0
 801745a:	d005      	beq.n	8017468 <lwip_netconn_do_close_internal+0x158>
      }
    }
    if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
    {
      err = tcp_close(tpcb);
 801745c:	6938      	ldr	r0, [r7, #16]
 801745e:	f004 fbbf 	bl	801bbe0 <tcp_close>
 8017462:	4603      	mov	r3, r0
 8017464:	75fb      	strb	r3, [r7, #23]
 8017466:	e007      	b.n	8017478 <lwip_netconn_do_close_internal+0x168>
    }
  } else {
    err = tcp_shutdown(tpcb, shut_rx, shut_tx);
 8017468:	7bbb      	ldrb	r3, [r7, #14]
 801746a:	7b7a      	ldrb	r2, [r7, #13]
 801746c:	4619      	mov	r1, r3
 801746e:	6938      	ldr	r0, [r7, #16]
 8017470:	f004 fbe4 	bl	801bc3c <tcp_shutdown>
 8017474:	4603      	mov	r3, r0
 8017476:	75fb      	strb	r3, [r7, #23]
  }
  if (err == ERR_OK) {
 8017478:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801747c:	2b00      	cmp	r3, #0
 801747e:	d102      	bne.n	8017486 <lwip_netconn_do_close_internal+0x176>
    close_finished = 1;
 8017480:	2301      	movs	r3, #1
 8017482:	757b      	strb	r3, [r7, #21]
 8017484:	e016      	b.n	80174b4 <lwip_netconn_do_close_internal+0x1a4>
      close_finished = 0;
      err = ERR_INPROGRESS;
    }
#endif /* LWIP_SO_LINGER */
  } else {
    if (err == ERR_MEM) {
 8017486:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801748a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801748e:	d10f      	bne.n	80174b0 <lwip_netconn_do_close_internal+0x1a0>
        close_timeout = conn->linger * 1000U;
      }
#endif
      if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
      if (conn->current_msg->msg.sd.polls_left == 0) {
 8017490:	687b      	ldr	r3, [r7, #4]
 8017492:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017494:	7a5b      	ldrb	r3, [r3, #9]
 8017496:	2b00      	cmp	r3, #0
 8017498:	d10c      	bne.n	80174b4 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
        close_finished = 1;
 801749a:	2301      	movs	r3, #1
 801749c:	757b      	strb	r3, [r7, #21]
        if (shut_close) {
 801749e:	7dbb      	ldrb	r3, [r7, #22]
 80174a0:	2b00      	cmp	r3, #0
 80174a2:	d007      	beq.n	80174b4 <lwip_netconn_do_close_internal+0x1a4>
          /* in this case, we want to RST the connection */
          tcp_abort(tpcb);
 80174a4:	6938      	ldr	r0, [r7, #16]
 80174a6:	f004 fce7 	bl	801be78 <tcp_abort>
          err = ERR_OK;
 80174aa:	2300      	movs	r3, #0
 80174ac:	75fb      	strb	r3, [r7, #23]
 80174ae:	e001      	b.n	80174b4 <lwip_netconn_do_close_internal+0x1a4>
        }
      }
    } else {
      /* Closing failed for a non-memory error: give up */
      close_finished = 1;
 80174b0:	2301      	movs	r3, #1
 80174b2:	757b      	strb	r3, [r7, #21]
    }
  }
  if (close_finished) {
 80174b4:	7d7b      	ldrb	r3, [r7, #21]
 80174b6:	2b00      	cmp	r3, #0
 80174b8:	d052      	beq.n	8017560 <lwip_netconn_do_close_internal+0x250>
    /* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 80174ba:	687b      	ldr	r3, [r7, #4]
 80174bc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80174be:	681b      	ldr	r3, [r3, #0]
 80174c0:	330c      	adds	r3, #12
 80174c2:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 80174c4:	687b      	ldr	r3, [r7, #4]
 80174c6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80174c8:	7dfa      	ldrb	r2, [r7, #23]
 80174ca:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 80174cc:	687b      	ldr	r3, [r7, #4]
 80174ce:	2200      	movs	r2, #0
 80174d0:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 80174d2:	687b      	ldr	r3, [r7, #4]
 80174d4:	2200      	movs	r2, #0
 80174d6:	705a      	strb	r2, [r3, #1]
    if (err == ERR_OK) {
 80174d8:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80174dc:	2b00      	cmp	r3, #0
 80174de:	d129      	bne.n	8017534 <lwip_netconn_do_close_internal+0x224>
      if (shut_close) {
 80174e0:	7dbb      	ldrb	r3, [r7, #22]
 80174e2:	2b00      	cmp	r3, #0
 80174e4:	d00c      	beq.n	8017500 <lwip_netconn_do_close_internal+0x1f0>
        /* Set back some callback pointers as conn is going away */
        conn->pcb.tcp = NULL;
 80174e6:	687b      	ldr	r3, [r7, #4]
 80174e8:	2200      	movs	r2, #0
 80174ea:	605a      	str	r2, [r3, #4]
        /* Trigger select() in socket layer. Make sure everybody notices activity
         on the connection, error first! */
        API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 80174ec:	687b      	ldr	r3, [r7, #4]
 80174ee:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80174f0:	2b00      	cmp	r3, #0
 80174f2:	d005      	beq.n	8017500 <lwip_netconn_do_close_internal+0x1f0>
 80174f4:	687b      	ldr	r3, [r7, #4]
 80174f6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80174f8:	2200      	movs	r2, #0
 80174fa:	2104      	movs	r1, #4
 80174fc:	6878      	ldr	r0, [r7, #4]
 80174fe:	4798      	blx	r3
      }
      if (shut_rx) {
 8017500:	7bbb      	ldrb	r3, [r7, #14]
 8017502:	2b00      	cmp	r3, #0
 8017504:	d009      	beq.n	801751a <lwip_netconn_do_close_internal+0x20a>
        API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8017506:	687b      	ldr	r3, [r7, #4]
 8017508:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801750a:	2b00      	cmp	r3, #0
 801750c:	d005      	beq.n	801751a <lwip_netconn_do_close_internal+0x20a>
 801750e:	687b      	ldr	r3, [r7, #4]
 8017510:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017512:	2200      	movs	r2, #0
 8017514:	2100      	movs	r1, #0
 8017516:	6878      	ldr	r0, [r7, #4]
 8017518:	4798      	blx	r3
      }
      if (shut_tx) {
 801751a:	7b7b      	ldrb	r3, [r7, #13]
 801751c:	2b00      	cmp	r3, #0
 801751e:	d009      	beq.n	8017534 <lwip_netconn_do_close_internal+0x224>
        API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8017520:	687b      	ldr	r3, [r7, #4]
 8017522:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017524:	2b00      	cmp	r3, #0
 8017526:	d005      	beq.n	8017534 <lwip_netconn_do_close_internal+0x224>
 8017528:	687b      	ldr	r3, [r7, #4]
 801752a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801752c:	2200      	movs	r2, #0
 801752e:	2102      	movs	r1, #2
 8017530:	6878      	ldr	r0, [r7, #4]
 8017532:	4798      	blx	r3
      }
    }
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8017534:	78fb      	ldrb	r3, [r7, #3]
 8017536:	2b00      	cmp	r3, #0
 8017538:	d002      	beq.n	8017540 <lwip_netconn_do_close_internal+0x230>
#endif
    {
      /* wake up the application task */
      sys_sem_signal(op_completed_sem);
 801753a:	68b8      	ldr	r0, [r7, #8]
 801753c:	f00f fde2 	bl	8027104 <sys_sem_signal>
    }
    return ERR_OK;
 8017540:	2300      	movs	r3, #0
 8017542:	e03c      	b.n	80175be <lwip_netconn_do_close_internal+0x2ae>
 8017544:	0802ddc0 	.word	0x0802ddc0
 8017548:	0802e094 	.word	0x0802e094
 801754c:	0802de04 	.word	0x0802de04
 8017550:	0802e0a4 	.word	0x0802e0a4
 8017554:	0802e0c4 	.word	0x0802e0c4
 8017558:	0802e0e8 	.word	0x0802e0e8
 801755c:	0802df28 	.word	0x0802df28
  }
  if (!close_finished) {
 8017560:	7d7b      	ldrb	r3, [r7, #21]
 8017562:	2b00      	cmp	r3, #0
 8017564:	d11e      	bne.n	80175a4 <lwip_netconn_do_close_internal+0x294>
    /* Closing failed and we want to wait: restore some of the callbacks */
    /* Closing of listen pcb will never fail! */
    LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
 8017566:	693b      	ldr	r3, [r7, #16]
 8017568:	7d1b      	ldrb	r3, [r3, #20]
 801756a:	2b01      	cmp	r3, #1
 801756c:	d106      	bne.n	801757c <lwip_netconn_do_close_internal+0x26c>
 801756e:	4b16      	ldr	r3, [pc, #88]	@ (80175c8 <lwip_netconn_do_close_internal+0x2b8>)
 8017570:	f240 4241 	movw	r2, #1089	@ 0x441
 8017574:	4915      	ldr	r1, [pc, #84]	@ (80175cc <lwip_netconn_do_close_internal+0x2bc>)
 8017576:	4816      	ldr	r0, [pc, #88]	@ (80175d0 <lwip_netconn_do_close_internal+0x2c0>)
 8017578:	f013 f8f0 	bl	802a75c <iprintf>
    if (shut_tx) {
 801757c:	7b7b      	ldrb	r3, [r7, #13]
 801757e:	2b00      	cmp	r3, #0
 8017580:	d003      	beq.n	801758a <lwip_netconn_do_close_internal+0x27a>
      tcp_sent(tpcb, sent_tcp);
 8017582:	4914      	ldr	r1, [pc, #80]	@ (80175d4 <lwip_netconn_do_close_internal+0x2c4>)
 8017584:	6938      	ldr	r0, [r7, #16]
 8017586:	f005 fcfd 	bl	801cf84 <tcp_sent>
    }
    /* when waiting for close, set up poll interval to 500ms */
    tcp_poll(tpcb, poll_tcp, 1);
 801758a:	2201      	movs	r2, #1
 801758c:	4912      	ldr	r1, [pc, #72]	@ (80175d8 <lwip_netconn_do_close_internal+0x2c8>)
 801758e:	6938      	ldr	r0, [r7, #16]
 8017590:	f005 fd58 	bl	801d044 <tcp_poll>
    tcp_err(tpcb, err_tcp);
 8017594:	4911      	ldr	r1, [pc, #68]	@ (80175dc <lwip_netconn_do_close_internal+0x2cc>)
 8017596:	6938      	ldr	r0, [r7, #16]
 8017598:	f005 fd18 	bl	801cfcc <tcp_err>
    tcp_arg(tpcb, conn);
 801759c:	6879      	ldr	r1, [r7, #4]
 801759e:	6938      	ldr	r0, [r7, #16]
 80175a0:	f005 fcba 	bl	801cf18 <tcp_arg>
    /* don't restore recv callback: we don't want to receive any more data */
  }
  /* If closing didn't succeed, we get called again either
     from poll_tcp or from sent_tcp */
  LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
 80175a4:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80175a8:	2b00      	cmp	r3, #0
 80175aa:	d106      	bne.n	80175ba <lwip_netconn_do_close_internal+0x2aa>
 80175ac:	4b06      	ldr	r3, [pc, #24]	@ (80175c8 <lwip_netconn_do_close_internal+0x2b8>)
 80175ae:	f240 424d 	movw	r2, #1101	@ 0x44d
 80175b2:	490b      	ldr	r1, [pc, #44]	@ (80175e0 <lwip_netconn_do_close_internal+0x2d0>)
 80175b4:	4806      	ldr	r0, [pc, #24]	@ (80175d0 <lwip_netconn_do_close_internal+0x2c0>)
 80175b6:	f013 f8d1 	bl	802a75c <iprintf>
  return err;
 80175ba:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 80175be:	4618      	mov	r0, r3
 80175c0:	3718      	adds	r7, #24
 80175c2:	46bd      	mov	sp, r7
 80175c4:	bd80      	pop	{r7, pc}
 80175c6:	bf00      	nop
 80175c8:	0802ddc0 	.word	0x0802ddc0
 80175cc:	0802e0fc 	.word	0x0802e0fc
 80175d0:	0802de04 	.word	0x0802de04
 80175d4:	08016cd9 	.word	0x08016cd9
 80175d8:	08016c09 	.word	0x08016c09
 80175dc:	08016d89 	.word	0x08016d89
 80175e0:	0802e120 	.word	0x0802e120

080175e4 <lwip_netconn_do_delconn>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_delconn(void *m)
{
 80175e4:	b580      	push	{r7, lr}
 80175e6:	b084      	sub	sp, #16
 80175e8:	af00      	add	r7, sp, #0
 80175ea:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80175ec:	687b      	ldr	r3, [r7, #4]
 80175ee:	60fb      	str	r3, [r7, #12]

  enum netconn_state state = msg->conn->state;
 80175f0:	68fb      	ldr	r3, [r7, #12]
 80175f2:	681b      	ldr	r3, [r3, #0]
 80175f4:	785b      	ldrb	r3, [r3, #1]
 80175f6:	72fb      	strb	r3, [r7, #11]
  LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
 80175f8:	7afb      	ldrb	r3, [r7, #11]
 80175fa:	2b00      	cmp	r3, #0
 80175fc:	d00d      	beq.n	801761a <lwip_netconn_do_delconn+0x36>
 80175fe:	68fb      	ldr	r3, [r7, #12]
 8017600:	681b      	ldr	r3, [r3, #0]
 8017602:	781b      	ldrb	r3, [r3, #0]
 8017604:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017608:	2b10      	cmp	r3, #16
 801760a:	d006      	beq.n	801761a <lwip_netconn_do_delconn+0x36>
 801760c:	4b60      	ldr	r3, [pc, #384]	@ (8017790 <lwip_netconn_do_delconn+0x1ac>)
 801760e:	f240 425e 	movw	r2, #1118	@ 0x45e
 8017612:	4960      	ldr	r1, [pc, #384]	@ (8017794 <lwip_netconn_do_delconn+0x1b0>)
 8017614:	4860      	ldr	r0, [pc, #384]	@ (8017798 <lwip_netconn_do_delconn+0x1b4>)
 8017616:	f013 f8a1 	bl	802a75c <iprintf>
      msg->conn->state = NETCONN_NONE;
      sys_sem_signal(op_completed_sem);
    }
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  if (((state != NETCONN_NONE) &&
 801761a:	7afb      	ldrb	r3, [r7, #11]
 801761c:	2b00      	cmp	r3, #0
 801761e:	d005      	beq.n	801762c <lwip_netconn_do_delconn+0x48>
 8017620:	7afb      	ldrb	r3, [r7, #11]
 8017622:	2b02      	cmp	r3, #2
 8017624:	d002      	beq.n	801762c <lwip_netconn_do_delconn+0x48>
       (state != NETCONN_LISTEN) &&
 8017626:	7afb      	ldrb	r3, [r7, #11]
 8017628:	2b03      	cmp	r3, #3
 801762a:	d10a      	bne.n	8017642 <lwip_netconn_do_delconn+0x5e>
       (state != NETCONN_CONNECT)) ||
 801762c:	7afb      	ldrb	r3, [r7, #11]
 801762e:	2b03      	cmp	r3, #3
 8017630:	d10b      	bne.n	801764a <lwip_netconn_do_delconn+0x66>
      ((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
 8017632:	68fb      	ldr	r3, [r7, #12]
 8017634:	681b      	ldr	r3, [r3, #0]
 8017636:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801763a:	f003 0304 	and.w	r3, r3, #4
 801763e:	2b00      	cmp	r3, #0
 8017640:	d103      	bne.n	801764a <lwip_netconn_do_delconn+0x66>
    /* This means either a blocking write or blocking connect is running
       (nonblocking write returns and sets state to NONE) */
    msg->err = ERR_INPROGRESS;
 8017642:	68fb      	ldr	r3, [r7, #12]
 8017644:	22fb      	movs	r2, #251	@ 0xfb
 8017646:	711a      	strb	r2, [r3, #4]
 8017648:	e096      	b.n	8017778 <lwip_netconn_do_delconn+0x194>
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    LWIP_ASSERT("blocking connect in progress",
 801764a:	7afb      	ldrb	r3, [r7, #11]
 801764c:	2b03      	cmp	r3, #3
 801764e:	d10e      	bne.n	801766e <lwip_netconn_do_delconn+0x8a>
 8017650:	68fb      	ldr	r3, [r7, #12]
 8017652:	681b      	ldr	r3, [r3, #0]
 8017654:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017658:	f003 0304 	and.w	r3, r3, #4
 801765c:	2b00      	cmp	r3, #0
 801765e:	d106      	bne.n	801766e <lwip_netconn_do_delconn+0x8a>
 8017660:	4b4b      	ldr	r3, [pc, #300]	@ (8017790 <lwip_netconn_do_delconn+0x1ac>)
 8017662:	f240 427a 	movw	r2, #1146	@ 0x47a
 8017666:	494d      	ldr	r1, [pc, #308]	@ (801779c <lwip_netconn_do_delconn+0x1b8>)
 8017668:	484b      	ldr	r0, [pc, #300]	@ (8017798 <lwip_netconn_do_delconn+0x1b4>)
 801766a:	f013 f877 	bl	802a75c <iprintf>
                (state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
    msg->err = ERR_OK;
 801766e:	68fb      	ldr	r3, [r7, #12]
 8017670:	2200      	movs	r2, #0
 8017672:	711a      	strb	r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
    /* Mark mboxes invalid */
    netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
    netconn_drain(msg->conn);
 8017674:	68fb      	ldr	r3, [r7, #12]
 8017676:	681b      	ldr	r3, [r3, #0]
 8017678:	4618      	mov	r0, r3
 801767a:	f7ff fdcb 	bl	8017214 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */

    if (msg->conn->pcb.tcp != NULL) {
 801767e:	68fb      	ldr	r3, [r7, #12]
 8017680:	681b      	ldr	r3, [r3, #0]
 8017682:	685b      	ldr	r3, [r3, #4]
 8017684:	2b00      	cmp	r3, #0
 8017686:	d05d      	beq.n	8017744 <lwip_netconn_do_delconn+0x160>

      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017688:	68fb      	ldr	r3, [r7, #12]
 801768a:	681b      	ldr	r3, [r3, #0]
 801768c:	781b      	ldrb	r3, [r3, #0]
 801768e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017692:	2b10      	cmp	r3, #16
 8017694:	d00d      	beq.n	80176b2 <lwip_netconn_do_delconn+0xce>
 8017696:	2b20      	cmp	r3, #32
 8017698:	d14f      	bne.n	801773a <lwip_netconn_do_delconn+0x156>
          raw_remove(msg->conn->pcb.raw);
          break;
#endif /* LWIP_RAW */
#if LWIP_UDP
        case NETCONN_UDP:
          msg->conn->pcb.udp->recv_arg = NULL;
 801769a:	68fb      	ldr	r3, [r7, #12]
 801769c:	681b      	ldr	r3, [r3, #0]
 801769e:	685b      	ldr	r3, [r3, #4]
 80176a0:	2200      	movs	r2, #0
 80176a2:	61da      	str	r2, [r3, #28]
          udp_remove(msg->conn->pcb.udp);
 80176a4:	68fb      	ldr	r3, [r7, #12]
 80176a6:	681b      	ldr	r3, [r3, #0]
 80176a8:	685b      	ldr	r3, [r3, #4]
 80176aa:	4618      	mov	r0, r3
 80176ac:	f00a ffc6 	bl	802263c <udp_remove>
          break;
 80176b0:	e044      	b.n	801773c <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
        case NETCONN_TCP:
          LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 80176b2:	68fb      	ldr	r3, [r7, #12]
 80176b4:	681b      	ldr	r3, [r3, #0]
 80176b6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80176b8:	2b00      	cmp	r3, #0
 80176ba:	d006      	beq.n	80176ca <lwip_netconn_do_delconn+0xe6>
 80176bc:	4b34      	ldr	r3, [pc, #208]	@ (8017790 <lwip_netconn_do_delconn+0x1ac>)
 80176be:	f240 4294 	movw	r2, #1172	@ 0x494
 80176c2:	4937      	ldr	r1, [pc, #220]	@ (80177a0 <lwip_netconn_do_delconn+0x1bc>)
 80176c4:	4834      	ldr	r0, [pc, #208]	@ (8017798 <lwip_netconn_do_delconn+0x1b4>)
 80176c6:	f013 f849 	bl	802a75c <iprintf>
          msg->conn->state = NETCONN_CLOSE;
 80176ca:	68fb      	ldr	r3, [r7, #12]
 80176cc:	681b      	ldr	r3, [r3, #0]
 80176ce:	2204      	movs	r2, #4
 80176d0:	705a      	strb	r2, [r3, #1]
          msg->msg.sd.shut = NETCONN_SHUT_RDWR;
 80176d2:	68fb      	ldr	r3, [r7, #12]
 80176d4:	2203      	movs	r2, #3
 80176d6:	721a      	strb	r2, [r3, #8]
          msg->conn->current_msg = msg;
 80176d8:	68fb      	ldr	r3, [r7, #12]
 80176da:	681b      	ldr	r3, [r3, #0]
 80176dc:	68fa      	ldr	r2, [r7, #12]
 80176de:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
          if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 80176e0:	68fb      	ldr	r3, [r7, #12]
 80176e2:	681b      	ldr	r3, [r3, #0]
 80176e4:	2100      	movs	r1, #0
 80176e6:	4618      	mov	r0, r3
 80176e8:	f7ff fe12 	bl	8017310 <lwip_netconn_do_close_internal>
 80176ec:	4603      	mov	r3, r0
 80176ee:	2b00      	cmp	r3, #0
 80176f0:	d049      	beq.n	8017786 <lwip_netconn_do_delconn+0x1a2>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 80176f2:	68fb      	ldr	r3, [r7, #12]
 80176f4:	681b      	ldr	r3, [r3, #0]
 80176f6:	785b      	ldrb	r3, [r3, #1]
 80176f8:	2b04      	cmp	r3, #4
 80176fa:	d006      	beq.n	801770a <lwip_netconn_do_delconn+0x126>
 80176fc:	4b24      	ldr	r3, [pc, #144]	@ (8017790 <lwip_netconn_do_delconn+0x1ac>)
 80176fe:	f240 429a 	movw	r2, #1178	@ 0x49a
 8017702:	4928      	ldr	r1, [pc, #160]	@ (80177a4 <lwip_netconn_do_delconn+0x1c0>)
 8017704:	4824      	ldr	r0, [pc, #144]	@ (8017798 <lwip_netconn_do_delconn+0x1b4>)
 8017706:	f013 f829 	bl	802a75c <iprintf>
            UNLOCK_TCPIP_CORE();
 801770a:	f7f9 fbeb 	bl	8010ee4 <sys_unlock_tcpip_core>
            sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801770e:	68fb      	ldr	r3, [r7, #12]
 8017710:	681b      	ldr	r3, [r3, #0]
 8017712:	330c      	adds	r3, #12
 8017714:	2100      	movs	r1, #0
 8017716:	4618      	mov	r0, r3
 8017718:	f00f fcc3 	bl	80270a2 <sys_arch_sem_wait>
            LOCK_TCPIP_CORE();
 801771c:	f7f9 fbd2 	bl	8010ec4 <sys_lock_tcpip_core>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8017720:	68fb      	ldr	r3, [r7, #12]
 8017722:	681b      	ldr	r3, [r3, #0]
 8017724:	785b      	ldrb	r3, [r3, #1]
 8017726:	2b00      	cmp	r3, #0
 8017728:	d02d      	beq.n	8017786 <lwip_netconn_do_delconn+0x1a2>
 801772a:	4b19      	ldr	r3, [pc, #100]	@ (8017790 <lwip_netconn_do_delconn+0x1ac>)
 801772c:	f240 429e 	movw	r2, #1182	@ 0x49e
 8017730:	491c      	ldr	r1, [pc, #112]	@ (80177a4 <lwip_netconn_do_delconn+0x1c0>)
 8017732:	4819      	ldr	r0, [pc, #100]	@ (8017798 <lwip_netconn_do_delconn+0x1b4>)
 8017734:	f013 f812 	bl	802a75c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
          lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
          /* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
             the application thread, so we can return at this point! */
          return;
 8017738:	e025      	b.n	8017786 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
        default:
          break;
 801773a:	bf00      	nop
      }
      msg->conn->pcb.tcp = NULL;
 801773c:	68fb      	ldr	r3, [r7, #12]
 801773e:	681b      	ldr	r3, [r3, #0]
 8017740:	2200      	movs	r2, #0
 8017742:	605a      	str	r2, [r3, #4]
    }
    /* tcp netconns don't come here! */

    /* @todo: this lets select make the socket readable and writable,
       which is wrong! errfd instead? */
    API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
 8017744:	68fb      	ldr	r3, [r7, #12]
 8017746:	681b      	ldr	r3, [r3, #0]
 8017748:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801774a:	2b00      	cmp	r3, #0
 801774c:	d007      	beq.n	801775e <lwip_netconn_do_delconn+0x17a>
 801774e:	68fb      	ldr	r3, [r7, #12]
 8017750:	681b      	ldr	r3, [r3, #0]
 8017752:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017754:	68fa      	ldr	r2, [r7, #12]
 8017756:	6810      	ldr	r0, [r2, #0]
 8017758:	2200      	movs	r2, #0
 801775a:	2100      	movs	r1, #0
 801775c:	4798      	blx	r3
    API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
 801775e:	68fb      	ldr	r3, [r7, #12]
 8017760:	681b      	ldr	r3, [r3, #0]
 8017762:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017764:	2b00      	cmp	r3, #0
 8017766:	d007      	beq.n	8017778 <lwip_netconn_do_delconn+0x194>
 8017768:	68fb      	ldr	r3, [r7, #12]
 801776a:	681b      	ldr	r3, [r3, #0]
 801776c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801776e:	68fa      	ldr	r2, [r7, #12]
 8017770:	6810      	ldr	r0, [r2, #0]
 8017772:	2200      	movs	r2, #0
 8017774:	2102      	movs	r1, #2
 8017776:	4798      	blx	r3
  }
  if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
 8017778:	68fb      	ldr	r3, [r7, #12]
 801777a:	681b      	ldr	r3, [r3, #0]
 801777c:	330c      	adds	r3, #12
 801777e:	4618      	mov	r0, r3
 8017780:	f00f fcda 	bl	8027138 <sys_sem_valid>
 8017784:	e000      	b.n	8017788 <lwip_netconn_do_delconn+0x1a4>
          return;
 8017786:	bf00      	nop
    TCPIP_APIMSG_ACK(msg);
  }
}
 8017788:	3710      	adds	r7, #16
 801778a:	46bd      	mov	sp, r7
 801778c:	bd80      	pop	{r7, pc}
 801778e:	bf00      	nop
 8017790:	0802ddc0 	.word	0x0802ddc0
 8017794:	0802e130 	.word	0x0802e130
 8017798:	0802de04 	.word	0x0802de04
 801779c:	0802e144 	.word	0x0802e144
 80177a0:	0802e164 	.word	0x0802e164
 80177a4:	0802e180 	.word	0x0802e180

080177a8 <lwip_netconn_do_connected>:
 *
 * @see tcp.h (struct tcp_pcb.connected) for parameters and return values
 */
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
 80177a8:	b580      	push	{r7, lr}
 80177aa:	b088      	sub	sp, #32
 80177ac:	af00      	add	r7, sp, #0
 80177ae:	60f8      	str	r0, [r7, #12]
 80177b0:	60b9      	str	r1, [r7, #8]
 80177b2:	4613      	mov	r3, r2
 80177b4:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int was_blocking;
  sys_sem_t *op_completed_sem = NULL;
 80177b6:	2300      	movs	r3, #0
 80177b8:	61fb      	str	r3, [r7, #28]

  LWIP_UNUSED_ARG(pcb);

  conn = (struct netconn *)arg;
 80177ba:	68fb      	ldr	r3, [r7, #12]
 80177bc:	61bb      	str	r3, [r7, #24]

  if (conn == NULL) {
 80177be:	69bb      	ldr	r3, [r7, #24]
 80177c0:	2b00      	cmp	r3, #0
 80177c2:	d102      	bne.n	80177ca <lwip_netconn_do_connected+0x22>
    return ERR_VAL;
 80177c4:	f06f 0305 	mvn.w	r3, #5
 80177c8:	e074      	b.n	80178b4 <lwip_netconn_do_connected+0x10c>
  }

  LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
 80177ca:	69bb      	ldr	r3, [r7, #24]
 80177cc:	785b      	ldrb	r3, [r3, #1]
 80177ce:	2b03      	cmp	r3, #3
 80177d0:	d006      	beq.n	80177e0 <lwip_netconn_do_connected+0x38>
 80177d2:	4b3a      	ldr	r3, [pc, #232]	@ (80178bc <lwip_netconn_do_connected+0x114>)
 80177d4:	f240 5223 	movw	r2, #1315	@ 0x523
 80177d8:	4939      	ldr	r1, [pc, #228]	@ (80178c0 <lwip_netconn_do_connected+0x118>)
 80177da:	483a      	ldr	r0, [pc, #232]	@ (80178c4 <lwip_netconn_do_connected+0x11c>)
 80177dc:	f012 ffbe 	bl	802a75c <iprintf>
  LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
 80177e0:	69bb      	ldr	r3, [r7, #24]
 80177e2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177e4:	2b00      	cmp	r3, #0
 80177e6:	d10d      	bne.n	8017804 <lwip_netconn_do_connected+0x5c>
 80177e8:	69bb      	ldr	r3, [r7, #24]
 80177ea:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80177ee:	f003 0304 	and.w	r3, r3, #4
 80177f2:	2b00      	cmp	r3, #0
 80177f4:	d106      	bne.n	8017804 <lwip_netconn_do_connected+0x5c>
 80177f6:	4b31      	ldr	r3, [pc, #196]	@ (80178bc <lwip_netconn_do_connected+0x114>)
 80177f8:	f240 5224 	movw	r2, #1316	@ 0x524
 80177fc:	4932      	ldr	r1, [pc, #200]	@ (80178c8 <lwip_netconn_do_connected+0x120>)
 80177fe:	4831      	ldr	r0, [pc, #196]	@ (80178c4 <lwip_netconn_do_connected+0x11c>)
 8017800:	f012 ffac 	bl	802a75c <iprintf>
              (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));

  if (conn->current_msg != NULL) {
 8017804:	69bb      	ldr	r3, [r7, #24]
 8017806:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017808:	2b00      	cmp	r3, #0
 801780a:	d008      	beq.n	801781e <lwip_netconn_do_connected+0x76>
    conn->current_msg->err = err;
 801780c:	69bb      	ldr	r3, [r7, #24]
 801780e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017810:	79fa      	ldrb	r2, [r7, #7]
 8017812:	711a      	strb	r2, [r3, #4]
    op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017814:	69bb      	ldr	r3, [r7, #24]
 8017816:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017818:	681b      	ldr	r3, [r3, #0]
 801781a:	330c      	adds	r3, #12
 801781c:	61fb      	str	r3, [r7, #28]
  }
  if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
 801781e:	69bb      	ldr	r3, [r7, #24]
 8017820:	781b      	ldrb	r3, [r3, #0]
 8017822:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017826:	2b10      	cmp	r3, #16
 8017828:	d106      	bne.n	8017838 <lwip_netconn_do_connected+0x90>
 801782a:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801782e:	2b00      	cmp	r3, #0
 8017830:	d102      	bne.n	8017838 <lwip_netconn_do_connected+0x90>
    setup_tcp(conn);
 8017832:	69b8      	ldr	r0, [r7, #24]
 8017834:	f7ff fb82 	bl	8016f3c <setup_tcp>
  }
  was_blocking = !IN_NONBLOCKING_CONNECT(conn);
 8017838:	69bb      	ldr	r3, [r7, #24]
 801783a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801783e:	f003 0304 	and.w	r3, r3, #4
 8017842:	2b00      	cmp	r3, #0
 8017844:	bf0c      	ite	eq
 8017846:	2301      	moveq	r3, #1
 8017848:	2300      	movne	r3, #0
 801784a:	b2db      	uxtb	r3, r3
 801784c:	617b      	str	r3, [r7, #20]
  SET_NONBLOCKING_CONNECT(conn, 0);
 801784e:	69bb      	ldr	r3, [r7, #24]
 8017850:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017854:	f023 0304 	bic.w	r3, r3, #4
 8017858:	b2da      	uxtb	r2, r3
 801785a:	69bb      	ldr	r3, [r7, #24]
 801785c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  LWIP_ASSERT("blocking connect state error",
 8017860:	697b      	ldr	r3, [r7, #20]
 8017862:	2b00      	cmp	r3, #0
 8017864:	d002      	beq.n	801786c <lwip_netconn_do_connected+0xc4>
 8017866:	69fb      	ldr	r3, [r7, #28]
 8017868:	2b00      	cmp	r3, #0
 801786a:	d10c      	bne.n	8017886 <lwip_netconn_do_connected+0xde>
 801786c:	697b      	ldr	r3, [r7, #20]
 801786e:	2b00      	cmp	r3, #0
 8017870:	d102      	bne.n	8017878 <lwip_netconn_do_connected+0xd0>
 8017872:	69fb      	ldr	r3, [r7, #28]
 8017874:	2b00      	cmp	r3, #0
 8017876:	d006      	beq.n	8017886 <lwip_netconn_do_connected+0xde>
 8017878:	4b10      	ldr	r3, [pc, #64]	@ (80178bc <lwip_netconn_do_connected+0x114>)
 801787a:	f44f 62a6 	mov.w	r2, #1328	@ 0x530
 801787e:	4913      	ldr	r1, [pc, #76]	@ (80178cc <lwip_netconn_do_connected+0x124>)
 8017880:	4810      	ldr	r0, [pc, #64]	@ (80178c4 <lwip_netconn_do_connected+0x11c>)
 8017882:	f012 ff6b 	bl	802a75c <iprintf>
              (was_blocking && op_completed_sem != NULL) ||
              (!was_blocking && op_completed_sem == NULL));
  conn->current_msg = NULL;
 8017886:	69bb      	ldr	r3, [r7, #24]
 8017888:	2200      	movs	r2, #0
 801788a:	62da      	str	r2, [r3, #44]	@ 0x2c
  conn->state = NETCONN_NONE;
 801788c:	69bb      	ldr	r3, [r7, #24]
 801788e:	2200      	movs	r2, #0
 8017890:	705a      	strb	r2, [r3, #1]
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8017892:	69bb      	ldr	r3, [r7, #24]
 8017894:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017896:	2b00      	cmp	r3, #0
 8017898:	d005      	beq.n	80178a6 <lwip_netconn_do_connected+0xfe>
 801789a:	69bb      	ldr	r3, [r7, #24]
 801789c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801789e:	2200      	movs	r2, #0
 80178a0:	2102      	movs	r1, #2
 80178a2:	69b8      	ldr	r0, [r7, #24]
 80178a4:	4798      	blx	r3

  if (was_blocking) {
 80178a6:	697b      	ldr	r3, [r7, #20]
 80178a8:	2b00      	cmp	r3, #0
 80178aa:	d002      	beq.n	80178b2 <lwip_netconn_do_connected+0x10a>
    sys_sem_signal(op_completed_sem);
 80178ac:	69f8      	ldr	r0, [r7, #28]
 80178ae:	f00f fc29 	bl	8027104 <sys_sem_signal>
  }
  return ERR_OK;
 80178b2:	2300      	movs	r3, #0
}
 80178b4:	4618      	mov	r0, r3
 80178b6:	3720      	adds	r7, #32
 80178b8:	46bd      	mov	sp, r7
 80178ba:	bd80      	pop	{r7, pc}
 80178bc:	0802ddc0 	.word	0x0802ddc0
 80178c0:	0802e188 	.word	0x0802e188
 80178c4:	0802de04 	.word	0x0802de04
 80178c8:	0802e1a8 	.word	0x0802e1a8
 80178cc:	0802e1e8 	.word	0x0802e1e8

080178d0 <lwip_netconn_do_connect>:
 * @param m the api_msg pointing to the connection and containing
 *          the IP address and port to connect to
 */
void
lwip_netconn_do_connect(void *m)
{
 80178d0:	b580      	push	{r7, lr}
 80178d2:	b086      	sub	sp, #24
 80178d4:	af00      	add	r7, sp, #0
 80178d6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80178d8:	687b      	ldr	r3, [r7, #4]
 80178da:	613b      	str	r3, [r7, #16]
  err_t err;

  if (msg->conn->pcb.tcp == NULL) {
 80178dc:	693b      	ldr	r3, [r7, #16]
 80178de:	681b      	ldr	r3, [r3, #0]
 80178e0:	685b      	ldr	r3, [r3, #4]
 80178e2:	2b00      	cmp	r3, #0
 80178e4:	d102      	bne.n	80178ec <lwip_netconn_do_connect+0x1c>
    /* This may happen when calling netconn_connect() a second time */
    err = ERR_CLSD;
 80178e6:	23f1      	movs	r3, #241	@ 0xf1
 80178e8:	75fb      	strb	r3, [r7, #23]
 80178ea:	e09e      	b.n	8017a2a <lwip_netconn_do_connect+0x15a>
  } else {
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 80178ec:	693b      	ldr	r3, [r7, #16]
 80178ee:	681b      	ldr	r3, [r3, #0]
 80178f0:	781b      	ldrb	r3, [r3, #0]
 80178f2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80178f6:	2b10      	cmp	r3, #16
 80178f8:	d00f      	beq.n	801791a <lwip_netconn_do_connect+0x4a>
 80178fa:	2b20      	cmp	r3, #32
 80178fc:	f040 808a 	bne.w	8017a14 <lwip_netconn_do_connect+0x144>
        err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
 8017900:	693b      	ldr	r3, [r7, #16]
 8017902:	681b      	ldr	r3, [r3, #0]
 8017904:	6858      	ldr	r0, [r3, #4]
 8017906:	693b      	ldr	r3, [r7, #16]
 8017908:	6899      	ldr	r1, [r3, #8]
 801790a:	693b      	ldr	r3, [r7, #16]
 801790c:	899b      	ldrh	r3, [r3, #12]
 801790e:	461a      	mov	r2, r3
 8017910:	f00a fdd8 	bl	80224c4 <udp_connect>
 8017914:	4603      	mov	r3, r0
 8017916:	75fb      	strb	r3, [r7, #23]
        break;
 8017918:	e087      	b.n	8017a2a <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        /* Prevent connect while doing any other action. */
        if (msg->conn->state == NETCONN_CONNECT) {
 801791a:	693b      	ldr	r3, [r7, #16]
 801791c:	681b      	ldr	r3, [r3, #0]
 801791e:	785b      	ldrb	r3, [r3, #1]
 8017920:	2b03      	cmp	r3, #3
 8017922:	d102      	bne.n	801792a <lwip_netconn_do_connect+0x5a>
          err = ERR_ALREADY;
 8017924:	23f7      	movs	r3, #247	@ 0xf7
 8017926:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
              return;
            }
          }
        }
        break;
 8017928:	e07e      	b.n	8017a28 <lwip_netconn_do_connect+0x158>
        } else if (msg->conn->state != NETCONN_NONE) {
 801792a:	693b      	ldr	r3, [r7, #16]
 801792c:	681b      	ldr	r3, [r3, #0]
 801792e:	785b      	ldrb	r3, [r3, #1]
 8017930:	2b00      	cmp	r3, #0
 8017932:	d002      	beq.n	801793a <lwip_netconn_do_connect+0x6a>
          err = ERR_ISCONN;
 8017934:	23f6      	movs	r3, #246	@ 0xf6
 8017936:	75fb      	strb	r3, [r7, #23]
        break;
 8017938:	e076      	b.n	8017a28 <lwip_netconn_do_connect+0x158>
          setup_tcp(msg->conn);
 801793a:	693b      	ldr	r3, [r7, #16]
 801793c:	681b      	ldr	r3, [r3, #0]
 801793e:	4618      	mov	r0, r3
 8017940:	f7ff fafc 	bl	8016f3c <setup_tcp>
          err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
 8017944:	693b      	ldr	r3, [r7, #16]
 8017946:	681b      	ldr	r3, [r3, #0]
 8017948:	6858      	ldr	r0, [r3, #4]
 801794a:	693b      	ldr	r3, [r7, #16]
 801794c:	6899      	ldr	r1, [r3, #8]
 801794e:	693b      	ldr	r3, [r7, #16]
 8017950:	899a      	ldrh	r2, [r3, #12]
 8017952:	4b3a      	ldr	r3, [pc, #232]	@ (8017a3c <lwip_netconn_do_connect+0x16c>)
 8017954:	f004 fb90 	bl	801c078 <tcp_connect>
 8017958:	4603      	mov	r3, r0
 801795a:	75fb      	strb	r3, [r7, #23]
          if (err == ERR_OK) {
 801795c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8017960:	2b00      	cmp	r3, #0
 8017962:	d161      	bne.n	8017a28 <lwip_netconn_do_connect+0x158>
            u8_t non_blocking = netconn_is_nonblocking(msg->conn);
 8017964:	693b      	ldr	r3, [r7, #16]
 8017966:	681b      	ldr	r3, [r3, #0]
 8017968:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801796c:	f003 0302 	and.w	r3, r3, #2
 8017970:	2b00      	cmp	r3, #0
 8017972:	bf14      	ite	ne
 8017974:	2301      	movne	r3, #1
 8017976:	2300      	moveq	r3, #0
 8017978:	b2db      	uxtb	r3, r3
 801797a:	73fb      	strb	r3, [r7, #15]
            msg->conn->state = NETCONN_CONNECT;
 801797c:	693b      	ldr	r3, [r7, #16]
 801797e:	681b      	ldr	r3, [r3, #0]
 8017980:	2203      	movs	r2, #3
 8017982:	705a      	strb	r2, [r3, #1]
            SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
 8017984:	7bfb      	ldrb	r3, [r7, #15]
 8017986:	2b00      	cmp	r3, #0
 8017988:	d00b      	beq.n	80179a2 <lwip_netconn_do_connect+0xd2>
 801798a:	693b      	ldr	r3, [r7, #16]
 801798c:	681b      	ldr	r3, [r3, #0]
 801798e:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8017992:	693b      	ldr	r3, [r7, #16]
 8017994:	681b      	ldr	r3, [r3, #0]
 8017996:	f042 0204 	orr.w	r2, r2, #4
 801799a:	b2d2      	uxtb	r2, r2
 801799c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 80179a0:	e00a      	b.n	80179b8 <lwip_netconn_do_connect+0xe8>
 80179a2:	693b      	ldr	r3, [r7, #16]
 80179a4:	681b      	ldr	r3, [r3, #0]
 80179a6:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80179aa:	693b      	ldr	r3, [r7, #16]
 80179ac:	681b      	ldr	r3, [r3, #0]
 80179ae:	f022 0204 	bic.w	r2, r2, #4
 80179b2:	b2d2      	uxtb	r2, r2
 80179b4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
            if (non_blocking) {
 80179b8:	7bfb      	ldrb	r3, [r7, #15]
 80179ba:	2b00      	cmp	r3, #0
 80179bc:	d002      	beq.n	80179c4 <lwip_netconn_do_connect+0xf4>
              err = ERR_INPROGRESS;
 80179be:	23fb      	movs	r3, #251	@ 0xfb
 80179c0:	75fb      	strb	r3, [r7, #23]
        break;
 80179c2:	e031      	b.n	8017a28 <lwip_netconn_do_connect+0x158>
              msg->conn->current_msg = msg;
 80179c4:	693b      	ldr	r3, [r7, #16]
 80179c6:	681b      	ldr	r3, [r3, #0]
 80179c8:	693a      	ldr	r2, [r7, #16]
 80179ca:	62da      	str	r2, [r3, #44]	@ 0x2c
              LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
 80179cc:	693b      	ldr	r3, [r7, #16]
 80179ce:	681b      	ldr	r3, [r3, #0]
 80179d0:	785b      	ldrb	r3, [r3, #1]
 80179d2:	2b03      	cmp	r3, #3
 80179d4:	d006      	beq.n	80179e4 <lwip_netconn_do_connect+0x114>
 80179d6:	4b1a      	ldr	r3, [pc, #104]	@ (8017a40 <lwip_netconn_do_connect+0x170>)
 80179d8:	f44f 62ae 	mov.w	r2, #1392	@ 0x570
 80179dc:	4919      	ldr	r1, [pc, #100]	@ (8017a44 <lwip_netconn_do_connect+0x174>)
 80179de:	481a      	ldr	r0, [pc, #104]	@ (8017a48 <lwip_netconn_do_connect+0x178>)
 80179e0:	f012 febc 	bl	802a75c <iprintf>
              UNLOCK_TCPIP_CORE();
 80179e4:	f7f9 fa7e 	bl	8010ee4 <sys_unlock_tcpip_core>
              sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 80179e8:	693b      	ldr	r3, [r7, #16]
 80179ea:	681b      	ldr	r3, [r3, #0]
 80179ec:	330c      	adds	r3, #12
 80179ee:	2100      	movs	r1, #0
 80179f0:	4618      	mov	r0, r3
 80179f2:	f00f fb56 	bl	80270a2 <sys_arch_sem_wait>
              LOCK_TCPIP_CORE();
 80179f6:	f7f9 fa65 	bl	8010ec4 <sys_lock_tcpip_core>
              LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
 80179fa:	693b      	ldr	r3, [r7, #16]
 80179fc:	681b      	ldr	r3, [r3, #0]
 80179fe:	785b      	ldrb	r3, [r3, #1]
 8017a00:	2b03      	cmp	r3, #3
 8017a02:	d116      	bne.n	8017a32 <lwip_netconn_do_connect+0x162>
 8017a04:	4b0e      	ldr	r3, [pc, #56]	@ (8017a40 <lwip_netconn_do_connect+0x170>)
 8017a06:	f240 5274 	movw	r2, #1396	@ 0x574
 8017a0a:	490e      	ldr	r1, [pc, #56]	@ (8017a44 <lwip_netconn_do_connect+0x174>)
 8017a0c:	480e      	ldr	r0, [pc, #56]	@ (8017a48 <lwip_netconn_do_connect+0x178>)
 8017a0e:	f012 fea5 	bl	802a75c <iprintf>
              return;
 8017a12:	e00e      	b.n	8017a32 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
      default:
        LWIP_ERROR("Invalid netconn type", 0, do {
 8017a14:	4b0a      	ldr	r3, [pc, #40]	@ (8017a40 <lwip_netconn_do_connect+0x170>)
 8017a16:	f240 527d 	movw	r2, #1405	@ 0x57d
 8017a1a:	490c      	ldr	r1, [pc, #48]	@ (8017a4c <lwip_netconn_do_connect+0x17c>)
 8017a1c:	480a      	ldr	r0, [pc, #40]	@ (8017a48 <lwip_netconn_do_connect+0x178>)
 8017a1e:	f012 fe9d 	bl	802a75c <iprintf>
 8017a22:	23fa      	movs	r3, #250	@ 0xfa
 8017a24:	75fb      	strb	r3, [r7, #23]
          err = ERR_VAL;
        } while (0));
        break;
 8017a26:	e000      	b.n	8017a2a <lwip_netconn_do_connect+0x15a>
        break;
 8017a28:	bf00      	nop
    }
  }
  msg->err = err;
 8017a2a:	693b      	ldr	r3, [r7, #16]
 8017a2c:	7dfa      	ldrb	r2, [r7, #23]
 8017a2e:	711a      	strb	r2, [r3, #4]
 8017a30:	e000      	b.n	8017a34 <lwip_netconn_do_connect+0x164>
              return;
 8017a32:	bf00      	nop
  /* For all other protocols, netconn_connect() calls netconn_apimsg(),
     so use TCPIP_APIMSG_ACK() here. */
  TCPIP_APIMSG_ACK(msg);
}
 8017a34:	3718      	adds	r7, #24
 8017a36:	46bd      	mov	sp, r7
 8017a38:	bd80      	pop	{r7, pc}
 8017a3a:	bf00      	nop
 8017a3c:	080177a9 	.word	0x080177a9
 8017a40:	0802ddc0 	.word	0x0802ddc0
 8017a44:	0802e180 	.word	0x0802e180
 8017a48:	0802de04 	.word	0x0802de04
 8017a4c:	0802e208 	.word	0x0802e208

08017a50 <lwip_netconn_do_disconnect>:
 *
 * @param m the api_msg pointing to the connection to disconnect
 */
void
lwip_netconn_do_disconnect(void *m)
{
 8017a50:	b580      	push	{r7, lr}
 8017a52:	b084      	sub	sp, #16
 8017a54:	af00      	add	r7, sp, #0
 8017a56:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017a58:	687b      	ldr	r3, [r7, #4]
 8017a5a:	60fb      	str	r3, [r7, #12]

#if LWIP_UDP
  if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
 8017a5c:	68fb      	ldr	r3, [r7, #12]
 8017a5e:	681b      	ldr	r3, [r3, #0]
 8017a60:	781b      	ldrb	r3, [r3, #0]
 8017a62:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017a66:	2b20      	cmp	r3, #32
 8017a68:	d109      	bne.n	8017a7e <lwip_netconn_do_disconnect+0x2e>
    udp_disconnect(msg->conn->pcb.udp);
 8017a6a:	68fb      	ldr	r3, [r7, #12]
 8017a6c:	681b      	ldr	r3, [r3, #0]
 8017a6e:	685b      	ldr	r3, [r3, #4]
 8017a70:	4618      	mov	r0, r3
 8017a72:	f00a fd97 	bl	80225a4 <udp_disconnect>
    msg->err = ERR_OK;
 8017a76:	68fb      	ldr	r3, [r7, #12]
 8017a78:	2200      	movs	r2, #0
 8017a7a:	711a      	strb	r2, [r3, #4]
#endif /* LWIP_UDP */
  {
    msg->err = ERR_VAL;
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017a7c:	e002      	b.n	8017a84 <lwip_netconn_do_disconnect+0x34>
    msg->err = ERR_VAL;
 8017a7e:	68fb      	ldr	r3, [r7, #12]
 8017a80:	22fa      	movs	r2, #250	@ 0xfa
 8017a82:	711a      	strb	r2, [r3, #4]
}
 8017a84:	bf00      	nop
 8017a86:	3710      	adds	r7, #16
 8017a88:	46bd      	mov	sp, r7
 8017a8a:	bd80      	pop	{r7, pc}

08017a8c <lwip_netconn_do_send>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_send(void *m)
{
 8017a8c:	b580      	push	{r7, lr}
 8017a8e:	b084      	sub	sp, #16
 8017a90:	af00      	add	r7, sp, #0
 8017a92:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017a94:	687b      	ldr	r3, [r7, #4]
 8017a96:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8017a98:	68bb      	ldr	r3, [r7, #8]
 8017a9a:	681b      	ldr	r3, [r3, #0]
 8017a9c:	4618      	mov	r0, r3
 8017a9e:	f7fe fef9 	bl	8016894 <netconn_err>
 8017aa2:	4603      	mov	r3, r0
 8017aa4:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8017aa6:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8017aaa:	2b00      	cmp	r3, #0
 8017aac:	d134      	bne.n	8017b18 <lwip_netconn_do_send+0x8c>
    if (msg->conn->pcb.tcp != NULL) {
 8017aae:	68bb      	ldr	r3, [r7, #8]
 8017ab0:	681b      	ldr	r3, [r3, #0]
 8017ab2:	685b      	ldr	r3, [r3, #4]
 8017ab4:	2b00      	cmp	r3, #0
 8017ab6:	d02d      	beq.n	8017b14 <lwip_netconn_do_send+0x88>
      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017ab8:	68bb      	ldr	r3, [r7, #8]
 8017aba:	681b      	ldr	r3, [r3, #0]
 8017abc:	781b      	ldrb	r3, [r3, #0]
 8017abe:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017ac2:	2b20      	cmp	r3, #32
 8017ac4:	d123      	bne.n	8017b0e <lwip_netconn_do_send+0x82>
            err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
                                    &msg->msg.b->addr, msg->msg.b->port,
                                    msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
          }
#else /* LWIP_CHECKSUM_ON_COPY */
          if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
 8017ac6:	68bb      	ldr	r3, [r7, #8]
 8017ac8:	689b      	ldr	r3, [r3, #8]
 8017aca:	689b      	ldr	r3, [r3, #8]
 8017acc:	2b00      	cmp	r3, #0
 8017ace:	d10c      	bne.n	8017aea <lwip_netconn_do_send+0x5e>
            err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
 8017ad0:	68bb      	ldr	r3, [r7, #8]
 8017ad2:	681b      	ldr	r3, [r3, #0]
 8017ad4:	685a      	ldr	r2, [r3, #4]
 8017ad6:	68bb      	ldr	r3, [r7, #8]
 8017ad8:	689b      	ldr	r3, [r3, #8]
 8017ada:	681b      	ldr	r3, [r3, #0]
 8017adc:	4619      	mov	r1, r3
 8017ade:	4610      	mov	r0, r2
 8017ae0:	f00a fa7a 	bl	8021fd8 <udp_send>
 8017ae4:	4603      	mov	r3, r0
 8017ae6:	73fb      	strb	r3, [r7, #15]
          } else {
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
          }
#endif /* LWIP_CHECKSUM_ON_COPY */
          break;
 8017ae8:	e016      	b.n	8017b18 <lwip_netconn_do_send+0x8c>
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
 8017aea:	68bb      	ldr	r3, [r7, #8]
 8017aec:	681b      	ldr	r3, [r3, #0]
 8017aee:	6858      	ldr	r0, [r3, #4]
 8017af0:	68bb      	ldr	r3, [r7, #8]
 8017af2:	689b      	ldr	r3, [r3, #8]
 8017af4:	6819      	ldr	r1, [r3, #0]
 8017af6:	68bb      	ldr	r3, [r7, #8]
 8017af8:	689b      	ldr	r3, [r3, #8]
 8017afa:	f103 0208 	add.w	r2, r3, #8
 8017afe:	68bb      	ldr	r3, [r7, #8]
 8017b00:	689b      	ldr	r3, [r3, #8]
 8017b02:	899b      	ldrh	r3, [r3, #12]
 8017b04:	f00a fa9c 	bl	8022040 <udp_sendto>
 8017b08:	4603      	mov	r3, r0
 8017b0a:	73fb      	strb	r3, [r7, #15]
          break;
 8017b0c:	e004      	b.n	8017b18 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
        default:
          err = ERR_CONN;
 8017b0e:	23f5      	movs	r3, #245	@ 0xf5
 8017b10:	73fb      	strb	r3, [r7, #15]
          break;
 8017b12:	e001      	b.n	8017b18 <lwip_netconn_do_send+0x8c>
      }
    } else {
      err = ERR_CONN;
 8017b14:	23f5      	movs	r3, #245	@ 0xf5
 8017b16:	73fb      	strb	r3, [r7, #15]
    }
  }
  msg->err = err;
 8017b18:	68bb      	ldr	r3, [r7, #8]
 8017b1a:	7bfa      	ldrb	r2, [r7, #15]
 8017b1c:	711a      	strb	r2, [r3, #4]
  TCPIP_APIMSG_ACK(msg);
}
 8017b1e:	bf00      	nop
 8017b20:	3710      	adds	r7, #16
 8017b22:	46bd      	mov	sp, r7
 8017b24:	bd80      	pop	{r7, pc}

08017b26 <lwip_netconn_do_recv>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_recv(void *m)
{
 8017b26:	b580      	push	{r7, lr}
 8017b28:	b086      	sub	sp, #24
 8017b2a:	af00      	add	r7, sp, #0
 8017b2c:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017b2e:	687b      	ldr	r3, [r7, #4]
 8017b30:	613b      	str	r3, [r7, #16]

  msg->err = ERR_OK;
 8017b32:	693b      	ldr	r3, [r7, #16]
 8017b34:	2200      	movs	r2, #0
 8017b36:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp != NULL) {
 8017b38:	693b      	ldr	r3, [r7, #16]
 8017b3a:	681b      	ldr	r3, [r3, #0]
 8017b3c:	685b      	ldr	r3, [r3, #4]
 8017b3e:	2b00      	cmp	r3, #0
 8017b40:	d022      	beq.n	8017b88 <lwip_netconn_do_recv+0x62>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8017b42:	693b      	ldr	r3, [r7, #16]
 8017b44:	681b      	ldr	r3, [r3, #0]
 8017b46:	781b      	ldrb	r3, [r3, #0]
 8017b48:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017b4c:	2b10      	cmp	r3, #16
 8017b4e:	d11b      	bne.n	8017b88 <lwip_netconn_do_recv+0x62>
      size_t remaining = msg->msg.r.len;
 8017b50:	693b      	ldr	r3, [r7, #16]
 8017b52:	689b      	ldr	r3, [r3, #8]
 8017b54:	617b      	str	r3, [r7, #20]
      do {
        u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
 8017b56:	697b      	ldr	r3, [r7, #20]
 8017b58:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017b5c:	d202      	bcs.n	8017b64 <lwip_netconn_do_recv+0x3e>
 8017b5e:	697b      	ldr	r3, [r7, #20]
 8017b60:	b29b      	uxth	r3, r3
 8017b62:	e001      	b.n	8017b68 <lwip_netconn_do_recv+0x42>
 8017b64:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8017b68:	81fb      	strh	r3, [r7, #14]
        tcp_recved(msg->conn->pcb.tcp, recved);
 8017b6a:	693b      	ldr	r3, [r7, #16]
 8017b6c:	681b      	ldr	r3, [r3, #0]
 8017b6e:	685b      	ldr	r3, [r3, #4]
 8017b70:	89fa      	ldrh	r2, [r7, #14]
 8017b72:	4611      	mov	r1, r2
 8017b74:	4618      	mov	r0, r3
 8017b76:	f004 f9e5 	bl	801bf44 <tcp_recved>
        remaining -= recved;
 8017b7a:	89fb      	ldrh	r3, [r7, #14]
 8017b7c:	697a      	ldr	r2, [r7, #20]
 8017b7e:	1ad3      	subs	r3, r2, r3
 8017b80:	617b      	str	r3, [r7, #20]
      } while (remaining != 0);
 8017b82:	697b      	ldr	r3, [r7, #20]
 8017b84:	2b00      	cmp	r3, #0
 8017b86:	d1e6      	bne.n	8017b56 <lwip_netconn_do_recv+0x30>
    }
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017b88:	bf00      	nop
 8017b8a:	3718      	adds	r7, #24
 8017b8c:	46bd      	mov	sp, r7
 8017b8e:	bd80      	pop	{r7, pc}

08017b90 <lwip_netconn_do_writemore>:
 * @return ERR_OK
 *         ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
 */
static err_t
lwip_netconn_do_writemore(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8017b90:	b580      	push	{r7, lr}
 8017b92:	b088      	sub	sp, #32
 8017b94:	af00      	add	r7, sp, #0
 8017b96:	6078      	str	r0, [r7, #4]
 8017b98:	460b      	mov	r3, r1
 8017b9a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  const void *dataptr;
  u16_t len, available;
  u8_t write_finished = 0;
 8017b9c:	2300      	movs	r3, #0
 8017b9e:	76fb      	strb	r3, [r7, #27]
  size_t diff;
  u8_t dontblock;
  u8_t apiflags;
  u8_t write_more;

  LWIP_ASSERT("conn != NULL", conn != NULL);
 8017ba0:	687b      	ldr	r3, [r7, #4]
 8017ba2:	2b00      	cmp	r3, #0
 8017ba4:	d106      	bne.n	8017bb4 <lwip_netconn_do_writemore+0x24>
 8017ba6:	4b61      	ldr	r3, [pc, #388]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017ba8:	f240 6273 	movw	r2, #1651	@ 0x673
 8017bac:	4960      	ldr	r1, [pc, #384]	@ (8017d30 <lwip_netconn_do_writemore+0x1a0>)
 8017bae:	4861      	ldr	r0, [pc, #388]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017bb0:	f012 fdd4 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
 8017bb4:	687b      	ldr	r3, [r7, #4]
 8017bb6:	785b      	ldrb	r3, [r3, #1]
 8017bb8:	2b01      	cmp	r3, #1
 8017bba:	d006      	beq.n	8017bca <lwip_netconn_do_writemore+0x3a>
 8017bbc:	4b5b      	ldr	r3, [pc, #364]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017bbe:	f240 6274 	movw	r2, #1652	@ 0x674
 8017bc2:	495d      	ldr	r1, [pc, #372]	@ (8017d38 <lwip_netconn_do_writemore+0x1a8>)
 8017bc4:	485b      	ldr	r0, [pc, #364]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017bc6:	f012 fdc9 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8017bca:	687b      	ldr	r3, [r7, #4]
 8017bcc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017bce:	2b00      	cmp	r3, #0
 8017bd0:	d106      	bne.n	8017be0 <lwip_netconn_do_writemore+0x50>
 8017bd2:	4b56      	ldr	r3, [pc, #344]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017bd4:	f240 6275 	movw	r2, #1653	@ 0x675
 8017bd8:	4958      	ldr	r1, [pc, #352]	@ (8017d3c <lwip_netconn_do_writemore+0x1ac>)
 8017bda:	4856      	ldr	r0, [pc, #344]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017bdc:	f012 fdbe 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
 8017be0:	687b      	ldr	r3, [r7, #4]
 8017be2:	685b      	ldr	r3, [r3, #4]
 8017be4:	2b00      	cmp	r3, #0
 8017be6:	d106      	bne.n	8017bf6 <lwip_netconn_do_writemore+0x66>
 8017be8:	4b50      	ldr	r3, [pc, #320]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017bea:	f240 6276 	movw	r2, #1654	@ 0x676
 8017bee:	4954      	ldr	r1, [pc, #336]	@ (8017d40 <lwip_netconn_do_writemore+0x1b0>)
 8017bf0:	4850      	ldr	r0, [pc, #320]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017bf2:	f012 fdb3 	bl	802a75c <iprintf>
  LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
 8017bf6:	687b      	ldr	r3, [r7, #4]
 8017bf8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017bfa:	699a      	ldr	r2, [r3, #24]
 8017bfc:	687b      	ldr	r3, [r7, #4]
 8017bfe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c00:	695b      	ldr	r3, [r3, #20]
 8017c02:	429a      	cmp	r2, r3
 8017c04:	d306      	bcc.n	8017c14 <lwip_netconn_do_writemore+0x84>
 8017c06:	4b49      	ldr	r3, [pc, #292]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017c08:	f240 6277 	movw	r2, #1655	@ 0x677
 8017c0c:	494d      	ldr	r1, [pc, #308]	@ (8017d44 <lwip_netconn_do_writemore+0x1b4>)
 8017c0e:	4849      	ldr	r0, [pc, #292]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017c10:	f012 fda4 	bl	802a75c <iprintf>
              conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
  LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
 8017c14:	687b      	ldr	r3, [r7, #4]
 8017c16:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c18:	899b      	ldrh	r3, [r3, #12]
 8017c1a:	2b00      	cmp	r3, #0
 8017c1c:	d106      	bne.n	8017c2c <lwip_netconn_do_writemore+0x9c>
 8017c1e:	4b43      	ldr	r3, [pc, #268]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017c20:	f240 6279 	movw	r2, #1657	@ 0x679
 8017c24:	4948      	ldr	r1, [pc, #288]	@ (8017d48 <lwip_netconn_do_writemore+0x1b8>)
 8017c26:	4843      	ldr	r0, [pc, #268]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017c28:	f012 fd98 	bl	802a75c <iprintf>

  apiflags = conn->current_msg->msg.w.apiflags;
 8017c2c:	687b      	ldr	r3, [r7, #4]
 8017c2e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c30:	7f1b      	ldrb	r3, [r3, #28]
 8017c32:	76bb      	strb	r3, [r7, #26]
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8017c34:	687b      	ldr	r3, [r7, #4]
 8017c36:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017c3a:	f003 0302 	and.w	r3, r3, #2
 8017c3e:	2b00      	cmp	r3, #0
 8017c40:	d104      	bne.n	8017c4c <lwip_netconn_do_writemore+0xbc>
 8017c42:	7ebb      	ldrb	r3, [r7, #26]
 8017c44:	f003 0304 	and.w	r3, r3, #4
 8017c48:	2b00      	cmp	r3, #0
 8017c4a:	d001      	beq.n	8017c50 <lwip_netconn_do_writemore+0xc0>
 8017c4c:	2301      	movs	r3, #1
 8017c4e:	e000      	b.n	8017c52 <lwip_netconn_do_writemore+0xc2>
 8017c50:	2300      	movs	r3, #0
 8017c52:	763b      	strb	r3, [r7, #24]
    }
  } else
#endif /* LWIP_SO_SNDTIMEO */
  {
    do {
      dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
 8017c54:	687b      	ldr	r3, [r7, #4]
 8017c56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c58:	689b      	ldr	r3, [r3, #8]
 8017c5a:	681a      	ldr	r2, [r3, #0]
 8017c5c:	687b      	ldr	r3, [r7, #4]
 8017c5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c60:	691b      	ldr	r3, [r3, #16]
 8017c62:	4413      	add	r3, r2
 8017c64:	617b      	str	r3, [r7, #20]
      diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
 8017c66:	687b      	ldr	r3, [r7, #4]
 8017c68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c6a:	689b      	ldr	r3, [r3, #8]
 8017c6c:	685a      	ldr	r2, [r3, #4]
 8017c6e:	687b      	ldr	r3, [r7, #4]
 8017c70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017c72:	691b      	ldr	r3, [r3, #16]
 8017c74:	1ad3      	subs	r3, r2, r3
 8017c76:	613b      	str	r3, [r7, #16]
      if (diff > 0xffffUL) { /* max_u16_t */
 8017c78:	693b      	ldr	r3, [r7, #16]
 8017c7a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017c7e:	d307      	bcc.n	8017c90 <lwip_netconn_do_writemore+0x100>
        len = 0xffff;
 8017c80:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8017c84:	83bb      	strh	r3, [r7, #28]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8017c86:	7ebb      	ldrb	r3, [r7, #26]
 8017c88:	f043 0302 	orr.w	r3, r3, #2
 8017c8c:	76bb      	strb	r3, [r7, #26]
 8017c8e:	e001      	b.n	8017c94 <lwip_netconn_do_writemore+0x104>
      } else {
        len = (u16_t)diff;
 8017c90:	693b      	ldr	r3, [r7, #16]
 8017c92:	83bb      	strh	r3, [r7, #28]
      }
      available = tcp_sndbuf(conn->pcb.tcp);
 8017c94:	687b      	ldr	r3, [r7, #4]
 8017c96:	685b      	ldr	r3, [r3, #4]
 8017c98:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8017c9c:	81fb      	strh	r3, [r7, #14]
      if (available < len) {
 8017c9e:	89fa      	ldrh	r2, [r7, #14]
 8017ca0:	8bbb      	ldrh	r3, [r7, #28]
 8017ca2:	429a      	cmp	r2, r3
 8017ca4:	d216      	bcs.n	8017cd4 <lwip_netconn_do_writemore+0x144>
        /* don't try to write more than sendbuf */
        len = available;
 8017ca6:	89fb      	ldrh	r3, [r7, #14]
 8017ca8:	83bb      	strh	r3, [r7, #28]
        if (dontblock) {
 8017caa:	7e3b      	ldrb	r3, [r7, #24]
 8017cac:	2b00      	cmp	r3, #0
 8017cae:	d00d      	beq.n	8017ccc <lwip_netconn_do_writemore+0x13c>
          if (!len) {
 8017cb0:	8bbb      	ldrh	r3, [r7, #28]
 8017cb2:	2b00      	cmp	r3, #0
 8017cb4:	d10e      	bne.n	8017cd4 <lwip_netconn_do_writemore+0x144>
            /* set error according to partial write or not */
            err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017cb6:	687b      	ldr	r3, [r7, #4]
 8017cb8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017cba:	699b      	ldr	r3, [r3, #24]
 8017cbc:	2b00      	cmp	r3, #0
 8017cbe:	d102      	bne.n	8017cc6 <lwip_netconn_do_writemore+0x136>
 8017cc0:	f06f 0306 	mvn.w	r3, #6
 8017cc4:	e000      	b.n	8017cc8 <lwip_netconn_do_writemore+0x138>
 8017cc6:	2300      	movs	r3, #0
 8017cc8:	77fb      	strb	r3, [r7, #31]
            goto err_mem;
 8017cca:	e08f      	b.n	8017dec <lwip_netconn_do_writemore+0x25c>
          }
        } else {
          apiflags |= TCP_WRITE_FLAG_MORE;
 8017ccc:	7ebb      	ldrb	r3, [r7, #26]
 8017cce:	f043 0302 	orr.w	r3, r3, #2
 8017cd2:	76bb      	strb	r3, [r7, #26]
        }
      }
      LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
 8017cd4:	687b      	ldr	r3, [r7, #4]
 8017cd6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017cd8:	691a      	ldr	r2, [r3, #16]
 8017cda:	8bbb      	ldrh	r3, [r7, #28]
 8017cdc:	441a      	add	r2, r3
 8017cde:	687b      	ldr	r3, [r7, #4]
 8017ce0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017ce2:	689b      	ldr	r3, [r3, #8]
 8017ce4:	685b      	ldr	r3, [r3, #4]
 8017ce6:	429a      	cmp	r2, r3
 8017ce8:	d906      	bls.n	8017cf8 <lwip_netconn_do_writemore+0x168>
 8017cea:	4b10      	ldr	r3, [pc, #64]	@ (8017d2c <lwip_netconn_do_writemore+0x19c>)
 8017cec:	f240 62a3 	movw	r2, #1699	@ 0x6a3
 8017cf0:	4916      	ldr	r1, [pc, #88]	@ (8017d4c <lwip_netconn_do_writemore+0x1bc>)
 8017cf2:	4810      	ldr	r0, [pc, #64]	@ (8017d34 <lwip_netconn_do_writemore+0x1a4>)
 8017cf4:	f012 fd32 	bl	802a75c <iprintf>
                  ((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
      /* we should loop around for more sending in the following cases:
           1) We couldn't finish the current vector because of 16-bit size limitations.
              tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
           2) We are sending the remainder of the current vector and have more */
      if ((len == 0xffff && diff > 0xffffUL) ||
 8017cf8:	8bbb      	ldrh	r3, [r7, #28]
 8017cfa:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8017cfe:	4293      	cmp	r3, r2
 8017d00:	d103      	bne.n	8017d0a <lwip_netconn_do_writemore+0x17a>
 8017d02:	693b      	ldr	r3, [r7, #16]
 8017d04:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017d08:	d209      	bcs.n	8017d1e <lwip_netconn_do_writemore+0x18e>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8017d0a:	693b      	ldr	r3, [r7, #16]
 8017d0c:	b29b      	uxth	r3, r3
      if ((len == 0xffff && diff > 0xffffUL) ||
 8017d0e:	8bba      	ldrh	r2, [r7, #28]
 8017d10:	429a      	cmp	r2, r3
 8017d12:	d11d      	bne.n	8017d50 <lwip_netconn_do_writemore+0x1c0>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8017d14:	687b      	ldr	r3, [r7, #4]
 8017d16:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d18:	899b      	ldrh	r3, [r3, #12]
 8017d1a:	2b01      	cmp	r3, #1
 8017d1c:	d918      	bls.n	8017d50 <lwip_netconn_do_writemore+0x1c0>
        write_more = 1;
 8017d1e:	2301      	movs	r3, #1
 8017d20:	767b      	strb	r3, [r7, #25]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8017d22:	7ebb      	ldrb	r3, [r7, #26]
 8017d24:	f043 0302 	orr.w	r3, r3, #2
 8017d28:	76bb      	strb	r3, [r7, #26]
 8017d2a:	e013      	b.n	8017d54 <lwip_netconn_do_writemore+0x1c4>
 8017d2c:	0802ddc0 	.word	0x0802ddc0
 8017d30:	0802df18 	.word	0x0802df18
 8017d34:	0802de04 	.word	0x0802de04
 8017d38:	0802e220 	.word	0x0802e220
 8017d3c:	0802df28 	.word	0x0802df28
 8017d40:	0802e240 	.word	0x0802e240
 8017d44:	0802e258 	.word	0x0802e258
 8017d48:	0802e298 	.word	0x0802e298
 8017d4c:	0802e2c0 	.word	0x0802e2c0
      } else {
        write_more = 0;
 8017d50:	2300      	movs	r3, #0
 8017d52:	767b      	strb	r3, [r7, #25]
      }
      err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
 8017d54:	687b      	ldr	r3, [r7, #4]
 8017d56:	6858      	ldr	r0, [r3, #4]
 8017d58:	7ebb      	ldrb	r3, [r7, #26]
 8017d5a:	8bba      	ldrh	r2, [r7, #28]
 8017d5c:	6979      	ldr	r1, [r7, #20]
 8017d5e:	f008 f827 	bl	801fdb0 <tcp_write>
 8017d62:	4603      	mov	r3, r0
 8017d64:	77fb      	strb	r3, [r7, #31]
      if (err == ERR_OK) {
 8017d66:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017d6a:	2b00      	cmp	r3, #0
 8017d6c:	d12c      	bne.n	8017dc8 <lwip_netconn_do_writemore+0x238>
        conn->current_msg->msg.w.offset += len;
 8017d6e:	687b      	ldr	r3, [r7, #4]
 8017d70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d72:	6999      	ldr	r1, [r3, #24]
 8017d74:	8bba      	ldrh	r2, [r7, #28]
 8017d76:	687b      	ldr	r3, [r7, #4]
 8017d78:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d7a:	440a      	add	r2, r1
 8017d7c:	619a      	str	r2, [r3, #24]
        conn->current_msg->msg.w.vector_off += len;
 8017d7e:	687b      	ldr	r3, [r7, #4]
 8017d80:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d82:	6919      	ldr	r1, [r3, #16]
 8017d84:	8bba      	ldrh	r2, [r7, #28]
 8017d86:	687b      	ldr	r3, [r7, #4]
 8017d88:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d8a:	440a      	add	r2, r1
 8017d8c:	611a      	str	r2, [r3, #16]
        /* check if current vector is finished */
        if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
 8017d8e:	687b      	ldr	r3, [r7, #4]
 8017d90:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d92:	691a      	ldr	r2, [r3, #16]
 8017d94:	687b      	ldr	r3, [r7, #4]
 8017d96:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017d98:	689b      	ldr	r3, [r3, #8]
 8017d9a:	685b      	ldr	r3, [r3, #4]
 8017d9c:	429a      	cmp	r2, r3
 8017d9e:	d113      	bne.n	8017dc8 <lwip_netconn_do_writemore+0x238>
          conn->current_msg->msg.w.vector_cnt--;
 8017da0:	687b      	ldr	r3, [r7, #4]
 8017da2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017da4:	899a      	ldrh	r2, [r3, #12]
 8017da6:	3a01      	subs	r2, #1
 8017da8:	b292      	uxth	r2, r2
 8017daa:	819a      	strh	r2, [r3, #12]
          /* if we have additional vectors, move on to them */
          if (conn->current_msg->msg.w.vector_cnt > 0) {
 8017dac:	687b      	ldr	r3, [r7, #4]
 8017dae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017db0:	899b      	ldrh	r3, [r3, #12]
 8017db2:	2b00      	cmp	r3, #0
 8017db4:	d008      	beq.n	8017dc8 <lwip_netconn_do_writemore+0x238>
            conn->current_msg->msg.w.vector++;
 8017db6:	687b      	ldr	r3, [r7, #4]
 8017db8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017dba:	689a      	ldr	r2, [r3, #8]
 8017dbc:	3208      	adds	r2, #8
 8017dbe:	609a      	str	r2, [r3, #8]
            conn->current_msg->msg.w.vector_off = 0;
 8017dc0:	687b      	ldr	r3, [r7, #4]
 8017dc2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017dc4:	2200      	movs	r2, #0
 8017dc6:	611a      	str	r2, [r3, #16]
          }
        }
      }
    } while (write_more && err == ERR_OK);
 8017dc8:	7e7b      	ldrb	r3, [r7, #25]
 8017dca:	2b00      	cmp	r3, #0
 8017dcc:	d004      	beq.n	8017dd8 <lwip_netconn_do_writemore+0x248>
 8017dce:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017dd2:	2b00      	cmp	r3, #0
 8017dd4:	f43f af3e 	beq.w	8017c54 <lwip_netconn_do_writemore+0xc4>
    /* if OK or memory error, check available space */
    if ((err == ERR_OK) || (err == ERR_MEM)) {
 8017dd8:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017ddc:	2b00      	cmp	r3, #0
 8017dde:	d004      	beq.n	8017dea <lwip_netconn_do_writemore+0x25a>
 8017de0:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017de4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017de8:	d137      	bne.n	8017e5a <lwip_netconn_do_writemore+0x2ca>
err_mem:
 8017dea:	bf00      	nop
      if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
 8017dec:	7e3b      	ldrb	r3, [r7, #24]
 8017dee:	2b00      	cmp	r3, #0
 8017df0:	d01b      	beq.n	8017e2a <lwip_netconn_do_writemore+0x29a>
 8017df2:	687b      	ldr	r3, [r7, #4]
 8017df4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017df6:	699a      	ldr	r2, [r3, #24]
 8017df8:	687b      	ldr	r3, [r7, #4]
 8017dfa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017dfc:	695b      	ldr	r3, [r3, #20]
 8017dfe:	429a      	cmp	r2, r3
 8017e00:	d213      	bcs.n	8017e2a <lwip_netconn_do_writemore+0x29a>
        /* non-blocking write did not write everything: mark the pcb non-writable
           and let poll_tcp check writable space to mark the pcb writable again */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8017e02:	687b      	ldr	r3, [r7, #4]
 8017e04:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017e06:	2b00      	cmp	r3, #0
 8017e08:	d005      	beq.n	8017e16 <lwip_netconn_do_writemore+0x286>
 8017e0a:	687b      	ldr	r3, [r7, #4]
 8017e0c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017e0e:	2200      	movs	r2, #0
 8017e10:	2103      	movs	r1, #3
 8017e12:	6878      	ldr	r0, [r7, #4]
 8017e14:	4798      	blx	r3
        conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
 8017e16:	687b      	ldr	r3, [r7, #4]
 8017e18:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017e1c:	f043 0310 	orr.w	r3, r3, #16
 8017e20:	b2da      	uxtb	r2, r3
 8017e22:	687b      	ldr	r3, [r7, #4]
 8017e24:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8017e28:	e017      	b.n	8017e5a <lwip_netconn_do_writemore+0x2ca>
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 8017e2a:	687b      	ldr	r3, [r7, #4]
 8017e2c:	685b      	ldr	r3, [r3, #4]
 8017e2e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8017e32:	f640 3269 	movw	r2, #2921	@ 0xb69
 8017e36:	4293      	cmp	r3, r2
 8017e38:	d905      	bls.n	8017e46 <lwip_netconn_do_writemore+0x2b6>
                 (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
 8017e3a:	687b      	ldr	r3, [r7, #4]
 8017e3c:	685b      	ldr	r3, [r3, #4]
 8017e3e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 8017e42:	2b07      	cmp	r3, #7
 8017e44:	d909      	bls.n	8017e5a <lwip_netconn_do_writemore+0x2ca>
        /* The queued byte- or pbuf-count exceeds the configured low-water limit,
           let select mark this pcb as non-writable. */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8017e46:	687b      	ldr	r3, [r7, #4]
 8017e48:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017e4a:	2b00      	cmp	r3, #0
 8017e4c:	d005      	beq.n	8017e5a <lwip_netconn_do_writemore+0x2ca>
 8017e4e:	687b      	ldr	r3, [r7, #4]
 8017e50:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017e52:	2200      	movs	r2, #0
 8017e54:	2103      	movs	r1, #3
 8017e56:	6878      	ldr	r0, [r7, #4]
 8017e58:	4798      	blx	r3
      }
    }

    if (err == ERR_OK) {
 8017e5a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017e5e:	2b00      	cmp	r3, #0
 8017e60:	d11d      	bne.n	8017e9e <lwip_netconn_do_writemore+0x30e>
      err_t out_err;
      if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
 8017e62:	687b      	ldr	r3, [r7, #4]
 8017e64:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017e66:	699a      	ldr	r2, [r3, #24]
 8017e68:	687b      	ldr	r3, [r7, #4]
 8017e6a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017e6c:	695b      	ldr	r3, [r3, #20]
 8017e6e:	429a      	cmp	r2, r3
 8017e70:	d002      	beq.n	8017e78 <lwip_netconn_do_writemore+0x2e8>
 8017e72:	7e3b      	ldrb	r3, [r7, #24]
 8017e74:	2b00      	cmp	r3, #0
 8017e76:	d001      	beq.n	8017e7c <lwip_netconn_do_writemore+0x2ec>
        /* return sent length (caller reads length from msg.w.offset) */
        write_finished = 1;
 8017e78:	2301      	movs	r3, #1
 8017e7a:	76fb      	strb	r3, [r7, #27]
      }
      out_err = tcp_output(conn->pcb.tcp);
 8017e7c:	687b      	ldr	r3, [r7, #4]
 8017e7e:	685b      	ldr	r3, [r3, #4]
 8017e80:	4618      	mov	r0, r3
 8017e82:	f008 fddf 	bl	8020a44 <tcp_output>
 8017e86:	4603      	mov	r3, r0
 8017e88:	733b      	strb	r3, [r7, #12]
      if (out_err == ERR_RTE) {
 8017e8a:	f997 300c 	ldrsb.w	r3, [r7, #12]
 8017e8e:	f113 0f04 	cmn.w	r3, #4
 8017e92:	d12c      	bne.n	8017eee <lwip_netconn_do_writemore+0x35e>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8017e94:	7b3b      	ldrb	r3, [r7, #12]
 8017e96:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017e98:	2301      	movs	r3, #1
 8017e9a:	76fb      	strb	r3, [r7, #27]
 8017e9c:	e027      	b.n	8017eee <lwip_netconn_do_writemore+0x35e>
      }
    } else if (err == ERR_MEM) {
 8017e9e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8017ea2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017ea6:	d120      	bne.n	8017eea <lwip_netconn_do_writemore+0x35a>
         For blocking sockets, we do NOT return to the application
         thread, since ERR_MEM is only a temporary error! Non-blocking
         will remain non-writable until sent_tcp/poll_tcp is called */

      /* tcp_write returned ERR_MEM, try tcp_output anyway */
      err_t out_err = tcp_output(conn->pcb.tcp);
 8017ea8:	687b      	ldr	r3, [r7, #4]
 8017eaa:	685b      	ldr	r3, [r3, #4]
 8017eac:	4618      	mov	r0, r3
 8017eae:	f008 fdc9 	bl	8020a44 <tcp_output>
 8017eb2:	4603      	mov	r3, r0
 8017eb4:	737b      	strb	r3, [r7, #13]
      if (out_err == ERR_RTE) {
 8017eb6:	f997 300d 	ldrsb.w	r3, [r7, #13]
 8017eba:	f113 0f04 	cmn.w	r3, #4
 8017ebe:	d104      	bne.n	8017eca <lwip_netconn_do_writemore+0x33a>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8017ec0:	7b7b      	ldrb	r3, [r7, #13]
 8017ec2:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017ec4:	2301      	movs	r3, #1
 8017ec6:	76fb      	strb	r3, [r7, #27]
 8017ec8:	e011      	b.n	8017eee <lwip_netconn_do_writemore+0x35e>
      } else if (dontblock) {
 8017eca:	7e3b      	ldrb	r3, [r7, #24]
 8017ecc:	2b00      	cmp	r3, #0
 8017ece:	d00e      	beq.n	8017eee <lwip_netconn_do_writemore+0x35e>
        /* non-blocking write is done on ERR_MEM, set error according
           to partial write or not */
        err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017ed0:	687b      	ldr	r3, [r7, #4]
 8017ed2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017ed4:	699b      	ldr	r3, [r3, #24]
 8017ed6:	2b00      	cmp	r3, #0
 8017ed8:	d102      	bne.n	8017ee0 <lwip_netconn_do_writemore+0x350>
 8017eda:	f06f 0306 	mvn.w	r3, #6
 8017ede:	e000      	b.n	8017ee2 <lwip_netconn_do_writemore+0x352>
 8017ee0:	2300      	movs	r3, #0
 8017ee2:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8017ee4:	2301      	movs	r3, #1
 8017ee6:	76fb      	strb	r3, [r7, #27]
 8017ee8:	e001      	b.n	8017eee <lwip_netconn_do_writemore+0x35e>
      }
    } else {
      /* On errors != ERR_MEM, we don't try writing any more but return
         the error to the application thread. */
      write_finished = 1;
 8017eea:	2301      	movs	r3, #1
 8017eec:	76fb      	strb	r3, [r7, #27]
    }
  }
  if (write_finished) {
 8017eee:	7efb      	ldrb	r3, [r7, #27]
 8017ef0:	2b00      	cmp	r3, #0
 8017ef2:	d015      	beq.n	8017f20 <lwip_netconn_do_writemore+0x390>
    /* everything was written: set back connection state
       and back to application task */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017ef4:	687b      	ldr	r3, [r7, #4]
 8017ef6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017ef8:	681b      	ldr	r3, [r3, #0]
 8017efa:	330c      	adds	r3, #12
 8017efc:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 8017efe:	687b      	ldr	r3, [r7, #4]
 8017f00:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f02:	7ffa      	ldrb	r2, [r7, #31]
 8017f04:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8017f06:	687b      	ldr	r3, [r7, #4]
 8017f08:	2200      	movs	r2, #0
 8017f0a:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 8017f0c:	687b      	ldr	r3, [r7, #4]
 8017f0e:	2200      	movs	r2, #0
 8017f10:	705a      	strb	r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8017f12:	78fb      	ldrb	r3, [r7, #3]
 8017f14:	2b00      	cmp	r3, #0
 8017f16:	d006      	beq.n	8017f26 <lwip_netconn_do_writemore+0x396>
#endif
    {
      sys_sem_signal(op_completed_sem);
 8017f18:	68b8      	ldr	r0, [r7, #8]
 8017f1a:	f00f f8f3 	bl	8027104 <sys_sem_signal>
 8017f1e:	e002      	b.n	8017f26 <lwip_netconn_do_writemore+0x396>
    }
  }
#if LWIP_TCPIP_CORE_LOCKING
  else {
    return ERR_MEM;
 8017f20:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8017f24:	e000      	b.n	8017f28 <lwip_netconn_do_writemore+0x398>
  }
#endif
  return ERR_OK;
 8017f26:	2300      	movs	r3, #0
}
 8017f28:	4618      	mov	r0, r3
 8017f2a:	3720      	adds	r7, #32
 8017f2c:	46bd      	mov	sp, r7
 8017f2e:	bd80      	pop	{r7, pc}

08017f30 <lwip_netconn_do_write>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_write(void *m)
{
 8017f30:	b580      	push	{r7, lr}
 8017f32:	b084      	sub	sp, #16
 8017f34:	af00      	add	r7, sp, #0
 8017f36:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017f38:	687b      	ldr	r3, [r7, #4]
 8017f3a:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8017f3c:	68bb      	ldr	r3, [r7, #8]
 8017f3e:	681b      	ldr	r3, [r3, #0]
 8017f40:	4618      	mov	r0, r3
 8017f42:	f7fe fca7 	bl	8016894 <netconn_err>
 8017f46:	4603      	mov	r3, r0
 8017f48:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8017f4a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8017f4e:	2b00      	cmp	r3, #0
 8017f50:	d164      	bne.n	801801c <lwip_netconn_do_write+0xec>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8017f52:	68bb      	ldr	r3, [r7, #8]
 8017f54:	681b      	ldr	r3, [r3, #0]
 8017f56:	781b      	ldrb	r3, [r3, #0]
 8017f58:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017f5c:	2b10      	cmp	r3, #16
 8017f5e:	d15b      	bne.n	8018018 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
      if (msg->conn->state != NETCONN_NONE) {
 8017f60:	68bb      	ldr	r3, [r7, #8]
 8017f62:	681b      	ldr	r3, [r3, #0]
 8017f64:	785b      	ldrb	r3, [r3, #1]
 8017f66:	2b00      	cmp	r3, #0
 8017f68:	d002      	beq.n	8017f70 <lwip_netconn_do_write+0x40>
        /* netconn is connecting, closing or in blocking write */
        err = ERR_INPROGRESS;
 8017f6a:	23fb      	movs	r3, #251	@ 0xfb
 8017f6c:	73fb      	strb	r3, [r7, #15]
 8017f6e:	e055      	b.n	801801c <lwip_netconn_do_write+0xec>
      } else if (msg->conn->pcb.tcp != NULL) {
 8017f70:	68bb      	ldr	r3, [r7, #8]
 8017f72:	681b      	ldr	r3, [r3, #0]
 8017f74:	685b      	ldr	r3, [r3, #4]
 8017f76:	2b00      	cmp	r3, #0
 8017f78:	d04b      	beq.n	8018012 <lwip_netconn_do_write+0xe2>
        msg->conn->state = NETCONN_WRITE;
 8017f7a:	68bb      	ldr	r3, [r7, #8]
 8017f7c:	681b      	ldr	r3, [r3, #0]
 8017f7e:	2201      	movs	r2, #1
 8017f80:	705a      	strb	r2, [r3, #1]
        /* set all the variables used by lwip_netconn_do_writemore */
        LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8017f82:	68bb      	ldr	r3, [r7, #8]
 8017f84:	681b      	ldr	r3, [r3, #0]
 8017f86:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f88:	2b00      	cmp	r3, #0
 8017f8a:	d006      	beq.n	8017f9a <lwip_netconn_do_write+0x6a>
 8017f8c:	4b27      	ldr	r3, [pc, #156]	@ (801802c <lwip_netconn_do_write+0xfc>)
 8017f8e:	f240 7223 	movw	r2, #1827	@ 0x723
 8017f92:	4927      	ldr	r1, [pc, #156]	@ (8018030 <lwip_netconn_do_write+0x100>)
 8017f94:	4827      	ldr	r0, [pc, #156]	@ (8018034 <lwip_netconn_do_write+0x104>)
 8017f96:	f012 fbe1 	bl	802a75c <iprintf>
        LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
 8017f9a:	68bb      	ldr	r3, [r7, #8]
 8017f9c:	695b      	ldr	r3, [r3, #20]
 8017f9e:	2b00      	cmp	r3, #0
 8017fa0:	d106      	bne.n	8017fb0 <lwip_netconn_do_write+0x80>
 8017fa2:	4b22      	ldr	r3, [pc, #136]	@ (801802c <lwip_netconn_do_write+0xfc>)
 8017fa4:	f240 7224 	movw	r2, #1828	@ 0x724
 8017fa8:	4923      	ldr	r1, [pc, #140]	@ (8018038 <lwip_netconn_do_write+0x108>)
 8017faa:	4822      	ldr	r0, [pc, #136]	@ (8018034 <lwip_netconn_do_write+0x104>)
 8017fac:	f012 fbd6 	bl	802a75c <iprintf>
        msg->conn->current_msg = msg;
 8017fb0:	68bb      	ldr	r3, [r7, #8]
 8017fb2:	681b      	ldr	r3, [r3, #0]
 8017fb4:	68ba      	ldr	r2, [r7, #8]
 8017fb6:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
        if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
 8017fb8:	68bb      	ldr	r3, [r7, #8]
 8017fba:	681b      	ldr	r3, [r3, #0]
 8017fbc:	2100      	movs	r1, #0
 8017fbe:	4618      	mov	r0, r3
 8017fc0:	f7ff fde6 	bl	8017b90 <lwip_netconn_do_writemore>
 8017fc4:	4603      	mov	r3, r0
 8017fc6:	2b00      	cmp	r3, #0
 8017fc8:	d02c      	beq.n	8018024 <lwip_netconn_do_write+0xf4>
          LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
 8017fca:	68bb      	ldr	r3, [r7, #8]
 8017fcc:	681b      	ldr	r3, [r3, #0]
 8017fce:	785b      	ldrb	r3, [r3, #1]
 8017fd0:	2b01      	cmp	r3, #1
 8017fd2:	d006      	beq.n	8017fe2 <lwip_netconn_do_write+0xb2>
 8017fd4:	4b15      	ldr	r3, [pc, #84]	@ (801802c <lwip_netconn_do_write+0xfc>)
 8017fd6:	f44f 62e5 	mov.w	r2, #1832	@ 0x728
 8017fda:	4918      	ldr	r1, [pc, #96]	@ (801803c <lwip_netconn_do_write+0x10c>)
 8017fdc:	4815      	ldr	r0, [pc, #84]	@ (8018034 <lwip_netconn_do_write+0x104>)
 8017fde:	f012 fbbd 	bl	802a75c <iprintf>
          UNLOCK_TCPIP_CORE();
 8017fe2:	f7f8 ff7f 	bl	8010ee4 <sys_unlock_tcpip_core>
          sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017fe6:	68bb      	ldr	r3, [r7, #8]
 8017fe8:	681b      	ldr	r3, [r3, #0]
 8017fea:	330c      	adds	r3, #12
 8017fec:	2100      	movs	r1, #0
 8017fee:	4618      	mov	r0, r3
 8017ff0:	f00f f857 	bl	80270a2 <sys_arch_sem_wait>
          LOCK_TCPIP_CORE();
 8017ff4:	f7f8 ff66 	bl	8010ec4 <sys_lock_tcpip_core>
          LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
 8017ff8:	68bb      	ldr	r3, [r7, #8]
 8017ffa:	681b      	ldr	r3, [r3, #0]
 8017ffc:	785b      	ldrb	r3, [r3, #1]
 8017ffe:	2b01      	cmp	r3, #1
 8018000:	d110      	bne.n	8018024 <lwip_netconn_do_write+0xf4>
 8018002:	4b0a      	ldr	r3, [pc, #40]	@ (801802c <lwip_netconn_do_write+0xfc>)
 8018004:	f240 722c 	movw	r2, #1836	@ 0x72c
 8018008:	490c      	ldr	r1, [pc, #48]	@ (801803c <lwip_netconn_do_write+0x10c>)
 801800a:	480a      	ldr	r0, [pc, #40]	@ (8018034 <lwip_netconn_do_write+0x104>)
 801800c:	f012 fba6 	bl	802a75c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
        lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
        /* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
           since lwip_netconn_do_writemore ACKs it! */
        return;
 8018010:	e008      	b.n	8018024 <lwip_netconn_do_write+0xf4>
      } else {
        err = ERR_CONN;
 8018012:	23f5      	movs	r3, #245	@ 0xf5
 8018014:	73fb      	strb	r3, [r7, #15]
 8018016:	e001      	b.n	801801c <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
      err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
    } else {
      err = ERR_VAL;
 8018018:	23fa      	movs	r3, #250	@ 0xfa
 801801a:	73fb      	strb	r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
    }
  }
  msg->err = err;
 801801c:	68bb      	ldr	r3, [r7, #8]
 801801e:	7bfa      	ldrb	r2, [r7, #15]
 8018020:	711a      	strb	r2, [r3, #4]
 8018022:	e000      	b.n	8018026 <lwip_netconn_do_write+0xf6>
        return;
 8018024:	bf00      	nop
  TCPIP_APIMSG_ACK(msg);
}
 8018026:	3710      	adds	r7, #16
 8018028:	46bd      	mov	sp, r7
 801802a:	bd80      	pop	{r7, pc}
 801802c:	0802ddc0 	.word	0x0802ddc0
 8018030:	0802e164 	.word	0x0802e164
 8018034:	0802de04 	.word	0x0802de04
 8018038:	0802e2ec 	.word	0x0802e2ec
 801803c:	0802e180 	.word	0x0802e180

08018040 <lwip_netconn_do_getaddr>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_getaddr(void *m)
{
 8018040:	b580      	push	{r7, lr}
 8018042:	b084      	sub	sp, #16
 8018044:	af00      	add	r7, sp, #0
 8018046:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8018048:	687b      	ldr	r3, [r7, #4]
 801804a:	60fb      	str	r3, [r7, #12]

  if (msg->conn->pcb.ip != NULL) {
 801804c:	68fb      	ldr	r3, [r7, #12]
 801804e:	681b      	ldr	r3, [r3, #0]
 8018050:	685b      	ldr	r3, [r3, #4]
 8018052:	2b00      	cmp	r3, #0
 8018054:	d06b      	beq.n	801812e <lwip_netconn_do_getaddr+0xee>
    if (msg->msg.ad.local) {
 8018056:	68fb      	ldr	r3, [r7, #12]
 8018058:	7c1b      	ldrb	r3, [r3, #16]
 801805a:	2b00      	cmp	r3, #0
 801805c:	d007      	beq.n	801806e <lwip_netconn_do_getaddr+0x2e>
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 801805e:	68fb      	ldr	r3, [r7, #12]
 8018060:	681b      	ldr	r3, [r3, #0]
 8018062:	685a      	ldr	r2, [r3, #4]
 8018064:	68fb      	ldr	r3, [r7, #12]
 8018066:	689b      	ldr	r3, [r3, #8]
 8018068:	6812      	ldr	r2, [r2, #0]
 801806a:	601a      	str	r2, [r3, #0]
 801806c:	e006      	b.n	801807c <lwip_netconn_do_getaddr+0x3c>
                   msg->conn->pcb.ip->local_ip);
    } else {
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 801806e:	68fb      	ldr	r3, [r7, #12]
 8018070:	681b      	ldr	r3, [r3, #0]
 8018072:	685a      	ldr	r2, [r3, #4]
 8018074:	68fb      	ldr	r3, [r7, #12]
 8018076:	689b      	ldr	r3, [r3, #8]
 8018078:	6852      	ldr	r2, [r2, #4]
 801807a:	601a      	str	r2, [r3, #0]
                   msg->conn->pcb.ip->remote_ip);
    }

    msg->err = ERR_OK;
 801807c:	68fb      	ldr	r3, [r7, #12]
 801807e:	2200      	movs	r2, #0
 8018080:	711a      	strb	r2, [r3, #4]
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8018082:	68fb      	ldr	r3, [r7, #12]
 8018084:	681b      	ldr	r3, [r3, #0]
 8018086:	781b      	ldrb	r3, [r3, #0]
 8018088:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801808c:	2b10      	cmp	r3, #16
 801808e:	d021      	beq.n	80180d4 <lwip_netconn_do_getaddr+0x94>
 8018090:	2b20      	cmp	r3, #32
 8018092:	d144      	bne.n	801811e <lwip_netconn_do_getaddr+0xde>
        }
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        if (msg->msg.ad.local) {
 8018094:	68fb      	ldr	r3, [r7, #12]
 8018096:	7c1b      	ldrb	r3, [r3, #16]
 8018098:	2b00      	cmp	r3, #0
 801809a:	d007      	beq.n	80180ac <lwip_netconn_do_getaddr+0x6c>
          API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
 801809c:	68fb      	ldr	r3, [r7, #12]
 801809e:	681b      	ldr	r3, [r3, #0]
 80180a0:	685a      	ldr	r2, [r3, #4]
 80180a2:	68fb      	ldr	r3, [r7, #12]
 80180a4:	68db      	ldr	r3, [r3, #12]
 80180a6:	8a52      	ldrh	r2, [r2, #18]
 80180a8:	801a      	strh	r2, [r3, #0]
            msg->err = ERR_CONN;
          } else {
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
          }
        }
        break;
 80180aa:	e044      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
          if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
 80180ac:	68fb      	ldr	r3, [r7, #12]
 80180ae:	681b      	ldr	r3, [r3, #0]
 80180b0:	685b      	ldr	r3, [r3, #4]
 80180b2:	7c1b      	ldrb	r3, [r3, #16]
 80180b4:	f003 0304 	and.w	r3, r3, #4
 80180b8:	2b00      	cmp	r3, #0
 80180ba:	d103      	bne.n	80180c4 <lwip_netconn_do_getaddr+0x84>
            msg->err = ERR_CONN;
 80180bc:	68fb      	ldr	r3, [r7, #12]
 80180be:	22f5      	movs	r2, #245	@ 0xf5
 80180c0:	711a      	strb	r2, [r3, #4]
        break;
 80180c2:	e038      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
 80180c4:	68fb      	ldr	r3, [r7, #12]
 80180c6:	681b      	ldr	r3, [r3, #0]
 80180c8:	685a      	ldr	r2, [r3, #4]
 80180ca:	68fb      	ldr	r3, [r7, #12]
 80180cc:	68db      	ldr	r3, [r3, #12]
 80180ce:	8a92      	ldrh	r2, [r2, #20]
 80180d0:	801a      	strh	r2, [r3, #0]
        break;
 80180d2:	e030      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        if ((msg->msg.ad.local == 0) &&
 80180d4:	68fb      	ldr	r3, [r7, #12]
 80180d6:	7c1b      	ldrb	r3, [r3, #16]
 80180d8:	2b00      	cmp	r3, #0
 80180da:	d10f      	bne.n	80180fc <lwip_netconn_do_getaddr+0xbc>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 80180dc:	68fb      	ldr	r3, [r7, #12]
 80180de:	681b      	ldr	r3, [r3, #0]
 80180e0:	685b      	ldr	r3, [r3, #4]
 80180e2:	7d1b      	ldrb	r3, [r3, #20]
        if ((msg->msg.ad.local == 0) &&
 80180e4:	2b00      	cmp	r3, #0
 80180e6:	d005      	beq.n	80180f4 <lwip_netconn_do_getaddr+0xb4>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 80180e8:	68fb      	ldr	r3, [r7, #12]
 80180ea:	681b      	ldr	r3, [r3, #0]
 80180ec:	685b      	ldr	r3, [r3, #4]
 80180ee:	7d1b      	ldrb	r3, [r3, #20]
 80180f0:	2b01      	cmp	r3, #1
 80180f2:	d103      	bne.n	80180fc <lwip_netconn_do_getaddr+0xbc>
          /* pcb is not connected and remote name is requested */
          msg->err = ERR_CONN;
 80180f4:	68fb      	ldr	r3, [r7, #12]
 80180f6:	22f5      	movs	r2, #245	@ 0xf5
 80180f8:	711a      	strb	r2, [r3, #4]
        } else {
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
        }
        break;
 80180fa:	e01c      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
 80180fc:	68fb      	ldr	r3, [r7, #12]
 80180fe:	7c1b      	ldrb	r3, [r3, #16]
 8018100:	2b00      	cmp	r3, #0
 8018102:	d004      	beq.n	801810e <lwip_netconn_do_getaddr+0xce>
 8018104:	68fb      	ldr	r3, [r7, #12]
 8018106:	681b      	ldr	r3, [r3, #0]
 8018108:	685b      	ldr	r3, [r3, #4]
 801810a:	8adb      	ldrh	r3, [r3, #22]
 801810c:	e003      	b.n	8018116 <lwip_netconn_do_getaddr+0xd6>
 801810e:	68fb      	ldr	r3, [r7, #12]
 8018110:	681b      	ldr	r3, [r3, #0]
 8018112:	685b      	ldr	r3, [r3, #4]
 8018114:	8b1b      	ldrh	r3, [r3, #24]
 8018116:	68fa      	ldr	r2, [r7, #12]
 8018118:	68d2      	ldr	r2, [r2, #12]
 801811a:	8013      	strh	r3, [r2, #0]
        break;
 801811c:	e00b      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
      default:
        LWIP_ASSERT("invalid netconn_type", 0);
 801811e:	4b08      	ldr	r3, [pc, #32]	@ (8018140 <lwip_netconn_do_getaddr+0x100>)
 8018120:	f240 727d 	movw	r2, #1917	@ 0x77d
 8018124:	4907      	ldr	r1, [pc, #28]	@ (8018144 <lwip_netconn_do_getaddr+0x104>)
 8018126:	4808      	ldr	r0, [pc, #32]	@ (8018148 <lwip_netconn_do_getaddr+0x108>)
 8018128:	f012 fb18 	bl	802a75c <iprintf>
        break;
 801812c:	e003      	b.n	8018136 <lwip_netconn_do_getaddr+0xf6>
    }
  } else {
    msg->err = ERR_CONN;
 801812e:	68fb      	ldr	r3, [r7, #12]
 8018130:	22f5      	movs	r2, #245	@ 0xf5
 8018132:	711a      	strb	r2, [r3, #4]
  }
  TCPIP_APIMSG_ACK(msg);
}
 8018134:	bf00      	nop
 8018136:	bf00      	nop
 8018138:	3710      	adds	r7, #16
 801813a:	46bd      	mov	sp, r7
 801813c:	bd80      	pop	{r7, pc}
 801813e:	bf00      	nop
 8018140:	0802ddc0 	.word	0x0802ddc0
 8018144:	0802e300 	.word	0x0802e300
 8018148:	0802de04 	.word	0x0802de04

0801814c <lwip_netconn_do_close>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_close(void *m)
{
 801814c:	b580      	push	{r7, lr}
 801814e:	b084      	sub	sp, #16
 8018150:	af00      	add	r7, sp, #0
 8018152:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8018154:	687b      	ldr	r3, [r7, #4]
 8018156:	60fb      	str	r3, [r7, #12]

#if LWIP_TCP
  enum netconn_state state = msg->conn->state;
 8018158:	68fb      	ldr	r3, [r7, #12]
 801815a:	681b      	ldr	r3, [r3, #0]
 801815c:	785b      	ldrb	r3, [r3, #1]
 801815e:	72fb      	strb	r3, [r7, #11]
  /* First check if this is a TCP netconn and if it is in a correct state
      (LISTEN doesn't support half shutdown) */
  if ((msg->conn->pcb.tcp != NULL) &&
 8018160:	68fb      	ldr	r3, [r7, #12]
 8018162:	681b      	ldr	r3, [r3, #0]
 8018164:	685b      	ldr	r3, [r3, #4]
 8018166:	2b00      	cmp	r3, #0
 8018168:	d067      	beq.n	801823a <lwip_netconn_do_close+0xee>
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 801816a:	68fb      	ldr	r3, [r7, #12]
 801816c:	681b      	ldr	r3, [r3, #0]
 801816e:	781b      	ldrb	r3, [r3, #0]
 8018170:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if ((msg->conn->pcb.tcp != NULL) &&
 8018174:	2b10      	cmp	r3, #16
 8018176:	d160      	bne.n	801823a <lwip_netconn_do_close+0xee>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8018178:	68fb      	ldr	r3, [r7, #12]
 801817a:	7a1b      	ldrb	r3, [r3, #8]
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 801817c:	2b03      	cmp	r3, #3
 801817e:	d002      	beq.n	8018186 <lwip_netconn_do_close+0x3a>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8018180:	7afb      	ldrb	r3, [r7, #11]
 8018182:	2b02      	cmp	r3, #2
 8018184:	d059      	beq.n	801823a <lwip_netconn_do_close+0xee>
    /* Check if we are in a connected state */
    if (state == NETCONN_CONNECT) {
 8018186:	7afb      	ldrb	r3, [r7, #11]
 8018188:	2b03      	cmp	r3, #3
 801818a:	d103      	bne.n	8018194 <lwip_netconn_do_close+0x48>
      /* TCP connect in progress: cannot shutdown */
      msg->err = ERR_CONN;
 801818c:	68fb      	ldr	r3, [r7, #12]
 801818e:	22f5      	movs	r2, #245	@ 0xf5
 8018190:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8018192:	e057      	b.n	8018244 <lwip_netconn_do_close+0xf8>
    } else if (state == NETCONN_WRITE) {
 8018194:	7afb      	ldrb	r3, [r7, #11]
 8018196:	2b01      	cmp	r3, #1
 8018198:	d103      	bne.n	80181a2 <lwip_netconn_do_close+0x56>
        msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
      }
    }
    if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
      msg->err = ERR_INPROGRESS;
 801819a:	68fb      	ldr	r3, [r7, #12]
 801819c:	22fb      	movs	r2, #251	@ 0xfb
 801819e:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 80181a0:	e050      	b.n	8018244 <lwip_netconn_do_close+0xf8>
    } else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
      if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
 80181a2:	68fb      	ldr	r3, [r7, #12]
 80181a4:	7a1b      	ldrb	r3, [r3, #8]
 80181a6:	f003 0301 	and.w	r3, r3, #1
 80181aa:	2b00      	cmp	r3, #0
 80181ac:	d004      	beq.n	80181b8 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
        /* Mark mboxes invalid */
        netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
        netconn_drain(msg->conn);
 80181ae:	68fb      	ldr	r3, [r7, #12]
 80181b0:	681b      	ldr	r3, [r3, #0]
 80181b2:	4618      	mov	r0, r3
 80181b4:	f7ff f82e 	bl	8017214 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
      }
      LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 80181b8:	68fb      	ldr	r3, [r7, #12]
 80181ba:	681b      	ldr	r3, [r3, #0]
 80181bc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80181be:	2b00      	cmp	r3, #0
 80181c0:	d006      	beq.n	80181d0 <lwip_netconn_do_close+0x84>
 80181c2:	4b22      	ldr	r3, [pc, #136]	@ (801824c <lwip_netconn_do_close+0x100>)
 80181c4:	f240 72bd 	movw	r2, #1981	@ 0x7bd
 80181c8:	4921      	ldr	r1, [pc, #132]	@ (8018250 <lwip_netconn_do_close+0x104>)
 80181ca:	4822      	ldr	r0, [pc, #136]	@ (8018254 <lwip_netconn_do_close+0x108>)
 80181cc:	f012 fac6 	bl	802a75c <iprintf>
      msg->conn->state = NETCONN_CLOSE;
 80181d0:	68fb      	ldr	r3, [r7, #12]
 80181d2:	681b      	ldr	r3, [r3, #0]
 80181d4:	2204      	movs	r2, #4
 80181d6:	705a      	strb	r2, [r3, #1]
      msg->conn->current_msg = msg;
 80181d8:	68fb      	ldr	r3, [r7, #12]
 80181da:	681b      	ldr	r3, [r3, #0]
 80181dc:	68fa      	ldr	r2, [r7, #12]
 80181de:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
      if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 80181e0:	68fb      	ldr	r3, [r7, #12]
 80181e2:	681b      	ldr	r3, [r3, #0]
 80181e4:	2100      	movs	r1, #0
 80181e6:	4618      	mov	r0, r3
 80181e8:	f7ff f892 	bl	8017310 <lwip_netconn_do_close_internal>
 80181ec:	4603      	mov	r3, r0
 80181ee:	2b00      	cmp	r3, #0
 80181f0:	d027      	beq.n	8018242 <lwip_netconn_do_close+0xf6>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 80181f2:	68fb      	ldr	r3, [r7, #12]
 80181f4:	681b      	ldr	r3, [r3, #0]
 80181f6:	785b      	ldrb	r3, [r3, #1]
 80181f8:	2b04      	cmp	r3, #4
 80181fa:	d006      	beq.n	801820a <lwip_netconn_do_close+0xbe>
 80181fc:	4b13      	ldr	r3, [pc, #76]	@ (801824c <lwip_netconn_do_close+0x100>)
 80181fe:	f240 72c2 	movw	r2, #1986	@ 0x7c2
 8018202:	4915      	ldr	r1, [pc, #84]	@ (8018258 <lwip_netconn_do_close+0x10c>)
 8018204:	4813      	ldr	r0, [pc, #76]	@ (8018254 <lwip_netconn_do_close+0x108>)
 8018206:	f012 faa9 	bl	802a75c <iprintf>
        UNLOCK_TCPIP_CORE();
 801820a:	f7f8 fe6b 	bl	8010ee4 <sys_unlock_tcpip_core>
        sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801820e:	68fb      	ldr	r3, [r7, #12]
 8018210:	681b      	ldr	r3, [r3, #0]
 8018212:	330c      	adds	r3, #12
 8018214:	2100      	movs	r1, #0
 8018216:	4618      	mov	r0, r3
 8018218:	f00e ff43 	bl	80270a2 <sys_arch_sem_wait>
        LOCK_TCPIP_CORE();
 801821c:	f7f8 fe52 	bl	8010ec4 <sys_lock_tcpip_core>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8018220:	68fb      	ldr	r3, [r7, #12]
 8018222:	681b      	ldr	r3, [r3, #0]
 8018224:	785b      	ldrb	r3, [r3, #1]
 8018226:	2b00      	cmp	r3, #0
 8018228:	d00b      	beq.n	8018242 <lwip_netconn_do_close+0xf6>
 801822a:	4b08      	ldr	r3, [pc, #32]	@ (801824c <lwip_netconn_do_close+0x100>)
 801822c:	f240 72c6 	movw	r2, #1990	@ 0x7c6
 8018230:	4909      	ldr	r1, [pc, #36]	@ (8018258 <lwip_netconn_do_close+0x10c>)
 8018232:	4808      	ldr	r0, [pc, #32]	@ (8018254 <lwip_netconn_do_close+0x108>)
 8018234:	f012 fa92 	bl	802a75c <iprintf>
      }
#else /* LWIP_TCPIP_CORE_LOCKING */
      lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
      /* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
      return;
 8018238:	e003      	b.n	8018242 <lwip_netconn_do_close+0xf6>
    }
  } else
#endif /* LWIP_TCP */
  {
    msg->err = ERR_CONN;
 801823a:	68fb      	ldr	r3, [r7, #12]
 801823c:	22f5      	movs	r2, #245	@ 0xf5
 801823e:	711a      	strb	r2, [r3, #4]
 8018240:	e000      	b.n	8018244 <lwip_netconn_do_close+0xf8>
      return;
 8018242:	bf00      	nop
  }
  TCPIP_APIMSG_ACK(msg);
}
 8018244:	3710      	adds	r7, #16
 8018246:	46bd      	mov	sp, r7
 8018248:	bd80      	pop	{r7, pc}
 801824a:	bf00      	nop
 801824c:	0802ddc0 	.word	0x0802ddc0
 8018250:	0802e164 	.word	0x0802e164
 8018254:	0802de04 	.word	0x0802de04
 8018258:	0802e180 	.word	0x0802e180

0801825c <err_to_errno>:
  EIO            /* ERR_ARG        -16     Illegal argument.        */
};

int
err_to_errno(err_t err)
{
 801825c:	b480      	push	{r7}
 801825e:	b083      	sub	sp, #12
 8018260:	af00      	add	r7, sp, #0
 8018262:	4603      	mov	r3, r0
 8018264:	71fb      	strb	r3, [r7, #7]
  if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
 8018266:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801826a:	2b00      	cmp	r3, #0
 801826c:	dc04      	bgt.n	8018278 <err_to_errno+0x1c>
 801826e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8018272:	f113 0f10 	cmn.w	r3, #16
 8018276:	da01      	bge.n	801827c <err_to_errno+0x20>
    return EIO;
 8018278:	2305      	movs	r3, #5
 801827a:	e005      	b.n	8018288 <err_to_errno+0x2c>
  }
  return err_to_errno_table[-err];
 801827c:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8018280:	425b      	negs	r3, r3
 8018282:	4a04      	ldr	r2, [pc, #16]	@ (8018294 <err_to_errno+0x38>)
 8018284:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
}
 8018288:	4618      	mov	r0, r3
 801828a:	370c      	adds	r7, #12
 801828c:	46bd      	mov	sp, r7
 801828e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018292:	4770      	bx	lr
 8018294:	080319c0 	.word	0x080319c0

08018298 <netbuf_delete>:
 *
 * @param buf pointer to a netbuf allocated by netbuf_new()
 */
void
netbuf_delete(struct netbuf *buf)
{
 8018298:	b580      	push	{r7, lr}
 801829a:	b082      	sub	sp, #8
 801829c:	af00      	add	r7, sp, #0
 801829e:	6078      	str	r0, [r7, #4]
  if (buf != NULL) {
 80182a0:	687b      	ldr	r3, [r7, #4]
 80182a2:	2b00      	cmp	r3, #0
 80182a4:	d013      	beq.n	80182ce <netbuf_delete+0x36>
    if (buf->p != NULL) {
 80182a6:	687b      	ldr	r3, [r7, #4]
 80182a8:	681b      	ldr	r3, [r3, #0]
 80182aa:	2b00      	cmp	r3, #0
 80182ac:	d00b      	beq.n	80182c6 <netbuf_delete+0x2e>
      pbuf_free(buf->p);
 80182ae:	687b      	ldr	r3, [r7, #4]
 80182b0:	681b      	ldr	r3, [r3, #0]
 80182b2:	4618      	mov	r0, r3
 80182b4:	f002 ffda 	bl	801b26c <pbuf_free>
      buf->p = buf->ptr = NULL;
 80182b8:	687b      	ldr	r3, [r7, #4]
 80182ba:	2200      	movs	r2, #0
 80182bc:	605a      	str	r2, [r3, #4]
 80182be:	687b      	ldr	r3, [r7, #4]
 80182c0:	685a      	ldr	r2, [r3, #4]
 80182c2:	687b      	ldr	r3, [r7, #4]
 80182c4:	601a      	str	r2, [r3, #0]
    }
    memp_free(MEMP_NETBUF, buf);
 80182c6:	6879      	ldr	r1, [r7, #4]
 80182c8:	2006      	movs	r0, #6
 80182ca:	f002 f8e1 	bl	801a490 <memp_free>
  }
}
 80182ce:	bf00      	nop
 80182d0:	3708      	adds	r7, #8
 80182d2:	46bd      	mov	sp, r7
 80182d4:	bd80      	pop	{r7, pc}
	...

080182d8 <netbuf_free>:
 *
 * @param buf pointer to the netbuf which contains the packet buffer to free
 */
void
netbuf_free(struct netbuf *buf)
{
 80182d8:	b580      	push	{r7, lr}
 80182da:	b082      	sub	sp, #8
 80182dc:	af00      	add	r7, sp, #0
 80182de:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
 80182e0:	687b      	ldr	r3, [r7, #4]
 80182e2:	2b00      	cmp	r3, #0
 80182e4:	d106      	bne.n	80182f4 <netbuf_free+0x1c>
 80182e6:	4b0d      	ldr	r3, [pc, #52]	@ (801831c <netbuf_free+0x44>)
 80182e8:	2281      	movs	r2, #129	@ 0x81
 80182ea:	490d      	ldr	r1, [pc, #52]	@ (8018320 <netbuf_free+0x48>)
 80182ec:	480d      	ldr	r0, [pc, #52]	@ (8018324 <netbuf_free+0x4c>)
 80182ee:	f012 fa35 	bl	802a75c <iprintf>
 80182f2:	e00f      	b.n	8018314 <netbuf_free+0x3c>
  if (buf->p != NULL) {
 80182f4:	687b      	ldr	r3, [r7, #4]
 80182f6:	681b      	ldr	r3, [r3, #0]
 80182f8:	2b00      	cmp	r3, #0
 80182fa:	d004      	beq.n	8018306 <netbuf_free+0x2e>
    pbuf_free(buf->p);
 80182fc:	687b      	ldr	r3, [r7, #4]
 80182fe:	681b      	ldr	r3, [r3, #0]
 8018300:	4618      	mov	r0, r3
 8018302:	f002 ffb3 	bl	801b26c <pbuf_free>
  }
  buf->p = buf->ptr = NULL;
 8018306:	687b      	ldr	r3, [r7, #4]
 8018308:	2200      	movs	r2, #0
 801830a:	605a      	str	r2, [r3, #4]
 801830c:	687b      	ldr	r3, [r7, #4]
 801830e:	685a      	ldr	r2, [r3, #4]
 8018310:	687b      	ldr	r3, [r7, #4]
 8018312:	601a      	str	r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
  buf->flags = 0;
  buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
 8018314:	3708      	adds	r7, #8
 8018316:	46bd      	mov	sp, r7
 8018318:	bd80      	pop	{r7, pc}
 801831a:	bf00      	nop
 801831c:	0802e318 	.word	0x0802e318
 8018320:	0802e3b4 	.word	0x0802e3b4
 8018324:	0802e368 	.word	0x0802e368

08018328 <netbuf_ref>:
 * @return ERR_OK if data is referenced
 *         ERR_MEM if data couldn't be referenced due to lack of memory
 */
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
 8018328:	b580      	push	{r7, lr}
 801832a:	b084      	sub	sp, #16
 801832c:	af00      	add	r7, sp, #0
 801832e:	60f8      	str	r0, [r7, #12]
 8018330:	60b9      	str	r1, [r7, #8]
 8018332:	4613      	mov	r3, r2
 8018334:	80fb      	strh	r3, [r7, #6]
  LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
 8018336:	68fb      	ldr	r3, [r7, #12]
 8018338:	2b00      	cmp	r3, #0
 801833a:	d108      	bne.n	801834e <netbuf_ref+0x26>
 801833c:	4b1c      	ldr	r3, [pc, #112]	@ (80183b0 <netbuf_ref+0x88>)
 801833e:	2299      	movs	r2, #153	@ 0x99
 8018340:	491c      	ldr	r1, [pc, #112]	@ (80183b4 <netbuf_ref+0x8c>)
 8018342:	481d      	ldr	r0, [pc, #116]	@ (80183b8 <netbuf_ref+0x90>)
 8018344:	f012 fa0a 	bl	802a75c <iprintf>
 8018348:	f06f 030f 	mvn.w	r3, #15
 801834c:	e02b      	b.n	80183a6 <netbuf_ref+0x7e>
  if (buf->p != NULL) {
 801834e:	68fb      	ldr	r3, [r7, #12]
 8018350:	681b      	ldr	r3, [r3, #0]
 8018352:	2b00      	cmp	r3, #0
 8018354:	d004      	beq.n	8018360 <netbuf_ref+0x38>
    pbuf_free(buf->p);
 8018356:	68fb      	ldr	r3, [r7, #12]
 8018358:	681b      	ldr	r3, [r3, #0]
 801835a:	4618      	mov	r0, r3
 801835c:	f002 ff86 	bl	801b26c <pbuf_free>
  }
  buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
 8018360:	2241      	movs	r2, #65	@ 0x41
 8018362:	2100      	movs	r1, #0
 8018364:	2036      	movs	r0, #54	@ 0x36
 8018366:	f002 fc6b 	bl	801ac40 <pbuf_alloc>
 801836a:	4602      	mov	r2, r0
 801836c:	68fb      	ldr	r3, [r7, #12]
 801836e:	601a      	str	r2, [r3, #0]
  if (buf->p == NULL) {
 8018370:	68fb      	ldr	r3, [r7, #12]
 8018372:	681b      	ldr	r3, [r3, #0]
 8018374:	2b00      	cmp	r3, #0
 8018376:	d105      	bne.n	8018384 <netbuf_ref+0x5c>
    buf->ptr = NULL;
 8018378:	68fb      	ldr	r3, [r7, #12]
 801837a:	2200      	movs	r2, #0
 801837c:	605a      	str	r2, [r3, #4]
    return ERR_MEM;
 801837e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018382:	e010      	b.n	80183a6 <netbuf_ref+0x7e>
  }
  ((struct pbuf_rom *)buf->p)->payload = dataptr;
 8018384:	68fb      	ldr	r3, [r7, #12]
 8018386:	681b      	ldr	r3, [r3, #0]
 8018388:	68ba      	ldr	r2, [r7, #8]
 801838a:	605a      	str	r2, [r3, #4]
  buf->p->len = buf->p->tot_len = size;
 801838c:	68fb      	ldr	r3, [r7, #12]
 801838e:	681b      	ldr	r3, [r3, #0]
 8018390:	88fa      	ldrh	r2, [r7, #6]
 8018392:	811a      	strh	r2, [r3, #8]
 8018394:	68fa      	ldr	r2, [r7, #12]
 8018396:	6812      	ldr	r2, [r2, #0]
 8018398:	891b      	ldrh	r3, [r3, #8]
 801839a:	8153      	strh	r3, [r2, #10]
  buf->ptr = buf->p;
 801839c:	68fb      	ldr	r3, [r7, #12]
 801839e:	681a      	ldr	r2, [r3, #0]
 80183a0:	68fb      	ldr	r3, [r7, #12]
 80183a2:	605a      	str	r2, [r3, #4]
  return ERR_OK;
 80183a4:	2300      	movs	r3, #0
}
 80183a6:	4618      	mov	r0, r3
 80183a8:	3710      	adds	r7, #16
 80183aa:	46bd      	mov	sp, r7
 80183ac:	bd80      	pop	{r7, pc}
 80183ae:	bf00      	nop
 80183b0:	0802e318 	.word	0x0802e318
 80183b4:	0802e3d0 	.word	0x0802e3d0
 80183b8:	0802e368 	.word	0x0802e368

080183bc <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
 80183bc:	b480      	push	{r7}
 80183be:	b085      	sub	sp, #20
 80183c0:	af00      	add	r7, sp, #0
 80183c2:	6078      	str	r0, [r7, #4]
  int s = fd - LWIP_SOCKET_OFFSET;
 80183c4:	687b      	ldr	r3, [r7, #4]
 80183c6:	60fb      	str	r3, [r7, #12]
  if ((s < 0) || (s >= NUM_SOCKETS)) {
 80183c8:	68fb      	ldr	r3, [r7, #12]
 80183ca:	2b00      	cmp	r3, #0
 80183cc:	db02      	blt.n	80183d4 <tryget_socket_unconn_nouse+0x18>
 80183ce:	68fb      	ldr	r3, [r7, #12]
 80183d0:	2b03      	cmp	r3, #3
 80183d2:	dd01      	ble.n	80183d8 <tryget_socket_unconn_nouse+0x1c>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
    return NULL;
 80183d4:	2300      	movs	r3, #0
 80183d6:	e003      	b.n	80183e0 <tryget_socket_unconn_nouse+0x24>
  }
  return &sockets[s];
 80183d8:	68fb      	ldr	r3, [r7, #12]
 80183da:	011b      	lsls	r3, r3, #4
 80183dc:	4a03      	ldr	r2, [pc, #12]	@ (80183ec <tryget_socket_unconn_nouse+0x30>)
 80183de:	4413      	add	r3, r2
}
 80183e0:	4618      	mov	r0, r3
 80183e2:	3714      	adds	r7, #20
 80183e4:	46bd      	mov	sp, r7
 80183e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80183ea:	4770      	bx	lr
 80183ec:	240243c4 	.word	0x240243c4

080183f0 <tryget_socket_unconn>:
}

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
 80183f0:	b580      	push	{r7, lr}
 80183f2:	b084      	sub	sp, #16
 80183f4:	af00      	add	r7, sp, #0
 80183f6:	6078      	str	r0, [r7, #4]
  struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
 80183f8:	6878      	ldr	r0, [r7, #4]
 80183fa:	f7ff ffdf 	bl	80183bc <tryget_socket_unconn_nouse>
 80183fe:	60f8      	str	r0, [r7, #12]
  if (ret != NULL) {
    if (!sock_inc_used(ret)) {
      return NULL;
    }
  }
  return ret;
 8018400:	68fb      	ldr	r3, [r7, #12]
}
 8018402:	4618      	mov	r0, r3
 8018404:	3710      	adds	r7, #16
 8018406:	46bd      	mov	sp, r7
 8018408:	bd80      	pop	{r7, pc}

0801840a <tryget_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
tryget_socket(int fd)
{
 801840a:	b580      	push	{r7, lr}
 801840c:	b084      	sub	sp, #16
 801840e:	af00      	add	r7, sp, #0
 8018410:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket_unconn(fd);
 8018412:	6878      	ldr	r0, [r7, #4]
 8018414:	f7ff ffec 	bl	80183f0 <tryget_socket_unconn>
 8018418:	60f8      	str	r0, [r7, #12]
  if (sock != NULL) {
 801841a:	68fb      	ldr	r3, [r7, #12]
 801841c:	2b00      	cmp	r3, #0
 801841e:	d005      	beq.n	801842c <tryget_socket+0x22>
    if (sock->conn) {
 8018420:	68fb      	ldr	r3, [r7, #12]
 8018422:	681b      	ldr	r3, [r3, #0]
 8018424:	2b00      	cmp	r3, #0
 8018426:	d001      	beq.n	801842c <tryget_socket+0x22>
      return sock;
 8018428:	68fb      	ldr	r3, [r7, #12]
 801842a:	e000      	b.n	801842e <tryget_socket+0x24>
    }
    done_socket(sock);
  }
  return NULL;
 801842c:	2300      	movs	r3, #0
}
 801842e:	4618      	mov	r0, r3
 8018430:	3710      	adds	r7, #16
 8018432:	46bd      	mov	sp, r7
 8018434:	bd80      	pop	{r7, pc}
	...

08018438 <get_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
get_socket(int fd)
{
 8018438:	b580      	push	{r7, lr}
 801843a:	b084      	sub	sp, #16
 801843c:	af00      	add	r7, sp, #0
 801843e:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket(fd);
 8018440:	6878      	ldr	r0, [r7, #4]
 8018442:	f7ff ffe2 	bl	801840a <tryget_socket>
 8018446:	60f8      	str	r0, [r7, #12]
  if (!sock) {
 8018448:	68fb      	ldr	r3, [r7, #12]
 801844a:	2b00      	cmp	r3, #0
 801844c:	d104      	bne.n	8018458 <get_socket+0x20>
    if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
      LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
    }
    set_errno(EBADF);
 801844e:	4b05      	ldr	r3, [pc, #20]	@ (8018464 <get_socket+0x2c>)
 8018450:	2209      	movs	r2, #9
 8018452:	601a      	str	r2, [r3, #0]
    return NULL;
 8018454:	2300      	movs	r3, #0
 8018456:	e000      	b.n	801845a <get_socket+0x22>
  }
  return sock;
 8018458:	68fb      	ldr	r3, [r7, #12]
}
 801845a:	4618      	mov	r0, r3
 801845c:	3710      	adds	r7, #16
 801845e:	46bd      	mov	sp, r7
 8018460:	bd80      	pop	{r7, pc}
 8018462:	bf00      	nop
 8018464:	2402b260 	.word	0x2402b260

08018468 <alloc_socket>:
 *                 0 if socket has been created by socket()
 * @return the index of the new socket; -1 on error
 */
static int
alloc_socket(struct netconn *newconn, int accepted)
{
 8018468:	b580      	push	{r7, lr}
 801846a:	b084      	sub	sp, #16
 801846c:	af00      	add	r7, sp, #0
 801846e:	6078      	str	r0, [r7, #4]
 8018470:	6039      	str	r1, [r7, #0]
  int i;
  SYS_ARCH_DECL_PROTECT(lev);
  LWIP_UNUSED_ARG(accepted);

  /* allocate a new socket identifier */
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8018472:	2300      	movs	r3, #0
 8018474:	60fb      	str	r3, [r7, #12]
 8018476:	e052      	b.n	801851e <alloc_socket+0xb6>
    /* Protect socket array */
    SYS_ARCH_PROTECT(lev);
 8018478:	f00e feda 	bl	8027230 <sys_arch_protect>
 801847c:	60b8      	str	r0, [r7, #8]
    if (!sockets[i].conn) {
 801847e:	4a2c      	ldr	r2, [pc, #176]	@ (8018530 <alloc_socket+0xc8>)
 8018480:	68fb      	ldr	r3, [r7, #12]
 8018482:	011b      	lsls	r3, r3, #4
 8018484:	4413      	add	r3, r2
 8018486:	681b      	ldr	r3, [r3, #0]
 8018488:	2b00      	cmp	r3, #0
 801848a:	d142      	bne.n	8018512 <alloc_socket+0xaa>
        continue;
      }
      sockets[i].fd_used    = 1;
      sockets[i].fd_free_pending = 0;
#endif
      sockets[i].conn       = newconn;
 801848c:	4a28      	ldr	r2, [pc, #160]	@ (8018530 <alloc_socket+0xc8>)
 801848e:	68fb      	ldr	r3, [r7, #12]
 8018490:	011b      	lsls	r3, r3, #4
 8018492:	4413      	add	r3, r2
 8018494:	687a      	ldr	r2, [r7, #4]
 8018496:	601a      	str	r2, [r3, #0]
      /* The socket is not yet known to anyone, so no need to protect
         after having marked it as used. */
      SYS_ARCH_UNPROTECT(lev);
 8018498:	68b8      	ldr	r0, [r7, #8]
 801849a:	f00e fed7 	bl	802724c <sys_arch_unprotect>
      sockets[i].lastdata.pbuf = NULL;
 801849e:	4a24      	ldr	r2, [pc, #144]	@ (8018530 <alloc_socket+0xc8>)
 80184a0:	68fb      	ldr	r3, [r7, #12]
 80184a2:	011b      	lsls	r3, r3, #4
 80184a4:	4413      	add	r3, r2
 80184a6:	3304      	adds	r3, #4
 80184a8:	2200      	movs	r2, #0
 80184aa:	601a      	str	r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
      LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
 80184ac:	4a20      	ldr	r2, [pc, #128]	@ (8018530 <alloc_socket+0xc8>)
 80184ae:	68fb      	ldr	r3, [r7, #12]
 80184b0:	011b      	lsls	r3, r3, #4
 80184b2:	4413      	add	r3, r2
 80184b4:	330e      	adds	r3, #14
 80184b6:	781b      	ldrb	r3, [r3, #0]
 80184b8:	2b00      	cmp	r3, #0
 80184ba:	d006      	beq.n	80184ca <alloc_socket+0x62>
 80184bc:	4b1d      	ldr	r3, [pc, #116]	@ (8018534 <alloc_socket+0xcc>)
 80184be:	f240 220e 	movw	r2, #526	@ 0x20e
 80184c2:	491d      	ldr	r1, [pc, #116]	@ (8018538 <alloc_socket+0xd0>)
 80184c4:	481d      	ldr	r0, [pc, #116]	@ (801853c <alloc_socket+0xd4>)
 80184c6:	f012 f949 	bl	802a75c <iprintf>
      sockets[i].rcvevent   = 0;
 80184ca:	4a19      	ldr	r2, [pc, #100]	@ (8018530 <alloc_socket+0xc8>)
 80184cc:	68fb      	ldr	r3, [r7, #12]
 80184ce:	011b      	lsls	r3, r3, #4
 80184d0:	4413      	add	r3, r2
 80184d2:	3308      	adds	r3, #8
 80184d4:	2200      	movs	r2, #0
 80184d6:	801a      	strh	r2, [r3, #0]
      /* TCP sendbuf is empty, but the socket is not yet writable until connected
       * (unless it has been created by accept()). */
      sockets[i].sendevent  = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
 80184d8:	687b      	ldr	r3, [r7, #4]
 80184da:	781b      	ldrb	r3, [r3, #0]
 80184dc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80184e0:	2b10      	cmp	r3, #16
 80184e2:	d102      	bne.n	80184ea <alloc_socket+0x82>
 80184e4:	683b      	ldr	r3, [r7, #0]
 80184e6:	2b00      	cmp	r3, #0
 80184e8:	d001      	beq.n	80184ee <alloc_socket+0x86>
 80184ea:	2301      	movs	r3, #1
 80184ec:	e000      	b.n	80184f0 <alloc_socket+0x88>
 80184ee:	2300      	movs	r3, #0
 80184f0:	b299      	uxth	r1, r3
 80184f2:	4a0f      	ldr	r2, [pc, #60]	@ (8018530 <alloc_socket+0xc8>)
 80184f4:	68fb      	ldr	r3, [r7, #12]
 80184f6:	011b      	lsls	r3, r3, #4
 80184f8:	4413      	add	r3, r2
 80184fa:	330a      	adds	r3, #10
 80184fc:	460a      	mov	r2, r1
 80184fe:	801a      	strh	r2, [r3, #0]
      sockets[i].errevent   = 0;
 8018500:	4a0b      	ldr	r2, [pc, #44]	@ (8018530 <alloc_socket+0xc8>)
 8018502:	68fb      	ldr	r3, [r7, #12]
 8018504:	011b      	lsls	r3, r3, #4
 8018506:	4413      	add	r3, r2
 8018508:	330c      	adds	r3, #12
 801850a:	2200      	movs	r2, #0
 801850c:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
      return i + LWIP_SOCKET_OFFSET;
 801850e:	68fb      	ldr	r3, [r7, #12]
 8018510:	e00a      	b.n	8018528 <alloc_socket+0xc0>
    }
    SYS_ARCH_UNPROTECT(lev);
 8018512:	68b8      	ldr	r0, [r7, #8]
 8018514:	f00e fe9a 	bl	802724c <sys_arch_unprotect>
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8018518:	68fb      	ldr	r3, [r7, #12]
 801851a:	3301      	adds	r3, #1
 801851c:	60fb      	str	r3, [r7, #12]
 801851e:	68fb      	ldr	r3, [r7, #12]
 8018520:	2b03      	cmp	r3, #3
 8018522:	dda9      	ble.n	8018478 <alloc_socket+0x10>
  }
  return -1;
 8018524:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018528:	4618      	mov	r0, r3
 801852a:	3710      	adds	r7, #16
 801852c:	46bd      	mov	sp, r7
 801852e:	bd80      	pop	{r7, pc}
 8018530:	240243c4 	.word	0x240243c4
 8018534:	0802e4b0 	.word	0x0802e4b0
 8018538:	0802e4e4 	.word	0x0802e4e4
 801853c:	0802e504 	.word	0x0802e504

08018540 <free_socket_locked>:
 * @param lastdata lastdata is stored here, must be freed externally
 */
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
                   union lwip_sock_lastdata *lastdata)
{
 8018540:	b480      	push	{r7}
 8018542:	b085      	sub	sp, #20
 8018544:	af00      	add	r7, sp, #0
 8018546:	60f8      	str	r0, [r7, #12]
 8018548:	60b9      	str	r1, [r7, #8]
 801854a:	607a      	str	r2, [r7, #4]
 801854c:	603b      	str	r3, [r7, #0]
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  *lastdata = sock->lastdata;
 801854e:	683b      	ldr	r3, [r7, #0]
 8018550:	68fa      	ldr	r2, [r7, #12]
 8018552:	6852      	ldr	r2, [r2, #4]
 8018554:	601a      	str	r2, [r3, #0]
  sock->lastdata.pbuf = NULL;
 8018556:	68fb      	ldr	r3, [r7, #12]
 8018558:	2200      	movs	r2, #0
 801855a:	605a      	str	r2, [r3, #4]
  *conn = sock->conn;
 801855c:	68fb      	ldr	r3, [r7, #12]
 801855e:	681a      	ldr	r2, [r3, #0]
 8018560:	687b      	ldr	r3, [r7, #4]
 8018562:	601a      	str	r2, [r3, #0]
  sock->conn = NULL;
 8018564:	68fb      	ldr	r3, [r7, #12]
 8018566:	2200      	movs	r2, #0
 8018568:	601a      	str	r2, [r3, #0]
  return 1;
 801856a:	2301      	movs	r3, #1
}
 801856c:	4618      	mov	r0, r3
 801856e:	3714      	adds	r7, #20
 8018570:	46bd      	mov	sp, r7
 8018572:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018576:	4770      	bx	lr

08018578 <free_socket_free_elements>:

/** Free a socket's leftover members.
 */
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
 8018578:	b580      	push	{r7, lr}
 801857a:	b084      	sub	sp, #16
 801857c:	af00      	add	r7, sp, #0
 801857e:	60f8      	str	r0, [r7, #12]
 8018580:	60b9      	str	r1, [r7, #8]
 8018582:	607a      	str	r2, [r7, #4]
  if (lastdata->pbuf != NULL) {
 8018584:	687b      	ldr	r3, [r7, #4]
 8018586:	681b      	ldr	r3, [r3, #0]
 8018588:	2b00      	cmp	r3, #0
 801858a:	d00d      	beq.n	80185a8 <free_socket_free_elements+0x30>
    if (is_tcp) {
 801858c:	68fb      	ldr	r3, [r7, #12]
 801858e:	2b00      	cmp	r3, #0
 8018590:	d005      	beq.n	801859e <free_socket_free_elements+0x26>
      pbuf_free(lastdata->pbuf);
 8018592:	687b      	ldr	r3, [r7, #4]
 8018594:	681b      	ldr	r3, [r3, #0]
 8018596:	4618      	mov	r0, r3
 8018598:	f002 fe68 	bl	801b26c <pbuf_free>
 801859c:	e004      	b.n	80185a8 <free_socket_free_elements+0x30>
    } else {
      netbuf_delete(lastdata->netbuf);
 801859e:	687b      	ldr	r3, [r7, #4]
 80185a0:	681b      	ldr	r3, [r3, #0]
 80185a2:	4618      	mov	r0, r3
 80185a4:	f7ff fe78 	bl	8018298 <netbuf_delete>
    }
  }
  if (conn != NULL) {
 80185a8:	68bb      	ldr	r3, [r7, #8]
 80185aa:	2b00      	cmp	r3, #0
 80185ac:	d002      	beq.n	80185b4 <free_socket_free_elements+0x3c>
    /* netconn_prepare_delete() has already been called, here we only free the conn */
    netconn_delete(conn);
 80185ae:	68b8      	ldr	r0, [r7, #8]
 80185b0:	f7fd fd50 	bl	8016054 <netconn_delete>
  }
}
 80185b4:	bf00      	nop
 80185b6:	3710      	adds	r7, #16
 80185b8:	46bd      	mov	sp, r7
 80185ba:	bd80      	pop	{r7, pc}

080185bc <free_socket>:
 * @param sock the socket to free
 * @param is_tcp != 0 for TCP sockets, used to free lastdata
 */
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
 80185bc:	b580      	push	{r7, lr}
 80185be:	b086      	sub	sp, #24
 80185c0:	af00      	add	r7, sp, #0
 80185c2:	6078      	str	r0, [r7, #4]
 80185c4:	6039      	str	r1, [r7, #0]
  struct netconn *conn;
  union lwip_sock_lastdata lastdata;
  SYS_ARCH_DECL_PROTECT(lev);

  /* Protect socket array */
  SYS_ARCH_PROTECT(lev);
 80185c6:	f00e fe33 	bl	8027230 <sys_arch_protect>
 80185ca:	6178      	str	r0, [r7, #20]

  freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
 80185cc:	f107 0308 	add.w	r3, r7, #8
 80185d0:	f107 020c 	add.w	r2, r7, #12
 80185d4:	6839      	ldr	r1, [r7, #0]
 80185d6:	6878      	ldr	r0, [r7, #4]
 80185d8:	f7ff ffb2 	bl	8018540 <free_socket_locked>
 80185dc:	6138      	str	r0, [r7, #16]
  SYS_ARCH_UNPROTECT(lev);
 80185de:	6978      	ldr	r0, [r7, #20]
 80185e0:	f00e fe34 	bl	802724c <sys_arch_unprotect>
  /* don't use 'sock' after this line, as another task might have allocated it */

  if (freed) {
 80185e4:	693b      	ldr	r3, [r7, #16]
 80185e6:	2b00      	cmp	r3, #0
 80185e8:	d006      	beq.n	80185f8 <free_socket+0x3c>
    free_socket_free_elements(is_tcp, conn, &lastdata);
 80185ea:	68fb      	ldr	r3, [r7, #12]
 80185ec:	f107 0208 	add.w	r2, r7, #8
 80185f0:	4619      	mov	r1, r3
 80185f2:	6838      	ldr	r0, [r7, #0]
 80185f4:	f7ff ffc0 	bl	8018578 <free_socket_free_elements>
  }
}
 80185f8:	bf00      	nop
 80185fa:	3718      	adds	r7, #24
 80185fc:	46bd      	mov	sp, r7
 80185fe:	bd80      	pop	{r7, pc}

08018600 <lwip_close>:
  return 0;
}

int
lwip_close(int s)
{
 8018600:	b580      	push	{r7, lr}
 8018602:	b086      	sub	sp, #24
 8018604:	af00      	add	r7, sp, #0
 8018606:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock;
  int is_tcp = 0;
 8018608:	2300      	movs	r3, #0
 801860a:	617b      	str	r3, [r7, #20]
  err_t err;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));

  sock = get_socket(s);
 801860c:	6878      	ldr	r0, [r7, #4]
 801860e:	f7ff ff13 	bl	8018438 <get_socket>
 8018612:	6138      	str	r0, [r7, #16]
  if (!sock) {
 8018614:	693b      	ldr	r3, [r7, #16]
 8018616:	2b00      	cmp	r3, #0
 8018618:	d102      	bne.n	8018620 <lwip_close+0x20>
    return -1;
 801861a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801861e:	e039      	b.n	8018694 <lwip_close+0x94>
  }

  if (sock->conn != NULL) {
 8018620:	693b      	ldr	r3, [r7, #16]
 8018622:	681b      	ldr	r3, [r3, #0]
 8018624:	2b00      	cmp	r3, #0
 8018626:	d00b      	beq.n	8018640 <lwip_close+0x40>
    is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
 8018628:	693b      	ldr	r3, [r7, #16]
 801862a:	681b      	ldr	r3, [r3, #0]
 801862c:	781b      	ldrb	r3, [r3, #0]
 801862e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018632:	2b10      	cmp	r3, #16
 8018634:	bf0c      	ite	eq
 8018636:	2301      	moveq	r3, #1
 8018638:	2300      	movne	r3, #0
 801863a:	b2db      	uxtb	r3, r3
 801863c:	617b      	str	r3, [r7, #20]
 801863e:	e00a      	b.n	8018656 <lwip_close+0x56>
  } else {
    LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
 8018640:	693b      	ldr	r3, [r7, #16]
 8018642:	685b      	ldr	r3, [r3, #4]
 8018644:	2b00      	cmp	r3, #0
 8018646:	d006      	beq.n	8018656 <lwip_close+0x56>
 8018648:	4b14      	ldr	r3, [pc, #80]	@ (801869c <lwip_close+0x9c>)
 801864a:	f44f 7245 	mov.w	r2, #788	@ 0x314
 801864e:	4914      	ldr	r1, [pc, #80]	@ (80186a0 <lwip_close+0xa0>)
 8018650:	4814      	ldr	r0, [pc, #80]	@ (80186a4 <lwip_close+0xa4>)
 8018652:	f012 f883 	bl	802a75c <iprintf>
#if LWIP_IPV6_MLD
  /* drop all possibly joined MLD6 memberships */
  lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */

  err = netconn_prepare_delete(sock->conn);
 8018656:	693b      	ldr	r3, [r7, #16]
 8018658:	681b      	ldr	r3, [r3, #0]
 801865a:	4618      	mov	r0, r3
 801865c:	f7fd fcd6 	bl	801600c <netconn_prepare_delete>
 8018660:	4603      	mov	r3, r0
 8018662:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 8018664:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8018668:	2b00      	cmp	r3, #0
 801866a:	d00e      	beq.n	801868a <lwip_close+0x8a>
    sock_set_errno(sock, err_to_errno(err));
 801866c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8018670:	4618      	mov	r0, r3
 8018672:	f7ff fdf3 	bl	801825c <err_to_errno>
 8018676:	60b8      	str	r0, [r7, #8]
 8018678:	68bb      	ldr	r3, [r7, #8]
 801867a:	2b00      	cmp	r3, #0
 801867c:	d002      	beq.n	8018684 <lwip_close+0x84>
 801867e:	4a0a      	ldr	r2, [pc, #40]	@ (80186a8 <lwip_close+0xa8>)
 8018680:	68bb      	ldr	r3, [r7, #8]
 8018682:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018684:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018688:	e004      	b.n	8018694 <lwip_close+0x94>
  }

  free_socket(sock, is_tcp);
 801868a:	6979      	ldr	r1, [r7, #20]
 801868c:	6938      	ldr	r0, [r7, #16]
 801868e:	f7ff ff95 	bl	80185bc <free_socket>
  set_errno(0);
  return 0;
 8018692:	2300      	movs	r3, #0
}
 8018694:	4618      	mov	r0, r3
 8018696:	3718      	adds	r7, #24
 8018698:	46bd      	mov	sp, r7
 801869a:	bd80      	pop	{r7, pc}
 801869c:	0802e4b0 	.word	0x0802e4b0
 80186a0:	0802e570 	.word	0x0802e570
 80186a4:	0802e504 	.word	0x0802e504
 80186a8:	2402b260 	.word	0x2402b260

080186ac <lwip_connect>:

int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
 80186ac:	b580      	push	{r7, lr}
 80186ae:	b08a      	sub	sp, #40	@ 0x28
 80186b0:	af00      	add	r7, sp, #0
 80186b2:	60f8      	str	r0, [r7, #12]
 80186b4:	60b9      	str	r1, [r7, #8]
 80186b6:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock;
  err_t err;

  sock = get_socket(s);
 80186b8:	68f8      	ldr	r0, [r7, #12]
 80186ba:	f7ff febd 	bl	8018438 <get_socket>
 80186be:	6278      	str	r0, [r7, #36]	@ 0x24
  if (!sock) {
 80186c0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80186c2:	2b00      	cmp	r3, #0
 80186c4:	d102      	bne.n	80186cc <lwip_connect+0x20>
    return -1;
 80186c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80186ca:	e062      	b.n	8018792 <lwip_connect+0xe6>
    done_socket(sock);
    return -1;
  }

  LWIP_UNUSED_ARG(namelen);
  if (name->sa_family == AF_UNSPEC) {
 80186cc:	68bb      	ldr	r3, [r7, #8]
 80186ce:	785b      	ldrb	r3, [r3, #1]
 80186d0:	2b00      	cmp	r3, #0
 80186d2:	d108      	bne.n	80186e6 <lwip_connect+0x3a>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
    err = netconn_disconnect(sock->conn);
 80186d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80186d6:	681b      	ldr	r3, [r3, #0]
 80186d8:	4618      	mov	r0, r3
 80186da:	f7fd fd61 	bl	80161a0 <netconn_disconnect>
 80186de:	4603      	mov	r3, r0
 80186e0:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
 80186e4:	e039      	b.n	801875a <lwip_connect+0xae>
  } else {
    ip_addr_t remote_addr;
    u16_t remote_port;

    /* check size, family and alignment of 'name' */
    LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
 80186e6:	687b      	ldr	r3, [r7, #4]
 80186e8:	2b10      	cmp	r3, #16
 80186ea:	d10c      	bne.n	8018706 <lwip_connect+0x5a>
 80186ec:	68bb      	ldr	r3, [r7, #8]
 80186ee:	785b      	ldrb	r3, [r3, #1]
 80186f0:	2b00      	cmp	r3, #0
 80186f2:	d003      	beq.n	80186fc <lwip_connect+0x50>
 80186f4:	68bb      	ldr	r3, [r7, #8]
 80186f6:	785b      	ldrb	r3, [r3, #1]
 80186f8:	2b02      	cmp	r3, #2
 80186fa:	d104      	bne.n	8018706 <lwip_connect+0x5a>
 80186fc:	68bb      	ldr	r3, [r7, #8]
 80186fe:	f003 0303 	and.w	r3, r3, #3
 8018702:	2b00      	cmp	r3, #0
 8018704:	d014      	beq.n	8018730 <lwip_connect+0x84>
 8018706:	4b25      	ldr	r3, [pc, #148]	@ (801879c <lwip_connect+0xf0>)
 8018708:	f240 3247 	movw	r2, #839	@ 0x347
 801870c:	4924      	ldr	r1, [pc, #144]	@ (80187a0 <lwip_connect+0xf4>)
 801870e:	4825      	ldr	r0, [pc, #148]	@ (80187a4 <lwip_connect+0xf8>)
 8018710:	f012 f824 	bl	802a75c <iprintf>
 8018714:	f06f 000f 	mvn.w	r0, #15
 8018718:	f7ff fda0 	bl	801825c <err_to_errno>
 801871c:	61f8      	str	r0, [r7, #28]
 801871e:	69fb      	ldr	r3, [r7, #28]
 8018720:	2b00      	cmp	r3, #0
 8018722:	d002      	beq.n	801872a <lwip_connect+0x7e>
 8018724:	4a20      	ldr	r2, [pc, #128]	@ (80187a8 <lwip_connect+0xfc>)
 8018726:	69fb      	ldr	r3, [r7, #28]
 8018728:	6013      	str	r3, [r2, #0]
 801872a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801872e:	e030      	b.n	8018792 <lwip_connect+0xe6>
               IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
               sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);

    SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
 8018730:	68bb      	ldr	r3, [r7, #8]
 8018732:	685b      	ldr	r3, [r3, #4]
 8018734:	613b      	str	r3, [r7, #16]
 8018736:	68bb      	ldr	r3, [r7, #8]
 8018738:	885b      	ldrh	r3, [r3, #2]
 801873a:	4618      	mov	r0, r3
 801873c:	f001 f8b4 	bl	80198a8 <lwip_htons>
 8018740:	4603      	mov	r3, r0
 8018742:	847b      	strh	r3, [r7, #34]	@ 0x22
      unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
      IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    err = netconn_connect(sock->conn, &remote_addr, remote_port);
 8018744:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018746:	681b      	ldr	r3, [r3, #0]
 8018748:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801874a:	f107 0110 	add.w	r1, r7, #16
 801874e:	4618      	mov	r0, r3
 8018750:	f7fd fcee 	bl	8016130 <netconn_connect>
 8018754:	4603      	mov	r3, r0
 8018756:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
  }

  if (err != ERR_OK) {
 801875a:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 801875e:	2b00      	cmp	r3, #0
 8018760:	d00e      	beq.n	8018780 <lwip_connect+0xd4>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
    sock_set_errno(sock, err_to_errno(err));
 8018762:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 8018766:	4618      	mov	r0, r3
 8018768:	f7ff fd78 	bl	801825c <err_to_errno>
 801876c:	6178      	str	r0, [r7, #20]
 801876e:	697b      	ldr	r3, [r7, #20]
 8018770:	2b00      	cmp	r3, #0
 8018772:	d002      	beq.n	801877a <lwip_connect+0xce>
 8018774:	4a0c      	ldr	r2, [pc, #48]	@ (80187a8 <lwip_connect+0xfc>)
 8018776:	697b      	ldr	r3, [r7, #20]
 8018778:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 801877a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801877e:	e008      	b.n	8018792 <lwip_connect+0xe6>
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
  sock_set_errno(sock, 0);
 8018780:	2300      	movs	r3, #0
 8018782:	61bb      	str	r3, [r7, #24]
 8018784:	69bb      	ldr	r3, [r7, #24]
 8018786:	2b00      	cmp	r3, #0
 8018788:	d002      	beq.n	8018790 <lwip_connect+0xe4>
 801878a:	4a07      	ldr	r2, [pc, #28]	@ (80187a8 <lwip_connect+0xfc>)
 801878c:	69bb      	ldr	r3, [r7, #24]
 801878e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return 0;
 8018790:	2300      	movs	r3, #0
}
 8018792:	4618      	mov	r0, r3
 8018794:	3728      	adds	r7, #40	@ 0x28
 8018796:	46bd      	mov	sp, r7
 8018798:	bd80      	pop	{r7, pc}
 801879a:	bf00      	nop
 801879c:	0802e4b0 	.word	0x0802e4b0
 80187a0:	0802e588 	.word	0x0802e588
 80187a4:	0802e504 	.word	0x0802e504
 80187a8:	2402b260 	.word	0x2402b260

080187ac <lwip_recv_tcp>:
 * until "len" bytes are received or we're otherwise done.
 * Keeps sock->lastdata for peeking or partly copying.
 */
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
 80187ac:	b580      	push	{r7, lr}
 80187ae:	b08c      	sub	sp, #48	@ 0x30
 80187b0:	af00      	add	r7, sp, #0
 80187b2:	60f8      	str	r0, [r7, #12]
 80187b4:	60b9      	str	r1, [r7, #8]
 80187b6:	607a      	str	r2, [r7, #4]
 80187b8:	603b      	str	r3, [r7, #0]
  u8_t apiflags = NETCONN_NOAUTORCVD;
 80187ba:	2308      	movs	r3, #8
 80187bc:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  ssize_t recvd = 0;
 80187c0:	2300      	movs	r3, #0
 80187c2:	62bb      	str	r3, [r7, #40]	@ 0x28
  ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
 80187c4:	687b      	ldr	r3, [r7, #4]
 80187c6:	2b00      	cmp	r3, #0
 80187c8:	db01      	blt.n	80187ce <lwip_recv_tcp+0x22>
 80187ca:	687b      	ldr	r3, [r7, #4]
 80187cc:	e001      	b.n	80187d2 <lwip_recv_tcp+0x26>
 80187ce:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 80187d2:	627b      	str	r3, [r7, #36]	@ 0x24

  LWIP_ASSERT("no socket given", sock != NULL);
 80187d4:	68fb      	ldr	r3, [r7, #12]
 80187d6:	2b00      	cmp	r3, #0
 80187d8:	d106      	bne.n	80187e8 <lwip_recv_tcp+0x3c>
 80187da:	4b74      	ldr	r3, [pc, #464]	@ (80189ac <lwip_recv_tcp+0x200>)
 80187dc:	f240 329e 	movw	r2, #926	@ 0x39e
 80187e0:	4973      	ldr	r1, [pc, #460]	@ (80189b0 <lwip_recv_tcp+0x204>)
 80187e2:	4874      	ldr	r0, [pc, #464]	@ (80189b4 <lwip_recv_tcp+0x208>)
 80187e4:	f011 ffba 	bl	802a75c <iprintf>
  LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
 80187e8:	68fb      	ldr	r3, [r7, #12]
 80187ea:	681b      	ldr	r3, [r3, #0]
 80187ec:	781b      	ldrb	r3, [r3, #0]
 80187ee:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80187f2:	2b10      	cmp	r3, #16
 80187f4:	d006      	beq.n	8018804 <lwip_recv_tcp+0x58>
 80187f6:	4b6d      	ldr	r3, [pc, #436]	@ (80189ac <lwip_recv_tcp+0x200>)
 80187f8:	f240 329f 	movw	r2, #927	@ 0x39f
 80187fc:	496e      	ldr	r1, [pc, #440]	@ (80189b8 <lwip_recv_tcp+0x20c>)
 80187fe:	486d      	ldr	r0, [pc, #436]	@ (80189b4 <lwip_recv_tcp+0x208>)
 8018800:	f011 ffac 	bl	802a75c <iprintf>

  if (flags & MSG_DONTWAIT) {
 8018804:	683b      	ldr	r3, [r7, #0]
 8018806:	f003 0308 	and.w	r3, r3, #8
 801880a:	2b00      	cmp	r3, #0
 801880c:	d005      	beq.n	801881a <lwip_recv_tcp+0x6e>
    apiflags |= NETCONN_DONTBLOCK;
 801880e:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8018812:	f043 0304 	orr.w	r3, r3, #4
 8018816:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    err_t err;
    u16_t copylen;

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
    /* Check if there is data left from the last recv operation. */
    if (sock->lastdata.pbuf) {
 801881a:	68fb      	ldr	r3, [r7, #12]
 801881c:	685b      	ldr	r3, [r3, #4]
 801881e:	2b00      	cmp	r3, #0
 8018820:	d003      	beq.n	801882a <lwip_recv_tcp+0x7e>
      p = sock->lastdata.pbuf;
 8018822:	68fb      	ldr	r3, [r7, #12]
 8018824:	685b      	ldr	r3, [r3, #4]
 8018826:	617b      	str	r3, [r7, #20]
 8018828:	e036      	b.n	8018898 <lwip_recv_tcp+0xec>
    } else {
      /* No data was left from the previous operation, so we try to get
         some from the network. */
      err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
 801882a:	68fb      	ldr	r3, [r7, #12]
 801882c:	681b      	ldr	r3, [r3, #0]
 801882e:	f897 2023 	ldrb.w	r2, [r7, #35]	@ 0x23
 8018832:	f107 0114 	add.w	r1, r7, #20
 8018836:	4618      	mov	r0, r3
 8018838:	f7fd fea4 	bl	8016584 <netconn_recv_tcp_pbuf_flags>
 801883c:	4603      	mov	r3, r0
 801883e:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
                                  err, (void *)p));

      if (err != ERR_OK) {
 8018842:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8018846:	2b00      	cmp	r3, #0
 8018848:	d019      	beq.n	801887e <lwip_recv_tcp+0xd2>
        if (recvd > 0) {
 801884a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801884c:	2b00      	cmp	r3, #0
 801884e:	f300 808d 	bgt.w	801896c <lwip_recv_tcp+0x1c0>
          goto lwip_recv_tcp_done;
        }
        /* We should really do some error checking here. */
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
                                    lwip_strerr(err)));
        sock_set_errno(sock, err_to_errno(err));
 8018852:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8018856:	4618      	mov	r0, r3
 8018858:	f7ff fd00 	bl	801825c <err_to_errno>
 801885c:	61f8      	str	r0, [r7, #28]
 801885e:	69fb      	ldr	r3, [r7, #28]
 8018860:	2b00      	cmp	r3, #0
 8018862:	d002      	beq.n	801886a <lwip_recv_tcp+0xbe>
 8018864:	4a55      	ldr	r2, [pc, #340]	@ (80189bc <lwip_recv_tcp+0x210>)
 8018866:	69fb      	ldr	r3, [r7, #28]
 8018868:	6013      	str	r3, [r2, #0]
        if (err == ERR_CLSD) {
 801886a:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 801886e:	f113 0f0f 	cmn.w	r3, #15
 8018872:	d101      	bne.n	8018878 <lwip_recv_tcp+0xcc>
          return 0;
 8018874:	2300      	movs	r3, #0
 8018876:	e094      	b.n	80189a2 <lwip_recv_tcp+0x1f6>
        } else {
          return -1;
 8018878:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801887c:	e091      	b.n	80189a2 <lwip_recv_tcp+0x1f6>
        }
      }
      LWIP_ASSERT("p != NULL", p != NULL);
 801887e:	697b      	ldr	r3, [r7, #20]
 8018880:	2b00      	cmp	r3, #0
 8018882:	d106      	bne.n	8018892 <lwip_recv_tcp+0xe6>
 8018884:	4b49      	ldr	r3, [pc, #292]	@ (80189ac <lwip_recv_tcp+0x200>)
 8018886:	f240 32c5 	movw	r2, #965	@ 0x3c5
 801888a:	494d      	ldr	r1, [pc, #308]	@ (80189c0 <lwip_recv_tcp+0x214>)
 801888c:	4849      	ldr	r0, [pc, #292]	@ (80189b4 <lwip_recv_tcp+0x208>)
 801888e:	f011 ff65 	bl	802a75c <iprintf>
      sock->lastdata.pbuf = p;
 8018892:	697a      	ldr	r2, [r7, #20]
 8018894:	68fb      	ldr	r3, [r7, #12]
 8018896:	605a      	str	r2, [r3, #4]
    }

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
                                p->tot_len, (int)recv_left, (int)recvd));

    if (recv_left > p->tot_len) {
 8018898:	697b      	ldr	r3, [r7, #20]
 801889a:	891b      	ldrh	r3, [r3, #8]
 801889c:	461a      	mov	r2, r3
 801889e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80188a0:	4293      	cmp	r3, r2
 80188a2:	dd03      	ble.n	80188ac <lwip_recv_tcp+0x100>
      copylen = p->tot_len;
 80188a4:	697b      	ldr	r3, [r7, #20]
 80188a6:	891b      	ldrh	r3, [r3, #8]
 80188a8:	85fb      	strh	r3, [r7, #46]	@ 0x2e
 80188aa:	e001      	b.n	80188b0 <lwip_recv_tcp+0x104>
    } else {
      copylen = (u16_t)recv_left;
 80188ac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80188ae:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }
    if (recvd + copylen < recvd) {
 80188b0:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 80188b2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80188b4:	4413      	add	r3, r2
 80188b6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80188b8:	429a      	cmp	r2, r3
 80188ba:	dd03      	ble.n	80188c4 <lwip_recv_tcp+0x118>
      /* overflow */
      copylen = (u16_t)(SSIZE_MAX - recvd);
 80188bc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80188be:	b29b      	uxth	r3, r3
 80188c0:	43db      	mvns	r3, r3
 80188c2:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }

    /* copy the contents of the received buffer into
    the supplied memory pointer mem */
    pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
 80188c4:	6978      	ldr	r0, [r7, #20]
 80188c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80188c8:	68ba      	ldr	r2, [r7, #8]
 80188ca:	18d1      	adds	r1, r2, r3
 80188cc:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 80188ce:	2300      	movs	r3, #0
 80188d0:	f002 fed2 	bl	801b678 <pbuf_copy_partial>

    recvd += copylen;
 80188d4:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 80188d6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80188d8:	4413      	add	r3, r2
 80188da:	62bb      	str	r3, [r7, #40]	@ 0x28

    /* TCP combines multiple pbufs for one recv */
    LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
 80188dc:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 80188de:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80188e0:	429a      	cmp	r2, r3
 80188e2:	da06      	bge.n	80188f2 <lwip_recv_tcp+0x146>
 80188e4:	4b31      	ldr	r3, [pc, #196]	@ (80189ac <lwip_recv_tcp+0x200>)
 80188e6:	f240 32dd 	movw	r2, #989	@ 0x3dd
 80188ea:	4936      	ldr	r1, [pc, #216]	@ (80189c4 <lwip_recv_tcp+0x218>)
 80188ec:	4831      	ldr	r0, [pc, #196]	@ (80189b4 <lwip_recv_tcp+0x208>)
 80188ee:	f011 ff35 	bl	802a75c <iprintf>
    recv_left -= copylen;
 80188f2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 80188f4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80188f6:	1ad3      	subs	r3, r2, r3
 80188f8:	627b      	str	r3, [r7, #36]	@ 0x24

    /* Unless we peek the incoming message... */
    if ((flags & MSG_PEEK) == 0) {
 80188fa:	683b      	ldr	r3, [r7, #0]
 80188fc:	f003 0301 	and.w	r3, r3, #1
 8018900:	2b00      	cmp	r3, #0
 8018902:	d123      	bne.n	801894c <lwip_recv_tcp+0x1a0>
      /* ... check if there is data left in the pbuf */
      LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
 8018904:	697b      	ldr	r3, [r7, #20]
 8018906:	891b      	ldrh	r3, [r3, #8]
 8018908:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801890a:	429a      	cmp	r2, r3
 801890c:	d906      	bls.n	801891c <lwip_recv_tcp+0x170>
 801890e:	4b27      	ldr	r3, [pc, #156]	@ (80189ac <lwip_recv_tcp+0x200>)
 8018910:	f240 32e3 	movw	r2, #995	@ 0x3e3
 8018914:	492c      	ldr	r1, [pc, #176]	@ (80189c8 <lwip_recv_tcp+0x21c>)
 8018916:	4827      	ldr	r0, [pc, #156]	@ (80189b4 <lwip_recv_tcp+0x208>)
 8018918:	f011 ff20 	bl	802a75c <iprintf>
      if (p->tot_len - copylen > 0) {
 801891c:	697b      	ldr	r3, [r7, #20]
 801891e:	891b      	ldrh	r3, [r3, #8]
 8018920:	461a      	mov	r2, r3
 8018922:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018924:	1ad3      	subs	r3, r2, r3
 8018926:	2b00      	cmp	r3, #0
 8018928:	dd09      	ble.n	801893e <lwip_recv_tcp+0x192>
        /* If so, it should be saved in the sock structure for the next recv call.
           We store the pbuf but hide/free the consumed data: */
        sock->lastdata.pbuf = pbuf_free_header(p, copylen);
 801892a:	697b      	ldr	r3, [r7, #20]
 801892c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801892e:	4611      	mov	r1, r2
 8018930:	4618      	mov	r0, r3
 8018932:	f002 fc68 	bl	801b206 <pbuf_free_header>
 8018936:	4602      	mov	r2, r0
 8018938:	68fb      	ldr	r3, [r7, #12]
 801893a:	605a      	str	r2, [r3, #4]
 801893c:	e006      	b.n	801894c <lwip_recv_tcp+0x1a0>
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
      } else {
        sock->lastdata.pbuf = NULL;
 801893e:	68fb      	ldr	r3, [r7, #12]
 8018940:	2200      	movs	r2, #0
 8018942:	605a      	str	r2, [r3, #4]
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
        pbuf_free(p);
 8018944:	697b      	ldr	r3, [r7, #20]
 8018946:	4618      	mov	r0, r3
 8018948:	f002 fc90 	bl	801b26c <pbuf_free>
      }
    }
    /* once we have some data to return, only add more if we don't need to wait */
    apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
 801894c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8018950:	f043 0314 	orr.w	r3, r3, #20
 8018954:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    /* @todo: do we need to support peeking more than one pbuf? */
  } while ((recv_left > 0) && !(flags & MSG_PEEK));
 8018958:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801895a:	2b00      	cmp	r3, #0
 801895c:	dd08      	ble.n	8018970 <lwip_recv_tcp+0x1c4>
 801895e:	683b      	ldr	r3, [r7, #0]
 8018960:	f003 0301 	and.w	r3, r3, #1
 8018964:	2b00      	cmp	r3, #0
 8018966:	f43f af58 	beq.w	801881a <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
 801896a:	e001      	b.n	8018970 <lwip_recv_tcp+0x1c4>
          goto lwip_recv_tcp_done;
 801896c:	bf00      	nop
 801896e:	e000      	b.n	8018972 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
 8018970:	bf00      	nop
  if ((recvd > 0) && !(flags & MSG_PEEK)) {
 8018972:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018974:	2b00      	cmp	r3, #0
 8018976:	dd0b      	ble.n	8018990 <lwip_recv_tcp+0x1e4>
 8018978:	683b      	ldr	r3, [r7, #0]
 801897a:	f003 0301 	and.w	r3, r3, #1
 801897e:	2b00      	cmp	r3, #0
 8018980:	d106      	bne.n	8018990 <lwip_recv_tcp+0x1e4>
    /* ensure window update after copying all data */
    netconn_tcp_recvd(sock->conn, (size_t)recvd);
 8018982:	68fb      	ldr	r3, [r7, #12]
 8018984:	681b      	ldr	r3, [r3, #0]
 8018986:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018988:	4611      	mov	r1, r2
 801898a:	4618      	mov	r0, r3
 801898c:	f7fd fd42 	bl	8016414 <netconn_tcp_recvd>
  }
  sock_set_errno(sock, 0);
 8018990:	2300      	movs	r3, #0
 8018992:	61bb      	str	r3, [r7, #24]
 8018994:	69bb      	ldr	r3, [r7, #24]
 8018996:	2b00      	cmp	r3, #0
 8018998:	d002      	beq.n	80189a0 <lwip_recv_tcp+0x1f4>
 801899a:	4a08      	ldr	r2, [pc, #32]	@ (80189bc <lwip_recv_tcp+0x210>)
 801899c:	69bb      	ldr	r3, [r7, #24]
 801899e:	6013      	str	r3, [r2, #0]
  return recvd;
 80189a0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 80189a2:	4618      	mov	r0, r3
 80189a4:	3730      	adds	r7, #48	@ 0x30
 80189a6:	46bd      	mov	sp, r7
 80189a8:	bd80      	pop	{r7, pc}
 80189aa:	bf00      	nop
 80189ac:	0802e4b0 	.word	0x0802e4b0
 80189b0:	0802e5a8 	.word	0x0802e5a8
 80189b4:	0802e504 	.word	0x0802e504
 80189b8:	0802e5b8 	.word	0x0802e5b8
 80189bc:	2402b260 	.word	0x2402b260
 80189c0:	0802e5dc 	.word	0x0802e5dc
 80189c4:	0802e5e8 	.word	0x0802e5e8
 80189c8:	0802e610 	.word	0x0802e610

080189cc <lwip_sock_make_addr>:

/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
                    struct sockaddr *from, socklen_t *fromlen)
{
 80189cc:	b590      	push	{r4, r7, lr}
 80189ce:	b08b      	sub	sp, #44	@ 0x2c
 80189d0:	af00      	add	r7, sp, #0
 80189d2:	60f8      	str	r0, [r7, #12]
 80189d4:	60b9      	str	r1, [r7, #8]
 80189d6:	603b      	str	r3, [r7, #0]
 80189d8:	4613      	mov	r3, r2
 80189da:	80fb      	strh	r3, [r7, #6]
  int truncated = 0;
 80189dc:	2300      	movs	r3, #0
 80189de:	627b      	str	r3, [r7, #36]	@ 0x24
  union sockaddr_aligned saddr;

  LWIP_UNUSED_ARG(conn);

  LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
 80189e0:	68bb      	ldr	r3, [r7, #8]
 80189e2:	2b00      	cmp	r3, #0
 80189e4:	d106      	bne.n	80189f4 <lwip_sock_make_addr+0x28>
 80189e6:	4b2b      	ldr	r3, [pc, #172]	@ (8018a94 <lwip_sock_make_addr+0xc8>)
 80189e8:	f240 4207 	movw	r2, #1031	@ 0x407
 80189ec:	492a      	ldr	r1, [pc, #168]	@ (8018a98 <lwip_sock_make_addr+0xcc>)
 80189ee:	482b      	ldr	r0, [pc, #172]	@ (8018a9c <lwip_sock_make_addr+0xd0>)
 80189f0:	f011 feb4 	bl	802a75c <iprintf>
  LWIP_ASSERT("from != NULL", from != NULL);
 80189f4:	683b      	ldr	r3, [r7, #0]
 80189f6:	2b00      	cmp	r3, #0
 80189f8:	d106      	bne.n	8018a08 <lwip_sock_make_addr+0x3c>
 80189fa:	4b26      	ldr	r3, [pc, #152]	@ (8018a94 <lwip_sock_make_addr+0xc8>)
 80189fc:	f44f 6281 	mov.w	r2, #1032	@ 0x408
 8018a00:	4927      	ldr	r1, [pc, #156]	@ (8018aa0 <lwip_sock_make_addr+0xd4>)
 8018a02:	4826      	ldr	r0, [pc, #152]	@ (8018a9c <lwip_sock_make_addr+0xd0>)
 8018a04:	f011 feaa 	bl	802a75c <iprintf>
  LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
 8018a08:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018a0a:	2b00      	cmp	r3, #0
 8018a0c:	d106      	bne.n	8018a1c <lwip_sock_make_addr+0x50>
 8018a0e:	4b21      	ldr	r3, [pc, #132]	@ (8018a94 <lwip_sock_make_addr+0xc8>)
 8018a10:	f240 4209 	movw	r2, #1033	@ 0x409
 8018a14:	4923      	ldr	r1, [pc, #140]	@ (8018aa4 <lwip_sock_make_addr+0xd8>)
 8018a16:	4821      	ldr	r0, [pc, #132]	@ (8018a9c <lwip_sock_make_addr+0xd0>)
 8018a18:	f011 fea0 	bl	802a75c <iprintf>
    ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
    IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
  }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

  IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
 8018a1c:	f107 0314 	add.w	r3, r7, #20
 8018a20:	2210      	movs	r2, #16
 8018a22:	701a      	strb	r2, [r3, #0]
 8018a24:	f107 0314 	add.w	r3, r7, #20
 8018a28:	2202      	movs	r2, #2
 8018a2a:	705a      	strb	r2, [r3, #1]
 8018a2c:	f107 0414 	add.w	r4, r7, #20
 8018a30:	88fb      	ldrh	r3, [r7, #6]
 8018a32:	4618      	mov	r0, r3
 8018a34:	f000 ff38 	bl	80198a8 <lwip_htons>
 8018a38:	4603      	mov	r3, r0
 8018a3a:	8063      	strh	r3, [r4, #2]
 8018a3c:	f107 0314 	add.w	r3, r7, #20
 8018a40:	68ba      	ldr	r2, [r7, #8]
 8018a42:	6812      	ldr	r2, [r2, #0]
 8018a44:	605a      	str	r2, [r3, #4]
 8018a46:	f107 0314 	add.w	r3, r7, #20
 8018a4a:	3308      	adds	r3, #8
 8018a4c:	2208      	movs	r2, #8
 8018a4e:	2100      	movs	r1, #0
 8018a50:	4618      	mov	r0, r3
 8018a52:	f012 f815 	bl	802aa80 <memset>
  if (*fromlen < saddr.sa.sa_len) {
 8018a56:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018a58:	681b      	ldr	r3, [r3, #0]
 8018a5a:	7d3a      	ldrb	r2, [r7, #20]
 8018a5c:	4293      	cmp	r3, r2
 8018a5e:	d202      	bcs.n	8018a66 <lwip_sock_make_addr+0x9a>
    truncated = 1;
 8018a60:	2301      	movs	r3, #1
 8018a62:	627b      	str	r3, [r7, #36]	@ 0x24
 8018a64:	e008      	b.n	8018a78 <lwip_sock_make_addr+0xac>
  } else if (*fromlen > saddr.sa.sa_len) {
 8018a66:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018a68:	681b      	ldr	r3, [r3, #0]
 8018a6a:	7d3a      	ldrb	r2, [r7, #20]
 8018a6c:	4293      	cmp	r3, r2
 8018a6e:	d903      	bls.n	8018a78 <lwip_sock_make_addr+0xac>
    *fromlen = saddr.sa.sa_len;
 8018a70:	7d3b      	ldrb	r3, [r7, #20]
 8018a72:	461a      	mov	r2, r3
 8018a74:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018a76:	601a      	str	r2, [r3, #0]
  }
  MEMCPY(from, &saddr, *fromlen);
 8018a78:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018a7a:	681a      	ldr	r2, [r3, #0]
 8018a7c:	f107 0314 	add.w	r3, r7, #20
 8018a80:	4619      	mov	r1, r3
 8018a82:	6838      	ldr	r0, [r7, #0]
 8018a84:	f012 f8f3 	bl	802ac6e <memcpy>
  return truncated;
 8018a88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8018a8a:	4618      	mov	r0, r3
 8018a8c:	372c      	adds	r7, #44	@ 0x2c
 8018a8e:	46bd      	mov	sp, r7
 8018a90:	bd90      	pop	{r4, r7, pc}
 8018a92:	bf00      	nop
 8018a94:	0802e4b0 	.word	0x0802e4b0
 8018a98:	0802e620 	.word	0x0802e620
 8018a9c:	0802e504 	.word	0x0802e504
 8018aa0:	0802e634 	.word	0x0802e634
 8018aa4:	0802e644 	.word	0x0802e644

08018aa8 <lwip_recv_tcp_from>:

#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
 8018aa8:	b580      	push	{r7, lr}
 8018aaa:	b088      	sub	sp, #32
 8018aac:	af02      	add	r7, sp, #8
 8018aae:	60f8      	str	r0, [r7, #12]
 8018ab0:	60b9      	str	r1, [r7, #8]
 8018ab2:	607a      	str	r2, [r7, #4]
 8018ab4:	603b      	str	r3, [r7, #0]
  if (sock == NULL) {
 8018ab6:	68fb      	ldr	r3, [r7, #12]
 8018ab8:	2b00      	cmp	r3, #0
 8018aba:	d101      	bne.n	8018ac0 <lwip_recv_tcp_from+0x18>
    return 0;
 8018abc:	2300      	movs	r3, #0
 8018abe:	e021      	b.n	8018b04 <lwip_recv_tcp_from+0x5c>
  LWIP_UNUSED_ARG(dbg_fn);
  LWIP_UNUSED_ARG(dbg_s);
  LWIP_UNUSED_ARG(dbg_ret);

#if !SOCKETS_DEBUG
  if (from && fromlen)
 8018ac0:	68bb      	ldr	r3, [r7, #8]
 8018ac2:	2b00      	cmp	r3, #0
 8018ac4:	d01d      	beq.n	8018b02 <lwip_recv_tcp_from+0x5a>
 8018ac6:	687b      	ldr	r3, [r7, #4]
 8018ac8:	2b00      	cmp	r3, #0
 8018aca:	d01a      	beq.n	8018b02 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
  {
    /* get remote addr/port from tcp_pcb */
    u16_t port;
    ip_addr_t tmpaddr;
    netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
 8018acc:	68fb      	ldr	r3, [r7, #12]
 8018ace:	6818      	ldr	r0, [r3, #0]
 8018ad0:	f107 0216 	add.w	r2, r7, #22
 8018ad4:	f107 0110 	add.w	r1, r7, #16
 8018ad8:	2300      	movs	r3, #0
 8018ada:	f7fd fad7 	bl	801608c <netconn_getaddr>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d):  addr=", dbg_fn, dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
    if (from && fromlen) {
 8018ade:	68bb      	ldr	r3, [r7, #8]
 8018ae0:	2b00      	cmp	r3, #0
 8018ae2:	d00e      	beq.n	8018b02 <lwip_recv_tcp_from+0x5a>
 8018ae4:	687b      	ldr	r3, [r7, #4]
 8018ae6:	2b00      	cmp	r3, #0
 8018ae8:	d00b      	beq.n	8018b02 <lwip_recv_tcp_from+0x5a>
      return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
 8018aea:	68fb      	ldr	r3, [r7, #12]
 8018aec:	6818      	ldr	r0, [r3, #0]
 8018aee:	8afa      	ldrh	r2, [r7, #22]
 8018af0:	f107 0110 	add.w	r1, r7, #16
 8018af4:	687b      	ldr	r3, [r7, #4]
 8018af6:	9300      	str	r3, [sp, #0]
 8018af8:	68bb      	ldr	r3, [r7, #8]
 8018afa:	f7ff ff67 	bl	80189cc <lwip_sock_make_addr>
 8018afe:	4603      	mov	r3, r0
 8018b00:	e000      	b.n	8018b04 <lwip_recv_tcp_from+0x5c>
    }
  }
  return 0;
 8018b02:	2300      	movs	r3, #0
}
 8018b04:	4618      	mov	r0, r3
 8018b06:	3718      	adds	r7, #24
 8018b08:	46bd      	mov	sp, r7
 8018b0a:	bd80      	pop	{r7, pc}

08018b0c <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
 * Keeps sock->lastdata for peeking.
 */
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
 8018b0c:	b590      	push	{r4, r7, lr}
 8018b0e:	b08d      	sub	sp, #52	@ 0x34
 8018b10:	af02      	add	r7, sp, #8
 8018b12:	60f8      	str	r0, [r7, #12]
 8018b14:	60b9      	str	r1, [r7, #8]
 8018b16:	607a      	str	r2, [r7, #4]
 8018b18:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t buflen, copylen, copied;
  int i;

  LWIP_UNUSED_ARG(dbg_s);
  LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
 8018b1a:	687b      	ldr	r3, [r7, #4]
 8018b1c:	689b      	ldr	r3, [r3, #8]
 8018b1e:	2b00      	cmp	r3, #0
 8018b20:	d10d      	bne.n	8018b3e <lwip_recvfrom_udp_raw+0x32>
 8018b22:	687b      	ldr	r3, [r7, #4]
 8018b24:	68db      	ldr	r3, [r3, #12]
 8018b26:	2b00      	cmp	r3, #0
 8018b28:	dd09      	ble.n	8018b3e <lwip_recvfrom_udp_raw+0x32>
 8018b2a:	4b5e      	ldr	r3, [pc, #376]	@ (8018ca4 <lwip_recvfrom_udp_raw+0x198>)
 8018b2c:	f240 4249 	movw	r2, #1097	@ 0x449
 8018b30:	495d      	ldr	r1, [pc, #372]	@ (8018ca8 <lwip_recvfrom_udp_raw+0x19c>)
 8018b32:	485e      	ldr	r0, [pc, #376]	@ (8018cac <lwip_recvfrom_udp_raw+0x1a0>)
 8018b34:	f011 fe12 	bl	802a75c <iprintf>
 8018b38:	f06f 030f 	mvn.w	r3, #15
 8018b3c:	e0ae      	b.n	8018c9c <lwip_recvfrom_udp_raw+0x190>

  if (flags & MSG_DONTWAIT) {
 8018b3e:	68bb      	ldr	r3, [r7, #8]
 8018b40:	f003 0308 	and.w	r3, r3, #8
 8018b44:	2b00      	cmp	r3, #0
 8018b46:	d003      	beq.n	8018b50 <lwip_recvfrom_udp_raw+0x44>
    apiflags = NETCONN_DONTBLOCK;
 8018b48:	2304      	movs	r3, #4
 8018b4a:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 8018b4e:	e002      	b.n	8018b56 <lwip_recvfrom_udp_raw+0x4a>
  } else {
    apiflags = 0;
 8018b50:	2300      	movs	r3, #0
 8018b52:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
  /* Check if there is data left from the last recv operation. */
  buf = sock->lastdata.netbuf;
 8018b56:	68fb      	ldr	r3, [r7, #12]
 8018b58:	685b      	ldr	r3, [r3, #4]
 8018b5a:	613b      	str	r3, [r7, #16]
  if (buf == NULL) {
 8018b5c:	693b      	ldr	r3, [r7, #16]
 8018b5e:	2b00      	cmp	r3, #0
 8018b60:	d11f      	bne.n	8018ba2 <lwip_recvfrom_udp_raw+0x96>
    /* No data was left from the previous operation, so we try to get
        some from the network. */
    err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
 8018b62:	68fb      	ldr	r3, [r7, #12]
 8018b64:	681b      	ldr	r3, [r3, #0]
 8018b66:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8018b6a:	f107 0110 	add.w	r1, r7, #16
 8018b6e:	4618      	mov	r0, r3
 8018b70:	f7fd fd34 	bl	80165dc <netconn_recv_udp_raw_netbuf_flags>
 8018b74:	4603      	mov	r3, r0
 8018b76:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
                                err, (void *)buf));

    if (err != ERR_OK) {
 8018b7a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8018b7e:	2b00      	cmp	r3, #0
 8018b80:	d002      	beq.n	8018b88 <lwip_recvfrom_udp_raw+0x7c>
      return err;
 8018b82:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8018b86:	e089      	b.n	8018c9c <lwip_recvfrom_udp_raw+0x190>
    }
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8018b88:	693b      	ldr	r3, [r7, #16]
 8018b8a:	2b00      	cmp	r3, #0
 8018b8c:	d106      	bne.n	8018b9c <lwip_recvfrom_udp_raw+0x90>
 8018b8e:	4b45      	ldr	r3, [pc, #276]	@ (8018ca4 <lwip_recvfrom_udp_raw+0x198>)
 8018b90:	f240 425e 	movw	r2, #1118	@ 0x45e
 8018b94:	4946      	ldr	r1, [pc, #280]	@ (8018cb0 <lwip_recvfrom_udp_raw+0x1a4>)
 8018b96:	4845      	ldr	r0, [pc, #276]	@ (8018cac <lwip_recvfrom_udp_raw+0x1a0>)
 8018b98:	f011 fde0 	bl	802a75c <iprintf>
    sock->lastdata.netbuf = buf;
 8018b9c:	693a      	ldr	r2, [r7, #16]
 8018b9e:	68fb      	ldr	r3, [r7, #12]
 8018ba0:	605a      	str	r2, [r3, #4]
  }
  buflen = buf->p->tot_len;
 8018ba2:	693b      	ldr	r3, [r7, #16]
 8018ba4:	681b      	ldr	r3, [r3, #0]
 8018ba6:	891b      	ldrh	r3, [r3, #8]
 8018ba8:	837b      	strh	r3, [r7, #26]
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));

  copied = 0;
 8018baa:	2300      	movs	r3, #0
 8018bac:	847b      	strh	r3, [r7, #34]	@ 0x22
  /* copy the pbuf payload into the iovs */
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8018bae:	2300      	movs	r3, #0
 8018bb0:	61fb      	str	r3, [r7, #28]
 8018bb2:	e029      	b.n	8018c08 <lwip_recvfrom_udp_raw+0xfc>
    u16_t len_left = (u16_t)(buflen - copied);
 8018bb4:	8b7a      	ldrh	r2, [r7, #26]
 8018bb6:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018bb8:	1ad3      	subs	r3, r2, r3
 8018bba:	833b      	strh	r3, [r7, #24]
    if (msg->msg_iov[i].iov_len > len_left) {
 8018bbc:	687b      	ldr	r3, [r7, #4]
 8018bbe:	689a      	ldr	r2, [r3, #8]
 8018bc0:	69fb      	ldr	r3, [r7, #28]
 8018bc2:	00db      	lsls	r3, r3, #3
 8018bc4:	4413      	add	r3, r2
 8018bc6:	685a      	ldr	r2, [r3, #4]
 8018bc8:	8b3b      	ldrh	r3, [r7, #24]
 8018bca:	429a      	cmp	r2, r3
 8018bcc:	d902      	bls.n	8018bd4 <lwip_recvfrom_udp_raw+0xc8>
      copylen = len_left;
 8018bce:	8b3b      	ldrh	r3, [r7, #24]
 8018bd0:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8018bd2:	e006      	b.n	8018be2 <lwip_recvfrom_udp_raw+0xd6>
    } else {
      copylen = (u16_t)msg->msg_iov[i].iov_len;
 8018bd4:	687b      	ldr	r3, [r7, #4]
 8018bd6:	689a      	ldr	r2, [r3, #8]
 8018bd8:	69fb      	ldr	r3, [r7, #28]
 8018bda:	00db      	lsls	r3, r3, #3
 8018bdc:	4413      	add	r3, r2
 8018bde:	685b      	ldr	r3, [r3, #4]
 8018be0:	84bb      	strh	r3, [r7, #36]	@ 0x24
    }

    /* copy the contents of the received buffer into
        the supplied memory buffer */
    pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
 8018be2:	693b      	ldr	r3, [r7, #16]
 8018be4:	6818      	ldr	r0, [r3, #0]
 8018be6:	687b      	ldr	r3, [r7, #4]
 8018be8:	689a      	ldr	r2, [r3, #8]
 8018bea:	69fb      	ldr	r3, [r7, #28]
 8018bec:	00db      	lsls	r3, r3, #3
 8018bee:	4413      	add	r3, r2
 8018bf0:	6819      	ldr	r1, [r3, #0]
 8018bf2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018bf4:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8018bf6:	f002 fd3f 	bl	801b678 <pbuf_copy_partial>
    copied = (u16_t)(copied + copylen);
 8018bfa:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018bfc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8018bfe:	4413      	add	r3, r2
 8018c00:	847b      	strh	r3, [r7, #34]	@ 0x22
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8018c02:	69fb      	ldr	r3, [r7, #28]
 8018c04:	3301      	adds	r3, #1
 8018c06:	61fb      	str	r3, [r7, #28]
 8018c08:	687b      	ldr	r3, [r7, #4]
 8018c0a:	68db      	ldr	r3, [r3, #12]
 8018c0c:	69fa      	ldr	r2, [r7, #28]
 8018c0e:	429a      	cmp	r2, r3
 8018c10:	da03      	bge.n	8018c1a <lwip_recvfrom_udp_raw+0x10e>
 8018c12:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018c14:	8b7b      	ldrh	r3, [r7, #26]
 8018c16:	429a      	cmp	r2, r3
 8018c18:	d3cc      	bcc.n	8018bb4 <lwip_recvfrom_udp_raw+0xa8>
  }

  /* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
  if (msg->msg_name && msg->msg_namelen)
 8018c1a:	687b      	ldr	r3, [r7, #4]
 8018c1c:	681b      	ldr	r3, [r3, #0]
 8018c1e:	2b00      	cmp	r3, #0
 8018c20:	d01a      	beq.n	8018c58 <lwip_recvfrom_udp_raw+0x14c>
 8018c22:	687b      	ldr	r3, [r7, #4]
 8018c24:	685b      	ldr	r3, [r3, #4]
 8018c26:	2b00      	cmp	r3, #0
 8018c28:	d016      	beq.n	8018c58 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
  {
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d):  addr=", dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
    if (msg->msg_name && msg->msg_namelen) {
 8018c2a:	687b      	ldr	r3, [r7, #4]
 8018c2c:	681b      	ldr	r3, [r3, #0]
 8018c2e:	2b00      	cmp	r3, #0
 8018c30:	d012      	beq.n	8018c58 <lwip_recvfrom_udp_raw+0x14c>
 8018c32:	687b      	ldr	r3, [r7, #4]
 8018c34:	685b      	ldr	r3, [r3, #4]
 8018c36:	2b00      	cmp	r3, #0
 8018c38:	d00e      	beq.n	8018c58 <lwip_recvfrom_udp_raw+0x14c>
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8018c3a:	68fb      	ldr	r3, [r7, #12]
 8018c3c:	6818      	ldr	r0, [r3, #0]
 8018c3e:	693b      	ldr	r3, [r7, #16]
 8018c40:	f103 0108 	add.w	r1, r3, #8
 8018c44:	693b      	ldr	r3, [r7, #16]
 8018c46:	899a      	ldrh	r2, [r3, #12]
                          (struct sockaddr *)msg->msg_name, &msg->msg_namelen);
 8018c48:	687b      	ldr	r3, [r7, #4]
 8018c4a:	681c      	ldr	r4, [r3, #0]
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8018c4c:	687b      	ldr	r3, [r7, #4]
 8018c4e:	3304      	adds	r3, #4
 8018c50:	9300      	str	r3, [sp, #0]
 8018c52:	4623      	mov	r3, r4
 8018c54:	f7ff feba 	bl	80189cc <lwip_sock_make_addr>
    }
  }

  /* Initialize flag output */
  msg->msg_flags = 0;
 8018c58:	687b      	ldr	r3, [r7, #4]
 8018c5a:	2200      	movs	r2, #0
 8018c5c:	619a      	str	r2, [r3, #24]

  if (msg->msg_control) {
 8018c5e:	687b      	ldr	r3, [r7, #4]
 8018c60:	691b      	ldr	r3, [r3, #16]
 8018c62:	2b00      	cmp	r3, #0
 8018c64:	d007      	beq.n	8018c76 <lwip_recvfrom_udp_raw+0x16a>
    u8_t wrote_msg = 0;
 8018c66:	2300      	movs	r3, #0
 8018c68:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_IPV4 */
      }
    }
#endif /* LWIP_NETBUF_RECVINFO */

    if (!wrote_msg) {
 8018c6a:	7dfb      	ldrb	r3, [r7, #23]
 8018c6c:	2b00      	cmp	r3, #0
 8018c6e:	d102      	bne.n	8018c76 <lwip_recvfrom_udp_raw+0x16a>
      msg->msg_controllen = 0;
 8018c70:	687b      	ldr	r3, [r7, #4]
 8018c72:	2200      	movs	r2, #0
 8018c74:	615a      	str	r2, [r3, #20]
    }
  }

  /* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
  if ((flags & MSG_PEEK) == 0) {
 8018c76:	68bb      	ldr	r3, [r7, #8]
 8018c78:	f003 0301 	and.w	r3, r3, #1
 8018c7c:	2b00      	cmp	r3, #0
 8018c7e:	d106      	bne.n	8018c8e <lwip_recvfrom_udp_raw+0x182>
    sock->lastdata.netbuf = NULL;
 8018c80:	68fb      	ldr	r3, [r7, #12]
 8018c82:	2200      	movs	r2, #0
 8018c84:	605a      	str	r2, [r3, #4]
    netbuf_delete(buf);
 8018c86:	693b      	ldr	r3, [r7, #16]
 8018c88:	4618      	mov	r0, r3
 8018c8a:	f7ff fb05 	bl	8018298 <netbuf_delete>
  }
  if (datagram_len) {
 8018c8e:	683b      	ldr	r3, [r7, #0]
 8018c90:	2b00      	cmp	r3, #0
 8018c92:	d002      	beq.n	8018c9a <lwip_recvfrom_udp_raw+0x18e>
    *datagram_len = buflen;
 8018c94:	683b      	ldr	r3, [r7, #0]
 8018c96:	8b7a      	ldrh	r2, [r7, #26]
 8018c98:	801a      	strh	r2, [r3, #0]
  }
  return ERR_OK;
 8018c9a:	2300      	movs	r3, #0
}
 8018c9c:	4618      	mov	r0, r3
 8018c9e:	372c      	adds	r7, #44	@ 0x2c
 8018ca0:	46bd      	mov	sp, r7
 8018ca2:	bd90      	pop	{r4, r7, pc}
 8018ca4:	0802e4b0 	.word	0x0802e4b0
 8018ca8:	0802e654 	.word	0x0802e654
 8018cac:	0802e504 	.word	0x0802e504
 8018cb0:	0802e680 	.word	0x0802e680

08018cb4 <lwip_recvfrom>:

ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
              struct sockaddr *from, socklen_t *fromlen)
{
 8018cb4:	b580      	push	{r7, lr}
 8018cb6:	b096      	sub	sp, #88	@ 0x58
 8018cb8:	af02      	add	r7, sp, #8
 8018cba:	60f8      	str	r0, [r7, #12]
 8018cbc:	60b9      	str	r1, [r7, #8]
 8018cbe:	607a      	str	r2, [r7, #4]
 8018cc0:	603b      	str	r3, [r7, #0]
  struct lwip_sock *sock;
  ssize_t ret;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
  sock = get_socket(s);
 8018cc2:	68f8      	ldr	r0, [r7, #12]
 8018cc4:	f7ff fbb8 	bl	8018438 <get_socket>
 8018cc8:	64f8      	str	r0, [r7, #76]	@ 0x4c
  if (!sock) {
 8018cca:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8018ccc:	2b00      	cmp	r3, #0
 8018cce:	d102      	bne.n	8018cd6 <lwip_recvfrom+0x22>
    return -1;
 8018cd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018cd4:	e078      	b.n	8018dc8 <lwip_recvfrom+0x114>
  }
#if LWIP_TCP
  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018cd6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8018cd8:	681b      	ldr	r3, [r3, #0]
 8018cda:	781b      	ldrb	r3, [r3, #0]
 8018cdc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018ce0:	2b10      	cmp	r3, #16
 8018ce2:	d112      	bne.n	8018d0a <lwip_recvfrom+0x56>
    ret = lwip_recv_tcp(sock, mem, len, flags);
 8018ce4:	683b      	ldr	r3, [r7, #0]
 8018ce6:	687a      	ldr	r2, [r7, #4]
 8018ce8:	68b9      	ldr	r1, [r7, #8]
 8018cea:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8018cec:	f7ff fd5e 	bl	80187ac <lwip_recv_tcp>
 8018cf0:	6478      	str	r0, [r7, #68]	@ 0x44
    lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
 8018cf2:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018cf4:	9301      	str	r3, [sp, #4]
 8018cf6:	68fb      	ldr	r3, [r7, #12]
 8018cf8:	9300      	str	r3, [sp, #0]
 8018cfa:	4b35      	ldr	r3, [pc, #212]	@ (8018dd0 <lwip_recvfrom+0x11c>)
 8018cfc:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 8018cfe:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8018d00:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8018d02:	f7ff fed1 	bl	8018aa8 <lwip_recv_tcp_from>
    done_socket(sock);
    return ret;
 8018d06:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018d08:	e05e      	b.n	8018dc8 <lwip_recvfrom+0x114>
  } else
#endif
  {
    u16_t datagram_len = 0;
 8018d0a:	2300      	movs	r3, #0
 8018d0c:	877b      	strh	r3, [r7, #58]	@ 0x3a
    struct iovec vec;
    struct msghdr msg;
    err_t err;
    vec.iov_base = mem;
 8018d0e:	68bb      	ldr	r3, [r7, #8]
 8018d10:	633b      	str	r3, [r7, #48]	@ 0x30
    vec.iov_len = len;
 8018d12:	687b      	ldr	r3, [r7, #4]
 8018d14:	637b      	str	r3, [r7, #52]	@ 0x34
    msg.msg_control = NULL;
 8018d16:	2300      	movs	r3, #0
 8018d18:	627b      	str	r3, [r7, #36]	@ 0x24
    msg.msg_controllen = 0;
 8018d1a:	2300      	movs	r3, #0
 8018d1c:	62bb      	str	r3, [r7, #40]	@ 0x28
    msg.msg_flags = 0;
 8018d1e:	2300      	movs	r3, #0
 8018d20:	62fb      	str	r3, [r7, #44]	@ 0x2c
    msg.msg_iov = &vec;
 8018d22:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8018d26:	61fb      	str	r3, [r7, #28]
    msg.msg_iovlen = 1;
 8018d28:	2301      	movs	r3, #1
 8018d2a:	623b      	str	r3, [r7, #32]
    msg.msg_name = from;
 8018d2c:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8018d2e:	617b      	str	r3, [r7, #20]
    msg.msg_namelen = (fromlen ? *fromlen : 0);
 8018d30:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018d32:	2b00      	cmp	r3, #0
 8018d34:	d002      	beq.n	8018d3c <lwip_recvfrom+0x88>
 8018d36:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018d38:	681b      	ldr	r3, [r3, #0]
 8018d3a:	e000      	b.n	8018d3e <lwip_recvfrom+0x8a>
 8018d3c:	2300      	movs	r3, #0
 8018d3e:	61bb      	str	r3, [r7, #24]
    err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
 8018d40:	f107 013a 	add.w	r1, r7, #58	@ 0x3a
 8018d44:	f107 0214 	add.w	r2, r7, #20
 8018d48:	68fb      	ldr	r3, [r7, #12]
 8018d4a:	9300      	str	r3, [sp, #0]
 8018d4c:	460b      	mov	r3, r1
 8018d4e:	6839      	ldr	r1, [r7, #0]
 8018d50:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8018d52:	f7ff fedb 	bl	8018b0c <lwip_recvfrom_udp_raw>
 8018d56:	4603      	mov	r3, r0
 8018d58:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
    if (err != ERR_OK) {
 8018d5c:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8018d60:	2b00      	cmp	r3, #0
 8018d62:	d00e      	beq.n	8018d82 <lwip_recvfrom+0xce>
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
                                  s, lwip_strerr(err)));
      sock_set_errno(sock, err_to_errno(err));
 8018d64:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8018d68:	4618      	mov	r0, r3
 8018d6a:	f7ff fa77 	bl	801825c <err_to_errno>
 8018d6e:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8018d70:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8018d72:	2b00      	cmp	r3, #0
 8018d74:	d002      	beq.n	8018d7c <lwip_recvfrom+0xc8>
 8018d76:	4a17      	ldr	r2, [pc, #92]	@ (8018dd4 <lwip_recvfrom+0x120>)
 8018d78:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8018d7a:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return -1;
 8018d7c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018d80:	e022      	b.n	8018dc8 <lwip_recvfrom+0x114>
    }
    ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
 8018d82:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8018d84:	461a      	mov	r2, r3
 8018d86:	687b      	ldr	r3, [r7, #4]
 8018d88:	4293      	cmp	r3, r2
 8018d8a:	bf28      	it	cs
 8018d8c:	4613      	movcs	r3, r2
 8018d8e:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8018d92:	4293      	cmp	r3, r2
 8018d94:	d206      	bcs.n	8018da4 <lwip_recvfrom+0xf0>
 8018d96:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8018d98:	461a      	mov	r2, r3
 8018d9a:	687b      	ldr	r3, [r7, #4]
 8018d9c:	4293      	cmp	r3, r2
 8018d9e:	bf28      	it	cs
 8018da0:	4613      	movcs	r3, r2
 8018da2:	e001      	b.n	8018da8 <lwip_recvfrom+0xf4>
 8018da4:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8018da8:	647b      	str	r3, [r7, #68]	@ 0x44
    if (fromlen) {
 8018daa:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018dac:	2b00      	cmp	r3, #0
 8018dae:	d002      	beq.n	8018db6 <lwip_recvfrom+0x102>
      *fromlen = msg.msg_namelen;
 8018db0:	69ba      	ldr	r2, [r7, #24]
 8018db2:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8018db4:	601a      	str	r2, [r3, #0]
    }
  }

  sock_set_errno(sock, 0);
 8018db6:	2300      	movs	r3, #0
 8018db8:	643b      	str	r3, [r7, #64]	@ 0x40
 8018dba:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018dbc:	2b00      	cmp	r3, #0
 8018dbe:	d002      	beq.n	8018dc6 <lwip_recvfrom+0x112>
 8018dc0:	4a04      	ldr	r2, [pc, #16]	@ (8018dd4 <lwip_recvfrom+0x120>)
 8018dc2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018dc4:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return ret;
 8018dc6:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
}
 8018dc8:	4618      	mov	r0, r3
 8018dca:	3750      	adds	r7, #80	@ 0x50
 8018dcc:	46bd      	mov	sp, r7
 8018dce:	bd80      	pop	{r7, pc}
 8018dd0:	0802e68c 	.word	0x0802e68c
 8018dd4:	2402b260 	.word	0x2402b260

08018dd8 <lwip_recv>:
  return lwip_recvmsg(s, &msg, 0);
}

ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
 8018dd8:	b580      	push	{r7, lr}
 8018dda:	b086      	sub	sp, #24
 8018ddc:	af02      	add	r7, sp, #8
 8018dde:	60f8      	str	r0, [r7, #12]
 8018de0:	60b9      	str	r1, [r7, #8]
 8018de2:	607a      	str	r2, [r7, #4]
 8018de4:	603b      	str	r3, [r7, #0]
  return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
 8018de6:	2300      	movs	r3, #0
 8018de8:	9301      	str	r3, [sp, #4]
 8018dea:	2300      	movs	r3, #0
 8018dec:	9300      	str	r3, [sp, #0]
 8018dee:	683b      	ldr	r3, [r7, #0]
 8018df0:	687a      	ldr	r2, [r7, #4]
 8018df2:	68b9      	ldr	r1, [r7, #8]
 8018df4:	68f8      	ldr	r0, [r7, #12]
 8018df6:	f7ff ff5d 	bl	8018cb4 <lwip_recvfrom>
 8018dfa:	4603      	mov	r3, r0
}
 8018dfc:	4618      	mov	r0, r3
 8018dfe:	3710      	adds	r7, #16
 8018e00:	46bd      	mov	sp, r7
 8018e02:	bd80      	pop	{r7, pc}

08018e04 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}

ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
 8018e04:	b580      	push	{r7, lr}
 8018e06:	b08a      	sub	sp, #40	@ 0x28
 8018e08:	af02      	add	r7, sp, #8
 8018e0a:	60f8      	str	r0, [r7, #12]
 8018e0c:	60b9      	str	r1, [r7, #8]
 8018e0e:	607a      	str	r2, [r7, #4]
 8018e10:	603b      	str	r3, [r7, #0]
  size_t written;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
                              s, data, size, flags));

  sock = get_socket(s);
 8018e12:	68f8      	ldr	r0, [r7, #12]
 8018e14:	f7ff fb10 	bl	8018438 <get_socket>
 8018e18:	61f8      	str	r0, [r7, #28]
  if (!sock) {
 8018e1a:	69fb      	ldr	r3, [r7, #28]
 8018e1c:	2b00      	cmp	r3, #0
 8018e1e:	d102      	bne.n	8018e26 <lwip_send+0x22>
    return -1;
 8018e20:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018e24:	e046      	b.n	8018eb4 <lwip_send+0xb0>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
 8018e26:	69fb      	ldr	r3, [r7, #28]
 8018e28:	681b      	ldr	r3, [r3, #0]
 8018e2a:	781b      	ldrb	r3, [r3, #0]
 8018e2c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018e30:	2b10      	cmp	r3, #16
 8018e32:	d00b      	beq.n	8018e4c <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
    done_socket(sock);
    return lwip_sendto(s, data, size, flags, NULL, 0);
 8018e34:	2300      	movs	r3, #0
 8018e36:	9301      	str	r3, [sp, #4]
 8018e38:	2300      	movs	r3, #0
 8018e3a:	9300      	str	r3, [sp, #0]
 8018e3c:	683b      	ldr	r3, [r7, #0]
 8018e3e:	687a      	ldr	r2, [r7, #4]
 8018e40:	68b9      	ldr	r1, [r7, #8]
 8018e42:	68f8      	ldr	r0, [r7, #12]
 8018e44:	f000 f83c 	bl	8018ec0 <lwip_sendto>
 8018e48:	4603      	mov	r3, r0
 8018e4a:	e033      	b.n	8018eb4 <lwip_send+0xb0>
    return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
  }

  write_flags = (u8_t)(NETCONN_COPY |
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 8018e4c:	683b      	ldr	r3, [r7, #0]
 8018e4e:	f003 0310 	and.w	r3, r3, #16
  write_flags = (u8_t)(NETCONN_COPY |
 8018e52:	2b00      	cmp	r3, #0
 8018e54:	d001      	beq.n	8018e5a <lwip_send+0x56>
 8018e56:	2203      	movs	r2, #3
 8018e58:	e000      	b.n	8018e5c <lwip_send+0x58>
 8018e5a:	2201      	movs	r2, #1
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 8018e5c:	683b      	ldr	r3, [r7, #0]
 8018e5e:	105b      	asrs	r3, r3, #1
 8018e60:	b25b      	sxtb	r3, r3
 8018e62:	f003 0304 	and.w	r3, r3, #4
 8018e66:	b25b      	sxtb	r3, r3
 8018e68:	4313      	orrs	r3, r2
 8018e6a:	b25b      	sxtb	r3, r3
  write_flags = (u8_t)(NETCONN_COPY |
 8018e6c:	76fb      	strb	r3, [r7, #27]
                       ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
  written = 0;
 8018e6e:	2300      	movs	r3, #0
 8018e70:	613b      	str	r3, [r7, #16]
  err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
 8018e72:	69fb      	ldr	r3, [r7, #28]
 8018e74:	6818      	ldr	r0, [r3, #0]
 8018e76:	7efa      	ldrb	r2, [r7, #27]
 8018e78:	f107 0310 	add.w	r3, r7, #16
 8018e7c:	9300      	str	r3, [sp, #0]
 8018e7e:	4613      	mov	r3, r2
 8018e80:	687a      	ldr	r2, [r7, #4]
 8018e82:	68b9      	ldr	r1, [r7, #8]
 8018e84:	f7fd fc04 	bl	8016690 <netconn_write_partly>
 8018e88:	4603      	mov	r3, r0
 8018e8a:	76bb      	strb	r3, [r7, #26]

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
  sock_set_errno(sock, err_to_errno(err));
 8018e8c:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8018e90:	4618      	mov	r0, r3
 8018e92:	f7ff f9e3 	bl	801825c <err_to_errno>
 8018e96:	6178      	str	r0, [r7, #20]
 8018e98:	697b      	ldr	r3, [r7, #20]
 8018e9a:	2b00      	cmp	r3, #0
 8018e9c:	d002      	beq.n	8018ea4 <lwip_send+0xa0>
 8018e9e:	4a07      	ldr	r2, [pc, #28]	@ (8018ebc <lwip_send+0xb8>)
 8018ea0:	697b      	ldr	r3, [r7, #20]
 8018ea2:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  /* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
  return (err == ERR_OK ? (ssize_t)written : -1);
 8018ea4:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8018ea8:	2b00      	cmp	r3, #0
 8018eaa:	d101      	bne.n	8018eb0 <lwip_send+0xac>
 8018eac:	693b      	ldr	r3, [r7, #16]
 8018eae:	e001      	b.n	8018eb4 <lwip_send+0xb0>
 8018eb0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018eb4:	4618      	mov	r0, r3
 8018eb6:	3720      	adds	r7, #32
 8018eb8:	46bd      	mov	sp, r7
 8018eba:	bd80      	pop	{r7, pc}
 8018ebc:	2402b260 	.word	0x2402b260

08018ec0 <lwip_sendto>:
}

ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
            const struct sockaddr *to, socklen_t tolen)
{
 8018ec0:	b580      	push	{r7, lr}
 8018ec2:	b08e      	sub	sp, #56	@ 0x38
 8018ec4:	af00      	add	r7, sp, #0
 8018ec6:	60f8      	str	r0, [r7, #12]
 8018ec8:	60b9      	str	r1, [r7, #8]
 8018eca:	607a      	str	r2, [r7, #4]
 8018ecc:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t short_size;
  u16_t remote_port;
  struct netbuf buf;

  sock = get_socket(s);
 8018ece:	68f8      	ldr	r0, [r7, #12]
 8018ed0:	f7ff fab2 	bl	8018438 <get_socket>
 8018ed4:	6338      	str	r0, [r7, #48]	@ 0x30
  if (!sock) {
 8018ed6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018ed8:	2b00      	cmp	r3, #0
 8018eda:	d102      	bne.n	8018ee2 <lwip_sendto+0x22>
    return -1;
 8018edc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018ee0:	e093      	b.n	801900a <lwip_sendto+0x14a>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018ee2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018ee4:	681b      	ldr	r3, [r3, #0]
 8018ee6:	781b      	ldrb	r3, [r3, #0]
 8018ee8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018eec:	2b10      	cmp	r3, #16
 8018eee:	d107      	bne.n	8018f00 <lwip_sendto+0x40>
#if LWIP_TCP
    done_socket(sock);
    return lwip_send(s, data, size, flags);
 8018ef0:	683b      	ldr	r3, [r7, #0]
 8018ef2:	687a      	ldr	r2, [r7, #4]
 8018ef4:	68b9      	ldr	r1, [r7, #8]
 8018ef6:	68f8      	ldr	r0, [r7, #12]
 8018ef8:	f7ff ff84 	bl	8018e04 <lwip_send>
 8018efc:	4603      	mov	r3, r0
 8018efe:	e084      	b.n	801900a <lwip_sendto+0x14a>
    done_socket(sock);
    return -1;
#endif /* LWIP_TCP */
  }

  if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
 8018f00:	687b      	ldr	r3, [r7, #4]
 8018f02:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8018f06:	d30a      	bcc.n	8018f1e <lwip_sendto+0x5e>
    /* cannot fit into one datagram (at least for us) */
    sock_set_errno(sock, EMSGSIZE);
 8018f08:	235a      	movs	r3, #90	@ 0x5a
 8018f0a:	623b      	str	r3, [r7, #32]
 8018f0c:	6a3b      	ldr	r3, [r7, #32]
 8018f0e:	2b00      	cmp	r3, #0
 8018f10:	d002      	beq.n	8018f18 <lwip_sendto+0x58>
 8018f12:	4a40      	ldr	r2, [pc, #256]	@ (8019014 <lwip_sendto+0x154>)
 8018f14:	6a3b      	ldr	r3, [r7, #32]
 8018f16:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018f18:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018f1c:	e075      	b.n	801900a <lwip_sendto+0x14a>
  }
  short_size = (u16_t)size;
 8018f1e:	687b      	ldr	r3, [r7, #4]
 8018f20:	85fb      	strh	r3, [r7, #46]	@ 0x2e
  LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
 8018f22:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f24:	2b00      	cmp	r3, #0
 8018f26:	d102      	bne.n	8018f2e <lwip_sendto+0x6e>
 8018f28:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018f2a:	2b00      	cmp	r3, #0
 8018f2c:	d023      	beq.n	8018f76 <lwip_sendto+0xb6>
 8018f2e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018f30:	2b10      	cmp	r3, #16
 8018f32:	d10b      	bne.n	8018f4c <lwip_sendto+0x8c>
 8018f34:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f36:	2b00      	cmp	r3, #0
 8018f38:	d008      	beq.n	8018f4c <lwip_sendto+0x8c>
 8018f3a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f3c:	785b      	ldrb	r3, [r3, #1]
 8018f3e:	2b02      	cmp	r3, #2
 8018f40:	d104      	bne.n	8018f4c <lwip_sendto+0x8c>
 8018f42:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f44:	f003 0303 	and.w	r3, r3, #3
 8018f48:	2b00      	cmp	r3, #0
 8018f4a:	d014      	beq.n	8018f76 <lwip_sendto+0xb6>
 8018f4c:	4b32      	ldr	r3, [pc, #200]	@ (8019018 <lwip_sendto+0x158>)
 8018f4e:	f240 6252 	movw	r2, #1618	@ 0x652
 8018f52:	4932      	ldr	r1, [pc, #200]	@ (801901c <lwip_sendto+0x15c>)
 8018f54:	4832      	ldr	r0, [pc, #200]	@ (8019020 <lwip_sendto+0x160>)
 8018f56:	f011 fc01 	bl	802a75c <iprintf>
 8018f5a:	f06f 000f 	mvn.w	r0, #15
 8018f5e:	f7ff f97d 	bl	801825c <err_to_errno>
 8018f62:	62b8      	str	r0, [r7, #40]	@ 0x28
 8018f64:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018f66:	2b00      	cmp	r3, #0
 8018f68:	d002      	beq.n	8018f70 <lwip_sendto+0xb0>
 8018f6a:	4a2a      	ldr	r2, [pc, #168]	@ (8019014 <lwip_sendto+0x154>)
 8018f6c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018f6e:	6013      	str	r3, [r2, #0]
 8018f70:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018f74:	e049      	b.n	801900a <lwip_sendto+0x14a>
              ((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
             sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
  LWIP_UNUSED_ARG(tolen);

  /* initialize a buffer */
  buf.p = buf.ptr = NULL;
 8018f76:	2300      	movs	r3, #0
 8018f78:	617b      	str	r3, [r7, #20]
 8018f7a:	697b      	ldr	r3, [r7, #20]
 8018f7c:	613b      	str	r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
  buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
  if (to) {
 8018f7e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f80:	2b00      	cmp	r3, #0
 8018f82:	d00a      	beq.n	8018f9a <lwip_sendto+0xda>
    SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
 8018f84:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f86:	685b      	ldr	r3, [r3, #4]
 8018f88:	61bb      	str	r3, [r7, #24]
 8018f8a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8018f8c:	885b      	ldrh	r3, [r3, #2]
 8018f8e:	4618      	mov	r0, r3
 8018f90:	f000 fc8a 	bl	80198a8 <lwip_htons>
 8018f94:	4603      	mov	r3, r0
 8018f96:	86fb      	strh	r3, [r7, #54]	@ 0x36
 8018f98:	e003      	b.n	8018fa2 <lwip_sendto+0xe2>
  } else {
    remote_port = 0;
 8018f9a:	2300      	movs	r3, #0
 8018f9c:	86fb      	strh	r3, [r7, #54]	@ 0x36
    ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
 8018f9e:	2300      	movs	r3, #0
 8018fa0:	61bb      	str	r3, [r7, #24]
  }
  netbuf_fromport(&buf) = remote_port;
 8018fa2:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 8018fa4:	83bb      	strh	r3, [r7, #28]
      MEMCPY(buf.p->payload, data, short_size);
    }
    err = ERR_OK;
  }
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  err = netbuf_ref(&buf, data, short_size);
 8018fa6:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018fa8:	f107 0310 	add.w	r3, r7, #16
 8018fac:	68b9      	ldr	r1, [r7, #8]
 8018fae:	4618      	mov	r0, r3
 8018fb0:	f7ff f9ba 	bl	8018328 <netbuf_ref>
 8018fb4:	4603      	mov	r3, r0
 8018fb6:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (err == ERR_OK) {
 8018fba:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018fbe:	2b00      	cmp	r3, #0
 8018fc0:	d10a      	bne.n	8018fd8 <lwip_sendto+0x118>
      IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    /* send the data */
    err = netconn_send(sock->conn, &buf);
 8018fc2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8018fc4:	681b      	ldr	r3, [r3, #0]
 8018fc6:	f107 0210 	add.w	r2, r7, #16
 8018fca:	4611      	mov	r1, r2
 8018fcc:	4618      	mov	r0, r3
 8018fce:	f7fd fb31 	bl	8016634 <netconn_send>
 8018fd2:	4603      	mov	r3, r0
 8018fd4:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
  }

  /* deallocated the buffer */
  netbuf_free(&buf);
 8018fd8:	f107 0310 	add.w	r3, r7, #16
 8018fdc:	4618      	mov	r0, r3
 8018fde:	f7ff f97b 	bl	80182d8 <netbuf_free>

  sock_set_errno(sock, err_to_errno(err));
 8018fe2:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018fe6:	4618      	mov	r0, r3
 8018fe8:	f7ff f938 	bl	801825c <err_to_errno>
 8018fec:	6278      	str	r0, [r7, #36]	@ 0x24
 8018fee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ff0:	2b00      	cmp	r3, #0
 8018ff2:	d002      	beq.n	8018ffa <lwip_sendto+0x13a>
 8018ff4:	4a07      	ldr	r2, [pc, #28]	@ (8019014 <lwip_sendto+0x154>)
 8018ff6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ff8:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return (err == ERR_OK ? short_size : -1);
 8018ffa:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 8018ffe:	2b00      	cmp	r3, #0
 8019000:	d101      	bne.n	8019006 <lwip_sendto+0x146>
 8019002:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8019004:	e001      	b.n	801900a <lwip_sendto+0x14a>
 8019006:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801900a:	4618      	mov	r0, r3
 801900c:	3738      	adds	r7, #56	@ 0x38
 801900e:	46bd      	mov	sp, r7
 8019010:	bd80      	pop	{r7, pc}
 8019012:	bf00      	nop
 8019014:	2402b260 	.word	0x2402b260
 8019018:	0802e4b0 	.word	0x0802e4b0
 801901c:	0802e790 	.word	0x0802e790
 8019020:	0802e504 	.word	0x0802e504

08019024 <lwip_socket>:

int
lwip_socket(int domain, int type, int protocol)
{
 8019024:	b580      	push	{r7, lr}
 8019026:	b086      	sub	sp, #24
 8019028:	af00      	add	r7, sp, #0
 801902a:	60f8      	str	r0, [r7, #12]
 801902c:	60b9      	str	r1, [r7, #8]
 801902e:	607a      	str	r2, [r7, #4]
  int i;

  LWIP_UNUSED_ARG(domain); /* @todo: check this */

  /* create a netconn */
  switch (type) {
 8019030:	68bb      	ldr	r3, [r7, #8]
 8019032:	2b03      	cmp	r3, #3
 8019034:	d009      	beq.n	801904a <lwip_socket+0x26>
 8019036:	68bb      	ldr	r3, [r7, #8]
 8019038:	2b03      	cmp	r3, #3
 801903a:	dc23      	bgt.n	8019084 <lwip_socket+0x60>
 801903c:	68bb      	ldr	r3, [r7, #8]
 801903e:	2b01      	cmp	r3, #1
 8019040:	d019      	beq.n	8019076 <lwip_socket+0x52>
 8019042:	68bb      	ldr	r3, [r7, #8]
 8019044:	2b02      	cmp	r3, #2
 8019046:	d009      	beq.n	801905c <lwip_socket+0x38>
 8019048:	e01c      	b.n	8019084 <lwip_socket+0x60>
    case SOCK_RAW:
      conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
 801904a:	687b      	ldr	r3, [r7, #4]
 801904c:	b2db      	uxtb	r3, r3
 801904e:	4a22      	ldr	r2, [pc, #136]	@ (80190d8 <lwip_socket+0xb4>)
 8019050:	4619      	mov	r1, r3
 8019052:	2040      	movs	r0, #64	@ 0x40
 8019054:	f7fc ff60 	bl	8015f18 <netconn_new_with_proto_and_callback>
 8019058:	6178      	str	r0, [r7, #20]
             (u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 801905a:	e019      	b.n	8019090 <lwip_socket+0x6c>
    case SOCK_DGRAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
 801905c:	687b      	ldr	r3, [r7, #4]
 801905e:	2b88      	cmp	r3, #136	@ 0x88
 8019060:	d101      	bne.n	8019066 <lwip_socket+0x42>
 8019062:	2321      	movs	r3, #33	@ 0x21
 8019064:	e000      	b.n	8019068 <lwip_socket+0x44>
 8019066:	2320      	movs	r3, #32
 8019068:	4a1b      	ldr	r2, [pc, #108]	@ (80190d8 <lwip_socket+0xb4>)
 801906a:	2100      	movs	r1, #0
 801906c:	4618      	mov	r0, r3
 801906e:	f7fc ff53 	bl	8015f18 <netconn_new_with_proto_and_callback>
 8019072:	6178      	str	r0, [r7, #20]
      if (conn) {
        /* netconn layer enables pktinfo by default, sockets default to off */
        conn->flags &= ~NETCONN_FLAG_PKTINFO;
      }
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8019074:	e00c      	b.n	8019090 <lwip_socket+0x6c>
    case SOCK_STREAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
 8019076:	4a18      	ldr	r2, [pc, #96]	@ (80190d8 <lwip_socket+0xb4>)
 8019078:	2100      	movs	r1, #0
 801907a:	2010      	movs	r0, #16
 801907c:	f7fc ff4c 	bl	8015f18 <netconn_new_with_proto_and_callback>
 8019080:	6178      	str	r0, [r7, #20]
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8019082:	e005      	b.n	8019090 <lwip_socket+0x6c>
    default:
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
                                  domain, type, protocol));
      set_errno(EINVAL);
 8019084:	4b15      	ldr	r3, [pc, #84]	@ (80190dc <lwip_socket+0xb8>)
 8019086:	2216      	movs	r2, #22
 8019088:	601a      	str	r2, [r3, #0]
      return -1;
 801908a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801908e:	e01e      	b.n	80190ce <lwip_socket+0xaa>
  }

  if (!conn) {
 8019090:	697b      	ldr	r3, [r7, #20]
 8019092:	2b00      	cmp	r3, #0
 8019094:	d105      	bne.n	80190a2 <lwip_socket+0x7e>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
    set_errno(ENOBUFS);
 8019096:	4b11      	ldr	r3, [pc, #68]	@ (80190dc <lwip_socket+0xb8>)
 8019098:	2269      	movs	r2, #105	@ 0x69
 801909a:	601a      	str	r2, [r3, #0]
    return -1;
 801909c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80190a0:	e015      	b.n	80190ce <lwip_socket+0xaa>
  }

  i = alloc_socket(conn, 0);
 80190a2:	2100      	movs	r1, #0
 80190a4:	6978      	ldr	r0, [r7, #20]
 80190a6:	f7ff f9df 	bl	8018468 <alloc_socket>
 80190aa:	6138      	str	r0, [r7, #16]

  if (i == -1) {
 80190ac:	693b      	ldr	r3, [r7, #16]
 80190ae:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80190b2:	d108      	bne.n	80190c6 <lwip_socket+0xa2>
    netconn_delete(conn);
 80190b4:	6978      	ldr	r0, [r7, #20]
 80190b6:	f7fc ffcd 	bl	8016054 <netconn_delete>
    set_errno(ENFILE);
 80190ba:	4b08      	ldr	r3, [pc, #32]	@ (80190dc <lwip_socket+0xb8>)
 80190bc:	2217      	movs	r2, #23
 80190be:	601a      	str	r2, [r3, #0]
    return -1;
 80190c0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80190c4:	e003      	b.n	80190ce <lwip_socket+0xaa>
  }
  conn->socket = i;
 80190c6:	697b      	ldr	r3, [r7, #20]
 80190c8:	693a      	ldr	r2, [r7, #16]
 80190ca:	619a      	str	r2, [r3, #24]
  done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
  LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
  set_errno(0);
  return i;
 80190cc:	693b      	ldr	r3, [r7, #16]
}
 80190ce:	4618      	mov	r0, r3
 80190d0:	3718      	adds	r7, #24
 80190d2:	46bd      	mov	sp, r7
 80190d4:	bd80      	pop	{r7, pc}
 80190d6:	bf00      	nop
 80190d8:	08019169 	.word	0x08019169
 80190dc:	2402b260 	.word	0x2402b260

080190e0 <lwip_poll_should_wake>:
 * Check whether event_callback should wake up a thread waiting in
 * lwip_poll.
 */
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
 80190e0:	b480      	push	{r7}
 80190e2:	b087      	sub	sp, #28
 80190e4:	af00      	add	r7, sp, #0
 80190e6:	60f8      	str	r0, [r7, #12]
 80190e8:	60b9      	str	r1, [r7, #8]
 80190ea:	607a      	str	r2, [r7, #4]
 80190ec:	603b      	str	r3, [r7, #0]
  nfds_t fdi;
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 80190ee:	2300      	movs	r3, #0
 80190f0:	617b      	str	r3, [r7, #20]
 80190f2:	e02c      	b.n	801914e <lwip_poll_should_wake+0x6e>
    const struct pollfd *pollfd = &scb->poll_fds[fdi];
 80190f4:	68fb      	ldr	r3, [r7, #12]
 80190f6:	695a      	ldr	r2, [r3, #20]
 80190f8:	697b      	ldr	r3, [r7, #20]
 80190fa:	00db      	lsls	r3, r3, #3
 80190fc:	4413      	add	r3, r2
 80190fe:	613b      	str	r3, [r7, #16]
    if (pollfd->fd == fd) {
 8019100:	693b      	ldr	r3, [r7, #16]
 8019102:	681b      	ldr	r3, [r3, #0]
 8019104:	68ba      	ldr	r2, [r7, #8]
 8019106:	429a      	cmp	r2, r3
 8019108:	d11e      	bne.n	8019148 <lwip_poll_should_wake+0x68>
      /* Do not update pollfd->revents right here;
         that would be a data race because lwip_pollscan
         accesses revents without protecting. */
      if (has_recvevent && (pollfd->events & POLLIN) != 0) {
 801910a:	687b      	ldr	r3, [r7, #4]
 801910c:	2b00      	cmp	r3, #0
 801910e:	d009      	beq.n	8019124 <lwip_poll_should_wake+0x44>
 8019110:	693b      	ldr	r3, [r7, #16]
 8019112:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8019116:	b29b      	uxth	r3, r3
 8019118:	f003 0301 	and.w	r3, r3, #1
 801911c:	2b00      	cmp	r3, #0
 801911e:	d001      	beq.n	8019124 <lwip_poll_should_wake+0x44>
        return 1;
 8019120:	2301      	movs	r3, #1
 8019122:	e01a      	b.n	801915a <lwip_poll_should_wake+0x7a>
      }
      if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
 8019124:	683b      	ldr	r3, [r7, #0]
 8019126:	2b00      	cmp	r3, #0
 8019128:	d009      	beq.n	801913e <lwip_poll_should_wake+0x5e>
 801912a:	693b      	ldr	r3, [r7, #16]
 801912c:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8019130:	b29b      	uxth	r3, r3
 8019132:	f003 0302 	and.w	r3, r3, #2
 8019136:	2b00      	cmp	r3, #0
 8019138:	d001      	beq.n	801913e <lwip_poll_should_wake+0x5e>
        return 1;
 801913a:	2301      	movs	r3, #1
 801913c:	e00d      	b.n	801915a <lwip_poll_should_wake+0x7a>
      }
      if (has_errevent) {
 801913e:	6a3b      	ldr	r3, [r7, #32]
 8019140:	2b00      	cmp	r3, #0
 8019142:	d001      	beq.n	8019148 <lwip_poll_should_wake+0x68>
        /* POLLERR is output only. */
        return 1;
 8019144:	2301      	movs	r3, #1
 8019146:	e008      	b.n	801915a <lwip_poll_should_wake+0x7a>
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8019148:	697b      	ldr	r3, [r7, #20]
 801914a:	3301      	adds	r3, #1
 801914c:	617b      	str	r3, [r7, #20]
 801914e:	68fb      	ldr	r3, [r7, #12]
 8019150:	699b      	ldr	r3, [r3, #24]
 8019152:	697a      	ldr	r2, [r7, #20]
 8019154:	429a      	cmp	r2, r3
 8019156:	d3cd      	bcc.n	80190f4 <lwip_poll_should_wake+0x14>
      }
    }
  }
  return 0;
 8019158:	2300      	movs	r3, #0
}
 801915a:	4618      	mov	r0, r3
 801915c:	371c      	adds	r7, #28
 801915e:	46bd      	mov	sp, r7
 8019160:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019164:	4770      	bx	lr
	...

08019168 <event_callback>:
 *   NETCONN_EVT_ERROR
 * This requirement will be asserted in select_check_waiters()
 */
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
 8019168:	b580      	push	{r7, lr}
 801916a:	b08a      	sub	sp, #40	@ 0x28
 801916c:	af00      	add	r7, sp, #0
 801916e:	6078      	str	r0, [r7, #4]
 8019170:	460b      	mov	r3, r1
 8019172:	70fb      	strb	r3, [r7, #3]
 8019174:	4613      	mov	r3, r2
 8019176:	803b      	strh	r3, [r7, #0]
  SYS_ARCH_DECL_PROTECT(lev);

  LWIP_UNUSED_ARG(len);

  /* Get socket */
  if (conn) {
 8019178:	687b      	ldr	r3, [r7, #4]
 801917a:	2b00      	cmp	r3, #0
 801917c:	f000 80a4 	beq.w	80192c8 <event_callback+0x160>
    s = conn->socket;
 8019180:	687b      	ldr	r3, [r7, #4]
 8019182:	699b      	ldr	r3, [r3, #24]
 8019184:	627b      	str	r3, [r7, #36]	@ 0x24
    if (s < 0) {
 8019186:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019188:	2b00      	cmp	r3, #0
 801918a:	da18      	bge.n	80191be <event_callback+0x56>
      /* Data comes in right away after an accept, even though
       * the server task might not have created a new socket yet.
       * Just count down (or up) if that's the case and we
       * will use the data later. Note that only receive events
       * can happen before the new socket is set up. */
      SYS_ARCH_PROTECT(lev);
 801918c:	f00e f850 	bl	8027230 <sys_arch_protect>
 8019190:	61f8      	str	r0, [r7, #28]
      if (conn->socket < 0) {
 8019192:	687b      	ldr	r3, [r7, #4]
 8019194:	699b      	ldr	r3, [r3, #24]
 8019196:	2b00      	cmp	r3, #0
 8019198:	da0b      	bge.n	80191b2 <event_callback+0x4a>
        if (evt == NETCONN_EVT_RCVPLUS) {
 801919a:	78fb      	ldrb	r3, [r7, #3]
 801919c:	2b00      	cmp	r3, #0
 801919e:	d104      	bne.n	80191aa <event_callback+0x42>
          /* conn->socket is -1 on initialization
             lwip_accept adjusts sock->recvevent if conn->socket < -1 */
          conn->socket--;
 80191a0:	687b      	ldr	r3, [r7, #4]
 80191a2:	699b      	ldr	r3, [r3, #24]
 80191a4:	1e5a      	subs	r2, r3, #1
 80191a6:	687b      	ldr	r3, [r7, #4]
 80191a8:	619a      	str	r2, [r3, #24]
        }
        SYS_ARCH_UNPROTECT(lev);
 80191aa:	69f8      	ldr	r0, [r7, #28]
 80191ac:	f00e f84e 	bl	802724c <sys_arch_unprotect>
        return;
 80191b0:	e08d      	b.n	80192ce <event_callback+0x166>
      }
      s = conn->socket;
 80191b2:	687b      	ldr	r3, [r7, #4]
 80191b4:	699b      	ldr	r3, [r3, #24]
 80191b6:	627b      	str	r3, [r7, #36]	@ 0x24
      SYS_ARCH_UNPROTECT(lev);
 80191b8:	69f8      	ldr	r0, [r7, #28]
 80191ba:	f00e f847 	bl	802724c <sys_arch_unprotect>
    }

    sock = get_socket(s);
 80191be:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80191c0:	f7ff f93a 	bl	8018438 <get_socket>
 80191c4:	61b8      	str	r0, [r7, #24]
    if (!sock) {
 80191c6:	69bb      	ldr	r3, [r7, #24]
 80191c8:	2b00      	cmp	r3, #0
 80191ca:	d07f      	beq.n	80192cc <event_callback+0x164>
    }
  } else {
    return;
  }

  check_waiters = 1;
 80191cc:	2301      	movs	r3, #1
 80191ce:	623b      	str	r3, [r7, #32]
  SYS_ARCH_PROTECT(lev);
 80191d0:	f00e f82e 	bl	8027230 <sys_arch_protect>
 80191d4:	61f8      	str	r0, [r7, #28]
  /* Set event as required */
  switch (evt) {
 80191d6:	78fb      	ldrb	r3, [r7, #3]
 80191d8:	2b04      	cmp	r3, #4
 80191da:	d83e      	bhi.n	801925a <event_callback+0xf2>
 80191dc:	a201      	add	r2, pc, #4	@ (adr r2, 80191e4 <event_callback+0x7c>)
 80191de:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80191e2:	bf00      	nop
 80191e4:	080191f9 	.word	0x080191f9
 80191e8:	0801921b 	.word	0x0801921b
 80191ec:	08019233 	.word	0x08019233
 80191f0:	08019247 	.word	0x08019247
 80191f4:	08019253 	.word	0x08019253
    case NETCONN_EVT_RCVPLUS:
      sock->rcvevent++;
 80191f8:	69bb      	ldr	r3, [r7, #24]
 80191fa:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 80191fe:	b29b      	uxth	r3, r3
 8019200:	3301      	adds	r3, #1
 8019202:	b29b      	uxth	r3, r3
 8019204:	b21a      	sxth	r2, r3
 8019206:	69bb      	ldr	r3, [r7, #24]
 8019208:	811a      	strh	r2, [r3, #8]
      if (sock->rcvevent > 1) {
 801920a:	69bb      	ldr	r3, [r7, #24]
 801920c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019210:	2b01      	cmp	r3, #1
 8019212:	dd2a      	ble.n	801926a <event_callback+0x102>
        check_waiters = 0;
 8019214:	2300      	movs	r3, #0
 8019216:	623b      	str	r3, [r7, #32]
      }
      break;
 8019218:	e027      	b.n	801926a <event_callback+0x102>
    case NETCONN_EVT_RCVMINUS:
      sock->rcvevent--;
 801921a:	69bb      	ldr	r3, [r7, #24]
 801921c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019220:	b29b      	uxth	r3, r3
 8019222:	3b01      	subs	r3, #1
 8019224:	b29b      	uxth	r3, r3
 8019226:	b21a      	sxth	r2, r3
 8019228:	69bb      	ldr	r3, [r7, #24]
 801922a:	811a      	strh	r2, [r3, #8]
      check_waiters = 0;
 801922c:	2300      	movs	r3, #0
 801922e:	623b      	str	r3, [r7, #32]
      break;
 8019230:	e01c      	b.n	801926c <event_callback+0x104>
    case NETCONN_EVT_SENDPLUS:
      if (sock->sendevent) {
 8019232:	69bb      	ldr	r3, [r7, #24]
 8019234:	895b      	ldrh	r3, [r3, #10]
 8019236:	2b00      	cmp	r3, #0
 8019238:	d001      	beq.n	801923e <event_callback+0xd6>
        check_waiters = 0;
 801923a:	2300      	movs	r3, #0
 801923c:	623b      	str	r3, [r7, #32]
      }
      sock->sendevent = 1;
 801923e:	69bb      	ldr	r3, [r7, #24]
 8019240:	2201      	movs	r2, #1
 8019242:	815a      	strh	r2, [r3, #10]
      break;
 8019244:	e012      	b.n	801926c <event_callback+0x104>
    case NETCONN_EVT_SENDMINUS:
      sock->sendevent = 0;
 8019246:	69bb      	ldr	r3, [r7, #24]
 8019248:	2200      	movs	r2, #0
 801924a:	815a      	strh	r2, [r3, #10]
      check_waiters = 0;
 801924c:	2300      	movs	r3, #0
 801924e:	623b      	str	r3, [r7, #32]
      break;
 8019250:	e00c      	b.n	801926c <event_callback+0x104>
    case NETCONN_EVT_ERROR:
      sock->errevent = 1;
 8019252:	69bb      	ldr	r3, [r7, #24]
 8019254:	2201      	movs	r2, #1
 8019256:	819a      	strh	r2, [r3, #12]
      break;
 8019258:	e008      	b.n	801926c <event_callback+0x104>
    default:
      LWIP_ASSERT("unknown event", 0);
 801925a:	4b1e      	ldr	r3, [pc, #120]	@ (80192d4 <event_callback+0x16c>)
 801925c:	f44f 621f 	mov.w	r2, #2544	@ 0x9f0
 8019260:	491d      	ldr	r1, [pc, #116]	@ (80192d8 <event_callback+0x170>)
 8019262:	481e      	ldr	r0, [pc, #120]	@ (80192dc <event_callback+0x174>)
 8019264:	f011 fa7a 	bl	802a75c <iprintf>
      break;
 8019268:	e000      	b.n	801926c <event_callback+0x104>
      break;
 801926a:	bf00      	nop
  }

  if (sock->select_waiting && check_waiters) {
 801926c:	69bb      	ldr	r3, [r7, #24]
 801926e:	7b9b      	ldrb	r3, [r3, #14]
 8019270:	2b00      	cmp	r3, #0
 8019272:	d025      	beq.n	80192c0 <event_callback+0x158>
 8019274:	6a3b      	ldr	r3, [r7, #32]
 8019276:	2b00      	cmp	r3, #0
 8019278:	d022      	beq.n	80192c0 <event_callback+0x158>
    /* Save which events are active */
    int has_recvevent, has_sendevent, has_errevent;
    has_recvevent = sock->rcvevent > 0;
 801927a:	69bb      	ldr	r3, [r7, #24]
 801927c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019280:	2b00      	cmp	r3, #0
 8019282:	bfcc      	ite	gt
 8019284:	2301      	movgt	r3, #1
 8019286:	2300      	movle	r3, #0
 8019288:	b2db      	uxtb	r3, r3
 801928a:	617b      	str	r3, [r7, #20]
    has_sendevent = sock->sendevent != 0;
 801928c:	69bb      	ldr	r3, [r7, #24]
 801928e:	895b      	ldrh	r3, [r3, #10]
 8019290:	2b00      	cmp	r3, #0
 8019292:	bf14      	ite	ne
 8019294:	2301      	movne	r3, #1
 8019296:	2300      	moveq	r3, #0
 8019298:	b2db      	uxtb	r3, r3
 801929a:	613b      	str	r3, [r7, #16]
    has_errevent = sock->errevent != 0;
 801929c:	69bb      	ldr	r3, [r7, #24]
 801929e:	899b      	ldrh	r3, [r3, #12]
 80192a0:	2b00      	cmp	r3, #0
 80192a2:	bf14      	ite	ne
 80192a4:	2301      	movne	r3, #1
 80192a6:	2300      	moveq	r3, #0
 80192a8:	b2db      	uxtb	r3, r3
 80192aa:	60fb      	str	r3, [r7, #12]
    SYS_ARCH_UNPROTECT(lev);
 80192ac:	69f8      	ldr	r0, [r7, #28]
 80192ae:	f00d ffcd 	bl	802724c <sys_arch_unprotect>
    /* Check any select calls waiting on this socket */
    select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
 80192b2:	68fb      	ldr	r3, [r7, #12]
 80192b4:	693a      	ldr	r2, [r7, #16]
 80192b6:	6979      	ldr	r1, [r7, #20]
 80192b8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80192ba:	f000 f811 	bl	80192e0 <select_check_waiters>
  if (sock->select_waiting && check_waiters) {
 80192be:	e006      	b.n	80192ce <event_callback+0x166>
  } else {
    SYS_ARCH_UNPROTECT(lev);
 80192c0:	69f8      	ldr	r0, [r7, #28]
 80192c2:	f00d ffc3 	bl	802724c <sys_arch_unprotect>
 80192c6:	e002      	b.n	80192ce <event_callback+0x166>
    return;
 80192c8:	bf00      	nop
 80192ca:	e000      	b.n	80192ce <event_callback+0x166>
      return;
 80192cc:	bf00      	nop
  }
  done_socket(sock);
}
 80192ce:	3728      	adds	r7, #40	@ 0x28
 80192d0:	46bd      	mov	sp, r7
 80192d2:	bd80      	pop	{r7, pc}
 80192d4:	0802e4b0 	.word	0x0802e4b0
 80192d8:	0802e82c 	.word	0x0802e82c
 80192dc:	0802e504 	.word	0x0802e504

080192e0 <select_check_waiters>:
 * of the loop, thus creating a possibility where a thread could modify the
 * select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
 * detect this change and restart the list walk. The list is expected to be small
 */
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
 80192e0:	b580      	push	{r7, lr}
 80192e2:	b088      	sub	sp, #32
 80192e4:	af02      	add	r7, sp, #8
 80192e6:	60f8      	str	r0, [r7, #12]
 80192e8:	60b9      	str	r1, [r7, #8]
 80192ea:	607a      	str	r2, [r7, #4]
 80192ec:	603b      	str	r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
  int last_select_cb_ctr;
  SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */

  LWIP_ASSERT_CORE_LOCKED();
 80192ee:	f7f7 fe07 	bl	8010f00 <sys_check_core_locking>
  SYS_ARCH_PROTECT(lev);
again:
  /* remember the state of select_cb_list to detect changes */
  last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 80192f2:	4b42      	ldr	r3, [pc, #264]	@ (80193fc <select_check_waiters+0x11c>)
 80192f4:	681b      	ldr	r3, [r3, #0]
 80192f6:	617b      	str	r3, [r7, #20]
 80192f8:	e078      	b.n	80193ec <select_check_waiters+0x10c>
    if (scb->sem_signalled == 0) {
 80192fa:	697b      	ldr	r3, [r7, #20]
 80192fc:	69db      	ldr	r3, [r3, #28]
 80192fe:	2b00      	cmp	r3, #0
 8019300:	d171      	bne.n	80193e6 <select_check_waiters+0x106>
      /* semaphore not signalled yet */
      int do_signal = 0;
 8019302:	2300      	movs	r3, #0
 8019304:	613b      	str	r3, [r7, #16]
#if LWIP_SOCKET_POLL
      if (scb->poll_fds != NULL) {
 8019306:	697b      	ldr	r3, [r7, #20]
 8019308:	695b      	ldr	r3, [r3, #20]
 801930a:	2b00      	cmp	r3, #0
 801930c:	d009      	beq.n	8019322 <select_check_waiters+0x42>
        do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
 801930e:	683b      	ldr	r3, [r7, #0]
 8019310:	9300      	str	r3, [sp, #0]
 8019312:	687b      	ldr	r3, [r7, #4]
 8019314:	68ba      	ldr	r2, [r7, #8]
 8019316:	68f9      	ldr	r1, [r7, #12]
 8019318:	6978      	ldr	r0, [r7, #20]
 801931a:	f7ff fee1 	bl	80190e0 <lwip_poll_should_wake>
 801931e:	6138      	str	r0, [r7, #16]
 8019320:	e056      	b.n	80193d0 <select_check_waiters+0xf0>
      else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
      {
        /* Test this select call for our socket */
        if (has_recvevent) {
 8019322:	68bb      	ldr	r3, [r7, #8]
 8019324:	2b00      	cmp	r3, #0
 8019326:	d017      	beq.n	8019358 <select_check_waiters+0x78>
          if (scb->readset && FD_ISSET(s, scb->readset)) {
 8019328:	697b      	ldr	r3, [r7, #20]
 801932a:	689b      	ldr	r3, [r3, #8]
 801932c:	2b00      	cmp	r3, #0
 801932e:	d013      	beq.n	8019358 <select_check_waiters+0x78>
 8019330:	697b      	ldr	r3, [r7, #20]
 8019332:	689a      	ldr	r2, [r3, #8]
 8019334:	68fb      	ldr	r3, [r7, #12]
 8019336:	2b00      	cmp	r3, #0
 8019338:	da00      	bge.n	801933c <select_check_waiters+0x5c>
 801933a:	331f      	adds	r3, #31
 801933c:	115b      	asrs	r3, r3, #5
 801933e:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8019342:	68fb      	ldr	r3, [r7, #12]
 8019344:	f003 031f 	and.w	r3, r3, #31
 8019348:	fa22 f303 	lsr.w	r3, r2, r3
 801934c:	f003 0301 	and.w	r3, r3, #1
 8019350:	2b00      	cmp	r3, #0
 8019352:	d001      	beq.n	8019358 <select_check_waiters+0x78>
            do_signal = 1;
 8019354:	2301      	movs	r3, #1
 8019356:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_sendevent) {
 8019358:	687b      	ldr	r3, [r7, #4]
 801935a:	2b00      	cmp	r3, #0
 801935c:	d01a      	beq.n	8019394 <select_check_waiters+0xb4>
          if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
 801935e:	693b      	ldr	r3, [r7, #16]
 8019360:	2b00      	cmp	r3, #0
 8019362:	d117      	bne.n	8019394 <select_check_waiters+0xb4>
 8019364:	697b      	ldr	r3, [r7, #20]
 8019366:	68db      	ldr	r3, [r3, #12]
 8019368:	2b00      	cmp	r3, #0
 801936a:	d013      	beq.n	8019394 <select_check_waiters+0xb4>
 801936c:	697b      	ldr	r3, [r7, #20]
 801936e:	68da      	ldr	r2, [r3, #12]
 8019370:	68fb      	ldr	r3, [r7, #12]
 8019372:	2b00      	cmp	r3, #0
 8019374:	da00      	bge.n	8019378 <select_check_waiters+0x98>
 8019376:	331f      	adds	r3, #31
 8019378:	115b      	asrs	r3, r3, #5
 801937a:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 801937e:	68fb      	ldr	r3, [r7, #12]
 8019380:	f003 031f 	and.w	r3, r3, #31
 8019384:	fa22 f303 	lsr.w	r3, r2, r3
 8019388:	f003 0301 	and.w	r3, r3, #1
 801938c:	2b00      	cmp	r3, #0
 801938e:	d001      	beq.n	8019394 <select_check_waiters+0xb4>
            do_signal = 1;
 8019390:	2301      	movs	r3, #1
 8019392:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_errevent) {
 8019394:	683b      	ldr	r3, [r7, #0]
 8019396:	2b00      	cmp	r3, #0
 8019398:	d01a      	beq.n	80193d0 <select_check_waiters+0xf0>
          if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
 801939a:	693b      	ldr	r3, [r7, #16]
 801939c:	2b00      	cmp	r3, #0
 801939e:	d117      	bne.n	80193d0 <select_check_waiters+0xf0>
 80193a0:	697b      	ldr	r3, [r7, #20]
 80193a2:	691b      	ldr	r3, [r3, #16]
 80193a4:	2b00      	cmp	r3, #0
 80193a6:	d013      	beq.n	80193d0 <select_check_waiters+0xf0>
 80193a8:	697b      	ldr	r3, [r7, #20]
 80193aa:	691a      	ldr	r2, [r3, #16]
 80193ac:	68fb      	ldr	r3, [r7, #12]
 80193ae:	2b00      	cmp	r3, #0
 80193b0:	da00      	bge.n	80193b4 <select_check_waiters+0xd4>
 80193b2:	331f      	adds	r3, #31
 80193b4:	115b      	asrs	r3, r3, #5
 80193b6:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80193ba:	68fb      	ldr	r3, [r7, #12]
 80193bc:	f003 031f 	and.w	r3, r3, #31
 80193c0:	fa22 f303 	lsr.w	r3, r2, r3
 80193c4:	f003 0301 	and.w	r3, r3, #1
 80193c8:	2b00      	cmp	r3, #0
 80193ca:	d001      	beq.n	80193d0 <select_check_waiters+0xf0>
            do_signal = 1;
 80193cc:	2301      	movs	r3, #1
 80193ce:	613b      	str	r3, [r7, #16]
          }
        }
      }
#endif /* LWIP_SOCKET_SELECT */
      if (do_signal) {
 80193d0:	693b      	ldr	r3, [r7, #16]
 80193d2:	2b00      	cmp	r3, #0
 80193d4:	d007      	beq.n	80193e6 <select_check_waiters+0x106>
        scb->sem_signalled = 1;
 80193d6:	697b      	ldr	r3, [r7, #20]
 80193d8:	2201      	movs	r2, #1
 80193da:	61da      	str	r2, [r3, #28]
        /* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
           the semaphore, as this might lead to the select thread taking itself off the list,
           invalidating the semaphore. */
        sys_sem_signal(SELECT_SEM_PTR(scb->sem));
 80193dc:	697b      	ldr	r3, [r7, #20]
 80193de:	3320      	adds	r3, #32
 80193e0:	4618      	mov	r0, r3
 80193e2:	f00d fe8f 	bl	8027104 <sys_sem_signal>
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 80193e6:	697b      	ldr	r3, [r7, #20]
 80193e8:	681b      	ldr	r3, [r3, #0]
 80193ea:	617b      	str	r3, [r7, #20]
 80193ec:	697b      	ldr	r3, [r7, #20]
 80193ee:	2b00      	cmp	r3, #0
 80193f0:	d183      	bne.n	80192fa <select_check_waiters+0x1a>
    /* remember the state of select_cb_list to detect changes */
    last_select_cb_ctr = select_cb_ctr;
  }
  SYS_ARCH_UNPROTECT(lev);
#endif
}
 80193f2:	bf00      	nop
 80193f4:	bf00      	nop
 80193f6:	3718      	adds	r7, #24
 80193f8:	46bd      	mov	sp, r7
 80193fa:	bd80      	pop	{r7, pc}
 80193fc:	24024404 	.word	0x24024404

08019400 <lwip_ioctl>:
  return err;
}

int
lwip_ioctl(int s, long cmd, void *argp)
{
 8019400:	b580      	push	{r7, lr}
 8019402:	b08c      	sub	sp, #48	@ 0x30
 8019404:	af00      	add	r7, sp, #0
 8019406:	60f8      	str	r0, [r7, #12]
 8019408:	60b9      	str	r1, [r7, #8]
 801940a:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock = get_socket(s);
 801940c:	68f8      	ldr	r0, [r7, #12]
 801940e:	f7ff f813 	bl	8018438 <get_socket>
 8019412:	6278      	str	r0, [r7, #36]	@ 0x24
  u8_t val;
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  if (!sock) {
 8019414:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019416:	2b00      	cmp	r3, #0
 8019418:	d102      	bne.n	8019420 <lwip_ioctl+0x20>
    return -1;
 801941a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801941e:	e089      	b.n	8019534 <lwip_ioctl+0x134>
  }

  switch (cmd) {
 8019420:	68bb      	ldr	r3, [r7, #8]
 8019422:	4a46      	ldr	r2, [pc, #280]	@ (801953c <lwip_ioctl+0x13c>)
 8019424:	4293      	cmp	r3, r2
 8019426:	d048      	beq.n	80194ba <lwip_ioctl+0xba>
 8019428:	68bb      	ldr	r3, [r7, #8]
 801942a:	4a45      	ldr	r2, [pc, #276]	@ (8019540 <lwip_ioctl+0x140>)
 801942c:	4293      	cmp	r3, r2
 801942e:	d176      	bne.n	801951e <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
    case FIONREAD:
      if (!argp) {
 8019430:	687b      	ldr	r3, [r7, #4]
 8019432:	2b00      	cmp	r3, #0
 8019434:	d10a      	bne.n	801944c <lwip_ioctl+0x4c>
        sock_set_errno(sock, EINVAL);
 8019436:	2316      	movs	r3, #22
 8019438:	61bb      	str	r3, [r7, #24]
 801943a:	69bb      	ldr	r3, [r7, #24]
 801943c:	2b00      	cmp	r3, #0
 801943e:	d002      	beq.n	8019446 <lwip_ioctl+0x46>
 8019440:	4a40      	ldr	r2, [pc, #256]	@ (8019544 <lwip_ioctl+0x144>)
 8019442:	69bb      	ldr	r3, [r7, #24]
 8019444:	6013      	str	r3, [r2, #0]
        done_socket(sock);
        return -1;
 8019446:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801944a:	e073      	b.n	8019534 <lwip_ioctl+0x134>
      }
#endif /* LWIP_FIONREAD_LINUXMODE */

#if LWIP_SO_RCVBUF
      /* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
      SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
 801944c:	f00d fef0 	bl	8027230 <sys_arch_protect>
 8019450:	6238      	str	r0, [r7, #32]
 8019452:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019454:	681b      	ldr	r3, [r3, #0]
 8019456:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8019458:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801945a:	6a38      	ldr	r0, [r7, #32]
 801945c:	f00d fef6 	bl	802724c <sys_arch_unprotect>
      if (recv_avail < 0) {
 8019460:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8019462:	2b00      	cmp	r3, #0
 8019464:	da01      	bge.n	801946a <lwip_ioctl+0x6a>
        recv_avail = 0;
 8019466:	2300      	movs	r3, #0
 8019468:	62fb      	str	r3, [r7, #44]	@ 0x2c
      }

      /* Check if there is data left from the last recv operation. /maq 041215 */
      if (sock->lastdata.netbuf) {
 801946a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801946c:	685b      	ldr	r3, [r3, #4]
 801946e:	2b00      	cmp	r3, #0
 8019470:	d016      	beq.n	80194a0 <lwip_ioctl+0xa0>
        if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8019472:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019474:	681b      	ldr	r3, [r3, #0]
 8019476:	781b      	ldrb	r3, [r3, #0]
 8019478:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801947c:	2b10      	cmp	r3, #16
 801947e:	d107      	bne.n	8019490 <lwip_ioctl+0x90>
          recv_avail += sock->lastdata.pbuf->tot_len;
 8019480:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019482:	685b      	ldr	r3, [r3, #4]
 8019484:	891b      	ldrh	r3, [r3, #8]
 8019486:	461a      	mov	r2, r3
 8019488:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801948a:	4413      	add	r3, r2
 801948c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801948e:	e007      	b.n	80194a0 <lwip_ioctl+0xa0>
        } else {
          recv_avail += sock->lastdata.netbuf->p->tot_len;
 8019490:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019492:	685b      	ldr	r3, [r3, #4]
 8019494:	681b      	ldr	r3, [r3, #0]
 8019496:	891b      	ldrh	r3, [r3, #8]
 8019498:	461a      	mov	r2, r3
 801949a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801949c:	4413      	add	r3, r2
 801949e:	62fb      	str	r3, [r7, #44]	@ 0x2c
        }
      }
      *((int *)argp) = recv_avail;
 80194a0:	687b      	ldr	r3, [r7, #4]
 80194a2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80194a4:	601a      	str	r2, [r3, #0]

      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
      sock_set_errno(sock, 0);
 80194a6:	2300      	movs	r3, #0
 80194a8:	61fb      	str	r3, [r7, #28]
 80194aa:	69fb      	ldr	r3, [r7, #28]
 80194ac:	2b00      	cmp	r3, #0
 80194ae:	d002      	beq.n	80194b6 <lwip_ioctl+0xb6>
 80194b0:	4a24      	ldr	r2, [pc, #144]	@ (8019544 <lwip_ioctl+0x144>)
 80194b2:	69fb      	ldr	r3, [r7, #28]
 80194b4:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 80194b6:	2300      	movs	r3, #0
 80194b8:	e03c      	b.n	8019534 <lwip_ioctl+0x134>
      break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */

    case (long)FIONBIO:
      val = 0;
 80194ba:	2300      	movs	r3, #0
 80194bc:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      if (argp && *(int *)argp) {
 80194c0:	687b      	ldr	r3, [r7, #4]
 80194c2:	2b00      	cmp	r3, #0
 80194c4:	d006      	beq.n	80194d4 <lwip_ioctl+0xd4>
 80194c6:	687b      	ldr	r3, [r7, #4]
 80194c8:	681b      	ldr	r3, [r3, #0]
 80194ca:	2b00      	cmp	r3, #0
 80194cc:	d002      	beq.n	80194d4 <lwip_ioctl+0xd4>
        val = 1;
 80194ce:	2301      	movs	r3, #1
 80194d0:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      }
      netconn_set_nonblocking(sock->conn, val);
 80194d4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80194d8:	2b00      	cmp	r3, #0
 80194da:	d00b      	beq.n	80194f4 <lwip_ioctl+0xf4>
 80194dc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80194de:	681b      	ldr	r3, [r3, #0]
 80194e0:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80194e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80194e6:	681b      	ldr	r3, [r3, #0]
 80194e8:	f042 0202 	orr.w	r2, r2, #2
 80194ec:	b2d2      	uxtb	r2, r2
 80194ee:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 80194f2:	e00a      	b.n	801950a <lwip_ioctl+0x10a>
 80194f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80194f6:	681b      	ldr	r3, [r3, #0]
 80194f8:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80194fc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80194fe:	681b      	ldr	r3, [r3, #0]
 8019500:	f022 0202 	bic.w	r2, r2, #2
 8019504:	b2d2      	uxtb	r2, r2
 8019506:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
      sock_set_errno(sock, 0);
 801950a:	2300      	movs	r3, #0
 801950c:	617b      	str	r3, [r7, #20]
 801950e:	697b      	ldr	r3, [r7, #20]
 8019510:	2b00      	cmp	r3, #0
 8019512:	d002      	beq.n	801951a <lwip_ioctl+0x11a>
 8019514:	4a0b      	ldr	r2, [pc, #44]	@ (8019544 <lwip_ioctl+0x144>)
 8019516:	697b      	ldr	r3, [r7, #20]
 8019518:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 801951a:	2300      	movs	r3, #0
 801951c:	e00a      	b.n	8019534 <lwip_ioctl+0x134>

    default:
      break;
 801951e:	bf00      	nop
  } /* switch (cmd) */
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
  sock_set_errno(sock, ENOSYS); /* not yet implemented */
 8019520:	2326      	movs	r3, #38	@ 0x26
 8019522:	613b      	str	r3, [r7, #16]
 8019524:	693b      	ldr	r3, [r7, #16]
 8019526:	2b00      	cmp	r3, #0
 8019528:	d002      	beq.n	8019530 <lwip_ioctl+0x130>
 801952a:	4a06      	ldr	r2, [pc, #24]	@ (8019544 <lwip_ioctl+0x144>)
 801952c:	693b      	ldr	r3, [r7, #16]
 801952e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return -1;
 8019530:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8019534:	4618      	mov	r0, r3
 8019536:	3730      	adds	r7, #48	@ 0x30
 8019538:	46bd      	mov	sp, r7
 801953a:	bd80      	pop	{r7, pc}
 801953c:	8004667e 	.word	0x8004667e
 8019540:	4004667f 	.word	0x4004667f
 8019544:	2402b260 	.word	0x2402b260

08019548 <tcpip_timeouts_mbox_fetch>:
 * @param mbox the mbox to fetch the message from
 * @param msg the place to store the message
 */
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
 8019548:	b580      	push	{r7, lr}
 801954a:	b084      	sub	sp, #16
 801954c:	af00      	add	r7, sp, #0
 801954e:	6078      	str	r0, [r7, #4]
 8019550:	6039      	str	r1, [r7, #0]
  u32_t sleeptime, res;

again:
  LWIP_ASSERT_CORE_LOCKED();
 8019552:	f7f7 fcd5 	bl	8010f00 <sys_check_core_locking>

  sleeptime = sys_timeouts_sleeptime();
 8019556:	f008 fb41 	bl	8021bdc <sys_timeouts_sleeptime>
 801955a:	60f8      	str	r0, [r7, #12]
  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
 801955c:	68fb      	ldr	r3, [r7, #12]
 801955e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8019562:	d109      	bne.n	8019578 <tcpip_timeouts_mbox_fetch+0x30>
    UNLOCK_TCPIP_CORE();
 8019564:	f7f7 fcbe 	bl	8010ee4 <sys_unlock_tcpip_core>
    sys_arch_mbox_fetch(mbox, msg, 0);
 8019568:	2200      	movs	r2, #0
 801956a:	6839      	ldr	r1, [r7, #0]
 801956c:	6878      	ldr	r0, [r7, #4]
 801956e:	f00d fd0d 	bl	8026f8c <sys_arch_mbox_fetch>
    LOCK_TCPIP_CORE();
 8019572:	f7f7 fca7 	bl	8010ec4 <sys_lock_tcpip_core>
    return;
 8019576:	e016      	b.n	80195a6 <tcpip_timeouts_mbox_fetch+0x5e>
  } else if (sleeptime == 0) {
 8019578:	68fb      	ldr	r3, [r7, #12]
 801957a:	2b00      	cmp	r3, #0
 801957c:	d102      	bne.n	8019584 <tcpip_timeouts_mbox_fetch+0x3c>
    sys_check_timeouts();
 801957e:	f008 faf1 	bl	8021b64 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8019582:	e7e6      	b.n	8019552 <tcpip_timeouts_mbox_fetch+0xa>
  }

  UNLOCK_TCPIP_CORE();
 8019584:	f7f7 fcae 	bl	8010ee4 <sys_unlock_tcpip_core>
  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
 8019588:	68fa      	ldr	r2, [r7, #12]
 801958a:	6839      	ldr	r1, [r7, #0]
 801958c:	6878      	ldr	r0, [r7, #4]
 801958e:	f00d fcfd 	bl	8026f8c <sys_arch_mbox_fetch>
 8019592:	60b8      	str	r0, [r7, #8]
  LOCK_TCPIP_CORE();
 8019594:	f7f7 fc96 	bl	8010ec4 <sys_lock_tcpip_core>
  if (res == SYS_ARCH_TIMEOUT) {
 8019598:	68bb      	ldr	r3, [r7, #8]
 801959a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801959e:	d102      	bne.n	80195a6 <tcpip_timeouts_mbox_fetch+0x5e>
    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
       before a message could be fetched. */
    sys_check_timeouts();
 80195a0:	f008 fae0 	bl	8021b64 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 80195a4:	e7d5      	b.n	8019552 <tcpip_timeouts_mbox_fetch+0xa>
  }
}
 80195a6:	3710      	adds	r7, #16
 80195a8:	46bd      	mov	sp, r7
 80195aa:	bd80      	pop	{r7, pc}

080195ac <tcpip_thread>:
 *
 * @param arg unused argument
 */
static void
tcpip_thread(void *arg)
{
 80195ac:	b580      	push	{r7, lr}
 80195ae:	b084      	sub	sp, #16
 80195b0:	af00      	add	r7, sp, #0
 80195b2:	6078      	str	r0, [r7, #4]
  struct tcpip_msg *msg;
  LWIP_UNUSED_ARG(arg);

  LWIP_MARK_TCPIP_THREAD();
 80195b4:	f7f7 fce0 	bl	8010f78 <sys_mark_tcpip_thread>

  LOCK_TCPIP_CORE();
 80195b8:	f7f7 fc84 	bl	8010ec4 <sys_lock_tcpip_core>
  if (tcpip_init_done != NULL) {
 80195bc:	4b0f      	ldr	r3, [pc, #60]	@ (80195fc <tcpip_thread+0x50>)
 80195be:	681b      	ldr	r3, [r3, #0]
 80195c0:	2b00      	cmp	r3, #0
 80195c2:	d005      	beq.n	80195d0 <tcpip_thread+0x24>
    tcpip_init_done(tcpip_init_done_arg);
 80195c4:	4b0d      	ldr	r3, [pc, #52]	@ (80195fc <tcpip_thread+0x50>)
 80195c6:	681b      	ldr	r3, [r3, #0]
 80195c8:	4a0d      	ldr	r2, [pc, #52]	@ (8019600 <tcpip_thread+0x54>)
 80195ca:	6812      	ldr	r2, [r2, #0]
 80195cc:	4610      	mov	r0, r2
 80195ce:	4798      	blx	r3
  }

  while (1) {                          /* MAIN Loop */
    LWIP_TCPIP_THREAD_ALIVE();
    /* wait for a message, timeouts are processed while waiting */
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 80195d0:	f107 030c 	add.w	r3, r7, #12
 80195d4:	4619      	mov	r1, r3
 80195d6:	480b      	ldr	r0, [pc, #44]	@ (8019604 <tcpip_thread+0x58>)
 80195d8:	f7ff ffb6 	bl	8019548 <tcpip_timeouts_mbox_fetch>
    if (msg == NULL) {
 80195dc:	68fb      	ldr	r3, [r7, #12]
 80195de:	2b00      	cmp	r3, #0
 80195e0:	d106      	bne.n	80195f0 <tcpip_thread+0x44>
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 80195e2:	4b09      	ldr	r3, [pc, #36]	@ (8019608 <tcpip_thread+0x5c>)
 80195e4:	2291      	movs	r2, #145	@ 0x91
 80195e6:	4909      	ldr	r1, [pc, #36]	@ (801960c <tcpip_thread+0x60>)
 80195e8:	4809      	ldr	r0, [pc, #36]	@ (8019610 <tcpip_thread+0x64>)
 80195ea:	f011 f8b7 	bl	802a75c <iprintf>
      continue;
 80195ee:	e003      	b.n	80195f8 <tcpip_thread+0x4c>
    }
    tcpip_thread_handle_msg(msg);
 80195f0:	68fb      	ldr	r3, [r7, #12]
 80195f2:	4618      	mov	r0, r3
 80195f4:	f000 f80e 	bl	8019614 <tcpip_thread_handle_msg>
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 80195f8:	e7ea      	b.n	80195d0 <tcpip_thread+0x24>
 80195fa:	bf00      	nop
 80195fc:	24024408 	.word	0x24024408
 8019600:	2402440c 	.word	0x2402440c
 8019604:	24024410 	.word	0x24024410
 8019608:	0802e880 	.word	0x0802e880
 801960c:	0802e8b0 	.word	0x0802e8b0
 8019610:	0802e8d0 	.word	0x0802e8d0

08019614 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
 * This is in its own function for access by tests only.
 */
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
 8019614:	b580      	push	{r7, lr}
 8019616:	b082      	sub	sp, #8
 8019618:	af00      	add	r7, sp, #0
 801961a:	6078      	str	r0, [r7, #4]
  switch (msg->type) {
 801961c:	687b      	ldr	r3, [r7, #4]
 801961e:	781b      	ldrb	r3, [r3, #0]
 8019620:	2b02      	cmp	r3, #2
 8019622:	d026      	beq.n	8019672 <tcpip_thread_handle_msg+0x5e>
 8019624:	2b02      	cmp	r3, #2
 8019626:	dc2b      	bgt.n	8019680 <tcpip_thread_handle_msg+0x6c>
 8019628:	2b00      	cmp	r3, #0
 801962a:	d002      	beq.n	8019632 <tcpip_thread_handle_msg+0x1e>
 801962c:	2b01      	cmp	r3, #1
 801962e:	d015      	beq.n	801965c <tcpip_thread_handle_msg+0x48>
 8019630:	e026      	b.n	8019680 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */

#if !LWIP_TCPIP_CORE_LOCKING_INPUT
    case TCPIP_MSG_INPKT:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
 8019632:	687b      	ldr	r3, [r7, #4]
 8019634:	68db      	ldr	r3, [r3, #12]
 8019636:	687a      	ldr	r2, [r7, #4]
 8019638:	6850      	ldr	r0, [r2, #4]
 801963a:	687a      	ldr	r2, [r7, #4]
 801963c:	6892      	ldr	r2, [r2, #8]
 801963e:	4611      	mov	r1, r2
 8019640:	4798      	blx	r3
 8019642:	4603      	mov	r3, r0
 8019644:	2b00      	cmp	r3, #0
 8019646:	d004      	beq.n	8019652 <tcpip_thread_handle_msg+0x3e>
        pbuf_free(msg->msg.inp.p);
 8019648:	687b      	ldr	r3, [r7, #4]
 801964a:	685b      	ldr	r3, [r3, #4]
 801964c:	4618      	mov	r0, r3
 801964e:	f001 fe0d 	bl	801b26c <pbuf_free>
      }
      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8019652:	6879      	ldr	r1, [r7, #4]
 8019654:	2009      	movs	r0, #9
 8019656:	f000 ff1b 	bl	801a490 <memp_free>
      break;
 801965a:	e018      	b.n	801968e <tcpip_thread_handle_msg+0x7a>
      break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */

    case TCPIP_MSG_CALLBACK:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 801965c:	687b      	ldr	r3, [r7, #4]
 801965e:	685b      	ldr	r3, [r3, #4]
 8019660:	687a      	ldr	r2, [r7, #4]
 8019662:	6892      	ldr	r2, [r2, #8]
 8019664:	4610      	mov	r0, r2
 8019666:	4798      	blx	r3
      memp_free(MEMP_TCPIP_MSG_API, msg);
 8019668:	6879      	ldr	r1, [r7, #4]
 801966a:	2008      	movs	r0, #8
 801966c:	f000 ff10 	bl	801a490 <memp_free>
      break;
 8019670:	e00d      	b.n	801968e <tcpip_thread_handle_msg+0x7a>

    case TCPIP_MSG_CALLBACK_STATIC:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 8019672:	687b      	ldr	r3, [r7, #4]
 8019674:	685b      	ldr	r3, [r3, #4]
 8019676:	687a      	ldr	r2, [r7, #4]
 8019678:	6892      	ldr	r2, [r2, #8]
 801967a:	4610      	mov	r0, r2
 801967c:	4798      	blx	r3
      break;
 801967e:	e006      	b.n	801968e <tcpip_thread_handle_msg+0x7a>

    default:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8019680:	4b05      	ldr	r3, [pc, #20]	@ (8019698 <tcpip_thread_handle_msg+0x84>)
 8019682:	22cf      	movs	r2, #207	@ 0xcf
 8019684:	4905      	ldr	r1, [pc, #20]	@ (801969c <tcpip_thread_handle_msg+0x88>)
 8019686:	4806      	ldr	r0, [pc, #24]	@ (80196a0 <tcpip_thread_handle_msg+0x8c>)
 8019688:	f011 f868 	bl	802a75c <iprintf>
      break;
 801968c:	bf00      	nop
  }
}
 801968e:	bf00      	nop
 8019690:	3708      	adds	r7, #8
 8019692:	46bd      	mov	sp, r7
 8019694:	bd80      	pop	{r7, pc}
 8019696:	bf00      	nop
 8019698:	0802e880 	.word	0x0802e880
 801969c:	0802e8b0 	.word	0x0802e8b0
 80196a0:	0802e8d0 	.word	0x0802e8d0

080196a4 <tcpip_inpkt>:
 * @param inp the network interface on which the packet was received
 * @param input_fn input function to call
 */
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
 80196a4:	b580      	push	{r7, lr}
 80196a6:	b086      	sub	sp, #24
 80196a8:	af00      	add	r7, sp, #0
 80196aa:	60f8      	str	r0, [r7, #12]
 80196ac:	60b9      	str	r1, [r7, #8]
 80196ae:	607a      	str	r2, [r7, #4]
  UNLOCK_TCPIP_CORE();
  return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 80196b0:	481a      	ldr	r0, [pc, #104]	@ (801971c <tcpip_inpkt+0x78>)
 80196b2:	f00d fcb3 	bl	802701c <sys_mbox_valid>
 80196b6:	4603      	mov	r3, r0
 80196b8:	2b00      	cmp	r3, #0
 80196ba:	d105      	bne.n	80196c8 <tcpip_inpkt+0x24>
 80196bc:	4b18      	ldr	r3, [pc, #96]	@ (8019720 <tcpip_inpkt+0x7c>)
 80196be:	22fc      	movs	r2, #252	@ 0xfc
 80196c0:	4918      	ldr	r1, [pc, #96]	@ (8019724 <tcpip_inpkt+0x80>)
 80196c2:	4819      	ldr	r0, [pc, #100]	@ (8019728 <tcpip_inpkt+0x84>)
 80196c4:	f011 f84a 	bl	802a75c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
 80196c8:	2009      	movs	r0, #9
 80196ca:	f000 fe6b 	bl	801a3a4 <memp_malloc>
 80196ce:	6178      	str	r0, [r7, #20]
  if (msg == NULL) {
 80196d0:	697b      	ldr	r3, [r7, #20]
 80196d2:	2b00      	cmp	r3, #0
 80196d4:	d102      	bne.n	80196dc <tcpip_inpkt+0x38>
    return ERR_MEM;
 80196d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80196da:	e01a      	b.n	8019712 <tcpip_inpkt+0x6e>
  }

  msg->type = TCPIP_MSG_INPKT;
 80196dc:	697b      	ldr	r3, [r7, #20]
 80196de:	2200      	movs	r2, #0
 80196e0:	701a      	strb	r2, [r3, #0]
  msg->msg.inp.p = p;
 80196e2:	697b      	ldr	r3, [r7, #20]
 80196e4:	68fa      	ldr	r2, [r7, #12]
 80196e6:	605a      	str	r2, [r3, #4]
  msg->msg.inp.netif = inp;
 80196e8:	697b      	ldr	r3, [r7, #20]
 80196ea:	68ba      	ldr	r2, [r7, #8]
 80196ec:	609a      	str	r2, [r3, #8]
  msg->msg.inp.input_fn = input_fn;
 80196ee:	697b      	ldr	r3, [r7, #20]
 80196f0:	687a      	ldr	r2, [r7, #4]
 80196f2:	60da      	str	r2, [r3, #12]
  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 80196f4:	6979      	ldr	r1, [r7, #20]
 80196f6:	4809      	ldr	r0, [pc, #36]	@ (801971c <tcpip_inpkt+0x78>)
 80196f8:	f00d fc2e 	bl	8026f58 <sys_mbox_trypost>
 80196fc:	4603      	mov	r3, r0
 80196fe:	2b00      	cmp	r3, #0
 8019700:	d006      	beq.n	8019710 <tcpip_inpkt+0x6c>
    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8019702:	6979      	ldr	r1, [r7, #20]
 8019704:	2009      	movs	r0, #9
 8019706:	f000 fec3 	bl	801a490 <memp_free>
    return ERR_MEM;
 801970a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801970e:	e000      	b.n	8019712 <tcpip_inpkt+0x6e>
  }
  return ERR_OK;
 8019710:	2300      	movs	r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
 8019712:	4618      	mov	r0, r3
 8019714:	3718      	adds	r7, #24
 8019716:	46bd      	mov	sp, r7
 8019718:	bd80      	pop	{r7, pc}
 801971a:	bf00      	nop
 801971c:	24024410 	.word	0x24024410
 8019720:	0802e880 	.word	0x0802e880
 8019724:	0802e8f8 	.word	0x0802e8f8
 8019728:	0802e8d0 	.word	0x0802e8d0

0801972c <tcpip_input>:
 *          NETIF_FLAG_ETHERNET flags)
 * @param inp the network interface on which the packet was received
 */
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
 801972c:	b580      	push	{r7, lr}
 801972e:	b082      	sub	sp, #8
 8019730:	af00      	add	r7, sp, #0
 8019732:	6078      	str	r0, [r7, #4]
 8019734:	6039      	str	r1, [r7, #0]
#if LWIP_ETHERNET
  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
 8019736:	683b      	ldr	r3, [r7, #0]
 8019738:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801973c:	f003 0318 	and.w	r3, r3, #24
 8019740:	2b00      	cmp	r3, #0
 8019742:	d006      	beq.n	8019752 <tcpip_input+0x26>
    return tcpip_inpkt(p, inp, ethernet_input);
 8019744:	4a08      	ldr	r2, [pc, #32]	@ (8019768 <tcpip_input+0x3c>)
 8019746:	6839      	ldr	r1, [r7, #0]
 8019748:	6878      	ldr	r0, [r7, #4]
 801974a:	f7ff ffab 	bl	80196a4 <tcpip_inpkt>
 801974e:	4603      	mov	r3, r0
 8019750:	e005      	b.n	801975e <tcpip_input+0x32>
  } else
#endif /* LWIP_ETHERNET */
    return tcpip_inpkt(p, inp, ip_input);
 8019752:	4a06      	ldr	r2, [pc, #24]	@ (801976c <tcpip_input+0x40>)
 8019754:	6839      	ldr	r1, [r7, #0]
 8019756:	6878      	ldr	r0, [r7, #4]
 8019758:	f7ff ffa4 	bl	80196a4 <tcpip_inpkt>
 801975c:	4603      	mov	r3, r0
}
 801975e:	4618      	mov	r0, r3
 8019760:	3708      	adds	r7, #8
 8019762:	46bd      	mov	sp, r7
 8019764:	bd80      	pop	{r7, pc}
 8019766:	bf00      	nop
 8019768:	08026d4d 	.word	0x08026d4d
 801976c:	08025875 	.word	0x08025875

08019770 <tcpip_try_callback>:
 *
 * @see tcpip_callback
 */
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
 8019770:	b580      	push	{r7, lr}
 8019772:	b084      	sub	sp, #16
 8019774:	af00      	add	r7, sp, #0
 8019776:	6078      	str	r0, [r7, #4]
 8019778:	6039      	str	r1, [r7, #0]
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 801977a:	4819      	ldr	r0, [pc, #100]	@ (80197e0 <tcpip_try_callback+0x70>)
 801977c:	f00d fc4e 	bl	802701c <sys_mbox_valid>
 8019780:	4603      	mov	r3, r0
 8019782:	2b00      	cmp	r3, #0
 8019784:	d106      	bne.n	8019794 <tcpip_try_callback+0x24>
 8019786:	4b17      	ldr	r3, [pc, #92]	@ (80197e4 <tcpip_try_callback+0x74>)
 8019788:	f240 125d 	movw	r2, #349	@ 0x15d
 801978c:	4916      	ldr	r1, [pc, #88]	@ (80197e8 <tcpip_try_callback+0x78>)
 801978e:	4817      	ldr	r0, [pc, #92]	@ (80197ec <tcpip_try_callback+0x7c>)
 8019790:	f010 ffe4 	bl	802a75c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
 8019794:	2008      	movs	r0, #8
 8019796:	f000 fe05 	bl	801a3a4 <memp_malloc>
 801979a:	60f8      	str	r0, [r7, #12]
  if (msg == NULL) {
 801979c:	68fb      	ldr	r3, [r7, #12]
 801979e:	2b00      	cmp	r3, #0
 80197a0:	d102      	bne.n	80197a8 <tcpip_try_callback+0x38>
    return ERR_MEM;
 80197a2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80197a6:	e017      	b.n	80197d8 <tcpip_try_callback+0x68>
  }

  msg->type = TCPIP_MSG_CALLBACK;
 80197a8:	68fb      	ldr	r3, [r7, #12]
 80197aa:	2201      	movs	r2, #1
 80197ac:	701a      	strb	r2, [r3, #0]
  msg->msg.cb.function = function;
 80197ae:	68fb      	ldr	r3, [r7, #12]
 80197b0:	687a      	ldr	r2, [r7, #4]
 80197b2:	605a      	str	r2, [r3, #4]
  msg->msg.cb.ctx = ctx;
 80197b4:	68fb      	ldr	r3, [r7, #12]
 80197b6:	683a      	ldr	r2, [r7, #0]
 80197b8:	609a      	str	r2, [r3, #8]

  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 80197ba:	68f9      	ldr	r1, [r7, #12]
 80197bc:	4808      	ldr	r0, [pc, #32]	@ (80197e0 <tcpip_try_callback+0x70>)
 80197be:	f00d fbcb 	bl	8026f58 <sys_mbox_trypost>
 80197c2:	4603      	mov	r3, r0
 80197c4:	2b00      	cmp	r3, #0
 80197c6:	d006      	beq.n	80197d6 <tcpip_try_callback+0x66>
    memp_free(MEMP_TCPIP_MSG_API, msg);
 80197c8:	68f9      	ldr	r1, [r7, #12]
 80197ca:	2008      	movs	r0, #8
 80197cc:	f000 fe60 	bl	801a490 <memp_free>
    return ERR_MEM;
 80197d0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80197d4:	e000      	b.n	80197d8 <tcpip_try_callback+0x68>
  }
  return ERR_OK;
 80197d6:	2300      	movs	r3, #0
}
 80197d8:	4618      	mov	r0, r3
 80197da:	3710      	adds	r7, #16
 80197dc:	46bd      	mov	sp, r7
 80197de:	bd80      	pop	{r7, pc}
 80197e0:	24024410 	.word	0x24024410
 80197e4:	0802e880 	.word	0x0802e880
 80197e8:	0802e8f8 	.word	0x0802e8f8
 80197ec:	0802e8d0 	.word	0x0802e8d0

080197f0 <tcpip_send_msg_wait_sem>:
 * @param sem semaphore to wait on
 * @return ERR_OK if the function was called, another err_t if not
 */
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
 80197f0:	b580      	push	{r7, lr}
 80197f2:	b084      	sub	sp, #16
 80197f4:	af00      	add	r7, sp, #0
 80197f6:	60f8      	str	r0, [r7, #12]
 80197f8:	60b9      	str	r1, [r7, #8]
 80197fa:	607a      	str	r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
  LWIP_UNUSED_ARG(sem);
  LOCK_TCPIP_CORE();
 80197fc:	f7f7 fb62 	bl	8010ec4 <sys_lock_tcpip_core>
  fn(apimsg);
 8019800:	68fb      	ldr	r3, [r7, #12]
 8019802:	68b8      	ldr	r0, [r7, #8]
 8019804:	4798      	blx	r3
  UNLOCK_TCPIP_CORE();
 8019806:	f7f7 fb6d 	bl	8010ee4 <sys_unlock_tcpip_core>
  return ERR_OK;
 801980a:	2300      	movs	r3, #0
  sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
  sys_arch_sem_wait(sem, 0);
  TCPIP_MSG_VAR_FREE(msg);
  return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
 801980c:	4618      	mov	r0, r3
 801980e:	3710      	adds	r7, #16
 8019810:	46bd      	mov	sp, r7
 8019812:	bd80      	pop	{r7, pc}

08019814 <tcpip_init>:
 * @param initfunc a function to call when tcpip_thread is running and finished initializing
 * @param arg argument to pass to initfunc
 */
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
 8019814:	b580      	push	{r7, lr}
 8019816:	b084      	sub	sp, #16
 8019818:	af02      	add	r7, sp, #8
 801981a:	6078      	str	r0, [r7, #4]
 801981c:	6039      	str	r1, [r7, #0]
  lwip_init();
 801981e:	f000 f92d 	bl	8019a7c <lwip_init>

  tcpip_init_done = initfunc;
 8019822:	4a17      	ldr	r2, [pc, #92]	@ (8019880 <tcpip_init+0x6c>)
 8019824:	687b      	ldr	r3, [r7, #4]
 8019826:	6013      	str	r3, [r2, #0]
  tcpip_init_done_arg = arg;
 8019828:	4a16      	ldr	r2, [pc, #88]	@ (8019884 <tcpip_init+0x70>)
 801982a:	683b      	ldr	r3, [r7, #0]
 801982c:	6013      	str	r3, [r2, #0]
  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
 801982e:	2106      	movs	r1, #6
 8019830:	4815      	ldr	r0, [pc, #84]	@ (8019888 <tcpip_init+0x74>)
 8019832:	f00d fb65 	bl	8026f00 <sys_mbox_new>
 8019836:	4603      	mov	r3, r0
 8019838:	2b00      	cmp	r3, #0
 801983a:	d006      	beq.n	801984a <tcpip_init+0x36>
    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
 801983c:	4b13      	ldr	r3, [pc, #76]	@ (801988c <tcpip_init+0x78>)
 801983e:	f240 2261 	movw	r2, #609	@ 0x261
 8019842:	4913      	ldr	r1, [pc, #76]	@ (8019890 <tcpip_init+0x7c>)
 8019844:	4813      	ldr	r0, [pc, #76]	@ (8019894 <tcpip_init+0x80>)
 8019846:	f010 ff89 	bl	802a75c <iprintf>
  }
#if LWIP_TCPIP_CORE_LOCKING
  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
 801984a:	4813      	ldr	r0, [pc, #76]	@ (8019898 <tcpip_init+0x84>)
 801984c:	f00d fc9e 	bl	802718c <sys_mutex_new>
 8019850:	4603      	mov	r3, r0
 8019852:	2b00      	cmp	r3, #0
 8019854:	d006      	beq.n	8019864 <tcpip_init+0x50>
    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
 8019856:	4b0d      	ldr	r3, [pc, #52]	@ (801988c <tcpip_init+0x78>)
 8019858:	f240 2265 	movw	r2, #613	@ 0x265
 801985c:	490f      	ldr	r1, [pc, #60]	@ (801989c <tcpip_init+0x88>)
 801985e:	480d      	ldr	r0, [pc, #52]	@ (8019894 <tcpip_init+0x80>)
 8019860:	f010 ff7c 	bl	802a75c <iprintf>
  }
#endif /* LWIP_TCPIP_CORE_LOCKING */

  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
 8019864:	2330      	movs	r3, #48	@ 0x30
 8019866:	9300      	str	r3, [sp, #0]
 8019868:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
 801986c:	2200      	movs	r2, #0
 801986e:	490c      	ldr	r1, [pc, #48]	@ (80198a0 <tcpip_init+0x8c>)
 8019870:	480c      	ldr	r0, [pc, #48]	@ (80198a4 <tcpip_init+0x90>)
 8019872:	f00d fcbd 	bl	80271f0 <sys_thread_new>
}
 8019876:	bf00      	nop
 8019878:	3708      	adds	r7, #8
 801987a:	46bd      	mov	sp, r7
 801987c:	bd80      	pop	{r7, pc}
 801987e:	bf00      	nop
 8019880:	24024408 	.word	0x24024408
 8019884:	2402440c 	.word	0x2402440c
 8019888:	24024410 	.word	0x24024410
 801988c:	0802e880 	.word	0x0802e880
 8019890:	0802e908 	.word	0x0802e908
 8019894:	0802e8d0 	.word	0x0802e8d0
 8019898:	24024414 	.word	0x24024414
 801989c:	0802e92c 	.word	0x0802e92c
 80198a0:	080195ad 	.word	0x080195ad
 80198a4:	0802e950 	.word	0x0802e950

080198a8 <lwip_htons>:
 * @param n u16_t in host byte order
 * @return n in network byte order
 */
u16_t
lwip_htons(u16_t n)
{
 80198a8:	b480      	push	{r7}
 80198aa:	b083      	sub	sp, #12
 80198ac:	af00      	add	r7, sp, #0
 80198ae:	4603      	mov	r3, r0
 80198b0:	80fb      	strh	r3, [r7, #6]
  return PP_HTONS(n);
 80198b2:	88fb      	ldrh	r3, [r7, #6]
 80198b4:	021b      	lsls	r3, r3, #8
 80198b6:	b21a      	sxth	r2, r3
 80198b8:	88fb      	ldrh	r3, [r7, #6]
 80198ba:	0a1b      	lsrs	r3, r3, #8
 80198bc:	b29b      	uxth	r3, r3
 80198be:	b21b      	sxth	r3, r3
 80198c0:	4313      	orrs	r3, r2
 80198c2:	b21b      	sxth	r3, r3
 80198c4:	b29b      	uxth	r3, r3
}
 80198c6:	4618      	mov	r0, r3
 80198c8:	370c      	adds	r7, #12
 80198ca:	46bd      	mov	sp, r7
 80198cc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80198d0:	4770      	bx	lr

080198d2 <lwip_htonl>:
 * @param n u32_t in host byte order
 * @return n in network byte order
 */
u32_t
lwip_htonl(u32_t n)
{
 80198d2:	b480      	push	{r7}
 80198d4:	b083      	sub	sp, #12
 80198d6:	af00      	add	r7, sp, #0
 80198d8:	6078      	str	r0, [r7, #4]
  return PP_HTONL(n);
 80198da:	687b      	ldr	r3, [r7, #4]
 80198dc:	061a      	lsls	r2, r3, #24
 80198de:	687b      	ldr	r3, [r7, #4]
 80198e0:	021b      	lsls	r3, r3, #8
 80198e2:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
 80198e6:	431a      	orrs	r2, r3
 80198e8:	687b      	ldr	r3, [r7, #4]
 80198ea:	0a1b      	lsrs	r3, r3, #8
 80198ec:	f403 437f 	and.w	r3, r3, #65280	@ 0xff00
 80198f0:	431a      	orrs	r2, r3
 80198f2:	687b      	ldr	r3, [r7, #4]
 80198f4:	0e1b      	lsrs	r3, r3, #24
 80198f6:	4313      	orrs	r3, r2
}
 80198f8:	4618      	mov	r0, r3
 80198fa:	370c      	adds	r7, #12
 80198fc:	46bd      	mov	sp, r7
 80198fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019902:	4770      	bx	lr

08019904 <lwip_standard_chksum>:
 * @param len length of data to be summed
 * @return host order (!) lwip checksum (non-inverted Internet sum)
 */
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
 8019904:	b480      	push	{r7}
 8019906:	b089      	sub	sp, #36	@ 0x24
 8019908:	af00      	add	r7, sp, #0
 801990a:	6078      	str	r0, [r7, #4]
 801990c:	6039      	str	r1, [r7, #0]
  const u8_t *pb = (const u8_t *)dataptr;
 801990e:	687b      	ldr	r3, [r7, #4]
 8019910:	61fb      	str	r3, [r7, #28]
  const u16_t *ps;
  u16_t t = 0;
 8019912:	2300      	movs	r3, #0
 8019914:	81fb      	strh	r3, [r7, #14]
  u32_t sum = 0;
 8019916:	2300      	movs	r3, #0
 8019918:	617b      	str	r3, [r7, #20]
  int odd = ((mem_ptr_t)pb & 1);
 801991a:	69fb      	ldr	r3, [r7, #28]
 801991c:	f003 0301 	and.w	r3, r3, #1
 8019920:	613b      	str	r3, [r7, #16]

  /* Get aligned to u16_t */
  if (odd && len > 0) {
 8019922:	693b      	ldr	r3, [r7, #16]
 8019924:	2b00      	cmp	r3, #0
 8019926:	d00d      	beq.n	8019944 <lwip_standard_chksum+0x40>
 8019928:	683b      	ldr	r3, [r7, #0]
 801992a:	2b00      	cmp	r3, #0
 801992c:	dd0a      	ble.n	8019944 <lwip_standard_chksum+0x40>
    ((u8_t *)&t)[1] = *pb++;
 801992e:	69fa      	ldr	r2, [r7, #28]
 8019930:	1c53      	adds	r3, r2, #1
 8019932:	61fb      	str	r3, [r7, #28]
 8019934:	f107 030e 	add.w	r3, r7, #14
 8019938:	3301      	adds	r3, #1
 801993a:	7812      	ldrb	r2, [r2, #0]
 801993c:	701a      	strb	r2, [r3, #0]
    len--;
 801993e:	683b      	ldr	r3, [r7, #0]
 8019940:	3b01      	subs	r3, #1
 8019942:	603b      	str	r3, [r7, #0]
  }

  /* Add the bulk of the data */
  ps = (const u16_t *)(const void *)pb;
 8019944:	69fb      	ldr	r3, [r7, #28]
 8019946:	61bb      	str	r3, [r7, #24]
  while (len > 1) {
 8019948:	e00a      	b.n	8019960 <lwip_standard_chksum+0x5c>
    sum += *ps++;
 801994a:	69bb      	ldr	r3, [r7, #24]
 801994c:	1c9a      	adds	r2, r3, #2
 801994e:	61ba      	str	r2, [r7, #24]
 8019950:	881b      	ldrh	r3, [r3, #0]
 8019952:	461a      	mov	r2, r3
 8019954:	697b      	ldr	r3, [r7, #20]
 8019956:	4413      	add	r3, r2
 8019958:	617b      	str	r3, [r7, #20]
    len -= 2;
 801995a:	683b      	ldr	r3, [r7, #0]
 801995c:	3b02      	subs	r3, #2
 801995e:	603b      	str	r3, [r7, #0]
  while (len > 1) {
 8019960:	683b      	ldr	r3, [r7, #0]
 8019962:	2b01      	cmp	r3, #1
 8019964:	dcf1      	bgt.n	801994a <lwip_standard_chksum+0x46>
  }

  /* Consume left-over byte, if any */
  if (len > 0) {
 8019966:	683b      	ldr	r3, [r7, #0]
 8019968:	2b00      	cmp	r3, #0
 801996a:	dd04      	ble.n	8019976 <lwip_standard_chksum+0x72>
    ((u8_t *)&t)[0] = *(const u8_t *)ps;
 801996c:	f107 030e 	add.w	r3, r7, #14
 8019970:	69ba      	ldr	r2, [r7, #24]
 8019972:	7812      	ldrb	r2, [r2, #0]
 8019974:	701a      	strb	r2, [r3, #0]
  }

  /* Add end bytes */
  sum += t;
 8019976:	89fb      	ldrh	r3, [r7, #14]
 8019978:	461a      	mov	r2, r3
 801997a:	697b      	ldr	r3, [r7, #20]
 801997c:	4413      	add	r3, r2
 801997e:	617b      	str	r3, [r7, #20]

  /* Fold 32-bit sum to 16 bits
     calling this twice is probably faster than if statements... */
  sum = FOLD_U32T(sum);
 8019980:	697b      	ldr	r3, [r7, #20]
 8019982:	0c1a      	lsrs	r2, r3, #16
 8019984:	697b      	ldr	r3, [r7, #20]
 8019986:	b29b      	uxth	r3, r3
 8019988:	4413      	add	r3, r2
 801998a:	617b      	str	r3, [r7, #20]
  sum = FOLD_U32T(sum);
 801998c:	697b      	ldr	r3, [r7, #20]
 801998e:	0c1a      	lsrs	r2, r3, #16
 8019990:	697b      	ldr	r3, [r7, #20]
 8019992:	b29b      	uxth	r3, r3
 8019994:	4413      	add	r3, r2
 8019996:	617b      	str	r3, [r7, #20]

  /* Swap if alignment was odd */
  if (odd) {
 8019998:	693b      	ldr	r3, [r7, #16]
 801999a:	2b00      	cmp	r3, #0
 801999c:	d007      	beq.n	80199ae <lwip_standard_chksum+0xaa>
    sum = SWAP_BYTES_IN_WORD(sum);
 801999e:	697b      	ldr	r3, [r7, #20]
 80199a0:	021b      	lsls	r3, r3, #8
 80199a2:	b29a      	uxth	r2, r3
 80199a4:	697b      	ldr	r3, [r7, #20]
 80199a6:	0a1b      	lsrs	r3, r3, #8
 80199a8:	b2db      	uxtb	r3, r3
 80199aa:	4313      	orrs	r3, r2
 80199ac:	617b      	str	r3, [r7, #20]
  }

  return (u16_t)sum;
 80199ae:	697b      	ldr	r3, [r7, #20]
 80199b0:	b29b      	uxth	r3, r3
}
 80199b2:	4618      	mov	r0, r3
 80199b4:	3724      	adds	r7, #36	@ 0x24
 80199b6:	46bd      	mov	sp, r7
 80199b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80199bc:	4770      	bx	lr

080199be <inet_chksum>:
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */

u16_t
inet_chksum(const void *dataptr, u16_t len)
{
 80199be:	b580      	push	{r7, lr}
 80199c0:	b082      	sub	sp, #8
 80199c2:	af00      	add	r7, sp, #0
 80199c4:	6078      	str	r0, [r7, #4]
 80199c6:	460b      	mov	r3, r1
 80199c8:	807b      	strh	r3, [r7, #2]
  return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
 80199ca:	887b      	ldrh	r3, [r7, #2]
 80199cc:	4619      	mov	r1, r3
 80199ce:	6878      	ldr	r0, [r7, #4]
 80199d0:	f7ff ff98 	bl	8019904 <lwip_standard_chksum>
 80199d4:	4603      	mov	r3, r0
 80199d6:	43db      	mvns	r3, r3
 80199d8:	b29b      	uxth	r3, r3
}
 80199da:	4618      	mov	r0, r3
 80199dc:	3708      	adds	r7, #8
 80199de:	46bd      	mov	sp, r7
 80199e0:	bd80      	pop	{r7, pc}

080199e2 <inet_chksum_pbuf>:
 * @param p pbuf chain over that the checksum should be calculated
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
 80199e2:	b580      	push	{r7, lr}
 80199e4:	b086      	sub	sp, #24
 80199e6:	af00      	add	r7, sp, #0
 80199e8:	6078      	str	r0, [r7, #4]
  u32_t acc;
  struct pbuf *q;
  int swapped = 0;
 80199ea:	2300      	movs	r3, #0
 80199ec:	60fb      	str	r3, [r7, #12]

  acc = 0;
 80199ee:	2300      	movs	r3, #0
 80199f0:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 80199f2:	687b      	ldr	r3, [r7, #4]
 80199f4:	613b      	str	r3, [r7, #16]
 80199f6:	e02b      	b.n	8019a50 <inet_chksum_pbuf+0x6e>
    acc += LWIP_CHKSUM(q->payload, q->len);
 80199f8:	693b      	ldr	r3, [r7, #16]
 80199fa:	685a      	ldr	r2, [r3, #4]
 80199fc:	693b      	ldr	r3, [r7, #16]
 80199fe:	895b      	ldrh	r3, [r3, #10]
 8019a00:	4619      	mov	r1, r3
 8019a02:	4610      	mov	r0, r2
 8019a04:	f7ff ff7e 	bl	8019904 <lwip_standard_chksum>
 8019a08:	4603      	mov	r3, r0
 8019a0a:	461a      	mov	r2, r3
 8019a0c:	697b      	ldr	r3, [r7, #20]
 8019a0e:	4413      	add	r3, r2
 8019a10:	617b      	str	r3, [r7, #20]
    acc = FOLD_U32T(acc);
 8019a12:	697b      	ldr	r3, [r7, #20]
 8019a14:	0c1a      	lsrs	r2, r3, #16
 8019a16:	697b      	ldr	r3, [r7, #20]
 8019a18:	b29b      	uxth	r3, r3
 8019a1a:	4413      	add	r3, r2
 8019a1c:	617b      	str	r3, [r7, #20]
    if (q->len % 2 != 0) {
 8019a1e:	693b      	ldr	r3, [r7, #16]
 8019a20:	895b      	ldrh	r3, [r3, #10]
 8019a22:	f003 0301 	and.w	r3, r3, #1
 8019a26:	b29b      	uxth	r3, r3
 8019a28:	2b00      	cmp	r3, #0
 8019a2a:	d00e      	beq.n	8019a4a <inet_chksum_pbuf+0x68>
      swapped = !swapped;
 8019a2c:	68fb      	ldr	r3, [r7, #12]
 8019a2e:	2b00      	cmp	r3, #0
 8019a30:	bf0c      	ite	eq
 8019a32:	2301      	moveq	r3, #1
 8019a34:	2300      	movne	r3, #0
 8019a36:	b2db      	uxtb	r3, r3
 8019a38:	60fb      	str	r3, [r7, #12]
      acc = SWAP_BYTES_IN_WORD(acc);
 8019a3a:	697b      	ldr	r3, [r7, #20]
 8019a3c:	021b      	lsls	r3, r3, #8
 8019a3e:	b29a      	uxth	r2, r3
 8019a40:	697b      	ldr	r3, [r7, #20]
 8019a42:	0a1b      	lsrs	r3, r3, #8
 8019a44:	b2db      	uxtb	r3, r3
 8019a46:	4313      	orrs	r3, r2
 8019a48:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8019a4a:	693b      	ldr	r3, [r7, #16]
 8019a4c:	681b      	ldr	r3, [r3, #0]
 8019a4e:	613b      	str	r3, [r7, #16]
 8019a50:	693b      	ldr	r3, [r7, #16]
 8019a52:	2b00      	cmp	r3, #0
 8019a54:	d1d0      	bne.n	80199f8 <inet_chksum_pbuf+0x16>
    }
  }

  if (swapped) {
 8019a56:	68fb      	ldr	r3, [r7, #12]
 8019a58:	2b00      	cmp	r3, #0
 8019a5a:	d007      	beq.n	8019a6c <inet_chksum_pbuf+0x8a>
    acc = SWAP_BYTES_IN_WORD(acc);
 8019a5c:	697b      	ldr	r3, [r7, #20]
 8019a5e:	021b      	lsls	r3, r3, #8
 8019a60:	b29a      	uxth	r2, r3
 8019a62:	697b      	ldr	r3, [r7, #20]
 8019a64:	0a1b      	lsrs	r3, r3, #8
 8019a66:	b2db      	uxtb	r3, r3
 8019a68:	4313      	orrs	r3, r2
 8019a6a:	617b      	str	r3, [r7, #20]
  }
  return (u16_t)~(acc & 0xffffUL);
 8019a6c:	697b      	ldr	r3, [r7, #20]
 8019a6e:	b29b      	uxth	r3, r3
 8019a70:	43db      	mvns	r3, r3
 8019a72:	b29b      	uxth	r3, r3
}
 8019a74:	4618      	mov	r0, r3
 8019a76:	3718      	adds	r7, #24
 8019a78:	46bd      	mov	sp, r7
 8019a7a:	bd80      	pop	{r7, pc}

08019a7c <lwip_init>:
 * Initialize all modules.
 * Use this in NO_SYS mode. Use tcpip_init() otherwise.
 */
void
lwip_init(void)
{
 8019a7c:	b580      	push	{r7, lr}
 8019a7e:	b082      	sub	sp, #8
 8019a80:	af00      	add	r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
  int a = 0;
 8019a82:	2300      	movs	r3, #0
 8019a84:	607b      	str	r3, [r7, #4]
#endif

  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
 8019a86:	f00d fb75 	bl	8027174 <sys_init>
#endif /* !NO_SYS */
  mem_init();
 8019a8a:	f000 f8d3 	bl	8019c34 <mem_init>
  memp_init();
 8019a8e:	f000 fc1b 	bl	801a2c8 <memp_init>
  pbuf_init();
  netif_init();
 8019a92:	f000 fd27 	bl	801a4e4 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
  raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
  udp_init();
 8019a96:	f008 f8db 	bl	8021c50 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
  tcp_init();
 8019a9a:	f001 fe91 	bl	801b7c0 <tcp_init>
#if PPP_SUPPORT
  ppp_init();
#endif

#if LWIP_TIMERS
  sys_timeouts_init();
 8019a9e:	f008 f817 	bl	8021ad0 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
 8019aa2:	bf00      	nop
 8019aa4:	3708      	adds	r7, #8
 8019aa6:	46bd      	mov	sp, r7
 8019aa8:	bd80      	pop	{r7, pc}
	...

08019aac <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */

static struct mem *
ptr_to_mem(mem_size_t ptr)
{
 8019aac:	b480      	push	{r7}
 8019aae:	b083      	sub	sp, #12
 8019ab0:	af00      	add	r7, sp, #0
 8019ab2:	6078      	str	r0, [r7, #4]
  return (struct mem *)(void *)&ram[ptr];
 8019ab4:	4b04      	ldr	r3, [pc, #16]	@ (8019ac8 <ptr_to_mem+0x1c>)
 8019ab6:	681a      	ldr	r2, [r3, #0]
 8019ab8:	687b      	ldr	r3, [r7, #4]
 8019aba:	4413      	add	r3, r2
}
 8019abc:	4618      	mov	r0, r3
 8019abe:	370c      	adds	r7, #12
 8019ac0:	46bd      	mov	sp, r7
 8019ac2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019ac6:	4770      	bx	lr
 8019ac8:	24024430 	.word	0x24024430

08019acc <mem_to_ptr>:

static mem_size_t
mem_to_ptr(void *mem)
{
 8019acc:	b480      	push	{r7}
 8019ace:	b083      	sub	sp, #12
 8019ad0:	af00      	add	r7, sp, #0
 8019ad2:	6078      	str	r0, [r7, #4]
  return (mem_size_t)((u8_t *)mem - ram);
 8019ad4:	4b04      	ldr	r3, [pc, #16]	@ (8019ae8 <mem_to_ptr+0x1c>)
 8019ad6:	681b      	ldr	r3, [r3, #0]
 8019ad8:	687a      	ldr	r2, [r7, #4]
 8019ada:	1ad3      	subs	r3, r2, r3
}
 8019adc:	4618      	mov	r0, r3
 8019ade:	370c      	adds	r7, #12
 8019ae0:	46bd      	mov	sp, r7
 8019ae2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019ae6:	4770      	bx	lr
 8019ae8:	24024430 	.word	0x24024430

08019aec <plug_holes>:
 * This assumes access to the heap is protected by the calling function
 * already.
 */
static void
plug_holes(struct mem *mem)
{
 8019aec:	b590      	push	{r4, r7, lr}
 8019aee:	b085      	sub	sp, #20
 8019af0:	af00      	add	r7, sp, #0
 8019af2:	6078      	str	r0, [r7, #4]
  struct mem *nmem;
  struct mem *pmem;

  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
 8019af4:	4b45      	ldr	r3, [pc, #276]	@ (8019c0c <plug_holes+0x120>)
 8019af6:	681b      	ldr	r3, [r3, #0]
 8019af8:	687a      	ldr	r2, [r7, #4]
 8019afa:	429a      	cmp	r2, r3
 8019afc:	d206      	bcs.n	8019b0c <plug_holes+0x20>
 8019afe:	4b44      	ldr	r3, [pc, #272]	@ (8019c10 <plug_holes+0x124>)
 8019b00:	f240 12df 	movw	r2, #479	@ 0x1df
 8019b04:	4943      	ldr	r1, [pc, #268]	@ (8019c14 <plug_holes+0x128>)
 8019b06:	4844      	ldr	r0, [pc, #272]	@ (8019c18 <plug_holes+0x12c>)
 8019b08:	f010 fe28 	bl	802a75c <iprintf>
  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
 8019b0c:	4b43      	ldr	r3, [pc, #268]	@ (8019c1c <plug_holes+0x130>)
 8019b0e:	681b      	ldr	r3, [r3, #0]
 8019b10:	687a      	ldr	r2, [r7, #4]
 8019b12:	429a      	cmp	r2, r3
 8019b14:	d306      	bcc.n	8019b24 <plug_holes+0x38>
 8019b16:	4b3e      	ldr	r3, [pc, #248]	@ (8019c10 <plug_holes+0x124>)
 8019b18:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 8019b1c:	4940      	ldr	r1, [pc, #256]	@ (8019c20 <plug_holes+0x134>)
 8019b1e:	483e      	ldr	r0, [pc, #248]	@ (8019c18 <plug_holes+0x12c>)
 8019b20:	f010 fe1c 	bl	802a75c <iprintf>
  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
 8019b24:	687b      	ldr	r3, [r7, #4]
 8019b26:	7a1b      	ldrb	r3, [r3, #8]
 8019b28:	2b00      	cmp	r3, #0
 8019b2a:	d006      	beq.n	8019b3a <plug_holes+0x4e>
 8019b2c:	4b38      	ldr	r3, [pc, #224]	@ (8019c10 <plug_holes+0x124>)
 8019b2e:	f240 12e1 	movw	r2, #481	@ 0x1e1
 8019b32:	493c      	ldr	r1, [pc, #240]	@ (8019c24 <plug_holes+0x138>)
 8019b34:	4838      	ldr	r0, [pc, #224]	@ (8019c18 <plug_holes+0x12c>)
 8019b36:	f010 fe11 	bl	802a75c <iprintf>

  /* plug hole forward */
  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
 8019b3a:	687b      	ldr	r3, [r7, #4]
 8019b3c:	681b      	ldr	r3, [r3, #0]
 8019b3e:	4a3a      	ldr	r2, [pc, #232]	@ (8019c28 <plug_holes+0x13c>)
 8019b40:	4293      	cmp	r3, r2
 8019b42:	d906      	bls.n	8019b52 <plug_holes+0x66>
 8019b44:	4b32      	ldr	r3, [pc, #200]	@ (8019c10 <plug_holes+0x124>)
 8019b46:	f44f 72f2 	mov.w	r2, #484	@ 0x1e4
 8019b4a:	4938      	ldr	r1, [pc, #224]	@ (8019c2c <plug_holes+0x140>)
 8019b4c:	4832      	ldr	r0, [pc, #200]	@ (8019c18 <plug_holes+0x12c>)
 8019b4e:	f010 fe05 	bl	802a75c <iprintf>

  nmem = ptr_to_mem(mem->next);
 8019b52:	687b      	ldr	r3, [r7, #4]
 8019b54:	681b      	ldr	r3, [r3, #0]
 8019b56:	4618      	mov	r0, r3
 8019b58:	f7ff ffa8 	bl	8019aac <ptr_to_mem>
 8019b5c:	60f8      	str	r0, [r7, #12]
  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
 8019b5e:	687a      	ldr	r2, [r7, #4]
 8019b60:	68fb      	ldr	r3, [r7, #12]
 8019b62:	429a      	cmp	r2, r3
 8019b64:	d024      	beq.n	8019bb0 <plug_holes+0xc4>
 8019b66:	68fb      	ldr	r3, [r7, #12]
 8019b68:	7a1b      	ldrb	r3, [r3, #8]
 8019b6a:	2b00      	cmp	r3, #0
 8019b6c:	d120      	bne.n	8019bb0 <plug_holes+0xc4>
 8019b6e:	4b2b      	ldr	r3, [pc, #172]	@ (8019c1c <plug_holes+0x130>)
 8019b70:	681b      	ldr	r3, [r3, #0]
 8019b72:	68fa      	ldr	r2, [r7, #12]
 8019b74:	429a      	cmp	r2, r3
 8019b76:	d01b      	beq.n	8019bb0 <plug_holes+0xc4>
    /* if mem->next is unused and not end of ram, combine mem and mem->next */
    if (lfree == nmem) {
 8019b78:	4b2d      	ldr	r3, [pc, #180]	@ (8019c30 <plug_holes+0x144>)
 8019b7a:	681b      	ldr	r3, [r3, #0]
 8019b7c:	68fa      	ldr	r2, [r7, #12]
 8019b7e:	429a      	cmp	r2, r3
 8019b80:	d102      	bne.n	8019b88 <plug_holes+0x9c>
      lfree = mem;
 8019b82:	4a2b      	ldr	r2, [pc, #172]	@ (8019c30 <plug_holes+0x144>)
 8019b84:	687b      	ldr	r3, [r7, #4]
 8019b86:	6013      	str	r3, [r2, #0]
    }
    mem->next = nmem->next;
 8019b88:	68fb      	ldr	r3, [r7, #12]
 8019b8a:	681a      	ldr	r2, [r3, #0]
 8019b8c:	687b      	ldr	r3, [r7, #4]
 8019b8e:	601a      	str	r2, [r3, #0]
    if (nmem->next != MEM_SIZE_ALIGNED) {
 8019b90:	68fb      	ldr	r3, [r7, #12]
 8019b92:	681b      	ldr	r3, [r3, #0]
 8019b94:	4a24      	ldr	r2, [pc, #144]	@ (8019c28 <plug_holes+0x13c>)
 8019b96:	4293      	cmp	r3, r2
 8019b98:	d00a      	beq.n	8019bb0 <plug_holes+0xc4>
      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
 8019b9a:	68fb      	ldr	r3, [r7, #12]
 8019b9c:	681b      	ldr	r3, [r3, #0]
 8019b9e:	4618      	mov	r0, r3
 8019ba0:	f7ff ff84 	bl	8019aac <ptr_to_mem>
 8019ba4:	4604      	mov	r4, r0
 8019ba6:	6878      	ldr	r0, [r7, #4]
 8019ba8:	f7ff ff90 	bl	8019acc <mem_to_ptr>
 8019bac:	4603      	mov	r3, r0
 8019bae:	6063      	str	r3, [r4, #4]
    }
  }

  /* plug hole backward */
  pmem = ptr_to_mem(mem->prev);
 8019bb0:	687b      	ldr	r3, [r7, #4]
 8019bb2:	685b      	ldr	r3, [r3, #4]
 8019bb4:	4618      	mov	r0, r3
 8019bb6:	f7ff ff79 	bl	8019aac <ptr_to_mem>
 8019bba:	60b8      	str	r0, [r7, #8]
  if (pmem != mem && pmem->used == 0) {
 8019bbc:	68ba      	ldr	r2, [r7, #8]
 8019bbe:	687b      	ldr	r3, [r7, #4]
 8019bc0:	429a      	cmp	r2, r3
 8019bc2:	d01f      	beq.n	8019c04 <plug_holes+0x118>
 8019bc4:	68bb      	ldr	r3, [r7, #8]
 8019bc6:	7a1b      	ldrb	r3, [r3, #8]
 8019bc8:	2b00      	cmp	r3, #0
 8019bca:	d11b      	bne.n	8019c04 <plug_holes+0x118>
    /* if mem->prev is unused, combine mem and mem->prev */
    if (lfree == mem) {
 8019bcc:	4b18      	ldr	r3, [pc, #96]	@ (8019c30 <plug_holes+0x144>)
 8019bce:	681b      	ldr	r3, [r3, #0]
 8019bd0:	687a      	ldr	r2, [r7, #4]
 8019bd2:	429a      	cmp	r2, r3
 8019bd4:	d102      	bne.n	8019bdc <plug_holes+0xf0>
      lfree = pmem;
 8019bd6:	4a16      	ldr	r2, [pc, #88]	@ (8019c30 <plug_holes+0x144>)
 8019bd8:	68bb      	ldr	r3, [r7, #8]
 8019bda:	6013      	str	r3, [r2, #0]
    }
    pmem->next = mem->next;
 8019bdc:	687b      	ldr	r3, [r7, #4]
 8019bde:	681a      	ldr	r2, [r3, #0]
 8019be0:	68bb      	ldr	r3, [r7, #8]
 8019be2:	601a      	str	r2, [r3, #0]
    if (mem->next != MEM_SIZE_ALIGNED) {
 8019be4:	687b      	ldr	r3, [r7, #4]
 8019be6:	681b      	ldr	r3, [r3, #0]
 8019be8:	4a0f      	ldr	r2, [pc, #60]	@ (8019c28 <plug_holes+0x13c>)
 8019bea:	4293      	cmp	r3, r2
 8019bec:	d00a      	beq.n	8019c04 <plug_holes+0x118>
      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
 8019bee:	687b      	ldr	r3, [r7, #4]
 8019bf0:	681b      	ldr	r3, [r3, #0]
 8019bf2:	4618      	mov	r0, r3
 8019bf4:	f7ff ff5a 	bl	8019aac <ptr_to_mem>
 8019bf8:	4604      	mov	r4, r0
 8019bfa:	68b8      	ldr	r0, [r7, #8]
 8019bfc:	f7ff ff66 	bl	8019acc <mem_to_ptr>
 8019c00:	4603      	mov	r3, r0
 8019c02:	6063      	str	r3, [r4, #4]
    }
  }
}
 8019c04:	bf00      	nop
 8019c06:	3714      	adds	r7, #20
 8019c08:	46bd      	mov	sp, r7
 8019c0a:	bd90      	pop	{r4, r7, pc}
 8019c0c:	24024430 	.word	0x24024430
 8019c10:	0802e960 	.word	0x0802e960
 8019c14:	0802e990 	.word	0x0802e990
 8019c18:	0802e9a8 	.word	0x0802e9a8
 8019c1c:	24024434 	.word	0x24024434
 8019c20:	0802e9d0 	.word	0x0802e9d0
 8019c24:	0802e9ec 	.word	0x0802e9ec
 8019c28:	0001ffe8 	.word	0x0001ffe8
 8019c2c:	0802ea08 	.word	0x0802ea08
 8019c30:	2402443c 	.word	0x2402443c

08019c34 <mem_init>:
/**
 * Zero the heap and initialize start, end and lowest-free
 */
void
mem_init(void)
{
 8019c34:	b580      	push	{r7, lr}
 8019c36:	b082      	sub	sp, #8
 8019c38:	af00      	add	r7, sp, #0

  LWIP_ASSERT("Sanity check alignment",
              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);

  /* align the heap */
  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
 8019c3a:	4b1b      	ldr	r3, [pc, #108]	@ (8019ca8 <mem_init+0x74>)
 8019c3c:	4a1b      	ldr	r2, [pc, #108]	@ (8019cac <mem_init+0x78>)
 8019c3e:	601a      	str	r2, [r3, #0]
  /* initialize the start of the heap */
  mem = (struct mem *)(void *)ram;
 8019c40:	4b19      	ldr	r3, [pc, #100]	@ (8019ca8 <mem_init+0x74>)
 8019c42:	681b      	ldr	r3, [r3, #0]
 8019c44:	607b      	str	r3, [r7, #4]
  mem->next = MEM_SIZE_ALIGNED;
 8019c46:	687b      	ldr	r3, [r7, #4]
 8019c48:	4a19      	ldr	r2, [pc, #100]	@ (8019cb0 <mem_init+0x7c>)
 8019c4a:	601a      	str	r2, [r3, #0]
  mem->prev = 0;
 8019c4c:	687b      	ldr	r3, [r7, #4]
 8019c4e:	2200      	movs	r2, #0
 8019c50:	605a      	str	r2, [r3, #4]
  mem->used = 0;
 8019c52:	687b      	ldr	r3, [r7, #4]
 8019c54:	2200      	movs	r2, #0
 8019c56:	721a      	strb	r2, [r3, #8]
  /* initialize the end of the heap */
  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
 8019c58:	4815      	ldr	r0, [pc, #84]	@ (8019cb0 <mem_init+0x7c>)
 8019c5a:	f7ff ff27 	bl	8019aac <ptr_to_mem>
 8019c5e:	4603      	mov	r3, r0
 8019c60:	4a14      	ldr	r2, [pc, #80]	@ (8019cb4 <mem_init+0x80>)
 8019c62:	6013      	str	r3, [r2, #0]
  ram_end->used = 1;
 8019c64:	4b13      	ldr	r3, [pc, #76]	@ (8019cb4 <mem_init+0x80>)
 8019c66:	681b      	ldr	r3, [r3, #0]
 8019c68:	2201      	movs	r2, #1
 8019c6a:	721a      	strb	r2, [r3, #8]
  ram_end->next = MEM_SIZE_ALIGNED;
 8019c6c:	4b11      	ldr	r3, [pc, #68]	@ (8019cb4 <mem_init+0x80>)
 8019c6e:	681b      	ldr	r3, [r3, #0]
 8019c70:	4a0f      	ldr	r2, [pc, #60]	@ (8019cb0 <mem_init+0x7c>)
 8019c72:	601a      	str	r2, [r3, #0]
  ram_end->prev = MEM_SIZE_ALIGNED;
 8019c74:	4b0f      	ldr	r3, [pc, #60]	@ (8019cb4 <mem_init+0x80>)
 8019c76:	681b      	ldr	r3, [r3, #0]
 8019c78:	4a0d      	ldr	r2, [pc, #52]	@ (8019cb0 <mem_init+0x7c>)
 8019c7a:	605a      	str	r2, [r3, #4]
  MEM_SANITY();

  /* initialize the lowest-free pointer to the start of the heap */
  lfree = (struct mem *)(void *)ram;
 8019c7c:	4b0a      	ldr	r3, [pc, #40]	@ (8019ca8 <mem_init+0x74>)
 8019c7e:	681b      	ldr	r3, [r3, #0]
 8019c80:	4a0d      	ldr	r2, [pc, #52]	@ (8019cb8 <mem_init+0x84>)
 8019c82:	6013      	str	r3, [r2, #0]

  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);

  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
 8019c84:	480d      	ldr	r0, [pc, #52]	@ (8019cbc <mem_init+0x88>)
 8019c86:	f00d fa81 	bl	802718c <sys_mutex_new>
 8019c8a:	4603      	mov	r3, r0
 8019c8c:	2b00      	cmp	r3, #0
 8019c8e:	d006      	beq.n	8019c9e <mem_init+0x6a>
    LWIP_ASSERT("failed to create mem_mutex", 0);
 8019c90:	4b0b      	ldr	r3, [pc, #44]	@ (8019cc0 <mem_init+0x8c>)
 8019c92:	f240 221f 	movw	r2, #543	@ 0x21f
 8019c96:	490b      	ldr	r1, [pc, #44]	@ (8019cc4 <mem_init+0x90>)
 8019c98:	480b      	ldr	r0, [pc, #44]	@ (8019cc8 <mem_init+0x94>)
 8019c9a:	f010 fd5f 	bl	802a75c <iprintf>
  }
}
 8019c9e:	bf00      	nop
 8019ca0:	3708      	adds	r7, #8
 8019ca2:	46bd      	mov	sp, r7
 8019ca4:	bd80      	pop	{r7, pc}
 8019ca6:	bf00      	nop
 8019ca8:	24024430 	.word	0x24024430
 8019cac:	24020000 	.word	0x24020000
 8019cb0:	0001ffe8 	.word	0x0001ffe8
 8019cb4:	24024434 	.word	0x24024434
 8019cb8:	2402443c 	.word	0x2402443c
 8019cbc:	24024438 	.word	0x24024438
 8019cc0:	0802e960 	.word	0x0802e960
 8019cc4:	0802ea34 	.word	0x0802ea34
 8019cc8:	0802e9a8 	.word	0x0802e9a8

08019ccc <mem_link_valid>:
/* Check if a struct mem is correctly linked.
 * If not, double-free is a possible reason.
 */
static int
mem_link_valid(struct mem *mem)
{
 8019ccc:	b580      	push	{r7, lr}
 8019cce:	b086      	sub	sp, #24
 8019cd0:	af00      	add	r7, sp, #0
 8019cd2:	6078      	str	r0, [r7, #4]
  struct mem *nmem, *pmem;
  mem_size_t rmem_idx;
  rmem_idx = mem_to_ptr(mem);
 8019cd4:	6878      	ldr	r0, [r7, #4]
 8019cd6:	f7ff fef9 	bl	8019acc <mem_to_ptr>
 8019cda:	6178      	str	r0, [r7, #20]
  nmem = ptr_to_mem(mem->next);
 8019cdc:	687b      	ldr	r3, [r7, #4]
 8019cde:	681b      	ldr	r3, [r3, #0]
 8019ce0:	4618      	mov	r0, r3
 8019ce2:	f7ff fee3 	bl	8019aac <ptr_to_mem>
 8019ce6:	6138      	str	r0, [r7, #16]
  pmem = ptr_to_mem(mem->prev);
 8019ce8:	687b      	ldr	r3, [r7, #4]
 8019cea:	685b      	ldr	r3, [r3, #4]
 8019cec:	4618      	mov	r0, r3
 8019cee:	f7ff fedd 	bl	8019aac <ptr_to_mem>
 8019cf2:	60f8      	str	r0, [r7, #12]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8019cf4:	687b      	ldr	r3, [r7, #4]
 8019cf6:	681b      	ldr	r3, [r3, #0]
 8019cf8:	4a11      	ldr	r2, [pc, #68]	@ (8019d40 <mem_link_valid+0x74>)
 8019cfa:	4293      	cmp	r3, r2
 8019cfc:	d818      	bhi.n	8019d30 <mem_link_valid+0x64>
 8019cfe:	687b      	ldr	r3, [r7, #4]
 8019d00:	685b      	ldr	r3, [r3, #4]
 8019d02:	4a0f      	ldr	r2, [pc, #60]	@ (8019d40 <mem_link_valid+0x74>)
 8019d04:	4293      	cmp	r3, r2
 8019d06:	d813      	bhi.n	8019d30 <mem_link_valid+0x64>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019d08:	687b      	ldr	r3, [r7, #4]
 8019d0a:	685b      	ldr	r3, [r3, #4]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8019d0c:	697a      	ldr	r2, [r7, #20]
 8019d0e:	429a      	cmp	r2, r3
 8019d10:	d004      	beq.n	8019d1c <mem_link_valid+0x50>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019d12:	68fb      	ldr	r3, [r7, #12]
 8019d14:	681b      	ldr	r3, [r3, #0]
 8019d16:	697a      	ldr	r2, [r7, #20]
 8019d18:	429a      	cmp	r2, r3
 8019d1a:	d109      	bne.n	8019d30 <mem_link_valid+0x64>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8019d1c:	4b09      	ldr	r3, [pc, #36]	@ (8019d44 <mem_link_valid+0x78>)
 8019d1e:	681b      	ldr	r3, [r3, #0]
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 8019d20:	693a      	ldr	r2, [r7, #16]
 8019d22:	429a      	cmp	r2, r3
 8019d24:	d006      	beq.n	8019d34 <mem_link_valid+0x68>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 8019d26:	693b      	ldr	r3, [r7, #16]
 8019d28:	685b      	ldr	r3, [r3, #4]
 8019d2a:	697a      	ldr	r2, [r7, #20]
 8019d2c:	429a      	cmp	r2, r3
 8019d2e:	d001      	beq.n	8019d34 <mem_link_valid+0x68>
    return 0;
 8019d30:	2300      	movs	r3, #0
 8019d32:	e000      	b.n	8019d36 <mem_link_valid+0x6a>
  }
  return 1;
 8019d34:	2301      	movs	r3, #1
}
 8019d36:	4618      	mov	r0, r3
 8019d38:	3718      	adds	r7, #24
 8019d3a:	46bd      	mov	sp, r7
 8019d3c:	bd80      	pop	{r7, pc}
 8019d3e:	bf00      	nop
 8019d40:	0001ffe8 	.word	0x0001ffe8
 8019d44:	24024434 	.word	0x24024434

08019d48 <mem_free>:
 * @param rmem is the data portion of a struct mem as returned by a previous
 *             call to mem_malloc()
 */
void
mem_free(void *rmem)
{
 8019d48:	b580      	push	{r7, lr}
 8019d4a:	b088      	sub	sp, #32
 8019d4c:	af00      	add	r7, sp, #0
 8019d4e:	6078      	str	r0, [r7, #4]
  struct mem *mem;
  LWIP_MEM_FREE_DECL_PROTECT();

  if (rmem == NULL) {
 8019d50:	687b      	ldr	r3, [r7, #4]
 8019d52:	2b00      	cmp	r3, #0
 8019d54:	d070      	beq.n	8019e38 <mem_free+0xf0>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
    return;
  }
  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
 8019d56:	687b      	ldr	r3, [r7, #4]
 8019d58:	f003 0303 	and.w	r3, r3, #3
 8019d5c:	2b00      	cmp	r3, #0
 8019d5e:	d00d      	beq.n	8019d7c <mem_free+0x34>
    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
 8019d60:	4b37      	ldr	r3, [pc, #220]	@ (8019e40 <mem_free+0xf8>)
 8019d62:	f240 2273 	movw	r2, #627	@ 0x273
 8019d66:	4937      	ldr	r1, [pc, #220]	@ (8019e44 <mem_free+0xfc>)
 8019d68:	4837      	ldr	r0, [pc, #220]	@ (8019e48 <mem_free+0x100>)
 8019d6a:	f010 fcf7 	bl	802a75c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019d6e:	f00d fa5f 	bl	8027230 <sys_arch_protect>
 8019d72:	60f8      	str	r0, [r7, #12]
 8019d74:	68f8      	ldr	r0, [r7, #12]
 8019d76:	f00d fa69 	bl	802724c <sys_arch_unprotect>
    return;
 8019d7a:	e05e      	b.n	8019e3a <mem_free+0xf2>
  }

  /* Get the corresponding struct mem: */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8019d7c:	687b      	ldr	r3, [r7, #4]
 8019d7e:	3b0c      	subs	r3, #12
 8019d80:	61fb      	str	r3, [r7, #28]

  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
 8019d82:	4b32      	ldr	r3, [pc, #200]	@ (8019e4c <mem_free+0x104>)
 8019d84:	681b      	ldr	r3, [r3, #0]
 8019d86:	69fa      	ldr	r2, [r7, #28]
 8019d88:	429a      	cmp	r2, r3
 8019d8a:	d306      	bcc.n	8019d9a <mem_free+0x52>
 8019d8c:	687b      	ldr	r3, [r7, #4]
 8019d8e:	f103 020c 	add.w	r2, r3, #12
 8019d92:	4b2f      	ldr	r3, [pc, #188]	@ (8019e50 <mem_free+0x108>)
 8019d94:	681b      	ldr	r3, [r3, #0]
 8019d96:	429a      	cmp	r2, r3
 8019d98:	d90d      	bls.n	8019db6 <mem_free+0x6e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
 8019d9a:	4b29      	ldr	r3, [pc, #164]	@ (8019e40 <mem_free+0xf8>)
 8019d9c:	f240 227f 	movw	r2, #639	@ 0x27f
 8019da0:	492c      	ldr	r1, [pc, #176]	@ (8019e54 <mem_free+0x10c>)
 8019da2:	4829      	ldr	r0, [pc, #164]	@ (8019e48 <mem_free+0x100>)
 8019da4:	f010 fcda 	bl	802a75c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019da8:	f00d fa42 	bl	8027230 <sys_arch_protect>
 8019dac:	6138      	str	r0, [r7, #16]
 8019dae:	6938      	ldr	r0, [r7, #16]
 8019db0:	f00d fa4c 	bl	802724c <sys_arch_unprotect>
    return;
 8019db4:	e041      	b.n	8019e3a <mem_free+0xf2>
  }
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8019db6:	4828      	ldr	r0, [pc, #160]	@ (8019e58 <mem_free+0x110>)
 8019db8:	f00d f9fe 	bl	80271b8 <sys_mutex_lock>
  /* mem has to be in a used state */
  if (!mem->used) {
 8019dbc:	69fb      	ldr	r3, [r7, #28]
 8019dbe:	7a1b      	ldrb	r3, [r3, #8]
 8019dc0:	2b00      	cmp	r3, #0
 8019dc2:	d110      	bne.n	8019de6 <mem_free+0x9e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
 8019dc4:	4b1e      	ldr	r3, [pc, #120]	@ (8019e40 <mem_free+0xf8>)
 8019dc6:	f44f 7223 	mov.w	r2, #652	@ 0x28c
 8019dca:	4924      	ldr	r1, [pc, #144]	@ (8019e5c <mem_free+0x114>)
 8019dcc:	481e      	ldr	r0, [pc, #120]	@ (8019e48 <mem_free+0x100>)
 8019dce:	f010 fcc5 	bl	802a75c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019dd2:	4821      	ldr	r0, [pc, #132]	@ (8019e58 <mem_free+0x110>)
 8019dd4:	f00d f9ff 	bl	80271d6 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019dd8:	f00d fa2a 	bl	8027230 <sys_arch_protect>
 8019ddc:	6178      	str	r0, [r7, #20]
 8019dde:	6978      	ldr	r0, [r7, #20]
 8019de0:	f00d fa34 	bl	802724c <sys_arch_unprotect>
    return;
 8019de4:	e029      	b.n	8019e3a <mem_free+0xf2>
  }

  if (!mem_link_valid(mem)) {
 8019de6:	69f8      	ldr	r0, [r7, #28]
 8019de8:	f7ff ff70 	bl	8019ccc <mem_link_valid>
 8019dec:	4603      	mov	r3, r0
 8019dee:	2b00      	cmp	r3, #0
 8019df0:	d110      	bne.n	8019e14 <mem_free+0xcc>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
 8019df2:	4b13      	ldr	r3, [pc, #76]	@ (8019e40 <mem_free+0xf8>)
 8019df4:	f240 2295 	movw	r2, #661	@ 0x295
 8019df8:	4919      	ldr	r1, [pc, #100]	@ (8019e60 <mem_free+0x118>)
 8019dfa:	4813      	ldr	r0, [pc, #76]	@ (8019e48 <mem_free+0x100>)
 8019dfc:	f010 fcae 	bl	802a75c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 8019e00:	4815      	ldr	r0, [pc, #84]	@ (8019e58 <mem_free+0x110>)
 8019e02:	f00d f9e8 	bl	80271d6 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019e06:	f00d fa13 	bl	8027230 <sys_arch_protect>
 8019e0a:	61b8      	str	r0, [r7, #24]
 8019e0c:	69b8      	ldr	r0, [r7, #24]
 8019e0e:	f00d fa1d 	bl	802724c <sys_arch_unprotect>
    return;
 8019e12:	e012      	b.n	8019e3a <mem_free+0xf2>
  }

  /* mem is now unused. */
  mem->used = 0;
 8019e14:	69fb      	ldr	r3, [r7, #28]
 8019e16:	2200      	movs	r2, #0
 8019e18:	721a      	strb	r2, [r3, #8]

  if (mem < lfree) {
 8019e1a:	4b12      	ldr	r3, [pc, #72]	@ (8019e64 <mem_free+0x11c>)
 8019e1c:	681b      	ldr	r3, [r3, #0]
 8019e1e:	69fa      	ldr	r2, [r7, #28]
 8019e20:	429a      	cmp	r2, r3
 8019e22:	d202      	bcs.n	8019e2a <mem_free+0xe2>
    /* the newly freed struct is now the lowest */
    lfree = mem;
 8019e24:	4a0f      	ldr	r2, [pc, #60]	@ (8019e64 <mem_free+0x11c>)
 8019e26:	69fb      	ldr	r3, [r7, #28]
 8019e28:	6013      	str	r3, [r2, #0]
  }

  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));

  /* finally, see if prev or next are free also */
  plug_holes(mem);
 8019e2a:	69f8      	ldr	r0, [r7, #28]
 8019e2c:	f7ff fe5e 	bl	8019aec <plug_holes>
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 8019e30:	4809      	ldr	r0, [pc, #36]	@ (8019e58 <mem_free+0x110>)
 8019e32:	f00d f9d0 	bl	80271d6 <sys_mutex_unlock>
 8019e36:	e000      	b.n	8019e3a <mem_free+0xf2>
    return;
 8019e38:	bf00      	nop
}
 8019e3a:	3720      	adds	r7, #32
 8019e3c:	46bd      	mov	sp, r7
 8019e3e:	bd80      	pop	{r7, pc}
 8019e40:	0802e960 	.word	0x0802e960
 8019e44:	0802ea50 	.word	0x0802ea50
 8019e48:	0802e9a8 	.word	0x0802e9a8
 8019e4c:	24024430 	.word	0x24024430
 8019e50:	24024434 	.word	0x24024434
 8019e54:	0802ea74 	.word	0x0802ea74
 8019e58:	24024438 	.word	0x24024438
 8019e5c:	0802ea90 	.word	0x0802ea90
 8019e60:	0802eab8 	.word	0x0802eab8
 8019e64:	2402443c 	.word	0x2402443c

08019e68 <mem_trim>:
 *         or NULL if newsize is > old size, in which case rmem is NOT touched
 *         or freed!
 */
void *
mem_trim(void *rmem, mem_size_t new_size)
{
 8019e68:	b580      	push	{r7, lr}
 8019e6a:	b08a      	sub	sp, #40	@ 0x28
 8019e6c:	af00      	add	r7, sp, #0
 8019e6e:	6078      	str	r0, [r7, #4]
 8019e70:	6039      	str	r1, [r7, #0]
  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
  LWIP_MEM_FREE_DECL_PROTECT();

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
 8019e72:	683b      	ldr	r3, [r7, #0]
 8019e74:	3303      	adds	r3, #3
 8019e76:	f023 0303 	bic.w	r3, r3, #3
 8019e7a:	627b      	str	r3, [r7, #36]	@ 0x24
  if (newsize < MIN_SIZE_ALIGNED) {
 8019e7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019e7e:	2b0b      	cmp	r3, #11
 8019e80:	d801      	bhi.n	8019e86 <mem_trim+0x1e>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    newsize = MIN_SIZE_ALIGNED;
 8019e82:	230c      	movs	r3, #12
 8019e84:	627b      	str	r3, [r7, #36]	@ 0x24
  }
#if MEM_OVERFLOW_CHECK
  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
 8019e86:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019e88:	4a6e      	ldr	r2, [pc, #440]	@ (801a044 <mem_trim+0x1dc>)
 8019e8a:	4293      	cmp	r3, r2
 8019e8c:	d803      	bhi.n	8019e96 <mem_trim+0x2e>
 8019e8e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019e90:	683b      	ldr	r3, [r7, #0]
 8019e92:	429a      	cmp	r2, r3
 8019e94:	d201      	bcs.n	8019e9a <mem_trim+0x32>
    return NULL;
 8019e96:	2300      	movs	r3, #0
 8019e98:	e0d0      	b.n	801a03c <mem_trim+0x1d4>
  }

  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
 8019e9a:	4b6b      	ldr	r3, [pc, #428]	@ (801a048 <mem_trim+0x1e0>)
 8019e9c:	681b      	ldr	r3, [r3, #0]
 8019e9e:	687a      	ldr	r2, [r7, #4]
 8019ea0:	429a      	cmp	r2, r3
 8019ea2:	d304      	bcc.n	8019eae <mem_trim+0x46>
 8019ea4:	4b69      	ldr	r3, [pc, #420]	@ (801a04c <mem_trim+0x1e4>)
 8019ea6:	681b      	ldr	r3, [r3, #0]
 8019ea8:	687a      	ldr	r2, [r7, #4]
 8019eaa:	429a      	cmp	r2, r3
 8019eac:	d306      	bcc.n	8019ebc <mem_trim+0x54>
 8019eae:	4b68      	ldr	r3, [pc, #416]	@ (801a050 <mem_trim+0x1e8>)
 8019eb0:	f240 22d1 	movw	r2, #721	@ 0x2d1
 8019eb4:	4967      	ldr	r1, [pc, #412]	@ (801a054 <mem_trim+0x1ec>)
 8019eb6:	4868      	ldr	r0, [pc, #416]	@ (801a058 <mem_trim+0x1f0>)
 8019eb8:	f010 fc50 	bl	802a75c <iprintf>
              (u8_t *)rmem < (u8_t *)ram_end);

  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
 8019ebc:	4b62      	ldr	r3, [pc, #392]	@ (801a048 <mem_trim+0x1e0>)
 8019ebe:	681b      	ldr	r3, [r3, #0]
 8019ec0:	687a      	ldr	r2, [r7, #4]
 8019ec2:	429a      	cmp	r2, r3
 8019ec4:	d304      	bcc.n	8019ed0 <mem_trim+0x68>
 8019ec6:	4b61      	ldr	r3, [pc, #388]	@ (801a04c <mem_trim+0x1e4>)
 8019ec8:	681b      	ldr	r3, [r3, #0]
 8019eca:	687a      	ldr	r2, [r7, #4]
 8019ecc:	429a      	cmp	r2, r3
 8019ece:	d307      	bcc.n	8019ee0 <mem_trim+0x78>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 8019ed0:	f00d f9ae 	bl	8027230 <sys_arch_protect>
 8019ed4:	60b8      	str	r0, [r7, #8]
 8019ed6:	68b8      	ldr	r0, [r7, #8]
 8019ed8:	f00d f9b8 	bl	802724c <sys_arch_unprotect>
    return rmem;
 8019edc:	687b      	ldr	r3, [r7, #4]
 8019ede:	e0ad      	b.n	801a03c <mem_trim+0x1d4>
  }
  /* Get the corresponding struct mem ... */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 8019ee0:	687b      	ldr	r3, [r7, #4]
 8019ee2:	3b0c      	subs	r3, #12
 8019ee4:	623b      	str	r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* ... and its offset pointer */
  ptr = mem_to_ptr(mem);
 8019ee6:	6a38      	ldr	r0, [r7, #32]
 8019ee8:	f7ff fdf0 	bl	8019acc <mem_to_ptr>
 8019eec:	61f8      	str	r0, [r7, #28]

  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
 8019eee:	6a3b      	ldr	r3, [r7, #32]
 8019ef0:	681a      	ldr	r2, [r3, #0]
 8019ef2:	69fb      	ldr	r3, [r7, #28]
 8019ef4:	1ad3      	subs	r3, r2, r3
 8019ef6:	3b0c      	subs	r3, #12
 8019ef8:	61bb      	str	r3, [r7, #24]
  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
 8019efa:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019efc:	69bb      	ldr	r3, [r7, #24]
 8019efe:	429a      	cmp	r2, r3
 8019f00:	d906      	bls.n	8019f10 <mem_trim+0xa8>
 8019f02:	4b53      	ldr	r3, [pc, #332]	@ (801a050 <mem_trim+0x1e8>)
 8019f04:	f44f 7239 	mov.w	r2, #740	@ 0x2e4
 8019f08:	4954      	ldr	r1, [pc, #336]	@ (801a05c <mem_trim+0x1f4>)
 8019f0a:	4853      	ldr	r0, [pc, #332]	@ (801a058 <mem_trim+0x1f0>)
 8019f0c:	f010 fc26 	bl	802a75c <iprintf>
  if (newsize > size) {
 8019f10:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019f12:	69bb      	ldr	r3, [r7, #24]
 8019f14:	429a      	cmp	r2, r3
 8019f16:	d901      	bls.n	8019f1c <mem_trim+0xb4>
    /* not supported */
    return NULL;
 8019f18:	2300      	movs	r3, #0
 8019f1a:	e08f      	b.n	801a03c <mem_trim+0x1d4>
  }
  if (newsize == size) {
 8019f1c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8019f1e:	69bb      	ldr	r3, [r7, #24]
 8019f20:	429a      	cmp	r2, r3
 8019f22:	d101      	bne.n	8019f28 <mem_trim+0xc0>
    /* No change in size, simply return */
    return rmem;
 8019f24:	687b      	ldr	r3, [r7, #4]
 8019f26:	e089      	b.n	801a03c <mem_trim+0x1d4>
  }

  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 8019f28:	484d      	ldr	r0, [pc, #308]	@ (801a060 <mem_trim+0x1f8>)
 8019f2a:	f00d f945 	bl	80271b8 <sys_mutex_lock>

  mem2 = ptr_to_mem(mem->next);
 8019f2e:	6a3b      	ldr	r3, [r7, #32]
 8019f30:	681b      	ldr	r3, [r3, #0]
 8019f32:	4618      	mov	r0, r3
 8019f34:	f7ff fdba 	bl	8019aac <ptr_to_mem>
 8019f38:	6178      	str	r0, [r7, #20]
  if (mem2->used == 0) {
 8019f3a:	697b      	ldr	r3, [r7, #20]
 8019f3c:	7a1b      	ldrb	r3, [r3, #8]
 8019f3e:	2b00      	cmp	r3, #0
 8019f40:	d13c      	bne.n	8019fbc <mem_trim+0x154>
    /* The next struct is unused, we can simply move it at little */
    mem_size_t next;
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8019f42:	6a3b      	ldr	r3, [r7, #32]
 8019f44:	681b      	ldr	r3, [r3, #0]
 8019f46:	4a3f      	ldr	r2, [pc, #252]	@ (801a044 <mem_trim+0x1dc>)
 8019f48:	4293      	cmp	r3, r2
 8019f4a:	d106      	bne.n	8019f5a <mem_trim+0xf2>
 8019f4c:	4b40      	ldr	r3, [pc, #256]	@ (801a050 <mem_trim+0x1e8>)
 8019f4e:	f240 22f5 	movw	r2, #757	@ 0x2f5
 8019f52:	4944      	ldr	r1, [pc, #272]	@ (801a064 <mem_trim+0x1fc>)
 8019f54:	4840      	ldr	r0, [pc, #256]	@ (801a058 <mem_trim+0x1f0>)
 8019f56:	f010 fc01 	bl	802a75c <iprintf>
    /* remember the old next pointer */
    next = mem2->next;
 8019f5a:	697b      	ldr	r3, [r7, #20]
 8019f5c:	681b      	ldr	r3, [r3, #0]
 8019f5e:	60fb      	str	r3, [r7, #12]
    /* create new struct mem which is moved directly after the shrinked mem */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8019f60:	69fa      	ldr	r2, [r7, #28]
 8019f62:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019f64:	4413      	add	r3, r2
 8019f66:	330c      	adds	r3, #12
 8019f68:	613b      	str	r3, [r7, #16]
    if (lfree == mem2) {
 8019f6a:	4b3f      	ldr	r3, [pc, #252]	@ (801a068 <mem_trim+0x200>)
 8019f6c:	681b      	ldr	r3, [r3, #0]
 8019f6e:	697a      	ldr	r2, [r7, #20]
 8019f70:	429a      	cmp	r2, r3
 8019f72:	d105      	bne.n	8019f80 <mem_trim+0x118>
      lfree = ptr_to_mem(ptr2);
 8019f74:	6938      	ldr	r0, [r7, #16]
 8019f76:	f7ff fd99 	bl	8019aac <ptr_to_mem>
 8019f7a:	4603      	mov	r3, r0
 8019f7c:	4a3a      	ldr	r2, [pc, #232]	@ (801a068 <mem_trim+0x200>)
 8019f7e:	6013      	str	r3, [r2, #0]
    }
    mem2 = ptr_to_mem(ptr2);
 8019f80:	6938      	ldr	r0, [r7, #16]
 8019f82:	f7ff fd93 	bl	8019aac <ptr_to_mem>
 8019f86:	6178      	str	r0, [r7, #20]
    mem2->used = 0;
 8019f88:	697b      	ldr	r3, [r7, #20]
 8019f8a:	2200      	movs	r2, #0
 8019f8c:	721a      	strb	r2, [r3, #8]
    /* restore the next pointer */
    mem2->next = next;
 8019f8e:	697b      	ldr	r3, [r7, #20]
 8019f90:	68fa      	ldr	r2, [r7, #12]
 8019f92:	601a      	str	r2, [r3, #0]
    /* link it back to mem */
    mem2->prev = ptr;
 8019f94:	697b      	ldr	r3, [r7, #20]
 8019f96:	69fa      	ldr	r2, [r7, #28]
 8019f98:	605a      	str	r2, [r3, #4]
    /* link mem to it */
    mem->next = ptr2;
 8019f9a:	6a3b      	ldr	r3, [r7, #32]
 8019f9c:	693a      	ldr	r2, [r7, #16]
 8019f9e:	601a      	str	r2, [r3, #0]
    /* last thing to restore linked list: as we have moved mem2,
     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
     * the end of the heap */
    if (mem2->next != MEM_SIZE_ALIGNED) {
 8019fa0:	697b      	ldr	r3, [r7, #20]
 8019fa2:	681b      	ldr	r3, [r3, #0]
 8019fa4:	4a27      	ldr	r2, [pc, #156]	@ (801a044 <mem_trim+0x1dc>)
 8019fa6:	4293      	cmp	r3, r2
 8019fa8:	d044      	beq.n	801a034 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 8019faa:	697b      	ldr	r3, [r7, #20]
 8019fac:	681b      	ldr	r3, [r3, #0]
 8019fae:	4618      	mov	r0, r3
 8019fb0:	f7ff fd7c 	bl	8019aac <ptr_to_mem>
 8019fb4:	4602      	mov	r2, r0
 8019fb6:	693b      	ldr	r3, [r7, #16]
 8019fb8:	6053      	str	r3, [r2, #4]
 8019fba:	e03b      	b.n	801a034 <mem_trim+0x1cc>
    }
    MEM_STATS_DEC_USED(used, (size - newsize));
    /* no need to plug holes, we've already done that */
  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
 8019fbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019fbe:	3318      	adds	r3, #24
 8019fc0:	69ba      	ldr	r2, [r7, #24]
 8019fc2:	429a      	cmp	r2, r3
 8019fc4:	d336      	bcc.n	801a034 <mem_trim+0x1cc>
     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
     *       region that couldn't hold data, but when mem->next gets freed,
     *       the 2 regions would be combined, resulting in more free memory */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 8019fc6:	69fa      	ldr	r2, [r7, #28]
 8019fc8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019fca:	4413      	add	r3, r2
 8019fcc:	330c      	adds	r3, #12
 8019fce:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 8019fd0:	6a3b      	ldr	r3, [r7, #32]
 8019fd2:	681b      	ldr	r3, [r3, #0]
 8019fd4:	4a1b      	ldr	r2, [pc, #108]	@ (801a044 <mem_trim+0x1dc>)
 8019fd6:	4293      	cmp	r3, r2
 8019fd8:	d106      	bne.n	8019fe8 <mem_trim+0x180>
 8019fda:	4b1d      	ldr	r3, [pc, #116]	@ (801a050 <mem_trim+0x1e8>)
 8019fdc:	f240 3216 	movw	r2, #790	@ 0x316
 8019fe0:	4920      	ldr	r1, [pc, #128]	@ (801a064 <mem_trim+0x1fc>)
 8019fe2:	481d      	ldr	r0, [pc, #116]	@ (801a058 <mem_trim+0x1f0>)
 8019fe4:	f010 fbba 	bl	802a75c <iprintf>
    mem2 = ptr_to_mem(ptr2);
 8019fe8:	6938      	ldr	r0, [r7, #16]
 8019fea:	f7ff fd5f 	bl	8019aac <ptr_to_mem>
 8019fee:	6178      	str	r0, [r7, #20]
    if (mem2 < lfree) {
 8019ff0:	4b1d      	ldr	r3, [pc, #116]	@ (801a068 <mem_trim+0x200>)
 8019ff2:	681b      	ldr	r3, [r3, #0]
 8019ff4:	697a      	ldr	r2, [r7, #20]
 8019ff6:	429a      	cmp	r2, r3
 8019ff8:	d202      	bcs.n	801a000 <mem_trim+0x198>
      lfree = mem2;
 8019ffa:	4a1b      	ldr	r2, [pc, #108]	@ (801a068 <mem_trim+0x200>)
 8019ffc:	697b      	ldr	r3, [r7, #20]
 8019ffe:	6013      	str	r3, [r2, #0]
    }
    mem2->used = 0;
 801a000:	697b      	ldr	r3, [r7, #20]
 801a002:	2200      	movs	r2, #0
 801a004:	721a      	strb	r2, [r3, #8]
    mem2->next = mem->next;
 801a006:	6a3b      	ldr	r3, [r7, #32]
 801a008:	681a      	ldr	r2, [r3, #0]
 801a00a:	697b      	ldr	r3, [r7, #20]
 801a00c:	601a      	str	r2, [r3, #0]
    mem2->prev = ptr;
 801a00e:	697b      	ldr	r3, [r7, #20]
 801a010:	69fa      	ldr	r2, [r7, #28]
 801a012:	605a      	str	r2, [r3, #4]
    mem->next = ptr2;
 801a014:	6a3b      	ldr	r3, [r7, #32]
 801a016:	693a      	ldr	r2, [r7, #16]
 801a018:	601a      	str	r2, [r3, #0]
    if (mem2->next != MEM_SIZE_ALIGNED) {
 801a01a:	697b      	ldr	r3, [r7, #20]
 801a01c:	681b      	ldr	r3, [r3, #0]
 801a01e:	4a09      	ldr	r2, [pc, #36]	@ (801a044 <mem_trim+0x1dc>)
 801a020:	4293      	cmp	r3, r2
 801a022:	d007      	beq.n	801a034 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 801a024:	697b      	ldr	r3, [r7, #20]
 801a026:	681b      	ldr	r3, [r3, #0]
 801a028:	4618      	mov	r0, r3
 801a02a:	f7ff fd3f 	bl	8019aac <ptr_to_mem>
 801a02e:	4602      	mov	r2, r0
 801a030:	693b      	ldr	r3, [r7, #16]
 801a032:	6053      	str	r3, [r2, #4]
#endif
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 801a034:	480a      	ldr	r0, [pc, #40]	@ (801a060 <mem_trim+0x1f8>)
 801a036:	f00d f8ce 	bl	80271d6 <sys_mutex_unlock>
  return rmem;
 801a03a:	687b      	ldr	r3, [r7, #4]
}
 801a03c:	4618      	mov	r0, r3
 801a03e:	3728      	adds	r7, #40	@ 0x28
 801a040:	46bd      	mov	sp, r7
 801a042:	bd80      	pop	{r7, pc}
 801a044:	0001ffe8 	.word	0x0001ffe8
 801a048:	24024430 	.word	0x24024430
 801a04c:	24024434 	.word	0x24024434
 801a050:	0802e960 	.word	0x0802e960
 801a054:	0802eaec 	.word	0x0802eaec
 801a058:	0802e9a8 	.word	0x0802e9a8
 801a05c:	0802eb04 	.word	0x0802eb04
 801a060:	24024438 	.word	0x24024438
 801a064:	0802eb24 	.word	0x0802eb24
 801a068:	2402443c 	.word	0x2402443c

0801a06c <mem_malloc>:
 *
 * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
 */
void *
mem_malloc(mem_size_t size_in)
{
 801a06c:	b580      	push	{r7, lr}
 801a06e:	b088      	sub	sp, #32
 801a070:	af00      	add	r7, sp, #0
 801a072:	6078      	str	r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_ALLOC_DECL_PROTECT();

  if (size_in == 0) {
 801a074:	687b      	ldr	r3, [r7, #4]
 801a076:	2b00      	cmp	r3, #0
 801a078:	d101      	bne.n	801a07e <mem_malloc+0x12>
    return NULL;
 801a07a:	2300      	movs	r3, #0
 801a07c:	e0d9      	b.n	801a232 <mem_malloc+0x1c6>
  }

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
 801a07e:	687b      	ldr	r3, [r7, #4]
 801a080:	3303      	adds	r3, #3
 801a082:	f023 0303 	bic.w	r3, r3, #3
 801a086:	61bb      	str	r3, [r7, #24]
  if (size < MIN_SIZE_ALIGNED) {
 801a088:	69bb      	ldr	r3, [r7, #24]
 801a08a:	2b0b      	cmp	r3, #11
 801a08c:	d801      	bhi.n	801a092 <mem_malloc+0x26>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    size = MIN_SIZE_ALIGNED;
 801a08e:	230c      	movs	r3, #12
 801a090:	61bb      	str	r3, [r7, #24]
  }
#if MEM_OVERFLOW_CHECK
  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
 801a092:	69bb      	ldr	r3, [r7, #24]
 801a094:	4a69      	ldr	r2, [pc, #420]	@ (801a23c <mem_malloc+0x1d0>)
 801a096:	4293      	cmp	r3, r2
 801a098:	d803      	bhi.n	801a0a2 <mem_malloc+0x36>
 801a09a:	69ba      	ldr	r2, [r7, #24]
 801a09c:	687b      	ldr	r3, [r7, #4]
 801a09e:	429a      	cmp	r2, r3
 801a0a0:	d201      	bcs.n	801a0a6 <mem_malloc+0x3a>
    return NULL;
 801a0a2:	2300      	movs	r3, #0
 801a0a4:	e0c5      	b.n	801a232 <mem_malloc+0x1c6>
  }

  /* protect the heap from concurrent access */
  sys_mutex_lock(&mem_mutex);
 801a0a6:	4866      	ldr	r0, [pc, #408]	@ (801a240 <mem_malloc+0x1d4>)
 801a0a8:	f00d f886 	bl	80271b8 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

    /* Scan through the heap searching for a free block that is big enough,
     * beginning with the lowest free block.
     */
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801a0ac:	4b65      	ldr	r3, [pc, #404]	@ (801a244 <mem_malloc+0x1d8>)
 801a0ae:	681b      	ldr	r3, [r3, #0]
 801a0b0:	4618      	mov	r0, r3
 801a0b2:	f7ff fd0b 	bl	8019acc <mem_to_ptr>
 801a0b6:	61f8      	str	r0, [r7, #28]
 801a0b8:	e0b0      	b.n	801a21c <mem_malloc+0x1b0>
         ptr = ptr_to_mem(ptr)->next) {
      mem = ptr_to_mem(ptr);
 801a0ba:	69f8      	ldr	r0, [r7, #28]
 801a0bc:	f7ff fcf6 	bl	8019aac <ptr_to_mem>
 801a0c0:	6138      	str	r0, [r7, #16]
        local_mem_free_count = 1;
        break;
      }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

      if ((!mem->used) &&
 801a0c2:	693b      	ldr	r3, [r7, #16]
 801a0c4:	7a1b      	ldrb	r3, [r3, #8]
 801a0c6:	2b00      	cmp	r3, #0
 801a0c8:	f040 80a2 	bne.w	801a210 <mem_malloc+0x1a4>
          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
 801a0cc:	693b      	ldr	r3, [r7, #16]
 801a0ce:	681a      	ldr	r2, [r3, #0]
 801a0d0:	69fb      	ldr	r3, [r7, #28]
 801a0d2:	1ad3      	subs	r3, r2, r3
 801a0d4:	3b0c      	subs	r3, #12
      if ((!mem->used) &&
 801a0d6:	69ba      	ldr	r2, [r7, #24]
 801a0d8:	429a      	cmp	r2, r3
 801a0da:	f200 8099 	bhi.w	801a210 <mem_malloc+0x1a4>
        /* mem is not used and at least perfect fit is possible:
         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */

        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
 801a0de:	693b      	ldr	r3, [r7, #16]
 801a0e0:	681a      	ldr	r2, [r3, #0]
 801a0e2:	69fb      	ldr	r3, [r7, #28]
 801a0e4:	1ad3      	subs	r3, r2, r3
 801a0e6:	f1a3 020c 	sub.w	r2, r3, #12
 801a0ea:	69bb      	ldr	r3, [r7, #24]
 801a0ec:	3318      	adds	r3, #24
 801a0ee:	429a      	cmp	r2, r3
 801a0f0:	d331      	bcc.n	801a156 <mem_malloc+0xea>
           * struct mem would fit in but no data between mem2 and mem2->next
           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
           *       region that couldn't hold data, but when mem->next gets freed,
           *       the 2 regions would be combined, resulting in more free memory
           */
          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
 801a0f2:	69fa      	ldr	r2, [r7, #28]
 801a0f4:	69bb      	ldr	r3, [r7, #24]
 801a0f6:	4413      	add	r3, r2
 801a0f8:	330c      	adds	r3, #12
 801a0fa:	60fb      	str	r3, [r7, #12]
          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
 801a0fc:	68fb      	ldr	r3, [r7, #12]
 801a0fe:	4a4f      	ldr	r2, [pc, #316]	@ (801a23c <mem_malloc+0x1d0>)
 801a100:	4293      	cmp	r3, r2
 801a102:	d106      	bne.n	801a112 <mem_malloc+0xa6>
 801a104:	4b50      	ldr	r3, [pc, #320]	@ (801a248 <mem_malloc+0x1dc>)
 801a106:	f240 3287 	movw	r2, #903	@ 0x387
 801a10a:	4950      	ldr	r1, [pc, #320]	@ (801a24c <mem_malloc+0x1e0>)
 801a10c:	4850      	ldr	r0, [pc, #320]	@ (801a250 <mem_malloc+0x1e4>)
 801a10e:	f010 fb25 	bl	802a75c <iprintf>
          /* create mem2 struct */
          mem2 = ptr_to_mem(ptr2);
 801a112:	68f8      	ldr	r0, [r7, #12]
 801a114:	f7ff fcca 	bl	8019aac <ptr_to_mem>
 801a118:	60b8      	str	r0, [r7, #8]
          mem2->used = 0;
 801a11a:	68bb      	ldr	r3, [r7, #8]
 801a11c:	2200      	movs	r2, #0
 801a11e:	721a      	strb	r2, [r3, #8]
          mem2->next = mem->next;
 801a120:	693b      	ldr	r3, [r7, #16]
 801a122:	681a      	ldr	r2, [r3, #0]
 801a124:	68bb      	ldr	r3, [r7, #8]
 801a126:	601a      	str	r2, [r3, #0]
          mem2->prev = ptr;
 801a128:	68bb      	ldr	r3, [r7, #8]
 801a12a:	69fa      	ldr	r2, [r7, #28]
 801a12c:	605a      	str	r2, [r3, #4]
          /* and insert it between mem and mem->next */
          mem->next = ptr2;
 801a12e:	693b      	ldr	r3, [r7, #16]
 801a130:	68fa      	ldr	r2, [r7, #12]
 801a132:	601a      	str	r2, [r3, #0]
          mem->used = 1;
 801a134:	693b      	ldr	r3, [r7, #16]
 801a136:	2201      	movs	r2, #1
 801a138:	721a      	strb	r2, [r3, #8]

          if (mem2->next != MEM_SIZE_ALIGNED) {
 801a13a:	68bb      	ldr	r3, [r7, #8]
 801a13c:	681b      	ldr	r3, [r3, #0]
 801a13e:	4a3f      	ldr	r2, [pc, #252]	@ (801a23c <mem_malloc+0x1d0>)
 801a140:	4293      	cmp	r3, r2
 801a142:	d00b      	beq.n	801a15c <mem_malloc+0xf0>
            ptr_to_mem(mem2->next)->prev = ptr2;
 801a144:	68bb      	ldr	r3, [r7, #8]
 801a146:	681b      	ldr	r3, [r3, #0]
 801a148:	4618      	mov	r0, r3
 801a14a:	f7ff fcaf 	bl	8019aac <ptr_to_mem>
 801a14e:	4602      	mov	r2, r0
 801a150:	68fb      	ldr	r3, [r7, #12]
 801a152:	6053      	str	r3, [r2, #4]
 801a154:	e002      	b.n	801a15c <mem_malloc+0xf0>
           * take care of this).
           * -> near fit or exact fit: do not split, no mem2 creation
           * also can't move mem->next directly behind mem, since mem->next
           * will always be used at this point!
           */
          mem->used = 1;
 801a156:	693b      	ldr	r3, [r7, #16]
 801a158:	2201      	movs	r2, #1
 801a15a:	721a      	strb	r2, [r3, #8]
          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
        }
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
        if (mem == lfree) {
 801a15c:	4b39      	ldr	r3, [pc, #228]	@ (801a244 <mem_malloc+0x1d8>)
 801a15e:	681b      	ldr	r3, [r3, #0]
 801a160:	693a      	ldr	r2, [r7, #16]
 801a162:	429a      	cmp	r2, r3
 801a164:	d127      	bne.n	801a1b6 <mem_malloc+0x14a>
          struct mem *cur = lfree;
 801a166:	4b37      	ldr	r3, [pc, #220]	@ (801a244 <mem_malloc+0x1d8>)
 801a168:	681b      	ldr	r3, [r3, #0]
 801a16a:	617b      	str	r3, [r7, #20]
          /* Find next free block after mem and update lowest free pointer */
          while (cur->used && cur != ram_end) {
 801a16c:	e005      	b.n	801a17a <mem_malloc+0x10e>
              /* If mem_free or mem_trim have run, we have to restart since they
                 could have altered our current struct mem or lfree. */
              goto mem_malloc_adjust_lfree;
            }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
            cur = ptr_to_mem(cur->next);
 801a16e:	697b      	ldr	r3, [r7, #20]
 801a170:	681b      	ldr	r3, [r3, #0]
 801a172:	4618      	mov	r0, r3
 801a174:	f7ff fc9a 	bl	8019aac <ptr_to_mem>
 801a178:	6178      	str	r0, [r7, #20]
          while (cur->used && cur != ram_end) {
 801a17a:	697b      	ldr	r3, [r7, #20]
 801a17c:	7a1b      	ldrb	r3, [r3, #8]
 801a17e:	2b00      	cmp	r3, #0
 801a180:	d004      	beq.n	801a18c <mem_malloc+0x120>
 801a182:	4b34      	ldr	r3, [pc, #208]	@ (801a254 <mem_malloc+0x1e8>)
 801a184:	681b      	ldr	r3, [r3, #0]
 801a186:	697a      	ldr	r2, [r7, #20]
 801a188:	429a      	cmp	r2, r3
 801a18a:	d1f0      	bne.n	801a16e <mem_malloc+0x102>
          }
          lfree = cur;
 801a18c:	4a2d      	ldr	r2, [pc, #180]	@ (801a244 <mem_malloc+0x1d8>)
 801a18e:	697b      	ldr	r3, [r7, #20]
 801a190:	6013      	str	r3, [r2, #0]
          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
 801a192:	4b2c      	ldr	r3, [pc, #176]	@ (801a244 <mem_malloc+0x1d8>)
 801a194:	681a      	ldr	r2, [r3, #0]
 801a196:	4b2f      	ldr	r3, [pc, #188]	@ (801a254 <mem_malloc+0x1e8>)
 801a198:	681b      	ldr	r3, [r3, #0]
 801a19a:	429a      	cmp	r2, r3
 801a19c:	d00b      	beq.n	801a1b6 <mem_malloc+0x14a>
 801a19e:	4b29      	ldr	r3, [pc, #164]	@ (801a244 <mem_malloc+0x1d8>)
 801a1a0:	681b      	ldr	r3, [r3, #0]
 801a1a2:	7a1b      	ldrb	r3, [r3, #8]
 801a1a4:	2b00      	cmp	r3, #0
 801a1a6:	d006      	beq.n	801a1b6 <mem_malloc+0x14a>
 801a1a8:	4b27      	ldr	r3, [pc, #156]	@ (801a248 <mem_malloc+0x1dc>)
 801a1aa:	f240 32b5 	movw	r2, #949	@ 0x3b5
 801a1ae:	492a      	ldr	r1, [pc, #168]	@ (801a258 <mem_malloc+0x1ec>)
 801a1b0:	4827      	ldr	r0, [pc, #156]	@ (801a250 <mem_malloc+0x1e4>)
 801a1b2:	f010 fad3 	bl	802a75c <iprintf>
        }
        LWIP_MEM_ALLOC_UNPROTECT();
        sys_mutex_unlock(&mem_mutex);
 801a1b6:	4822      	ldr	r0, [pc, #136]	@ (801a240 <mem_malloc+0x1d4>)
 801a1b8:	f00d f80d 	bl	80271d6 <sys_mutex_unlock>
        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
 801a1bc:	693a      	ldr	r2, [r7, #16]
 801a1be:	69bb      	ldr	r3, [r7, #24]
 801a1c0:	4413      	add	r3, r2
 801a1c2:	330c      	adds	r3, #12
 801a1c4:	4a23      	ldr	r2, [pc, #140]	@ (801a254 <mem_malloc+0x1e8>)
 801a1c6:	6812      	ldr	r2, [r2, #0]
 801a1c8:	4293      	cmp	r3, r2
 801a1ca:	d906      	bls.n	801a1da <mem_malloc+0x16e>
 801a1cc:	4b1e      	ldr	r3, [pc, #120]	@ (801a248 <mem_malloc+0x1dc>)
 801a1ce:	f240 32b9 	movw	r2, #953	@ 0x3b9
 801a1d2:	4922      	ldr	r1, [pc, #136]	@ (801a25c <mem_malloc+0x1f0>)
 801a1d4:	481e      	ldr	r0, [pc, #120]	@ (801a250 <mem_malloc+0x1e4>)
 801a1d6:	f010 fac1 	bl	802a75c <iprintf>
                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
 801a1da:	693b      	ldr	r3, [r7, #16]
 801a1dc:	f003 0303 	and.w	r3, r3, #3
 801a1e0:	2b00      	cmp	r3, #0
 801a1e2:	d006      	beq.n	801a1f2 <mem_malloc+0x186>
 801a1e4:	4b18      	ldr	r3, [pc, #96]	@ (801a248 <mem_malloc+0x1dc>)
 801a1e6:	f240 32bb 	movw	r2, #955	@ 0x3bb
 801a1ea:	491d      	ldr	r1, [pc, #116]	@ (801a260 <mem_malloc+0x1f4>)
 801a1ec:	4818      	ldr	r0, [pc, #96]	@ (801a250 <mem_malloc+0x1e4>)
 801a1ee:	f010 fab5 	bl	802a75c <iprintf>
                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
        LWIP_ASSERT("mem_malloc: sanity check alignment",
 801a1f2:	693b      	ldr	r3, [r7, #16]
 801a1f4:	f003 0303 	and.w	r3, r3, #3
 801a1f8:	2b00      	cmp	r3, #0
 801a1fa:	d006      	beq.n	801a20a <mem_malloc+0x19e>
 801a1fc:	4b12      	ldr	r3, [pc, #72]	@ (801a248 <mem_malloc+0x1dc>)
 801a1fe:	f240 32bd 	movw	r2, #957	@ 0x3bd
 801a202:	4918      	ldr	r1, [pc, #96]	@ (801a264 <mem_malloc+0x1f8>)
 801a204:	4812      	ldr	r0, [pc, #72]	@ (801a250 <mem_malloc+0x1e4>)
 801a206:	f010 faa9 	bl	802a75c <iprintf>

#if MEM_OVERFLOW_CHECK
        mem_overflow_init_element(mem, size_in);
#endif
        MEM_SANITY();
        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
 801a20a:	693b      	ldr	r3, [r7, #16]
 801a20c:	330c      	adds	r3, #12
 801a20e:	e010      	b.n	801a232 <mem_malloc+0x1c6>
         ptr = ptr_to_mem(ptr)->next) {
 801a210:	69f8      	ldr	r0, [r7, #28]
 801a212:	f7ff fc4b 	bl	8019aac <ptr_to_mem>
 801a216:	4603      	mov	r3, r0
 801a218:	681b      	ldr	r3, [r3, #0]
 801a21a:	61fb      	str	r3, [r7, #28]
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801a21c:	69ba      	ldr	r2, [r7, #24]
 801a21e:	4b07      	ldr	r3, [pc, #28]	@ (801a23c <mem_malloc+0x1d0>)
 801a220:	1a9b      	subs	r3, r3, r2
 801a222:	69fa      	ldr	r2, [r7, #28]
 801a224:	429a      	cmp	r2, r3
 801a226:	f4ff af48 	bcc.w	801a0ba <mem_malloc+0x4e>
    /* if we got interrupted by a mem_free, try again */
  } while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  MEM_STATS_INC(err);
  LWIP_MEM_ALLOC_UNPROTECT();
  sys_mutex_unlock(&mem_mutex);
 801a22a:	4805      	ldr	r0, [pc, #20]	@ (801a240 <mem_malloc+0x1d4>)
 801a22c:	f00c ffd3 	bl	80271d6 <sys_mutex_unlock>
  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
  return NULL;
 801a230:	2300      	movs	r3, #0
}
 801a232:	4618      	mov	r0, r3
 801a234:	3720      	adds	r7, #32
 801a236:	46bd      	mov	sp, r7
 801a238:	bd80      	pop	{r7, pc}
 801a23a:	bf00      	nop
 801a23c:	0001ffe8 	.word	0x0001ffe8
 801a240:	24024438 	.word	0x24024438
 801a244:	2402443c 	.word	0x2402443c
 801a248:	0802e960 	.word	0x0802e960
 801a24c:	0802eb24 	.word	0x0802eb24
 801a250:	0802e9a8 	.word	0x0802e9a8
 801a254:	24024434 	.word	0x24024434
 801a258:	0802eb38 	.word	0x0802eb38
 801a25c:	0802eb54 	.word	0x0802eb54
 801a260:	0802eb84 	.word	0x0802eb84
 801a264:	0802ebb4 	.word	0x0802ebb4

0801a268 <memp_init_pool>:
 *
 * @param desc pool to initialize
 */
void
memp_init_pool(const struct memp_desc *desc)
{
 801a268:	b480      	push	{r7}
 801a26a:	b085      	sub	sp, #20
 801a26c:	af00      	add	r7, sp, #0
 801a26e:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(desc);
#else
  int i;
  struct memp *memp;

  *desc->tab = NULL;
 801a270:	687b      	ldr	r3, [r7, #4]
 801a272:	68db      	ldr	r3, [r3, #12]
 801a274:	2200      	movs	r2, #0
 801a276:	601a      	str	r2, [r3, #0]
  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
 801a278:	687b      	ldr	r3, [r7, #4]
 801a27a:	689b      	ldr	r3, [r3, #8]
 801a27c:	3303      	adds	r3, #3
 801a27e:	f023 0303 	bic.w	r3, r3, #3
 801a282:	60bb      	str	r3, [r7, #8]
                                       + MEM_SANITY_REGION_AFTER_ALIGNED
#endif
                                      ));
#endif
  /* create a linked list of memp elements */
  for (i = 0; i < desc->num; ++i) {
 801a284:	2300      	movs	r3, #0
 801a286:	60fb      	str	r3, [r7, #12]
 801a288:	e011      	b.n	801a2ae <memp_init_pool+0x46>
    memp->next = *desc->tab;
 801a28a:	687b      	ldr	r3, [r7, #4]
 801a28c:	68db      	ldr	r3, [r3, #12]
 801a28e:	681a      	ldr	r2, [r3, #0]
 801a290:	68bb      	ldr	r3, [r7, #8]
 801a292:	601a      	str	r2, [r3, #0]
    *desc->tab = memp;
 801a294:	687b      	ldr	r3, [r7, #4]
 801a296:	68db      	ldr	r3, [r3, #12]
 801a298:	68ba      	ldr	r2, [r7, #8]
 801a29a:	601a      	str	r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
    /* cast through void* to get rid of alignment warnings */
    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
 801a29c:	687b      	ldr	r3, [r7, #4]
 801a29e:	889b      	ldrh	r3, [r3, #4]
 801a2a0:	461a      	mov	r2, r3
 801a2a2:	68bb      	ldr	r3, [r7, #8]
 801a2a4:	4413      	add	r3, r2
 801a2a6:	60bb      	str	r3, [r7, #8]
  for (i = 0; i < desc->num; ++i) {
 801a2a8:	68fb      	ldr	r3, [r7, #12]
 801a2aa:	3301      	adds	r3, #1
 801a2ac:	60fb      	str	r3, [r7, #12]
 801a2ae:	687b      	ldr	r3, [r7, #4]
 801a2b0:	88db      	ldrh	r3, [r3, #6]
 801a2b2:	461a      	mov	r2, r3
 801a2b4:	68fb      	ldr	r3, [r7, #12]
 801a2b6:	4293      	cmp	r3, r2
 801a2b8:	dbe7      	blt.n	801a28a <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */

#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
  desc->stats->name  = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
 801a2ba:	bf00      	nop
 801a2bc:	bf00      	nop
 801a2be:	3714      	adds	r7, #20
 801a2c0:	46bd      	mov	sp, r7
 801a2c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a2c6:	4770      	bx	lr

0801a2c8 <memp_init>:
 *
 * Carves out memp_memory into linked lists for each pool-type.
 */
void
memp_init(void)
{
 801a2c8:	b580      	push	{r7, lr}
 801a2ca:	b082      	sub	sp, #8
 801a2cc:	af00      	add	r7, sp, #0
  u16_t i;

  /* for every pool: */
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801a2ce:	2300      	movs	r3, #0
 801a2d0:	80fb      	strh	r3, [r7, #6]
 801a2d2:	e009      	b.n	801a2e8 <memp_init+0x20>
    memp_init_pool(memp_pools[i]);
 801a2d4:	88fb      	ldrh	r3, [r7, #6]
 801a2d6:	4a08      	ldr	r2, [pc, #32]	@ (801a2f8 <memp_init+0x30>)
 801a2d8:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a2dc:	4618      	mov	r0, r3
 801a2de:	f7ff ffc3 	bl	801a268 <memp_init_pool>
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801a2e2:	88fb      	ldrh	r3, [r7, #6]
 801a2e4:	3301      	adds	r3, #1
 801a2e6:	80fb      	strh	r3, [r7, #6]
 801a2e8:	88fb      	ldrh	r3, [r7, #6]
 801a2ea:	2b0c      	cmp	r3, #12
 801a2ec:	d9f2      	bls.n	801a2d4 <memp_init+0xc>

#if MEMP_OVERFLOW_CHECK >= 2
  /* check everything a first time to see if it worked */
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
 801a2ee:	bf00      	nop
 801a2f0:	bf00      	nop
 801a2f2:	3708      	adds	r7, #8
 801a2f4:	46bd      	mov	sp, r7
 801a2f6:	bd80      	pop	{r7, pc}
 801a2f8:	08031ad4 	.word	0x08031ad4

0801a2fc <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 801a2fc:	b580      	push	{r7, lr}
 801a2fe:	b084      	sub	sp, #16
 801a300:	af00      	add	r7, sp, #0
 801a302:	6078      	str	r0, [r7, #4]

#if MEMP_MEM_MALLOC
  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
  SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
  SYS_ARCH_PROTECT(old_level);
 801a304:	f00c ff94 	bl	8027230 <sys_arch_protect>
 801a308:	60f8      	str	r0, [r7, #12]

  memp = *desc->tab;
 801a30a:	687b      	ldr	r3, [r7, #4]
 801a30c:	68db      	ldr	r3, [r3, #12]
 801a30e:	681b      	ldr	r3, [r3, #0]
 801a310:	60bb      	str	r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */

  if (memp != NULL) {
 801a312:	68bb      	ldr	r3, [r7, #8]
 801a314:	2b00      	cmp	r3, #0
 801a316:	d015      	beq.n	801a344 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
    memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */

    *desc->tab = memp->next;
 801a318:	687b      	ldr	r3, [r7, #4]
 801a31a:	68db      	ldr	r3, [r3, #12]
 801a31c:	68ba      	ldr	r2, [r7, #8]
 801a31e:	6812      	ldr	r2, [r2, #0]
 801a320:	601a      	str	r2, [r3, #0]
    memp->line = line;
#if MEMP_MEM_MALLOC
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
    LWIP_ASSERT("memp_malloc: memp properly aligned",
 801a322:	68bb      	ldr	r3, [r7, #8]
 801a324:	f003 0303 	and.w	r3, r3, #3
 801a328:	2b00      	cmp	r3, #0
 801a32a:	d006      	beq.n	801a33a <do_memp_malloc_pool+0x3e>
 801a32c:	4b09      	ldr	r3, [pc, #36]	@ (801a354 <do_memp_malloc_pool+0x58>)
 801a32e:	f44f 728c 	mov.w	r2, #280	@ 0x118
 801a332:	4909      	ldr	r1, [pc, #36]	@ (801a358 <do_memp_malloc_pool+0x5c>)
 801a334:	4809      	ldr	r0, [pc, #36]	@ (801a35c <do_memp_malloc_pool+0x60>)
 801a336:	f010 fa11 	bl	802a75c <iprintf>
    desc->stats->used++;
    if (desc->stats->used > desc->stats->max) {
      desc->stats->max = desc->stats->used;
    }
#endif
    SYS_ARCH_UNPROTECT(old_level);
 801a33a:	68f8      	ldr	r0, [r7, #12]
 801a33c:	f00c ff86 	bl	802724c <sys_arch_unprotect>
    /* cast through u8_t* to get rid of alignment warnings */
    return ((u8_t *)memp + MEMP_SIZE);
 801a340:	68bb      	ldr	r3, [r7, #8]
 801a342:	e003      	b.n	801a34c <do_memp_malloc_pool+0x50>
  } else {
#if MEMP_STATS
    desc->stats->err++;
#endif
    SYS_ARCH_UNPROTECT(old_level);
 801a344:	68f8      	ldr	r0, [r7, #12]
 801a346:	f00c ff81 	bl	802724c <sys_arch_unprotect>
    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
  }

  return NULL;
 801a34a:	2300      	movs	r3, #0
}
 801a34c:	4618      	mov	r0, r3
 801a34e:	3710      	adds	r7, #16
 801a350:	46bd      	mov	sp, r7
 801a352:	bd80      	pop	{r7, pc}
 801a354:	0802ec70 	.word	0x0802ec70
 801a358:	0802eca0 	.word	0x0802eca0
 801a35c:	0802ecc4 	.word	0x0802ecc4

0801a360 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 801a360:	b580      	push	{r7, lr}
 801a362:	b082      	sub	sp, #8
 801a364:	af00      	add	r7, sp, #0
 801a366:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 801a368:	687b      	ldr	r3, [r7, #4]
 801a36a:	2b00      	cmp	r3, #0
 801a36c:	d106      	bne.n	801a37c <memp_malloc_pool+0x1c>
 801a36e:	4b0a      	ldr	r3, [pc, #40]	@ (801a398 <memp_malloc_pool+0x38>)
 801a370:	f44f 729e 	mov.w	r2, #316	@ 0x13c
 801a374:	4909      	ldr	r1, [pc, #36]	@ (801a39c <memp_malloc_pool+0x3c>)
 801a376:	480a      	ldr	r0, [pc, #40]	@ (801a3a0 <memp_malloc_pool+0x40>)
 801a378:	f010 f9f0 	bl	802a75c <iprintf>
  if (desc == NULL) {
 801a37c:	687b      	ldr	r3, [r7, #4]
 801a37e:	2b00      	cmp	r3, #0
 801a380:	d101      	bne.n	801a386 <memp_malloc_pool+0x26>
    return NULL;
 801a382:	2300      	movs	r3, #0
 801a384:	e003      	b.n	801a38e <memp_malloc_pool+0x2e>
  }

#if !MEMP_OVERFLOW_CHECK
  return do_memp_malloc_pool(desc);
 801a386:	6878      	ldr	r0, [r7, #4]
 801a388:	f7ff ffb8 	bl	801a2fc <do_memp_malloc_pool>
 801a38c:	4603      	mov	r3, r0
#else
  return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
 801a38e:	4618      	mov	r0, r3
 801a390:	3708      	adds	r7, #8
 801a392:	46bd      	mov	sp, r7
 801a394:	bd80      	pop	{r7, pc}
 801a396:	bf00      	nop
 801a398:	0802ec70 	.word	0x0802ec70
 801a39c:	0802ecec 	.word	0x0802ecec
 801a3a0:	0802ecc4 	.word	0x0802ecc4

0801a3a4 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
 801a3a4:	b580      	push	{r7, lr}
 801a3a6:	b084      	sub	sp, #16
 801a3a8:	af00      	add	r7, sp, #0
 801a3aa:	4603      	mov	r3, r0
 801a3ac:	71fb      	strb	r3, [r7, #7]
  void *memp;
  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
 801a3ae:	79fb      	ldrb	r3, [r7, #7]
 801a3b0:	2b0c      	cmp	r3, #12
 801a3b2:	d908      	bls.n	801a3c6 <memp_malloc+0x22>
 801a3b4:	4b0a      	ldr	r3, [pc, #40]	@ (801a3e0 <memp_malloc+0x3c>)
 801a3b6:	f240 1257 	movw	r2, #343	@ 0x157
 801a3ba:	490a      	ldr	r1, [pc, #40]	@ (801a3e4 <memp_malloc+0x40>)
 801a3bc:	480a      	ldr	r0, [pc, #40]	@ (801a3e8 <memp_malloc+0x44>)
 801a3be:	f010 f9cd 	bl	802a75c <iprintf>
 801a3c2:	2300      	movs	r3, #0
 801a3c4:	e008      	b.n	801a3d8 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */

#if !MEMP_OVERFLOW_CHECK
  memp = do_memp_malloc_pool(memp_pools[type]);
 801a3c6:	79fb      	ldrb	r3, [r7, #7]
 801a3c8:	4a08      	ldr	r2, [pc, #32]	@ (801a3ec <memp_malloc+0x48>)
 801a3ca:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a3ce:	4618      	mov	r0, r3
 801a3d0:	f7ff ff94 	bl	801a2fc <do_memp_malloc_pool>
 801a3d4:	60f8      	str	r0, [r7, #12]
#else
  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif

  return memp;
 801a3d6:	68fb      	ldr	r3, [r7, #12]
}
 801a3d8:	4618      	mov	r0, r3
 801a3da:	3710      	adds	r7, #16
 801a3dc:	46bd      	mov	sp, r7
 801a3de:	bd80      	pop	{r7, pc}
 801a3e0:	0802ec70 	.word	0x0802ec70
 801a3e4:	0802ed00 	.word	0x0802ed00
 801a3e8:	0802ecc4 	.word	0x0802ecc4
 801a3ec:	08031ad4 	.word	0x08031ad4

0801a3f0 <do_memp_free_pool>:

static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
 801a3f0:	b580      	push	{r7, lr}
 801a3f2:	b084      	sub	sp, #16
 801a3f4:	af00      	add	r7, sp, #0
 801a3f6:	6078      	str	r0, [r7, #4]
 801a3f8:	6039      	str	r1, [r7, #0]
  struct memp *memp;
  SYS_ARCH_DECL_PROTECT(old_level);

  LWIP_ASSERT("memp_free: mem properly aligned",
 801a3fa:	683b      	ldr	r3, [r7, #0]
 801a3fc:	f003 0303 	and.w	r3, r3, #3
 801a400:	2b00      	cmp	r3, #0
 801a402:	d006      	beq.n	801a412 <do_memp_free_pool+0x22>
 801a404:	4b0d      	ldr	r3, [pc, #52]	@ (801a43c <do_memp_free_pool+0x4c>)
 801a406:	f44f 72b6 	mov.w	r2, #364	@ 0x16c
 801a40a:	490d      	ldr	r1, [pc, #52]	@ (801a440 <do_memp_free_pool+0x50>)
 801a40c:	480d      	ldr	r0, [pc, #52]	@ (801a444 <do_memp_free_pool+0x54>)
 801a40e:	f010 f9a5 	bl	802a75c <iprintf>
              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);

  /* cast through void* to get rid of alignment warnings */
  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
 801a412:	683b      	ldr	r3, [r7, #0]
 801a414:	60fb      	str	r3, [r7, #12]

  SYS_ARCH_PROTECT(old_level);
 801a416:	f00c ff0b 	bl	8027230 <sys_arch_protect>
 801a41a:	60b8      	str	r0, [r7, #8]
#if MEMP_MEM_MALLOC
  LWIP_UNUSED_ARG(desc);
  SYS_ARCH_UNPROTECT(old_level);
  mem_free(memp);
#else /* MEMP_MEM_MALLOC */
  memp->next = *desc->tab;
 801a41c:	687b      	ldr	r3, [r7, #4]
 801a41e:	68db      	ldr	r3, [r3, #12]
 801a420:	681a      	ldr	r2, [r3, #0]
 801a422:	68fb      	ldr	r3, [r7, #12]
 801a424:	601a      	str	r2, [r3, #0]
  *desc->tab = memp;
 801a426:	687b      	ldr	r3, [r7, #4]
 801a428:	68db      	ldr	r3, [r3, #12]
 801a42a:	68fa      	ldr	r2, [r7, #12]
 801a42c:	601a      	str	r2, [r3, #0]

#if MEMP_SANITY_CHECK
  LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */

  SYS_ARCH_UNPROTECT(old_level);
 801a42e:	68b8      	ldr	r0, [r7, #8]
 801a430:	f00c ff0c 	bl	802724c <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
 801a434:	bf00      	nop
 801a436:	3710      	adds	r7, #16
 801a438:	46bd      	mov	sp, r7
 801a43a:	bd80      	pop	{r7, pc}
 801a43c:	0802ec70 	.word	0x0802ec70
 801a440:	0802ed20 	.word	0x0802ed20
 801a444:	0802ecc4 	.word	0x0802ecc4

0801a448 <memp_free_pool>:
 * @param desc the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
 801a448:	b580      	push	{r7, lr}
 801a44a:	b082      	sub	sp, #8
 801a44c:	af00      	add	r7, sp, #0
 801a44e:	6078      	str	r0, [r7, #4]
 801a450:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 801a452:	687b      	ldr	r3, [r7, #4]
 801a454:	2b00      	cmp	r3, #0
 801a456:	d106      	bne.n	801a466 <memp_free_pool+0x1e>
 801a458:	4b0a      	ldr	r3, [pc, #40]	@ (801a484 <memp_free_pool+0x3c>)
 801a45a:	f240 1295 	movw	r2, #405	@ 0x195
 801a45e:	490a      	ldr	r1, [pc, #40]	@ (801a488 <memp_free_pool+0x40>)
 801a460:	480a      	ldr	r0, [pc, #40]	@ (801a48c <memp_free_pool+0x44>)
 801a462:	f010 f97b 	bl	802a75c <iprintf>
  if ((desc == NULL) || (mem == NULL)) {
 801a466:	687b      	ldr	r3, [r7, #4]
 801a468:	2b00      	cmp	r3, #0
 801a46a:	d007      	beq.n	801a47c <memp_free_pool+0x34>
 801a46c:	683b      	ldr	r3, [r7, #0]
 801a46e:	2b00      	cmp	r3, #0
 801a470:	d004      	beq.n	801a47c <memp_free_pool+0x34>
    return;
  }

  do_memp_free_pool(desc, mem);
 801a472:	6839      	ldr	r1, [r7, #0]
 801a474:	6878      	ldr	r0, [r7, #4]
 801a476:	f7ff ffbb 	bl	801a3f0 <do_memp_free_pool>
 801a47a:	e000      	b.n	801a47e <memp_free_pool+0x36>
    return;
 801a47c:	bf00      	nop
}
 801a47e:	3708      	adds	r7, #8
 801a480:	46bd      	mov	sp, r7
 801a482:	bd80      	pop	{r7, pc}
 801a484:	0802ec70 	.word	0x0802ec70
 801a488:	0802ecec 	.word	0x0802ecec
 801a48c:	0802ecc4 	.word	0x0802ecc4

0801a490 <memp_free>:
 * @param type the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free(memp_t type, void *mem)
{
 801a490:	b580      	push	{r7, lr}
 801a492:	b082      	sub	sp, #8
 801a494:	af00      	add	r7, sp, #0
 801a496:	4603      	mov	r3, r0
 801a498:	6039      	str	r1, [r7, #0]
 801a49a:	71fb      	strb	r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  struct memp *old_first;
#endif

  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
 801a49c:	79fb      	ldrb	r3, [r7, #7]
 801a49e:	2b0c      	cmp	r3, #12
 801a4a0:	d907      	bls.n	801a4b2 <memp_free+0x22>
 801a4a2:	4b0c      	ldr	r3, [pc, #48]	@ (801a4d4 <memp_free+0x44>)
 801a4a4:	f44f 72d5 	mov.w	r2, #426	@ 0x1aa
 801a4a8:	490b      	ldr	r1, [pc, #44]	@ (801a4d8 <memp_free+0x48>)
 801a4aa:	480c      	ldr	r0, [pc, #48]	@ (801a4dc <memp_free+0x4c>)
 801a4ac:	f010 f956 	bl	802a75c <iprintf>
 801a4b0:	e00c      	b.n	801a4cc <memp_free+0x3c>

  if (mem == NULL) {
 801a4b2:	683b      	ldr	r3, [r7, #0]
 801a4b4:	2b00      	cmp	r3, #0
 801a4b6:	d008      	beq.n	801a4ca <memp_free+0x3a>

#ifdef LWIP_HOOK_MEMP_AVAILABLE
  old_first = *memp_pools[type]->tab;
#endif

  do_memp_free_pool(memp_pools[type], mem);
 801a4b8:	79fb      	ldrb	r3, [r7, #7]
 801a4ba:	4a09      	ldr	r2, [pc, #36]	@ (801a4e0 <memp_free+0x50>)
 801a4bc:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a4c0:	6839      	ldr	r1, [r7, #0]
 801a4c2:	4618      	mov	r0, r3
 801a4c4:	f7ff ff94 	bl	801a3f0 <do_memp_free_pool>
 801a4c8:	e000      	b.n	801a4cc <memp_free+0x3c>
    return;
 801a4ca:	bf00      	nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  if (old_first == NULL) {
    LWIP_HOOK_MEMP_AVAILABLE(type);
  }
#endif
}
 801a4cc:	3708      	adds	r7, #8
 801a4ce:	46bd      	mov	sp, r7
 801a4d0:	bd80      	pop	{r7, pc}
 801a4d2:	bf00      	nop
 801a4d4:	0802ec70 	.word	0x0802ec70
 801a4d8:	0802ed40 	.word	0x0802ed40
 801a4dc:	0802ecc4 	.word	0x0802ecc4
 801a4e0:	08031ad4 	.word	0x08031ad4

0801a4e4 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */

void
netif_init(void)
{
 801a4e4:	b480      	push	{r7}
 801a4e6:	af00      	add	r7, sp, #0

  netif_set_link_up(&loop_netif);
  netif_set_up(&loop_netif);

#endif /* LWIP_HAVE_LOOPIF */
}
 801a4e8:	bf00      	nop
 801a4ea:	46bd      	mov	sp, r7
 801a4ec:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a4f0:	4770      	bx	lr
	...

0801a4f4 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
          void *state, netif_init_fn init, netif_input_fn input)
{
 801a4f4:	b580      	push	{r7, lr}
 801a4f6:	b086      	sub	sp, #24
 801a4f8:	af00      	add	r7, sp, #0
 801a4fa:	60f8      	str	r0, [r7, #12]
 801a4fc:	60b9      	str	r1, [r7, #8]
 801a4fe:	607a      	str	r2, [r7, #4]
 801a500:	603b      	str	r3, [r7, #0]
#if LWIP_IPV6
  s8_t i;
#endif

  LWIP_ASSERT_CORE_LOCKED();
 801a502:	f7f6 fcfd 	bl	8010f00 <sys_check_core_locking>
    LWIP_ASSERT("single netif already set", 0);
    return NULL;
  }
#endif

  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
 801a506:	68fb      	ldr	r3, [r7, #12]
 801a508:	2b00      	cmp	r3, #0
 801a50a:	d108      	bne.n	801a51e <netif_add+0x2a>
 801a50c:	4b5b      	ldr	r3, [pc, #364]	@ (801a67c <netif_add+0x188>)
 801a50e:	f240 1227 	movw	r2, #295	@ 0x127
 801a512:	495b      	ldr	r1, [pc, #364]	@ (801a680 <netif_add+0x18c>)
 801a514:	485b      	ldr	r0, [pc, #364]	@ (801a684 <netif_add+0x190>)
 801a516:	f010 f921 	bl	802a75c <iprintf>
 801a51a:	2300      	movs	r3, #0
 801a51c:	e0a9      	b.n	801a672 <netif_add+0x17e>
  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
 801a51e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a520:	2b00      	cmp	r3, #0
 801a522:	d108      	bne.n	801a536 <netif_add+0x42>
 801a524:	4b55      	ldr	r3, [pc, #340]	@ (801a67c <netif_add+0x188>)
 801a526:	f44f 7294 	mov.w	r2, #296	@ 0x128
 801a52a:	4957      	ldr	r1, [pc, #348]	@ (801a688 <netif_add+0x194>)
 801a52c:	4855      	ldr	r0, [pc, #340]	@ (801a684 <netif_add+0x190>)
 801a52e:	f010 f915 	bl	802a75c <iprintf>
 801a532:	2300      	movs	r3, #0
 801a534:	e09d      	b.n	801a672 <netif_add+0x17e>

#if LWIP_IPV4
  if (ipaddr == NULL) {
 801a536:	68bb      	ldr	r3, [r7, #8]
 801a538:	2b00      	cmp	r3, #0
 801a53a:	d101      	bne.n	801a540 <netif_add+0x4c>
    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
 801a53c:	4b53      	ldr	r3, [pc, #332]	@ (801a68c <netif_add+0x198>)
 801a53e:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 801a540:	687b      	ldr	r3, [r7, #4]
 801a542:	2b00      	cmp	r3, #0
 801a544:	d101      	bne.n	801a54a <netif_add+0x56>
    netmask = ip_2_ip4(IP4_ADDR_ANY);
 801a546:	4b51      	ldr	r3, [pc, #324]	@ (801a68c <netif_add+0x198>)
 801a548:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 801a54a:	683b      	ldr	r3, [r7, #0]
 801a54c:	2b00      	cmp	r3, #0
 801a54e:	d101      	bne.n	801a554 <netif_add+0x60>
    gw = ip_2_ip4(IP4_ADDR_ANY);
 801a550:	4b4e      	ldr	r3, [pc, #312]	@ (801a68c <netif_add+0x198>)
 801a552:	603b      	str	r3, [r7, #0]
  }

  /* reset new interface configuration state */
  ip_addr_set_zero_ip4(&netif->ip_addr);
 801a554:	68fb      	ldr	r3, [r7, #12]
 801a556:	2200      	movs	r2, #0
 801a558:	605a      	str	r2, [r3, #4]
  ip_addr_set_zero_ip4(&netif->netmask);
 801a55a:	68fb      	ldr	r3, [r7, #12]
 801a55c:	2200      	movs	r2, #0
 801a55e:	609a      	str	r2, [r3, #8]
  ip_addr_set_zero_ip4(&netif->gw);
 801a560:	68fb      	ldr	r3, [r7, #12]
 801a562:	2200      	movs	r2, #0
 801a564:	60da      	str	r2, [r3, #12]
  netif->output = netif_null_output_ip4;
 801a566:	68fb      	ldr	r3, [r7, #12]
 801a568:	4a49      	ldr	r2, [pc, #292]	@ (801a690 <netif_add+0x19c>)
 801a56a:	615a      	str	r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
  }
  netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
  netif->mtu = 0;
 801a56c:	68fb      	ldr	r3, [r7, #12]
 801a56e:	2200      	movs	r2, #0
 801a570:	851a      	strh	r2, [r3, #40]	@ 0x28
  netif->flags = 0;
 801a572:	68fb      	ldr	r3, [r7, #12]
 801a574:	2200      	movs	r2, #0
 801a576:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
#ifdef netif_get_client_data
  memset(netif->client_data, 0, sizeof(netif->client_data));
 801a57a:	68fb      	ldr	r3, [r7, #12]
 801a57c:	3324      	adds	r3, #36	@ 0x24
 801a57e:	2204      	movs	r2, #4
 801a580:	2100      	movs	r1, #0
 801a582:	4618      	mov	r0, r3
 801a584:	f010 fa7c 	bl	802aa80 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
  netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
  netif->link_callback = NULL;
 801a588:	68fb      	ldr	r3, [r7, #12]
 801a58a:	2200      	movs	r2, #0
 801a58c:	61da      	str	r2, [r3, #28]
  netif->loop_first = NULL;
  netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */

  /* remember netif specific state information data */
  netif->state = state;
 801a58e:	68fb      	ldr	r3, [r7, #12]
 801a590:	6a3a      	ldr	r2, [r7, #32]
 801a592:	621a      	str	r2, [r3, #32]
  netif->num = netif_num;
 801a594:	4b3f      	ldr	r3, [pc, #252]	@ (801a694 <netif_add+0x1a0>)
 801a596:	781a      	ldrb	r2, [r3, #0]
 801a598:	68fb      	ldr	r3, [r7, #12]
 801a59a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  netif->input = input;
 801a59e:	68fb      	ldr	r3, [r7, #12]
 801a5a0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801a5a2:	611a      	str	r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
  netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */

#if LWIP_IPV4
  netif_set_addr(netif, ipaddr, netmask, gw);
 801a5a4:	683b      	ldr	r3, [r7, #0]
 801a5a6:	687a      	ldr	r2, [r7, #4]
 801a5a8:	68b9      	ldr	r1, [r7, #8]
 801a5aa:	68f8      	ldr	r0, [r7, #12]
 801a5ac:	f000 f914 	bl	801a7d8 <netif_set_addr>
#endif /* LWIP_IPV4 */

  /* call user specified initialization function for netif */
  if (init(netif) != ERR_OK) {
 801a5b0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a5b2:	68f8      	ldr	r0, [r7, #12]
 801a5b4:	4798      	blx	r3
 801a5b6:	4603      	mov	r3, r0
 801a5b8:	2b00      	cmp	r3, #0
 801a5ba:	d001      	beq.n	801a5c0 <netif_add+0xcc>
    return NULL;
 801a5bc:	2300      	movs	r3, #0
 801a5be:	e058      	b.n	801a672 <netif_add+0x17e>
     */
  {
    struct netif *netif2;
    int num_netifs;
    do {
      if (netif->num == 255) {
 801a5c0:	68fb      	ldr	r3, [r7, #12]
 801a5c2:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a5c6:	2bff      	cmp	r3, #255	@ 0xff
 801a5c8:	d103      	bne.n	801a5d2 <netif_add+0xde>
        netif->num = 0;
 801a5ca:	68fb      	ldr	r3, [r7, #12]
 801a5cc:	2200      	movs	r2, #0
 801a5ce:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }
      num_netifs = 0;
 801a5d2:	2300      	movs	r3, #0
 801a5d4:	613b      	str	r3, [r7, #16]
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a5d6:	4b30      	ldr	r3, [pc, #192]	@ (801a698 <netif_add+0x1a4>)
 801a5d8:	681b      	ldr	r3, [r3, #0]
 801a5da:	617b      	str	r3, [r7, #20]
 801a5dc:	e02b      	b.n	801a636 <netif_add+0x142>
        LWIP_ASSERT("netif already added", netif2 != netif);
 801a5de:	697a      	ldr	r2, [r7, #20]
 801a5e0:	68fb      	ldr	r3, [r7, #12]
 801a5e2:	429a      	cmp	r2, r3
 801a5e4:	d106      	bne.n	801a5f4 <netif_add+0x100>
 801a5e6:	4b25      	ldr	r3, [pc, #148]	@ (801a67c <netif_add+0x188>)
 801a5e8:	f240 128b 	movw	r2, #395	@ 0x18b
 801a5ec:	492b      	ldr	r1, [pc, #172]	@ (801a69c <netif_add+0x1a8>)
 801a5ee:	4825      	ldr	r0, [pc, #148]	@ (801a684 <netif_add+0x190>)
 801a5f0:	f010 f8b4 	bl	802a75c <iprintf>
        num_netifs++;
 801a5f4:	693b      	ldr	r3, [r7, #16]
 801a5f6:	3301      	adds	r3, #1
 801a5f8:	613b      	str	r3, [r7, #16]
        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
 801a5fa:	693b      	ldr	r3, [r7, #16]
 801a5fc:	2bff      	cmp	r3, #255	@ 0xff
 801a5fe:	dd06      	ble.n	801a60e <netif_add+0x11a>
 801a600:	4b1e      	ldr	r3, [pc, #120]	@ (801a67c <netif_add+0x188>)
 801a602:	f240 128d 	movw	r2, #397	@ 0x18d
 801a606:	4926      	ldr	r1, [pc, #152]	@ (801a6a0 <netif_add+0x1ac>)
 801a608:	481e      	ldr	r0, [pc, #120]	@ (801a684 <netif_add+0x190>)
 801a60a:	f010 f8a7 	bl	802a75c <iprintf>
        if (netif2->num == netif->num) {
 801a60e:	697b      	ldr	r3, [r7, #20]
 801a610:	f893 2034 	ldrb.w	r2, [r3, #52]	@ 0x34
 801a614:	68fb      	ldr	r3, [r7, #12]
 801a616:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a61a:	429a      	cmp	r2, r3
 801a61c:	d108      	bne.n	801a630 <netif_add+0x13c>
          netif->num++;
 801a61e:	68fb      	ldr	r3, [r7, #12]
 801a620:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a624:	3301      	adds	r3, #1
 801a626:	b2da      	uxtb	r2, r3
 801a628:	68fb      	ldr	r3, [r7, #12]
 801a62a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          break;
 801a62e:	e005      	b.n	801a63c <netif_add+0x148>
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a630:	697b      	ldr	r3, [r7, #20]
 801a632:	681b      	ldr	r3, [r3, #0]
 801a634:	617b      	str	r3, [r7, #20]
 801a636:	697b      	ldr	r3, [r7, #20]
 801a638:	2b00      	cmp	r3, #0
 801a63a:	d1d0      	bne.n	801a5de <netif_add+0xea>
        }
      }
    } while (netif2 != NULL);
 801a63c:	697b      	ldr	r3, [r7, #20]
 801a63e:	2b00      	cmp	r3, #0
 801a640:	d1be      	bne.n	801a5c0 <netif_add+0xcc>
  }
  if (netif->num == 254) {
 801a642:	68fb      	ldr	r3, [r7, #12]
 801a644:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a648:	2bfe      	cmp	r3, #254	@ 0xfe
 801a64a:	d103      	bne.n	801a654 <netif_add+0x160>
    netif_num = 0;
 801a64c:	4b11      	ldr	r3, [pc, #68]	@ (801a694 <netif_add+0x1a0>)
 801a64e:	2200      	movs	r2, #0
 801a650:	701a      	strb	r2, [r3, #0]
 801a652:	e006      	b.n	801a662 <netif_add+0x16e>
  } else {
    netif_num = (u8_t)(netif->num + 1);
 801a654:	68fb      	ldr	r3, [r7, #12]
 801a656:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a65a:	3301      	adds	r3, #1
 801a65c:	b2da      	uxtb	r2, r3
 801a65e:	4b0d      	ldr	r3, [pc, #52]	@ (801a694 <netif_add+0x1a0>)
 801a660:	701a      	strb	r2, [r3, #0]
  }

  /* add this netif to the list */
  netif->next = netif_list;
 801a662:	4b0d      	ldr	r3, [pc, #52]	@ (801a698 <netif_add+0x1a4>)
 801a664:	681a      	ldr	r2, [r3, #0]
 801a666:	68fb      	ldr	r3, [r7, #12]
 801a668:	601a      	str	r2, [r3, #0]
  netif_list = netif;
 801a66a:	4a0b      	ldr	r2, [pc, #44]	@ (801a698 <netif_add+0x1a4>)
 801a66c:	68fb      	ldr	r3, [r7, #12]
 801a66e:	6013      	str	r3, [r2, #0]
#endif /* LWIP_IPV4 */
  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));

  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);

  return netif;
 801a670:	68fb      	ldr	r3, [r7, #12]
}
 801a672:	4618      	mov	r0, r3
 801a674:	3718      	adds	r7, #24
 801a676:	46bd      	mov	sp, r7
 801a678:	bd80      	pop	{r7, pc}
 801a67a:	bf00      	nop
 801a67c:	0802ed5c 	.word	0x0802ed5c
 801a680:	0802edf0 	.word	0x0802edf0
 801a684:	0802edac 	.word	0x0802edac
 801a688:	0802ee0c 	.word	0x0802ee0c
 801a68c:	08031b58 	.word	0x08031b58
 801a690:	0801aacf 	.word	0x0801aacf
 801a694:	2402af64 	.word	0x2402af64
 801a698:	2402af5c 	.word	0x2402af5c
 801a69c:	0802ee30 	.word	0x0802ee30
 801a6a0:	0802ee44 	.word	0x0802ee44

0801a6a4 <netif_do_ip_addr_changed>:

static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801a6a4:	b580      	push	{r7, lr}
 801a6a6:	b082      	sub	sp, #8
 801a6a8:	af00      	add	r7, sp, #0
 801a6aa:	6078      	str	r0, [r7, #4]
 801a6ac:	6039      	str	r1, [r7, #0]
#if LWIP_TCP
  tcp_netif_ip_addr_changed(old_addr, new_addr);
 801a6ae:	6839      	ldr	r1, [r7, #0]
 801a6b0:	6878      	ldr	r0, [r7, #4]
 801a6b2:	f002 fe6f 	bl	801d394 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
  udp_netif_ip_addr_changed(old_addr, new_addr);
 801a6b6:	6839      	ldr	r1, [r7, #0]
 801a6b8:	6878      	ldr	r0, [r7, #4]
 801a6ba:	f008 f82b 	bl	8022714 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
  raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
 801a6be:	bf00      	nop
 801a6c0:	3708      	adds	r7, #8
 801a6c2:	46bd      	mov	sp, r7
 801a6c4:	bd80      	pop	{r7, pc}
	...

0801a6c8 <netif_do_set_ipaddr>:

#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
 801a6c8:	b580      	push	{r7, lr}
 801a6ca:	b086      	sub	sp, #24
 801a6cc:	af00      	add	r7, sp, #0
 801a6ce:	60f8      	str	r0, [r7, #12]
 801a6d0:	60b9      	str	r1, [r7, #8]
 801a6d2:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
 801a6d4:	68bb      	ldr	r3, [r7, #8]
 801a6d6:	2b00      	cmp	r3, #0
 801a6d8:	d106      	bne.n	801a6e8 <netif_do_set_ipaddr+0x20>
 801a6da:	4b1d      	ldr	r3, [pc, #116]	@ (801a750 <netif_do_set_ipaddr+0x88>)
 801a6dc:	f240 12cb 	movw	r2, #459	@ 0x1cb
 801a6e0:	491c      	ldr	r1, [pc, #112]	@ (801a754 <netif_do_set_ipaddr+0x8c>)
 801a6e2:	481d      	ldr	r0, [pc, #116]	@ (801a758 <netif_do_set_ipaddr+0x90>)
 801a6e4:	f010 f83a 	bl	802a75c <iprintf>
  LWIP_ASSERT("invalid pointer", old_addr != NULL);
 801a6e8:	687b      	ldr	r3, [r7, #4]
 801a6ea:	2b00      	cmp	r3, #0
 801a6ec:	d106      	bne.n	801a6fc <netif_do_set_ipaddr+0x34>
 801a6ee:	4b18      	ldr	r3, [pc, #96]	@ (801a750 <netif_do_set_ipaddr+0x88>)
 801a6f0:	f44f 72e6 	mov.w	r2, #460	@ 0x1cc
 801a6f4:	4917      	ldr	r1, [pc, #92]	@ (801a754 <netif_do_set_ipaddr+0x8c>)
 801a6f6:	4818      	ldr	r0, [pc, #96]	@ (801a758 <netif_do_set_ipaddr+0x90>)
 801a6f8:	f010 f830 	bl	802a75c <iprintf>

  /* address is actually being changed? */
  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
 801a6fc:	68bb      	ldr	r3, [r7, #8]
 801a6fe:	681a      	ldr	r2, [r3, #0]
 801a700:	68fb      	ldr	r3, [r7, #12]
 801a702:	3304      	adds	r3, #4
 801a704:	681b      	ldr	r3, [r3, #0]
 801a706:	429a      	cmp	r2, r3
 801a708:	d01c      	beq.n	801a744 <netif_do_set_ipaddr+0x7c>
    ip_addr_t new_addr;
    *ip_2_ip4(&new_addr) = *ipaddr;
 801a70a:	68bb      	ldr	r3, [r7, #8]
 801a70c:	681b      	ldr	r3, [r3, #0]
 801a70e:	617b      	str	r3, [r7, #20]
    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);

    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
 801a710:	68fb      	ldr	r3, [r7, #12]
 801a712:	3304      	adds	r3, #4
 801a714:	681a      	ldr	r2, [r3, #0]
 801a716:	687b      	ldr	r3, [r7, #4]
 801a718:	601a      	str	r2, [r3, #0]

    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
    netif_do_ip_addr_changed(old_addr, &new_addr);
 801a71a:	f107 0314 	add.w	r3, r7, #20
 801a71e:	4619      	mov	r1, r3
 801a720:	6878      	ldr	r0, [r7, #4]
 801a722:	f7ff ffbf 	bl	801a6a4 <netif_do_ip_addr_changed>

    mib2_remove_ip4(netif);
    mib2_remove_route_ip4(0, netif);
    /* set new IP address to netif */
    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
 801a726:	68bb      	ldr	r3, [r7, #8]
 801a728:	2b00      	cmp	r3, #0
 801a72a:	d002      	beq.n	801a732 <netif_do_set_ipaddr+0x6a>
 801a72c:	68bb      	ldr	r3, [r7, #8]
 801a72e:	681b      	ldr	r3, [r3, #0]
 801a730:	e000      	b.n	801a734 <netif_do_set_ipaddr+0x6c>
 801a732:	2300      	movs	r3, #0
 801a734:	68fa      	ldr	r2, [r7, #12]
 801a736:	6053      	str	r3, [r2, #4]
    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
    mib2_add_ip4(netif);
    mib2_add_route_ip4(0, netif);

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
 801a738:	2101      	movs	r1, #1
 801a73a:	68f8      	ldr	r0, [r7, #12]
 801a73c:	f000 f8d6 	bl	801a8ec <netif_issue_reports>

    NETIF_STATUS_CALLBACK(netif);
    return 1; /* address changed */
 801a740:	2301      	movs	r3, #1
 801a742:	e000      	b.n	801a746 <netif_do_set_ipaddr+0x7e>
  }
  return 0; /* address unchanged */
 801a744:	2300      	movs	r3, #0
}
 801a746:	4618      	mov	r0, r3
 801a748:	3718      	adds	r7, #24
 801a74a:	46bd      	mov	sp, r7
 801a74c:	bd80      	pop	{r7, pc}
 801a74e:	bf00      	nop
 801a750:	0802ed5c 	.word	0x0802ed5c
 801a754:	0802ee74 	.word	0x0802ee74
 801a758:	0802edac 	.word	0x0802edac

0801a75c <netif_do_set_netmask>:
  }
}

static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
 801a75c:	b480      	push	{r7}
 801a75e:	b085      	sub	sp, #20
 801a760:	af00      	add	r7, sp, #0
 801a762:	60f8      	str	r0, [r7, #12]
 801a764:	60b9      	str	r1, [r7, #8]
 801a766:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
 801a768:	68bb      	ldr	r3, [r7, #8]
 801a76a:	681a      	ldr	r2, [r3, #0]
 801a76c:	68fb      	ldr	r3, [r7, #12]
 801a76e:	3308      	adds	r3, #8
 801a770:	681b      	ldr	r3, [r3, #0]
 801a772:	429a      	cmp	r2, r3
 801a774:	d00a      	beq.n	801a78c <netif_do_set_netmask+0x30>
#else
    LWIP_UNUSED_ARG(old_nm);
#endif
    mib2_remove_route_ip4(0, netif);
    /* set new netmask to netif */
    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
 801a776:	68bb      	ldr	r3, [r7, #8]
 801a778:	2b00      	cmp	r3, #0
 801a77a:	d002      	beq.n	801a782 <netif_do_set_netmask+0x26>
 801a77c:	68bb      	ldr	r3, [r7, #8]
 801a77e:	681b      	ldr	r3, [r3, #0]
 801a780:	e000      	b.n	801a784 <netif_do_set_netmask+0x28>
 801a782:	2300      	movs	r3, #0
 801a784:	68fa      	ldr	r2, [r7, #12]
 801a786:	6093      	str	r3, [r2, #8]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_netmask(netif)),
                ip4_addr2_16(netif_ip4_netmask(netif)),
                ip4_addr3_16(netif_ip4_netmask(netif)),
                ip4_addr4_16(netif_ip4_netmask(netif))));
    return 1; /* netmask changed */
 801a788:	2301      	movs	r3, #1
 801a78a:	e000      	b.n	801a78e <netif_do_set_netmask+0x32>
  }
  return 0; /* netmask unchanged */
 801a78c:	2300      	movs	r3, #0
}
 801a78e:	4618      	mov	r0, r3
 801a790:	3714      	adds	r7, #20
 801a792:	46bd      	mov	sp, r7
 801a794:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a798:	4770      	bx	lr

0801a79a <netif_do_set_gw>:
  }
}

static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
 801a79a:	b480      	push	{r7}
 801a79c:	b085      	sub	sp, #20
 801a79e:	af00      	add	r7, sp, #0
 801a7a0:	60f8      	str	r0, [r7, #12]
 801a7a2:	60b9      	str	r1, [r7, #8]
 801a7a4:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
 801a7a6:	68bb      	ldr	r3, [r7, #8]
 801a7a8:	681a      	ldr	r2, [r3, #0]
 801a7aa:	68fb      	ldr	r3, [r7, #12]
 801a7ac:	330c      	adds	r3, #12
 801a7ae:	681b      	ldr	r3, [r3, #0]
 801a7b0:	429a      	cmp	r2, r3
 801a7b2:	d00a      	beq.n	801a7ca <netif_do_set_gw+0x30>
    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
    LWIP_UNUSED_ARG(old_gw);
#endif

    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
 801a7b4:	68bb      	ldr	r3, [r7, #8]
 801a7b6:	2b00      	cmp	r3, #0
 801a7b8:	d002      	beq.n	801a7c0 <netif_do_set_gw+0x26>
 801a7ba:	68bb      	ldr	r3, [r7, #8]
 801a7bc:	681b      	ldr	r3, [r3, #0]
 801a7be:	e000      	b.n	801a7c2 <netif_do_set_gw+0x28>
 801a7c0:	2300      	movs	r3, #0
 801a7c2:	68fa      	ldr	r2, [r7, #12]
 801a7c4:	60d3      	str	r3, [r2, #12]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_gw(netif)),
                ip4_addr2_16(netif_ip4_gw(netif)),
                ip4_addr3_16(netif_ip4_gw(netif)),
                ip4_addr4_16(netif_ip4_gw(netif))));
    return 1; /* gateway changed */
 801a7c6:	2301      	movs	r3, #1
 801a7c8:	e000      	b.n	801a7cc <netif_do_set_gw+0x32>
  }
  return 0; /* gateway unchanged */
 801a7ca:	2300      	movs	r3, #0
}
 801a7cc:	4618      	mov	r0, r3
 801a7ce:	3714      	adds	r7, #20
 801a7d0:	46bd      	mov	sp, r7
 801a7d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a7d6:	4770      	bx	lr

0801a7d8 <netif_set_addr>:
 * @param gw the new default gateway
 */
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
               const ip4_addr_t *gw)
{
 801a7d8:	b580      	push	{r7, lr}
 801a7da:	b088      	sub	sp, #32
 801a7dc:	af00      	add	r7, sp, #0
 801a7de:	60f8      	str	r0, [r7, #12]
 801a7e0:	60b9      	str	r1, [r7, #8]
 801a7e2:	607a      	str	r2, [r7, #4]
 801a7e4:	603b      	str	r3, [r7, #0]
  ip_addr_t old_nm_val;
  ip_addr_t old_gw_val;
  ip_addr_t *old_nm = &old_nm_val;
  ip_addr_t *old_gw = &old_gw_val;
#else
  ip_addr_t *old_nm = NULL;
 801a7e6:	2300      	movs	r3, #0
 801a7e8:	61fb      	str	r3, [r7, #28]
  ip_addr_t *old_gw = NULL;
 801a7ea:	2300      	movs	r3, #0
 801a7ec:	61bb      	str	r3, [r7, #24]
#endif
  ip_addr_t old_addr;
  int remove;

  LWIP_ASSERT_CORE_LOCKED();
 801a7ee:	f7f6 fb87 	bl	8010f00 <sys_check_core_locking>

  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 801a7f2:	68bb      	ldr	r3, [r7, #8]
 801a7f4:	2b00      	cmp	r3, #0
 801a7f6:	d101      	bne.n	801a7fc <netif_set_addr+0x24>
    ipaddr = IP4_ADDR_ANY4;
 801a7f8:	4b1c      	ldr	r3, [pc, #112]	@ (801a86c <netif_set_addr+0x94>)
 801a7fa:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 801a7fc:	687b      	ldr	r3, [r7, #4]
 801a7fe:	2b00      	cmp	r3, #0
 801a800:	d101      	bne.n	801a806 <netif_set_addr+0x2e>
    netmask = IP4_ADDR_ANY4;
 801a802:	4b1a      	ldr	r3, [pc, #104]	@ (801a86c <netif_set_addr+0x94>)
 801a804:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 801a806:	683b      	ldr	r3, [r7, #0]
 801a808:	2b00      	cmp	r3, #0
 801a80a:	d101      	bne.n	801a810 <netif_set_addr+0x38>
    gw = IP4_ADDR_ANY4;
 801a80c:	4b17      	ldr	r3, [pc, #92]	@ (801a86c <netif_set_addr+0x94>)
 801a80e:	603b      	str	r3, [r7, #0]
  }

  remove = ip4_addr_isany(ipaddr);
 801a810:	68bb      	ldr	r3, [r7, #8]
 801a812:	2b00      	cmp	r3, #0
 801a814:	d003      	beq.n	801a81e <netif_set_addr+0x46>
 801a816:	68bb      	ldr	r3, [r7, #8]
 801a818:	681b      	ldr	r3, [r3, #0]
 801a81a:	2b00      	cmp	r3, #0
 801a81c:	d101      	bne.n	801a822 <netif_set_addr+0x4a>
 801a81e:	2301      	movs	r3, #1
 801a820:	e000      	b.n	801a824 <netif_set_addr+0x4c>
 801a822:	2300      	movs	r3, #0
 801a824:	617b      	str	r3, [r7, #20]
  if (remove) {
 801a826:	697b      	ldr	r3, [r7, #20]
 801a828:	2b00      	cmp	r3, #0
 801a82a:	d006      	beq.n	801a83a <netif_set_addr+0x62>
    /* when removing an address, we have to remove it *before* changing netmask/gw
       to ensure that tcp RST segment can be sent correctly */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801a82c:	f107 0310 	add.w	r3, r7, #16
 801a830:	461a      	mov	r2, r3
 801a832:	68b9      	ldr	r1, [r7, #8]
 801a834:	68f8      	ldr	r0, [r7, #12]
 801a836:	f7ff ff47 	bl	801a6c8 <netif_do_set_ipaddr>
      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
      cb_args.ipv4_changed.old_address = &old_addr;
#endif
    }
  }
  if (netif_do_set_netmask(netif, netmask, old_nm)) {
 801a83a:	69fa      	ldr	r2, [r7, #28]
 801a83c:	6879      	ldr	r1, [r7, #4]
 801a83e:	68f8      	ldr	r0, [r7, #12]
 801a840:	f7ff ff8c 	bl	801a75c <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
    cb_args.ipv4_changed.old_netmask = old_nm;
#endif
  }
  if (netif_do_set_gw(netif, gw, old_gw)) {
 801a844:	69ba      	ldr	r2, [r7, #24]
 801a846:	6839      	ldr	r1, [r7, #0]
 801a848:	68f8      	ldr	r0, [r7, #12]
 801a84a:	f7ff ffa6 	bl	801a79a <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
    cb_args.ipv4_changed.old_gw = old_gw;
#endif
  }
  if (!remove) {
 801a84e:	697b      	ldr	r3, [r7, #20]
 801a850:	2b00      	cmp	r3, #0
 801a852:	d106      	bne.n	801a862 <netif_set_addr+0x8a>
    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801a854:	f107 0310 	add.w	r3, r7, #16
 801a858:	461a      	mov	r2, r3
 801a85a:	68b9      	ldr	r1, [r7, #8]
 801a85c:	68f8      	ldr	r0, [r7, #12]
 801a85e:	f7ff ff33 	bl	801a6c8 <netif_do_set_ipaddr>
  if (change_reason != LWIP_NSC_NONE) {
    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
    netif_invoke_ext_callback(netif, change_reason, &cb_args);
  }
#endif
}
 801a862:	bf00      	nop
 801a864:	3720      	adds	r7, #32
 801a866:	46bd      	mov	sp, r7
 801a868:	bd80      	pop	{r7, pc}
 801a86a:	bf00      	nop
 801a86c:	08031b58 	.word	0x08031b58

0801a870 <netif_set_default>:
 *
 * @param netif the default network interface
 */
void
netif_set_default(struct netif *netif)
{
 801a870:	b580      	push	{r7, lr}
 801a872:	b082      	sub	sp, #8
 801a874:	af00      	add	r7, sp, #0
 801a876:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a878:	f7f6 fb42 	bl	8010f00 <sys_check_core_locking>
    mib2_remove_route_ip4(1, netif);
  } else {
    /* install default route */
    mib2_add_route_ip4(1, netif);
  }
  netif_default = netif;
 801a87c:	4a03      	ldr	r2, [pc, #12]	@ (801a88c <netif_set_default+0x1c>)
 801a87e:	687b      	ldr	r3, [r7, #4]
 801a880:	6013      	str	r3, [r2, #0]
  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
 801a882:	bf00      	nop
 801a884:	3708      	adds	r7, #8
 801a886:	46bd      	mov	sp, r7
 801a888:	bd80      	pop	{r7, pc}
 801a88a:	bf00      	nop
 801a88c:	2402af60 	.word	0x2402af60

0801a890 <netif_set_up>:
 * Bring an interface up, available for processing
 * traffic.
 */
void
netif_set_up(struct netif *netif)
{
 801a890:	b580      	push	{r7, lr}
 801a892:	b082      	sub	sp, #8
 801a894:	af00      	add	r7, sp, #0
 801a896:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a898:	f7f6 fb32 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
 801a89c:	687b      	ldr	r3, [r7, #4]
 801a89e:	2b00      	cmp	r3, #0
 801a8a0:	d107      	bne.n	801a8b2 <netif_set_up+0x22>
 801a8a2:	4b0f      	ldr	r3, [pc, #60]	@ (801a8e0 <netif_set_up+0x50>)
 801a8a4:	f44f 7254 	mov.w	r2, #848	@ 0x350
 801a8a8:	490e      	ldr	r1, [pc, #56]	@ (801a8e4 <netif_set_up+0x54>)
 801a8aa:	480f      	ldr	r0, [pc, #60]	@ (801a8e8 <netif_set_up+0x58>)
 801a8ac:	f00f ff56 	bl	802a75c <iprintf>
 801a8b0:	e013      	b.n	801a8da <netif_set_up+0x4a>

  if (!(netif->flags & NETIF_FLAG_UP)) {
 801a8b2:	687b      	ldr	r3, [r7, #4]
 801a8b4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a8b8:	f003 0301 	and.w	r3, r3, #1
 801a8bc:	2b00      	cmp	r3, #0
 801a8be:	d10c      	bne.n	801a8da <netif_set_up+0x4a>
    netif_set_flags(netif, NETIF_FLAG_UP);
 801a8c0:	687b      	ldr	r3, [r7, #4]
 801a8c2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a8c6:	f043 0301 	orr.w	r3, r3, #1
 801a8ca:	b2da      	uxtb	r2, r3
 801a8cc:	687b      	ldr	r3, [r7, #4]
 801a8ce:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
      args.status_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801a8d2:	2103      	movs	r1, #3
 801a8d4:	6878      	ldr	r0, [r7, #4]
 801a8d6:	f000 f809 	bl	801a8ec <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
  }
}
 801a8da:	3708      	adds	r7, #8
 801a8dc:	46bd      	mov	sp, r7
 801a8de:	bd80      	pop	{r7, pc}
 801a8e0:	0802ed5c 	.word	0x0802ed5c
 801a8e4:	0802eee4 	.word	0x0802eee4
 801a8e8:	0802edac 	.word	0x0802edac

0801a8ec <netif_issue_reports>:

/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
 */
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
 801a8ec:	b580      	push	{r7, lr}
 801a8ee:	b082      	sub	sp, #8
 801a8f0:	af00      	add	r7, sp, #0
 801a8f2:	6078      	str	r0, [r7, #4]
 801a8f4:	460b      	mov	r3, r1
 801a8f6:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
 801a8f8:	687b      	ldr	r3, [r7, #4]
 801a8fa:	2b00      	cmp	r3, #0
 801a8fc:	d106      	bne.n	801a90c <netif_issue_reports+0x20>
 801a8fe:	4b18      	ldr	r3, [pc, #96]	@ (801a960 <netif_issue_reports+0x74>)
 801a900:	f240 326d 	movw	r2, #877	@ 0x36d
 801a904:	4917      	ldr	r1, [pc, #92]	@ (801a964 <netif_issue_reports+0x78>)
 801a906:	4818      	ldr	r0, [pc, #96]	@ (801a968 <netif_issue_reports+0x7c>)
 801a908:	f00f ff28 	bl	802a75c <iprintf>

  /* Only send reports when both link and admin states are up */
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801a90c:	687b      	ldr	r3, [r7, #4]
 801a90e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a912:	f003 0304 	and.w	r3, r3, #4
 801a916:	2b00      	cmp	r3, #0
 801a918:	d01e      	beq.n	801a958 <netif_issue_reports+0x6c>
      !(netif->flags & NETIF_FLAG_UP)) {
 801a91a:	687b      	ldr	r3, [r7, #4]
 801a91c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a920:	f003 0301 	and.w	r3, r3, #1
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801a924:	2b00      	cmp	r3, #0
 801a926:	d017      	beq.n	801a958 <netif_issue_reports+0x6c>
    return;
  }

#if LWIP_IPV4
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801a928:	78fb      	ldrb	r3, [r7, #3]
 801a92a:	f003 0301 	and.w	r3, r3, #1
 801a92e:	2b00      	cmp	r3, #0
 801a930:	d013      	beq.n	801a95a <netif_issue_reports+0x6e>
      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 801a932:	687b      	ldr	r3, [r7, #4]
 801a934:	3304      	adds	r3, #4
 801a936:	681b      	ldr	r3, [r3, #0]
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801a938:	2b00      	cmp	r3, #0
 801a93a:	d00e      	beq.n	801a95a <netif_issue_reports+0x6e>
#if LWIP_ARP
    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
    if (netif->flags & (NETIF_FLAG_ETHARP)) {
 801a93c:	687b      	ldr	r3, [r7, #4]
 801a93e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a942:	f003 0308 	and.w	r3, r3, #8
 801a946:	2b00      	cmp	r3, #0
 801a948:	d007      	beq.n	801a95a <netif_issue_reports+0x6e>
      etharp_gratuitous(netif);
 801a94a:	687b      	ldr	r3, [r7, #4]
 801a94c:	3304      	adds	r3, #4
 801a94e:	4619      	mov	r1, r3
 801a950:	6878      	ldr	r0, [r7, #4]
 801a952:	f00a fd2b 	bl	80253ac <etharp_request>
 801a956:	e000      	b.n	801a95a <netif_issue_reports+0x6e>
    return;
 801a958:	bf00      	nop
    /* send mld memberships */
    mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
  }
#endif /* LWIP_IPV6 */
}
 801a95a:	3708      	adds	r7, #8
 801a95c:	46bd      	mov	sp, r7
 801a95e:	bd80      	pop	{r7, pc}
 801a960:	0802ed5c 	.word	0x0802ed5c
 801a964:	0802ef00 	.word	0x0802ef00
 801a968:	0802edac 	.word	0x0802edac

0801a96c <netif_set_down>:
 * @ingroup netif
 * Bring an interface down, disabling any traffic processing.
 */
void
netif_set_down(struct netif *netif)
{
 801a96c:	b580      	push	{r7, lr}
 801a96e:	b082      	sub	sp, #8
 801a970:	af00      	add	r7, sp, #0
 801a972:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a974:	f7f6 fac4 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
 801a978:	687b      	ldr	r3, [r7, #4]
 801a97a:	2b00      	cmp	r3, #0
 801a97c:	d107      	bne.n	801a98e <netif_set_down+0x22>
 801a97e:	4b12      	ldr	r3, [pc, #72]	@ (801a9c8 <netif_set_down+0x5c>)
 801a980:	f240 329b 	movw	r2, #923	@ 0x39b
 801a984:	4911      	ldr	r1, [pc, #68]	@ (801a9cc <netif_set_down+0x60>)
 801a986:	4812      	ldr	r0, [pc, #72]	@ (801a9d0 <netif_set_down+0x64>)
 801a988:	f00f fee8 	bl	802a75c <iprintf>
 801a98c:	e019      	b.n	801a9c2 <netif_set_down+0x56>

  if (netif->flags & NETIF_FLAG_UP) {
 801a98e:	687b      	ldr	r3, [r7, #4]
 801a990:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a994:	f003 0301 	and.w	r3, r3, #1
 801a998:	2b00      	cmp	r3, #0
 801a99a:	d012      	beq.n	801a9c2 <netif_set_down+0x56>
      args.status_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_clear_flags(netif, NETIF_FLAG_UP);
 801a99c:	687b      	ldr	r3, [r7, #4]
 801a99e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a9a2:	f023 0301 	bic.w	r3, r3, #1
 801a9a6:	b2da      	uxtb	r2, r3
 801a9a8:	687b      	ldr	r3, [r7, #4]
 801a9aa:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    MIB2_COPY_SYSUPTIME_TO(&netif->ts);

#if LWIP_IPV4 && LWIP_ARP
    if (netif->flags & NETIF_FLAG_ETHARP) {
 801a9ae:	687b      	ldr	r3, [r7, #4]
 801a9b0:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a9b4:	f003 0308 	and.w	r3, r3, #8
 801a9b8:	2b00      	cmp	r3, #0
 801a9ba:	d002      	beq.n	801a9c2 <netif_set_down+0x56>
      etharp_cleanup_netif(netif);
 801a9bc:	6878      	ldr	r0, [r7, #4]
 801a9be:	f00a f8ab 	bl	8024b18 <etharp_cleanup_netif>
    nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_STATUS_CALLBACK(netif);
  }
}
 801a9c2:	3708      	adds	r7, #8
 801a9c4:	46bd      	mov	sp, r7
 801a9c6:	bd80      	pop	{r7, pc}
 801a9c8:	0802ed5c 	.word	0x0802ed5c
 801a9cc:	0802ef24 	.word	0x0802ef24
 801a9d0:	0802edac 	.word	0x0802edac

0801a9d4 <netif_set_link_up>:
 * @ingroup netif
 * Called by a driver when its link goes up
 */
void
netif_set_link_up(struct netif *netif)
{
 801a9d4:	b580      	push	{r7, lr}
 801a9d6:	b082      	sub	sp, #8
 801a9d8:	af00      	add	r7, sp, #0
 801a9da:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801a9dc:	f7f6 fa90 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
 801a9e0:	687b      	ldr	r3, [r7, #4]
 801a9e2:	2b00      	cmp	r3, #0
 801a9e4:	d107      	bne.n	801a9f6 <netif_set_link_up+0x22>
 801a9e6:	4b15      	ldr	r3, [pc, #84]	@ (801aa3c <netif_set_link_up+0x68>)
 801a9e8:	f44f 7278 	mov.w	r2, #992	@ 0x3e0
 801a9ec:	4914      	ldr	r1, [pc, #80]	@ (801aa40 <netif_set_link_up+0x6c>)
 801a9ee:	4815      	ldr	r0, [pc, #84]	@ (801aa44 <netif_set_link_up+0x70>)
 801a9f0:	f00f feb4 	bl	802a75c <iprintf>
 801a9f4:	e01e      	b.n	801aa34 <netif_set_link_up+0x60>

  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
 801a9f6:	687b      	ldr	r3, [r7, #4]
 801a9f8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801a9fc:	f003 0304 	and.w	r3, r3, #4
 801aa00:	2b00      	cmp	r3, #0
 801aa02:	d117      	bne.n	801aa34 <netif_set_link_up+0x60>
    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
 801aa04:	687b      	ldr	r3, [r7, #4]
 801aa06:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801aa0a:	f043 0304 	orr.w	r3, r3, #4
 801aa0e:	b2da      	uxtb	r2, r3
 801aa10:	687b      	ldr	r3, [r7, #4]
 801aa12:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31

#if LWIP_DHCP
    dhcp_network_changed(netif);
 801aa16:	6878      	ldr	r0, [r7, #4]
 801aa18:	f008 faaa 	bl	8022f70 <dhcp_network_changed>

#if LWIP_AUTOIP
    autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801aa1c:	2103      	movs	r1, #3
 801aa1e:	6878      	ldr	r0, [r7, #4]
 801aa20:	f7ff ff64 	bl	801a8ec <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_LINK_CALLBACK(netif);
 801aa24:	687b      	ldr	r3, [r7, #4]
 801aa26:	69db      	ldr	r3, [r3, #28]
 801aa28:	2b00      	cmp	r3, #0
 801aa2a:	d003      	beq.n	801aa34 <netif_set_link_up+0x60>
 801aa2c:	687b      	ldr	r3, [r7, #4]
 801aa2e:	69db      	ldr	r3, [r3, #28]
 801aa30:	6878      	ldr	r0, [r7, #4]
 801aa32:	4798      	blx	r3
      args.link_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801aa34:	3708      	adds	r7, #8
 801aa36:	46bd      	mov	sp, r7
 801aa38:	bd80      	pop	{r7, pc}
 801aa3a:	bf00      	nop
 801aa3c:	0802ed5c 	.word	0x0802ed5c
 801aa40:	0802ef44 	.word	0x0802ef44
 801aa44:	0802edac 	.word	0x0802edac

0801aa48 <netif_set_link_down>:
 * @ingroup netif
 * Called by a driver when its link goes down
 */
void
netif_set_link_down(struct netif *netif)
{
 801aa48:	b580      	push	{r7, lr}
 801aa4a:	b082      	sub	sp, #8
 801aa4c:	af00      	add	r7, sp, #0
 801aa4e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801aa50:	f7f6 fa56 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
 801aa54:	687b      	ldr	r3, [r7, #4]
 801aa56:	2b00      	cmp	r3, #0
 801aa58:	d107      	bne.n	801aa6a <netif_set_link_down+0x22>
 801aa5a:	4b11      	ldr	r3, [pc, #68]	@ (801aaa0 <netif_set_link_down+0x58>)
 801aa5c:	f240 4206 	movw	r2, #1030	@ 0x406
 801aa60:	4910      	ldr	r1, [pc, #64]	@ (801aaa4 <netif_set_link_down+0x5c>)
 801aa62:	4811      	ldr	r0, [pc, #68]	@ (801aaa8 <netif_set_link_down+0x60>)
 801aa64:	f00f fe7a 	bl	802a75c <iprintf>
 801aa68:	e017      	b.n	801aa9a <netif_set_link_down+0x52>

  if (netif->flags & NETIF_FLAG_LINK_UP) {
 801aa6a:	687b      	ldr	r3, [r7, #4]
 801aa6c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801aa70:	f003 0304 	and.w	r3, r3, #4
 801aa74:	2b00      	cmp	r3, #0
 801aa76:	d010      	beq.n	801aa9a <netif_set_link_down+0x52>
    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
 801aa78:	687b      	ldr	r3, [r7, #4]
 801aa7a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801aa7e:	f023 0304 	bic.w	r3, r3, #4
 801aa82:	b2da      	uxtb	r2, r3
 801aa84:	687b      	ldr	r3, [r7, #4]
 801aa86:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    NETIF_LINK_CALLBACK(netif);
 801aa8a:	687b      	ldr	r3, [r7, #4]
 801aa8c:	69db      	ldr	r3, [r3, #28]
 801aa8e:	2b00      	cmp	r3, #0
 801aa90:	d003      	beq.n	801aa9a <netif_set_link_down+0x52>
 801aa92:	687b      	ldr	r3, [r7, #4]
 801aa94:	69db      	ldr	r3, [r3, #28]
 801aa96:	6878      	ldr	r0, [r7, #4]
 801aa98:	4798      	blx	r3
      args.link_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801aa9a:	3708      	adds	r7, #8
 801aa9c:	46bd      	mov	sp, r7
 801aa9e:	bd80      	pop	{r7, pc}
 801aaa0:	0802ed5c 	.word	0x0802ed5c
 801aaa4:	0802ef68 	.word	0x0802ef68
 801aaa8:	0802edac 	.word	0x0802edac

0801aaac <netif_set_link_callback>:
 * @ingroup netif
 * Set callback to be called when link is brought up/down
 */
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
 801aaac:	b580      	push	{r7, lr}
 801aaae:	b082      	sub	sp, #8
 801aab0:	af00      	add	r7, sp, #0
 801aab2:	6078      	str	r0, [r7, #4]
 801aab4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801aab6:	f7f6 fa23 	bl	8010f00 <sys_check_core_locking>

  if (netif) {
 801aaba:	687b      	ldr	r3, [r7, #4]
 801aabc:	2b00      	cmp	r3, #0
 801aabe:	d002      	beq.n	801aac6 <netif_set_link_callback+0x1a>
    netif->link_callback = link_callback;
 801aac0:	687b      	ldr	r3, [r7, #4]
 801aac2:	683a      	ldr	r2, [r7, #0]
 801aac4:	61da      	str	r2, [r3, #28]
  }
}
 801aac6:	bf00      	nop
 801aac8:	3708      	adds	r7, #8
 801aaca:	46bd      	mov	sp, r7
 801aacc:	bd80      	pop	{r7, pc}

0801aace <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
 */
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
 801aace:	b480      	push	{r7}
 801aad0:	b085      	sub	sp, #20
 801aad2:	af00      	add	r7, sp, #0
 801aad4:	60f8      	str	r0, [r7, #12]
 801aad6:	60b9      	str	r1, [r7, #8]
 801aad8:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(netif);
  LWIP_UNUSED_ARG(p);
  LWIP_UNUSED_ARG(ipaddr);

  return ERR_IF;
 801aada:	f06f 030b 	mvn.w	r3, #11
}
 801aade:	4618      	mov	r0, r3
 801aae0:	3714      	adds	r7, #20
 801aae2:	46bd      	mov	sp, r7
 801aae4:	f85d 7b04 	ldr.w	r7, [sp], #4
 801aae8:	4770      	bx	lr
	...

0801aaec <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
 801aaec:	b580      	push	{r7, lr}
 801aaee:	b084      	sub	sp, #16
 801aaf0:	af00      	add	r7, sp, #0
 801aaf2:	4603      	mov	r3, r0
 801aaf4:	71fb      	strb	r3, [r7, #7]
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 801aaf6:	f7f6 fa03 	bl	8010f00 <sys_check_core_locking>

  if (idx != NETIF_NO_INDEX) {
 801aafa:	79fb      	ldrb	r3, [r7, #7]
 801aafc:	2b00      	cmp	r3, #0
 801aafe:	d013      	beq.n	801ab28 <netif_get_by_index+0x3c>
    NETIF_FOREACH(netif) {
 801ab00:	4b0c      	ldr	r3, [pc, #48]	@ (801ab34 <netif_get_by_index+0x48>)
 801ab02:	681b      	ldr	r3, [r3, #0]
 801ab04:	60fb      	str	r3, [r7, #12]
 801ab06:	e00c      	b.n	801ab22 <netif_get_by_index+0x36>
      if (idx == netif_get_index(netif)) {
 801ab08:	68fb      	ldr	r3, [r7, #12]
 801ab0a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801ab0e:	3301      	adds	r3, #1
 801ab10:	b2db      	uxtb	r3, r3
 801ab12:	79fa      	ldrb	r2, [r7, #7]
 801ab14:	429a      	cmp	r2, r3
 801ab16:	d101      	bne.n	801ab1c <netif_get_by_index+0x30>
        return netif; /* found! */
 801ab18:	68fb      	ldr	r3, [r7, #12]
 801ab1a:	e006      	b.n	801ab2a <netif_get_by_index+0x3e>
    NETIF_FOREACH(netif) {
 801ab1c:	68fb      	ldr	r3, [r7, #12]
 801ab1e:	681b      	ldr	r3, [r3, #0]
 801ab20:	60fb      	str	r3, [r7, #12]
 801ab22:	68fb      	ldr	r3, [r7, #12]
 801ab24:	2b00      	cmp	r3, #0
 801ab26:	d1ef      	bne.n	801ab08 <netif_get_by_index+0x1c>
      }
    }
  }

  return NULL;
 801ab28:	2300      	movs	r3, #0
}
 801ab2a:	4618      	mov	r0, r3
 801ab2c:	3710      	adds	r7, #16
 801ab2e:	46bd      	mov	sp, r7
 801ab30:	bd80      	pop	{r7, pc}
 801ab32:	bf00      	nop
 801ab34:	2402af5c 	.word	0x2402af5c

0801ab38 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
 801ab38:	b580      	push	{r7, lr}
 801ab3a:	b082      	sub	sp, #8
 801ab3c:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
 801ab3e:	f00c fb77 	bl	8027230 <sys_arch_protect>
 801ab42:	6038      	str	r0, [r7, #0]
 801ab44:	4b0d      	ldr	r3, [pc, #52]	@ (801ab7c <pbuf_free_ooseq+0x44>)
 801ab46:	2200      	movs	r2, #0
 801ab48:	701a      	strb	r2, [r3, #0]
 801ab4a:	6838      	ldr	r0, [r7, #0]
 801ab4c:	f00c fb7e 	bl	802724c <sys_arch_unprotect>

  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801ab50:	4b0b      	ldr	r3, [pc, #44]	@ (801ab80 <pbuf_free_ooseq+0x48>)
 801ab52:	681b      	ldr	r3, [r3, #0]
 801ab54:	607b      	str	r3, [r7, #4]
 801ab56:	e00a      	b.n	801ab6e <pbuf_free_ooseq+0x36>
    if (pcb->ooseq != NULL) {
 801ab58:	687b      	ldr	r3, [r7, #4]
 801ab5a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ab5c:	2b00      	cmp	r3, #0
 801ab5e:	d003      	beq.n	801ab68 <pbuf_free_ooseq+0x30>
      /** Free the ooseq pbufs of one PCB only */
      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
      tcp_free_ooseq(pcb);
 801ab60:	6878      	ldr	r0, [r7, #4]
 801ab62:	f002 fc55 	bl	801d410 <tcp_free_ooseq>
      return;
 801ab66:	e005      	b.n	801ab74 <pbuf_free_ooseq+0x3c>
  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801ab68:	687b      	ldr	r3, [r7, #4]
 801ab6a:	68db      	ldr	r3, [r3, #12]
 801ab6c:	607b      	str	r3, [r7, #4]
 801ab6e:	687b      	ldr	r3, [r7, #4]
 801ab70:	2b00      	cmp	r3, #0
 801ab72:	d1f1      	bne.n	801ab58 <pbuf_free_ooseq+0x20>
    }
  }
}
 801ab74:	3708      	adds	r7, #8
 801ab76:	46bd      	mov	sp, r7
 801ab78:	bd80      	pop	{r7, pc}
 801ab7a:	bf00      	nop
 801ab7c:	2402af65 	.word	0x2402af65
 801ab80:	2402af74 	.word	0x2402af74

0801ab84 <pbuf_free_ooseq_callback>:
/**
 * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
 */
static void
pbuf_free_ooseq_callback(void *arg)
{
 801ab84:	b580      	push	{r7, lr}
 801ab86:	b082      	sub	sp, #8
 801ab88:	af00      	add	r7, sp, #0
 801ab8a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);
  pbuf_free_ooseq();
 801ab8c:	f7ff ffd4 	bl	801ab38 <pbuf_free_ooseq>
}
 801ab90:	bf00      	nop
 801ab92:	3708      	adds	r7, #8
 801ab94:	46bd      	mov	sp, r7
 801ab96:	bd80      	pop	{r7, pc}

0801ab98 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */

/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
 801ab98:	b580      	push	{r7, lr}
 801ab9a:	b082      	sub	sp, #8
 801ab9c:	af00      	add	r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
  u8_t queued;
  SYS_ARCH_DECL_PROTECT(old_level);
  SYS_ARCH_PROTECT(old_level);
 801ab9e:	f00c fb47 	bl	8027230 <sys_arch_protect>
 801aba2:	6078      	str	r0, [r7, #4]
  queued = pbuf_free_ooseq_pending;
 801aba4:	4b0f      	ldr	r3, [pc, #60]	@ (801abe4 <pbuf_pool_is_empty+0x4c>)
 801aba6:	781b      	ldrb	r3, [r3, #0]
 801aba8:	70fb      	strb	r3, [r7, #3]
  pbuf_free_ooseq_pending = 1;
 801abaa:	4b0e      	ldr	r3, [pc, #56]	@ (801abe4 <pbuf_pool_is_empty+0x4c>)
 801abac:	2201      	movs	r2, #1
 801abae:	701a      	strb	r2, [r3, #0]
  SYS_ARCH_UNPROTECT(old_level);
 801abb0:	6878      	ldr	r0, [r7, #4]
 801abb2:	f00c fb4b 	bl	802724c <sys_arch_unprotect>

  if (!queued) {
 801abb6:	78fb      	ldrb	r3, [r7, #3]
 801abb8:	2b00      	cmp	r3, #0
 801abba:	d10f      	bne.n	801abdc <pbuf_pool_is_empty+0x44>
    /* queue a call to pbuf_free_ooseq if not already queued */
    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
 801abbc:	2100      	movs	r1, #0
 801abbe:	480a      	ldr	r0, [pc, #40]	@ (801abe8 <pbuf_pool_is_empty+0x50>)
 801abc0:	f7fe fdd6 	bl	8019770 <tcpip_try_callback>
 801abc4:	4603      	mov	r3, r0
 801abc6:	2b00      	cmp	r3, #0
 801abc8:	d008      	beq.n	801abdc <pbuf_pool_is_empty+0x44>
 801abca:	f00c fb31 	bl	8027230 <sys_arch_protect>
 801abce:	6078      	str	r0, [r7, #4]
 801abd0:	4b04      	ldr	r3, [pc, #16]	@ (801abe4 <pbuf_pool_is_empty+0x4c>)
 801abd2:	2200      	movs	r2, #0
 801abd4:	701a      	strb	r2, [r3, #0]
 801abd6:	6878      	ldr	r0, [r7, #4]
 801abd8:	f00c fb38 	bl	802724c <sys_arch_unprotect>
  }
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
 801abdc:	bf00      	nop
 801abde:	3708      	adds	r7, #8
 801abe0:	46bd      	mov	sp, r7
 801abe2:	bd80      	pop	{r7, pc}
 801abe4:	2402af65 	.word	0x2402af65
 801abe8:	0801ab85 	.word	0x0801ab85

0801abec <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */

/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
 801abec:	b480      	push	{r7}
 801abee:	b085      	sub	sp, #20
 801abf0:	af00      	add	r7, sp, #0
 801abf2:	60f8      	str	r0, [r7, #12]
 801abf4:	60b9      	str	r1, [r7, #8]
 801abf6:	4611      	mov	r1, r2
 801abf8:	461a      	mov	r2, r3
 801abfa:	460b      	mov	r3, r1
 801abfc:	80fb      	strh	r3, [r7, #6]
 801abfe:	4613      	mov	r3, r2
 801ac00:	80bb      	strh	r3, [r7, #4]
  p->next = NULL;
 801ac02:	68fb      	ldr	r3, [r7, #12]
 801ac04:	2200      	movs	r2, #0
 801ac06:	601a      	str	r2, [r3, #0]
  p->payload = payload;
 801ac08:	68fb      	ldr	r3, [r7, #12]
 801ac0a:	68ba      	ldr	r2, [r7, #8]
 801ac0c:	605a      	str	r2, [r3, #4]
  p->tot_len = tot_len;
 801ac0e:	68fb      	ldr	r3, [r7, #12]
 801ac10:	88fa      	ldrh	r2, [r7, #6]
 801ac12:	811a      	strh	r2, [r3, #8]
  p->len = len;
 801ac14:	68fb      	ldr	r3, [r7, #12]
 801ac16:	88ba      	ldrh	r2, [r7, #4]
 801ac18:	815a      	strh	r2, [r3, #10]
  p->type_internal = (u8_t)type;
 801ac1a:	8b3b      	ldrh	r3, [r7, #24]
 801ac1c:	b2da      	uxtb	r2, r3
 801ac1e:	68fb      	ldr	r3, [r7, #12]
 801ac20:	731a      	strb	r2, [r3, #12]
  p->flags = flags;
 801ac22:	68fb      	ldr	r3, [r7, #12]
 801ac24:	7f3a      	ldrb	r2, [r7, #28]
 801ac26:	735a      	strb	r2, [r3, #13]
  p->ref = 1;
 801ac28:	68fb      	ldr	r3, [r7, #12]
 801ac2a:	2201      	movs	r2, #1
 801ac2c:	739a      	strb	r2, [r3, #14]
  p->if_idx = NETIF_NO_INDEX;
 801ac2e:	68fb      	ldr	r3, [r7, #12]
 801ac30:	2200      	movs	r2, #0
 801ac32:	73da      	strb	r2, [r3, #15]
}
 801ac34:	bf00      	nop
 801ac36:	3714      	adds	r7, #20
 801ac38:	46bd      	mov	sp, r7
 801ac3a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ac3e:	4770      	bx	lr

0801ac40 <pbuf_alloc>:
 * @return the allocated pbuf. If multiple pbufs where allocated, this
 * is the first pbuf of a pbuf chain.
 */
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
 801ac40:	b580      	push	{r7, lr}
 801ac42:	b08c      	sub	sp, #48	@ 0x30
 801ac44:	af02      	add	r7, sp, #8
 801ac46:	4603      	mov	r3, r0
 801ac48:	71fb      	strb	r3, [r7, #7]
 801ac4a:	460b      	mov	r3, r1
 801ac4c:	80bb      	strh	r3, [r7, #4]
 801ac4e:	4613      	mov	r3, r2
 801ac50:	807b      	strh	r3, [r7, #2]
  struct pbuf *p;
  u16_t offset = (u16_t)layer;
 801ac52:	79fb      	ldrb	r3, [r7, #7]
 801ac54:	847b      	strh	r3, [r7, #34]	@ 0x22
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));

  switch (type) {
 801ac56:	887b      	ldrh	r3, [r7, #2]
 801ac58:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801ac5c:	f000 8082 	beq.w	801ad64 <pbuf_alloc+0x124>
 801ac60:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801ac64:	f300 80c9 	bgt.w	801adfa <pbuf_alloc+0x1ba>
 801ac68:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801ac6c:	d010      	beq.n	801ac90 <pbuf_alloc+0x50>
 801ac6e:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801ac72:	f300 80c2 	bgt.w	801adfa <pbuf_alloc+0x1ba>
 801ac76:	2b01      	cmp	r3, #1
 801ac78:	d002      	beq.n	801ac80 <pbuf_alloc+0x40>
 801ac7a:	2b41      	cmp	r3, #65	@ 0x41
 801ac7c:	f040 80bd 	bne.w	801adfa <pbuf_alloc+0x1ba>
    case PBUF_REF: /* fall through */
    case PBUF_ROM:
      p = pbuf_alloc_reference(NULL, length, type);
 801ac80:	887a      	ldrh	r2, [r7, #2]
 801ac82:	88bb      	ldrh	r3, [r7, #4]
 801ac84:	4619      	mov	r1, r3
 801ac86:	2000      	movs	r0, #0
 801ac88:	f000 f8d2 	bl	801ae30 <pbuf_alloc_reference>
 801ac8c:	6278      	str	r0, [r7, #36]	@ 0x24
      break;
 801ac8e:	e0be      	b.n	801ae0e <pbuf_alloc+0x1ce>
    case PBUF_POOL: {
      struct pbuf *q, *last;
      u16_t rem_len; /* remaining length */
      p = NULL;
 801ac90:	2300      	movs	r3, #0
 801ac92:	627b      	str	r3, [r7, #36]	@ 0x24
      last = NULL;
 801ac94:	2300      	movs	r3, #0
 801ac96:	61fb      	str	r3, [r7, #28]
      rem_len = length;
 801ac98:	88bb      	ldrh	r3, [r7, #4]
 801ac9a:	837b      	strh	r3, [r7, #26]
      do {
        u16_t qlen;
        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
 801ac9c:	200c      	movs	r0, #12
 801ac9e:	f7ff fb81 	bl	801a3a4 <memp_malloc>
 801aca2:	6138      	str	r0, [r7, #16]
        if (q == NULL) {
 801aca4:	693b      	ldr	r3, [r7, #16]
 801aca6:	2b00      	cmp	r3, #0
 801aca8:	d109      	bne.n	801acbe <pbuf_alloc+0x7e>
          PBUF_POOL_IS_EMPTY();
 801acaa:	f7ff ff75 	bl	801ab98 <pbuf_pool_is_empty>
          /* free chain so far allocated */
          if (p) {
 801acae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801acb0:	2b00      	cmp	r3, #0
 801acb2:	d002      	beq.n	801acba <pbuf_alloc+0x7a>
            pbuf_free(p);
 801acb4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801acb6:	f000 fad9 	bl	801b26c <pbuf_free>
          }
          /* bail out unsuccessfully */
          return NULL;
 801acba:	2300      	movs	r3, #0
 801acbc:	e0a8      	b.n	801ae10 <pbuf_alloc+0x1d0>
        }
        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
 801acbe:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801acc0:	3303      	adds	r3, #3
 801acc2:	b29b      	uxth	r3, r3
 801acc4:	f023 0303 	bic.w	r3, r3, #3
 801acc8:	b29a      	uxth	r2, r3
 801acca:	f240 53ec 	movw	r3, #1516	@ 0x5ec
 801acce:	1a9b      	subs	r3, r3, r2
 801acd0:	b29b      	uxth	r3, r3
 801acd2:	8b7a      	ldrh	r2, [r7, #26]
 801acd4:	4293      	cmp	r3, r2
 801acd6:	bf28      	it	cs
 801acd8:	4613      	movcs	r3, r2
 801acda:	81fb      	strh	r3, [r7, #14]
        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
 801acdc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801acde:	3310      	adds	r3, #16
 801ace0:	693a      	ldr	r2, [r7, #16]
 801ace2:	4413      	add	r3, r2
 801ace4:	3303      	adds	r3, #3
 801ace6:	f023 0303 	bic.w	r3, r3, #3
 801acea:	4618      	mov	r0, r3
 801acec:	89f9      	ldrh	r1, [r7, #14]
 801acee:	8b7a      	ldrh	r2, [r7, #26]
 801acf0:	2300      	movs	r3, #0
 801acf2:	9301      	str	r3, [sp, #4]
 801acf4:	887b      	ldrh	r3, [r7, #2]
 801acf6:	9300      	str	r3, [sp, #0]
 801acf8:	460b      	mov	r3, r1
 801acfa:	4601      	mov	r1, r0
 801acfc:	6938      	ldr	r0, [r7, #16]
 801acfe:	f7ff ff75 	bl	801abec <pbuf_init_alloced_pbuf>
                               rem_len, qlen, type, 0);
        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
 801ad02:	693b      	ldr	r3, [r7, #16]
 801ad04:	685b      	ldr	r3, [r3, #4]
 801ad06:	f003 0303 	and.w	r3, r3, #3
 801ad0a:	2b00      	cmp	r3, #0
 801ad0c:	d006      	beq.n	801ad1c <pbuf_alloc+0xdc>
 801ad0e:	4b42      	ldr	r3, [pc, #264]	@ (801ae18 <pbuf_alloc+0x1d8>)
 801ad10:	f44f 7280 	mov.w	r2, #256	@ 0x100
 801ad14:	4941      	ldr	r1, [pc, #260]	@ (801ae1c <pbuf_alloc+0x1dc>)
 801ad16:	4842      	ldr	r0, [pc, #264]	@ (801ae20 <pbuf_alloc+0x1e0>)
 801ad18:	f00f fd20 	bl	802a75c <iprintf>
                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
 801ad1c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801ad1e:	3303      	adds	r3, #3
 801ad20:	f023 0303 	bic.w	r3, r3, #3
 801ad24:	f240 52ec 	movw	r2, #1516	@ 0x5ec
 801ad28:	4293      	cmp	r3, r2
 801ad2a:	d106      	bne.n	801ad3a <pbuf_alloc+0xfa>
 801ad2c:	4b3a      	ldr	r3, [pc, #232]	@ (801ae18 <pbuf_alloc+0x1d8>)
 801ad2e:	f44f 7281 	mov.w	r2, #258	@ 0x102
 801ad32:	493c      	ldr	r1, [pc, #240]	@ (801ae24 <pbuf_alloc+0x1e4>)
 801ad34:	483a      	ldr	r0, [pc, #232]	@ (801ae20 <pbuf_alloc+0x1e0>)
 801ad36:	f00f fd11 	bl	802a75c <iprintf>
                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
        if (p == NULL) {
 801ad3a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ad3c:	2b00      	cmp	r3, #0
 801ad3e:	d102      	bne.n	801ad46 <pbuf_alloc+0x106>
          /* allocated head of pbuf chain (into p) */
          p = q;
 801ad40:	693b      	ldr	r3, [r7, #16]
 801ad42:	627b      	str	r3, [r7, #36]	@ 0x24
 801ad44:	e002      	b.n	801ad4c <pbuf_alloc+0x10c>
        } else {
          /* make previous pbuf point to this pbuf */
          last->next = q;
 801ad46:	69fb      	ldr	r3, [r7, #28]
 801ad48:	693a      	ldr	r2, [r7, #16]
 801ad4a:	601a      	str	r2, [r3, #0]
        }
        last = q;
 801ad4c:	693b      	ldr	r3, [r7, #16]
 801ad4e:	61fb      	str	r3, [r7, #28]
        rem_len = (u16_t)(rem_len - qlen);
 801ad50:	8b7a      	ldrh	r2, [r7, #26]
 801ad52:	89fb      	ldrh	r3, [r7, #14]
 801ad54:	1ad3      	subs	r3, r2, r3
 801ad56:	837b      	strh	r3, [r7, #26]
        offset = 0;
 801ad58:	2300      	movs	r3, #0
 801ad5a:	847b      	strh	r3, [r7, #34]	@ 0x22
      } while (rem_len > 0);
 801ad5c:	8b7b      	ldrh	r3, [r7, #26]
 801ad5e:	2b00      	cmp	r3, #0
 801ad60:	d19c      	bne.n	801ac9c <pbuf_alloc+0x5c>
      break;
 801ad62:	e054      	b.n	801ae0e <pbuf_alloc+0x1ce>
    }
    case PBUF_RAM: {
      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
 801ad64:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801ad66:	3303      	adds	r3, #3
 801ad68:	b29b      	uxth	r3, r3
 801ad6a:	f023 0303 	bic.w	r3, r3, #3
 801ad6e:	b29a      	uxth	r2, r3
 801ad70:	88bb      	ldrh	r3, [r7, #4]
 801ad72:	3303      	adds	r3, #3
 801ad74:	b29b      	uxth	r3, r3
 801ad76:	f023 0303 	bic.w	r3, r3, #3
 801ad7a:	b29b      	uxth	r3, r3
 801ad7c:	4413      	add	r3, r2
 801ad7e:	833b      	strh	r3, [r7, #24]
      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
 801ad80:	8b3b      	ldrh	r3, [r7, #24]
 801ad82:	3310      	adds	r3, #16
 801ad84:	617b      	str	r3, [r7, #20]

      /* bug #50040: Check for integer overflow when calculating alloc_len */
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801ad86:	8b3a      	ldrh	r2, [r7, #24]
 801ad88:	88bb      	ldrh	r3, [r7, #4]
 801ad8a:	3303      	adds	r3, #3
 801ad8c:	f023 0303 	bic.w	r3, r3, #3
 801ad90:	429a      	cmp	r2, r3
 801ad92:	d306      	bcc.n	801ada2 <pbuf_alloc+0x162>
          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
 801ad94:	88bb      	ldrh	r3, [r7, #4]
 801ad96:	3303      	adds	r3, #3
 801ad98:	f023 0303 	bic.w	r3, r3, #3
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801ad9c:	697a      	ldr	r2, [r7, #20]
 801ad9e:	429a      	cmp	r2, r3
 801ada0:	d201      	bcs.n	801ada6 <pbuf_alloc+0x166>
        return NULL;
 801ada2:	2300      	movs	r3, #0
 801ada4:	e034      	b.n	801ae10 <pbuf_alloc+0x1d0>
      }

      /* If pbuf is to be allocated in RAM, allocate memory for it. */
      p = (struct pbuf *)mem_malloc(alloc_len);
 801ada6:	6978      	ldr	r0, [r7, #20]
 801ada8:	f7ff f960 	bl	801a06c <mem_malloc>
 801adac:	6278      	str	r0, [r7, #36]	@ 0x24
      if (p == NULL) {
 801adae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801adb0:	2b00      	cmp	r3, #0
 801adb2:	d101      	bne.n	801adb8 <pbuf_alloc+0x178>
        return NULL;
 801adb4:	2300      	movs	r3, #0
 801adb6:	e02b      	b.n	801ae10 <pbuf_alloc+0x1d0>
      }
      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
 801adb8:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801adba:	3310      	adds	r3, #16
 801adbc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801adbe:	4413      	add	r3, r2
 801adc0:	3303      	adds	r3, #3
 801adc2:	f023 0303 	bic.w	r3, r3, #3
 801adc6:	4618      	mov	r0, r3
 801adc8:	88b9      	ldrh	r1, [r7, #4]
 801adca:	88ba      	ldrh	r2, [r7, #4]
 801adcc:	2300      	movs	r3, #0
 801adce:	9301      	str	r3, [sp, #4]
 801add0:	887b      	ldrh	r3, [r7, #2]
 801add2:	9300      	str	r3, [sp, #0]
 801add4:	460b      	mov	r3, r1
 801add6:	4601      	mov	r1, r0
 801add8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801adda:	f7ff ff07 	bl	801abec <pbuf_init_alloced_pbuf>
                             length, length, type, 0);
      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
 801adde:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ade0:	685b      	ldr	r3, [r3, #4]
 801ade2:	f003 0303 	and.w	r3, r3, #3
 801ade6:	2b00      	cmp	r3, #0
 801ade8:	d010      	beq.n	801ae0c <pbuf_alloc+0x1cc>
 801adea:	4b0b      	ldr	r3, [pc, #44]	@ (801ae18 <pbuf_alloc+0x1d8>)
 801adec:	f44f 7291 	mov.w	r2, #290	@ 0x122
 801adf0:	490d      	ldr	r1, [pc, #52]	@ (801ae28 <pbuf_alloc+0x1e8>)
 801adf2:	480b      	ldr	r0, [pc, #44]	@ (801ae20 <pbuf_alloc+0x1e0>)
 801adf4:	f00f fcb2 	bl	802a75c <iprintf>
                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
      break;
 801adf8:	e008      	b.n	801ae0c <pbuf_alloc+0x1cc>
    }
    default:
      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
 801adfa:	4b07      	ldr	r3, [pc, #28]	@ (801ae18 <pbuf_alloc+0x1d8>)
 801adfc:	f240 1227 	movw	r2, #295	@ 0x127
 801ae00:	490a      	ldr	r1, [pc, #40]	@ (801ae2c <pbuf_alloc+0x1ec>)
 801ae02:	4807      	ldr	r0, [pc, #28]	@ (801ae20 <pbuf_alloc+0x1e0>)
 801ae04:	f00f fcaa 	bl	802a75c <iprintf>
      return NULL;
 801ae08:	2300      	movs	r3, #0
 801ae0a:	e001      	b.n	801ae10 <pbuf_alloc+0x1d0>
      break;
 801ae0c:	bf00      	nop
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
  return p;
 801ae0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801ae10:	4618      	mov	r0, r3
 801ae12:	3728      	adds	r7, #40	@ 0x28
 801ae14:	46bd      	mov	sp, r7
 801ae16:	bd80      	pop	{r7, pc}
 801ae18:	0802ef8c 	.word	0x0802ef8c
 801ae1c:	0802efbc 	.word	0x0802efbc
 801ae20:	0802efec 	.word	0x0802efec
 801ae24:	0802f014 	.word	0x0802f014
 801ae28:	0802f048 	.word	0x0802f048
 801ae2c:	0802f074 	.word	0x0802f074

0801ae30 <pbuf_alloc_reference>:
 *
 * @return the allocated pbuf.
 */
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
 801ae30:	b580      	push	{r7, lr}
 801ae32:	b086      	sub	sp, #24
 801ae34:	af02      	add	r7, sp, #8
 801ae36:	6078      	str	r0, [r7, #4]
 801ae38:	460b      	mov	r3, r1
 801ae3a:	807b      	strh	r3, [r7, #2]
 801ae3c:	4613      	mov	r3, r2
 801ae3e:	803b      	strh	r3, [r7, #0]
  struct pbuf *p;
  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
 801ae40:	883b      	ldrh	r3, [r7, #0]
 801ae42:	2b41      	cmp	r3, #65	@ 0x41
 801ae44:	d009      	beq.n	801ae5a <pbuf_alloc_reference+0x2a>
 801ae46:	883b      	ldrh	r3, [r7, #0]
 801ae48:	2b01      	cmp	r3, #1
 801ae4a:	d006      	beq.n	801ae5a <pbuf_alloc_reference+0x2a>
 801ae4c:	4b0f      	ldr	r3, [pc, #60]	@ (801ae8c <pbuf_alloc_reference+0x5c>)
 801ae4e:	f44f 72a5 	mov.w	r2, #330	@ 0x14a
 801ae52:	490f      	ldr	r1, [pc, #60]	@ (801ae90 <pbuf_alloc_reference+0x60>)
 801ae54:	480f      	ldr	r0, [pc, #60]	@ (801ae94 <pbuf_alloc_reference+0x64>)
 801ae56:	f00f fc81 	bl	802a75c <iprintf>
  /* only allocate memory for the pbuf structure */
  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
 801ae5a:	200b      	movs	r0, #11
 801ae5c:	f7ff faa2 	bl	801a3a4 <memp_malloc>
 801ae60:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 801ae62:	68fb      	ldr	r3, [r7, #12]
 801ae64:	2b00      	cmp	r3, #0
 801ae66:	d101      	bne.n	801ae6c <pbuf_alloc_reference+0x3c>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
                 (type == PBUF_ROM) ? "ROM" : "REF"));
    return NULL;
 801ae68:	2300      	movs	r3, #0
 801ae6a:	e00b      	b.n	801ae84 <pbuf_alloc_reference+0x54>
  }
  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
 801ae6c:	8879      	ldrh	r1, [r7, #2]
 801ae6e:	887a      	ldrh	r2, [r7, #2]
 801ae70:	2300      	movs	r3, #0
 801ae72:	9301      	str	r3, [sp, #4]
 801ae74:	883b      	ldrh	r3, [r7, #0]
 801ae76:	9300      	str	r3, [sp, #0]
 801ae78:	460b      	mov	r3, r1
 801ae7a:	6879      	ldr	r1, [r7, #4]
 801ae7c:	68f8      	ldr	r0, [r7, #12]
 801ae7e:	f7ff feb5 	bl	801abec <pbuf_init_alloced_pbuf>
  return p;
 801ae82:	68fb      	ldr	r3, [r7, #12]
}
 801ae84:	4618      	mov	r0, r3
 801ae86:	3710      	adds	r7, #16
 801ae88:	46bd      	mov	sp, r7
 801ae8a:	bd80      	pop	{r7, pc}
 801ae8c:	0802ef8c 	.word	0x0802ef8c
 801ae90:	0802f090 	.word	0x0802f090
 801ae94:	0802efec 	.word	0x0802efec

0801ae98 <pbuf_alloced_custom>:
 *        big enough to hold 'length' plus the header size
 */
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
                    void *payload_mem, u16_t payload_mem_len)
{
 801ae98:	b580      	push	{r7, lr}
 801ae9a:	b088      	sub	sp, #32
 801ae9c:	af02      	add	r7, sp, #8
 801ae9e:	607b      	str	r3, [r7, #4]
 801aea0:	4603      	mov	r3, r0
 801aea2:	73fb      	strb	r3, [r7, #15]
 801aea4:	460b      	mov	r3, r1
 801aea6:	81bb      	strh	r3, [r7, #12]
 801aea8:	4613      	mov	r3, r2
 801aeaa:	817b      	strh	r3, [r7, #10]
  u16_t offset = (u16_t)l;
 801aeac:	7bfb      	ldrb	r3, [r7, #15]
 801aeae:	827b      	strh	r3, [r7, #18]
  void *payload;
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));

  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
 801aeb0:	8a7b      	ldrh	r3, [r7, #18]
 801aeb2:	3303      	adds	r3, #3
 801aeb4:	f023 0203 	bic.w	r2, r3, #3
 801aeb8:	89bb      	ldrh	r3, [r7, #12]
 801aeba:	441a      	add	r2, r3
 801aebc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801aebe:	429a      	cmp	r2, r3
 801aec0:	d901      	bls.n	801aec6 <pbuf_alloced_custom+0x2e>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
    return NULL;
 801aec2:	2300      	movs	r3, #0
 801aec4:	e018      	b.n	801aef8 <pbuf_alloced_custom+0x60>
  }

  if (payload_mem != NULL) {
 801aec6:	6a3b      	ldr	r3, [r7, #32]
 801aec8:	2b00      	cmp	r3, #0
 801aeca:	d007      	beq.n	801aedc <pbuf_alloced_custom+0x44>
    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
 801aecc:	8a7b      	ldrh	r3, [r7, #18]
 801aece:	3303      	adds	r3, #3
 801aed0:	f023 0303 	bic.w	r3, r3, #3
 801aed4:	6a3a      	ldr	r2, [r7, #32]
 801aed6:	4413      	add	r3, r2
 801aed8:	617b      	str	r3, [r7, #20]
 801aeda:	e001      	b.n	801aee0 <pbuf_alloced_custom+0x48>
  } else {
    payload = NULL;
 801aedc:	2300      	movs	r3, #0
 801aede:	617b      	str	r3, [r7, #20]
  }
  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
 801aee0:	6878      	ldr	r0, [r7, #4]
 801aee2:	89b9      	ldrh	r1, [r7, #12]
 801aee4:	89ba      	ldrh	r2, [r7, #12]
 801aee6:	2302      	movs	r3, #2
 801aee8:	9301      	str	r3, [sp, #4]
 801aeea:	897b      	ldrh	r3, [r7, #10]
 801aeec:	9300      	str	r3, [sp, #0]
 801aeee:	460b      	mov	r3, r1
 801aef0:	6979      	ldr	r1, [r7, #20]
 801aef2:	f7ff fe7b 	bl	801abec <pbuf_init_alloced_pbuf>
  return &p->pbuf;
 801aef6:	687b      	ldr	r3, [r7, #4]
}
 801aef8:	4618      	mov	r0, r3
 801aefa:	3718      	adds	r7, #24
 801aefc:	46bd      	mov	sp, r7
 801aefe:	bd80      	pop	{r7, pc}

0801af00 <pbuf_realloc>:
 *
 * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
 */
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
 801af00:	b580      	push	{r7, lr}
 801af02:	b084      	sub	sp, #16
 801af04:	af00      	add	r7, sp, #0
 801af06:	6078      	str	r0, [r7, #4]
 801af08:	460b      	mov	r3, r1
 801af0a:	807b      	strh	r3, [r7, #2]
  struct pbuf *q;
  u16_t rem_len; /* remaining length */
  u16_t shrink;

  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
 801af0c:	687b      	ldr	r3, [r7, #4]
 801af0e:	2b00      	cmp	r3, #0
 801af10:	d106      	bne.n	801af20 <pbuf_realloc+0x20>
 801af12:	4b39      	ldr	r3, [pc, #228]	@ (801aff8 <pbuf_realloc+0xf8>)
 801af14:	f44f 72cc 	mov.w	r2, #408	@ 0x198
 801af18:	4938      	ldr	r1, [pc, #224]	@ (801affc <pbuf_realloc+0xfc>)
 801af1a:	4839      	ldr	r0, [pc, #228]	@ (801b000 <pbuf_realloc+0x100>)
 801af1c:	f00f fc1e 	bl	802a75c <iprintf>

  /* desired length larger than current length? */
  if (new_len >= p->tot_len) {
 801af20:	687b      	ldr	r3, [r7, #4]
 801af22:	891b      	ldrh	r3, [r3, #8]
 801af24:	887a      	ldrh	r2, [r7, #2]
 801af26:	429a      	cmp	r2, r3
 801af28:	d261      	bcs.n	801afee <pbuf_realloc+0xee>
    return;
  }

  /* the pbuf chain grows by (new_len - p->tot_len) bytes
   * (which may be negative in case of shrinking) */
  shrink = (u16_t)(p->tot_len - new_len);
 801af2a:	687b      	ldr	r3, [r7, #4]
 801af2c:	891a      	ldrh	r2, [r3, #8]
 801af2e:	887b      	ldrh	r3, [r7, #2]
 801af30:	1ad3      	subs	r3, r2, r3
 801af32:	813b      	strh	r3, [r7, #8]

  /* first, step over any pbufs that should remain in the chain */
  rem_len = new_len;
 801af34:	887b      	ldrh	r3, [r7, #2]
 801af36:	817b      	strh	r3, [r7, #10]
  q = p;
 801af38:	687b      	ldr	r3, [r7, #4]
 801af3a:	60fb      	str	r3, [r7, #12]
  /* should this pbuf be kept? */
  while (rem_len > q->len) {
 801af3c:	e018      	b.n	801af70 <pbuf_realloc+0x70>
    /* decrease remaining length by pbuf length */
    rem_len = (u16_t)(rem_len - q->len);
 801af3e:	68fb      	ldr	r3, [r7, #12]
 801af40:	895b      	ldrh	r3, [r3, #10]
 801af42:	897a      	ldrh	r2, [r7, #10]
 801af44:	1ad3      	subs	r3, r2, r3
 801af46:	817b      	strh	r3, [r7, #10]
    /* decrease total length indicator */
    q->tot_len = (u16_t)(q->tot_len - shrink);
 801af48:	68fb      	ldr	r3, [r7, #12]
 801af4a:	891a      	ldrh	r2, [r3, #8]
 801af4c:	893b      	ldrh	r3, [r7, #8]
 801af4e:	1ad3      	subs	r3, r2, r3
 801af50:	b29a      	uxth	r2, r3
 801af52:	68fb      	ldr	r3, [r7, #12]
 801af54:	811a      	strh	r2, [r3, #8]
    /* proceed to next pbuf in chain */
    q = q->next;
 801af56:	68fb      	ldr	r3, [r7, #12]
 801af58:	681b      	ldr	r3, [r3, #0]
 801af5a:	60fb      	str	r3, [r7, #12]
    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
 801af5c:	68fb      	ldr	r3, [r7, #12]
 801af5e:	2b00      	cmp	r3, #0
 801af60:	d106      	bne.n	801af70 <pbuf_realloc+0x70>
 801af62:	4b25      	ldr	r3, [pc, #148]	@ (801aff8 <pbuf_realloc+0xf8>)
 801af64:	f240 12af 	movw	r2, #431	@ 0x1af
 801af68:	4926      	ldr	r1, [pc, #152]	@ (801b004 <pbuf_realloc+0x104>)
 801af6a:	4825      	ldr	r0, [pc, #148]	@ (801b000 <pbuf_realloc+0x100>)
 801af6c:	f00f fbf6 	bl	802a75c <iprintf>
  while (rem_len > q->len) {
 801af70:	68fb      	ldr	r3, [r7, #12]
 801af72:	895b      	ldrh	r3, [r3, #10]
 801af74:	897a      	ldrh	r2, [r7, #10]
 801af76:	429a      	cmp	r2, r3
 801af78:	d8e1      	bhi.n	801af3e <pbuf_realloc+0x3e>
  /* we have now reached the new last pbuf (in q) */
  /* rem_len == desired length for pbuf q */

  /* shrink allocated memory for PBUF_RAM */
  /* (other types merely adjust their length fields */
  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
 801af7a:	68fb      	ldr	r3, [r7, #12]
 801af7c:	7b1b      	ldrb	r3, [r3, #12]
 801af7e:	f003 030f 	and.w	r3, r3, #15
 801af82:	2b00      	cmp	r3, #0
 801af84:	d11f      	bne.n	801afc6 <pbuf_realloc+0xc6>
 801af86:	68fb      	ldr	r3, [r7, #12]
 801af88:	895b      	ldrh	r3, [r3, #10]
 801af8a:	897a      	ldrh	r2, [r7, #10]
 801af8c:	429a      	cmp	r2, r3
 801af8e:	d01a      	beq.n	801afc6 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
 801af90:	68fb      	ldr	r3, [r7, #12]
 801af92:	7b5b      	ldrb	r3, [r3, #13]
 801af94:	f003 0302 	and.w	r3, r3, #2
 801af98:	2b00      	cmp	r3, #0
 801af9a:	d114      	bne.n	801afc6 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
     ) {
    /* reallocate and adjust the length of the pbuf that will be split */
    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
 801af9c:	68fb      	ldr	r3, [r7, #12]
 801af9e:	685a      	ldr	r2, [r3, #4]
 801afa0:	68fb      	ldr	r3, [r7, #12]
 801afa2:	1ad2      	subs	r2, r2, r3
 801afa4:	897b      	ldrh	r3, [r7, #10]
 801afa6:	4413      	add	r3, r2
 801afa8:	4619      	mov	r1, r3
 801afaa:	68f8      	ldr	r0, [r7, #12]
 801afac:	f7fe ff5c 	bl	8019e68 <mem_trim>
 801afb0:	60f8      	str	r0, [r7, #12]
    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
 801afb2:	68fb      	ldr	r3, [r7, #12]
 801afb4:	2b00      	cmp	r3, #0
 801afb6:	d106      	bne.n	801afc6 <pbuf_realloc+0xc6>
 801afb8:	4b0f      	ldr	r3, [pc, #60]	@ (801aff8 <pbuf_realloc+0xf8>)
 801afba:	f240 12bd 	movw	r2, #445	@ 0x1bd
 801afbe:	4912      	ldr	r1, [pc, #72]	@ (801b008 <pbuf_realloc+0x108>)
 801afc0:	480f      	ldr	r0, [pc, #60]	@ (801b000 <pbuf_realloc+0x100>)
 801afc2:	f00f fbcb 	bl	802a75c <iprintf>
  }
  /* adjust length fields for new last pbuf */
  q->len = rem_len;
 801afc6:	68fb      	ldr	r3, [r7, #12]
 801afc8:	897a      	ldrh	r2, [r7, #10]
 801afca:	815a      	strh	r2, [r3, #10]
  q->tot_len = q->len;
 801afcc:	68fb      	ldr	r3, [r7, #12]
 801afce:	895a      	ldrh	r2, [r3, #10]
 801afd0:	68fb      	ldr	r3, [r7, #12]
 801afd2:	811a      	strh	r2, [r3, #8]

  /* any remaining pbufs in chain? */
  if (q->next != NULL) {
 801afd4:	68fb      	ldr	r3, [r7, #12]
 801afd6:	681b      	ldr	r3, [r3, #0]
 801afd8:	2b00      	cmp	r3, #0
 801afda:	d004      	beq.n	801afe6 <pbuf_realloc+0xe6>
    /* free remaining pbufs in chain */
    pbuf_free(q->next);
 801afdc:	68fb      	ldr	r3, [r7, #12]
 801afde:	681b      	ldr	r3, [r3, #0]
 801afe0:	4618      	mov	r0, r3
 801afe2:	f000 f943 	bl	801b26c <pbuf_free>
  }
  /* q is last packet in chain */
  q->next = NULL;
 801afe6:	68fb      	ldr	r3, [r7, #12]
 801afe8:	2200      	movs	r2, #0
 801afea:	601a      	str	r2, [r3, #0]
 801afec:	e000      	b.n	801aff0 <pbuf_realloc+0xf0>
    return;
 801afee:	bf00      	nop

}
 801aff0:	3710      	adds	r7, #16
 801aff2:	46bd      	mov	sp, r7
 801aff4:	bd80      	pop	{r7, pc}
 801aff6:	bf00      	nop
 801aff8:	0802ef8c 	.word	0x0802ef8c
 801affc:	0802f0a4 	.word	0x0802f0a4
 801b000:	0802efec 	.word	0x0802efec
 801b004:	0802f0bc 	.word	0x0802f0bc
 801b008:	0802f0d4 	.word	0x0802f0d4

0801b00c <pbuf_add_header_impl>:
 * @return non-zero on failure, zero on success.
 *
 */
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
 801b00c:	b580      	push	{r7, lr}
 801b00e:	b086      	sub	sp, #24
 801b010:	af00      	add	r7, sp, #0
 801b012:	60f8      	str	r0, [r7, #12]
 801b014:	60b9      	str	r1, [r7, #8]
 801b016:	4613      	mov	r3, r2
 801b018:	71fb      	strb	r3, [r7, #7]
  u16_t type_internal;
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801b01a:	68fb      	ldr	r3, [r7, #12]
 801b01c:	2b00      	cmp	r3, #0
 801b01e:	d106      	bne.n	801b02e <pbuf_add_header_impl+0x22>
 801b020:	4b2b      	ldr	r3, [pc, #172]	@ (801b0d0 <pbuf_add_header_impl+0xc4>)
 801b022:	f240 12df 	movw	r2, #479	@ 0x1df
 801b026:	492b      	ldr	r1, [pc, #172]	@ (801b0d4 <pbuf_add_header_impl+0xc8>)
 801b028:	482b      	ldr	r0, [pc, #172]	@ (801b0d8 <pbuf_add_header_impl+0xcc>)
 801b02a:	f00f fb97 	bl	802a75c <iprintf>
  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
 801b02e:	68fb      	ldr	r3, [r7, #12]
 801b030:	2b00      	cmp	r3, #0
 801b032:	d003      	beq.n	801b03c <pbuf_add_header_impl+0x30>
 801b034:	68bb      	ldr	r3, [r7, #8]
 801b036:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b03a:	d301      	bcc.n	801b040 <pbuf_add_header_impl+0x34>
    return 1;
 801b03c:	2301      	movs	r3, #1
 801b03e:	e043      	b.n	801b0c8 <pbuf_add_header_impl+0xbc>
  }
  if (header_size_increment == 0) {
 801b040:	68bb      	ldr	r3, [r7, #8]
 801b042:	2b00      	cmp	r3, #0
 801b044:	d101      	bne.n	801b04a <pbuf_add_header_impl+0x3e>
    return 0;
 801b046:	2300      	movs	r3, #0
 801b048:	e03e      	b.n	801b0c8 <pbuf_add_header_impl+0xbc>
  }

  increment_magnitude = (u16_t)header_size_increment;
 801b04a:	68bb      	ldr	r3, [r7, #8]
 801b04c:	827b      	strh	r3, [r7, #18]
  /* Do not allow tot_len to wrap as a result. */
  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
 801b04e:	68fb      	ldr	r3, [r7, #12]
 801b050:	891a      	ldrh	r2, [r3, #8]
 801b052:	8a7b      	ldrh	r3, [r7, #18]
 801b054:	4413      	add	r3, r2
 801b056:	b29b      	uxth	r3, r3
 801b058:	8a7a      	ldrh	r2, [r7, #18]
 801b05a:	429a      	cmp	r2, r3
 801b05c:	d901      	bls.n	801b062 <pbuf_add_header_impl+0x56>
    return 1;
 801b05e:	2301      	movs	r3, #1
 801b060:	e032      	b.n	801b0c8 <pbuf_add_header_impl+0xbc>
  }

  type_internal = p->type_internal;
 801b062:	68fb      	ldr	r3, [r7, #12]
 801b064:	7b1b      	ldrb	r3, [r3, #12]
 801b066:	823b      	strh	r3, [r7, #16]

  /* pbuf types containing payloads? */
  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
 801b068:	8a3b      	ldrh	r3, [r7, #16]
 801b06a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 801b06e:	2b00      	cmp	r3, #0
 801b070:	d00c      	beq.n	801b08c <pbuf_add_header_impl+0x80>
    /* set new payload pointer */
    payload = (u8_t *)p->payload - header_size_increment;
 801b072:	68fb      	ldr	r3, [r7, #12]
 801b074:	685a      	ldr	r2, [r3, #4]
 801b076:	68bb      	ldr	r3, [r7, #8]
 801b078:	425b      	negs	r3, r3
 801b07a:	4413      	add	r3, r2
 801b07c:	617b      	str	r3, [r7, #20]
    /* boundary check fails? */
    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
 801b07e:	68fb      	ldr	r3, [r7, #12]
 801b080:	3310      	adds	r3, #16
 801b082:	697a      	ldr	r2, [r7, #20]
 801b084:	429a      	cmp	r2, r3
 801b086:	d20d      	bcs.n	801b0a4 <pbuf_add_header_impl+0x98>
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
      /* bail out unsuccessfully */
      return 1;
 801b088:	2301      	movs	r3, #1
 801b08a:	e01d      	b.n	801b0c8 <pbuf_add_header_impl+0xbc>
    }
    /* pbuf types referring to external payloads? */
  } else {
    /* hide a header in the payload? */
    if (force) {
 801b08c:	79fb      	ldrb	r3, [r7, #7]
 801b08e:	2b00      	cmp	r3, #0
 801b090:	d006      	beq.n	801b0a0 <pbuf_add_header_impl+0x94>
      payload = (u8_t *)p->payload - header_size_increment;
 801b092:	68fb      	ldr	r3, [r7, #12]
 801b094:	685a      	ldr	r2, [r3, #4]
 801b096:	68bb      	ldr	r3, [r7, #8]
 801b098:	425b      	negs	r3, r3
 801b09a:	4413      	add	r3, r2
 801b09c:	617b      	str	r3, [r7, #20]
 801b09e:	e001      	b.n	801b0a4 <pbuf_add_header_impl+0x98>
    } else {
      /* cannot expand payload to front (yet!)
       * bail out unsuccessfully */
      return 1;
 801b0a0:	2301      	movs	r3, #1
 801b0a2:	e011      	b.n	801b0c8 <pbuf_add_header_impl+0xbc>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
              (void *)p->payload, (void *)payload, increment_magnitude));

  /* modify pbuf fields */
  p->payload = payload;
 801b0a4:	68fb      	ldr	r3, [r7, #12]
 801b0a6:	697a      	ldr	r2, [r7, #20]
 801b0a8:	605a      	str	r2, [r3, #4]
  p->len = (u16_t)(p->len + increment_magnitude);
 801b0aa:	68fb      	ldr	r3, [r7, #12]
 801b0ac:	895a      	ldrh	r2, [r3, #10]
 801b0ae:	8a7b      	ldrh	r3, [r7, #18]
 801b0b0:	4413      	add	r3, r2
 801b0b2:	b29a      	uxth	r2, r3
 801b0b4:	68fb      	ldr	r3, [r7, #12]
 801b0b6:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
 801b0b8:	68fb      	ldr	r3, [r7, #12]
 801b0ba:	891a      	ldrh	r2, [r3, #8]
 801b0bc:	8a7b      	ldrh	r3, [r7, #18]
 801b0be:	4413      	add	r3, r2
 801b0c0:	b29a      	uxth	r2, r3
 801b0c2:	68fb      	ldr	r3, [r7, #12]
 801b0c4:	811a      	strh	r2, [r3, #8]


  return 0;
 801b0c6:	2300      	movs	r3, #0
}
 801b0c8:	4618      	mov	r0, r3
 801b0ca:	3718      	adds	r7, #24
 801b0cc:	46bd      	mov	sp, r7
 801b0ce:	bd80      	pop	{r7, pc}
 801b0d0:	0802ef8c 	.word	0x0802ef8c
 801b0d4:	0802f0f0 	.word	0x0802f0f0
 801b0d8:	0802efec 	.word	0x0802efec

0801b0dc <pbuf_add_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
 801b0dc:	b580      	push	{r7, lr}
 801b0de:	b082      	sub	sp, #8
 801b0e0:	af00      	add	r7, sp, #0
 801b0e2:	6078      	str	r0, [r7, #4]
 801b0e4:	6039      	str	r1, [r7, #0]
  return pbuf_add_header_impl(p, header_size_increment, 0);
 801b0e6:	2200      	movs	r2, #0
 801b0e8:	6839      	ldr	r1, [r7, #0]
 801b0ea:	6878      	ldr	r0, [r7, #4]
 801b0ec:	f7ff ff8e 	bl	801b00c <pbuf_add_header_impl>
 801b0f0:	4603      	mov	r3, r0
}
 801b0f2:	4618      	mov	r0, r3
 801b0f4:	3708      	adds	r7, #8
 801b0f6:	46bd      	mov	sp, r7
 801b0f8:	bd80      	pop	{r7, pc}
	...

0801b0fc <pbuf_remove_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
 801b0fc:	b580      	push	{r7, lr}
 801b0fe:	b084      	sub	sp, #16
 801b100:	af00      	add	r7, sp, #0
 801b102:	6078      	str	r0, [r7, #4]
 801b104:	6039      	str	r1, [r7, #0]
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801b106:	687b      	ldr	r3, [r7, #4]
 801b108:	2b00      	cmp	r3, #0
 801b10a:	d106      	bne.n	801b11a <pbuf_remove_header+0x1e>
 801b10c:	4b20      	ldr	r3, [pc, #128]	@ (801b190 <pbuf_remove_header+0x94>)
 801b10e:	f240 224b 	movw	r2, #587	@ 0x24b
 801b112:	4920      	ldr	r1, [pc, #128]	@ (801b194 <pbuf_remove_header+0x98>)
 801b114:	4820      	ldr	r0, [pc, #128]	@ (801b198 <pbuf_remove_header+0x9c>)
 801b116:	f00f fb21 	bl	802a75c <iprintf>
  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
 801b11a:	687b      	ldr	r3, [r7, #4]
 801b11c:	2b00      	cmp	r3, #0
 801b11e:	d003      	beq.n	801b128 <pbuf_remove_header+0x2c>
 801b120:	683b      	ldr	r3, [r7, #0]
 801b122:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b126:	d301      	bcc.n	801b12c <pbuf_remove_header+0x30>
    return 1;
 801b128:	2301      	movs	r3, #1
 801b12a:	e02c      	b.n	801b186 <pbuf_remove_header+0x8a>
  }
  if (header_size_decrement == 0) {
 801b12c:	683b      	ldr	r3, [r7, #0]
 801b12e:	2b00      	cmp	r3, #0
 801b130:	d101      	bne.n	801b136 <pbuf_remove_header+0x3a>
    return 0;
 801b132:	2300      	movs	r3, #0
 801b134:	e027      	b.n	801b186 <pbuf_remove_header+0x8a>
  }

  increment_magnitude = (u16_t)header_size_decrement;
 801b136:	683b      	ldr	r3, [r7, #0]
 801b138:	81fb      	strh	r3, [r7, #14]
  /* Check that we aren't going to move off the end of the pbuf */
  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
 801b13a:	687b      	ldr	r3, [r7, #4]
 801b13c:	895b      	ldrh	r3, [r3, #10]
 801b13e:	89fa      	ldrh	r2, [r7, #14]
 801b140:	429a      	cmp	r2, r3
 801b142:	d908      	bls.n	801b156 <pbuf_remove_header+0x5a>
 801b144:	4b12      	ldr	r3, [pc, #72]	@ (801b190 <pbuf_remove_header+0x94>)
 801b146:	f240 2255 	movw	r2, #597	@ 0x255
 801b14a:	4914      	ldr	r1, [pc, #80]	@ (801b19c <pbuf_remove_header+0xa0>)
 801b14c:	4812      	ldr	r0, [pc, #72]	@ (801b198 <pbuf_remove_header+0x9c>)
 801b14e:	f00f fb05 	bl	802a75c <iprintf>
 801b152:	2301      	movs	r3, #1
 801b154:	e017      	b.n	801b186 <pbuf_remove_header+0x8a>

  /* remember current payload pointer */
  payload = p->payload;
 801b156:	687b      	ldr	r3, [r7, #4]
 801b158:	685b      	ldr	r3, [r3, #4]
 801b15a:	60bb      	str	r3, [r7, #8]
  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */

  /* increase payload pointer (guarded by length check above) */
  p->payload = (u8_t *)p->payload + header_size_decrement;
 801b15c:	687b      	ldr	r3, [r7, #4]
 801b15e:	685a      	ldr	r2, [r3, #4]
 801b160:	683b      	ldr	r3, [r7, #0]
 801b162:	441a      	add	r2, r3
 801b164:	687b      	ldr	r3, [r7, #4]
 801b166:	605a      	str	r2, [r3, #4]
  /* modify pbuf length fields */
  p->len = (u16_t)(p->len - increment_magnitude);
 801b168:	687b      	ldr	r3, [r7, #4]
 801b16a:	895a      	ldrh	r2, [r3, #10]
 801b16c:	89fb      	ldrh	r3, [r7, #14]
 801b16e:	1ad3      	subs	r3, r2, r3
 801b170:	b29a      	uxth	r2, r3
 801b172:	687b      	ldr	r3, [r7, #4]
 801b174:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
 801b176:	687b      	ldr	r3, [r7, #4]
 801b178:	891a      	ldrh	r2, [r3, #8]
 801b17a:	89fb      	ldrh	r3, [r7, #14]
 801b17c:	1ad3      	subs	r3, r2, r3
 801b17e:	b29a      	uxth	r2, r3
 801b180:	687b      	ldr	r3, [r7, #4]
 801b182:	811a      	strh	r2, [r3, #8]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
              (void *)payload, (void *)p->payload, increment_magnitude));

  return 0;
 801b184:	2300      	movs	r3, #0
}
 801b186:	4618      	mov	r0, r3
 801b188:	3710      	adds	r7, #16
 801b18a:	46bd      	mov	sp, r7
 801b18c:	bd80      	pop	{r7, pc}
 801b18e:	bf00      	nop
 801b190:	0802ef8c 	.word	0x0802ef8c
 801b194:	0802f0f0 	.word	0x0802f0f0
 801b198:	0802efec 	.word	0x0802efec
 801b19c:	0802f0fc 	.word	0x0802f0fc

0801b1a0 <pbuf_header_impl>:

static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
 801b1a0:	b580      	push	{r7, lr}
 801b1a2:	b082      	sub	sp, #8
 801b1a4:	af00      	add	r7, sp, #0
 801b1a6:	6078      	str	r0, [r7, #4]
 801b1a8:	460b      	mov	r3, r1
 801b1aa:	807b      	strh	r3, [r7, #2]
 801b1ac:	4613      	mov	r3, r2
 801b1ae:	707b      	strb	r3, [r7, #1]
  if (header_size_increment < 0) {
 801b1b0:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b1b4:	2b00      	cmp	r3, #0
 801b1b6:	da08      	bge.n	801b1ca <pbuf_header_impl+0x2a>
    return pbuf_remove_header(p, (size_t) - header_size_increment);
 801b1b8:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b1bc:	425b      	negs	r3, r3
 801b1be:	4619      	mov	r1, r3
 801b1c0:	6878      	ldr	r0, [r7, #4]
 801b1c2:	f7ff ff9b 	bl	801b0fc <pbuf_remove_header>
 801b1c6:	4603      	mov	r3, r0
 801b1c8:	e007      	b.n	801b1da <pbuf_header_impl+0x3a>
  } else {
    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
 801b1ca:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b1ce:	787a      	ldrb	r2, [r7, #1]
 801b1d0:	4619      	mov	r1, r3
 801b1d2:	6878      	ldr	r0, [r7, #4]
 801b1d4:	f7ff ff1a 	bl	801b00c <pbuf_add_header_impl>
 801b1d8:	4603      	mov	r3, r0
  }
}
 801b1da:	4618      	mov	r0, r3
 801b1dc:	3708      	adds	r7, #8
 801b1de:	46bd      	mov	sp, r7
 801b1e0:	bd80      	pop	{r7, pc}

0801b1e2 <pbuf_header_force>:
 * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
 * This is used internally only, to allow PBUF_REF for RX.
 */
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
 801b1e2:	b580      	push	{r7, lr}
 801b1e4:	b082      	sub	sp, #8
 801b1e6:	af00      	add	r7, sp, #0
 801b1e8:	6078      	str	r0, [r7, #4]
 801b1ea:	460b      	mov	r3, r1
 801b1ec:	807b      	strh	r3, [r7, #2]
  return pbuf_header_impl(p, header_size_increment, 1);
 801b1ee:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b1f2:	2201      	movs	r2, #1
 801b1f4:	4619      	mov	r1, r3
 801b1f6:	6878      	ldr	r0, [r7, #4]
 801b1f8:	f7ff ffd2 	bl	801b1a0 <pbuf_header_impl>
 801b1fc:	4603      	mov	r3, r0
}
 801b1fe:	4618      	mov	r0, r3
 801b200:	3708      	adds	r7, #8
 801b202:	46bd      	mov	sp, r7
 801b204:	bd80      	pop	{r7, pc}

0801b206 <pbuf_free_header>:
 *                   takes an u16_t not s16_t!
 * @return the new head pbuf
 */
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
 801b206:	b580      	push	{r7, lr}
 801b208:	b086      	sub	sp, #24
 801b20a:	af00      	add	r7, sp, #0
 801b20c:	6078      	str	r0, [r7, #4]
 801b20e:	460b      	mov	r3, r1
 801b210:	807b      	strh	r3, [r7, #2]
  struct pbuf *p = q;
 801b212:	687b      	ldr	r3, [r7, #4]
 801b214:	617b      	str	r3, [r7, #20]
  u16_t free_left = size;
 801b216:	887b      	ldrh	r3, [r7, #2]
 801b218:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801b21a:	e01c      	b.n	801b256 <pbuf_free_header+0x50>
    if (free_left >= p->len) {
 801b21c:	697b      	ldr	r3, [r7, #20]
 801b21e:	895b      	ldrh	r3, [r3, #10]
 801b220:	8a7a      	ldrh	r2, [r7, #18]
 801b222:	429a      	cmp	r2, r3
 801b224:	d310      	bcc.n	801b248 <pbuf_free_header+0x42>
      struct pbuf *f = p;
 801b226:	697b      	ldr	r3, [r7, #20]
 801b228:	60fb      	str	r3, [r7, #12]
      free_left = (u16_t)(free_left - p->len);
 801b22a:	697b      	ldr	r3, [r7, #20]
 801b22c:	895b      	ldrh	r3, [r3, #10]
 801b22e:	8a7a      	ldrh	r2, [r7, #18]
 801b230:	1ad3      	subs	r3, r2, r3
 801b232:	827b      	strh	r3, [r7, #18]
      p = p->next;
 801b234:	697b      	ldr	r3, [r7, #20]
 801b236:	681b      	ldr	r3, [r3, #0]
 801b238:	617b      	str	r3, [r7, #20]
      f->next = 0;
 801b23a:	68fb      	ldr	r3, [r7, #12]
 801b23c:	2200      	movs	r2, #0
 801b23e:	601a      	str	r2, [r3, #0]
      pbuf_free(f);
 801b240:	68f8      	ldr	r0, [r7, #12]
 801b242:	f000 f813 	bl	801b26c <pbuf_free>
 801b246:	e006      	b.n	801b256 <pbuf_free_header+0x50>
    } else {
      pbuf_remove_header(p, free_left);
 801b248:	8a7b      	ldrh	r3, [r7, #18]
 801b24a:	4619      	mov	r1, r3
 801b24c:	6978      	ldr	r0, [r7, #20]
 801b24e:	f7ff ff55 	bl	801b0fc <pbuf_remove_header>
      free_left = 0;
 801b252:	2300      	movs	r3, #0
 801b254:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801b256:	8a7b      	ldrh	r3, [r7, #18]
 801b258:	2b00      	cmp	r3, #0
 801b25a:	d002      	beq.n	801b262 <pbuf_free_header+0x5c>
 801b25c:	697b      	ldr	r3, [r7, #20]
 801b25e:	2b00      	cmp	r3, #0
 801b260:	d1dc      	bne.n	801b21c <pbuf_free_header+0x16>
    }
  }
  return p;
 801b262:	697b      	ldr	r3, [r7, #20]
}
 801b264:	4618      	mov	r0, r3
 801b266:	3718      	adds	r7, #24
 801b268:	46bd      	mov	sp, r7
 801b26a:	bd80      	pop	{r7, pc}

0801b26c <pbuf_free>:
 * 1->1->1 becomes .......
 *
 */
u8_t
pbuf_free(struct pbuf *p)
{
 801b26c:	b580      	push	{r7, lr}
 801b26e:	b088      	sub	sp, #32
 801b270:	af00      	add	r7, sp, #0
 801b272:	6078      	str	r0, [r7, #4]
  u8_t alloc_src;
  struct pbuf *q;
  u8_t count;

  if (p == NULL) {
 801b274:	687b      	ldr	r3, [r7, #4]
 801b276:	2b00      	cmp	r3, #0
 801b278:	d10b      	bne.n	801b292 <pbuf_free+0x26>
    LWIP_ASSERT("p != NULL", p != NULL);
 801b27a:	687b      	ldr	r3, [r7, #4]
 801b27c:	2b00      	cmp	r3, #0
 801b27e:	d106      	bne.n	801b28e <pbuf_free+0x22>
 801b280:	4b3b      	ldr	r3, [pc, #236]	@ (801b370 <pbuf_free+0x104>)
 801b282:	f44f 7237 	mov.w	r2, #732	@ 0x2dc
 801b286:	493b      	ldr	r1, [pc, #236]	@ (801b374 <pbuf_free+0x108>)
 801b288:	483b      	ldr	r0, [pc, #236]	@ (801b378 <pbuf_free+0x10c>)
 801b28a:	f00f fa67 	bl	802a75c <iprintf>
    /* if assertions are disabled, proceed with debug output */
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_free(p == NULL) was called.\n"));
    return 0;
 801b28e:	2300      	movs	r3, #0
 801b290:	e069      	b.n	801b366 <pbuf_free+0xfa>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));

  PERF_START;

  count = 0;
 801b292:	2300      	movs	r3, #0
 801b294:	77fb      	strb	r3, [r7, #31]
  /* de-allocate all consecutive pbufs from the head of the chain that
   * obtain a zero reference count after decrementing*/
  while (p != NULL) {
 801b296:	e062      	b.n	801b35e <pbuf_free+0xf2>
    LWIP_PBUF_REF_T ref;
    SYS_ARCH_DECL_PROTECT(old_level);
    /* Since decrementing ref cannot be guaranteed to be a single machine operation
     * we must protect it. We put the new ref into a local variable to prevent
     * further protection. */
    SYS_ARCH_PROTECT(old_level);
 801b298:	f00b ffca 	bl	8027230 <sys_arch_protect>
 801b29c:	61b8      	str	r0, [r7, #24]
    /* all pbufs in a chain are referenced at least once */
    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
 801b29e:	687b      	ldr	r3, [r7, #4]
 801b2a0:	7b9b      	ldrb	r3, [r3, #14]
 801b2a2:	2b00      	cmp	r3, #0
 801b2a4:	d106      	bne.n	801b2b4 <pbuf_free+0x48>
 801b2a6:	4b32      	ldr	r3, [pc, #200]	@ (801b370 <pbuf_free+0x104>)
 801b2a8:	f240 22f1 	movw	r2, #753	@ 0x2f1
 801b2ac:	4933      	ldr	r1, [pc, #204]	@ (801b37c <pbuf_free+0x110>)
 801b2ae:	4832      	ldr	r0, [pc, #200]	@ (801b378 <pbuf_free+0x10c>)
 801b2b0:	f00f fa54 	bl	802a75c <iprintf>
    /* decrease reference count (number of pointers to pbuf) */
    ref = --(p->ref);
 801b2b4:	687b      	ldr	r3, [r7, #4]
 801b2b6:	7b9b      	ldrb	r3, [r3, #14]
 801b2b8:	3b01      	subs	r3, #1
 801b2ba:	b2da      	uxtb	r2, r3
 801b2bc:	687b      	ldr	r3, [r7, #4]
 801b2be:	739a      	strb	r2, [r3, #14]
 801b2c0:	687b      	ldr	r3, [r7, #4]
 801b2c2:	7b9b      	ldrb	r3, [r3, #14]
 801b2c4:	75fb      	strb	r3, [r7, #23]
    SYS_ARCH_UNPROTECT(old_level);
 801b2c6:	69b8      	ldr	r0, [r7, #24]
 801b2c8:	f00b ffc0 	bl	802724c <sys_arch_unprotect>
    /* this pbuf is no longer referenced to? */
    if (ref == 0) {
 801b2cc:	7dfb      	ldrb	r3, [r7, #23]
 801b2ce:	2b00      	cmp	r3, #0
 801b2d0:	d143      	bne.n	801b35a <pbuf_free+0xee>
      /* remember next pbuf in chain for next iteration */
      q = p->next;
 801b2d2:	687b      	ldr	r3, [r7, #4]
 801b2d4:	681b      	ldr	r3, [r3, #0]
 801b2d6:	613b      	str	r3, [r7, #16]
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
      alloc_src = pbuf_get_allocsrc(p);
 801b2d8:	687b      	ldr	r3, [r7, #4]
 801b2da:	7b1b      	ldrb	r3, [r3, #12]
 801b2dc:	f003 030f 	and.w	r3, r3, #15
 801b2e0:	73fb      	strb	r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
      /* is this a custom pbuf? */
      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
 801b2e2:	687b      	ldr	r3, [r7, #4]
 801b2e4:	7b5b      	ldrb	r3, [r3, #13]
 801b2e6:	f003 0302 	and.w	r3, r3, #2
 801b2ea:	2b00      	cmp	r3, #0
 801b2ec:	d011      	beq.n	801b312 <pbuf_free+0xa6>
        struct pbuf_custom *pc = (struct pbuf_custom *)p;
 801b2ee:	687b      	ldr	r3, [r7, #4]
 801b2f0:	60bb      	str	r3, [r7, #8]
        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
 801b2f2:	68bb      	ldr	r3, [r7, #8]
 801b2f4:	691b      	ldr	r3, [r3, #16]
 801b2f6:	2b00      	cmp	r3, #0
 801b2f8:	d106      	bne.n	801b308 <pbuf_free+0x9c>
 801b2fa:	4b1d      	ldr	r3, [pc, #116]	@ (801b370 <pbuf_free+0x104>)
 801b2fc:	f240 22ff 	movw	r2, #767	@ 0x2ff
 801b300:	491f      	ldr	r1, [pc, #124]	@ (801b380 <pbuf_free+0x114>)
 801b302:	481d      	ldr	r0, [pc, #116]	@ (801b378 <pbuf_free+0x10c>)
 801b304:	f00f fa2a 	bl	802a75c <iprintf>
        pc->custom_free_function(p);
 801b308:	68bb      	ldr	r3, [r7, #8]
 801b30a:	691b      	ldr	r3, [r3, #16]
 801b30c:	6878      	ldr	r0, [r7, #4]
 801b30e:	4798      	blx	r3
 801b310:	e01d      	b.n	801b34e <pbuf_free+0xe2>
      } else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
      {
        /* is this a pbuf from the pool? */
        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
 801b312:	7bfb      	ldrb	r3, [r7, #15]
 801b314:	2b02      	cmp	r3, #2
 801b316:	d104      	bne.n	801b322 <pbuf_free+0xb6>
          memp_free(MEMP_PBUF_POOL, p);
 801b318:	6879      	ldr	r1, [r7, #4]
 801b31a:	200c      	movs	r0, #12
 801b31c:	f7ff f8b8 	bl	801a490 <memp_free>
 801b320:	e015      	b.n	801b34e <pbuf_free+0xe2>
          /* is this a ROM or RAM referencing pbuf? */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
 801b322:	7bfb      	ldrb	r3, [r7, #15]
 801b324:	2b01      	cmp	r3, #1
 801b326:	d104      	bne.n	801b332 <pbuf_free+0xc6>
          memp_free(MEMP_PBUF, p);
 801b328:	6879      	ldr	r1, [r7, #4]
 801b32a:	200b      	movs	r0, #11
 801b32c:	f7ff f8b0 	bl	801a490 <memp_free>
 801b330:	e00d      	b.n	801b34e <pbuf_free+0xe2>
          /* type == PBUF_RAM */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
 801b332:	7bfb      	ldrb	r3, [r7, #15]
 801b334:	2b00      	cmp	r3, #0
 801b336:	d103      	bne.n	801b340 <pbuf_free+0xd4>
          mem_free(p);
 801b338:	6878      	ldr	r0, [r7, #4]
 801b33a:	f7fe fd05 	bl	8019d48 <mem_free>
 801b33e:	e006      	b.n	801b34e <pbuf_free+0xe2>
        } else {
          /* @todo: support freeing other types */
          LWIP_ASSERT("invalid pbuf type", 0);
 801b340:	4b0b      	ldr	r3, [pc, #44]	@ (801b370 <pbuf_free+0x104>)
 801b342:	f240 320f 	movw	r2, #783	@ 0x30f
 801b346:	490f      	ldr	r1, [pc, #60]	@ (801b384 <pbuf_free+0x118>)
 801b348:	480b      	ldr	r0, [pc, #44]	@ (801b378 <pbuf_free+0x10c>)
 801b34a:	f00f fa07 	bl	802a75c <iprintf>
        }
      }
      count++;
 801b34e:	7ffb      	ldrb	r3, [r7, #31]
 801b350:	3301      	adds	r3, #1
 801b352:	77fb      	strb	r3, [r7, #31]
      /* proceed to next pbuf */
      p = q;
 801b354:	693b      	ldr	r3, [r7, #16]
 801b356:	607b      	str	r3, [r7, #4]
 801b358:	e001      	b.n	801b35e <pbuf_free+0xf2>
      /* p->ref > 0, this pbuf is still referenced to */
      /* (and so the remaining pbufs in chain as well) */
    } else {
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
      /* stop walking through the chain */
      p = NULL;
 801b35a:	2300      	movs	r3, #0
 801b35c:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801b35e:	687b      	ldr	r3, [r7, #4]
 801b360:	2b00      	cmp	r3, #0
 801b362:	d199      	bne.n	801b298 <pbuf_free+0x2c>
    }
  }
  PERF_STOP("pbuf_free");
  /* return number of de-allocated pbufs */
  return count;
 801b364:	7ffb      	ldrb	r3, [r7, #31]
}
 801b366:	4618      	mov	r0, r3
 801b368:	3720      	adds	r7, #32
 801b36a:	46bd      	mov	sp, r7
 801b36c:	bd80      	pop	{r7, pc}
 801b36e:	bf00      	nop
 801b370:	0802ef8c 	.word	0x0802ef8c
 801b374:	0802f0f0 	.word	0x0802f0f0
 801b378:	0802efec 	.word	0x0802efec
 801b37c:	0802f11c 	.word	0x0802f11c
 801b380:	0802f134 	.word	0x0802f134
 801b384:	0802f158 	.word	0x0802f158

0801b388 <pbuf_clen>:
 * @param p first pbuf of chain
 * @return the number of pbufs in a chain
 */
u16_t
pbuf_clen(const struct pbuf *p)
{
 801b388:	b480      	push	{r7}
 801b38a:	b085      	sub	sp, #20
 801b38c:	af00      	add	r7, sp, #0
 801b38e:	6078      	str	r0, [r7, #4]
  u16_t len;

  len = 0;
 801b390:	2300      	movs	r3, #0
 801b392:	81fb      	strh	r3, [r7, #14]
  while (p != NULL) {
 801b394:	e005      	b.n	801b3a2 <pbuf_clen+0x1a>
    ++len;
 801b396:	89fb      	ldrh	r3, [r7, #14]
 801b398:	3301      	adds	r3, #1
 801b39a:	81fb      	strh	r3, [r7, #14]
    p = p->next;
 801b39c:	687b      	ldr	r3, [r7, #4]
 801b39e:	681b      	ldr	r3, [r3, #0]
 801b3a0:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801b3a2:	687b      	ldr	r3, [r7, #4]
 801b3a4:	2b00      	cmp	r3, #0
 801b3a6:	d1f6      	bne.n	801b396 <pbuf_clen+0xe>
  }
  return len;
 801b3a8:	89fb      	ldrh	r3, [r7, #14]
}
 801b3aa:	4618      	mov	r0, r3
 801b3ac:	3714      	adds	r7, #20
 801b3ae:	46bd      	mov	sp, r7
 801b3b0:	f85d 7b04 	ldr.w	r7, [sp], #4
 801b3b4:	4770      	bx	lr
	...

0801b3b8 <pbuf_ref>:
 * @param p pbuf to increase reference counter of
 *
 */
void
pbuf_ref(struct pbuf *p)
{
 801b3b8:	b580      	push	{r7, lr}
 801b3ba:	b084      	sub	sp, #16
 801b3bc:	af00      	add	r7, sp, #0
 801b3be:	6078      	str	r0, [r7, #4]
  /* pbuf given? */
  if (p != NULL) {
 801b3c0:	687b      	ldr	r3, [r7, #4]
 801b3c2:	2b00      	cmp	r3, #0
 801b3c4:	d016      	beq.n	801b3f4 <pbuf_ref+0x3c>
    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
 801b3c6:	f00b ff33 	bl	8027230 <sys_arch_protect>
 801b3ca:	60f8      	str	r0, [r7, #12]
 801b3cc:	687b      	ldr	r3, [r7, #4]
 801b3ce:	7b9b      	ldrb	r3, [r3, #14]
 801b3d0:	3301      	adds	r3, #1
 801b3d2:	b2da      	uxtb	r2, r3
 801b3d4:	687b      	ldr	r3, [r7, #4]
 801b3d6:	739a      	strb	r2, [r3, #14]
 801b3d8:	68f8      	ldr	r0, [r7, #12]
 801b3da:	f00b ff37 	bl	802724c <sys_arch_unprotect>
    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
 801b3de:	687b      	ldr	r3, [r7, #4]
 801b3e0:	7b9b      	ldrb	r3, [r3, #14]
 801b3e2:	2b00      	cmp	r3, #0
 801b3e4:	d106      	bne.n	801b3f4 <pbuf_ref+0x3c>
 801b3e6:	4b05      	ldr	r3, [pc, #20]	@ (801b3fc <pbuf_ref+0x44>)
 801b3e8:	f240 3242 	movw	r2, #834	@ 0x342
 801b3ec:	4904      	ldr	r1, [pc, #16]	@ (801b400 <pbuf_ref+0x48>)
 801b3ee:	4805      	ldr	r0, [pc, #20]	@ (801b404 <pbuf_ref+0x4c>)
 801b3f0:	f00f f9b4 	bl	802a75c <iprintf>
  }
}
 801b3f4:	bf00      	nop
 801b3f6:	3710      	adds	r7, #16
 801b3f8:	46bd      	mov	sp, r7
 801b3fa:	bd80      	pop	{r7, pc}
 801b3fc:	0802ef8c 	.word	0x0802ef8c
 801b400:	0802f16c 	.word	0x0802f16c
 801b404:	0802efec 	.word	0x0802efec

0801b408 <pbuf_cat>:
 *
 * @see pbuf_chain()
 */
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
 801b408:	b580      	push	{r7, lr}
 801b40a:	b084      	sub	sp, #16
 801b40c:	af00      	add	r7, sp, #0
 801b40e:	6078      	str	r0, [r7, #4]
 801b410:	6039      	str	r1, [r7, #0]
  struct pbuf *p;

  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
 801b412:	687b      	ldr	r3, [r7, #4]
 801b414:	2b00      	cmp	r3, #0
 801b416:	d002      	beq.n	801b41e <pbuf_cat+0x16>
 801b418:	683b      	ldr	r3, [r7, #0]
 801b41a:	2b00      	cmp	r3, #0
 801b41c:	d107      	bne.n	801b42e <pbuf_cat+0x26>
 801b41e:	4b20      	ldr	r3, [pc, #128]	@ (801b4a0 <pbuf_cat+0x98>)
 801b420:	f240 3259 	movw	r2, #857	@ 0x359
 801b424:	491f      	ldr	r1, [pc, #124]	@ (801b4a4 <pbuf_cat+0x9c>)
 801b426:	4820      	ldr	r0, [pc, #128]	@ (801b4a8 <pbuf_cat+0xa0>)
 801b428:	f00f f998 	bl	802a75c <iprintf>
 801b42c:	e034      	b.n	801b498 <pbuf_cat+0x90>
             ((h != NULL) && (t != NULL)), return;);

  /* proceed to last pbuf of chain */
  for (p = h; p->next != NULL; p = p->next) {
 801b42e:	687b      	ldr	r3, [r7, #4]
 801b430:	60fb      	str	r3, [r7, #12]
 801b432:	e00a      	b.n	801b44a <pbuf_cat+0x42>
    /* add total length of second chain to all totals of first chain */
    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801b434:	68fb      	ldr	r3, [r7, #12]
 801b436:	891a      	ldrh	r2, [r3, #8]
 801b438:	683b      	ldr	r3, [r7, #0]
 801b43a:	891b      	ldrh	r3, [r3, #8]
 801b43c:	4413      	add	r3, r2
 801b43e:	b29a      	uxth	r2, r3
 801b440:	68fb      	ldr	r3, [r7, #12]
 801b442:	811a      	strh	r2, [r3, #8]
  for (p = h; p->next != NULL; p = p->next) {
 801b444:	68fb      	ldr	r3, [r7, #12]
 801b446:	681b      	ldr	r3, [r3, #0]
 801b448:	60fb      	str	r3, [r7, #12]
 801b44a:	68fb      	ldr	r3, [r7, #12]
 801b44c:	681b      	ldr	r3, [r3, #0]
 801b44e:	2b00      	cmp	r3, #0
 801b450:	d1f0      	bne.n	801b434 <pbuf_cat+0x2c>
  }
  /* { p is last pbuf of first h chain, p->next == NULL } */
  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
 801b452:	68fb      	ldr	r3, [r7, #12]
 801b454:	891a      	ldrh	r2, [r3, #8]
 801b456:	68fb      	ldr	r3, [r7, #12]
 801b458:	895b      	ldrh	r3, [r3, #10]
 801b45a:	429a      	cmp	r2, r3
 801b45c:	d006      	beq.n	801b46c <pbuf_cat+0x64>
 801b45e:	4b10      	ldr	r3, [pc, #64]	@ (801b4a0 <pbuf_cat+0x98>)
 801b460:	f240 3262 	movw	r2, #866	@ 0x362
 801b464:	4911      	ldr	r1, [pc, #68]	@ (801b4ac <pbuf_cat+0xa4>)
 801b466:	4810      	ldr	r0, [pc, #64]	@ (801b4a8 <pbuf_cat+0xa0>)
 801b468:	f00f f978 	bl	802a75c <iprintf>
  LWIP_ASSERT("p->next == NULL", p->next == NULL);
 801b46c:	68fb      	ldr	r3, [r7, #12]
 801b46e:	681b      	ldr	r3, [r3, #0]
 801b470:	2b00      	cmp	r3, #0
 801b472:	d006      	beq.n	801b482 <pbuf_cat+0x7a>
 801b474:	4b0a      	ldr	r3, [pc, #40]	@ (801b4a0 <pbuf_cat+0x98>)
 801b476:	f240 3263 	movw	r2, #867	@ 0x363
 801b47a:	490d      	ldr	r1, [pc, #52]	@ (801b4b0 <pbuf_cat+0xa8>)
 801b47c:	480a      	ldr	r0, [pc, #40]	@ (801b4a8 <pbuf_cat+0xa0>)
 801b47e:	f00f f96d 	bl	802a75c <iprintf>
  /* add total length of second chain to last pbuf total of first chain */
  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801b482:	68fb      	ldr	r3, [r7, #12]
 801b484:	891a      	ldrh	r2, [r3, #8]
 801b486:	683b      	ldr	r3, [r7, #0]
 801b488:	891b      	ldrh	r3, [r3, #8]
 801b48a:	4413      	add	r3, r2
 801b48c:	b29a      	uxth	r2, r3
 801b48e:	68fb      	ldr	r3, [r7, #12]
 801b490:	811a      	strh	r2, [r3, #8]
  /* chain last pbuf of head (p) with first of tail (t) */
  p->next = t;
 801b492:	68fb      	ldr	r3, [r7, #12]
 801b494:	683a      	ldr	r2, [r7, #0]
 801b496:	601a      	str	r2, [r3, #0]
  /* p->next now references t, but the caller will drop its reference to t,
   * so netto there is no change to the reference count of t.
   */
}
 801b498:	3710      	adds	r7, #16
 801b49a:	46bd      	mov	sp, r7
 801b49c:	bd80      	pop	{r7, pc}
 801b49e:	bf00      	nop
 801b4a0:	0802ef8c 	.word	0x0802ef8c
 801b4a4:	0802f180 	.word	0x0802f180
 801b4a8:	0802efec 	.word	0x0802efec
 801b4ac:	0802f1b8 	.word	0x0802f1b8
 801b4b0:	0802f1e8 	.word	0x0802f1e8

0801b4b4 <pbuf_chain>:
 * The ->ref field of the first pbuf of the tail chain is adjusted.
 *
 */
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
 801b4b4:	b580      	push	{r7, lr}
 801b4b6:	b082      	sub	sp, #8
 801b4b8:	af00      	add	r7, sp, #0
 801b4ba:	6078      	str	r0, [r7, #4]
 801b4bc:	6039      	str	r1, [r7, #0]
  pbuf_cat(h, t);
 801b4be:	6839      	ldr	r1, [r7, #0]
 801b4c0:	6878      	ldr	r0, [r7, #4]
 801b4c2:	f7ff ffa1 	bl	801b408 <pbuf_cat>
  /* t is now referenced by h */
  pbuf_ref(t);
 801b4c6:	6838      	ldr	r0, [r7, #0]
 801b4c8:	f7ff ff76 	bl	801b3b8 <pbuf_ref>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
 801b4cc:	bf00      	nop
 801b4ce:	3708      	adds	r7, #8
 801b4d0:	46bd      	mov	sp, r7
 801b4d2:	bd80      	pop	{r7, pc}

0801b4d4 <pbuf_copy>:
 *         ERR_ARG if one of the pbufs is NULL or p_to is not big
 *                 enough to hold p_from
 */
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
 801b4d4:	b580      	push	{r7, lr}
 801b4d6:	b086      	sub	sp, #24
 801b4d8:	af00      	add	r7, sp, #0
 801b4da:	6078      	str	r0, [r7, #4]
 801b4dc:	6039      	str	r1, [r7, #0]
  size_t offset_to = 0, offset_from = 0, len;
 801b4de:	2300      	movs	r3, #0
 801b4e0:	617b      	str	r3, [r7, #20]
 801b4e2:	2300      	movs	r3, #0
 801b4e4:	613b      	str	r3, [r7, #16]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
              (const void *)p_to, (const void *)p_from));

  /* is the target big enough to hold the source? */
  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
 801b4e6:	687b      	ldr	r3, [r7, #4]
 801b4e8:	2b00      	cmp	r3, #0
 801b4ea:	d008      	beq.n	801b4fe <pbuf_copy+0x2a>
 801b4ec:	683b      	ldr	r3, [r7, #0]
 801b4ee:	2b00      	cmp	r3, #0
 801b4f0:	d005      	beq.n	801b4fe <pbuf_copy+0x2a>
 801b4f2:	687b      	ldr	r3, [r7, #4]
 801b4f4:	891a      	ldrh	r2, [r3, #8]
 801b4f6:	683b      	ldr	r3, [r7, #0]
 801b4f8:	891b      	ldrh	r3, [r3, #8]
 801b4fa:	429a      	cmp	r2, r3
 801b4fc:	d209      	bcs.n	801b512 <pbuf_copy+0x3e>
 801b4fe:	4b57      	ldr	r3, [pc, #348]	@ (801b65c <pbuf_copy+0x188>)
 801b500:	f240 32c9 	movw	r2, #969	@ 0x3c9
 801b504:	4956      	ldr	r1, [pc, #344]	@ (801b660 <pbuf_copy+0x18c>)
 801b506:	4857      	ldr	r0, [pc, #348]	@ (801b664 <pbuf_copy+0x190>)
 801b508:	f00f f928 	bl	802a75c <iprintf>
 801b50c:	f06f 030f 	mvn.w	r3, #15
 801b510:	e09f      	b.n	801b652 <pbuf_copy+0x17e>
             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);

  /* iterate through pbuf chain */
  do {
    /* copy one part of the original chain */
    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
 801b512:	687b      	ldr	r3, [r7, #4]
 801b514:	895b      	ldrh	r3, [r3, #10]
 801b516:	461a      	mov	r2, r3
 801b518:	697b      	ldr	r3, [r7, #20]
 801b51a:	1ad2      	subs	r2, r2, r3
 801b51c:	683b      	ldr	r3, [r7, #0]
 801b51e:	895b      	ldrh	r3, [r3, #10]
 801b520:	4619      	mov	r1, r3
 801b522:	693b      	ldr	r3, [r7, #16]
 801b524:	1acb      	subs	r3, r1, r3
 801b526:	429a      	cmp	r2, r3
 801b528:	d306      	bcc.n	801b538 <pbuf_copy+0x64>
      /* complete current p_from fits into current p_to */
      len = p_from->len - offset_from;
 801b52a:	683b      	ldr	r3, [r7, #0]
 801b52c:	895b      	ldrh	r3, [r3, #10]
 801b52e:	461a      	mov	r2, r3
 801b530:	693b      	ldr	r3, [r7, #16]
 801b532:	1ad3      	subs	r3, r2, r3
 801b534:	60fb      	str	r3, [r7, #12]
 801b536:	e005      	b.n	801b544 <pbuf_copy+0x70>
    } else {
      /* current p_from does not fit into current p_to */
      len = p_to->len - offset_to;
 801b538:	687b      	ldr	r3, [r7, #4]
 801b53a:	895b      	ldrh	r3, [r3, #10]
 801b53c:	461a      	mov	r2, r3
 801b53e:	697b      	ldr	r3, [r7, #20]
 801b540:	1ad3      	subs	r3, r2, r3
 801b542:	60fb      	str	r3, [r7, #12]
    }
    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
 801b544:	687b      	ldr	r3, [r7, #4]
 801b546:	685a      	ldr	r2, [r3, #4]
 801b548:	697b      	ldr	r3, [r7, #20]
 801b54a:	18d0      	adds	r0, r2, r3
 801b54c:	683b      	ldr	r3, [r7, #0]
 801b54e:	685a      	ldr	r2, [r3, #4]
 801b550:	693b      	ldr	r3, [r7, #16]
 801b552:	4413      	add	r3, r2
 801b554:	68fa      	ldr	r2, [r7, #12]
 801b556:	4619      	mov	r1, r3
 801b558:	f00f fb89 	bl	802ac6e <memcpy>
    offset_to += len;
 801b55c:	697a      	ldr	r2, [r7, #20]
 801b55e:	68fb      	ldr	r3, [r7, #12]
 801b560:	4413      	add	r3, r2
 801b562:	617b      	str	r3, [r7, #20]
    offset_from += len;
 801b564:	693a      	ldr	r2, [r7, #16]
 801b566:	68fb      	ldr	r3, [r7, #12]
 801b568:	4413      	add	r3, r2
 801b56a:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
 801b56c:	687b      	ldr	r3, [r7, #4]
 801b56e:	895b      	ldrh	r3, [r3, #10]
 801b570:	461a      	mov	r2, r3
 801b572:	697b      	ldr	r3, [r7, #20]
 801b574:	4293      	cmp	r3, r2
 801b576:	d906      	bls.n	801b586 <pbuf_copy+0xb2>
 801b578:	4b38      	ldr	r3, [pc, #224]	@ (801b65c <pbuf_copy+0x188>)
 801b57a:	f240 32d9 	movw	r2, #985	@ 0x3d9
 801b57e:	493a      	ldr	r1, [pc, #232]	@ (801b668 <pbuf_copy+0x194>)
 801b580:	4838      	ldr	r0, [pc, #224]	@ (801b664 <pbuf_copy+0x190>)
 801b582:	f00f f8eb 	bl	802a75c <iprintf>
    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
 801b586:	683b      	ldr	r3, [r7, #0]
 801b588:	895b      	ldrh	r3, [r3, #10]
 801b58a:	461a      	mov	r2, r3
 801b58c:	693b      	ldr	r3, [r7, #16]
 801b58e:	4293      	cmp	r3, r2
 801b590:	d906      	bls.n	801b5a0 <pbuf_copy+0xcc>
 801b592:	4b32      	ldr	r3, [pc, #200]	@ (801b65c <pbuf_copy+0x188>)
 801b594:	f240 32da 	movw	r2, #986	@ 0x3da
 801b598:	4934      	ldr	r1, [pc, #208]	@ (801b66c <pbuf_copy+0x198>)
 801b59a:	4832      	ldr	r0, [pc, #200]	@ (801b664 <pbuf_copy+0x190>)
 801b59c:	f00f f8de 	bl	802a75c <iprintf>
    if (offset_from >= p_from->len) {
 801b5a0:	683b      	ldr	r3, [r7, #0]
 801b5a2:	895b      	ldrh	r3, [r3, #10]
 801b5a4:	461a      	mov	r2, r3
 801b5a6:	693b      	ldr	r3, [r7, #16]
 801b5a8:	4293      	cmp	r3, r2
 801b5aa:	d304      	bcc.n	801b5b6 <pbuf_copy+0xe2>
      /* on to next p_from (if any) */
      offset_from = 0;
 801b5ac:	2300      	movs	r3, #0
 801b5ae:	613b      	str	r3, [r7, #16]
      p_from = p_from->next;
 801b5b0:	683b      	ldr	r3, [r7, #0]
 801b5b2:	681b      	ldr	r3, [r3, #0]
 801b5b4:	603b      	str	r3, [r7, #0]
    }
    if (offset_to == p_to->len) {
 801b5b6:	687b      	ldr	r3, [r7, #4]
 801b5b8:	895b      	ldrh	r3, [r3, #10]
 801b5ba:	461a      	mov	r2, r3
 801b5bc:	697b      	ldr	r3, [r7, #20]
 801b5be:	4293      	cmp	r3, r2
 801b5c0:	d114      	bne.n	801b5ec <pbuf_copy+0x118>
      /* on to next p_to (if any) */
      offset_to = 0;
 801b5c2:	2300      	movs	r3, #0
 801b5c4:	617b      	str	r3, [r7, #20]
      p_to = p_to->next;
 801b5c6:	687b      	ldr	r3, [r7, #4]
 801b5c8:	681b      	ldr	r3, [r3, #0]
 801b5ca:	607b      	str	r3, [r7, #4]
      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
 801b5cc:	687b      	ldr	r3, [r7, #4]
 801b5ce:	2b00      	cmp	r3, #0
 801b5d0:	d10c      	bne.n	801b5ec <pbuf_copy+0x118>
 801b5d2:	683b      	ldr	r3, [r7, #0]
 801b5d4:	2b00      	cmp	r3, #0
 801b5d6:	d009      	beq.n	801b5ec <pbuf_copy+0x118>
 801b5d8:	4b20      	ldr	r3, [pc, #128]	@ (801b65c <pbuf_copy+0x188>)
 801b5da:	f44f 7279 	mov.w	r2, #996	@ 0x3e4
 801b5de:	4924      	ldr	r1, [pc, #144]	@ (801b670 <pbuf_copy+0x19c>)
 801b5e0:	4820      	ldr	r0, [pc, #128]	@ (801b664 <pbuf_copy+0x190>)
 801b5e2:	f00f f8bb 	bl	802a75c <iprintf>
 801b5e6:	f06f 030f 	mvn.w	r3, #15
 801b5ea:	e032      	b.n	801b652 <pbuf_copy+0x17e>
    }

    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
 801b5ec:	683b      	ldr	r3, [r7, #0]
 801b5ee:	2b00      	cmp	r3, #0
 801b5f0:	d013      	beq.n	801b61a <pbuf_copy+0x146>
 801b5f2:	683b      	ldr	r3, [r7, #0]
 801b5f4:	895a      	ldrh	r2, [r3, #10]
 801b5f6:	683b      	ldr	r3, [r7, #0]
 801b5f8:	891b      	ldrh	r3, [r3, #8]
 801b5fa:	429a      	cmp	r2, r3
 801b5fc:	d10d      	bne.n	801b61a <pbuf_copy+0x146>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b5fe:	683b      	ldr	r3, [r7, #0]
 801b600:	681b      	ldr	r3, [r3, #0]
 801b602:	2b00      	cmp	r3, #0
 801b604:	d009      	beq.n	801b61a <pbuf_copy+0x146>
 801b606:	4b15      	ldr	r3, [pc, #84]	@ (801b65c <pbuf_copy+0x188>)
 801b608:	f240 32e9 	movw	r2, #1001	@ 0x3e9
 801b60c:	4919      	ldr	r1, [pc, #100]	@ (801b674 <pbuf_copy+0x1a0>)
 801b60e:	4815      	ldr	r0, [pc, #84]	@ (801b664 <pbuf_copy+0x190>)
 801b610:	f00f f8a4 	bl	802a75c <iprintf>
 801b614:	f06f 0305 	mvn.w	r3, #5
 801b618:	e01b      	b.n	801b652 <pbuf_copy+0x17e>
                 (p_from->next == NULL), return ERR_VAL;);
    }
    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
 801b61a:	687b      	ldr	r3, [r7, #4]
 801b61c:	2b00      	cmp	r3, #0
 801b61e:	d013      	beq.n	801b648 <pbuf_copy+0x174>
 801b620:	687b      	ldr	r3, [r7, #4]
 801b622:	895a      	ldrh	r2, [r3, #10]
 801b624:	687b      	ldr	r3, [r7, #4]
 801b626:	891b      	ldrh	r3, [r3, #8]
 801b628:	429a      	cmp	r2, r3
 801b62a:	d10d      	bne.n	801b648 <pbuf_copy+0x174>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b62c:	687b      	ldr	r3, [r7, #4]
 801b62e:	681b      	ldr	r3, [r3, #0]
 801b630:	2b00      	cmp	r3, #0
 801b632:	d009      	beq.n	801b648 <pbuf_copy+0x174>
 801b634:	4b09      	ldr	r3, [pc, #36]	@ (801b65c <pbuf_copy+0x188>)
 801b636:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 801b63a:	490e      	ldr	r1, [pc, #56]	@ (801b674 <pbuf_copy+0x1a0>)
 801b63c:	4809      	ldr	r0, [pc, #36]	@ (801b664 <pbuf_copy+0x190>)
 801b63e:	f00f f88d 	bl	802a75c <iprintf>
 801b642:	f06f 0305 	mvn.w	r3, #5
 801b646:	e004      	b.n	801b652 <pbuf_copy+0x17e>
                 (p_to->next == NULL), return ERR_VAL;);
    }
  } while (p_from);
 801b648:	683b      	ldr	r3, [r7, #0]
 801b64a:	2b00      	cmp	r3, #0
 801b64c:	f47f af61 	bne.w	801b512 <pbuf_copy+0x3e>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
  return ERR_OK;
 801b650:	2300      	movs	r3, #0
}
 801b652:	4618      	mov	r0, r3
 801b654:	3718      	adds	r7, #24
 801b656:	46bd      	mov	sp, r7
 801b658:	bd80      	pop	{r7, pc}
 801b65a:	bf00      	nop
 801b65c:	0802ef8c 	.word	0x0802ef8c
 801b660:	0802f234 	.word	0x0802f234
 801b664:	0802efec 	.word	0x0802efec
 801b668:	0802f264 	.word	0x0802f264
 801b66c:	0802f27c 	.word	0x0802f27c
 801b670:	0802f298 	.word	0x0802f298
 801b674:	0802f2a8 	.word	0x0802f2a8

0801b678 <pbuf_copy_partial>:
 * @param offset offset into the packet buffer from where to begin copying len bytes
 * @return the number of bytes copied, or 0 on failure
 */
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
 801b678:	b580      	push	{r7, lr}
 801b67a:	b088      	sub	sp, #32
 801b67c:	af00      	add	r7, sp, #0
 801b67e:	60f8      	str	r0, [r7, #12]
 801b680:	60b9      	str	r1, [r7, #8]
 801b682:	4611      	mov	r1, r2
 801b684:	461a      	mov	r2, r3
 801b686:	460b      	mov	r3, r1
 801b688:	80fb      	strh	r3, [r7, #6]
 801b68a:	4613      	mov	r3, r2
 801b68c:	80bb      	strh	r3, [r7, #4]
  const struct pbuf *p;
  u16_t left = 0;
 801b68e:	2300      	movs	r3, #0
 801b690:	837b      	strh	r3, [r7, #26]
  u16_t buf_copy_len;
  u16_t copied_total = 0;
 801b692:	2300      	movs	r3, #0
 801b694:	82fb      	strh	r3, [r7, #22]

  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
 801b696:	68fb      	ldr	r3, [r7, #12]
 801b698:	2b00      	cmp	r3, #0
 801b69a:	d108      	bne.n	801b6ae <pbuf_copy_partial+0x36>
 801b69c:	4b2b      	ldr	r3, [pc, #172]	@ (801b74c <pbuf_copy_partial+0xd4>)
 801b69e:	f240 420a 	movw	r2, #1034	@ 0x40a
 801b6a2:	492b      	ldr	r1, [pc, #172]	@ (801b750 <pbuf_copy_partial+0xd8>)
 801b6a4:	482b      	ldr	r0, [pc, #172]	@ (801b754 <pbuf_copy_partial+0xdc>)
 801b6a6:	f00f f859 	bl	802a75c <iprintf>
 801b6aa:	2300      	movs	r3, #0
 801b6ac:	e04a      	b.n	801b744 <pbuf_copy_partial+0xcc>
  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
 801b6ae:	68bb      	ldr	r3, [r7, #8]
 801b6b0:	2b00      	cmp	r3, #0
 801b6b2:	d108      	bne.n	801b6c6 <pbuf_copy_partial+0x4e>
 801b6b4:	4b25      	ldr	r3, [pc, #148]	@ (801b74c <pbuf_copy_partial+0xd4>)
 801b6b6:	f240 420b 	movw	r2, #1035	@ 0x40b
 801b6ba:	4927      	ldr	r1, [pc, #156]	@ (801b758 <pbuf_copy_partial+0xe0>)
 801b6bc:	4825      	ldr	r0, [pc, #148]	@ (801b754 <pbuf_copy_partial+0xdc>)
 801b6be:	f00f f84d 	bl	802a75c <iprintf>
 801b6c2:	2300      	movs	r3, #0
 801b6c4:	e03e      	b.n	801b744 <pbuf_copy_partial+0xcc>

  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801b6c6:	68fb      	ldr	r3, [r7, #12]
 801b6c8:	61fb      	str	r3, [r7, #28]
 801b6ca:	e034      	b.n	801b736 <pbuf_copy_partial+0xbe>
    if ((offset != 0) && (offset >= p->len)) {
 801b6cc:	88bb      	ldrh	r3, [r7, #4]
 801b6ce:	2b00      	cmp	r3, #0
 801b6d0:	d00a      	beq.n	801b6e8 <pbuf_copy_partial+0x70>
 801b6d2:	69fb      	ldr	r3, [r7, #28]
 801b6d4:	895b      	ldrh	r3, [r3, #10]
 801b6d6:	88ba      	ldrh	r2, [r7, #4]
 801b6d8:	429a      	cmp	r2, r3
 801b6da:	d305      	bcc.n	801b6e8 <pbuf_copy_partial+0x70>
      /* don't copy from this buffer -> on to the next */
      offset = (u16_t)(offset - p->len);
 801b6dc:	69fb      	ldr	r3, [r7, #28]
 801b6de:	895b      	ldrh	r3, [r3, #10]
 801b6e0:	88ba      	ldrh	r2, [r7, #4]
 801b6e2:	1ad3      	subs	r3, r2, r3
 801b6e4:	80bb      	strh	r3, [r7, #4]
 801b6e6:	e023      	b.n	801b730 <pbuf_copy_partial+0xb8>
    } else {
      /* copy from this buffer. maybe only partially. */
      buf_copy_len = (u16_t)(p->len - offset);
 801b6e8:	69fb      	ldr	r3, [r7, #28]
 801b6ea:	895a      	ldrh	r2, [r3, #10]
 801b6ec:	88bb      	ldrh	r3, [r7, #4]
 801b6ee:	1ad3      	subs	r3, r2, r3
 801b6f0:	833b      	strh	r3, [r7, #24]
      if (buf_copy_len > len) {
 801b6f2:	8b3a      	ldrh	r2, [r7, #24]
 801b6f4:	88fb      	ldrh	r3, [r7, #6]
 801b6f6:	429a      	cmp	r2, r3
 801b6f8:	d901      	bls.n	801b6fe <pbuf_copy_partial+0x86>
        buf_copy_len = len;
 801b6fa:	88fb      	ldrh	r3, [r7, #6]
 801b6fc:	833b      	strh	r3, [r7, #24]
      }
      /* copy the necessary parts of the buffer */
      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
 801b6fe:	8b7b      	ldrh	r3, [r7, #26]
 801b700:	68ba      	ldr	r2, [r7, #8]
 801b702:	18d0      	adds	r0, r2, r3
 801b704:	69fb      	ldr	r3, [r7, #28]
 801b706:	685a      	ldr	r2, [r3, #4]
 801b708:	88bb      	ldrh	r3, [r7, #4]
 801b70a:	4413      	add	r3, r2
 801b70c:	8b3a      	ldrh	r2, [r7, #24]
 801b70e:	4619      	mov	r1, r3
 801b710:	f00f faad 	bl	802ac6e <memcpy>
      copied_total = (u16_t)(copied_total + buf_copy_len);
 801b714:	8afa      	ldrh	r2, [r7, #22]
 801b716:	8b3b      	ldrh	r3, [r7, #24]
 801b718:	4413      	add	r3, r2
 801b71a:	82fb      	strh	r3, [r7, #22]
      left = (u16_t)(left + buf_copy_len);
 801b71c:	8b7a      	ldrh	r2, [r7, #26]
 801b71e:	8b3b      	ldrh	r3, [r7, #24]
 801b720:	4413      	add	r3, r2
 801b722:	837b      	strh	r3, [r7, #26]
      len = (u16_t)(len - buf_copy_len);
 801b724:	88fa      	ldrh	r2, [r7, #6]
 801b726:	8b3b      	ldrh	r3, [r7, #24]
 801b728:	1ad3      	subs	r3, r2, r3
 801b72a:	80fb      	strh	r3, [r7, #6]
      offset = 0;
 801b72c:	2300      	movs	r3, #0
 801b72e:	80bb      	strh	r3, [r7, #4]
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801b730:	69fb      	ldr	r3, [r7, #28]
 801b732:	681b      	ldr	r3, [r3, #0]
 801b734:	61fb      	str	r3, [r7, #28]
 801b736:	88fb      	ldrh	r3, [r7, #6]
 801b738:	2b00      	cmp	r3, #0
 801b73a:	d002      	beq.n	801b742 <pbuf_copy_partial+0xca>
 801b73c:	69fb      	ldr	r3, [r7, #28]
 801b73e:	2b00      	cmp	r3, #0
 801b740:	d1c4      	bne.n	801b6cc <pbuf_copy_partial+0x54>
    }
  }
  return copied_total;
 801b742:	8afb      	ldrh	r3, [r7, #22]
}
 801b744:	4618      	mov	r0, r3
 801b746:	3720      	adds	r7, #32
 801b748:	46bd      	mov	sp, r7
 801b74a:	bd80      	pop	{r7, pc}
 801b74c:	0802ef8c 	.word	0x0802ef8c
 801b750:	0802f2d4 	.word	0x0802f2d4
 801b754:	0802efec 	.word	0x0802efec
 801b758:	0802f2f4 	.word	0x0802f2f4

0801b75c <pbuf_clone>:
 *
 * @return a new pbuf or NULL if allocation fails
 */
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
 801b75c:	b580      	push	{r7, lr}
 801b75e:	b084      	sub	sp, #16
 801b760:	af00      	add	r7, sp, #0
 801b762:	4603      	mov	r3, r0
 801b764:	603a      	str	r2, [r7, #0]
 801b766:	71fb      	strb	r3, [r7, #7]
 801b768:	460b      	mov	r3, r1
 801b76a:	80bb      	strh	r3, [r7, #4]
  struct pbuf *q;
  err_t err;
  q = pbuf_alloc(layer, p->tot_len, type);
 801b76c:	683b      	ldr	r3, [r7, #0]
 801b76e:	8919      	ldrh	r1, [r3, #8]
 801b770:	88ba      	ldrh	r2, [r7, #4]
 801b772:	79fb      	ldrb	r3, [r7, #7]
 801b774:	4618      	mov	r0, r3
 801b776:	f7ff fa63 	bl	801ac40 <pbuf_alloc>
 801b77a:	60f8      	str	r0, [r7, #12]
  if (q == NULL) {
 801b77c:	68fb      	ldr	r3, [r7, #12]
 801b77e:	2b00      	cmp	r3, #0
 801b780:	d101      	bne.n	801b786 <pbuf_clone+0x2a>
    return NULL;
 801b782:	2300      	movs	r3, #0
 801b784:	e011      	b.n	801b7aa <pbuf_clone+0x4e>
  }
  err = pbuf_copy(q, p);
 801b786:	6839      	ldr	r1, [r7, #0]
 801b788:	68f8      	ldr	r0, [r7, #12]
 801b78a:	f7ff fea3 	bl	801b4d4 <pbuf_copy>
 801b78e:	4603      	mov	r3, r0
 801b790:	72fb      	strb	r3, [r7, #11]
  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
 801b792:	f997 300b 	ldrsb.w	r3, [r7, #11]
 801b796:	2b00      	cmp	r3, #0
 801b798:	d006      	beq.n	801b7a8 <pbuf_clone+0x4c>
 801b79a:	4b06      	ldr	r3, [pc, #24]	@ (801b7b4 <pbuf_clone+0x58>)
 801b79c:	f240 5224 	movw	r2, #1316	@ 0x524
 801b7a0:	4905      	ldr	r1, [pc, #20]	@ (801b7b8 <pbuf_clone+0x5c>)
 801b7a2:	4806      	ldr	r0, [pc, #24]	@ (801b7bc <pbuf_clone+0x60>)
 801b7a4:	f00e ffda 	bl	802a75c <iprintf>
  return q;
 801b7a8:	68fb      	ldr	r3, [r7, #12]
}
 801b7aa:	4618      	mov	r0, r3
 801b7ac:	3710      	adds	r7, #16
 801b7ae:	46bd      	mov	sp, r7
 801b7b0:	bd80      	pop	{r7, pc}
 801b7b2:	bf00      	nop
 801b7b4:	0802ef8c 	.word	0x0802ef8c
 801b7b8:	0802f400 	.word	0x0802f400
 801b7bc:	0802efec 	.word	0x0802efec

0801b7c0 <tcp_init>:
/**
 * Initialize this module.
 */
void
tcp_init(void)
{
 801b7c0:	b580      	push	{r7, lr}
 801b7c2:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 801b7c4:	f00d fca0 	bl	8029108 <rand>
 801b7c8:	4603      	mov	r3, r0
 801b7ca:	b29b      	uxth	r3, r3
 801b7cc:	f3c3 030d 	ubfx	r3, r3, #0, #14
 801b7d0:	b29b      	uxth	r3, r3
 801b7d2:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 801b7d6:	b29a      	uxth	r2, r3
 801b7d8:	4b01      	ldr	r3, [pc, #4]	@ (801b7e0 <tcp_init+0x20>)
 801b7da:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 801b7dc:	bf00      	nop
 801b7de:	bd80      	pop	{r7, pc}
 801b7e0:	2400004c 	.word	0x2400004c

0801b7e4 <tcp_free>:

/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
 801b7e4:	b580      	push	{r7, lr}
 801b7e6:	b082      	sub	sp, #8
 801b7e8:	af00      	add	r7, sp, #0
 801b7ea:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
 801b7ec:	687b      	ldr	r3, [r7, #4]
 801b7ee:	7d1b      	ldrb	r3, [r3, #20]
 801b7f0:	2b01      	cmp	r3, #1
 801b7f2:	d105      	bne.n	801b800 <tcp_free+0x1c>
 801b7f4:	4b06      	ldr	r3, [pc, #24]	@ (801b810 <tcp_free+0x2c>)
 801b7f6:	22d4      	movs	r2, #212	@ 0xd4
 801b7f8:	4906      	ldr	r1, [pc, #24]	@ (801b814 <tcp_free+0x30>)
 801b7fa:	4807      	ldr	r0, [pc, #28]	@ (801b818 <tcp_free+0x34>)
 801b7fc:	f00e ffae 	bl	802a75c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB, pcb);
 801b800:	6879      	ldr	r1, [r7, #4]
 801b802:	2001      	movs	r0, #1
 801b804:	f7fe fe44 	bl	801a490 <memp_free>
}
 801b808:	bf00      	nop
 801b80a:	3708      	adds	r7, #8
 801b80c:	46bd      	mov	sp, r7
 801b80e:	bd80      	pop	{r7, pc}
 801b810:	0802f48c 	.word	0x0802f48c
 801b814:	0802f4bc 	.word	0x0802f4bc
 801b818:	0802f4d0 	.word	0x0802f4d0

0801b81c <tcp_free_listen>:

/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
 801b81c:	b580      	push	{r7, lr}
 801b81e:	b082      	sub	sp, #8
 801b820:	af00      	add	r7, sp, #0
 801b822:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
 801b824:	687b      	ldr	r3, [r7, #4]
 801b826:	7d1b      	ldrb	r3, [r3, #20]
 801b828:	2b01      	cmp	r3, #1
 801b82a:	d105      	bne.n	801b838 <tcp_free_listen+0x1c>
 801b82c:	4b06      	ldr	r3, [pc, #24]	@ (801b848 <tcp_free_listen+0x2c>)
 801b82e:	22df      	movs	r2, #223	@ 0xdf
 801b830:	4906      	ldr	r1, [pc, #24]	@ (801b84c <tcp_free_listen+0x30>)
 801b832:	4807      	ldr	r0, [pc, #28]	@ (801b850 <tcp_free_listen+0x34>)
 801b834:	f00e ff92 	bl	802a75c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
 801b838:	6879      	ldr	r1, [r7, #4]
 801b83a:	2002      	movs	r0, #2
 801b83c:	f7fe fe28 	bl	801a490 <memp_free>
}
 801b840:	bf00      	nop
 801b842:	3708      	adds	r7, #8
 801b844:	46bd      	mov	sp, r7
 801b846:	bd80      	pop	{r7, pc}
 801b848:	0802f48c 	.word	0x0802f48c
 801b84c:	0802f4f8 	.word	0x0802f4f8
 801b850:	0802f4d0 	.word	0x0802f4d0

0801b854 <tcp_tmr>:
/**
 * Called periodically to dispatch TCP timers.
 */
void
tcp_tmr(void)
{
 801b854:	b580      	push	{r7, lr}
 801b856:	af00      	add	r7, sp, #0
  /* Call tcp_fasttmr() every 250 ms */
  tcp_fasttmr();
 801b858:	f001 f86a 	bl	801c930 <tcp_fasttmr>

  if (++tcp_timer & 1) {
 801b85c:	4b07      	ldr	r3, [pc, #28]	@ (801b87c <tcp_tmr+0x28>)
 801b85e:	781b      	ldrb	r3, [r3, #0]
 801b860:	3301      	adds	r3, #1
 801b862:	b2da      	uxtb	r2, r3
 801b864:	4b05      	ldr	r3, [pc, #20]	@ (801b87c <tcp_tmr+0x28>)
 801b866:	701a      	strb	r2, [r3, #0]
 801b868:	4b04      	ldr	r3, [pc, #16]	@ (801b87c <tcp_tmr+0x28>)
 801b86a:	781b      	ldrb	r3, [r3, #0]
 801b86c:	f003 0301 	and.w	r3, r3, #1
 801b870:	2b00      	cmp	r3, #0
 801b872:	d001      	beq.n	801b878 <tcp_tmr+0x24>
    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
       tcp_tmr() is called. */
    tcp_slowtmr();
 801b874:	f000 fd1a 	bl	801c2ac <tcp_slowtmr>
  }
}
 801b878:	bf00      	nop
 801b87a:	bd80      	pop	{r7, pc}
 801b87c:	2402af7d 	.word	0x2402af7d

0801b880 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
 801b880:	b580      	push	{r7, lr}
 801b882:	b084      	sub	sp, #16
 801b884:	af00      	add	r7, sp, #0
 801b886:	6078      	str	r0, [r7, #4]
 801b888:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;

  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
 801b88a:	683b      	ldr	r3, [r7, #0]
 801b88c:	2b00      	cmp	r3, #0
 801b88e:	d105      	bne.n	801b89c <tcp_remove_listener+0x1c>
 801b890:	4b0d      	ldr	r3, [pc, #52]	@ (801b8c8 <tcp_remove_listener+0x48>)
 801b892:	22ff      	movs	r2, #255	@ 0xff
 801b894:	490d      	ldr	r1, [pc, #52]	@ (801b8cc <tcp_remove_listener+0x4c>)
 801b896:	480e      	ldr	r0, [pc, #56]	@ (801b8d0 <tcp_remove_listener+0x50>)
 801b898:	f00e ff60 	bl	802a75c <iprintf>

  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801b89c:	687b      	ldr	r3, [r7, #4]
 801b89e:	60fb      	str	r3, [r7, #12]
 801b8a0:	e00a      	b.n	801b8b8 <tcp_remove_listener+0x38>
    if (pcb->listener == lpcb) {
 801b8a2:	68fb      	ldr	r3, [r7, #12]
 801b8a4:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801b8a6:	683a      	ldr	r2, [r7, #0]
 801b8a8:	429a      	cmp	r2, r3
 801b8aa:	d102      	bne.n	801b8b2 <tcp_remove_listener+0x32>
      pcb->listener = NULL;
 801b8ac:	68fb      	ldr	r3, [r7, #12]
 801b8ae:	2200      	movs	r2, #0
 801b8b0:	67da      	str	r2, [r3, #124]	@ 0x7c
  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801b8b2:	68fb      	ldr	r3, [r7, #12]
 801b8b4:	68db      	ldr	r3, [r3, #12]
 801b8b6:	60fb      	str	r3, [r7, #12]
 801b8b8:	68fb      	ldr	r3, [r7, #12]
 801b8ba:	2b00      	cmp	r3, #0
 801b8bc:	d1f1      	bne.n	801b8a2 <tcp_remove_listener+0x22>
    }
  }
}
 801b8be:	bf00      	nop
 801b8c0:	bf00      	nop
 801b8c2:	3710      	adds	r7, #16
 801b8c4:	46bd      	mov	sp, r7
 801b8c6:	bd80      	pop	{r7, pc}
 801b8c8:	0802f48c 	.word	0x0802f48c
 801b8cc:	0802f514 	.word	0x0802f514
 801b8d0:	0802f4d0 	.word	0x0802f4d0

0801b8d4 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
 801b8d4:	b580      	push	{r7, lr}
 801b8d6:	b084      	sub	sp, #16
 801b8d8:	af00      	add	r7, sp, #0
 801b8da:	6078      	str	r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
  size_t i;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801b8dc:	687b      	ldr	r3, [r7, #4]
 801b8de:	2b00      	cmp	r3, #0
 801b8e0:	d106      	bne.n	801b8f0 <tcp_listen_closed+0x1c>
 801b8e2:	4b14      	ldr	r3, [pc, #80]	@ (801b934 <tcp_listen_closed+0x60>)
 801b8e4:	f240 1211 	movw	r2, #273	@ 0x111
 801b8e8:	4913      	ldr	r1, [pc, #76]	@ (801b938 <tcp_listen_closed+0x64>)
 801b8ea:	4814      	ldr	r0, [pc, #80]	@ (801b93c <tcp_listen_closed+0x68>)
 801b8ec:	f00e ff36 	bl	802a75c <iprintf>
  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
 801b8f0:	687b      	ldr	r3, [r7, #4]
 801b8f2:	7d1b      	ldrb	r3, [r3, #20]
 801b8f4:	2b01      	cmp	r3, #1
 801b8f6:	d006      	beq.n	801b906 <tcp_listen_closed+0x32>
 801b8f8:	4b0e      	ldr	r3, [pc, #56]	@ (801b934 <tcp_listen_closed+0x60>)
 801b8fa:	f44f 7289 	mov.w	r2, #274	@ 0x112
 801b8fe:	4910      	ldr	r1, [pc, #64]	@ (801b940 <tcp_listen_closed+0x6c>)
 801b900:	480e      	ldr	r0, [pc, #56]	@ (801b93c <tcp_listen_closed+0x68>)
 801b902:	f00e ff2b 	bl	802a75c <iprintf>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801b906:	2301      	movs	r3, #1
 801b908:	60fb      	str	r3, [r7, #12]
 801b90a:	e00b      	b.n	801b924 <tcp_listen_closed+0x50>
    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
 801b90c:	4a0d      	ldr	r2, [pc, #52]	@ (801b944 <tcp_listen_closed+0x70>)
 801b90e:	68fb      	ldr	r3, [r7, #12]
 801b910:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801b914:	681b      	ldr	r3, [r3, #0]
 801b916:	6879      	ldr	r1, [r7, #4]
 801b918:	4618      	mov	r0, r3
 801b91a:	f7ff ffb1 	bl	801b880 <tcp_remove_listener>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801b91e:	68fb      	ldr	r3, [r7, #12]
 801b920:	3301      	adds	r3, #1
 801b922:	60fb      	str	r3, [r7, #12]
 801b924:	68fb      	ldr	r3, [r7, #12]
 801b926:	2b03      	cmp	r3, #3
 801b928:	d9f0      	bls.n	801b90c <tcp_listen_closed+0x38>
  }
#endif
  LWIP_UNUSED_ARG(pcb);
}
 801b92a:	bf00      	nop
 801b92c:	bf00      	nop
 801b92e:	3710      	adds	r7, #16
 801b930:	46bd      	mov	sp, r7
 801b932:	bd80      	pop	{r7, pc}
 801b934:	0802f48c 	.word	0x0802f48c
 801b938:	0802f53c 	.word	0x0802f53c
 801b93c:	0802f4d0 	.word	0x0802f4d0
 801b940:	0802f548 	.word	0x0802f548
 801b944:	08031b20 	.word	0x08031b20

0801b948 <tcp_close_shutdown>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
 801b948:	b5b0      	push	{r4, r5, r7, lr}
 801b94a:	b088      	sub	sp, #32
 801b94c:	af04      	add	r7, sp, #16
 801b94e:	6078      	str	r0, [r7, #4]
 801b950:	460b      	mov	r3, r1
 801b952:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
 801b954:	687b      	ldr	r3, [r7, #4]
 801b956:	2b00      	cmp	r3, #0
 801b958:	d106      	bne.n	801b968 <tcp_close_shutdown+0x20>
 801b95a:	4b63      	ldr	r3, [pc, #396]	@ (801bae8 <tcp_close_shutdown+0x1a0>)
 801b95c:	f44f 72af 	mov.w	r2, #350	@ 0x15e
 801b960:	4962      	ldr	r1, [pc, #392]	@ (801baec <tcp_close_shutdown+0x1a4>)
 801b962:	4863      	ldr	r0, [pc, #396]	@ (801baf0 <tcp_close_shutdown+0x1a8>)
 801b964:	f00e fefa 	bl	802a75c <iprintf>

  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
 801b968:	78fb      	ldrb	r3, [r7, #3]
 801b96a:	2b00      	cmp	r3, #0
 801b96c:	d067      	beq.n	801ba3e <tcp_close_shutdown+0xf6>
 801b96e:	687b      	ldr	r3, [r7, #4]
 801b970:	7d1b      	ldrb	r3, [r3, #20]
 801b972:	2b04      	cmp	r3, #4
 801b974:	d003      	beq.n	801b97e <tcp_close_shutdown+0x36>
 801b976:	687b      	ldr	r3, [r7, #4]
 801b978:	7d1b      	ldrb	r3, [r3, #20]
 801b97a:	2b07      	cmp	r3, #7
 801b97c:	d15f      	bne.n	801ba3e <tcp_close_shutdown+0xf6>
    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
 801b97e:	687b      	ldr	r3, [r7, #4]
 801b980:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801b982:	2b00      	cmp	r3, #0
 801b984:	d105      	bne.n	801b992 <tcp_close_shutdown+0x4a>
 801b986:	687b      	ldr	r3, [r7, #4]
 801b988:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801b98a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801b98e:	4293      	cmp	r3, r2
 801b990:	d055      	beq.n	801ba3e <tcp_close_shutdown+0xf6>
      /* Not all data received by application, send RST to tell the remote
         side about this. */
      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
 801b992:	687b      	ldr	r3, [r7, #4]
 801b994:	8b5b      	ldrh	r3, [r3, #26]
 801b996:	f003 0310 	and.w	r3, r3, #16
 801b99a:	2b00      	cmp	r3, #0
 801b99c:	d106      	bne.n	801b9ac <tcp_close_shutdown+0x64>
 801b99e:	4b52      	ldr	r3, [pc, #328]	@ (801bae8 <tcp_close_shutdown+0x1a0>)
 801b9a0:	f44f 72b2 	mov.w	r2, #356	@ 0x164
 801b9a4:	4953      	ldr	r1, [pc, #332]	@ (801baf4 <tcp_close_shutdown+0x1ac>)
 801b9a6:	4852      	ldr	r0, [pc, #328]	@ (801baf0 <tcp_close_shutdown+0x1a8>)
 801b9a8:	f00e fed8 	bl	802a75c <iprintf>

      /* don't call tcp_abort here: we must not deallocate the pcb since
         that might not be expected when calling tcp_close */
      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801b9ac:	687b      	ldr	r3, [r7, #4]
 801b9ae:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801b9b0:	687b      	ldr	r3, [r7, #4]
 801b9b2:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801b9b4:	687d      	ldr	r5, [r7, #4]
 801b9b6:	687b      	ldr	r3, [r7, #4]
 801b9b8:	3304      	adds	r3, #4
 801b9ba:	687a      	ldr	r2, [r7, #4]
 801b9bc:	8ad2      	ldrh	r2, [r2, #22]
 801b9be:	6879      	ldr	r1, [r7, #4]
 801b9c0:	8b09      	ldrh	r1, [r1, #24]
 801b9c2:	9102      	str	r1, [sp, #8]
 801b9c4:	9201      	str	r2, [sp, #4]
 801b9c6:	9300      	str	r3, [sp, #0]
 801b9c8:	462b      	mov	r3, r5
 801b9ca:	4622      	mov	r2, r4
 801b9cc:	4601      	mov	r1, r0
 801b9ce:	6878      	ldr	r0, [r7, #4]
 801b9d0:	f005 fdfa 	bl	80215c8 <tcp_rst>
              pcb->local_port, pcb->remote_port);

      tcp_pcb_purge(pcb);
 801b9d4:	6878      	ldr	r0, [r7, #4]
 801b9d6:	f001 fb67 	bl	801d0a8 <tcp_pcb_purge>
      TCP_RMV_ACTIVE(pcb);
 801b9da:	4b47      	ldr	r3, [pc, #284]	@ (801baf8 <tcp_close_shutdown+0x1b0>)
 801b9dc:	681b      	ldr	r3, [r3, #0]
 801b9de:	687a      	ldr	r2, [r7, #4]
 801b9e0:	429a      	cmp	r2, r3
 801b9e2:	d105      	bne.n	801b9f0 <tcp_close_shutdown+0xa8>
 801b9e4:	4b44      	ldr	r3, [pc, #272]	@ (801baf8 <tcp_close_shutdown+0x1b0>)
 801b9e6:	681b      	ldr	r3, [r3, #0]
 801b9e8:	68db      	ldr	r3, [r3, #12]
 801b9ea:	4a43      	ldr	r2, [pc, #268]	@ (801baf8 <tcp_close_shutdown+0x1b0>)
 801b9ec:	6013      	str	r3, [r2, #0]
 801b9ee:	e013      	b.n	801ba18 <tcp_close_shutdown+0xd0>
 801b9f0:	4b41      	ldr	r3, [pc, #260]	@ (801baf8 <tcp_close_shutdown+0x1b0>)
 801b9f2:	681b      	ldr	r3, [r3, #0]
 801b9f4:	60fb      	str	r3, [r7, #12]
 801b9f6:	e00c      	b.n	801ba12 <tcp_close_shutdown+0xca>
 801b9f8:	68fb      	ldr	r3, [r7, #12]
 801b9fa:	68db      	ldr	r3, [r3, #12]
 801b9fc:	687a      	ldr	r2, [r7, #4]
 801b9fe:	429a      	cmp	r2, r3
 801ba00:	d104      	bne.n	801ba0c <tcp_close_shutdown+0xc4>
 801ba02:	687b      	ldr	r3, [r7, #4]
 801ba04:	68da      	ldr	r2, [r3, #12]
 801ba06:	68fb      	ldr	r3, [r7, #12]
 801ba08:	60da      	str	r2, [r3, #12]
 801ba0a:	e005      	b.n	801ba18 <tcp_close_shutdown+0xd0>
 801ba0c:	68fb      	ldr	r3, [r7, #12]
 801ba0e:	68db      	ldr	r3, [r3, #12]
 801ba10:	60fb      	str	r3, [r7, #12]
 801ba12:	68fb      	ldr	r3, [r7, #12]
 801ba14:	2b00      	cmp	r3, #0
 801ba16:	d1ef      	bne.n	801b9f8 <tcp_close_shutdown+0xb0>
 801ba18:	687b      	ldr	r3, [r7, #4]
 801ba1a:	2200      	movs	r2, #0
 801ba1c:	60da      	str	r2, [r3, #12]
 801ba1e:	4b37      	ldr	r3, [pc, #220]	@ (801bafc <tcp_close_shutdown+0x1b4>)
 801ba20:	2201      	movs	r2, #1
 801ba22:	701a      	strb	r2, [r3, #0]
      /* Deallocate the pcb since we already sent a RST for it */
      if (tcp_input_pcb == pcb) {
 801ba24:	4b36      	ldr	r3, [pc, #216]	@ (801bb00 <tcp_close_shutdown+0x1b8>)
 801ba26:	681b      	ldr	r3, [r3, #0]
 801ba28:	687a      	ldr	r2, [r7, #4]
 801ba2a:	429a      	cmp	r2, r3
 801ba2c:	d102      	bne.n	801ba34 <tcp_close_shutdown+0xec>
        /* prevent using a deallocated pcb: free it from tcp_input later */
        tcp_trigger_input_pcb_close();
 801ba2e:	f003 ffff 	bl	801fa30 <tcp_trigger_input_pcb_close>
 801ba32:	e002      	b.n	801ba3a <tcp_close_shutdown+0xf2>
      } else {
        tcp_free(pcb);
 801ba34:	6878      	ldr	r0, [r7, #4]
 801ba36:	f7ff fed5 	bl	801b7e4 <tcp_free>
      }
      return ERR_OK;
 801ba3a:	2300      	movs	r3, #0
 801ba3c:	e050      	b.n	801bae0 <tcp_close_shutdown+0x198>
    }
  }

  /* - states which free the pcb are handled here,
     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
  switch (pcb->state) {
 801ba3e:	687b      	ldr	r3, [r7, #4]
 801ba40:	7d1b      	ldrb	r3, [r3, #20]
 801ba42:	2b02      	cmp	r3, #2
 801ba44:	d03b      	beq.n	801babe <tcp_close_shutdown+0x176>
 801ba46:	2b02      	cmp	r3, #2
 801ba48:	dc44      	bgt.n	801bad4 <tcp_close_shutdown+0x18c>
 801ba4a:	2b00      	cmp	r3, #0
 801ba4c:	d002      	beq.n	801ba54 <tcp_close_shutdown+0x10c>
 801ba4e:	2b01      	cmp	r3, #1
 801ba50:	d02a      	beq.n	801baa8 <tcp_close_shutdown+0x160>
 801ba52:	e03f      	b.n	801bad4 <tcp_close_shutdown+0x18c>
       * and the user needs some way to free it should the need arise.
       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
       * or for a pcb that has been used and then entered the CLOSED state
       * is erroneous, but this should never happen as the pcb has in those cases
       * been freed, and so any remaining handles are bogus. */
      if (pcb->local_port != 0) {
 801ba54:	687b      	ldr	r3, [r7, #4]
 801ba56:	8adb      	ldrh	r3, [r3, #22]
 801ba58:	2b00      	cmp	r3, #0
 801ba5a:	d021      	beq.n	801baa0 <tcp_close_shutdown+0x158>
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801ba5c:	4b29      	ldr	r3, [pc, #164]	@ (801bb04 <tcp_close_shutdown+0x1bc>)
 801ba5e:	681b      	ldr	r3, [r3, #0]
 801ba60:	687a      	ldr	r2, [r7, #4]
 801ba62:	429a      	cmp	r2, r3
 801ba64:	d105      	bne.n	801ba72 <tcp_close_shutdown+0x12a>
 801ba66:	4b27      	ldr	r3, [pc, #156]	@ (801bb04 <tcp_close_shutdown+0x1bc>)
 801ba68:	681b      	ldr	r3, [r3, #0]
 801ba6a:	68db      	ldr	r3, [r3, #12]
 801ba6c:	4a25      	ldr	r2, [pc, #148]	@ (801bb04 <tcp_close_shutdown+0x1bc>)
 801ba6e:	6013      	str	r3, [r2, #0]
 801ba70:	e013      	b.n	801ba9a <tcp_close_shutdown+0x152>
 801ba72:	4b24      	ldr	r3, [pc, #144]	@ (801bb04 <tcp_close_shutdown+0x1bc>)
 801ba74:	681b      	ldr	r3, [r3, #0]
 801ba76:	60bb      	str	r3, [r7, #8]
 801ba78:	e00c      	b.n	801ba94 <tcp_close_shutdown+0x14c>
 801ba7a:	68bb      	ldr	r3, [r7, #8]
 801ba7c:	68db      	ldr	r3, [r3, #12]
 801ba7e:	687a      	ldr	r2, [r7, #4]
 801ba80:	429a      	cmp	r2, r3
 801ba82:	d104      	bne.n	801ba8e <tcp_close_shutdown+0x146>
 801ba84:	687b      	ldr	r3, [r7, #4]
 801ba86:	68da      	ldr	r2, [r3, #12]
 801ba88:	68bb      	ldr	r3, [r7, #8]
 801ba8a:	60da      	str	r2, [r3, #12]
 801ba8c:	e005      	b.n	801ba9a <tcp_close_shutdown+0x152>
 801ba8e:	68bb      	ldr	r3, [r7, #8]
 801ba90:	68db      	ldr	r3, [r3, #12]
 801ba92:	60bb      	str	r3, [r7, #8]
 801ba94:	68bb      	ldr	r3, [r7, #8]
 801ba96:	2b00      	cmp	r3, #0
 801ba98:	d1ef      	bne.n	801ba7a <tcp_close_shutdown+0x132>
 801ba9a:	687b      	ldr	r3, [r7, #4]
 801ba9c:	2200      	movs	r2, #0
 801ba9e:	60da      	str	r2, [r3, #12]
      }
      tcp_free(pcb);
 801baa0:	6878      	ldr	r0, [r7, #4]
 801baa2:	f7ff fe9f 	bl	801b7e4 <tcp_free>
      break;
 801baa6:	e01a      	b.n	801bade <tcp_close_shutdown+0x196>
    case LISTEN:
      tcp_listen_closed(pcb);
 801baa8:	6878      	ldr	r0, [r7, #4]
 801baaa:	f7ff ff13 	bl	801b8d4 <tcp_listen_closed>
      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
 801baae:	6879      	ldr	r1, [r7, #4]
 801bab0:	4815      	ldr	r0, [pc, #84]	@ (801bb08 <tcp_close_shutdown+0x1c0>)
 801bab2:	f001 fb49 	bl	801d148 <tcp_pcb_remove>
      tcp_free_listen(pcb);
 801bab6:	6878      	ldr	r0, [r7, #4]
 801bab8:	f7ff feb0 	bl	801b81c <tcp_free_listen>
      break;
 801babc:	e00f      	b.n	801bade <tcp_close_shutdown+0x196>
    case SYN_SENT:
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801babe:	6879      	ldr	r1, [r7, #4]
 801bac0:	480d      	ldr	r0, [pc, #52]	@ (801baf8 <tcp_close_shutdown+0x1b0>)
 801bac2:	f001 fb41 	bl	801d148 <tcp_pcb_remove>
 801bac6:	4b0d      	ldr	r3, [pc, #52]	@ (801bafc <tcp_close_shutdown+0x1b4>)
 801bac8:	2201      	movs	r2, #1
 801baca:	701a      	strb	r2, [r3, #0]
      tcp_free(pcb);
 801bacc:	6878      	ldr	r0, [r7, #4]
 801bace:	f7ff fe89 	bl	801b7e4 <tcp_free>
      MIB2_STATS_INC(mib2.tcpattemptfails);
      break;
 801bad2:	e004      	b.n	801bade <tcp_close_shutdown+0x196>
    default:
      return tcp_close_shutdown_fin(pcb);
 801bad4:	6878      	ldr	r0, [r7, #4]
 801bad6:	f000 f819 	bl	801bb0c <tcp_close_shutdown_fin>
 801bada:	4603      	mov	r3, r0
 801badc:	e000      	b.n	801bae0 <tcp_close_shutdown+0x198>
  }
  return ERR_OK;
 801bade:	2300      	movs	r3, #0
}
 801bae0:	4618      	mov	r0, r3
 801bae2:	3710      	adds	r7, #16
 801bae4:	46bd      	mov	sp, r7
 801bae6:	bdb0      	pop	{r4, r5, r7, pc}
 801bae8:	0802f48c 	.word	0x0802f48c
 801baec:	0802f560 	.word	0x0802f560
 801baf0:	0802f4d0 	.word	0x0802f4d0
 801baf4:	0802f580 	.word	0x0802f580
 801baf8:	2402af74 	.word	0x2402af74
 801bafc:	2402af7c 	.word	0x2402af7c
 801bb00:	2402afb8 	.word	0x2402afb8
 801bb04:	2402af6c 	.word	0x2402af6c
 801bb08:	2402af70 	.word	0x2402af70

0801bb0c <tcp_close_shutdown_fin>:

static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
 801bb0c:	b580      	push	{r7, lr}
 801bb0e:	b084      	sub	sp, #16
 801bb10:	af00      	add	r7, sp, #0
 801bb12:	6078      	str	r0, [r7, #4]
  err_t err;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801bb14:	687b      	ldr	r3, [r7, #4]
 801bb16:	2b00      	cmp	r3, #0
 801bb18:	d106      	bne.n	801bb28 <tcp_close_shutdown_fin+0x1c>
 801bb1a:	4b2e      	ldr	r3, [pc, #184]	@ (801bbd4 <tcp_close_shutdown_fin+0xc8>)
 801bb1c:	f44f 72ce 	mov.w	r2, #412	@ 0x19c
 801bb20:	492d      	ldr	r1, [pc, #180]	@ (801bbd8 <tcp_close_shutdown_fin+0xcc>)
 801bb22:	482e      	ldr	r0, [pc, #184]	@ (801bbdc <tcp_close_shutdown_fin+0xd0>)
 801bb24:	f00e fe1a 	bl	802a75c <iprintf>

  switch (pcb->state) {
 801bb28:	687b      	ldr	r3, [r7, #4]
 801bb2a:	7d1b      	ldrb	r3, [r3, #20]
 801bb2c:	2b07      	cmp	r3, #7
 801bb2e:	d020      	beq.n	801bb72 <tcp_close_shutdown_fin+0x66>
 801bb30:	2b07      	cmp	r3, #7
 801bb32:	dc2b      	bgt.n	801bb8c <tcp_close_shutdown_fin+0x80>
 801bb34:	2b03      	cmp	r3, #3
 801bb36:	d002      	beq.n	801bb3e <tcp_close_shutdown_fin+0x32>
 801bb38:	2b04      	cmp	r3, #4
 801bb3a:	d00d      	beq.n	801bb58 <tcp_close_shutdown_fin+0x4c>
 801bb3c:	e026      	b.n	801bb8c <tcp_close_shutdown_fin+0x80>
    case SYN_RCVD:
      err = tcp_send_fin(pcb);
 801bb3e:	6878      	ldr	r0, [r7, #4]
 801bb40:	f004 fe42 	bl	80207c8 <tcp_send_fin>
 801bb44:	4603      	mov	r3, r0
 801bb46:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801bb48:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bb4c:	2b00      	cmp	r3, #0
 801bb4e:	d11f      	bne.n	801bb90 <tcp_close_shutdown_fin+0x84>
        tcp_backlog_accepted(pcb);
        MIB2_STATS_INC(mib2.tcpattemptfails);
        pcb->state = FIN_WAIT_1;
 801bb50:	687b      	ldr	r3, [r7, #4]
 801bb52:	2205      	movs	r2, #5
 801bb54:	751a      	strb	r2, [r3, #20]
      }
      break;
 801bb56:	e01b      	b.n	801bb90 <tcp_close_shutdown_fin+0x84>
    case ESTABLISHED:
      err = tcp_send_fin(pcb);
 801bb58:	6878      	ldr	r0, [r7, #4]
 801bb5a:	f004 fe35 	bl	80207c8 <tcp_send_fin>
 801bb5e:	4603      	mov	r3, r0
 801bb60:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801bb62:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bb66:	2b00      	cmp	r3, #0
 801bb68:	d114      	bne.n	801bb94 <tcp_close_shutdown_fin+0x88>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = FIN_WAIT_1;
 801bb6a:	687b      	ldr	r3, [r7, #4]
 801bb6c:	2205      	movs	r2, #5
 801bb6e:	751a      	strb	r2, [r3, #20]
      }
      break;
 801bb70:	e010      	b.n	801bb94 <tcp_close_shutdown_fin+0x88>
    case CLOSE_WAIT:
      err = tcp_send_fin(pcb);
 801bb72:	6878      	ldr	r0, [r7, #4]
 801bb74:	f004 fe28 	bl	80207c8 <tcp_send_fin>
 801bb78:	4603      	mov	r3, r0
 801bb7a:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801bb7c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bb80:	2b00      	cmp	r3, #0
 801bb82:	d109      	bne.n	801bb98 <tcp_close_shutdown_fin+0x8c>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = LAST_ACK;
 801bb84:	687b      	ldr	r3, [r7, #4]
 801bb86:	2209      	movs	r2, #9
 801bb88:	751a      	strb	r2, [r3, #20]
      }
      break;
 801bb8a:	e005      	b.n	801bb98 <tcp_close_shutdown_fin+0x8c>
    default:
      /* Has already been closed, do nothing. */
      return ERR_OK;
 801bb8c:	2300      	movs	r3, #0
 801bb8e:	e01c      	b.n	801bbca <tcp_close_shutdown_fin+0xbe>
      break;
 801bb90:	bf00      	nop
 801bb92:	e002      	b.n	801bb9a <tcp_close_shutdown_fin+0x8e>
      break;
 801bb94:	bf00      	nop
 801bb96:	e000      	b.n	801bb9a <tcp_close_shutdown_fin+0x8e>
      break;
 801bb98:	bf00      	nop
  }

  if (err == ERR_OK) {
 801bb9a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bb9e:	2b00      	cmp	r3, #0
 801bba0:	d103      	bne.n	801bbaa <tcp_close_shutdown_fin+0x9e>
    /* To ensure all data has been sent when tcp_close returns, we have
       to make sure tcp_output doesn't fail.
       Since we don't really have to ensure all data has been sent when tcp_close
       returns (unsent data is sent from tcp timer functions, also), we don't care
       for the return value of tcp_output for now. */
    tcp_output(pcb);
 801bba2:	6878      	ldr	r0, [r7, #4]
 801bba4:	f004 ff4e 	bl	8020a44 <tcp_output>
 801bba8:	e00d      	b.n	801bbc6 <tcp_close_shutdown_fin+0xba>
  } else if (err == ERR_MEM) {
 801bbaa:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801bbae:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801bbb2:	d108      	bne.n	801bbc6 <tcp_close_shutdown_fin+0xba>
    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
    tcp_set_flags(pcb, TF_CLOSEPEND);
 801bbb4:	687b      	ldr	r3, [r7, #4]
 801bbb6:	8b5b      	ldrh	r3, [r3, #26]
 801bbb8:	f043 0308 	orr.w	r3, r3, #8
 801bbbc:	b29a      	uxth	r2, r3
 801bbbe:	687b      	ldr	r3, [r7, #4]
 801bbc0:	835a      	strh	r2, [r3, #26]
    /* We have to return ERR_OK from here to indicate to the callers that this
       pcb should not be used any more as it will be freed soon via tcp_tmr.
       This is OK here since sending FIN does not guarantee a time frime for
       actually freeing the pcb, either (it is left in closure states for
       remote ACK or timeout) */
    return ERR_OK;
 801bbc2:	2300      	movs	r3, #0
 801bbc4:	e001      	b.n	801bbca <tcp_close_shutdown_fin+0xbe>
  }
  return err;
 801bbc6:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 801bbca:	4618      	mov	r0, r3
 801bbcc:	3710      	adds	r7, #16
 801bbce:	46bd      	mov	sp, r7
 801bbd0:	bd80      	pop	{r7, pc}
 801bbd2:	bf00      	nop
 801bbd4:	0802f48c 	.word	0x0802f48c
 801bbd8:	0802f53c 	.word	0x0802f53c
 801bbdc:	0802f4d0 	.word	0x0802f4d0

0801bbe0 <tcp_close>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
err_t
tcp_close(struct tcp_pcb *pcb)
{
 801bbe0:	b580      	push	{r7, lr}
 801bbe2:	b082      	sub	sp, #8
 801bbe4:	af00      	add	r7, sp, #0
 801bbe6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801bbe8:	f7f5 f98a 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
 801bbec:	687b      	ldr	r3, [r7, #4]
 801bbee:	2b00      	cmp	r3, #0
 801bbf0:	d109      	bne.n	801bc06 <tcp_close+0x26>
 801bbf2:	4b0f      	ldr	r3, [pc, #60]	@ (801bc30 <tcp_close+0x50>)
 801bbf4:	f44f 72f4 	mov.w	r2, #488	@ 0x1e8
 801bbf8:	490e      	ldr	r1, [pc, #56]	@ (801bc34 <tcp_close+0x54>)
 801bbfa:	480f      	ldr	r0, [pc, #60]	@ (801bc38 <tcp_close+0x58>)
 801bbfc:	f00e fdae 	bl	802a75c <iprintf>
 801bc00:	f06f 030f 	mvn.w	r3, #15
 801bc04:	e00f      	b.n	801bc26 <tcp_close+0x46>
  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));

  tcp_debug_print_state(pcb->state);

  if (pcb->state != LISTEN) {
 801bc06:	687b      	ldr	r3, [r7, #4]
 801bc08:	7d1b      	ldrb	r3, [r3, #20]
 801bc0a:	2b01      	cmp	r3, #1
 801bc0c:	d006      	beq.n	801bc1c <tcp_close+0x3c>
    /* Set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801bc0e:	687b      	ldr	r3, [r7, #4]
 801bc10:	8b5b      	ldrh	r3, [r3, #26]
 801bc12:	f043 0310 	orr.w	r3, r3, #16
 801bc16:	b29a      	uxth	r2, r3
 801bc18:	687b      	ldr	r3, [r7, #4]
 801bc1a:	835a      	strh	r2, [r3, #26]
  }
  /* ... and close */
  return tcp_close_shutdown(pcb, 1);
 801bc1c:	2101      	movs	r1, #1
 801bc1e:	6878      	ldr	r0, [r7, #4]
 801bc20:	f7ff fe92 	bl	801b948 <tcp_close_shutdown>
 801bc24:	4603      	mov	r3, r0
}
 801bc26:	4618      	mov	r0, r3
 801bc28:	3708      	adds	r7, #8
 801bc2a:	46bd      	mov	sp, r7
 801bc2c:	bd80      	pop	{r7, pc}
 801bc2e:	bf00      	nop
 801bc30:	0802f48c 	.word	0x0802f48c
 801bc34:	0802f59c 	.word	0x0802f59c
 801bc38:	0802f4d0 	.word	0x0802f4d0

0801bc3c <tcp_shutdown>:
 * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
 *         another err_t on error.
 */
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
 801bc3c:	b580      	push	{r7, lr}
 801bc3e:	b084      	sub	sp, #16
 801bc40:	af00      	add	r7, sp, #0
 801bc42:	60f8      	str	r0, [r7, #12]
 801bc44:	60b9      	str	r1, [r7, #8]
 801bc46:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801bc48:	f7f5 f95a 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
 801bc4c:	68fb      	ldr	r3, [r7, #12]
 801bc4e:	2b00      	cmp	r3, #0
 801bc50:	d109      	bne.n	801bc66 <tcp_shutdown+0x2a>
 801bc52:	4b26      	ldr	r3, [pc, #152]	@ (801bcec <tcp_shutdown+0xb0>)
 801bc54:	f240 2207 	movw	r2, #519	@ 0x207
 801bc58:	4925      	ldr	r1, [pc, #148]	@ (801bcf0 <tcp_shutdown+0xb4>)
 801bc5a:	4826      	ldr	r0, [pc, #152]	@ (801bcf4 <tcp_shutdown+0xb8>)
 801bc5c:	f00e fd7e 	bl	802a75c <iprintf>
 801bc60:	f06f 030f 	mvn.w	r3, #15
 801bc64:	e03d      	b.n	801bce2 <tcp_shutdown+0xa6>

  if (pcb->state == LISTEN) {
 801bc66:	68fb      	ldr	r3, [r7, #12]
 801bc68:	7d1b      	ldrb	r3, [r3, #20]
 801bc6a:	2b01      	cmp	r3, #1
 801bc6c:	d102      	bne.n	801bc74 <tcp_shutdown+0x38>
    return ERR_CONN;
 801bc6e:	f06f 030a 	mvn.w	r3, #10
 801bc72:	e036      	b.n	801bce2 <tcp_shutdown+0xa6>
  }
  if (shut_rx) {
 801bc74:	68bb      	ldr	r3, [r7, #8]
 801bc76:	2b00      	cmp	r3, #0
 801bc78:	d01b      	beq.n	801bcb2 <tcp_shutdown+0x76>
    /* shut down the receive side: set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801bc7a:	68fb      	ldr	r3, [r7, #12]
 801bc7c:	8b5b      	ldrh	r3, [r3, #26]
 801bc7e:	f043 0310 	orr.w	r3, r3, #16
 801bc82:	b29a      	uxth	r2, r3
 801bc84:	68fb      	ldr	r3, [r7, #12]
 801bc86:	835a      	strh	r2, [r3, #26]
    if (shut_tx) {
 801bc88:	687b      	ldr	r3, [r7, #4]
 801bc8a:	2b00      	cmp	r3, #0
 801bc8c:	d005      	beq.n	801bc9a <tcp_shutdown+0x5e>
      /* shutting down the tx AND rx side is the same as closing for the raw API */
      return tcp_close_shutdown(pcb, 1);
 801bc8e:	2101      	movs	r1, #1
 801bc90:	68f8      	ldr	r0, [r7, #12]
 801bc92:	f7ff fe59 	bl	801b948 <tcp_close_shutdown>
 801bc96:	4603      	mov	r3, r0
 801bc98:	e023      	b.n	801bce2 <tcp_shutdown+0xa6>
    }
    /* ... and free buffered data */
    if (pcb->refused_data != NULL) {
 801bc9a:	68fb      	ldr	r3, [r7, #12]
 801bc9c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bc9e:	2b00      	cmp	r3, #0
 801bca0:	d007      	beq.n	801bcb2 <tcp_shutdown+0x76>
      pbuf_free(pcb->refused_data);
 801bca2:	68fb      	ldr	r3, [r7, #12]
 801bca4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bca6:	4618      	mov	r0, r3
 801bca8:	f7ff fae0 	bl	801b26c <pbuf_free>
      pcb->refused_data = NULL;
 801bcac:	68fb      	ldr	r3, [r7, #12]
 801bcae:	2200      	movs	r2, #0
 801bcb0:	679a      	str	r2, [r3, #120]	@ 0x78
    }
  }
  if (shut_tx) {
 801bcb2:	687b      	ldr	r3, [r7, #4]
 801bcb4:	2b00      	cmp	r3, #0
 801bcb6:	d013      	beq.n	801bce0 <tcp_shutdown+0xa4>
    /* This can't happen twice since if it succeeds, the pcb's state is changed.
       Only close in these states as the others directly deallocate the PCB */
    switch (pcb->state) {
 801bcb8:	68fb      	ldr	r3, [r7, #12]
 801bcba:	7d1b      	ldrb	r3, [r3, #20]
 801bcbc:	2b04      	cmp	r3, #4
 801bcbe:	dc02      	bgt.n	801bcc6 <tcp_shutdown+0x8a>
 801bcc0:	2b03      	cmp	r3, #3
 801bcc2:	da02      	bge.n	801bcca <tcp_shutdown+0x8e>
 801bcc4:	e009      	b.n	801bcda <tcp_shutdown+0x9e>
 801bcc6:	2b07      	cmp	r3, #7
 801bcc8:	d107      	bne.n	801bcda <tcp_shutdown+0x9e>
      case SYN_RCVD:
      case ESTABLISHED:
      case CLOSE_WAIT:
        return tcp_close_shutdown(pcb, (u8_t)shut_rx);
 801bcca:	68bb      	ldr	r3, [r7, #8]
 801bccc:	b2db      	uxtb	r3, r3
 801bcce:	4619      	mov	r1, r3
 801bcd0:	68f8      	ldr	r0, [r7, #12]
 801bcd2:	f7ff fe39 	bl	801b948 <tcp_close_shutdown>
 801bcd6:	4603      	mov	r3, r0
 801bcd8:	e003      	b.n	801bce2 <tcp_shutdown+0xa6>
      default:
        /* Not (yet?) connected, cannot shutdown the TX side as that would bring us
          into CLOSED state, where the PCB is deallocated. */
        return ERR_CONN;
 801bcda:	f06f 030a 	mvn.w	r3, #10
 801bcde:	e000      	b.n	801bce2 <tcp_shutdown+0xa6>
    }
  }
  return ERR_OK;
 801bce0:	2300      	movs	r3, #0
}
 801bce2:	4618      	mov	r0, r3
 801bce4:	3710      	adds	r7, #16
 801bce6:	46bd      	mov	sp, r7
 801bce8:	bd80      	pop	{r7, pc}
 801bcea:	bf00      	nop
 801bcec:	0802f48c 	.word	0x0802f48c
 801bcf0:	0802f5b4 	.word	0x0802f5b4
 801bcf4:	0802f4d0 	.word	0x0802f4d0

0801bcf8 <tcp_abandon>:
 * @param pcb the tcp_pcb to abort
 * @param reset boolean to indicate whether a reset should be sent
 */
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
 801bcf8:	b580      	push	{r7, lr}
 801bcfa:	b08e      	sub	sp, #56	@ 0x38
 801bcfc:	af04      	add	r7, sp, #16
 801bcfe:	6078      	str	r0, [r7, #4]
 801bd00:	6039      	str	r1, [r7, #0]
#if LWIP_CALLBACK_API
  tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
  void *errf_arg;

  LWIP_ASSERT_CORE_LOCKED();
 801bd02:	f7f5 f8fd 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
 801bd06:	687b      	ldr	r3, [r7, #4]
 801bd08:	2b00      	cmp	r3, #0
 801bd0a:	d107      	bne.n	801bd1c <tcp_abandon+0x24>
 801bd0c:	4b52      	ldr	r3, [pc, #328]	@ (801be58 <tcp_abandon+0x160>)
 801bd0e:	f240 223d 	movw	r2, #573	@ 0x23d
 801bd12:	4952      	ldr	r1, [pc, #328]	@ (801be5c <tcp_abandon+0x164>)
 801bd14:	4852      	ldr	r0, [pc, #328]	@ (801be60 <tcp_abandon+0x168>)
 801bd16:	f00e fd21 	bl	802a75c <iprintf>
 801bd1a:	e099      	b.n	801be50 <tcp_abandon+0x158>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
 801bd1c:	687b      	ldr	r3, [r7, #4]
 801bd1e:	7d1b      	ldrb	r3, [r3, #20]
 801bd20:	2b01      	cmp	r3, #1
 801bd22:	d106      	bne.n	801bd32 <tcp_abandon+0x3a>
 801bd24:	4b4c      	ldr	r3, [pc, #304]	@ (801be58 <tcp_abandon+0x160>)
 801bd26:	f44f 7210 	mov.w	r2, #576	@ 0x240
 801bd2a:	494e      	ldr	r1, [pc, #312]	@ (801be64 <tcp_abandon+0x16c>)
 801bd2c:	484c      	ldr	r0, [pc, #304]	@ (801be60 <tcp_abandon+0x168>)
 801bd2e:	f00e fd15 	bl	802a75c <iprintf>
              pcb->state != LISTEN);
  /* Figure out on which TCP PCB list we are, and remove us. If we
     are in an active state, call the receive function associated with
     the PCB with a NULL argument, and send an RST to the remote end. */
  if (pcb->state == TIME_WAIT) {
 801bd32:	687b      	ldr	r3, [r7, #4]
 801bd34:	7d1b      	ldrb	r3, [r3, #20]
 801bd36:	2b0a      	cmp	r3, #10
 801bd38:	d107      	bne.n	801bd4a <tcp_abandon+0x52>
    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
 801bd3a:	6879      	ldr	r1, [r7, #4]
 801bd3c:	484a      	ldr	r0, [pc, #296]	@ (801be68 <tcp_abandon+0x170>)
 801bd3e:	f001 fa03 	bl	801d148 <tcp_pcb_remove>
    tcp_free(pcb);
 801bd42:	6878      	ldr	r0, [r7, #4]
 801bd44:	f7ff fd4e 	bl	801b7e4 <tcp_free>
 801bd48:	e082      	b.n	801be50 <tcp_abandon+0x158>
  } else {
    int send_rst = 0;
 801bd4a:	2300      	movs	r3, #0
 801bd4c:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t local_port = 0;
 801bd4e:	2300      	movs	r3, #0
 801bd50:	847b      	strh	r3, [r7, #34]	@ 0x22
    enum tcp_state last_state;
    seqno = pcb->snd_nxt;
 801bd52:	687b      	ldr	r3, [r7, #4]
 801bd54:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801bd56:	61bb      	str	r3, [r7, #24]
    ackno = pcb->rcv_nxt;
 801bd58:	687b      	ldr	r3, [r7, #4]
 801bd5a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801bd5c:	617b      	str	r3, [r7, #20]
#if LWIP_CALLBACK_API
    errf = pcb->errf;
 801bd5e:	687b      	ldr	r3, [r7, #4]
 801bd60:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801bd64:	613b      	str	r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
    errf_arg = pcb->callback_arg;
 801bd66:	687b      	ldr	r3, [r7, #4]
 801bd68:	691b      	ldr	r3, [r3, #16]
 801bd6a:	60fb      	str	r3, [r7, #12]
    if (pcb->state == CLOSED) {
 801bd6c:	687b      	ldr	r3, [r7, #4]
 801bd6e:	7d1b      	ldrb	r3, [r3, #20]
 801bd70:	2b00      	cmp	r3, #0
 801bd72:	d126      	bne.n	801bdc2 <tcp_abandon+0xca>
      if (pcb->local_port != 0) {
 801bd74:	687b      	ldr	r3, [r7, #4]
 801bd76:	8adb      	ldrh	r3, [r3, #22]
 801bd78:	2b00      	cmp	r3, #0
 801bd7a:	d02e      	beq.n	801bdda <tcp_abandon+0xe2>
        /* bound, not yet opened */
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801bd7c:	4b3b      	ldr	r3, [pc, #236]	@ (801be6c <tcp_abandon+0x174>)
 801bd7e:	681b      	ldr	r3, [r3, #0]
 801bd80:	687a      	ldr	r2, [r7, #4]
 801bd82:	429a      	cmp	r2, r3
 801bd84:	d105      	bne.n	801bd92 <tcp_abandon+0x9a>
 801bd86:	4b39      	ldr	r3, [pc, #228]	@ (801be6c <tcp_abandon+0x174>)
 801bd88:	681b      	ldr	r3, [r3, #0]
 801bd8a:	68db      	ldr	r3, [r3, #12]
 801bd8c:	4a37      	ldr	r2, [pc, #220]	@ (801be6c <tcp_abandon+0x174>)
 801bd8e:	6013      	str	r3, [r2, #0]
 801bd90:	e013      	b.n	801bdba <tcp_abandon+0xc2>
 801bd92:	4b36      	ldr	r3, [pc, #216]	@ (801be6c <tcp_abandon+0x174>)
 801bd94:	681b      	ldr	r3, [r3, #0]
 801bd96:	61fb      	str	r3, [r7, #28]
 801bd98:	e00c      	b.n	801bdb4 <tcp_abandon+0xbc>
 801bd9a:	69fb      	ldr	r3, [r7, #28]
 801bd9c:	68db      	ldr	r3, [r3, #12]
 801bd9e:	687a      	ldr	r2, [r7, #4]
 801bda0:	429a      	cmp	r2, r3
 801bda2:	d104      	bne.n	801bdae <tcp_abandon+0xb6>
 801bda4:	687b      	ldr	r3, [r7, #4]
 801bda6:	68da      	ldr	r2, [r3, #12]
 801bda8:	69fb      	ldr	r3, [r7, #28]
 801bdaa:	60da      	str	r2, [r3, #12]
 801bdac:	e005      	b.n	801bdba <tcp_abandon+0xc2>
 801bdae:	69fb      	ldr	r3, [r7, #28]
 801bdb0:	68db      	ldr	r3, [r3, #12]
 801bdb2:	61fb      	str	r3, [r7, #28]
 801bdb4:	69fb      	ldr	r3, [r7, #28]
 801bdb6:	2b00      	cmp	r3, #0
 801bdb8:	d1ef      	bne.n	801bd9a <tcp_abandon+0xa2>
 801bdba:	687b      	ldr	r3, [r7, #4]
 801bdbc:	2200      	movs	r2, #0
 801bdbe:	60da      	str	r2, [r3, #12]
 801bdc0:	e00b      	b.n	801bdda <tcp_abandon+0xe2>
      }
    } else {
      send_rst = reset;
 801bdc2:	683b      	ldr	r3, [r7, #0]
 801bdc4:	627b      	str	r3, [r7, #36]	@ 0x24
      local_port = pcb->local_port;
 801bdc6:	687b      	ldr	r3, [r7, #4]
 801bdc8:	8adb      	ldrh	r3, [r3, #22]
 801bdca:	847b      	strh	r3, [r7, #34]	@ 0x22
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801bdcc:	6879      	ldr	r1, [r7, #4]
 801bdce:	4828      	ldr	r0, [pc, #160]	@ (801be70 <tcp_abandon+0x178>)
 801bdd0:	f001 f9ba 	bl	801d148 <tcp_pcb_remove>
 801bdd4:	4b27      	ldr	r3, [pc, #156]	@ (801be74 <tcp_abandon+0x17c>)
 801bdd6:	2201      	movs	r2, #1
 801bdd8:	701a      	strb	r2, [r3, #0]
    }
    if (pcb->unacked != NULL) {
 801bdda:	687b      	ldr	r3, [r7, #4]
 801bddc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801bdde:	2b00      	cmp	r3, #0
 801bde0:	d004      	beq.n	801bdec <tcp_abandon+0xf4>
      tcp_segs_free(pcb->unacked);
 801bde2:	687b      	ldr	r3, [r7, #4]
 801bde4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801bde6:	4618      	mov	r0, r3
 801bde8:	f000 fe84 	bl	801caf4 <tcp_segs_free>
    }
    if (pcb->unsent != NULL) {
 801bdec:	687b      	ldr	r3, [r7, #4]
 801bdee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801bdf0:	2b00      	cmp	r3, #0
 801bdf2:	d004      	beq.n	801bdfe <tcp_abandon+0x106>
      tcp_segs_free(pcb->unsent);
 801bdf4:	687b      	ldr	r3, [r7, #4]
 801bdf6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801bdf8:	4618      	mov	r0, r3
 801bdfa:	f000 fe7b 	bl	801caf4 <tcp_segs_free>
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801bdfe:	687b      	ldr	r3, [r7, #4]
 801be00:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801be02:	2b00      	cmp	r3, #0
 801be04:	d004      	beq.n	801be10 <tcp_abandon+0x118>
      tcp_segs_free(pcb->ooseq);
 801be06:	687b      	ldr	r3, [r7, #4]
 801be08:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801be0a:	4618      	mov	r0, r3
 801be0c:	f000 fe72 	bl	801caf4 <tcp_segs_free>
    }
#endif /* TCP_QUEUE_OOSEQ */
    tcp_backlog_accepted(pcb);
    if (send_rst) {
 801be10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801be12:	2b00      	cmp	r3, #0
 801be14:	d00e      	beq.n	801be34 <tcp_abandon+0x13c>
      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
 801be16:	6879      	ldr	r1, [r7, #4]
 801be18:	687b      	ldr	r3, [r7, #4]
 801be1a:	3304      	adds	r3, #4
 801be1c:	687a      	ldr	r2, [r7, #4]
 801be1e:	8b12      	ldrh	r2, [r2, #24]
 801be20:	9202      	str	r2, [sp, #8]
 801be22:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801be24:	9201      	str	r2, [sp, #4]
 801be26:	9300      	str	r3, [sp, #0]
 801be28:	460b      	mov	r3, r1
 801be2a:	697a      	ldr	r2, [r7, #20]
 801be2c:	69b9      	ldr	r1, [r7, #24]
 801be2e:	6878      	ldr	r0, [r7, #4]
 801be30:	f005 fbca 	bl	80215c8 <tcp_rst>
    }
    last_state = pcb->state;
 801be34:	687b      	ldr	r3, [r7, #4]
 801be36:	7d1b      	ldrb	r3, [r3, #20]
 801be38:	72fb      	strb	r3, [r7, #11]
    tcp_free(pcb);
 801be3a:	6878      	ldr	r0, [r7, #4]
 801be3c:	f7ff fcd2 	bl	801b7e4 <tcp_free>
    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
 801be40:	693b      	ldr	r3, [r7, #16]
 801be42:	2b00      	cmp	r3, #0
 801be44:	d004      	beq.n	801be50 <tcp_abandon+0x158>
 801be46:	693b      	ldr	r3, [r7, #16]
 801be48:	f06f 010c 	mvn.w	r1, #12
 801be4c:	68f8      	ldr	r0, [r7, #12]
 801be4e:	4798      	blx	r3
  }
}
 801be50:	3728      	adds	r7, #40	@ 0x28
 801be52:	46bd      	mov	sp, r7
 801be54:	bd80      	pop	{r7, pc}
 801be56:	bf00      	nop
 801be58:	0802f48c 	.word	0x0802f48c
 801be5c:	0802f5d0 	.word	0x0802f5d0
 801be60:	0802f4d0 	.word	0x0802f4d0
 801be64:	0802f5ec 	.word	0x0802f5ec
 801be68:	2402af78 	.word	0x2402af78
 801be6c:	2402af6c 	.word	0x2402af6c
 801be70:	2402af74 	.word	0x2402af74
 801be74:	2402af7c 	.word	0x2402af7c

0801be78 <tcp_abort>:
 *
 * @param pcb the tcp pcb to abort
 */
void
tcp_abort(struct tcp_pcb *pcb)
{
 801be78:	b580      	push	{r7, lr}
 801be7a:	b082      	sub	sp, #8
 801be7c:	af00      	add	r7, sp, #0
 801be7e:	6078      	str	r0, [r7, #4]
  tcp_abandon(pcb, 1);
 801be80:	2101      	movs	r1, #1
 801be82:	6878      	ldr	r0, [r7, #4]
 801be84:	f7ff ff38 	bl	801bcf8 <tcp_abandon>
}
 801be88:	bf00      	nop
 801be8a:	3708      	adds	r7, #8
 801be8c:	46bd      	mov	sp, r7
 801be8e:	bd80      	pop	{r7, pc}

0801be90 <tcp_update_rcv_ann_wnd>:
 * Returns how much extra window would be advertised if we sent an
 * update now.
 */
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
 801be90:	b580      	push	{r7, lr}
 801be92:	b084      	sub	sp, #16
 801be94:	af00      	add	r7, sp, #0
 801be96:	6078      	str	r0, [r7, #4]
  u32_t new_right_edge;

  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
 801be98:	687b      	ldr	r3, [r7, #4]
 801be9a:	2b00      	cmp	r3, #0
 801be9c:	d106      	bne.n	801beac <tcp_update_rcv_ann_wnd+0x1c>
 801be9e:	4b25      	ldr	r3, [pc, #148]	@ (801bf34 <tcp_update_rcv_ann_wnd+0xa4>)
 801bea0:	f240 32a6 	movw	r2, #934	@ 0x3a6
 801bea4:	4924      	ldr	r1, [pc, #144]	@ (801bf38 <tcp_update_rcv_ann_wnd+0xa8>)
 801bea6:	4825      	ldr	r0, [pc, #148]	@ (801bf3c <tcp_update_rcv_ann_wnd+0xac>)
 801bea8:	f00e fc58 	bl	802a75c <iprintf>
  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
 801beac:	687b      	ldr	r3, [r7, #4]
 801beae:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801beb0:	687a      	ldr	r2, [r7, #4]
 801beb2:	8d12      	ldrh	r2, [r2, #40]	@ 0x28
 801beb4:	4413      	add	r3, r2
 801beb6:	60fb      	str	r3, [r7, #12]

  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
 801beb8:	687b      	ldr	r3, [r7, #4]
 801beba:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801bebc:	687a      	ldr	r2, [r7, #4]
 801bebe:	8e52      	ldrh	r2, [r2, #50]	@ 0x32
 801bec0:	f640 3168 	movw	r1, #2920	@ 0xb68
 801bec4:	428a      	cmp	r2, r1
 801bec6:	bf28      	it	cs
 801bec8:	460a      	movcs	r2, r1
 801beca:	b292      	uxth	r2, r2
 801becc:	4413      	add	r3, r2
 801bece:	68fa      	ldr	r2, [r7, #12]
 801bed0:	1ad3      	subs	r3, r2, r3
 801bed2:	2b00      	cmp	r3, #0
 801bed4:	db08      	blt.n	801bee8 <tcp_update_rcv_ann_wnd+0x58>
    /* we can advertise more window */
    pcb->rcv_ann_wnd = pcb->rcv_wnd;
 801bed6:	687b      	ldr	r3, [r7, #4]
 801bed8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801beda:	687b      	ldr	r3, [r7, #4]
 801bedc:	855a      	strh	r2, [r3, #42]	@ 0x2a
    return new_right_edge - pcb->rcv_ann_right_edge;
 801bede:	687b      	ldr	r3, [r7, #4]
 801bee0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801bee2:	68fa      	ldr	r2, [r7, #12]
 801bee4:	1ad3      	subs	r3, r2, r3
 801bee6:	e020      	b.n	801bf2a <tcp_update_rcv_ann_wnd+0x9a>
  } else {
    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
 801bee8:	687b      	ldr	r3, [r7, #4]
 801beea:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801beec:	687b      	ldr	r3, [r7, #4]
 801beee:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801bef0:	1ad3      	subs	r3, r2, r3
 801bef2:	2b00      	cmp	r3, #0
 801bef4:	dd03      	ble.n	801befe <tcp_update_rcv_ann_wnd+0x6e>
      /* Can happen due to other end sending out of advertised window,
       * but within actual available (but not yet advertised) window */
      pcb->rcv_ann_wnd = 0;
 801bef6:	687b      	ldr	r3, [r7, #4]
 801bef8:	2200      	movs	r2, #0
 801befa:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801befc:	e014      	b.n	801bf28 <tcp_update_rcv_ann_wnd+0x98>
    } else {
      /* keep the right edge of window constant */
      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
 801befe:	687b      	ldr	r3, [r7, #4]
 801bf00:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801bf02:	687b      	ldr	r3, [r7, #4]
 801bf04:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801bf06:	1ad3      	subs	r3, r2, r3
 801bf08:	60bb      	str	r3, [r7, #8]
#if !LWIP_WND_SCALE
      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
 801bf0a:	68bb      	ldr	r3, [r7, #8]
 801bf0c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801bf10:	d306      	bcc.n	801bf20 <tcp_update_rcv_ann_wnd+0x90>
 801bf12:	4b08      	ldr	r3, [pc, #32]	@ (801bf34 <tcp_update_rcv_ann_wnd+0xa4>)
 801bf14:	f240 32b6 	movw	r2, #950	@ 0x3b6
 801bf18:	4909      	ldr	r1, [pc, #36]	@ (801bf40 <tcp_update_rcv_ann_wnd+0xb0>)
 801bf1a:	4808      	ldr	r0, [pc, #32]	@ (801bf3c <tcp_update_rcv_ann_wnd+0xac>)
 801bf1c:	f00e fc1e 	bl	802a75c <iprintf>
#endif
      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
 801bf20:	68bb      	ldr	r3, [r7, #8]
 801bf22:	b29a      	uxth	r2, r3
 801bf24:	687b      	ldr	r3, [r7, #4]
 801bf26:	855a      	strh	r2, [r3, #42]	@ 0x2a
    }
    return 0;
 801bf28:	2300      	movs	r3, #0
  }
}
 801bf2a:	4618      	mov	r0, r3
 801bf2c:	3710      	adds	r7, #16
 801bf2e:	46bd      	mov	sp, r7
 801bf30:	bd80      	pop	{r7, pc}
 801bf32:	bf00      	nop
 801bf34:	0802f48c 	.word	0x0802f48c
 801bf38:	0802f6e8 	.word	0x0802f6e8
 801bf3c:	0802f4d0 	.word	0x0802f4d0
 801bf40:	0802f70c 	.word	0x0802f70c

0801bf44 <tcp_recved>:
 * @param pcb the tcp_pcb for which data is read
 * @param len the amount of bytes that have been read by the application
 */
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
 801bf44:	b580      	push	{r7, lr}
 801bf46:	b084      	sub	sp, #16
 801bf48:	af00      	add	r7, sp, #0
 801bf4a:	6078      	str	r0, [r7, #4]
 801bf4c:	460b      	mov	r3, r1
 801bf4e:	807b      	strh	r3, [r7, #2]
  u32_t wnd_inflation;
  tcpwnd_size_t rcv_wnd;

  LWIP_ASSERT_CORE_LOCKED();
 801bf50:	f7f4 ffd6 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
 801bf54:	687b      	ldr	r3, [r7, #4]
 801bf56:	2b00      	cmp	r3, #0
 801bf58:	d107      	bne.n	801bf6a <tcp_recved+0x26>
 801bf5a:	4b20      	ldr	r3, [pc, #128]	@ (801bfdc <tcp_recved+0x98>)
 801bf5c:	f240 32cf 	movw	r2, #975	@ 0x3cf
 801bf60:	491f      	ldr	r1, [pc, #124]	@ (801bfe0 <tcp_recved+0x9c>)
 801bf62:	4820      	ldr	r0, [pc, #128]	@ (801bfe4 <tcp_recved+0xa0>)
 801bf64:	f00e fbfa 	bl	802a75c <iprintf>
 801bf68:	e034      	b.n	801bfd4 <tcp_recved+0x90>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
 801bf6a:	687b      	ldr	r3, [r7, #4]
 801bf6c:	7d1b      	ldrb	r3, [r3, #20]
 801bf6e:	2b01      	cmp	r3, #1
 801bf70:	d106      	bne.n	801bf80 <tcp_recved+0x3c>
 801bf72:	4b1a      	ldr	r3, [pc, #104]	@ (801bfdc <tcp_recved+0x98>)
 801bf74:	f240 32d2 	movw	r2, #978	@ 0x3d2
 801bf78:	491b      	ldr	r1, [pc, #108]	@ (801bfe8 <tcp_recved+0xa4>)
 801bf7a:	481a      	ldr	r0, [pc, #104]	@ (801bfe4 <tcp_recved+0xa0>)
 801bf7c:	f00e fbee 	bl	802a75c <iprintf>
              pcb->state != LISTEN);

  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
 801bf80:	687b      	ldr	r3, [r7, #4]
 801bf82:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801bf84:	887b      	ldrh	r3, [r7, #2]
 801bf86:	4413      	add	r3, r2
 801bf88:	81fb      	strh	r3, [r7, #14]
  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
 801bf8a:	89fb      	ldrh	r3, [r7, #14]
 801bf8c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bf90:	4293      	cmp	r3, r2
 801bf92:	d804      	bhi.n	801bf9e <tcp_recved+0x5a>
 801bf94:	687b      	ldr	r3, [r7, #4]
 801bf96:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801bf98:	89fa      	ldrh	r2, [r7, #14]
 801bf9a:	429a      	cmp	r2, r3
 801bf9c:	d204      	bcs.n	801bfa8 <tcp_recved+0x64>
    /* window got too big or tcpwnd_size_t overflow */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
    pcb->rcv_wnd = TCP_WND_MAX(pcb);
 801bf9e:	687b      	ldr	r3, [r7, #4]
 801bfa0:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bfa4:	851a      	strh	r2, [r3, #40]	@ 0x28
 801bfa6:	e002      	b.n	801bfae <tcp_recved+0x6a>
  } else  {
    pcb->rcv_wnd = rcv_wnd;
 801bfa8:	687b      	ldr	r3, [r7, #4]
 801bfaa:	89fa      	ldrh	r2, [r7, #14]
 801bfac:	851a      	strh	r2, [r3, #40]	@ 0x28
  }

  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
 801bfae:	6878      	ldr	r0, [r7, #4]
 801bfb0:	f7ff ff6e 	bl	801be90 <tcp_update_rcv_ann_wnd>
 801bfb4:	60b8      	str	r0, [r7, #8]

  /* If the change in the right edge of window is significant (default
   * watermark is TCP_WND/4), then send an explicit update now.
   * Otherwise wait for a packet to be sent in the normal course of
   * events (or more window to be available later) */
  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
 801bfb6:	68bb      	ldr	r3, [r7, #8]
 801bfb8:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801bfbc:	4293      	cmp	r3, r2
 801bfbe:	d909      	bls.n	801bfd4 <tcp_recved+0x90>
    tcp_ack_now(pcb);
 801bfc0:	687b      	ldr	r3, [r7, #4]
 801bfc2:	8b5b      	ldrh	r3, [r3, #26]
 801bfc4:	f043 0302 	orr.w	r3, r3, #2
 801bfc8:	b29a      	uxth	r2, r3
 801bfca:	687b      	ldr	r3, [r7, #4]
 801bfcc:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801bfce:	6878      	ldr	r0, [r7, #4]
 801bfd0:	f004 fd38 	bl	8020a44 <tcp_output>
  }

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
 801bfd4:	3710      	adds	r7, #16
 801bfd6:	46bd      	mov	sp, r7
 801bfd8:	bd80      	pop	{r7, pc}
 801bfda:	bf00      	nop
 801bfdc:	0802f48c 	.word	0x0802f48c
 801bfe0:	0802f728 	.word	0x0802f728
 801bfe4:	0802f4d0 	.word	0x0802f4d0
 801bfe8:	0802f740 	.word	0x0802f740

0801bfec <tcp_new_port>:
 *
 * @return a new (free) local TCP port number
 */
static u16_t
tcp_new_port(void)
{
 801bfec:	b480      	push	{r7}
 801bfee:	b083      	sub	sp, #12
 801bff0:	af00      	add	r7, sp, #0
  u8_t i;
  u16_t n = 0;
 801bff2:	2300      	movs	r3, #0
 801bff4:	80bb      	strh	r3, [r7, #4]
  struct tcp_pcb *pcb;

again:
  tcp_port++;
 801bff6:	4b1e      	ldr	r3, [pc, #120]	@ (801c070 <tcp_new_port+0x84>)
 801bff8:	881b      	ldrh	r3, [r3, #0]
 801bffa:	3301      	adds	r3, #1
 801bffc:	b29a      	uxth	r2, r3
 801bffe:	4b1c      	ldr	r3, [pc, #112]	@ (801c070 <tcp_new_port+0x84>)
 801c000:	801a      	strh	r2, [r3, #0]
  if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
 801c002:	4b1b      	ldr	r3, [pc, #108]	@ (801c070 <tcp_new_port+0x84>)
 801c004:	881b      	ldrh	r3, [r3, #0]
 801c006:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801c00a:	4293      	cmp	r3, r2
 801c00c:	d103      	bne.n	801c016 <tcp_new_port+0x2a>
    tcp_port = TCP_LOCAL_PORT_RANGE_START;
 801c00e:	4b18      	ldr	r3, [pc, #96]	@ (801c070 <tcp_new_port+0x84>)
 801c010:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 801c014:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCB lists. */
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801c016:	2300      	movs	r3, #0
 801c018:	71fb      	strb	r3, [r7, #7]
 801c01a:	e01e      	b.n	801c05a <tcp_new_port+0x6e>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801c01c:	79fb      	ldrb	r3, [r7, #7]
 801c01e:	4a15      	ldr	r2, [pc, #84]	@ (801c074 <tcp_new_port+0x88>)
 801c020:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801c024:	681b      	ldr	r3, [r3, #0]
 801c026:	603b      	str	r3, [r7, #0]
 801c028:	e011      	b.n	801c04e <tcp_new_port+0x62>
      if (pcb->local_port == tcp_port) {
 801c02a:	683b      	ldr	r3, [r7, #0]
 801c02c:	8ada      	ldrh	r2, [r3, #22]
 801c02e:	4b10      	ldr	r3, [pc, #64]	@ (801c070 <tcp_new_port+0x84>)
 801c030:	881b      	ldrh	r3, [r3, #0]
 801c032:	429a      	cmp	r2, r3
 801c034:	d108      	bne.n	801c048 <tcp_new_port+0x5c>
        n++;
 801c036:	88bb      	ldrh	r3, [r7, #4]
 801c038:	3301      	adds	r3, #1
 801c03a:	80bb      	strh	r3, [r7, #4]
        if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
 801c03c:	88bb      	ldrh	r3, [r7, #4]
 801c03e:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 801c042:	d3d8      	bcc.n	801bff6 <tcp_new_port+0xa>
          return 0;
 801c044:	2300      	movs	r3, #0
 801c046:	e00d      	b.n	801c064 <tcp_new_port+0x78>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801c048:	683b      	ldr	r3, [r7, #0]
 801c04a:	68db      	ldr	r3, [r3, #12]
 801c04c:	603b      	str	r3, [r7, #0]
 801c04e:	683b      	ldr	r3, [r7, #0]
 801c050:	2b00      	cmp	r3, #0
 801c052:	d1ea      	bne.n	801c02a <tcp_new_port+0x3e>
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801c054:	79fb      	ldrb	r3, [r7, #7]
 801c056:	3301      	adds	r3, #1
 801c058:	71fb      	strb	r3, [r7, #7]
 801c05a:	79fb      	ldrb	r3, [r7, #7]
 801c05c:	2b03      	cmp	r3, #3
 801c05e:	d9dd      	bls.n	801c01c <tcp_new_port+0x30>
        }
        goto again;
      }
    }
  }
  return tcp_port;
 801c060:	4b03      	ldr	r3, [pc, #12]	@ (801c070 <tcp_new_port+0x84>)
 801c062:	881b      	ldrh	r3, [r3, #0]
}
 801c064:	4618      	mov	r0, r3
 801c066:	370c      	adds	r7, #12
 801c068:	46bd      	mov	sp, r7
 801c06a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801c06e:	4770      	bx	lr
 801c070:	2400004c 	.word	0x2400004c
 801c074:	08031b20 	.word	0x08031b20

0801c078 <tcp_connect>:
 *         other err_t values if connect request couldn't be sent
 */
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
            tcp_connected_fn connected)
{
 801c078:	b580      	push	{r7, lr}
 801c07a:	b08a      	sub	sp, #40	@ 0x28
 801c07c:	af00      	add	r7, sp, #0
 801c07e:	60f8      	str	r0, [r7, #12]
 801c080:	60b9      	str	r1, [r7, #8]
 801c082:	603b      	str	r3, [r7, #0]
 801c084:	4613      	mov	r3, r2
 801c086:	80fb      	strh	r3, [r7, #6]
  struct netif *netif = NULL;
 801c088:	2300      	movs	r3, #0
 801c08a:	627b      	str	r3, [r7, #36]	@ 0x24
  err_t ret;
  u32_t iss;
  u16_t old_local_port;

  LWIP_ASSERT_CORE_LOCKED();
 801c08c:	f7f4 ff38 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 801c090:	68fb      	ldr	r3, [r7, #12]
 801c092:	2b00      	cmp	r3, #0
 801c094:	d109      	bne.n	801c0aa <tcp_connect+0x32>
 801c096:	4b7d      	ldr	r3, [pc, #500]	@ (801c28c <tcp_connect+0x214>)
 801c098:	f240 4235 	movw	r2, #1077	@ 0x435
 801c09c:	497c      	ldr	r1, [pc, #496]	@ (801c290 <tcp_connect+0x218>)
 801c09e:	487d      	ldr	r0, [pc, #500]	@ (801c294 <tcp_connect+0x21c>)
 801c0a0:	f00e fb5c 	bl	802a75c <iprintf>
 801c0a4:	f06f 030f 	mvn.w	r3, #15
 801c0a8:	e0ec      	b.n	801c284 <tcp_connect+0x20c>
  LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 801c0aa:	68bb      	ldr	r3, [r7, #8]
 801c0ac:	2b00      	cmp	r3, #0
 801c0ae:	d109      	bne.n	801c0c4 <tcp_connect+0x4c>
 801c0b0:	4b76      	ldr	r3, [pc, #472]	@ (801c28c <tcp_connect+0x214>)
 801c0b2:	f240 4236 	movw	r2, #1078	@ 0x436
 801c0b6:	4978      	ldr	r1, [pc, #480]	@ (801c298 <tcp_connect+0x220>)
 801c0b8:	4876      	ldr	r0, [pc, #472]	@ (801c294 <tcp_connect+0x21c>)
 801c0ba:	f00e fb4f 	bl	802a75c <iprintf>
 801c0be:	f06f 030f 	mvn.w	r3, #15
 801c0c2:	e0df      	b.n	801c284 <tcp_connect+0x20c>

  LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
 801c0c4:	68fb      	ldr	r3, [r7, #12]
 801c0c6:	7d1b      	ldrb	r3, [r3, #20]
 801c0c8:	2b00      	cmp	r3, #0
 801c0ca:	d009      	beq.n	801c0e0 <tcp_connect+0x68>
 801c0cc:	4b6f      	ldr	r3, [pc, #444]	@ (801c28c <tcp_connect+0x214>)
 801c0ce:	f44f 6287 	mov.w	r2, #1080	@ 0x438
 801c0d2:	4972      	ldr	r1, [pc, #456]	@ (801c29c <tcp_connect+0x224>)
 801c0d4:	486f      	ldr	r0, [pc, #444]	@ (801c294 <tcp_connect+0x21c>)
 801c0d6:	f00e fb41 	bl	802a75c <iprintf>
 801c0da:	f06f 0309 	mvn.w	r3, #9
 801c0de:	e0d1      	b.n	801c284 <tcp_connect+0x20c>

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
  ip_addr_set(&pcb->remote_ip, ipaddr);
 801c0e0:	68bb      	ldr	r3, [r7, #8]
 801c0e2:	2b00      	cmp	r3, #0
 801c0e4:	d002      	beq.n	801c0ec <tcp_connect+0x74>
 801c0e6:	68bb      	ldr	r3, [r7, #8]
 801c0e8:	681b      	ldr	r3, [r3, #0]
 801c0ea:	e000      	b.n	801c0ee <tcp_connect+0x76>
 801c0ec:	2300      	movs	r3, #0
 801c0ee:	68fa      	ldr	r2, [r7, #12]
 801c0f0:	6053      	str	r3, [r2, #4]
  pcb->remote_port = port;
 801c0f2:	68fb      	ldr	r3, [r7, #12]
 801c0f4:	88fa      	ldrh	r2, [r7, #6]
 801c0f6:	831a      	strh	r2, [r3, #24]

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 801c0f8:	68fb      	ldr	r3, [r7, #12]
 801c0fa:	7a1b      	ldrb	r3, [r3, #8]
 801c0fc:	2b00      	cmp	r3, #0
 801c0fe:	d006      	beq.n	801c10e <tcp_connect+0x96>
    netif = netif_get_by_index(pcb->netif_idx);
 801c100:	68fb      	ldr	r3, [r7, #12]
 801c102:	7a1b      	ldrb	r3, [r3, #8]
 801c104:	4618      	mov	r0, r3
 801c106:	f7fe fcf1 	bl	801aaec <netif_get_by_index>
 801c10a:	6278      	str	r0, [r7, #36]	@ 0x24
 801c10c:	e005      	b.n	801c11a <tcp_connect+0xa2>
  } else {
    /* check if we have a route to the remote host */
    netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
 801c10e:	68fb      	ldr	r3, [r7, #12]
 801c110:	3304      	adds	r3, #4
 801c112:	4618      	mov	r0, r3
 801c114:	f009 fb14 	bl	8025740 <ip4_route>
 801c118:	6278      	str	r0, [r7, #36]	@ 0x24
  }
  if (netif == NULL) {
 801c11a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c11c:	2b00      	cmp	r3, #0
 801c11e:	d102      	bne.n	801c126 <tcp_connect+0xae>
    /* Don't even try to send a SYN packet if we have no route since that will fail. */
    return ERR_RTE;
 801c120:	f06f 0303 	mvn.w	r3, #3
 801c124:	e0ae      	b.n	801c284 <tcp_connect+0x20c>
  }

  /* check if local IP has been assigned to pcb, if not, get one */
  if (ip_addr_isany(&pcb->local_ip)) {
 801c126:	68fb      	ldr	r3, [r7, #12]
 801c128:	2b00      	cmp	r3, #0
 801c12a:	d003      	beq.n	801c134 <tcp_connect+0xbc>
 801c12c:	68fb      	ldr	r3, [r7, #12]
 801c12e:	681b      	ldr	r3, [r3, #0]
 801c130:	2b00      	cmp	r3, #0
 801c132:	d111      	bne.n	801c158 <tcp_connect+0xe0>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
 801c134:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c136:	2b00      	cmp	r3, #0
 801c138:	d002      	beq.n	801c140 <tcp_connect+0xc8>
 801c13a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c13c:	3304      	adds	r3, #4
 801c13e:	e000      	b.n	801c142 <tcp_connect+0xca>
 801c140:	2300      	movs	r3, #0
 801c142:	61fb      	str	r3, [r7, #28]
    if (local_ip == NULL) {
 801c144:	69fb      	ldr	r3, [r7, #28]
 801c146:	2b00      	cmp	r3, #0
 801c148:	d102      	bne.n	801c150 <tcp_connect+0xd8>
      return ERR_RTE;
 801c14a:	f06f 0303 	mvn.w	r3, #3
 801c14e:	e099      	b.n	801c284 <tcp_connect+0x20c>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801c150:	69fb      	ldr	r3, [r7, #28]
 801c152:	681a      	ldr	r2, [r3, #0]
 801c154:	68fb      	ldr	r3, [r7, #12]
 801c156:	601a      	str	r2, [r3, #0]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
    ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  old_local_port = pcb->local_port;
 801c158:	68fb      	ldr	r3, [r7, #12]
 801c15a:	8adb      	ldrh	r3, [r3, #22]
 801c15c:	837b      	strh	r3, [r7, #26]
  if (pcb->local_port == 0) {
 801c15e:	68fb      	ldr	r3, [r7, #12]
 801c160:	8adb      	ldrh	r3, [r3, #22]
 801c162:	2b00      	cmp	r3, #0
 801c164:	d10c      	bne.n	801c180 <tcp_connect+0x108>
    pcb->local_port = tcp_new_port();
 801c166:	f7ff ff41 	bl	801bfec <tcp_new_port>
 801c16a:	4603      	mov	r3, r0
 801c16c:	461a      	mov	r2, r3
 801c16e:	68fb      	ldr	r3, [r7, #12]
 801c170:	82da      	strh	r2, [r3, #22]
    if (pcb->local_port == 0) {
 801c172:	68fb      	ldr	r3, [r7, #12]
 801c174:	8adb      	ldrh	r3, [r3, #22]
 801c176:	2b00      	cmp	r3, #0
 801c178:	d102      	bne.n	801c180 <tcp_connect+0x108>
      return ERR_BUF;
 801c17a:	f06f 0301 	mvn.w	r3, #1
 801c17e:	e081      	b.n	801c284 <tcp_connect+0x20c>
      }
    }
#endif /* SO_REUSE */
  }

  iss = tcp_next_iss(pcb);
 801c180:	68f8      	ldr	r0, [r7, #12]
 801c182:	f001 f875 	bl	801d270 <tcp_next_iss>
 801c186:	6178      	str	r0, [r7, #20]
  pcb->rcv_nxt = 0;
 801c188:	68fb      	ldr	r3, [r7, #12]
 801c18a:	2200      	movs	r2, #0
 801c18c:	625a      	str	r2, [r3, #36]	@ 0x24
  pcb->snd_nxt = iss;
 801c18e:	68fb      	ldr	r3, [r7, #12]
 801c190:	697a      	ldr	r2, [r7, #20]
 801c192:	651a      	str	r2, [r3, #80]	@ 0x50
  pcb->lastack = iss - 1;
 801c194:	697b      	ldr	r3, [r7, #20]
 801c196:	1e5a      	subs	r2, r3, #1
 801c198:	68fb      	ldr	r3, [r7, #12]
 801c19a:	645a      	str	r2, [r3, #68]	@ 0x44
  pcb->snd_wl2 = iss - 1;
 801c19c:	697b      	ldr	r3, [r7, #20]
 801c19e:	1e5a      	subs	r2, r3, #1
 801c1a0:	68fb      	ldr	r3, [r7, #12]
 801c1a2:	659a      	str	r2, [r3, #88]	@ 0x58
  pcb->snd_lbb = iss - 1;
 801c1a4:	697b      	ldr	r3, [r7, #20]
 801c1a6:	1e5a      	subs	r2, r3, #1
 801c1a8:	68fb      	ldr	r3, [r7, #12]
 801c1aa:	65da      	str	r2, [r3, #92]	@ 0x5c
  /* Start with a window that does not need scaling. When window scaling is
     enabled and used, the window is enlarged when both sides agree on scaling. */
  pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801c1ac:	68fb      	ldr	r3, [r7, #12]
 801c1ae:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c1b2:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801c1b4:	68fb      	ldr	r3, [r7, #12]
 801c1b6:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801c1b8:	68fb      	ldr	r3, [r7, #12]
 801c1ba:	851a      	strh	r2, [r3, #40]	@ 0x28
  pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801c1bc:	68fb      	ldr	r3, [r7, #12]
 801c1be:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801c1c0:	68fb      	ldr	r3, [r7, #12]
 801c1c2:	62da      	str	r2, [r3, #44]	@ 0x2c
  pcb->snd_wnd = TCP_WND;
 801c1c4:	68fb      	ldr	r3, [r7, #12]
 801c1c6:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c1ca:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
  /* As initial send MSS, we use TCP_MSS but limit it to 536.
     The send MSS is updated when an MSS option is received. */
  pcb->mss = INITIAL_MSS;
 801c1ce:	68fb      	ldr	r3, [r7, #12]
 801c1d0:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801c1d4:	865a      	strh	r2, [r3, #50]	@ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
  pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
 801c1d6:	68fb      	ldr	r3, [r7, #12]
 801c1d8:	8e58      	ldrh	r0, [r3, #50]	@ 0x32
 801c1da:	68fb      	ldr	r3, [r7, #12]
 801c1dc:	3304      	adds	r3, #4
 801c1de:	461a      	mov	r2, r3
 801c1e0:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801c1e2:	f001 f86b 	bl	801d2bc <tcp_eff_send_mss_netif>
 801c1e6:	4603      	mov	r3, r0
 801c1e8:	461a      	mov	r2, r3
 801c1ea:	68fb      	ldr	r3, [r7, #12]
 801c1ec:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
  pcb->cwnd = 1;
 801c1ee:	68fb      	ldr	r3, [r7, #12]
 801c1f0:	2201      	movs	r2, #1
 801c1f2:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
#if LWIP_CALLBACK_API
  pcb->connected = connected;
 801c1f6:	68fb      	ldr	r3, [r7, #12]
 801c1f8:	683a      	ldr	r2, [r7, #0]
 801c1fa:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */

  /* Send a SYN together with the MSS option. */
  ret = tcp_enqueue_flags(pcb, TCP_SYN);
 801c1fe:	2102      	movs	r1, #2
 801c200:	68f8      	ldr	r0, [r7, #12]
 801c202:	f004 fb31 	bl	8020868 <tcp_enqueue_flags>
 801c206:	4603      	mov	r3, r0
 801c208:	74fb      	strb	r3, [r7, #19]
  if (ret == ERR_OK) {
 801c20a:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c20e:	2b00      	cmp	r3, #0
 801c210:	d136      	bne.n	801c280 <tcp_connect+0x208>
    /* SYN segment was enqueued, changed the pcbs state now */
    pcb->state = SYN_SENT;
 801c212:	68fb      	ldr	r3, [r7, #12]
 801c214:	2202      	movs	r2, #2
 801c216:	751a      	strb	r2, [r3, #20]
    if (old_local_port != 0) {
 801c218:	8b7b      	ldrh	r3, [r7, #26]
 801c21a:	2b00      	cmp	r3, #0
 801c21c:	d021      	beq.n	801c262 <tcp_connect+0x1ea>
      TCP_RMV(&tcp_bound_pcbs, pcb);
 801c21e:	4b20      	ldr	r3, [pc, #128]	@ (801c2a0 <tcp_connect+0x228>)
 801c220:	681b      	ldr	r3, [r3, #0]
 801c222:	68fa      	ldr	r2, [r7, #12]
 801c224:	429a      	cmp	r2, r3
 801c226:	d105      	bne.n	801c234 <tcp_connect+0x1bc>
 801c228:	4b1d      	ldr	r3, [pc, #116]	@ (801c2a0 <tcp_connect+0x228>)
 801c22a:	681b      	ldr	r3, [r3, #0]
 801c22c:	68db      	ldr	r3, [r3, #12]
 801c22e:	4a1c      	ldr	r2, [pc, #112]	@ (801c2a0 <tcp_connect+0x228>)
 801c230:	6013      	str	r3, [r2, #0]
 801c232:	e013      	b.n	801c25c <tcp_connect+0x1e4>
 801c234:	4b1a      	ldr	r3, [pc, #104]	@ (801c2a0 <tcp_connect+0x228>)
 801c236:	681b      	ldr	r3, [r3, #0]
 801c238:	623b      	str	r3, [r7, #32]
 801c23a:	e00c      	b.n	801c256 <tcp_connect+0x1de>
 801c23c:	6a3b      	ldr	r3, [r7, #32]
 801c23e:	68db      	ldr	r3, [r3, #12]
 801c240:	68fa      	ldr	r2, [r7, #12]
 801c242:	429a      	cmp	r2, r3
 801c244:	d104      	bne.n	801c250 <tcp_connect+0x1d8>
 801c246:	68fb      	ldr	r3, [r7, #12]
 801c248:	68da      	ldr	r2, [r3, #12]
 801c24a:	6a3b      	ldr	r3, [r7, #32]
 801c24c:	60da      	str	r2, [r3, #12]
 801c24e:	e005      	b.n	801c25c <tcp_connect+0x1e4>
 801c250:	6a3b      	ldr	r3, [r7, #32]
 801c252:	68db      	ldr	r3, [r3, #12]
 801c254:	623b      	str	r3, [r7, #32]
 801c256:	6a3b      	ldr	r3, [r7, #32]
 801c258:	2b00      	cmp	r3, #0
 801c25a:	d1ef      	bne.n	801c23c <tcp_connect+0x1c4>
 801c25c:	68fb      	ldr	r3, [r7, #12]
 801c25e:	2200      	movs	r2, #0
 801c260:	60da      	str	r2, [r3, #12]
    }
    TCP_REG_ACTIVE(pcb);
 801c262:	4b10      	ldr	r3, [pc, #64]	@ (801c2a4 <tcp_connect+0x22c>)
 801c264:	681a      	ldr	r2, [r3, #0]
 801c266:	68fb      	ldr	r3, [r7, #12]
 801c268:	60da      	str	r2, [r3, #12]
 801c26a:	4a0e      	ldr	r2, [pc, #56]	@ (801c2a4 <tcp_connect+0x22c>)
 801c26c:	68fb      	ldr	r3, [r7, #12]
 801c26e:	6013      	str	r3, [r2, #0]
 801c270:	f005 fb6c 	bl	802194c <tcp_timer_needed>
 801c274:	4b0c      	ldr	r3, [pc, #48]	@ (801c2a8 <tcp_connect+0x230>)
 801c276:	2201      	movs	r2, #1
 801c278:	701a      	strb	r2, [r3, #0]
    MIB2_STATS_INC(mib2.tcpactiveopens);

    tcp_output(pcb);
 801c27a:	68f8      	ldr	r0, [r7, #12]
 801c27c:	f004 fbe2 	bl	8020a44 <tcp_output>
  }
  return ret;
 801c280:	f997 3013 	ldrsb.w	r3, [r7, #19]
}
 801c284:	4618      	mov	r0, r3
 801c286:	3728      	adds	r7, #40	@ 0x28
 801c288:	46bd      	mov	sp, r7
 801c28a:	bd80      	pop	{r7, pc}
 801c28c:	0802f48c 	.word	0x0802f48c
 801c290:	0802f768 	.word	0x0802f768
 801c294:	0802f4d0 	.word	0x0802f4d0
 801c298:	0802f784 	.word	0x0802f784
 801c29c:	0802f7a0 	.word	0x0802f7a0
 801c2a0:	2402af6c 	.word	0x2402af6c
 801c2a4:	2402af74 	.word	0x2402af74
 801c2a8:	2402af7c 	.word	0x2402af7c

0801c2ac <tcp_slowtmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_slowtmr(void)
{
 801c2ac:	b5b0      	push	{r4, r5, r7, lr}
 801c2ae:	b090      	sub	sp, #64	@ 0x40
 801c2b0:	af04      	add	r7, sp, #16
  tcpwnd_size_t eff_wnd;
  u8_t pcb_remove;      /* flag if a PCB should be removed */
  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
  err_t err;

  err = ERR_OK;
 801c2b2:	2300      	movs	r3, #0
 801c2b4:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25

  ++tcp_ticks;
 801c2b8:	4b95      	ldr	r3, [pc, #596]	@ (801c510 <tcp_slowtmr+0x264>)
 801c2ba:	681b      	ldr	r3, [r3, #0]
 801c2bc:	3301      	adds	r3, #1
 801c2be:	4a94      	ldr	r2, [pc, #592]	@ (801c510 <tcp_slowtmr+0x264>)
 801c2c0:	6013      	str	r3, [r2, #0]
  ++tcp_timer_ctr;
 801c2c2:	4b94      	ldr	r3, [pc, #592]	@ (801c514 <tcp_slowtmr+0x268>)
 801c2c4:	781b      	ldrb	r3, [r3, #0]
 801c2c6:	3301      	adds	r3, #1
 801c2c8:	b2da      	uxtb	r2, r3
 801c2ca:	4b92      	ldr	r3, [pc, #584]	@ (801c514 <tcp_slowtmr+0x268>)
 801c2cc:	701a      	strb	r2, [r3, #0]
 801c2ce:	e000      	b.n	801c2d2 <tcp_slowtmr+0x26>
        prev->polltmr = 0;
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
        tcp_active_pcbs_changed = 0;
        TCP_EVENT_POLL(prev, err);
        if (tcp_active_pcbs_changed) {
          goto tcp_slowtmr_start;
 801c2d0:	bf00      	nop
  prev = NULL;
 801c2d2:	2300      	movs	r3, #0
 801c2d4:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_active_pcbs;
 801c2d6:	4b90      	ldr	r3, [pc, #576]	@ (801c518 <tcp_slowtmr+0x26c>)
 801c2d8:	681b      	ldr	r3, [r3, #0]
 801c2da:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c2dc:	e29d      	b.n	801c81a <tcp_slowtmr+0x56e>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
 801c2de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c2e0:	7d1b      	ldrb	r3, [r3, #20]
 801c2e2:	2b00      	cmp	r3, #0
 801c2e4:	d106      	bne.n	801c2f4 <tcp_slowtmr+0x48>
 801c2e6:	4b8d      	ldr	r3, [pc, #564]	@ (801c51c <tcp_slowtmr+0x270>)
 801c2e8:	f240 42be 	movw	r2, #1214	@ 0x4be
 801c2ec:	498c      	ldr	r1, [pc, #560]	@ (801c520 <tcp_slowtmr+0x274>)
 801c2ee:	488d      	ldr	r0, [pc, #564]	@ (801c524 <tcp_slowtmr+0x278>)
 801c2f0:	f00e fa34 	bl	802a75c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
 801c2f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c2f6:	7d1b      	ldrb	r3, [r3, #20]
 801c2f8:	2b01      	cmp	r3, #1
 801c2fa:	d106      	bne.n	801c30a <tcp_slowtmr+0x5e>
 801c2fc:	4b87      	ldr	r3, [pc, #540]	@ (801c51c <tcp_slowtmr+0x270>)
 801c2fe:	f240 42bf 	movw	r2, #1215	@ 0x4bf
 801c302:	4989      	ldr	r1, [pc, #548]	@ (801c528 <tcp_slowtmr+0x27c>)
 801c304:	4887      	ldr	r0, [pc, #540]	@ (801c524 <tcp_slowtmr+0x278>)
 801c306:	f00e fa29 	bl	802a75c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
 801c30a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c30c:	7d1b      	ldrb	r3, [r3, #20]
 801c30e:	2b0a      	cmp	r3, #10
 801c310:	d106      	bne.n	801c320 <tcp_slowtmr+0x74>
 801c312:	4b82      	ldr	r3, [pc, #520]	@ (801c51c <tcp_slowtmr+0x270>)
 801c314:	f44f 6298 	mov.w	r2, #1216	@ 0x4c0
 801c318:	4984      	ldr	r1, [pc, #528]	@ (801c52c <tcp_slowtmr+0x280>)
 801c31a:	4882      	ldr	r0, [pc, #520]	@ (801c524 <tcp_slowtmr+0x278>)
 801c31c:	f00e fa1e 	bl	802a75c <iprintf>
    if (pcb->last_timer == tcp_timer_ctr) {
 801c320:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c322:	7f9a      	ldrb	r2, [r3, #30]
 801c324:	4b7b      	ldr	r3, [pc, #492]	@ (801c514 <tcp_slowtmr+0x268>)
 801c326:	781b      	ldrb	r3, [r3, #0]
 801c328:	429a      	cmp	r2, r3
 801c32a:	d105      	bne.n	801c338 <tcp_slowtmr+0x8c>
      prev = pcb;
 801c32c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c32e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c330:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c332:	68db      	ldr	r3, [r3, #12]
 801c334:	62fb      	str	r3, [r7, #44]	@ 0x2c
      continue;
 801c336:	e270      	b.n	801c81a <tcp_slowtmr+0x56e>
    pcb->last_timer = tcp_timer_ctr;
 801c338:	4b76      	ldr	r3, [pc, #472]	@ (801c514 <tcp_slowtmr+0x268>)
 801c33a:	781a      	ldrb	r2, [r3, #0]
 801c33c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c33e:	779a      	strb	r2, [r3, #30]
    pcb_remove = 0;
 801c340:	2300      	movs	r3, #0
 801c342:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    pcb_reset = 0;
 801c346:	2300      	movs	r3, #0
 801c348:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
 801c34c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c34e:	7d1b      	ldrb	r3, [r3, #20]
 801c350:	2b02      	cmp	r3, #2
 801c352:	d10a      	bne.n	801c36a <tcp_slowtmr+0xbe>
 801c354:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c356:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c35a:	2b05      	cmp	r3, #5
 801c35c:	d905      	bls.n	801c36a <tcp_slowtmr+0xbe>
      ++pcb_remove;
 801c35e:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c362:	3301      	adds	r3, #1
 801c364:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
 801c368:	e11e      	b.n	801c5a8 <tcp_slowtmr+0x2fc>
    } else if (pcb->nrtx >= TCP_MAXRTX) {
 801c36a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c36c:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c370:	2b0b      	cmp	r3, #11
 801c372:	d905      	bls.n	801c380 <tcp_slowtmr+0xd4>
      ++pcb_remove;
 801c374:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c378:	3301      	adds	r3, #1
 801c37a:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801c37e:	e113      	b.n	801c5a8 <tcp_slowtmr+0x2fc>
      if (pcb->persist_backoff > 0) {
 801c380:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c382:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c386:	2b00      	cmp	r3, #0
 801c388:	d075      	beq.n	801c476 <tcp_slowtmr+0x1ca>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
 801c38a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c38c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c38e:	2b00      	cmp	r3, #0
 801c390:	d006      	beq.n	801c3a0 <tcp_slowtmr+0xf4>
 801c392:	4b62      	ldr	r3, [pc, #392]	@ (801c51c <tcp_slowtmr+0x270>)
 801c394:	f240 42d4 	movw	r2, #1236	@ 0x4d4
 801c398:	4965      	ldr	r1, [pc, #404]	@ (801c530 <tcp_slowtmr+0x284>)
 801c39a:	4862      	ldr	r0, [pc, #392]	@ (801c524 <tcp_slowtmr+0x278>)
 801c39c:	f00e f9de 	bl	802a75c <iprintf>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
 801c3a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3a2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c3a4:	2b00      	cmp	r3, #0
 801c3a6:	d106      	bne.n	801c3b6 <tcp_slowtmr+0x10a>
 801c3a8:	4b5c      	ldr	r3, [pc, #368]	@ (801c51c <tcp_slowtmr+0x270>)
 801c3aa:	f240 42d5 	movw	r2, #1237	@ 0x4d5
 801c3ae:	4961      	ldr	r1, [pc, #388]	@ (801c534 <tcp_slowtmr+0x288>)
 801c3b0:	485c      	ldr	r0, [pc, #368]	@ (801c524 <tcp_slowtmr+0x278>)
 801c3b2:	f00e f9d3 	bl	802a75c <iprintf>
        if (pcb->persist_probe >= TCP_MAXRTX) {
 801c3b6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3b8:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 801c3bc:	2b0b      	cmp	r3, #11
 801c3be:	d905      	bls.n	801c3cc <tcp_slowtmr+0x120>
          ++pcb_remove; /* max probes reached */
 801c3c0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c3c4:	3301      	adds	r3, #1
 801c3c6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801c3ca:	e0ed      	b.n	801c5a8 <tcp_slowtmr+0x2fc>
          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
 801c3cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3ce:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c3d2:	3b01      	subs	r3, #1
 801c3d4:	4a58      	ldr	r2, [pc, #352]	@ (801c538 <tcp_slowtmr+0x28c>)
 801c3d6:	5cd3      	ldrb	r3, [r2, r3]
 801c3d8:	747b      	strb	r3, [r7, #17]
          if (pcb->persist_cnt < backoff_cnt) {
 801c3da:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3dc:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c3e0:	7c7a      	ldrb	r2, [r7, #17]
 801c3e2:	429a      	cmp	r2, r3
 801c3e4:	d907      	bls.n	801c3f6 <tcp_slowtmr+0x14a>
            pcb->persist_cnt++;
 801c3e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3e8:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c3ec:	3301      	adds	r3, #1
 801c3ee:	b2da      	uxtb	r2, r3
 801c3f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3f2:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
          if (pcb->persist_cnt >= backoff_cnt) {
 801c3f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c3f8:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c3fc:	7c7a      	ldrb	r2, [r7, #17]
 801c3fe:	429a      	cmp	r2, r3
 801c400:	f200 80d2 	bhi.w	801c5a8 <tcp_slowtmr+0x2fc>
            int next_slot = 1; /* increment timer to next slot */
 801c404:	2301      	movs	r3, #1
 801c406:	623b      	str	r3, [r7, #32]
            if (pcb->snd_wnd == 0) {
 801c408:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c40a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801c40e:	2b00      	cmp	r3, #0
 801c410:	d108      	bne.n	801c424 <tcp_slowtmr+0x178>
              if (tcp_zero_window_probe(pcb) != ERR_OK) {
 801c412:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c414:	f005 f9cc 	bl	80217b0 <tcp_zero_window_probe>
 801c418:	4603      	mov	r3, r0
 801c41a:	2b00      	cmp	r3, #0
 801c41c:	d014      	beq.n	801c448 <tcp_slowtmr+0x19c>
                next_slot = 0; /* try probe again with current slot */
 801c41e:	2300      	movs	r3, #0
 801c420:	623b      	str	r3, [r7, #32]
 801c422:	e011      	b.n	801c448 <tcp_slowtmr+0x19c>
              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
 801c424:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c426:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801c42a:	4619      	mov	r1, r3
 801c42c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c42e:	f004 f87f 	bl	8020530 <tcp_split_unsent_seg>
 801c432:	4603      	mov	r3, r0
 801c434:	2b00      	cmp	r3, #0
 801c436:	d107      	bne.n	801c448 <tcp_slowtmr+0x19c>
                if (tcp_output(pcb) == ERR_OK) {
 801c438:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c43a:	f004 fb03 	bl	8020a44 <tcp_output>
 801c43e:	4603      	mov	r3, r0
 801c440:	2b00      	cmp	r3, #0
 801c442:	d101      	bne.n	801c448 <tcp_slowtmr+0x19c>
                  next_slot = 0;
 801c444:	2300      	movs	r3, #0
 801c446:	623b      	str	r3, [r7, #32]
            if (next_slot) {
 801c448:	6a3b      	ldr	r3, [r7, #32]
 801c44a:	2b00      	cmp	r3, #0
 801c44c:	f000 80ac 	beq.w	801c5a8 <tcp_slowtmr+0x2fc>
              pcb->persist_cnt = 0;
 801c450:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c452:	2200      	movs	r2, #0
 801c454:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
 801c458:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c45a:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c45e:	2b06      	cmp	r3, #6
 801c460:	f200 80a2 	bhi.w	801c5a8 <tcp_slowtmr+0x2fc>
                pcb->persist_backoff++;
 801c464:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c466:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c46a:	3301      	adds	r3, #1
 801c46c:	b2da      	uxtb	r2, r3
 801c46e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c470:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
 801c474:	e098      	b.n	801c5a8 <tcp_slowtmr+0x2fc>
        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
 801c476:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c478:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c47c:	2b00      	cmp	r3, #0
 801c47e:	db0f      	blt.n	801c4a0 <tcp_slowtmr+0x1f4>
 801c480:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c482:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c486:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801c48a:	4293      	cmp	r3, r2
 801c48c:	d008      	beq.n	801c4a0 <tcp_slowtmr+0x1f4>
          ++pcb->rtime;
 801c48e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c490:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c494:	b29b      	uxth	r3, r3
 801c496:	3301      	adds	r3, #1
 801c498:	b29b      	uxth	r3, r3
 801c49a:	b21a      	sxth	r2, r3
 801c49c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c49e:	861a      	strh	r2, [r3, #48]	@ 0x30
        if (pcb->rtime >= pcb->rto) {
 801c4a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4a2:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	@ 0x30
 801c4a6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4a8:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801c4ac:	429a      	cmp	r2, r3
 801c4ae:	db7b      	blt.n	801c5a8 <tcp_slowtmr+0x2fc>
          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
 801c4b0:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c4b2:	f004 fdbf 	bl	8021034 <tcp_rexmit_rto_prepare>
 801c4b6:	4603      	mov	r3, r0
 801c4b8:	2b00      	cmp	r3, #0
 801c4ba:	d007      	beq.n	801c4cc <tcp_slowtmr+0x220>
 801c4bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4be:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c4c0:	2b00      	cmp	r3, #0
 801c4c2:	d171      	bne.n	801c5a8 <tcp_slowtmr+0x2fc>
 801c4c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4c6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c4c8:	2b00      	cmp	r3, #0
 801c4ca:	d06d      	beq.n	801c5a8 <tcp_slowtmr+0x2fc>
            if (pcb->state != SYN_SENT) {
 801c4cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4ce:	7d1b      	ldrb	r3, [r3, #20]
 801c4d0:	2b02      	cmp	r3, #2
 801c4d2:	d03a      	beq.n	801c54a <tcp_slowtmr+0x29e>
              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
 801c4d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4d6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c4da:	2b0c      	cmp	r3, #12
 801c4dc:	bf28      	it	cs
 801c4de:	230c      	movcs	r3, #12
 801c4e0:	76fb      	strb	r3, [r7, #27]
              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
 801c4e2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4e4:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801c4e8:	10db      	asrs	r3, r3, #3
 801c4ea:	b21b      	sxth	r3, r3
 801c4ec:	461a      	mov	r2, r3
 801c4ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c4f0:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801c4f4:	4413      	add	r3, r2
 801c4f6:	7efa      	ldrb	r2, [r7, #27]
 801c4f8:	4910      	ldr	r1, [pc, #64]	@ (801c53c <tcp_slowtmr+0x290>)
 801c4fa:	5c8a      	ldrb	r2, [r1, r2]
 801c4fc:	4093      	lsls	r3, r2
 801c4fe:	617b      	str	r3, [r7, #20]
              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
 801c500:	697b      	ldr	r3, [r7, #20]
 801c502:	f647 72fe 	movw	r2, #32766	@ 0x7ffe
 801c506:	4293      	cmp	r3, r2
 801c508:	dc1a      	bgt.n	801c540 <tcp_slowtmr+0x294>
 801c50a:	697b      	ldr	r3, [r7, #20]
 801c50c:	b21a      	sxth	r2, r3
 801c50e:	e019      	b.n	801c544 <tcp_slowtmr+0x298>
 801c510:	2402af68 	.word	0x2402af68
 801c514:	2402af7e 	.word	0x2402af7e
 801c518:	2402af74 	.word	0x2402af74
 801c51c:	0802f48c 	.word	0x0802f48c
 801c520:	0802f7d0 	.word	0x0802f7d0
 801c524:	0802f4d0 	.word	0x0802f4d0
 801c528:	0802f7fc 	.word	0x0802f7fc
 801c52c:	0802f828 	.word	0x0802f828
 801c530:	0802f858 	.word	0x0802f858
 801c534:	0802f88c 	.word	0x0802f88c
 801c538:	08031b18 	.word	0x08031b18
 801c53c:	08031b08 	.word	0x08031b08
 801c540:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801c544:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c546:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
            pcb->rtime = 0;
 801c54a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c54c:	2200      	movs	r2, #0
 801c54e:	861a      	strh	r2, [r3, #48]	@ 0x30
            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
 801c550:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c552:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801c556:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c558:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801c55c:	4293      	cmp	r3, r2
 801c55e:	bf28      	it	cs
 801c560:	4613      	movcs	r3, r2
 801c562:	827b      	strh	r3, [r7, #18]
            pcb->ssthresh = eff_wnd >> 1;
 801c564:	8a7b      	ldrh	r3, [r7, #18]
 801c566:	085b      	lsrs	r3, r3, #1
 801c568:	b29a      	uxth	r2, r3
 801c56a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c56c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
 801c570:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c572:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801c576:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c578:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801c57a:	005b      	lsls	r3, r3, #1
 801c57c:	b29b      	uxth	r3, r3
 801c57e:	429a      	cmp	r2, r3
 801c580:	d206      	bcs.n	801c590 <tcp_slowtmr+0x2e4>
              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
 801c582:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c584:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801c586:	005b      	lsls	r3, r3, #1
 801c588:	b29a      	uxth	r2, r3
 801c58a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c58c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            pcb->cwnd = pcb->mss;
 801c590:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c592:	8e5a      	ldrh	r2, [r3, #50]	@ 0x32
 801c594:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c596:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
            pcb->bytes_acked = 0;
 801c59a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c59c:	2200      	movs	r2, #0
 801c59e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            tcp_rexmit_rto_commit(pcb);
 801c5a2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c5a4:	f004 fdc0 	bl	8021128 <tcp_rexmit_rto_commit>
    if (pcb->state == FIN_WAIT_2) {
 801c5a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5aa:	7d1b      	ldrb	r3, [r3, #20]
 801c5ac:	2b06      	cmp	r3, #6
 801c5ae:	d111      	bne.n	801c5d4 <tcp_slowtmr+0x328>
      if (pcb->flags & TF_RXCLOSED) {
 801c5b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5b2:	8b5b      	ldrh	r3, [r3, #26]
 801c5b4:	f003 0310 	and.w	r3, r3, #16
 801c5b8:	2b00      	cmp	r3, #0
 801c5ba:	d00b      	beq.n	801c5d4 <tcp_slowtmr+0x328>
        if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c5bc:	4b9c      	ldr	r3, [pc, #624]	@ (801c830 <tcp_slowtmr+0x584>)
 801c5be:	681a      	ldr	r2, [r3, #0]
 801c5c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5c2:	6a1b      	ldr	r3, [r3, #32]
 801c5c4:	1ad3      	subs	r3, r2, r3
 801c5c6:	2b28      	cmp	r3, #40	@ 0x28
 801c5c8:	d904      	bls.n	801c5d4 <tcp_slowtmr+0x328>
          ++pcb_remove;
 801c5ca:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c5ce:	3301      	adds	r3, #1
 801c5d0:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c5d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5d6:	7a5b      	ldrb	r3, [r3, #9]
 801c5d8:	f003 0308 	and.w	r3, r3, #8
 801c5dc:	2b00      	cmp	r3, #0
 801c5de:	d04a      	beq.n	801c676 <tcp_slowtmr+0x3ca>
        ((pcb->state == ESTABLISHED) ||
 801c5e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5e2:	7d1b      	ldrb	r3, [r3, #20]
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c5e4:	2b04      	cmp	r3, #4
 801c5e6:	d003      	beq.n	801c5f0 <tcp_slowtmr+0x344>
         (pcb->state == CLOSE_WAIT))) {
 801c5e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5ea:	7d1b      	ldrb	r3, [r3, #20]
        ((pcb->state == ESTABLISHED) ||
 801c5ec:	2b07      	cmp	r3, #7
 801c5ee:	d142      	bne.n	801c676 <tcp_slowtmr+0x3ca>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c5f0:	4b8f      	ldr	r3, [pc, #572]	@ (801c830 <tcp_slowtmr+0x584>)
 801c5f2:	681a      	ldr	r2, [r3, #0]
 801c5f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5f6:	6a1b      	ldr	r3, [r3, #32]
 801c5f8:	1ad2      	subs	r2, r2, r3
          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
 801c5fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5fc:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c600:	4b8c      	ldr	r3, [pc, #560]	@ (801c834 <tcp_slowtmr+0x588>)
 801c602:	440b      	add	r3, r1
 801c604:	498c      	ldr	r1, [pc, #560]	@ (801c838 <tcp_slowtmr+0x58c>)
 801c606:	fba1 1303 	umull	r1, r3, r1, r3
 801c60a:	095b      	lsrs	r3, r3, #5
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c60c:	429a      	cmp	r2, r3
 801c60e:	d90a      	bls.n	801c626 <tcp_slowtmr+0x37a>
        ++pcb_remove;
 801c610:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c614:	3301      	adds	r3, #1
 801c616:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
        ++pcb_reset;
 801c61a:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801c61e:	3301      	adds	r3, #1
 801c620:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 801c624:	e027      	b.n	801c676 <tcp_slowtmr+0x3ca>
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c626:	4b82      	ldr	r3, [pc, #520]	@ (801c830 <tcp_slowtmr+0x584>)
 801c628:	681a      	ldr	r2, [r3, #0]
 801c62a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c62c:	6a1b      	ldr	r3, [r3, #32]
 801c62e:	1ad2      	subs	r2, r2, r3
                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
 801c630:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c632:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c636:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c638:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c63c:	4618      	mov	r0, r3
 801c63e:	4b7f      	ldr	r3, [pc, #508]	@ (801c83c <tcp_slowtmr+0x590>)
 801c640:	fb00 f303 	mul.w	r3, r0, r3
 801c644:	440b      	add	r3, r1
                 / TCP_SLOW_INTERVAL) {
 801c646:	497c      	ldr	r1, [pc, #496]	@ (801c838 <tcp_slowtmr+0x58c>)
 801c648:	fba1 1303 	umull	r1, r3, r1, r3
 801c64c:	095b      	lsrs	r3, r3, #5
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c64e:	429a      	cmp	r2, r3
 801c650:	d911      	bls.n	801c676 <tcp_slowtmr+0x3ca>
        err = tcp_keepalive(pcb);
 801c652:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c654:	f005 f86c 	bl	8021730 <tcp_keepalive>
 801c658:	4603      	mov	r3, r0
 801c65a:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (err == ERR_OK) {
 801c65e:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801c662:	2b00      	cmp	r3, #0
 801c664:	d107      	bne.n	801c676 <tcp_slowtmr+0x3ca>
          pcb->keep_cnt_sent++;
 801c666:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c668:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c66c:	3301      	adds	r3, #1
 801c66e:	b2da      	uxtb	r2, r3
 801c670:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c672:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
    if (pcb->ooseq != NULL &&
 801c676:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c678:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c67a:	2b00      	cmp	r3, #0
 801c67c:	d011      	beq.n	801c6a2 <tcp_slowtmr+0x3f6>
        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
 801c67e:	4b6c      	ldr	r3, [pc, #432]	@ (801c830 <tcp_slowtmr+0x584>)
 801c680:	681a      	ldr	r2, [r3, #0]
 801c682:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c684:	6a1b      	ldr	r3, [r3, #32]
 801c686:	1ad2      	subs	r2, r2, r3
 801c688:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c68a:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801c68e:	4619      	mov	r1, r3
 801c690:	460b      	mov	r3, r1
 801c692:	005b      	lsls	r3, r3, #1
 801c694:	440b      	add	r3, r1
 801c696:	005b      	lsls	r3, r3, #1
    if (pcb->ooseq != NULL &&
 801c698:	429a      	cmp	r2, r3
 801c69a:	d302      	bcc.n	801c6a2 <tcp_slowtmr+0x3f6>
      tcp_free_ooseq(pcb);
 801c69c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c69e:	f000 feb7 	bl	801d410 <tcp_free_ooseq>
    if (pcb->state == SYN_RCVD) {
 801c6a2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6a4:	7d1b      	ldrb	r3, [r3, #20]
 801c6a6:	2b03      	cmp	r3, #3
 801c6a8:	d10b      	bne.n	801c6c2 <tcp_slowtmr+0x416>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c6aa:	4b61      	ldr	r3, [pc, #388]	@ (801c830 <tcp_slowtmr+0x584>)
 801c6ac:	681a      	ldr	r2, [r3, #0]
 801c6ae:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6b0:	6a1b      	ldr	r3, [r3, #32]
 801c6b2:	1ad3      	subs	r3, r2, r3
 801c6b4:	2b28      	cmp	r3, #40	@ 0x28
 801c6b6:	d904      	bls.n	801c6c2 <tcp_slowtmr+0x416>
        ++pcb_remove;
 801c6b8:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c6bc:	3301      	adds	r3, #1
 801c6be:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb->state == LAST_ACK) {
 801c6c2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6c4:	7d1b      	ldrb	r3, [r3, #20]
 801c6c6:	2b09      	cmp	r3, #9
 801c6c8:	d10b      	bne.n	801c6e2 <tcp_slowtmr+0x436>
      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801c6ca:	4b59      	ldr	r3, [pc, #356]	@ (801c830 <tcp_slowtmr+0x584>)
 801c6cc:	681a      	ldr	r2, [r3, #0]
 801c6ce:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6d0:	6a1b      	ldr	r3, [r3, #32]
 801c6d2:	1ad3      	subs	r3, r2, r3
 801c6d4:	2bf0      	cmp	r3, #240	@ 0xf0
 801c6d6:	d904      	bls.n	801c6e2 <tcp_slowtmr+0x436>
        ++pcb_remove;
 801c6d8:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c6dc:	3301      	adds	r3, #1
 801c6de:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb_remove) {
 801c6e2:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c6e6:	2b00      	cmp	r3, #0
 801c6e8:	d060      	beq.n	801c7ac <tcp_slowtmr+0x500>
      tcp_err_fn err_fn = pcb->errf;
 801c6ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6ec:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c6f0:	60fb      	str	r3, [r7, #12]
      tcp_pcb_purge(pcb);
 801c6f2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c6f4:	f000 fcd8 	bl	801d0a8 <tcp_pcb_purge>
      if (prev != NULL) {
 801c6f8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c6fa:	2b00      	cmp	r3, #0
 801c6fc:	d010      	beq.n	801c720 <tcp_slowtmr+0x474>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
 801c6fe:	4b50      	ldr	r3, [pc, #320]	@ (801c840 <tcp_slowtmr+0x594>)
 801c700:	681b      	ldr	r3, [r3, #0]
 801c702:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c704:	429a      	cmp	r2, r3
 801c706:	d106      	bne.n	801c716 <tcp_slowtmr+0x46a>
 801c708:	4b4e      	ldr	r3, [pc, #312]	@ (801c844 <tcp_slowtmr+0x598>)
 801c70a:	f240 526d 	movw	r2, #1389	@ 0x56d
 801c70e:	494e      	ldr	r1, [pc, #312]	@ (801c848 <tcp_slowtmr+0x59c>)
 801c710:	484e      	ldr	r0, [pc, #312]	@ (801c84c <tcp_slowtmr+0x5a0>)
 801c712:	f00e f823 	bl	802a75c <iprintf>
        prev->next = pcb->next;
 801c716:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c718:	68da      	ldr	r2, [r3, #12]
 801c71a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c71c:	60da      	str	r2, [r3, #12]
 801c71e:	e00f      	b.n	801c740 <tcp_slowtmr+0x494>
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
 801c720:	4b47      	ldr	r3, [pc, #284]	@ (801c840 <tcp_slowtmr+0x594>)
 801c722:	681b      	ldr	r3, [r3, #0]
 801c724:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c726:	429a      	cmp	r2, r3
 801c728:	d006      	beq.n	801c738 <tcp_slowtmr+0x48c>
 801c72a:	4b46      	ldr	r3, [pc, #280]	@ (801c844 <tcp_slowtmr+0x598>)
 801c72c:	f240 5271 	movw	r2, #1393	@ 0x571
 801c730:	4947      	ldr	r1, [pc, #284]	@ (801c850 <tcp_slowtmr+0x5a4>)
 801c732:	4846      	ldr	r0, [pc, #280]	@ (801c84c <tcp_slowtmr+0x5a0>)
 801c734:	f00e f812 	bl	802a75c <iprintf>
        tcp_active_pcbs = pcb->next;
 801c738:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c73a:	68db      	ldr	r3, [r3, #12]
 801c73c:	4a40      	ldr	r2, [pc, #256]	@ (801c840 <tcp_slowtmr+0x594>)
 801c73e:	6013      	str	r3, [r2, #0]
      if (pcb_reset) {
 801c740:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801c744:	2b00      	cmp	r3, #0
 801c746:	d013      	beq.n	801c770 <tcp_slowtmr+0x4c4>
        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801c748:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c74a:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801c74c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c74e:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801c750:	6afd      	ldr	r5, [r7, #44]	@ 0x2c
 801c752:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c754:	3304      	adds	r3, #4
 801c756:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c758:	8ad2      	ldrh	r2, [r2, #22]
 801c75a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801c75c:	8b09      	ldrh	r1, [r1, #24]
 801c75e:	9102      	str	r1, [sp, #8]
 801c760:	9201      	str	r2, [sp, #4]
 801c762:	9300      	str	r3, [sp, #0]
 801c764:	462b      	mov	r3, r5
 801c766:	4622      	mov	r2, r4
 801c768:	4601      	mov	r1, r0
 801c76a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c76c:	f004 ff2c 	bl	80215c8 <tcp_rst>
      err_arg = pcb->callback_arg;
 801c770:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c772:	691b      	ldr	r3, [r3, #16]
 801c774:	60bb      	str	r3, [r7, #8]
      last_state = pcb->state;
 801c776:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c778:	7d1b      	ldrb	r3, [r3, #20]
 801c77a:	71fb      	strb	r3, [r7, #7]
      pcb2 = pcb;
 801c77c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c77e:	603b      	str	r3, [r7, #0]
      pcb = pcb->next;
 801c780:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c782:	68db      	ldr	r3, [r3, #12]
 801c784:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801c786:	6838      	ldr	r0, [r7, #0]
 801c788:	f7ff f82c 	bl	801b7e4 <tcp_free>
      tcp_active_pcbs_changed = 0;
 801c78c:	4b31      	ldr	r3, [pc, #196]	@ (801c854 <tcp_slowtmr+0x5a8>)
 801c78e:	2200      	movs	r2, #0
 801c790:	701a      	strb	r2, [r3, #0]
      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
 801c792:	68fb      	ldr	r3, [r7, #12]
 801c794:	2b00      	cmp	r3, #0
 801c796:	d004      	beq.n	801c7a2 <tcp_slowtmr+0x4f6>
 801c798:	68fb      	ldr	r3, [r7, #12]
 801c79a:	f06f 010c 	mvn.w	r1, #12
 801c79e:	68b8      	ldr	r0, [r7, #8]
 801c7a0:	4798      	blx	r3
      if (tcp_active_pcbs_changed) {
 801c7a2:	4b2c      	ldr	r3, [pc, #176]	@ (801c854 <tcp_slowtmr+0x5a8>)
 801c7a4:	781b      	ldrb	r3, [r3, #0]
 801c7a6:	2b00      	cmp	r3, #0
 801c7a8:	d037      	beq.n	801c81a <tcp_slowtmr+0x56e>
        goto tcp_slowtmr_start;
 801c7aa:	e592      	b.n	801c2d2 <tcp_slowtmr+0x26>
      prev = pcb;
 801c7ac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7ae:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c7b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7b2:	68db      	ldr	r3, [r3, #12]
 801c7b4:	62fb      	str	r3, [r7, #44]	@ 0x2c
      ++prev->polltmr;
 801c7b6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7b8:	7f1b      	ldrb	r3, [r3, #28]
 801c7ba:	3301      	adds	r3, #1
 801c7bc:	b2da      	uxtb	r2, r3
 801c7be:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7c0:	771a      	strb	r2, [r3, #28]
      if (prev->polltmr >= prev->pollinterval) {
 801c7c2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7c4:	7f1a      	ldrb	r2, [r3, #28]
 801c7c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7c8:	7f5b      	ldrb	r3, [r3, #29]
 801c7ca:	429a      	cmp	r2, r3
 801c7cc:	d325      	bcc.n	801c81a <tcp_slowtmr+0x56e>
        prev->polltmr = 0;
 801c7ce:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7d0:	2200      	movs	r2, #0
 801c7d2:	771a      	strb	r2, [r3, #28]
        tcp_active_pcbs_changed = 0;
 801c7d4:	4b1f      	ldr	r3, [pc, #124]	@ (801c854 <tcp_slowtmr+0x5a8>)
 801c7d6:	2200      	movs	r2, #0
 801c7d8:	701a      	strb	r2, [r3, #0]
        TCP_EVENT_POLL(prev, err);
 801c7da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7dc:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801c7e0:	2b00      	cmp	r3, #0
 801c7e2:	d00b      	beq.n	801c7fc <tcp_slowtmr+0x550>
 801c7e4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c7e6:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801c7ea:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801c7ec:	6912      	ldr	r2, [r2, #16]
 801c7ee:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 801c7f0:	4610      	mov	r0, r2
 801c7f2:	4798      	blx	r3
 801c7f4:	4603      	mov	r3, r0
 801c7f6:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
 801c7fa:	e002      	b.n	801c802 <tcp_slowtmr+0x556>
 801c7fc:	2300      	movs	r3, #0
 801c7fe:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (tcp_active_pcbs_changed) {
 801c802:	4b14      	ldr	r3, [pc, #80]	@ (801c854 <tcp_slowtmr+0x5a8>)
 801c804:	781b      	ldrb	r3, [r3, #0]
 801c806:	2b00      	cmp	r3, #0
 801c808:	f47f ad62 	bne.w	801c2d0 <tcp_slowtmr+0x24>
        }
        /* if err == ERR_ABRT, 'prev' is already deallocated */
        if (err == ERR_OK) {
 801c80c:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801c810:	2b00      	cmp	r3, #0
 801c812:	d102      	bne.n	801c81a <tcp_slowtmr+0x56e>
          tcp_output(prev);
 801c814:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801c816:	f004 f915 	bl	8020a44 <tcp_output>
  while (pcb != NULL) {
 801c81a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c81c:	2b00      	cmp	r3, #0
 801c81e:	f47f ad5e 	bne.w	801c2de <tcp_slowtmr+0x32>
    }
  }


  /* Steps through all of the TIME-WAIT PCBs. */
  prev = NULL;
 801c822:	2300      	movs	r3, #0
 801c824:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_tw_pcbs;
 801c826:	4b0c      	ldr	r3, [pc, #48]	@ (801c858 <tcp_slowtmr+0x5ac>)
 801c828:	681b      	ldr	r3, [r3, #0]
 801c82a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c82c:	e069      	b.n	801c902 <tcp_slowtmr+0x656>
 801c82e:	bf00      	nop
 801c830:	2402af68 	.word	0x2402af68
 801c834:	000a4cb8 	.word	0x000a4cb8
 801c838:	10624dd3 	.word	0x10624dd3
 801c83c:	000124f8 	.word	0x000124f8
 801c840:	2402af74 	.word	0x2402af74
 801c844:	0802f48c 	.word	0x0802f48c
 801c848:	0802f8c4 	.word	0x0802f8c4
 801c84c:	0802f4d0 	.word	0x0802f4d0
 801c850:	0802f8f0 	.word	0x0802f8f0
 801c854:	2402af7c 	.word	0x2402af7c
 801c858:	2402af78 	.word	0x2402af78
    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801c85c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c85e:	7d1b      	ldrb	r3, [r3, #20]
 801c860:	2b0a      	cmp	r3, #10
 801c862:	d006      	beq.n	801c872 <tcp_slowtmr+0x5c6>
 801c864:	4b2b      	ldr	r3, [pc, #172]	@ (801c914 <tcp_slowtmr+0x668>)
 801c866:	f240 52a1 	movw	r2, #1441	@ 0x5a1
 801c86a:	492b      	ldr	r1, [pc, #172]	@ (801c918 <tcp_slowtmr+0x66c>)
 801c86c:	482b      	ldr	r0, [pc, #172]	@ (801c91c <tcp_slowtmr+0x670>)
 801c86e:	f00d ff75 	bl	802a75c <iprintf>
    pcb_remove = 0;
 801c872:	2300      	movs	r3, #0
 801c874:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

    /* Check if this PCB has stayed long enough in TIME-WAIT */
    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801c878:	4b29      	ldr	r3, [pc, #164]	@ (801c920 <tcp_slowtmr+0x674>)
 801c87a:	681a      	ldr	r2, [r3, #0]
 801c87c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c87e:	6a1b      	ldr	r3, [r3, #32]
 801c880:	1ad3      	subs	r3, r2, r3
 801c882:	2bf0      	cmp	r3, #240	@ 0xf0
 801c884:	d904      	bls.n	801c890 <tcp_slowtmr+0x5e4>
      ++pcb_remove;
 801c886:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c88a:	3301      	adds	r3, #1
 801c88c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }

    /* If the PCB should be removed, do it. */
    if (pcb_remove) {
 801c890:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c894:	2b00      	cmp	r3, #0
 801c896:	d02f      	beq.n	801c8f8 <tcp_slowtmr+0x64c>
      struct tcp_pcb *pcb2;
      tcp_pcb_purge(pcb);
 801c898:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c89a:	f000 fc05 	bl	801d0a8 <tcp_pcb_purge>
      /* Remove PCB from tcp_tw_pcbs list. */
      if (prev != NULL) {
 801c89e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c8a0:	2b00      	cmp	r3, #0
 801c8a2:	d010      	beq.n	801c8c6 <tcp_slowtmr+0x61a>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
 801c8a4:	4b1f      	ldr	r3, [pc, #124]	@ (801c924 <tcp_slowtmr+0x678>)
 801c8a6:	681b      	ldr	r3, [r3, #0]
 801c8a8:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c8aa:	429a      	cmp	r2, r3
 801c8ac:	d106      	bne.n	801c8bc <tcp_slowtmr+0x610>
 801c8ae:	4b19      	ldr	r3, [pc, #100]	@ (801c914 <tcp_slowtmr+0x668>)
 801c8b0:	f240 52af 	movw	r2, #1455	@ 0x5af
 801c8b4:	491c      	ldr	r1, [pc, #112]	@ (801c928 <tcp_slowtmr+0x67c>)
 801c8b6:	4819      	ldr	r0, [pc, #100]	@ (801c91c <tcp_slowtmr+0x670>)
 801c8b8:	f00d ff50 	bl	802a75c <iprintf>
        prev->next = pcb->next;
 801c8bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8be:	68da      	ldr	r2, [r3, #12]
 801c8c0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c8c2:	60da      	str	r2, [r3, #12]
 801c8c4:	e00f      	b.n	801c8e6 <tcp_slowtmr+0x63a>
      } else {
        /* This PCB was the first. */
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
 801c8c6:	4b17      	ldr	r3, [pc, #92]	@ (801c924 <tcp_slowtmr+0x678>)
 801c8c8:	681b      	ldr	r3, [r3, #0]
 801c8ca:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801c8cc:	429a      	cmp	r2, r3
 801c8ce:	d006      	beq.n	801c8de <tcp_slowtmr+0x632>
 801c8d0:	4b10      	ldr	r3, [pc, #64]	@ (801c914 <tcp_slowtmr+0x668>)
 801c8d2:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801c8d6:	4915      	ldr	r1, [pc, #84]	@ (801c92c <tcp_slowtmr+0x680>)
 801c8d8:	4810      	ldr	r0, [pc, #64]	@ (801c91c <tcp_slowtmr+0x670>)
 801c8da:	f00d ff3f 	bl	802a75c <iprintf>
        tcp_tw_pcbs = pcb->next;
 801c8de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8e0:	68db      	ldr	r3, [r3, #12]
 801c8e2:	4a10      	ldr	r2, [pc, #64]	@ (801c924 <tcp_slowtmr+0x678>)
 801c8e4:	6013      	str	r3, [r2, #0]
      }
      pcb2 = pcb;
 801c8e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8e8:	61fb      	str	r3, [r7, #28]
      pcb = pcb->next;
 801c8ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8ec:	68db      	ldr	r3, [r3, #12]
 801c8ee:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801c8f0:	69f8      	ldr	r0, [r7, #28]
 801c8f2:	f7fe ff77 	bl	801b7e4 <tcp_free>
 801c8f6:	e004      	b.n	801c902 <tcp_slowtmr+0x656>
    } else {
      prev = pcb;
 801c8f8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8fa:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c8fc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8fe:	68db      	ldr	r3, [r3, #12]
 801c900:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c902:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c904:	2b00      	cmp	r3, #0
 801c906:	d1a9      	bne.n	801c85c <tcp_slowtmr+0x5b0>
    }
  }
}
 801c908:	bf00      	nop
 801c90a:	bf00      	nop
 801c90c:	3730      	adds	r7, #48	@ 0x30
 801c90e:	46bd      	mov	sp, r7
 801c910:	bdb0      	pop	{r4, r5, r7, pc}
 801c912:	bf00      	nop
 801c914:	0802f48c 	.word	0x0802f48c
 801c918:	0802f91c 	.word	0x0802f91c
 801c91c:	0802f4d0 	.word	0x0802f4d0
 801c920:	2402af68 	.word	0x2402af68
 801c924:	2402af78 	.word	0x2402af78
 801c928:	0802f94c 	.word	0x0802f94c
 801c92c:	0802f974 	.word	0x0802f974

0801c930 <tcp_fasttmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_fasttmr(void)
{
 801c930:	b580      	push	{r7, lr}
 801c932:	b082      	sub	sp, #8
 801c934:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;

  ++tcp_timer_ctr;
 801c936:	4b2d      	ldr	r3, [pc, #180]	@ (801c9ec <tcp_fasttmr+0xbc>)
 801c938:	781b      	ldrb	r3, [r3, #0]
 801c93a:	3301      	adds	r3, #1
 801c93c:	b2da      	uxtb	r2, r3
 801c93e:	4b2b      	ldr	r3, [pc, #172]	@ (801c9ec <tcp_fasttmr+0xbc>)
 801c940:	701a      	strb	r2, [r3, #0]

tcp_fasttmr_start:
  pcb = tcp_active_pcbs;
 801c942:	4b2b      	ldr	r3, [pc, #172]	@ (801c9f0 <tcp_fasttmr+0xc0>)
 801c944:	681b      	ldr	r3, [r3, #0]
 801c946:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801c948:	e048      	b.n	801c9dc <tcp_fasttmr+0xac>
    if (pcb->last_timer != tcp_timer_ctr) {
 801c94a:	687b      	ldr	r3, [r7, #4]
 801c94c:	7f9a      	ldrb	r2, [r3, #30]
 801c94e:	4b27      	ldr	r3, [pc, #156]	@ (801c9ec <tcp_fasttmr+0xbc>)
 801c950:	781b      	ldrb	r3, [r3, #0]
 801c952:	429a      	cmp	r2, r3
 801c954:	d03f      	beq.n	801c9d6 <tcp_fasttmr+0xa6>
      struct tcp_pcb *next;
      pcb->last_timer = tcp_timer_ctr;
 801c956:	4b25      	ldr	r3, [pc, #148]	@ (801c9ec <tcp_fasttmr+0xbc>)
 801c958:	781a      	ldrb	r2, [r3, #0]
 801c95a:	687b      	ldr	r3, [r7, #4]
 801c95c:	779a      	strb	r2, [r3, #30]
      /* send delayed ACKs */
      if (pcb->flags & TF_ACK_DELAY) {
 801c95e:	687b      	ldr	r3, [r7, #4]
 801c960:	8b5b      	ldrh	r3, [r3, #26]
 801c962:	f003 0301 	and.w	r3, r3, #1
 801c966:	2b00      	cmp	r3, #0
 801c968:	d010      	beq.n	801c98c <tcp_fasttmr+0x5c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
        tcp_ack_now(pcb);
 801c96a:	687b      	ldr	r3, [r7, #4]
 801c96c:	8b5b      	ldrh	r3, [r3, #26]
 801c96e:	f043 0302 	orr.w	r3, r3, #2
 801c972:	b29a      	uxth	r2, r3
 801c974:	687b      	ldr	r3, [r7, #4]
 801c976:	835a      	strh	r2, [r3, #26]
        tcp_output(pcb);
 801c978:	6878      	ldr	r0, [r7, #4]
 801c97a:	f004 f863 	bl	8020a44 <tcp_output>
        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801c97e:	687b      	ldr	r3, [r7, #4]
 801c980:	8b5b      	ldrh	r3, [r3, #26]
 801c982:	f023 0303 	bic.w	r3, r3, #3
 801c986:	b29a      	uxth	r2, r3
 801c988:	687b      	ldr	r3, [r7, #4]
 801c98a:	835a      	strh	r2, [r3, #26]
      }
      /* send pending FIN */
      if (pcb->flags & TF_CLOSEPEND) {
 801c98c:	687b      	ldr	r3, [r7, #4]
 801c98e:	8b5b      	ldrh	r3, [r3, #26]
 801c990:	f003 0308 	and.w	r3, r3, #8
 801c994:	2b00      	cmp	r3, #0
 801c996:	d009      	beq.n	801c9ac <tcp_fasttmr+0x7c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
        tcp_clear_flags(pcb, TF_CLOSEPEND);
 801c998:	687b      	ldr	r3, [r7, #4]
 801c99a:	8b5b      	ldrh	r3, [r3, #26]
 801c99c:	f023 0308 	bic.w	r3, r3, #8
 801c9a0:	b29a      	uxth	r2, r3
 801c9a2:	687b      	ldr	r3, [r7, #4]
 801c9a4:	835a      	strh	r2, [r3, #26]
        tcp_close_shutdown_fin(pcb);
 801c9a6:	6878      	ldr	r0, [r7, #4]
 801c9a8:	f7ff f8b0 	bl	801bb0c <tcp_close_shutdown_fin>
      }

      next = pcb->next;
 801c9ac:	687b      	ldr	r3, [r7, #4]
 801c9ae:	68db      	ldr	r3, [r3, #12]
 801c9b0:	603b      	str	r3, [r7, #0]

      /* If there is data which was previously "refused" by upper layer */
      if (pcb->refused_data != NULL) {
 801c9b2:	687b      	ldr	r3, [r7, #4]
 801c9b4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801c9b6:	2b00      	cmp	r3, #0
 801c9b8:	d00a      	beq.n	801c9d0 <tcp_fasttmr+0xa0>
        tcp_active_pcbs_changed = 0;
 801c9ba:	4b0e      	ldr	r3, [pc, #56]	@ (801c9f4 <tcp_fasttmr+0xc4>)
 801c9bc:	2200      	movs	r2, #0
 801c9be:	701a      	strb	r2, [r3, #0]
        tcp_process_refused_data(pcb);
 801c9c0:	6878      	ldr	r0, [r7, #4]
 801c9c2:	f000 f819 	bl	801c9f8 <tcp_process_refused_data>
        if (tcp_active_pcbs_changed) {
 801c9c6:	4b0b      	ldr	r3, [pc, #44]	@ (801c9f4 <tcp_fasttmr+0xc4>)
 801c9c8:	781b      	ldrb	r3, [r3, #0]
 801c9ca:	2b00      	cmp	r3, #0
 801c9cc:	d000      	beq.n	801c9d0 <tcp_fasttmr+0xa0>
          /* application callback has changed the pcb list: restart the loop */
          goto tcp_fasttmr_start;
 801c9ce:	e7b8      	b.n	801c942 <tcp_fasttmr+0x12>
        }
      }
      pcb = next;
 801c9d0:	683b      	ldr	r3, [r7, #0]
 801c9d2:	607b      	str	r3, [r7, #4]
 801c9d4:	e002      	b.n	801c9dc <tcp_fasttmr+0xac>
    } else {
      pcb = pcb->next;
 801c9d6:	687b      	ldr	r3, [r7, #4]
 801c9d8:	68db      	ldr	r3, [r3, #12]
 801c9da:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801c9dc:	687b      	ldr	r3, [r7, #4]
 801c9de:	2b00      	cmp	r3, #0
 801c9e0:	d1b3      	bne.n	801c94a <tcp_fasttmr+0x1a>
    }
  }
}
 801c9e2:	bf00      	nop
 801c9e4:	bf00      	nop
 801c9e6:	3708      	adds	r7, #8
 801c9e8:	46bd      	mov	sp, r7
 801c9ea:	bd80      	pop	{r7, pc}
 801c9ec:	2402af7e 	.word	0x2402af7e
 801c9f0:	2402af74 	.word	0x2402af74
 801c9f4:	2402af7c 	.word	0x2402af7c

0801c9f8 <tcp_process_refused_data>:
}

/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
 801c9f8:	b590      	push	{r4, r7, lr}
 801c9fa:	b085      	sub	sp, #20
 801c9fc:	af00      	add	r7, sp, #0
 801c9fe:	6078      	str	r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
 801ca00:	687b      	ldr	r3, [r7, #4]
 801ca02:	2b00      	cmp	r3, #0
 801ca04:	d109      	bne.n	801ca1a <tcp_process_refused_data+0x22>
 801ca06:	4b38      	ldr	r3, [pc, #224]	@ (801cae8 <tcp_process_refused_data+0xf0>)
 801ca08:	f240 6209 	movw	r2, #1545	@ 0x609
 801ca0c:	4937      	ldr	r1, [pc, #220]	@ (801caec <tcp_process_refused_data+0xf4>)
 801ca0e:	4838      	ldr	r0, [pc, #224]	@ (801caf0 <tcp_process_refused_data+0xf8>)
 801ca10:	f00d fea4 	bl	802a75c <iprintf>
 801ca14:	f06f 030f 	mvn.w	r3, #15
 801ca18:	e061      	b.n	801cade <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
  {
    err_t err;
    u8_t refused_flags = pcb->refused_data->flags;
 801ca1a:	687b      	ldr	r3, [r7, #4]
 801ca1c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ca1e:	7b5b      	ldrb	r3, [r3, #13]
 801ca20:	73bb      	strb	r3, [r7, #14]
    /* set pcb->refused_data to NULL in case the callback frees it and then
       closes the pcb */
    struct pbuf *refused_data = pcb->refused_data;
 801ca22:	687b      	ldr	r3, [r7, #4]
 801ca24:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ca26:	60bb      	str	r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
    pbuf_split_64k(refused_data, &rest);
    pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    pcb->refused_data = NULL;
 801ca28:	687b      	ldr	r3, [r7, #4]
 801ca2a:	2200      	movs	r2, #0
 801ca2c:	679a      	str	r2, [r3, #120]	@ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    /* Notify again application with data previously received. */
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
 801ca2e:	687b      	ldr	r3, [r7, #4]
 801ca30:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801ca34:	2b00      	cmp	r3, #0
 801ca36:	d00b      	beq.n	801ca50 <tcp_process_refused_data+0x58>
 801ca38:	687b      	ldr	r3, [r7, #4]
 801ca3a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801ca3e:	687b      	ldr	r3, [r7, #4]
 801ca40:	6918      	ldr	r0, [r3, #16]
 801ca42:	2300      	movs	r3, #0
 801ca44:	68ba      	ldr	r2, [r7, #8]
 801ca46:	6879      	ldr	r1, [r7, #4]
 801ca48:	47a0      	blx	r4
 801ca4a:	4603      	mov	r3, r0
 801ca4c:	73fb      	strb	r3, [r7, #15]
 801ca4e:	e007      	b.n	801ca60 <tcp_process_refused_data+0x68>
 801ca50:	2300      	movs	r3, #0
 801ca52:	68ba      	ldr	r2, [r7, #8]
 801ca54:	6879      	ldr	r1, [r7, #4]
 801ca56:	2000      	movs	r0, #0
 801ca58:	f000 f8a6 	bl	801cba8 <tcp_recv_null>
 801ca5c:	4603      	mov	r3, r0
 801ca5e:	73fb      	strb	r3, [r7, #15]
    if (err == ERR_OK) {
 801ca60:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801ca64:	2b00      	cmp	r3, #0
 801ca66:	d12b      	bne.n	801cac0 <tcp_process_refused_data+0xc8>
      /* did refused_data include a FIN? */
      if ((refused_flags & PBUF_FLAG_TCP_FIN)
 801ca68:	7bbb      	ldrb	r3, [r7, #14]
 801ca6a:	f003 0320 	and.w	r3, r3, #32
 801ca6e:	2b00      	cmp	r3, #0
 801ca70:	d034      	beq.n	801cadc <tcp_process_refused_data+0xe4>
          && (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
         ) {
        /* correct rcv_wnd as the application won't call tcp_recved()
           for the FIN's seqno */
        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801ca72:	687b      	ldr	r3, [r7, #4]
 801ca74:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ca76:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ca7a:	4293      	cmp	r3, r2
 801ca7c:	d005      	beq.n	801ca8a <tcp_process_refused_data+0x92>
          pcb->rcv_wnd++;
 801ca7e:	687b      	ldr	r3, [r7, #4]
 801ca80:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ca82:	3301      	adds	r3, #1
 801ca84:	b29a      	uxth	r2, r3
 801ca86:	687b      	ldr	r3, [r7, #4]
 801ca88:	851a      	strh	r2, [r3, #40]	@ 0x28
        }
        TCP_EVENT_CLOSED(pcb, err);
 801ca8a:	687b      	ldr	r3, [r7, #4]
 801ca8c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801ca90:	2b00      	cmp	r3, #0
 801ca92:	d00b      	beq.n	801caac <tcp_process_refused_data+0xb4>
 801ca94:	687b      	ldr	r3, [r7, #4]
 801ca96:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801ca9a:	687b      	ldr	r3, [r7, #4]
 801ca9c:	6918      	ldr	r0, [r3, #16]
 801ca9e:	2300      	movs	r3, #0
 801caa0:	2200      	movs	r2, #0
 801caa2:	6879      	ldr	r1, [r7, #4]
 801caa4:	47a0      	blx	r4
 801caa6:	4603      	mov	r3, r0
 801caa8:	73fb      	strb	r3, [r7, #15]
 801caaa:	e001      	b.n	801cab0 <tcp_process_refused_data+0xb8>
 801caac:	2300      	movs	r3, #0
 801caae:	73fb      	strb	r3, [r7, #15]
        if (err == ERR_ABRT) {
 801cab0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cab4:	f113 0f0d 	cmn.w	r3, #13
 801cab8:	d110      	bne.n	801cadc <tcp_process_refused_data+0xe4>
          return ERR_ABRT;
 801caba:	f06f 030c 	mvn.w	r3, #12
 801cabe:	e00e      	b.n	801cade <tcp_process_refused_data+0xe6>
        }
      }
    } else if (err == ERR_ABRT) {
 801cac0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cac4:	f113 0f0d 	cmn.w	r3, #13
 801cac8:	d102      	bne.n	801cad0 <tcp_process_refused_data+0xd8>
      /* if err == ERR_ABRT, 'pcb' is already deallocated */
      /* Drop incoming packets because pcb is "full" (only if the incoming
         segment contains data). */
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
      return ERR_ABRT;
 801caca:	f06f 030c 	mvn.w	r3, #12
 801cace:	e006      	b.n	801cade <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
      if (rest != NULL) {
        pbuf_cat(refused_data, rest);
      }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
      pcb->refused_data = refused_data;
 801cad0:	687b      	ldr	r3, [r7, #4]
 801cad2:	68ba      	ldr	r2, [r7, #8]
 801cad4:	679a      	str	r2, [r3, #120]	@ 0x78
      return ERR_INPROGRESS;
 801cad6:	f06f 0304 	mvn.w	r3, #4
 801cada:	e000      	b.n	801cade <tcp_process_refused_data+0xe6>
    }
  }
  return ERR_OK;
 801cadc:	2300      	movs	r3, #0
}
 801cade:	4618      	mov	r0, r3
 801cae0:	3714      	adds	r7, #20
 801cae2:	46bd      	mov	sp, r7
 801cae4:	bd90      	pop	{r4, r7, pc}
 801cae6:	bf00      	nop
 801cae8:	0802f48c 	.word	0x0802f48c
 801caec:	0802f99c 	.word	0x0802f99c
 801caf0:	0802f4d0 	.word	0x0802f4d0

0801caf4 <tcp_segs_free>:
 *
 * @param seg tcp_seg list of TCP segments to free
 */
void
tcp_segs_free(struct tcp_seg *seg)
{
 801caf4:	b580      	push	{r7, lr}
 801caf6:	b084      	sub	sp, #16
 801caf8:	af00      	add	r7, sp, #0
 801cafa:	6078      	str	r0, [r7, #4]
  while (seg != NULL) {
 801cafc:	e007      	b.n	801cb0e <tcp_segs_free+0x1a>
    struct tcp_seg *next = seg->next;
 801cafe:	687b      	ldr	r3, [r7, #4]
 801cb00:	681b      	ldr	r3, [r3, #0]
 801cb02:	60fb      	str	r3, [r7, #12]
    tcp_seg_free(seg);
 801cb04:	6878      	ldr	r0, [r7, #4]
 801cb06:	f000 f80a 	bl	801cb1e <tcp_seg_free>
    seg = next;
 801cb0a:	68fb      	ldr	r3, [r7, #12]
 801cb0c:	607b      	str	r3, [r7, #4]
  while (seg != NULL) {
 801cb0e:	687b      	ldr	r3, [r7, #4]
 801cb10:	2b00      	cmp	r3, #0
 801cb12:	d1f4      	bne.n	801cafe <tcp_segs_free+0xa>
  }
}
 801cb14:	bf00      	nop
 801cb16:	bf00      	nop
 801cb18:	3710      	adds	r7, #16
 801cb1a:	46bd      	mov	sp, r7
 801cb1c:	bd80      	pop	{r7, pc}

0801cb1e <tcp_seg_free>:
 *
 * @param seg single tcp_seg to free
 */
void
tcp_seg_free(struct tcp_seg *seg)
{
 801cb1e:	b580      	push	{r7, lr}
 801cb20:	b082      	sub	sp, #8
 801cb22:	af00      	add	r7, sp, #0
 801cb24:	6078      	str	r0, [r7, #4]
  if (seg != NULL) {
 801cb26:	687b      	ldr	r3, [r7, #4]
 801cb28:	2b00      	cmp	r3, #0
 801cb2a:	d00c      	beq.n	801cb46 <tcp_seg_free+0x28>
    if (seg->p != NULL) {
 801cb2c:	687b      	ldr	r3, [r7, #4]
 801cb2e:	685b      	ldr	r3, [r3, #4]
 801cb30:	2b00      	cmp	r3, #0
 801cb32:	d004      	beq.n	801cb3e <tcp_seg_free+0x20>
      pbuf_free(seg->p);
 801cb34:	687b      	ldr	r3, [r7, #4]
 801cb36:	685b      	ldr	r3, [r3, #4]
 801cb38:	4618      	mov	r0, r3
 801cb3a:	f7fe fb97 	bl	801b26c <pbuf_free>
#if TCP_DEBUG
      seg->p = NULL;
#endif /* TCP_DEBUG */
    }
    memp_free(MEMP_TCP_SEG, seg);
 801cb3e:	6879      	ldr	r1, [r7, #4]
 801cb40:	2003      	movs	r0, #3
 801cb42:	f7fd fca5 	bl	801a490 <memp_free>
  }
}
 801cb46:	bf00      	nop
 801cb48:	3708      	adds	r7, #8
 801cb4a:	46bd      	mov	sp, r7
 801cb4c:	bd80      	pop	{r7, pc}
	...

0801cb50 <tcp_seg_copy>:
 * @param seg the old tcp_seg
 * @return a copy of seg
 */
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
 801cb50:	b580      	push	{r7, lr}
 801cb52:	b084      	sub	sp, #16
 801cb54:	af00      	add	r7, sp, #0
 801cb56:	6078      	str	r0, [r7, #4]
  struct tcp_seg *cseg;

  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
 801cb58:	687b      	ldr	r3, [r7, #4]
 801cb5a:	2b00      	cmp	r3, #0
 801cb5c:	d106      	bne.n	801cb6c <tcp_seg_copy+0x1c>
 801cb5e:	4b0f      	ldr	r3, [pc, #60]	@ (801cb9c <tcp_seg_copy+0x4c>)
 801cb60:	f240 6282 	movw	r2, #1666	@ 0x682
 801cb64:	490e      	ldr	r1, [pc, #56]	@ (801cba0 <tcp_seg_copy+0x50>)
 801cb66:	480f      	ldr	r0, [pc, #60]	@ (801cba4 <tcp_seg_copy+0x54>)
 801cb68:	f00d fdf8 	bl	802a75c <iprintf>

  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
 801cb6c:	2003      	movs	r0, #3
 801cb6e:	f7fd fc19 	bl	801a3a4 <memp_malloc>
 801cb72:	60f8      	str	r0, [r7, #12]
  if (cseg == NULL) {
 801cb74:	68fb      	ldr	r3, [r7, #12]
 801cb76:	2b00      	cmp	r3, #0
 801cb78:	d101      	bne.n	801cb7e <tcp_seg_copy+0x2e>
    return NULL;
 801cb7a:	2300      	movs	r3, #0
 801cb7c:	e00a      	b.n	801cb94 <tcp_seg_copy+0x44>
  }
  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
 801cb7e:	2214      	movs	r2, #20
 801cb80:	6879      	ldr	r1, [r7, #4]
 801cb82:	68f8      	ldr	r0, [r7, #12]
 801cb84:	f00e f873 	bl	802ac6e <memcpy>
  pbuf_ref(cseg->p);
 801cb88:	68fb      	ldr	r3, [r7, #12]
 801cb8a:	685b      	ldr	r3, [r3, #4]
 801cb8c:	4618      	mov	r0, r3
 801cb8e:	f7fe fc13 	bl	801b3b8 <pbuf_ref>
  return cseg;
 801cb92:	68fb      	ldr	r3, [r7, #12]
}
 801cb94:	4618      	mov	r0, r3
 801cb96:	3710      	adds	r7, #16
 801cb98:	46bd      	mov	sp, r7
 801cb9a:	bd80      	pop	{r7, pc}
 801cb9c:	0802f48c 	.word	0x0802f48c
 801cba0:	0802f9e0 	.word	0x0802f9e0
 801cba4:	0802f4d0 	.word	0x0802f4d0

0801cba8 <tcp_recv_null>:
 * Default receive callback that is called if the user didn't register
 * a recv callback for the pcb.
 */
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 801cba8:	b580      	push	{r7, lr}
 801cbaa:	b084      	sub	sp, #16
 801cbac:	af00      	add	r7, sp, #0
 801cbae:	60f8      	str	r0, [r7, #12]
 801cbb0:	60b9      	str	r1, [r7, #8]
 801cbb2:	607a      	str	r2, [r7, #4]
 801cbb4:	70fb      	strb	r3, [r7, #3]
  LWIP_UNUSED_ARG(arg);

  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
 801cbb6:	68bb      	ldr	r3, [r7, #8]
 801cbb8:	2b00      	cmp	r3, #0
 801cbba:	d109      	bne.n	801cbd0 <tcp_recv_null+0x28>
 801cbbc:	4b12      	ldr	r3, [pc, #72]	@ (801cc08 <tcp_recv_null+0x60>)
 801cbbe:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801cbc2:	4912      	ldr	r1, [pc, #72]	@ (801cc0c <tcp_recv_null+0x64>)
 801cbc4:	4812      	ldr	r0, [pc, #72]	@ (801cc10 <tcp_recv_null+0x68>)
 801cbc6:	f00d fdc9 	bl	802a75c <iprintf>
 801cbca:	f06f 030f 	mvn.w	r3, #15
 801cbce:	e016      	b.n	801cbfe <tcp_recv_null+0x56>

  if (p != NULL) {
 801cbd0:	687b      	ldr	r3, [r7, #4]
 801cbd2:	2b00      	cmp	r3, #0
 801cbd4:	d009      	beq.n	801cbea <tcp_recv_null+0x42>
    tcp_recved(pcb, p->tot_len);
 801cbd6:	687b      	ldr	r3, [r7, #4]
 801cbd8:	891b      	ldrh	r3, [r3, #8]
 801cbda:	4619      	mov	r1, r3
 801cbdc:	68b8      	ldr	r0, [r7, #8]
 801cbde:	f7ff f9b1 	bl	801bf44 <tcp_recved>
    pbuf_free(p);
 801cbe2:	6878      	ldr	r0, [r7, #4]
 801cbe4:	f7fe fb42 	bl	801b26c <pbuf_free>
 801cbe8:	e008      	b.n	801cbfc <tcp_recv_null+0x54>
  } else if (err == ERR_OK) {
 801cbea:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801cbee:	2b00      	cmp	r3, #0
 801cbf0:	d104      	bne.n	801cbfc <tcp_recv_null+0x54>
    return tcp_close(pcb);
 801cbf2:	68b8      	ldr	r0, [r7, #8]
 801cbf4:	f7fe fff4 	bl	801bbe0 <tcp_close>
 801cbf8:	4603      	mov	r3, r0
 801cbfa:	e000      	b.n	801cbfe <tcp_recv_null+0x56>
  }
  return ERR_OK;
 801cbfc:	2300      	movs	r3, #0
}
 801cbfe:	4618      	mov	r0, r3
 801cc00:	3710      	adds	r7, #16
 801cc02:	46bd      	mov	sp, r7
 801cc04:	bd80      	pop	{r7, pc}
 801cc06:	bf00      	nop
 801cc08:	0802f48c 	.word	0x0802f48c
 801cc0c:	0802f9fc 	.word	0x0802f9fc
 801cc10:	0802f4d0 	.word	0x0802f4d0

0801cc14 <tcp_kill_prio>:
 *
 * @param prio minimum priority
 */
static void
tcp_kill_prio(u8_t prio)
{
 801cc14:	b580      	push	{r7, lr}
 801cc16:	b086      	sub	sp, #24
 801cc18:	af00      	add	r7, sp, #0
 801cc1a:	4603      	mov	r3, r0
 801cc1c:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;
  u8_t mprio;

  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
 801cc1e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801cc22:	2b00      	cmp	r3, #0
 801cc24:	db01      	blt.n	801cc2a <tcp_kill_prio+0x16>
 801cc26:	79fb      	ldrb	r3, [r7, #7]
 801cc28:	e000      	b.n	801cc2c <tcp_kill_prio+0x18>
 801cc2a:	237f      	movs	r3, #127	@ 0x7f
 801cc2c:	72fb      	strb	r3, [r7, #11]

  /* We want to kill connections with a lower prio, so bail out if 
   * supplied prio is 0 - there can never be a lower prio
   */
  if (mprio == 0) {
 801cc2e:	7afb      	ldrb	r3, [r7, #11]
 801cc30:	2b00      	cmp	r3, #0
 801cc32:	d034      	beq.n	801cc9e <tcp_kill_prio+0x8a>
  /* We only want kill connections with a lower prio, so decrement prio by one 
   * and start searching for oldest connection with same or lower priority than mprio.
   * We want to find the connections with the lowest possible prio, and among
   * these the one with the longest inactivity time.
   */
  mprio--;
 801cc34:	7afb      	ldrb	r3, [r7, #11]
 801cc36:	3b01      	subs	r3, #1
 801cc38:	72fb      	strb	r3, [r7, #11]

  inactivity = 0;
 801cc3a:	2300      	movs	r3, #0
 801cc3c:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801cc3e:	2300      	movs	r3, #0
 801cc40:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cc42:	4b19      	ldr	r3, [pc, #100]	@ (801cca8 <tcp_kill_prio+0x94>)
 801cc44:	681b      	ldr	r3, [r3, #0]
 801cc46:	617b      	str	r3, [r7, #20]
 801cc48:	e01f      	b.n	801cc8a <tcp_kill_prio+0x76>
        /* lower prio is always a kill candidate */
    if ((pcb->prio < mprio) ||
 801cc4a:	697b      	ldr	r3, [r7, #20]
 801cc4c:	7d5b      	ldrb	r3, [r3, #21]
 801cc4e:	7afa      	ldrb	r2, [r7, #11]
 801cc50:	429a      	cmp	r2, r3
 801cc52:	d80c      	bhi.n	801cc6e <tcp_kill_prio+0x5a>
        /* longer inactivity is also a kill candidate */
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801cc54:	697b      	ldr	r3, [r7, #20]
 801cc56:	7d5b      	ldrb	r3, [r3, #21]
    if ((pcb->prio < mprio) ||
 801cc58:	7afa      	ldrb	r2, [r7, #11]
 801cc5a:	429a      	cmp	r2, r3
 801cc5c:	d112      	bne.n	801cc84 <tcp_kill_prio+0x70>
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801cc5e:	4b13      	ldr	r3, [pc, #76]	@ (801ccac <tcp_kill_prio+0x98>)
 801cc60:	681a      	ldr	r2, [r3, #0]
 801cc62:	697b      	ldr	r3, [r7, #20]
 801cc64:	6a1b      	ldr	r3, [r3, #32]
 801cc66:	1ad3      	subs	r3, r2, r3
 801cc68:	68fa      	ldr	r2, [r7, #12]
 801cc6a:	429a      	cmp	r2, r3
 801cc6c:	d80a      	bhi.n	801cc84 <tcp_kill_prio+0x70>
      inactivity = tcp_ticks - pcb->tmr;
 801cc6e:	4b0f      	ldr	r3, [pc, #60]	@ (801ccac <tcp_kill_prio+0x98>)
 801cc70:	681a      	ldr	r2, [r3, #0]
 801cc72:	697b      	ldr	r3, [r7, #20]
 801cc74:	6a1b      	ldr	r3, [r3, #32]
 801cc76:	1ad3      	subs	r3, r2, r3
 801cc78:	60fb      	str	r3, [r7, #12]
      inactive   = pcb;
 801cc7a:	697b      	ldr	r3, [r7, #20]
 801cc7c:	613b      	str	r3, [r7, #16]
      mprio      = pcb->prio;
 801cc7e:	697b      	ldr	r3, [r7, #20]
 801cc80:	7d5b      	ldrb	r3, [r3, #21]
 801cc82:	72fb      	strb	r3, [r7, #11]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cc84:	697b      	ldr	r3, [r7, #20]
 801cc86:	68db      	ldr	r3, [r3, #12]
 801cc88:	617b      	str	r3, [r7, #20]
 801cc8a:	697b      	ldr	r3, [r7, #20]
 801cc8c:	2b00      	cmp	r3, #0
 801cc8e:	d1dc      	bne.n	801cc4a <tcp_kill_prio+0x36>
    }
  }
  if (inactive != NULL) {
 801cc90:	693b      	ldr	r3, [r7, #16]
 801cc92:	2b00      	cmp	r3, #0
 801cc94:	d004      	beq.n	801cca0 <tcp_kill_prio+0x8c>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801cc96:	6938      	ldr	r0, [r7, #16]
 801cc98:	f7ff f8ee 	bl	801be78 <tcp_abort>
 801cc9c:	e000      	b.n	801cca0 <tcp_kill_prio+0x8c>
    return;
 801cc9e:	bf00      	nop
  }
}
 801cca0:	3718      	adds	r7, #24
 801cca2:	46bd      	mov	sp, r7
 801cca4:	bd80      	pop	{r7, pc}
 801cca6:	bf00      	nop
 801cca8:	2402af74 	.word	0x2402af74
 801ccac:	2402af68 	.word	0x2402af68

0801ccb0 <tcp_kill_state>:
 * Kills the oldest connection that is in specific state.
 * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
 */
static void
tcp_kill_state(enum tcp_state state)
{
 801ccb0:	b580      	push	{r7, lr}
 801ccb2:	b086      	sub	sp, #24
 801ccb4:	af00      	add	r7, sp, #0
 801ccb6:	4603      	mov	r3, r0
 801ccb8:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
 801ccba:	79fb      	ldrb	r3, [r7, #7]
 801ccbc:	2b08      	cmp	r3, #8
 801ccbe:	d009      	beq.n	801ccd4 <tcp_kill_state+0x24>
 801ccc0:	79fb      	ldrb	r3, [r7, #7]
 801ccc2:	2b09      	cmp	r3, #9
 801ccc4:	d006      	beq.n	801ccd4 <tcp_kill_state+0x24>
 801ccc6:	4b1a      	ldr	r3, [pc, #104]	@ (801cd30 <tcp_kill_state+0x80>)
 801ccc8:	f240 62dd 	movw	r2, #1757	@ 0x6dd
 801cccc:	4919      	ldr	r1, [pc, #100]	@ (801cd34 <tcp_kill_state+0x84>)
 801ccce:	481a      	ldr	r0, [pc, #104]	@ (801cd38 <tcp_kill_state+0x88>)
 801ccd0:	f00d fd44 	bl	802a75c <iprintf>

  inactivity = 0;
 801ccd4:	2300      	movs	r3, #0
 801ccd6:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801ccd8:	2300      	movs	r3, #0
 801ccda:	613b      	str	r3, [r7, #16]
  /* Go through the list of active pcbs and get the oldest pcb that is in state
     CLOSING/LAST_ACK. */
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801ccdc:	4b17      	ldr	r3, [pc, #92]	@ (801cd3c <tcp_kill_state+0x8c>)
 801ccde:	681b      	ldr	r3, [r3, #0]
 801cce0:	617b      	str	r3, [r7, #20]
 801cce2:	e017      	b.n	801cd14 <tcp_kill_state+0x64>
    if (pcb->state == state) {
 801cce4:	697b      	ldr	r3, [r7, #20]
 801cce6:	7d1b      	ldrb	r3, [r3, #20]
 801cce8:	79fa      	ldrb	r2, [r7, #7]
 801ccea:	429a      	cmp	r2, r3
 801ccec:	d10f      	bne.n	801cd0e <tcp_kill_state+0x5e>
      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801ccee:	4b14      	ldr	r3, [pc, #80]	@ (801cd40 <tcp_kill_state+0x90>)
 801ccf0:	681a      	ldr	r2, [r3, #0]
 801ccf2:	697b      	ldr	r3, [r7, #20]
 801ccf4:	6a1b      	ldr	r3, [r3, #32]
 801ccf6:	1ad3      	subs	r3, r2, r3
 801ccf8:	68fa      	ldr	r2, [r7, #12]
 801ccfa:	429a      	cmp	r2, r3
 801ccfc:	d807      	bhi.n	801cd0e <tcp_kill_state+0x5e>
        inactivity = tcp_ticks - pcb->tmr;
 801ccfe:	4b10      	ldr	r3, [pc, #64]	@ (801cd40 <tcp_kill_state+0x90>)
 801cd00:	681a      	ldr	r2, [r3, #0]
 801cd02:	697b      	ldr	r3, [r7, #20]
 801cd04:	6a1b      	ldr	r3, [r3, #32]
 801cd06:	1ad3      	subs	r3, r2, r3
 801cd08:	60fb      	str	r3, [r7, #12]
        inactive = pcb;
 801cd0a:	697b      	ldr	r3, [r7, #20]
 801cd0c:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cd0e:	697b      	ldr	r3, [r7, #20]
 801cd10:	68db      	ldr	r3, [r3, #12]
 801cd12:	617b      	str	r3, [r7, #20]
 801cd14:	697b      	ldr	r3, [r7, #20]
 801cd16:	2b00      	cmp	r3, #0
 801cd18:	d1e4      	bne.n	801cce4 <tcp_kill_state+0x34>
      }
    }
  }
  if (inactive != NULL) {
 801cd1a:	693b      	ldr	r3, [r7, #16]
 801cd1c:	2b00      	cmp	r3, #0
 801cd1e:	d003      	beq.n	801cd28 <tcp_kill_state+0x78>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
                            tcp_state_str[state], (void *)inactive, inactivity));
    /* Don't send a RST, since no data is lost. */
    tcp_abandon(inactive, 0);
 801cd20:	2100      	movs	r1, #0
 801cd22:	6938      	ldr	r0, [r7, #16]
 801cd24:	f7fe ffe8 	bl	801bcf8 <tcp_abandon>
  }
}
 801cd28:	bf00      	nop
 801cd2a:	3718      	adds	r7, #24
 801cd2c:	46bd      	mov	sp, r7
 801cd2e:	bd80      	pop	{r7, pc}
 801cd30:	0802f48c 	.word	0x0802f48c
 801cd34:	0802fa18 	.word	0x0802fa18
 801cd38:	0802f4d0 	.word	0x0802f4d0
 801cd3c:	2402af74 	.word	0x2402af74
 801cd40:	2402af68 	.word	0x2402af68

0801cd44 <tcp_kill_timewait>:
 * Kills the oldest connection that is in TIME_WAIT state.
 * Called from tcp_alloc() if no more connections are available.
 */
static void
tcp_kill_timewait(void)
{
 801cd44:	b580      	push	{r7, lr}
 801cd46:	b084      	sub	sp, #16
 801cd48:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  inactivity = 0;
 801cd4a:	2300      	movs	r3, #0
 801cd4c:	607b      	str	r3, [r7, #4]
  inactive = NULL;
 801cd4e:	2300      	movs	r3, #0
 801cd50:	60bb      	str	r3, [r7, #8]
  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801cd52:	4b12      	ldr	r3, [pc, #72]	@ (801cd9c <tcp_kill_timewait+0x58>)
 801cd54:	681b      	ldr	r3, [r3, #0]
 801cd56:	60fb      	str	r3, [r7, #12]
 801cd58:	e012      	b.n	801cd80 <tcp_kill_timewait+0x3c>
    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801cd5a:	4b11      	ldr	r3, [pc, #68]	@ (801cda0 <tcp_kill_timewait+0x5c>)
 801cd5c:	681a      	ldr	r2, [r3, #0]
 801cd5e:	68fb      	ldr	r3, [r7, #12]
 801cd60:	6a1b      	ldr	r3, [r3, #32]
 801cd62:	1ad3      	subs	r3, r2, r3
 801cd64:	687a      	ldr	r2, [r7, #4]
 801cd66:	429a      	cmp	r2, r3
 801cd68:	d807      	bhi.n	801cd7a <tcp_kill_timewait+0x36>
      inactivity = tcp_ticks - pcb->tmr;
 801cd6a:	4b0d      	ldr	r3, [pc, #52]	@ (801cda0 <tcp_kill_timewait+0x5c>)
 801cd6c:	681a      	ldr	r2, [r3, #0]
 801cd6e:	68fb      	ldr	r3, [r7, #12]
 801cd70:	6a1b      	ldr	r3, [r3, #32]
 801cd72:	1ad3      	subs	r3, r2, r3
 801cd74:	607b      	str	r3, [r7, #4]
      inactive = pcb;
 801cd76:	68fb      	ldr	r3, [r7, #12]
 801cd78:	60bb      	str	r3, [r7, #8]
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801cd7a:	68fb      	ldr	r3, [r7, #12]
 801cd7c:	68db      	ldr	r3, [r3, #12]
 801cd7e:	60fb      	str	r3, [r7, #12]
 801cd80:	68fb      	ldr	r3, [r7, #12]
 801cd82:	2b00      	cmp	r3, #0
 801cd84:	d1e9      	bne.n	801cd5a <tcp_kill_timewait+0x16>
    }
  }
  if (inactive != NULL) {
 801cd86:	68bb      	ldr	r3, [r7, #8]
 801cd88:	2b00      	cmp	r3, #0
 801cd8a:	d002      	beq.n	801cd92 <tcp_kill_timewait+0x4e>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801cd8c:	68b8      	ldr	r0, [r7, #8]
 801cd8e:	f7ff f873 	bl	801be78 <tcp_abort>
  }
}
 801cd92:	bf00      	nop
 801cd94:	3710      	adds	r7, #16
 801cd96:	46bd      	mov	sp, r7
 801cd98:	bd80      	pop	{r7, pc}
 801cd9a:	bf00      	nop
 801cd9c:	2402af78 	.word	0x2402af78
 801cda0:	2402af68 	.word	0x2402af68

0801cda4 <tcp_handle_closepend>:
 * now send the FIN (which failed before), the pcb might be in a state that is
 * OK for us to now free it.
 */
static void
tcp_handle_closepend(void)
{
 801cda4:	b580      	push	{r7, lr}
 801cda6:	b082      	sub	sp, #8
 801cda8:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb = tcp_active_pcbs;
 801cdaa:	4b10      	ldr	r3, [pc, #64]	@ (801cdec <tcp_handle_closepend+0x48>)
 801cdac:	681b      	ldr	r3, [r3, #0]
 801cdae:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801cdb0:	e014      	b.n	801cddc <tcp_handle_closepend+0x38>
    struct tcp_pcb *next = pcb->next;
 801cdb2:	687b      	ldr	r3, [r7, #4]
 801cdb4:	68db      	ldr	r3, [r3, #12]
 801cdb6:	603b      	str	r3, [r7, #0]
    /* send pending FIN */
    if (pcb->flags & TF_CLOSEPEND) {
 801cdb8:	687b      	ldr	r3, [r7, #4]
 801cdba:	8b5b      	ldrh	r3, [r3, #26]
 801cdbc:	f003 0308 	and.w	r3, r3, #8
 801cdc0:	2b00      	cmp	r3, #0
 801cdc2:	d009      	beq.n	801cdd8 <tcp_handle_closepend+0x34>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
      tcp_clear_flags(pcb, TF_CLOSEPEND);
 801cdc4:	687b      	ldr	r3, [r7, #4]
 801cdc6:	8b5b      	ldrh	r3, [r3, #26]
 801cdc8:	f023 0308 	bic.w	r3, r3, #8
 801cdcc:	b29a      	uxth	r2, r3
 801cdce:	687b      	ldr	r3, [r7, #4]
 801cdd0:	835a      	strh	r2, [r3, #26]
      tcp_close_shutdown_fin(pcb);
 801cdd2:	6878      	ldr	r0, [r7, #4]
 801cdd4:	f7fe fe9a 	bl	801bb0c <tcp_close_shutdown_fin>
    }
    pcb = next;
 801cdd8:	683b      	ldr	r3, [r7, #0]
 801cdda:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801cddc:	687b      	ldr	r3, [r7, #4]
 801cdde:	2b00      	cmp	r3, #0
 801cde0:	d1e7      	bne.n	801cdb2 <tcp_handle_closepend+0xe>
  }
}
 801cde2:	bf00      	nop
 801cde4:	bf00      	nop
 801cde6:	3708      	adds	r7, #8
 801cde8:	46bd      	mov	sp, r7
 801cdea:	bd80      	pop	{r7, pc}
 801cdec:	2402af74 	.word	0x2402af74

0801cdf0 <tcp_alloc>:
 * @param prio priority for the new pcb
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
 801cdf0:	b580      	push	{r7, lr}
 801cdf2:	b084      	sub	sp, #16
 801cdf4:	af00      	add	r7, sp, #0
 801cdf6:	4603      	mov	r3, r0
 801cdf8:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 801cdfa:	f7f4 f881 	bl	8010f00 <sys_check_core_locking>

  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801cdfe:	2001      	movs	r0, #1
 801ce00:	f7fd fad0 	bl	801a3a4 <memp_malloc>
 801ce04:	60f8      	str	r0, [r7, #12]
  if (pcb == NULL) {
 801ce06:	68fb      	ldr	r3, [r7, #12]
 801ce08:	2b00      	cmp	r3, #0
 801ce0a:	d126      	bne.n	801ce5a <tcp_alloc+0x6a>
    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
    tcp_handle_closepend();
 801ce0c:	f7ff ffca 	bl	801cda4 <tcp_handle_closepend>

    /* Try killing oldest connection in TIME-WAIT. */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
    tcp_kill_timewait();
 801ce10:	f7ff ff98 	bl	801cd44 <tcp_kill_timewait>
    /* Try to allocate a tcp_pcb again. */
    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801ce14:	2001      	movs	r0, #1
 801ce16:	f7fd fac5 	bl	801a3a4 <memp_malloc>
 801ce1a:	60f8      	str	r0, [r7, #12]
    if (pcb == NULL) {
 801ce1c:	68fb      	ldr	r3, [r7, #12]
 801ce1e:	2b00      	cmp	r3, #0
 801ce20:	d11b      	bne.n	801ce5a <tcp_alloc+0x6a>
      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
      tcp_kill_state(LAST_ACK);
 801ce22:	2009      	movs	r0, #9
 801ce24:	f7ff ff44 	bl	801ccb0 <tcp_kill_state>
      /* Try to allocate a tcp_pcb again. */
      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801ce28:	2001      	movs	r0, #1
 801ce2a:	f7fd fabb 	bl	801a3a4 <memp_malloc>
 801ce2e:	60f8      	str	r0, [r7, #12]
      if (pcb == NULL) {
 801ce30:	68fb      	ldr	r3, [r7, #12]
 801ce32:	2b00      	cmp	r3, #0
 801ce34:	d111      	bne.n	801ce5a <tcp_alloc+0x6a>
        /* Try killing oldest connection in CLOSING. */
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
        tcp_kill_state(CLOSING);
 801ce36:	2008      	movs	r0, #8
 801ce38:	f7ff ff3a 	bl	801ccb0 <tcp_kill_state>
        /* Try to allocate a tcp_pcb again. */
        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801ce3c:	2001      	movs	r0, #1
 801ce3e:	f7fd fab1 	bl	801a3a4 <memp_malloc>
 801ce42:	60f8      	str	r0, [r7, #12]
        if (pcb == NULL) {
 801ce44:	68fb      	ldr	r3, [r7, #12]
 801ce46:	2b00      	cmp	r3, #0
 801ce48:	d107      	bne.n	801ce5a <tcp_alloc+0x6a>
          /* Try killing oldest active connection with lower priority than the new one. */
          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
          tcp_kill_prio(prio);
 801ce4a:	79fb      	ldrb	r3, [r7, #7]
 801ce4c:	4618      	mov	r0, r3
 801ce4e:	f7ff fee1 	bl	801cc14 <tcp_kill_prio>
          /* Try to allocate a tcp_pcb again. */
          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801ce52:	2001      	movs	r0, #1
 801ce54:	f7fd faa6 	bl	801a3a4 <memp_malloc>
 801ce58:	60f8      	str	r0, [r7, #12]
    if (pcb != NULL) {
      /* adjust err stats: memp_malloc failed above */
      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
    }
  }
  if (pcb != NULL) {
 801ce5a:	68fb      	ldr	r3, [r7, #12]
 801ce5c:	2b00      	cmp	r3, #0
 801ce5e:	d03f      	beq.n	801cee0 <tcp_alloc+0xf0>
    /* zero out the whole pcb, so there is no need to initialize members to zero */
    memset(pcb, 0, sizeof(struct tcp_pcb));
 801ce60:	229c      	movs	r2, #156	@ 0x9c
 801ce62:	2100      	movs	r1, #0
 801ce64:	68f8      	ldr	r0, [r7, #12]
 801ce66:	f00d fe0b 	bl	802aa80 <memset>
    pcb->prio = prio;
 801ce6a:	68fb      	ldr	r3, [r7, #12]
 801ce6c:	79fa      	ldrb	r2, [r7, #7]
 801ce6e:	755a      	strb	r2, [r3, #21]
    pcb->snd_buf = TCP_SND_BUF;
 801ce70:	68fb      	ldr	r3, [r7, #12]
 801ce72:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ce76:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
    /* Start with a window that does not need scaling. When window scaling is
       enabled and used, the window is enlarged when both sides agree on scaling. */
    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801ce7a:	68fb      	ldr	r3, [r7, #12]
 801ce7c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ce80:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801ce82:	68fb      	ldr	r3, [r7, #12]
 801ce84:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801ce86:	68fb      	ldr	r3, [r7, #12]
 801ce88:	851a      	strh	r2, [r3, #40]	@ 0x28
    pcb->ttl = TCP_TTL;
 801ce8a:	68fb      	ldr	r3, [r7, #12]
 801ce8c:	22ff      	movs	r2, #255	@ 0xff
 801ce8e:	72da      	strb	r2, [r3, #11]
    /* As initial send MSS, we use TCP_MSS but limit it to 536.
       The send MSS is updated when an MSS option is received. */
    pcb->mss = INITIAL_MSS;
 801ce90:	68fb      	ldr	r3, [r7, #12]
 801ce92:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801ce96:	865a      	strh	r2, [r3, #50]	@ 0x32
    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
 801ce98:	68fb      	ldr	r3, [r7, #12]
 801ce9a:	2206      	movs	r2, #6
 801ce9c:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
 801cea0:	68fb      	ldr	r3, [r7, #12]
 801cea2:	2206      	movs	r2, #6
 801cea4:	87da      	strh	r2, [r3, #62]	@ 0x3e
    pcb->rtime = -1;
 801cea6:	68fb      	ldr	r3, [r7, #12]
 801cea8:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ceac:	861a      	strh	r2, [r3, #48]	@ 0x30
    pcb->cwnd = 1;
 801ceae:	68fb      	ldr	r3, [r7, #12]
 801ceb0:	2201      	movs	r2, #1
 801ceb2:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
    pcb->tmr = tcp_ticks;
 801ceb6:	4b0d      	ldr	r3, [pc, #52]	@ (801ceec <tcp_alloc+0xfc>)
 801ceb8:	681a      	ldr	r2, [r3, #0]
 801ceba:	68fb      	ldr	r3, [r7, #12]
 801cebc:	621a      	str	r2, [r3, #32]
    pcb->last_timer = tcp_timer_ctr;
 801cebe:	4b0c      	ldr	r3, [pc, #48]	@ (801cef0 <tcp_alloc+0x100>)
 801cec0:	781a      	ldrb	r2, [r3, #0]
 801cec2:	68fb      	ldr	r3, [r7, #12]
 801cec4:	779a      	strb	r2, [r3, #30]
    of using the largest advertised receive window.  We've seen complications with
    receiving TCPs that use window scaling and/or window auto-tuning where the
    initial advertised window is very small and then grows rapidly once the
    connection is established. To avoid these complications, we set ssthresh to the
    largest effective cwnd (amount of in-flight data) that the sender can have. */
    pcb->ssthresh = TCP_SND_BUF;
 801cec6:	68fb      	ldr	r3, [r7, #12]
 801cec8:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801cecc:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

#if LWIP_CALLBACK_API
    pcb->recv = tcp_recv_null;
 801ced0:	68fb      	ldr	r3, [r7, #12]
 801ced2:	4a08      	ldr	r2, [pc, #32]	@ (801cef4 <tcp_alloc+0x104>)
 801ced4:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#endif /* LWIP_CALLBACK_API */

    /* Init KEEPALIVE timer */
    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
 801ced8:	68fb      	ldr	r3, [r7, #12]
 801ceda:	4a07      	ldr	r2, [pc, #28]	@ (801cef8 <tcp_alloc+0x108>)
 801cedc:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if LWIP_TCP_KEEPALIVE
    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
  }
  return pcb;
 801cee0:	68fb      	ldr	r3, [r7, #12]
}
 801cee2:	4618      	mov	r0, r3
 801cee4:	3710      	adds	r7, #16
 801cee6:	46bd      	mov	sp, r7
 801cee8:	bd80      	pop	{r7, pc}
 801ceea:	bf00      	nop
 801ceec:	2402af68 	.word	0x2402af68
 801cef0:	2402af7e 	.word	0x2402af7e
 801cef4:	0801cba9 	.word	0x0801cba9
 801cef8:	006ddd00 	.word	0x006ddd00

0801cefc <tcp_new_ip_type>:
 * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
 801cefc:	b580      	push	{r7, lr}
 801cefe:	b084      	sub	sp, #16
 801cf00:	af00      	add	r7, sp, #0
 801cf02:	4603      	mov	r3, r0
 801cf04:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;
  pcb = tcp_alloc(TCP_PRIO_NORMAL);
 801cf06:	2040      	movs	r0, #64	@ 0x40
 801cf08:	f7ff ff72 	bl	801cdf0 <tcp_alloc>
 801cf0c:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 801cf0e:	68fb      	ldr	r3, [r7, #12]
}
 801cf10:	4618      	mov	r0, r3
 801cf12:	3710      	adds	r7, #16
 801cf14:	46bd      	mov	sp, r7
 801cf16:	bd80      	pop	{r7, pc}

0801cf18 <tcp_arg>:
 * @param pcb tcp_pcb to set the callback argument
 * @param arg void pointer argument to pass to callback functions
 */
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
 801cf18:	b580      	push	{r7, lr}
 801cf1a:	b082      	sub	sp, #8
 801cf1c:	af00      	add	r7, sp, #0
 801cf1e:	6078      	str	r0, [r7, #4]
 801cf20:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801cf22:	f7f3 ffed 	bl	8010f00 <sys_check_core_locking>
  /* This function is allowed to be called for both listen pcbs and
     connection pcbs. */
  if (pcb != NULL) {
 801cf26:	687b      	ldr	r3, [r7, #4]
 801cf28:	2b00      	cmp	r3, #0
 801cf2a:	d002      	beq.n	801cf32 <tcp_arg+0x1a>
    pcb->callback_arg = arg;
 801cf2c:	687b      	ldr	r3, [r7, #4]
 801cf2e:	683a      	ldr	r2, [r7, #0]
 801cf30:	611a      	str	r2, [r3, #16]
  }
}
 801cf32:	bf00      	nop
 801cf34:	3708      	adds	r7, #8
 801cf36:	46bd      	mov	sp, r7
 801cf38:	bd80      	pop	{r7, pc}
	...

0801cf3c <tcp_recv>:
 * @param pcb tcp_pcb to set the recv callback
 * @param recv callback function to call for this pcb when data is received
 */
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
 801cf3c:	b580      	push	{r7, lr}
 801cf3e:	b082      	sub	sp, #8
 801cf40:	af00      	add	r7, sp, #0
 801cf42:	6078      	str	r0, [r7, #4]
 801cf44:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801cf46:	f7f3 ffdb 	bl	8010f00 <sys_check_core_locking>
  if (pcb != NULL) {
 801cf4a:	687b      	ldr	r3, [r7, #4]
 801cf4c:	2b00      	cmp	r3, #0
 801cf4e:	d00e      	beq.n	801cf6e <tcp_recv+0x32>
    LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
 801cf50:	687b      	ldr	r3, [r7, #4]
 801cf52:	7d1b      	ldrb	r3, [r3, #20]
 801cf54:	2b01      	cmp	r3, #1
 801cf56:	d106      	bne.n	801cf66 <tcp_recv+0x2a>
 801cf58:	4b07      	ldr	r3, [pc, #28]	@ (801cf78 <tcp_recv+0x3c>)
 801cf5a:	f240 72df 	movw	r2, #2015	@ 0x7df
 801cf5e:	4907      	ldr	r1, [pc, #28]	@ (801cf7c <tcp_recv+0x40>)
 801cf60:	4807      	ldr	r0, [pc, #28]	@ (801cf80 <tcp_recv+0x44>)
 801cf62:	f00d fbfb 	bl	802a75c <iprintf>
    pcb->recv = recv;
 801cf66:	687b      	ldr	r3, [r7, #4]
 801cf68:	683a      	ldr	r2, [r7, #0]
 801cf6a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  }
}
 801cf6e:	bf00      	nop
 801cf70:	3708      	adds	r7, #8
 801cf72:	46bd      	mov	sp, r7
 801cf74:	bd80      	pop	{r7, pc}
 801cf76:	bf00      	nop
 801cf78:	0802f48c 	.word	0x0802f48c
 801cf7c:	0802fa28 	.word	0x0802fa28
 801cf80:	0802f4d0 	.word	0x0802f4d0

0801cf84 <tcp_sent>:
 * @param pcb tcp_pcb to set the sent callback
 * @param sent callback function to call for this pcb when data is successfully sent
 */
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
 801cf84:	b580      	push	{r7, lr}
 801cf86:	b082      	sub	sp, #8
 801cf88:	af00      	add	r7, sp, #0
 801cf8a:	6078      	str	r0, [r7, #4]
 801cf8c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801cf8e:	f7f3 ffb7 	bl	8010f00 <sys_check_core_locking>
  if (pcb != NULL) {
 801cf92:	687b      	ldr	r3, [r7, #4]
 801cf94:	2b00      	cmp	r3, #0
 801cf96:	d00e      	beq.n	801cfb6 <tcp_sent+0x32>
    LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
 801cf98:	687b      	ldr	r3, [r7, #4]
 801cf9a:	7d1b      	ldrb	r3, [r3, #20]
 801cf9c:	2b01      	cmp	r3, #1
 801cf9e:	d106      	bne.n	801cfae <tcp_sent+0x2a>
 801cfa0:	4b07      	ldr	r3, [pc, #28]	@ (801cfc0 <tcp_sent+0x3c>)
 801cfa2:	f240 72f3 	movw	r2, #2035	@ 0x7f3
 801cfa6:	4907      	ldr	r1, [pc, #28]	@ (801cfc4 <tcp_sent+0x40>)
 801cfa8:	4807      	ldr	r0, [pc, #28]	@ (801cfc8 <tcp_sent+0x44>)
 801cfaa:	f00d fbd7 	bl	802a75c <iprintf>
    pcb->sent = sent;
 801cfae:	687b      	ldr	r3, [r7, #4]
 801cfb0:	683a      	ldr	r2, [r7, #0]
 801cfb2:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
  }
}
 801cfb6:	bf00      	nop
 801cfb8:	3708      	adds	r7, #8
 801cfba:	46bd      	mov	sp, r7
 801cfbc:	bd80      	pop	{r7, pc}
 801cfbe:	bf00      	nop
 801cfc0:	0802f48c 	.word	0x0802f48c
 801cfc4:	0802fa50 	.word	0x0802fa50
 801cfc8:	0802f4d0 	.word	0x0802f4d0

0801cfcc <tcp_err>:
 * @param err callback function to call for this pcb when a fatal error
 *        has occurred on the connection
 */
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
 801cfcc:	b580      	push	{r7, lr}
 801cfce:	b082      	sub	sp, #8
 801cfd0:	af00      	add	r7, sp, #0
 801cfd2:	6078      	str	r0, [r7, #4]
 801cfd4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801cfd6:	f7f3 ff93 	bl	8010f00 <sys_check_core_locking>
  if (pcb != NULL) {
 801cfda:	687b      	ldr	r3, [r7, #4]
 801cfdc:	2b00      	cmp	r3, #0
 801cfde:	d00e      	beq.n	801cffe <tcp_err+0x32>
    LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
 801cfe0:	687b      	ldr	r3, [r7, #4]
 801cfe2:	7d1b      	ldrb	r3, [r3, #20]
 801cfe4:	2b01      	cmp	r3, #1
 801cfe6:	d106      	bne.n	801cff6 <tcp_err+0x2a>
 801cfe8:	4b07      	ldr	r3, [pc, #28]	@ (801d008 <tcp_err+0x3c>)
 801cfea:	f640 020d 	movw	r2, #2061	@ 0x80d
 801cfee:	4907      	ldr	r1, [pc, #28]	@ (801d00c <tcp_err+0x40>)
 801cff0:	4807      	ldr	r0, [pc, #28]	@ (801d010 <tcp_err+0x44>)
 801cff2:	f00d fbb3 	bl	802a75c <iprintf>
    pcb->errf = err;
 801cff6:	687b      	ldr	r3, [r7, #4]
 801cff8:	683a      	ldr	r2, [r7, #0]
 801cffa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }
}
 801cffe:	bf00      	nop
 801d000:	3708      	adds	r7, #8
 801d002:	46bd      	mov	sp, r7
 801d004:	bd80      	pop	{r7, pc}
 801d006:	bf00      	nop
 801d008:	0802f48c 	.word	0x0802f48c
 801d00c:	0802fa78 	.word	0x0802fa78
 801d010:	0802f4d0 	.word	0x0802f4d0

0801d014 <tcp_accept>:
 * @param accept callback function to call for this pcb when LISTENing
 *        connection has been connected to another host
 */
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
 801d014:	b580      	push	{r7, lr}
 801d016:	b084      	sub	sp, #16
 801d018:	af00      	add	r7, sp, #0
 801d01a:	6078      	str	r0, [r7, #4]
 801d01c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d01e:	f7f3 ff6f 	bl	8010f00 <sys_check_core_locking>
  if ((pcb != NULL) && (pcb->state == LISTEN)) {
 801d022:	687b      	ldr	r3, [r7, #4]
 801d024:	2b00      	cmp	r3, #0
 801d026:	d008      	beq.n	801d03a <tcp_accept+0x26>
 801d028:	687b      	ldr	r3, [r7, #4]
 801d02a:	7d1b      	ldrb	r3, [r3, #20]
 801d02c:	2b01      	cmp	r3, #1
 801d02e:	d104      	bne.n	801d03a <tcp_accept+0x26>
    struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
 801d030:	687b      	ldr	r3, [r7, #4]
 801d032:	60fb      	str	r3, [r7, #12]
    lpcb->accept = accept;
 801d034:	68fb      	ldr	r3, [r7, #12]
 801d036:	683a      	ldr	r2, [r7, #0]
 801d038:	619a      	str	r2, [r3, #24]
  }
}
 801d03a:	bf00      	nop
 801d03c:	3710      	adds	r7, #16
 801d03e:	46bd      	mov	sp, r7
 801d040:	bd80      	pop	{r7, pc}
	...

0801d044 <tcp_poll>:
 * the application may use the polling functionality to call tcp_write()
 * again when the connection has been idle for a while.
 */
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
 801d044:	b580      	push	{r7, lr}
 801d046:	b084      	sub	sp, #16
 801d048:	af00      	add	r7, sp, #0
 801d04a:	60f8      	str	r0, [r7, #12]
 801d04c:	60b9      	str	r1, [r7, #8]
 801d04e:	4613      	mov	r3, r2
 801d050:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT_CORE_LOCKED();
 801d052:	f7f3 ff55 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
 801d056:	68fb      	ldr	r3, [r7, #12]
 801d058:	2b00      	cmp	r3, #0
 801d05a:	d107      	bne.n	801d06c <tcp_poll+0x28>
 801d05c:	4b0e      	ldr	r3, [pc, #56]	@ (801d098 <tcp_poll+0x54>)
 801d05e:	f640 023d 	movw	r2, #2109	@ 0x83d
 801d062:	490e      	ldr	r1, [pc, #56]	@ (801d09c <tcp_poll+0x58>)
 801d064:	480e      	ldr	r0, [pc, #56]	@ (801d0a0 <tcp_poll+0x5c>)
 801d066:	f00d fb79 	bl	802a75c <iprintf>
 801d06a:	e011      	b.n	801d090 <tcp_poll+0x4c>
  LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
 801d06c:	68fb      	ldr	r3, [r7, #12]
 801d06e:	7d1b      	ldrb	r3, [r3, #20]
 801d070:	2b01      	cmp	r3, #1
 801d072:	d106      	bne.n	801d082 <tcp_poll+0x3e>
 801d074:	4b08      	ldr	r3, [pc, #32]	@ (801d098 <tcp_poll+0x54>)
 801d076:	f640 023e 	movw	r2, #2110	@ 0x83e
 801d07a:	490a      	ldr	r1, [pc, #40]	@ (801d0a4 <tcp_poll+0x60>)
 801d07c:	4808      	ldr	r0, [pc, #32]	@ (801d0a0 <tcp_poll+0x5c>)
 801d07e:	f00d fb6d 	bl	802a75c <iprintf>

#if LWIP_CALLBACK_API
  pcb->poll = poll;
 801d082:	68fb      	ldr	r3, [r7, #12]
 801d084:	68ba      	ldr	r2, [r7, #8]
 801d086:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
  pcb->pollinterval = interval;
 801d08a:	68fb      	ldr	r3, [r7, #12]
 801d08c:	79fa      	ldrb	r2, [r7, #7]
 801d08e:	775a      	strb	r2, [r3, #29]
}
 801d090:	3710      	adds	r7, #16
 801d092:	46bd      	mov	sp, r7
 801d094:	bd80      	pop	{r7, pc}
 801d096:	bf00      	nop
 801d098:	0802f48c 	.word	0x0802f48c
 801d09c:	0802faa0 	.word	0x0802faa0
 801d0a0:	0802f4d0 	.word	0x0802f4d0
 801d0a4:	0802fab8 	.word	0x0802fab8

0801d0a8 <tcp_pcb_purge>:
 *
 * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
 */
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
 801d0a8:	b580      	push	{r7, lr}
 801d0aa:	b082      	sub	sp, #8
 801d0ac:	af00      	add	r7, sp, #0
 801d0ae:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
 801d0b0:	687b      	ldr	r3, [r7, #4]
 801d0b2:	2b00      	cmp	r3, #0
 801d0b4:	d107      	bne.n	801d0c6 <tcp_pcb_purge+0x1e>
 801d0b6:	4b21      	ldr	r3, [pc, #132]	@ (801d13c <tcp_pcb_purge+0x94>)
 801d0b8:	f640 0251 	movw	r2, #2129	@ 0x851
 801d0bc:	4920      	ldr	r1, [pc, #128]	@ (801d140 <tcp_pcb_purge+0x98>)
 801d0be:	4821      	ldr	r0, [pc, #132]	@ (801d144 <tcp_pcb_purge+0x9c>)
 801d0c0:	f00d fb4c 	bl	802a75c <iprintf>
 801d0c4:	e037      	b.n	801d136 <tcp_pcb_purge+0x8e>

  if (pcb->state != CLOSED &&
 801d0c6:	687b      	ldr	r3, [r7, #4]
 801d0c8:	7d1b      	ldrb	r3, [r3, #20]
 801d0ca:	2b00      	cmp	r3, #0
 801d0cc:	d033      	beq.n	801d136 <tcp_pcb_purge+0x8e>
      pcb->state != TIME_WAIT &&
 801d0ce:	687b      	ldr	r3, [r7, #4]
 801d0d0:	7d1b      	ldrb	r3, [r3, #20]
  if (pcb->state != CLOSED &&
 801d0d2:	2b0a      	cmp	r3, #10
 801d0d4:	d02f      	beq.n	801d136 <tcp_pcb_purge+0x8e>
      pcb->state != LISTEN) {
 801d0d6:	687b      	ldr	r3, [r7, #4]
 801d0d8:	7d1b      	ldrb	r3, [r3, #20]
      pcb->state != TIME_WAIT &&
 801d0da:	2b01      	cmp	r3, #1
 801d0dc:	d02b      	beq.n	801d136 <tcp_pcb_purge+0x8e>

    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));

    tcp_backlog_accepted(pcb);

    if (pcb->refused_data != NULL) {
 801d0de:	687b      	ldr	r3, [r7, #4]
 801d0e0:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d0e2:	2b00      	cmp	r3, #0
 801d0e4:	d007      	beq.n	801d0f6 <tcp_pcb_purge+0x4e>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
      pbuf_free(pcb->refused_data);
 801d0e6:	687b      	ldr	r3, [r7, #4]
 801d0e8:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d0ea:	4618      	mov	r0, r3
 801d0ec:	f7fe f8be 	bl	801b26c <pbuf_free>
      pcb->refused_data = NULL;
 801d0f0:	687b      	ldr	r3, [r7, #4]
 801d0f2:	2200      	movs	r2, #0
 801d0f4:	679a      	str	r2, [r3, #120]	@ 0x78
    }
    if (pcb->unacked != NULL) {
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801d0f6:	687b      	ldr	r3, [r7, #4]
 801d0f8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d0fa:	2b00      	cmp	r3, #0
 801d0fc:	d002      	beq.n	801d104 <tcp_pcb_purge+0x5c>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
      tcp_free_ooseq(pcb);
 801d0fe:	6878      	ldr	r0, [r7, #4]
 801d100:	f000 f986 	bl	801d410 <tcp_free_ooseq>
    }
#endif /* TCP_QUEUE_OOSEQ */

    /* Stop the retransmission timer as it will expect data on unacked
       queue if it fires */
    pcb->rtime = -1;
 801d104:	687b      	ldr	r3, [r7, #4]
 801d106:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d10a:	861a      	strh	r2, [r3, #48]	@ 0x30

    tcp_segs_free(pcb->unsent);
 801d10c:	687b      	ldr	r3, [r7, #4]
 801d10e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d110:	4618      	mov	r0, r3
 801d112:	f7ff fcef 	bl	801caf4 <tcp_segs_free>
    tcp_segs_free(pcb->unacked);
 801d116:	687b      	ldr	r3, [r7, #4]
 801d118:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d11a:	4618      	mov	r0, r3
 801d11c:	f7ff fcea 	bl	801caf4 <tcp_segs_free>
    pcb->unacked = pcb->unsent = NULL;
 801d120:	687b      	ldr	r3, [r7, #4]
 801d122:	2200      	movs	r2, #0
 801d124:	66da      	str	r2, [r3, #108]	@ 0x6c
 801d126:	687b      	ldr	r3, [r7, #4]
 801d128:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801d12a:	687b      	ldr	r3, [r7, #4]
 801d12c:	671a      	str	r2, [r3, #112]	@ 0x70
#if TCP_OVERSIZE
    pcb->unsent_oversize = 0;
 801d12e:	687b      	ldr	r3, [r7, #4]
 801d130:	2200      	movs	r2, #0
 801d132:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */
  }
}
 801d136:	3708      	adds	r7, #8
 801d138:	46bd      	mov	sp, r7
 801d13a:	bd80      	pop	{r7, pc}
 801d13c:	0802f48c 	.word	0x0802f48c
 801d140:	0802fad8 	.word	0x0802fad8
 801d144:	0802f4d0 	.word	0x0802f4d0

0801d148 <tcp_pcb_remove>:
 * @param pcblist PCB list to purge.
 * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
 */
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
 801d148:	b580      	push	{r7, lr}
 801d14a:	b084      	sub	sp, #16
 801d14c:	af00      	add	r7, sp, #0
 801d14e:	6078      	str	r0, [r7, #4]
 801d150:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
 801d152:	683b      	ldr	r3, [r7, #0]
 801d154:	2b00      	cmp	r3, #0
 801d156:	d106      	bne.n	801d166 <tcp_pcb_remove+0x1e>
 801d158:	4b3e      	ldr	r3, [pc, #248]	@ (801d254 <tcp_pcb_remove+0x10c>)
 801d15a:	f640 0283 	movw	r2, #2179	@ 0x883
 801d15e:	493e      	ldr	r1, [pc, #248]	@ (801d258 <tcp_pcb_remove+0x110>)
 801d160:	483e      	ldr	r0, [pc, #248]	@ (801d25c <tcp_pcb_remove+0x114>)
 801d162:	f00d fafb 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
 801d166:	687b      	ldr	r3, [r7, #4]
 801d168:	2b00      	cmp	r3, #0
 801d16a:	d106      	bne.n	801d17a <tcp_pcb_remove+0x32>
 801d16c:	4b39      	ldr	r3, [pc, #228]	@ (801d254 <tcp_pcb_remove+0x10c>)
 801d16e:	f640 0284 	movw	r2, #2180	@ 0x884
 801d172:	493b      	ldr	r1, [pc, #236]	@ (801d260 <tcp_pcb_remove+0x118>)
 801d174:	4839      	ldr	r0, [pc, #228]	@ (801d25c <tcp_pcb_remove+0x114>)
 801d176:	f00d faf1 	bl	802a75c <iprintf>

  TCP_RMV(pcblist, pcb);
 801d17a:	687b      	ldr	r3, [r7, #4]
 801d17c:	681b      	ldr	r3, [r3, #0]
 801d17e:	683a      	ldr	r2, [r7, #0]
 801d180:	429a      	cmp	r2, r3
 801d182:	d105      	bne.n	801d190 <tcp_pcb_remove+0x48>
 801d184:	687b      	ldr	r3, [r7, #4]
 801d186:	681b      	ldr	r3, [r3, #0]
 801d188:	68da      	ldr	r2, [r3, #12]
 801d18a:	687b      	ldr	r3, [r7, #4]
 801d18c:	601a      	str	r2, [r3, #0]
 801d18e:	e013      	b.n	801d1b8 <tcp_pcb_remove+0x70>
 801d190:	687b      	ldr	r3, [r7, #4]
 801d192:	681b      	ldr	r3, [r3, #0]
 801d194:	60fb      	str	r3, [r7, #12]
 801d196:	e00c      	b.n	801d1b2 <tcp_pcb_remove+0x6a>
 801d198:	68fb      	ldr	r3, [r7, #12]
 801d19a:	68db      	ldr	r3, [r3, #12]
 801d19c:	683a      	ldr	r2, [r7, #0]
 801d19e:	429a      	cmp	r2, r3
 801d1a0:	d104      	bne.n	801d1ac <tcp_pcb_remove+0x64>
 801d1a2:	683b      	ldr	r3, [r7, #0]
 801d1a4:	68da      	ldr	r2, [r3, #12]
 801d1a6:	68fb      	ldr	r3, [r7, #12]
 801d1a8:	60da      	str	r2, [r3, #12]
 801d1aa:	e005      	b.n	801d1b8 <tcp_pcb_remove+0x70>
 801d1ac:	68fb      	ldr	r3, [r7, #12]
 801d1ae:	68db      	ldr	r3, [r3, #12]
 801d1b0:	60fb      	str	r3, [r7, #12]
 801d1b2:	68fb      	ldr	r3, [r7, #12]
 801d1b4:	2b00      	cmp	r3, #0
 801d1b6:	d1ef      	bne.n	801d198 <tcp_pcb_remove+0x50>
 801d1b8:	683b      	ldr	r3, [r7, #0]
 801d1ba:	2200      	movs	r2, #0
 801d1bc:	60da      	str	r2, [r3, #12]

  tcp_pcb_purge(pcb);
 801d1be:	6838      	ldr	r0, [r7, #0]
 801d1c0:	f7ff ff72 	bl	801d0a8 <tcp_pcb_purge>

  /* if there is an outstanding delayed ACKs, send it */
  if ((pcb->state != TIME_WAIT) &&
 801d1c4:	683b      	ldr	r3, [r7, #0]
 801d1c6:	7d1b      	ldrb	r3, [r3, #20]
 801d1c8:	2b0a      	cmp	r3, #10
 801d1ca:	d013      	beq.n	801d1f4 <tcp_pcb_remove+0xac>
      (pcb->state != LISTEN) &&
 801d1cc:	683b      	ldr	r3, [r7, #0]
 801d1ce:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != TIME_WAIT) &&
 801d1d0:	2b01      	cmp	r3, #1
 801d1d2:	d00f      	beq.n	801d1f4 <tcp_pcb_remove+0xac>
      (pcb->flags & TF_ACK_DELAY)) {
 801d1d4:	683b      	ldr	r3, [r7, #0]
 801d1d6:	8b5b      	ldrh	r3, [r3, #26]
 801d1d8:	f003 0301 	and.w	r3, r3, #1
      (pcb->state != LISTEN) &&
 801d1dc:	2b00      	cmp	r3, #0
 801d1de:	d009      	beq.n	801d1f4 <tcp_pcb_remove+0xac>
    tcp_ack_now(pcb);
 801d1e0:	683b      	ldr	r3, [r7, #0]
 801d1e2:	8b5b      	ldrh	r3, [r3, #26]
 801d1e4:	f043 0302 	orr.w	r3, r3, #2
 801d1e8:	b29a      	uxth	r2, r3
 801d1ea:	683b      	ldr	r3, [r7, #0]
 801d1ec:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801d1ee:	6838      	ldr	r0, [r7, #0]
 801d1f0:	f003 fc28 	bl	8020a44 <tcp_output>
  }

  if (pcb->state != LISTEN) {
 801d1f4:	683b      	ldr	r3, [r7, #0]
 801d1f6:	7d1b      	ldrb	r3, [r3, #20]
 801d1f8:	2b01      	cmp	r3, #1
 801d1fa:	d020      	beq.n	801d23e <tcp_pcb_remove+0xf6>
    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
 801d1fc:	683b      	ldr	r3, [r7, #0]
 801d1fe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d200:	2b00      	cmp	r3, #0
 801d202:	d006      	beq.n	801d212 <tcp_pcb_remove+0xca>
 801d204:	4b13      	ldr	r3, [pc, #76]	@ (801d254 <tcp_pcb_remove+0x10c>)
 801d206:	f640 0293 	movw	r2, #2195	@ 0x893
 801d20a:	4916      	ldr	r1, [pc, #88]	@ (801d264 <tcp_pcb_remove+0x11c>)
 801d20c:	4813      	ldr	r0, [pc, #76]	@ (801d25c <tcp_pcb_remove+0x114>)
 801d20e:	f00d faa5 	bl	802a75c <iprintf>
    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
 801d212:	683b      	ldr	r3, [r7, #0]
 801d214:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d216:	2b00      	cmp	r3, #0
 801d218:	d006      	beq.n	801d228 <tcp_pcb_remove+0xe0>
 801d21a:	4b0e      	ldr	r3, [pc, #56]	@ (801d254 <tcp_pcb_remove+0x10c>)
 801d21c:	f640 0294 	movw	r2, #2196	@ 0x894
 801d220:	4911      	ldr	r1, [pc, #68]	@ (801d268 <tcp_pcb_remove+0x120>)
 801d222:	480e      	ldr	r0, [pc, #56]	@ (801d25c <tcp_pcb_remove+0x114>)
 801d224:	f00d fa9a 	bl	802a75c <iprintf>
#if TCP_QUEUE_OOSEQ
    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
 801d228:	683b      	ldr	r3, [r7, #0]
 801d22a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d22c:	2b00      	cmp	r3, #0
 801d22e:	d006      	beq.n	801d23e <tcp_pcb_remove+0xf6>
 801d230:	4b08      	ldr	r3, [pc, #32]	@ (801d254 <tcp_pcb_remove+0x10c>)
 801d232:	f640 0296 	movw	r2, #2198	@ 0x896
 801d236:	490d      	ldr	r1, [pc, #52]	@ (801d26c <tcp_pcb_remove+0x124>)
 801d238:	4808      	ldr	r0, [pc, #32]	@ (801d25c <tcp_pcb_remove+0x114>)
 801d23a:	f00d fa8f 	bl	802a75c <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
  }

  pcb->state = CLOSED;
 801d23e:	683b      	ldr	r3, [r7, #0]
 801d240:	2200      	movs	r2, #0
 801d242:	751a      	strb	r2, [r3, #20]
  /* reset the local port to prevent the pcb from being 'bound' */
  pcb->local_port = 0;
 801d244:	683b      	ldr	r3, [r7, #0]
 801d246:	2200      	movs	r2, #0
 801d248:	82da      	strh	r2, [r3, #22]

  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
 801d24a:	bf00      	nop
 801d24c:	3710      	adds	r7, #16
 801d24e:	46bd      	mov	sp, r7
 801d250:	bd80      	pop	{r7, pc}
 801d252:	bf00      	nop
 801d254:	0802f48c 	.word	0x0802f48c
 801d258:	0802faf4 	.word	0x0802faf4
 801d25c:	0802f4d0 	.word	0x0802f4d0
 801d260:	0802fb10 	.word	0x0802fb10
 801d264:	0802fb30 	.word	0x0802fb30
 801d268:	0802fb48 	.word	0x0802fb48
 801d26c:	0802fb64 	.word	0x0802fb64

0801d270 <tcp_next_iss>:
 *
 * @return u32_t pseudo random sequence number
 */
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
 801d270:	b580      	push	{r7, lr}
 801d272:	b082      	sub	sp, #8
 801d274:	af00      	add	r7, sp, #0
 801d276:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
  static u32_t iss = 6510;

  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
 801d278:	687b      	ldr	r3, [r7, #4]
 801d27a:	2b00      	cmp	r3, #0
 801d27c:	d106      	bne.n	801d28c <tcp_next_iss+0x1c>
 801d27e:	4b0a      	ldr	r3, [pc, #40]	@ (801d2a8 <tcp_next_iss+0x38>)
 801d280:	f640 02af 	movw	r2, #2223	@ 0x8af
 801d284:	4909      	ldr	r1, [pc, #36]	@ (801d2ac <tcp_next_iss+0x3c>)
 801d286:	480a      	ldr	r0, [pc, #40]	@ (801d2b0 <tcp_next_iss+0x40>)
 801d288:	f00d fa68 	bl	802a75c <iprintf>
  LWIP_UNUSED_ARG(pcb);

  iss += tcp_ticks;       /* XXX */
 801d28c:	4b09      	ldr	r3, [pc, #36]	@ (801d2b4 <tcp_next_iss+0x44>)
 801d28e:	681a      	ldr	r2, [r3, #0]
 801d290:	4b09      	ldr	r3, [pc, #36]	@ (801d2b8 <tcp_next_iss+0x48>)
 801d292:	681b      	ldr	r3, [r3, #0]
 801d294:	4413      	add	r3, r2
 801d296:	4a07      	ldr	r2, [pc, #28]	@ (801d2b4 <tcp_next_iss+0x44>)
 801d298:	6013      	str	r3, [r2, #0]
  return iss;
 801d29a:	4b06      	ldr	r3, [pc, #24]	@ (801d2b4 <tcp_next_iss+0x44>)
 801d29c:	681b      	ldr	r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
 801d29e:	4618      	mov	r0, r3
 801d2a0:	3708      	adds	r7, #8
 801d2a2:	46bd      	mov	sp, r7
 801d2a4:	bd80      	pop	{r7, pc}
 801d2a6:	bf00      	nop
 801d2a8:	0802f48c 	.word	0x0802f48c
 801d2ac:	0802fb7c 	.word	0x0802fb7c
 801d2b0:	0802f4d0 	.word	0x0802f4d0
 801d2b4:	24000050 	.word	0x24000050
 801d2b8:	2402af68 	.word	0x2402af68

0801d2bc <tcp_eff_send_mss_netif>:
 * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
 * netif (if not NULL).
 */
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
 801d2bc:	b580      	push	{r7, lr}
 801d2be:	b086      	sub	sp, #24
 801d2c0:	af00      	add	r7, sp, #0
 801d2c2:	4603      	mov	r3, r0
 801d2c4:	60b9      	str	r1, [r7, #8]
 801d2c6:	607a      	str	r2, [r7, #4]
 801d2c8:	81fb      	strh	r3, [r7, #14]
  u16_t mss_s;
  u16_t mtu;

  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */

  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
 801d2ca:	687b      	ldr	r3, [r7, #4]
 801d2cc:	2b00      	cmp	r3, #0
 801d2ce:	d106      	bne.n	801d2de <tcp_eff_send_mss_netif+0x22>
 801d2d0:	4b14      	ldr	r3, [pc, #80]	@ (801d324 <tcp_eff_send_mss_netif+0x68>)
 801d2d2:	f640 02c5 	movw	r2, #2245	@ 0x8c5
 801d2d6:	4914      	ldr	r1, [pc, #80]	@ (801d328 <tcp_eff_send_mss_netif+0x6c>)
 801d2d8:	4814      	ldr	r0, [pc, #80]	@ (801d32c <tcp_eff_send_mss_netif+0x70>)
 801d2da:	f00d fa3f 	bl	802a75c <iprintf>
  else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
  {
    if (outif == NULL) {
 801d2de:	68bb      	ldr	r3, [r7, #8]
 801d2e0:	2b00      	cmp	r3, #0
 801d2e2:	d101      	bne.n	801d2e8 <tcp_eff_send_mss_netif+0x2c>
      return sendmss;
 801d2e4:	89fb      	ldrh	r3, [r7, #14]
 801d2e6:	e019      	b.n	801d31c <tcp_eff_send_mss_netif+0x60>
    }
    mtu = outif->mtu;
 801d2e8:	68bb      	ldr	r3, [r7, #8]
 801d2ea:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801d2ec:	82fb      	strh	r3, [r7, #22]
  }
#endif /* LWIP_IPV4 */

  if (mtu != 0) {
 801d2ee:	8afb      	ldrh	r3, [r7, #22]
 801d2f0:	2b00      	cmp	r3, #0
 801d2f2:	d012      	beq.n	801d31a <tcp_eff_send_mss_netif+0x5e>
    else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    {
      offset = IP_HLEN + TCP_HLEN;
 801d2f4:	2328      	movs	r3, #40	@ 0x28
 801d2f6:	82bb      	strh	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
 801d2f8:	8afa      	ldrh	r2, [r7, #22]
 801d2fa:	8abb      	ldrh	r3, [r7, #20]
 801d2fc:	429a      	cmp	r2, r3
 801d2fe:	d904      	bls.n	801d30a <tcp_eff_send_mss_netif+0x4e>
 801d300:	8afa      	ldrh	r2, [r7, #22]
 801d302:	8abb      	ldrh	r3, [r7, #20]
 801d304:	1ad3      	subs	r3, r2, r3
 801d306:	b29b      	uxth	r3, r3
 801d308:	e000      	b.n	801d30c <tcp_eff_send_mss_netif+0x50>
 801d30a:	2300      	movs	r3, #0
 801d30c:	827b      	strh	r3, [r7, #18]
    /* RFC 1122, chap 4.2.2.6:
     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
     * We correct for TCP options in tcp_write(), and don't support IP options.
     */
    sendmss = LWIP_MIN(sendmss, mss_s);
 801d30e:	8a7a      	ldrh	r2, [r7, #18]
 801d310:	89fb      	ldrh	r3, [r7, #14]
 801d312:	4293      	cmp	r3, r2
 801d314:	bf28      	it	cs
 801d316:	4613      	movcs	r3, r2
 801d318:	81fb      	strh	r3, [r7, #14]
  }
  return sendmss;
 801d31a:	89fb      	ldrh	r3, [r7, #14]
}
 801d31c:	4618      	mov	r0, r3
 801d31e:	3718      	adds	r7, #24
 801d320:	46bd      	mov	sp, r7
 801d322:	bd80      	pop	{r7, pc}
 801d324:	0802f48c 	.word	0x0802f48c
 801d328:	0802fb98 	.word	0x0802fb98
 801d32c:	0802f4d0 	.word	0x0802f4d0

0801d330 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
 801d330:	b580      	push	{r7, lr}
 801d332:	b084      	sub	sp, #16
 801d334:	af00      	add	r7, sp, #0
 801d336:	6078      	str	r0, [r7, #4]
 801d338:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;
  pcb = pcb_list;
 801d33a:	683b      	ldr	r3, [r7, #0]
 801d33c:	60fb      	str	r3, [r7, #12]

  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
 801d33e:	687b      	ldr	r3, [r7, #4]
 801d340:	2b00      	cmp	r3, #0
 801d342:	d119      	bne.n	801d378 <tcp_netif_ip_addr_changed_pcblist+0x48>
 801d344:	4b10      	ldr	r3, [pc, #64]	@ (801d388 <tcp_netif_ip_addr_changed_pcblist+0x58>)
 801d346:	f44f 6210 	mov.w	r2, #2304	@ 0x900
 801d34a:	4910      	ldr	r1, [pc, #64]	@ (801d38c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
 801d34c:	4810      	ldr	r0, [pc, #64]	@ (801d390 <tcp_netif_ip_addr_changed_pcblist+0x60>)
 801d34e:	f00d fa05 	bl	802a75c <iprintf>

  while (pcb != NULL) {
 801d352:	e011      	b.n	801d378 <tcp_netif_ip_addr_changed_pcblist+0x48>
    /* PCB bound to current local interface address? */
    if (ip_addr_cmp(&pcb->local_ip, old_addr)
 801d354:	68fb      	ldr	r3, [r7, #12]
 801d356:	681a      	ldr	r2, [r3, #0]
 801d358:	687b      	ldr	r3, [r7, #4]
 801d35a:	681b      	ldr	r3, [r3, #0]
 801d35c:	429a      	cmp	r2, r3
 801d35e:	d108      	bne.n	801d372 <tcp_netif_ip_addr_changed_pcblist+0x42>
        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
       ) {
      /* this connection must be aborted */
      struct tcp_pcb *next = pcb->next;
 801d360:	68fb      	ldr	r3, [r7, #12]
 801d362:	68db      	ldr	r3, [r3, #12]
 801d364:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
      tcp_abort(pcb);
 801d366:	68f8      	ldr	r0, [r7, #12]
 801d368:	f7fe fd86 	bl	801be78 <tcp_abort>
      pcb = next;
 801d36c:	68bb      	ldr	r3, [r7, #8]
 801d36e:	60fb      	str	r3, [r7, #12]
 801d370:	e002      	b.n	801d378 <tcp_netif_ip_addr_changed_pcblist+0x48>
    } else {
      pcb = pcb->next;
 801d372:	68fb      	ldr	r3, [r7, #12]
 801d374:	68db      	ldr	r3, [r3, #12]
 801d376:	60fb      	str	r3, [r7, #12]
  while (pcb != NULL) {
 801d378:	68fb      	ldr	r3, [r7, #12]
 801d37a:	2b00      	cmp	r3, #0
 801d37c:	d1ea      	bne.n	801d354 <tcp_netif_ip_addr_changed_pcblist+0x24>
    }
  }
}
 801d37e:	bf00      	nop
 801d380:	bf00      	nop
 801d382:	3710      	adds	r7, #16
 801d384:	46bd      	mov	sp, r7
 801d386:	bd80      	pop	{r7, pc}
 801d388:	0802f48c 	.word	0x0802f48c
 801d38c:	0802fbc0 	.word	0x0802fbc0
 801d390:	0802f4d0 	.word	0x0802f4d0

0801d394 <tcp_netif_ip_addr_changed>:
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change or NULL if netif has been removed
 */
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801d394:	b580      	push	{r7, lr}
 801d396:	b084      	sub	sp, #16
 801d398:	af00      	add	r7, sp, #0
 801d39a:	6078      	str	r0, [r7, #4]
 801d39c:	6039      	str	r1, [r7, #0]
  struct tcp_pcb_listen *lpcb;

  if (!ip_addr_isany(old_addr)) {
 801d39e:	687b      	ldr	r3, [r7, #4]
 801d3a0:	2b00      	cmp	r3, #0
 801d3a2:	d02a      	beq.n	801d3fa <tcp_netif_ip_addr_changed+0x66>
 801d3a4:	687b      	ldr	r3, [r7, #4]
 801d3a6:	681b      	ldr	r3, [r3, #0]
 801d3a8:	2b00      	cmp	r3, #0
 801d3aa:	d026      	beq.n	801d3fa <tcp_netif_ip_addr_changed+0x66>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
 801d3ac:	4b15      	ldr	r3, [pc, #84]	@ (801d404 <tcp_netif_ip_addr_changed+0x70>)
 801d3ae:	681b      	ldr	r3, [r3, #0]
 801d3b0:	4619      	mov	r1, r3
 801d3b2:	6878      	ldr	r0, [r7, #4]
 801d3b4:	f7ff ffbc 	bl	801d330 <tcp_netif_ip_addr_changed_pcblist>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
 801d3b8:	4b13      	ldr	r3, [pc, #76]	@ (801d408 <tcp_netif_ip_addr_changed+0x74>)
 801d3ba:	681b      	ldr	r3, [r3, #0]
 801d3bc:	4619      	mov	r1, r3
 801d3be:	6878      	ldr	r0, [r7, #4]
 801d3c0:	f7ff ffb6 	bl	801d330 <tcp_netif_ip_addr_changed_pcblist>

    if (!ip_addr_isany(new_addr)) {
 801d3c4:	683b      	ldr	r3, [r7, #0]
 801d3c6:	2b00      	cmp	r3, #0
 801d3c8:	d017      	beq.n	801d3fa <tcp_netif_ip_addr_changed+0x66>
 801d3ca:	683b      	ldr	r3, [r7, #0]
 801d3cc:	681b      	ldr	r3, [r3, #0]
 801d3ce:	2b00      	cmp	r3, #0
 801d3d0:	d013      	beq.n	801d3fa <tcp_netif_ip_addr_changed+0x66>
      /* PCB bound to current local interface address? */
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d3d2:	4b0e      	ldr	r3, [pc, #56]	@ (801d40c <tcp_netif_ip_addr_changed+0x78>)
 801d3d4:	681b      	ldr	r3, [r3, #0]
 801d3d6:	60fb      	str	r3, [r7, #12]
 801d3d8:	e00c      	b.n	801d3f4 <tcp_netif_ip_addr_changed+0x60>
        /* PCB bound to current local interface address? */
        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
 801d3da:	68fb      	ldr	r3, [r7, #12]
 801d3dc:	681a      	ldr	r2, [r3, #0]
 801d3de:	687b      	ldr	r3, [r7, #4]
 801d3e0:	681b      	ldr	r3, [r3, #0]
 801d3e2:	429a      	cmp	r2, r3
 801d3e4:	d103      	bne.n	801d3ee <tcp_netif_ip_addr_changed+0x5a>
          /* The PCB is listening to the old ipaddr and
            * is set to listen to the new one instead */
          ip_addr_copy(lpcb->local_ip, *new_addr);
 801d3e6:	683b      	ldr	r3, [r7, #0]
 801d3e8:	681a      	ldr	r2, [r3, #0]
 801d3ea:	68fb      	ldr	r3, [r7, #12]
 801d3ec:	601a      	str	r2, [r3, #0]
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d3ee:	68fb      	ldr	r3, [r7, #12]
 801d3f0:	68db      	ldr	r3, [r3, #12]
 801d3f2:	60fb      	str	r3, [r7, #12]
 801d3f4:	68fb      	ldr	r3, [r7, #12]
 801d3f6:	2b00      	cmp	r3, #0
 801d3f8:	d1ef      	bne.n	801d3da <tcp_netif_ip_addr_changed+0x46>
        }
      }
    }
  }
}
 801d3fa:	bf00      	nop
 801d3fc:	3710      	adds	r7, #16
 801d3fe:	46bd      	mov	sp, r7
 801d400:	bd80      	pop	{r7, pc}
 801d402:	bf00      	nop
 801d404:	2402af74 	.word	0x2402af74
 801d408:	2402af6c 	.word	0x2402af6c
 801d40c:	2402af70 	.word	0x2402af70

0801d410 <tcp_free_ooseq>:

#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
 801d410:	b580      	push	{r7, lr}
 801d412:	b082      	sub	sp, #8
 801d414:	af00      	add	r7, sp, #0
 801d416:	6078      	str	r0, [r7, #4]
  if (pcb->ooseq) {
 801d418:	687b      	ldr	r3, [r7, #4]
 801d41a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d41c:	2b00      	cmp	r3, #0
 801d41e:	d007      	beq.n	801d430 <tcp_free_ooseq+0x20>
    tcp_segs_free(pcb->ooseq);
 801d420:	687b      	ldr	r3, [r7, #4]
 801d422:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d424:	4618      	mov	r0, r3
 801d426:	f7ff fb65 	bl	801caf4 <tcp_segs_free>
    pcb->ooseq = NULL;
 801d42a:	687b      	ldr	r3, [r7, #4]
 801d42c:	2200      	movs	r2, #0
 801d42e:	675a      	str	r2, [r3, #116]	@ 0x74
#if LWIP_TCP_SACK_OUT
    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
  }
}
 801d430:	bf00      	nop
 801d432:	3708      	adds	r7, #8
 801d434:	46bd      	mov	sp, r7
 801d436:	bd80      	pop	{r7, pc}

0801d438 <tcp_input>:
 * @param p received TCP segment to process (p->payload pointing to the TCP header)
 * @param inp network interface on which this segment was received
 */
void
tcp_input(struct pbuf *p, struct netif *inp)
{
 801d438:	b590      	push	{r4, r7, lr}
 801d43a:	b08d      	sub	sp, #52	@ 0x34
 801d43c:	af04      	add	r7, sp, #16
 801d43e:	6078      	str	r0, [r7, #4]
 801d440:	6039      	str	r1, [r7, #0]
#endif /* SO_REUSE */
  u8_t hdrlen_bytes;
  err_t err;

  LWIP_UNUSED_ARG(inp);
  LWIP_ASSERT_CORE_LOCKED();
 801d442:	f7f3 fd5d 	bl	8010f00 <sys_check_core_locking>
  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
 801d446:	687b      	ldr	r3, [r7, #4]
 801d448:	2b00      	cmp	r3, #0
 801d44a:	d105      	bne.n	801d458 <tcp_input+0x20>
 801d44c:	4b9b      	ldr	r3, [pc, #620]	@ (801d6bc <tcp_input+0x284>)
 801d44e:	2283      	movs	r2, #131	@ 0x83
 801d450:	499b      	ldr	r1, [pc, #620]	@ (801d6c0 <tcp_input+0x288>)
 801d452:	489c      	ldr	r0, [pc, #624]	@ (801d6c4 <tcp_input+0x28c>)
 801d454:	f00d f982 	bl	802a75c <iprintf>
  PERF_START;

  TCP_STATS_INC(tcp.recv);
  MIB2_STATS_INC(mib2.tcpinsegs);

  tcphdr = (struct tcp_hdr *)p->payload;
 801d458:	687b      	ldr	r3, [r7, #4]
 801d45a:	685b      	ldr	r3, [r3, #4]
 801d45c:	4a9a      	ldr	r2, [pc, #616]	@ (801d6c8 <tcp_input+0x290>)
 801d45e:	6013      	str	r3, [r2, #0]
#if TCP_INPUT_DEBUG
  tcp_debug_print(tcphdr);
#endif

  /* Check that TCP header fits in payload */
  if (p->len < TCP_HLEN) {
 801d460:	687b      	ldr	r3, [r7, #4]
 801d462:	895b      	ldrh	r3, [r3, #10]
 801d464:	2b13      	cmp	r3, #19
 801d466:	f240 83d1 	bls.w	801dc0c <tcp_input+0x7d4>
    TCP_STATS_INC(tcp.lenerr);
    goto dropped;
  }

  /* Don't even process incoming broadcasts/multicasts. */
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801d46a:	4b98      	ldr	r3, [pc, #608]	@ (801d6cc <tcp_input+0x294>)
 801d46c:	695b      	ldr	r3, [r3, #20]
 801d46e:	4a97      	ldr	r2, [pc, #604]	@ (801d6cc <tcp_input+0x294>)
 801d470:	6812      	ldr	r2, [r2, #0]
 801d472:	4611      	mov	r1, r2
 801d474:	4618      	mov	r0, r3
 801d476:	f008 fc1b 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 801d47a:	4603      	mov	r3, r0
 801d47c:	2b00      	cmp	r3, #0
 801d47e:	f040 83c7 	bne.w	801dc10 <tcp_input+0x7d8>
      ip_addr_ismulticast(ip_current_dest_addr())) {
 801d482:	4b92      	ldr	r3, [pc, #584]	@ (801d6cc <tcp_input+0x294>)
 801d484:	695b      	ldr	r3, [r3, #20]
 801d486:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801d48a:	2be0      	cmp	r3, #224	@ 0xe0
 801d48c:	f000 83c0 	beq.w	801dc10 <tcp_input+0x7d8>
    }
  }
#endif /* CHECKSUM_CHECK_TCP */

  /* sanity-check header length */
  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
 801d490:	4b8d      	ldr	r3, [pc, #564]	@ (801d6c8 <tcp_input+0x290>)
 801d492:	681b      	ldr	r3, [r3, #0]
 801d494:	899b      	ldrh	r3, [r3, #12]
 801d496:	b29b      	uxth	r3, r3
 801d498:	4618      	mov	r0, r3
 801d49a:	f7fc fa05 	bl	80198a8 <lwip_htons>
 801d49e:	4603      	mov	r3, r0
 801d4a0:	0b1b      	lsrs	r3, r3, #12
 801d4a2:	b29b      	uxth	r3, r3
 801d4a4:	b2db      	uxtb	r3, r3
 801d4a6:	009b      	lsls	r3, r3, #2
 801d4a8:	74bb      	strb	r3, [r7, #18]
  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
 801d4aa:	7cbb      	ldrb	r3, [r7, #18]
 801d4ac:	2b13      	cmp	r3, #19
 801d4ae:	f240 83b1 	bls.w	801dc14 <tcp_input+0x7dc>
 801d4b2:	7cbb      	ldrb	r3, [r7, #18]
 801d4b4:	b29a      	uxth	r2, r3
 801d4b6:	687b      	ldr	r3, [r7, #4]
 801d4b8:	891b      	ldrh	r3, [r3, #8]
 801d4ba:	429a      	cmp	r2, r3
 801d4bc:	f200 83aa 	bhi.w	801dc14 <tcp_input+0x7dc>
    goto dropped;
  }

  /* Move the payload pointer in the pbuf so that it points to the
     TCP data instead of the TCP header. */
  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
 801d4c0:	7cbb      	ldrb	r3, [r7, #18]
 801d4c2:	b29b      	uxth	r3, r3
 801d4c4:	3b14      	subs	r3, #20
 801d4c6:	b29a      	uxth	r2, r3
 801d4c8:	4b81      	ldr	r3, [pc, #516]	@ (801d6d0 <tcp_input+0x298>)
 801d4ca:	801a      	strh	r2, [r3, #0]
  tcphdr_opt2 = NULL;
 801d4cc:	4b81      	ldr	r3, [pc, #516]	@ (801d6d4 <tcp_input+0x29c>)
 801d4ce:	2200      	movs	r2, #0
 801d4d0:	601a      	str	r2, [r3, #0]
  if (p->len >= hdrlen_bytes) {
 801d4d2:	687b      	ldr	r3, [r7, #4]
 801d4d4:	895a      	ldrh	r2, [r3, #10]
 801d4d6:	7cbb      	ldrb	r3, [r7, #18]
 801d4d8:	b29b      	uxth	r3, r3
 801d4da:	429a      	cmp	r2, r3
 801d4dc:	d309      	bcc.n	801d4f2 <tcp_input+0xba>
    /* all options are in the first pbuf */
    tcphdr_opt1len = tcphdr_optlen;
 801d4de:	4b7c      	ldr	r3, [pc, #496]	@ (801d6d0 <tcp_input+0x298>)
 801d4e0:	881a      	ldrh	r2, [r3, #0]
 801d4e2:	4b7d      	ldr	r3, [pc, #500]	@ (801d6d8 <tcp_input+0x2a0>)
 801d4e4:	801a      	strh	r2, [r3, #0]
    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
 801d4e6:	7cbb      	ldrb	r3, [r7, #18]
 801d4e8:	4619      	mov	r1, r3
 801d4ea:	6878      	ldr	r0, [r7, #4]
 801d4ec:	f7fd fe06 	bl	801b0fc <pbuf_remove_header>
 801d4f0:	e04e      	b.n	801d590 <tcp_input+0x158>
  } else {
    u16_t opt2len;
    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
    LWIP_ASSERT("p->next != NULL", p->next != NULL);
 801d4f2:	687b      	ldr	r3, [r7, #4]
 801d4f4:	681b      	ldr	r3, [r3, #0]
 801d4f6:	2b00      	cmp	r3, #0
 801d4f8:	d105      	bne.n	801d506 <tcp_input+0xce>
 801d4fa:	4b70      	ldr	r3, [pc, #448]	@ (801d6bc <tcp_input+0x284>)
 801d4fc:	22c2      	movs	r2, #194	@ 0xc2
 801d4fe:	4977      	ldr	r1, [pc, #476]	@ (801d6dc <tcp_input+0x2a4>)
 801d500:	4870      	ldr	r0, [pc, #448]	@ (801d6c4 <tcp_input+0x28c>)
 801d502:	f00d f92b 	bl	802a75c <iprintf>

    /* advance over the TCP header (cannot fail) */
    pbuf_remove_header(p, TCP_HLEN);
 801d506:	2114      	movs	r1, #20
 801d508:	6878      	ldr	r0, [r7, #4]
 801d50a:	f7fd fdf7 	bl	801b0fc <pbuf_remove_header>

    /* determine how long the first and second parts of the options are */
    tcphdr_opt1len = p->len;
 801d50e:	687b      	ldr	r3, [r7, #4]
 801d510:	895a      	ldrh	r2, [r3, #10]
 801d512:	4b71      	ldr	r3, [pc, #452]	@ (801d6d8 <tcp_input+0x2a0>)
 801d514:	801a      	strh	r2, [r3, #0]
    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
 801d516:	4b6e      	ldr	r3, [pc, #440]	@ (801d6d0 <tcp_input+0x298>)
 801d518:	881a      	ldrh	r2, [r3, #0]
 801d51a:	4b6f      	ldr	r3, [pc, #444]	@ (801d6d8 <tcp_input+0x2a0>)
 801d51c:	881b      	ldrh	r3, [r3, #0]
 801d51e:	1ad3      	subs	r3, r2, r3
 801d520:	823b      	strh	r3, [r7, #16]

    /* options continue in the next pbuf: set p to zero length and hide the
        options in the next pbuf (adjusting p->tot_len) */
    pbuf_remove_header(p, tcphdr_opt1len);
 801d522:	4b6d      	ldr	r3, [pc, #436]	@ (801d6d8 <tcp_input+0x2a0>)
 801d524:	881b      	ldrh	r3, [r3, #0]
 801d526:	4619      	mov	r1, r3
 801d528:	6878      	ldr	r0, [r7, #4]
 801d52a:	f7fd fde7 	bl	801b0fc <pbuf_remove_header>

    /* check that the options fit in the second pbuf */
    if (opt2len > p->next->len) {
 801d52e:	687b      	ldr	r3, [r7, #4]
 801d530:	681b      	ldr	r3, [r3, #0]
 801d532:	895b      	ldrh	r3, [r3, #10]
 801d534:	8a3a      	ldrh	r2, [r7, #16]
 801d536:	429a      	cmp	r2, r3
 801d538:	f200 836e 	bhi.w	801dc18 <tcp_input+0x7e0>
      TCP_STATS_INC(tcp.lenerr);
      goto dropped;
    }

    /* remember the pointer to the second part of the options */
    tcphdr_opt2 = (u8_t *)p->next->payload;
 801d53c:	687b      	ldr	r3, [r7, #4]
 801d53e:	681b      	ldr	r3, [r3, #0]
 801d540:	685b      	ldr	r3, [r3, #4]
 801d542:	4a64      	ldr	r2, [pc, #400]	@ (801d6d4 <tcp_input+0x29c>)
 801d544:	6013      	str	r3, [r2, #0]

    /* advance p->next to point after the options, and manually
        adjust p->tot_len to keep it consistent with the changed p->next */
    pbuf_remove_header(p->next, opt2len);
 801d546:	687b      	ldr	r3, [r7, #4]
 801d548:	681b      	ldr	r3, [r3, #0]
 801d54a:	8a3a      	ldrh	r2, [r7, #16]
 801d54c:	4611      	mov	r1, r2
 801d54e:	4618      	mov	r0, r3
 801d550:	f7fd fdd4 	bl	801b0fc <pbuf_remove_header>
    p->tot_len = (u16_t)(p->tot_len - opt2len);
 801d554:	687b      	ldr	r3, [r7, #4]
 801d556:	891a      	ldrh	r2, [r3, #8]
 801d558:	8a3b      	ldrh	r3, [r7, #16]
 801d55a:	1ad3      	subs	r3, r2, r3
 801d55c:	b29a      	uxth	r2, r3
 801d55e:	687b      	ldr	r3, [r7, #4]
 801d560:	811a      	strh	r2, [r3, #8]

    LWIP_ASSERT("p->len == 0", p->len == 0);
 801d562:	687b      	ldr	r3, [r7, #4]
 801d564:	895b      	ldrh	r3, [r3, #10]
 801d566:	2b00      	cmp	r3, #0
 801d568:	d005      	beq.n	801d576 <tcp_input+0x13e>
 801d56a:	4b54      	ldr	r3, [pc, #336]	@ (801d6bc <tcp_input+0x284>)
 801d56c:	22df      	movs	r2, #223	@ 0xdf
 801d56e:	495c      	ldr	r1, [pc, #368]	@ (801d6e0 <tcp_input+0x2a8>)
 801d570:	4854      	ldr	r0, [pc, #336]	@ (801d6c4 <tcp_input+0x28c>)
 801d572:	f00d f8f3 	bl	802a75c <iprintf>
    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
 801d576:	687b      	ldr	r3, [r7, #4]
 801d578:	891a      	ldrh	r2, [r3, #8]
 801d57a:	687b      	ldr	r3, [r7, #4]
 801d57c:	681b      	ldr	r3, [r3, #0]
 801d57e:	891b      	ldrh	r3, [r3, #8]
 801d580:	429a      	cmp	r2, r3
 801d582:	d005      	beq.n	801d590 <tcp_input+0x158>
 801d584:	4b4d      	ldr	r3, [pc, #308]	@ (801d6bc <tcp_input+0x284>)
 801d586:	22e0      	movs	r2, #224	@ 0xe0
 801d588:	4956      	ldr	r1, [pc, #344]	@ (801d6e4 <tcp_input+0x2ac>)
 801d58a:	484e      	ldr	r0, [pc, #312]	@ (801d6c4 <tcp_input+0x28c>)
 801d58c:	f00d f8e6 	bl	802a75c <iprintf>
  }

  /* Convert fields in TCP header to host byte order. */
  tcphdr->src = lwip_ntohs(tcphdr->src);
 801d590:	4b4d      	ldr	r3, [pc, #308]	@ (801d6c8 <tcp_input+0x290>)
 801d592:	681b      	ldr	r3, [r3, #0]
 801d594:	881b      	ldrh	r3, [r3, #0]
 801d596:	b29b      	uxth	r3, r3
 801d598:	4a4b      	ldr	r2, [pc, #300]	@ (801d6c8 <tcp_input+0x290>)
 801d59a:	6814      	ldr	r4, [r2, #0]
 801d59c:	4618      	mov	r0, r3
 801d59e:	f7fc f983 	bl	80198a8 <lwip_htons>
 801d5a2:	4603      	mov	r3, r0
 801d5a4:	8023      	strh	r3, [r4, #0]
  tcphdr->dest = lwip_ntohs(tcphdr->dest);
 801d5a6:	4b48      	ldr	r3, [pc, #288]	@ (801d6c8 <tcp_input+0x290>)
 801d5a8:	681b      	ldr	r3, [r3, #0]
 801d5aa:	885b      	ldrh	r3, [r3, #2]
 801d5ac:	b29b      	uxth	r3, r3
 801d5ae:	4a46      	ldr	r2, [pc, #280]	@ (801d6c8 <tcp_input+0x290>)
 801d5b0:	6814      	ldr	r4, [r2, #0]
 801d5b2:	4618      	mov	r0, r3
 801d5b4:	f7fc f978 	bl	80198a8 <lwip_htons>
 801d5b8:	4603      	mov	r3, r0
 801d5ba:	8063      	strh	r3, [r4, #2]
  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
 801d5bc:	4b42      	ldr	r3, [pc, #264]	@ (801d6c8 <tcp_input+0x290>)
 801d5be:	681b      	ldr	r3, [r3, #0]
 801d5c0:	685b      	ldr	r3, [r3, #4]
 801d5c2:	4a41      	ldr	r2, [pc, #260]	@ (801d6c8 <tcp_input+0x290>)
 801d5c4:	6814      	ldr	r4, [r2, #0]
 801d5c6:	4618      	mov	r0, r3
 801d5c8:	f7fc f983 	bl	80198d2 <lwip_htonl>
 801d5cc:	4603      	mov	r3, r0
 801d5ce:	6063      	str	r3, [r4, #4]
 801d5d0:	6863      	ldr	r3, [r4, #4]
 801d5d2:	4a45      	ldr	r2, [pc, #276]	@ (801d6e8 <tcp_input+0x2b0>)
 801d5d4:	6013      	str	r3, [r2, #0]
  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
 801d5d6:	4b3c      	ldr	r3, [pc, #240]	@ (801d6c8 <tcp_input+0x290>)
 801d5d8:	681b      	ldr	r3, [r3, #0]
 801d5da:	689b      	ldr	r3, [r3, #8]
 801d5dc:	4a3a      	ldr	r2, [pc, #232]	@ (801d6c8 <tcp_input+0x290>)
 801d5de:	6814      	ldr	r4, [r2, #0]
 801d5e0:	4618      	mov	r0, r3
 801d5e2:	f7fc f976 	bl	80198d2 <lwip_htonl>
 801d5e6:	4603      	mov	r3, r0
 801d5e8:	60a3      	str	r3, [r4, #8]
 801d5ea:	68a3      	ldr	r3, [r4, #8]
 801d5ec:	4a3f      	ldr	r2, [pc, #252]	@ (801d6ec <tcp_input+0x2b4>)
 801d5ee:	6013      	str	r3, [r2, #0]
  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
 801d5f0:	4b35      	ldr	r3, [pc, #212]	@ (801d6c8 <tcp_input+0x290>)
 801d5f2:	681b      	ldr	r3, [r3, #0]
 801d5f4:	89db      	ldrh	r3, [r3, #14]
 801d5f6:	b29b      	uxth	r3, r3
 801d5f8:	4a33      	ldr	r2, [pc, #204]	@ (801d6c8 <tcp_input+0x290>)
 801d5fa:	6814      	ldr	r4, [r2, #0]
 801d5fc:	4618      	mov	r0, r3
 801d5fe:	f7fc f953 	bl	80198a8 <lwip_htons>
 801d602:	4603      	mov	r3, r0
 801d604:	81e3      	strh	r3, [r4, #14]

  flags = TCPH_FLAGS(tcphdr);
 801d606:	4b30      	ldr	r3, [pc, #192]	@ (801d6c8 <tcp_input+0x290>)
 801d608:	681b      	ldr	r3, [r3, #0]
 801d60a:	899b      	ldrh	r3, [r3, #12]
 801d60c:	b29b      	uxth	r3, r3
 801d60e:	4618      	mov	r0, r3
 801d610:	f7fc f94a 	bl	80198a8 <lwip_htons>
 801d614:	4603      	mov	r3, r0
 801d616:	b2db      	uxtb	r3, r3
 801d618:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801d61c:	b2da      	uxtb	r2, r3
 801d61e:	4b34      	ldr	r3, [pc, #208]	@ (801d6f0 <tcp_input+0x2b8>)
 801d620:	701a      	strb	r2, [r3, #0]
  tcplen = p->tot_len;
 801d622:	687b      	ldr	r3, [r7, #4]
 801d624:	891a      	ldrh	r2, [r3, #8]
 801d626:	4b33      	ldr	r3, [pc, #204]	@ (801d6f4 <tcp_input+0x2bc>)
 801d628:	801a      	strh	r2, [r3, #0]
  if (flags & (TCP_FIN | TCP_SYN)) {
 801d62a:	4b31      	ldr	r3, [pc, #196]	@ (801d6f0 <tcp_input+0x2b8>)
 801d62c:	781b      	ldrb	r3, [r3, #0]
 801d62e:	f003 0303 	and.w	r3, r3, #3
 801d632:	2b00      	cmp	r3, #0
 801d634:	d00c      	beq.n	801d650 <tcp_input+0x218>
    tcplen++;
 801d636:	4b2f      	ldr	r3, [pc, #188]	@ (801d6f4 <tcp_input+0x2bc>)
 801d638:	881b      	ldrh	r3, [r3, #0]
 801d63a:	3301      	adds	r3, #1
 801d63c:	b29a      	uxth	r2, r3
 801d63e:	4b2d      	ldr	r3, [pc, #180]	@ (801d6f4 <tcp_input+0x2bc>)
 801d640:	801a      	strh	r2, [r3, #0]
    if (tcplen < p->tot_len) {
 801d642:	687b      	ldr	r3, [r7, #4]
 801d644:	891a      	ldrh	r2, [r3, #8]
 801d646:	4b2b      	ldr	r3, [pc, #172]	@ (801d6f4 <tcp_input+0x2bc>)
 801d648:	881b      	ldrh	r3, [r3, #0]
 801d64a:	429a      	cmp	r2, r3
 801d64c:	f200 82e6 	bhi.w	801dc1c <tcp_input+0x7e4>
    }
  }

  /* Demultiplex an incoming segment. First, we check if it is destined
     for an active connection. */
  prev = NULL;
 801d650:	2300      	movs	r3, #0
 801d652:	61fb      	str	r3, [r7, #28]

  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d654:	4b28      	ldr	r3, [pc, #160]	@ (801d6f8 <tcp_input+0x2c0>)
 801d656:	681b      	ldr	r3, [r3, #0]
 801d658:	61bb      	str	r3, [r7, #24]
 801d65a:	e09d      	b.n	801d798 <tcp_input+0x360>
    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
 801d65c:	69bb      	ldr	r3, [r7, #24]
 801d65e:	7d1b      	ldrb	r3, [r3, #20]
 801d660:	2b00      	cmp	r3, #0
 801d662:	d105      	bne.n	801d670 <tcp_input+0x238>
 801d664:	4b15      	ldr	r3, [pc, #84]	@ (801d6bc <tcp_input+0x284>)
 801d666:	22fb      	movs	r2, #251	@ 0xfb
 801d668:	4924      	ldr	r1, [pc, #144]	@ (801d6fc <tcp_input+0x2c4>)
 801d66a:	4816      	ldr	r0, [pc, #88]	@ (801d6c4 <tcp_input+0x28c>)
 801d66c:	f00d f876 	bl	802a75c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
 801d670:	69bb      	ldr	r3, [r7, #24]
 801d672:	7d1b      	ldrb	r3, [r3, #20]
 801d674:	2b0a      	cmp	r3, #10
 801d676:	d105      	bne.n	801d684 <tcp_input+0x24c>
 801d678:	4b10      	ldr	r3, [pc, #64]	@ (801d6bc <tcp_input+0x284>)
 801d67a:	22fc      	movs	r2, #252	@ 0xfc
 801d67c:	4920      	ldr	r1, [pc, #128]	@ (801d700 <tcp_input+0x2c8>)
 801d67e:	4811      	ldr	r0, [pc, #68]	@ (801d6c4 <tcp_input+0x28c>)
 801d680:	f00d f86c 	bl	802a75c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
 801d684:	69bb      	ldr	r3, [r7, #24]
 801d686:	7d1b      	ldrb	r3, [r3, #20]
 801d688:	2b01      	cmp	r3, #1
 801d68a:	d105      	bne.n	801d698 <tcp_input+0x260>
 801d68c:	4b0b      	ldr	r3, [pc, #44]	@ (801d6bc <tcp_input+0x284>)
 801d68e:	22fd      	movs	r2, #253	@ 0xfd
 801d690:	491c      	ldr	r1, [pc, #112]	@ (801d704 <tcp_input+0x2cc>)
 801d692:	480c      	ldr	r0, [pc, #48]	@ (801d6c4 <tcp_input+0x28c>)
 801d694:	f00d f862 	bl	802a75c <iprintf>

    /* check if PCB is bound to specific netif */
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d698:	69bb      	ldr	r3, [r7, #24]
 801d69a:	7a1b      	ldrb	r3, [r3, #8]
 801d69c:	2b00      	cmp	r3, #0
 801d69e:	d033      	beq.n	801d708 <tcp_input+0x2d0>
        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d6a0:	69bb      	ldr	r3, [r7, #24]
 801d6a2:	7a1a      	ldrb	r2, [r3, #8]
 801d6a4:	4b09      	ldr	r3, [pc, #36]	@ (801d6cc <tcp_input+0x294>)
 801d6a6:	685b      	ldr	r3, [r3, #4]
 801d6a8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d6ac:	3301      	adds	r3, #1
 801d6ae:	b2db      	uxtb	r3, r3
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d6b0:	429a      	cmp	r2, r3
 801d6b2:	d029      	beq.n	801d708 <tcp_input+0x2d0>
      prev = pcb;
 801d6b4:	69bb      	ldr	r3, [r7, #24]
 801d6b6:	61fb      	str	r3, [r7, #28]
      continue;
 801d6b8:	e06b      	b.n	801d792 <tcp_input+0x35a>
 801d6ba:	bf00      	nop
 801d6bc:	0802fbf4 	.word	0x0802fbf4
 801d6c0:	0802fc28 	.word	0x0802fc28
 801d6c4:	0802fc40 	.word	0x0802fc40
 801d6c8:	2402af94 	.word	0x2402af94
 801d6cc:	24024418 	.word	0x24024418
 801d6d0:	2402af98 	.word	0x2402af98
 801d6d4:	2402af9c 	.word	0x2402af9c
 801d6d8:	2402af9a 	.word	0x2402af9a
 801d6dc:	0802fc68 	.word	0x0802fc68
 801d6e0:	0802fc78 	.word	0x0802fc78
 801d6e4:	0802fc84 	.word	0x0802fc84
 801d6e8:	2402afa4 	.word	0x2402afa4
 801d6ec:	2402afa8 	.word	0x2402afa8
 801d6f0:	2402afb0 	.word	0x2402afb0
 801d6f4:	2402afae 	.word	0x2402afae
 801d6f8:	2402af74 	.word	0x2402af74
 801d6fc:	0802fca4 	.word	0x0802fca4
 801d700:	0802fccc 	.word	0x0802fccc
 801d704:	0802fcf8 	.word	0x0802fcf8
    }

    if (pcb->remote_port == tcphdr->src &&
 801d708:	69bb      	ldr	r3, [r7, #24]
 801d70a:	8b1a      	ldrh	r2, [r3, #24]
 801d70c:	4b72      	ldr	r3, [pc, #456]	@ (801d8d8 <tcp_input+0x4a0>)
 801d70e:	681b      	ldr	r3, [r3, #0]
 801d710:	881b      	ldrh	r3, [r3, #0]
 801d712:	b29b      	uxth	r3, r3
 801d714:	429a      	cmp	r2, r3
 801d716:	d13a      	bne.n	801d78e <tcp_input+0x356>
        pcb->local_port == tcphdr->dest &&
 801d718:	69bb      	ldr	r3, [r7, #24]
 801d71a:	8ada      	ldrh	r2, [r3, #22]
 801d71c:	4b6e      	ldr	r3, [pc, #440]	@ (801d8d8 <tcp_input+0x4a0>)
 801d71e:	681b      	ldr	r3, [r3, #0]
 801d720:	885b      	ldrh	r3, [r3, #2]
 801d722:	b29b      	uxth	r3, r3
    if (pcb->remote_port == tcphdr->src &&
 801d724:	429a      	cmp	r2, r3
 801d726:	d132      	bne.n	801d78e <tcp_input+0x356>
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d728:	69bb      	ldr	r3, [r7, #24]
 801d72a:	685a      	ldr	r2, [r3, #4]
 801d72c:	4b6b      	ldr	r3, [pc, #428]	@ (801d8dc <tcp_input+0x4a4>)
 801d72e:	691b      	ldr	r3, [r3, #16]
        pcb->local_port == tcphdr->dest &&
 801d730:	429a      	cmp	r2, r3
 801d732:	d12c      	bne.n	801d78e <tcp_input+0x356>
        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801d734:	69bb      	ldr	r3, [r7, #24]
 801d736:	681a      	ldr	r2, [r3, #0]
 801d738:	4b68      	ldr	r3, [pc, #416]	@ (801d8dc <tcp_input+0x4a4>)
 801d73a:	695b      	ldr	r3, [r3, #20]
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d73c:	429a      	cmp	r2, r3
 801d73e:	d126      	bne.n	801d78e <tcp_input+0x356>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
 801d740:	69bb      	ldr	r3, [r7, #24]
 801d742:	68db      	ldr	r3, [r3, #12]
 801d744:	69ba      	ldr	r2, [r7, #24]
 801d746:	429a      	cmp	r2, r3
 801d748:	d106      	bne.n	801d758 <tcp_input+0x320>
 801d74a:	4b65      	ldr	r3, [pc, #404]	@ (801d8e0 <tcp_input+0x4a8>)
 801d74c:	f240 120d 	movw	r2, #269	@ 0x10d
 801d750:	4964      	ldr	r1, [pc, #400]	@ (801d8e4 <tcp_input+0x4ac>)
 801d752:	4865      	ldr	r0, [pc, #404]	@ (801d8e8 <tcp_input+0x4b0>)
 801d754:	f00d f802 	bl	802a75c <iprintf>
      if (prev != NULL) {
 801d758:	69fb      	ldr	r3, [r7, #28]
 801d75a:	2b00      	cmp	r3, #0
 801d75c:	d00a      	beq.n	801d774 <tcp_input+0x33c>
        prev->next = pcb->next;
 801d75e:	69bb      	ldr	r3, [r7, #24]
 801d760:	68da      	ldr	r2, [r3, #12]
 801d762:	69fb      	ldr	r3, [r7, #28]
 801d764:	60da      	str	r2, [r3, #12]
        pcb->next = tcp_active_pcbs;
 801d766:	4b61      	ldr	r3, [pc, #388]	@ (801d8ec <tcp_input+0x4b4>)
 801d768:	681a      	ldr	r2, [r3, #0]
 801d76a:	69bb      	ldr	r3, [r7, #24]
 801d76c:	60da      	str	r2, [r3, #12]
        tcp_active_pcbs = pcb;
 801d76e:	4a5f      	ldr	r2, [pc, #380]	@ (801d8ec <tcp_input+0x4b4>)
 801d770:	69bb      	ldr	r3, [r7, #24]
 801d772:	6013      	str	r3, [r2, #0]
      } else {
        TCP_STATS_INC(tcp.cachehit);
      }
      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
 801d774:	69bb      	ldr	r3, [r7, #24]
 801d776:	68db      	ldr	r3, [r3, #12]
 801d778:	69ba      	ldr	r2, [r7, #24]
 801d77a:	429a      	cmp	r2, r3
 801d77c:	d111      	bne.n	801d7a2 <tcp_input+0x36a>
 801d77e:	4b58      	ldr	r3, [pc, #352]	@ (801d8e0 <tcp_input+0x4a8>)
 801d780:	f240 1215 	movw	r2, #277	@ 0x115
 801d784:	495a      	ldr	r1, [pc, #360]	@ (801d8f0 <tcp_input+0x4b8>)
 801d786:	4858      	ldr	r0, [pc, #352]	@ (801d8e8 <tcp_input+0x4b0>)
 801d788:	f00c ffe8 	bl	802a75c <iprintf>
      break;
 801d78c:	e009      	b.n	801d7a2 <tcp_input+0x36a>
    }
    prev = pcb;
 801d78e:	69bb      	ldr	r3, [r7, #24]
 801d790:	61fb      	str	r3, [r7, #28]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d792:	69bb      	ldr	r3, [r7, #24]
 801d794:	68db      	ldr	r3, [r3, #12]
 801d796:	61bb      	str	r3, [r7, #24]
 801d798:	69bb      	ldr	r3, [r7, #24]
 801d79a:	2b00      	cmp	r3, #0
 801d79c:	f47f af5e 	bne.w	801d65c <tcp_input+0x224>
 801d7a0:	e000      	b.n	801d7a4 <tcp_input+0x36c>
      break;
 801d7a2:	bf00      	nop
  }

  if (pcb == NULL) {
 801d7a4:	69bb      	ldr	r3, [r7, #24]
 801d7a6:	2b00      	cmp	r3, #0
 801d7a8:	f040 80aa 	bne.w	801d900 <tcp_input+0x4c8>
    /* If it did not go to an active connection, we check the connections
       in the TIME-WAIT state. */
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d7ac:	4b51      	ldr	r3, [pc, #324]	@ (801d8f4 <tcp_input+0x4bc>)
 801d7ae:	681b      	ldr	r3, [r3, #0]
 801d7b0:	61bb      	str	r3, [r7, #24]
 801d7b2:	e03f      	b.n	801d834 <tcp_input+0x3fc>
      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801d7b4:	69bb      	ldr	r3, [r7, #24]
 801d7b6:	7d1b      	ldrb	r3, [r3, #20]
 801d7b8:	2b0a      	cmp	r3, #10
 801d7ba:	d006      	beq.n	801d7ca <tcp_input+0x392>
 801d7bc:	4b48      	ldr	r3, [pc, #288]	@ (801d8e0 <tcp_input+0x4a8>)
 801d7be:	f240 121f 	movw	r2, #287	@ 0x11f
 801d7c2:	494d      	ldr	r1, [pc, #308]	@ (801d8f8 <tcp_input+0x4c0>)
 801d7c4:	4848      	ldr	r0, [pc, #288]	@ (801d8e8 <tcp_input+0x4b0>)
 801d7c6:	f00c ffc9 	bl	802a75c <iprintf>

      /* check if PCB is bound to specific netif */
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d7ca:	69bb      	ldr	r3, [r7, #24]
 801d7cc:	7a1b      	ldrb	r3, [r3, #8]
 801d7ce:	2b00      	cmp	r3, #0
 801d7d0:	d009      	beq.n	801d7e6 <tcp_input+0x3ae>
          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d7d2:	69bb      	ldr	r3, [r7, #24]
 801d7d4:	7a1a      	ldrb	r2, [r3, #8]
 801d7d6:	4b41      	ldr	r3, [pc, #260]	@ (801d8dc <tcp_input+0x4a4>)
 801d7d8:	685b      	ldr	r3, [r3, #4]
 801d7da:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d7de:	3301      	adds	r3, #1
 801d7e0:	b2db      	uxtb	r3, r3
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d7e2:	429a      	cmp	r2, r3
 801d7e4:	d122      	bne.n	801d82c <tcp_input+0x3f4>
        continue;
      }

      if (pcb->remote_port == tcphdr->src &&
 801d7e6:	69bb      	ldr	r3, [r7, #24]
 801d7e8:	8b1a      	ldrh	r2, [r3, #24]
 801d7ea:	4b3b      	ldr	r3, [pc, #236]	@ (801d8d8 <tcp_input+0x4a0>)
 801d7ec:	681b      	ldr	r3, [r3, #0]
 801d7ee:	881b      	ldrh	r3, [r3, #0]
 801d7f0:	b29b      	uxth	r3, r3
 801d7f2:	429a      	cmp	r2, r3
 801d7f4:	d11b      	bne.n	801d82e <tcp_input+0x3f6>
          pcb->local_port == tcphdr->dest &&
 801d7f6:	69bb      	ldr	r3, [r7, #24]
 801d7f8:	8ada      	ldrh	r2, [r3, #22]
 801d7fa:	4b37      	ldr	r3, [pc, #220]	@ (801d8d8 <tcp_input+0x4a0>)
 801d7fc:	681b      	ldr	r3, [r3, #0]
 801d7fe:	885b      	ldrh	r3, [r3, #2]
 801d800:	b29b      	uxth	r3, r3
      if (pcb->remote_port == tcphdr->src &&
 801d802:	429a      	cmp	r2, r3
 801d804:	d113      	bne.n	801d82e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d806:	69bb      	ldr	r3, [r7, #24]
 801d808:	685a      	ldr	r2, [r3, #4]
 801d80a:	4b34      	ldr	r3, [pc, #208]	@ (801d8dc <tcp_input+0x4a4>)
 801d80c:	691b      	ldr	r3, [r3, #16]
          pcb->local_port == tcphdr->dest &&
 801d80e:	429a      	cmp	r2, r3
 801d810:	d10d      	bne.n	801d82e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801d812:	69bb      	ldr	r3, [r7, #24]
 801d814:	681a      	ldr	r2, [r3, #0]
 801d816:	4b31      	ldr	r3, [pc, #196]	@ (801d8dc <tcp_input+0x4a4>)
 801d818:	695b      	ldr	r3, [r3, #20]
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801d81a:	429a      	cmp	r2, r3
 801d81c:	d107      	bne.n	801d82e <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
                                       tcphdr_opt2, p) == ERR_OK)
#endif
        {
          tcp_timewait_input(pcb);
 801d81e:	69b8      	ldr	r0, [r7, #24]
 801d820:	f000 fb56 	bl	801ded0 <tcp_timewait_input>
        }
        pbuf_free(p);
 801d824:	6878      	ldr	r0, [r7, #4]
 801d826:	f7fd fd21 	bl	801b26c <pbuf_free>
        return;
 801d82a:	e1fd      	b.n	801dc28 <tcp_input+0x7f0>
        continue;
 801d82c:	bf00      	nop
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d82e:	69bb      	ldr	r3, [r7, #24]
 801d830:	68db      	ldr	r3, [r3, #12]
 801d832:	61bb      	str	r3, [r7, #24]
 801d834:	69bb      	ldr	r3, [r7, #24]
 801d836:	2b00      	cmp	r3, #0
 801d838:	d1bc      	bne.n	801d7b4 <tcp_input+0x37c>
      }
    }

    /* Finally, if we still did not get a match, we check all PCBs that
       are LISTENing for incoming connections. */
    prev = NULL;
 801d83a:	2300      	movs	r3, #0
 801d83c:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d83e:	4b2f      	ldr	r3, [pc, #188]	@ (801d8fc <tcp_input+0x4c4>)
 801d840:	681b      	ldr	r3, [r3, #0]
 801d842:	617b      	str	r3, [r7, #20]
 801d844:	e02a      	b.n	801d89c <tcp_input+0x464>
      /* check if PCB is bound to specific netif */
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801d846:	697b      	ldr	r3, [r7, #20]
 801d848:	7a1b      	ldrb	r3, [r3, #8]
 801d84a:	2b00      	cmp	r3, #0
 801d84c:	d00c      	beq.n	801d868 <tcp_input+0x430>
          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d84e:	697b      	ldr	r3, [r7, #20]
 801d850:	7a1a      	ldrb	r2, [r3, #8]
 801d852:	4b22      	ldr	r3, [pc, #136]	@ (801d8dc <tcp_input+0x4a4>)
 801d854:	685b      	ldr	r3, [r3, #4]
 801d856:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d85a:	3301      	adds	r3, #1
 801d85c:	b2db      	uxtb	r3, r3
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801d85e:	429a      	cmp	r2, r3
 801d860:	d002      	beq.n	801d868 <tcp_input+0x430>
        prev = (struct tcp_pcb *)lpcb;
 801d862:	697b      	ldr	r3, [r7, #20]
 801d864:	61fb      	str	r3, [r7, #28]
        continue;
 801d866:	e016      	b.n	801d896 <tcp_input+0x45e>
      }

      if (lpcb->local_port == tcphdr->dest) {
 801d868:	697b      	ldr	r3, [r7, #20]
 801d86a:	8ada      	ldrh	r2, [r3, #22]
 801d86c:	4b1a      	ldr	r3, [pc, #104]	@ (801d8d8 <tcp_input+0x4a0>)
 801d86e:	681b      	ldr	r3, [r3, #0]
 801d870:	885b      	ldrh	r3, [r3, #2]
 801d872:	b29b      	uxth	r3, r3
 801d874:	429a      	cmp	r2, r3
 801d876:	d10c      	bne.n	801d892 <tcp_input+0x45a>
          lpcb_prev = prev;
#else /* SO_REUSE */
          break;
#endif /* SO_REUSE */
        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
 801d878:	697b      	ldr	r3, [r7, #20]
 801d87a:	681a      	ldr	r2, [r3, #0]
 801d87c:	4b17      	ldr	r3, [pc, #92]	@ (801d8dc <tcp_input+0x4a4>)
 801d87e:	695b      	ldr	r3, [r3, #20]
 801d880:	429a      	cmp	r2, r3
 801d882:	d00f      	beq.n	801d8a4 <tcp_input+0x46c>
            /* found an exact match */
            break;
          } else if (ip_addr_isany(&lpcb->local_ip)) {
 801d884:	697b      	ldr	r3, [r7, #20]
 801d886:	2b00      	cmp	r3, #0
 801d888:	d00d      	beq.n	801d8a6 <tcp_input+0x46e>
 801d88a:	697b      	ldr	r3, [r7, #20]
 801d88c:	681b      	ldr	r3, [r3, #0]
 801d88e:	2b00      	cmp	r3, #0
 801d890:	d009      	beq.n	801d8a6 <tcp_input+0x46e>
            break;
#endif /* SO_REUSE */
          }
        }
      }
      prev = (struct tcp_pcb *)lpcb;
 801d892:	697b      	ldr	r3, [r7, #20]
 801d894:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d896:	697b      	ldr	r3, [r7, #20]
 801d898:	68db      	ldr	r3, [r3, #12]
 801d89a:	617b      	str	r3, [r7, #20]
 801d89c:	697b      	ldr	r3, [r7, #20]
 801d89e:	2b00      	cmp	r3, #0
 801d8a0:	d1d1      	bne.n	801d846 <tcp_input+0x40e>
 801d8a2:	e000      	b.n	801d8a6 <tcp_input+0x46e>
            break;
 801d8a4:	bf00      	nop
      /* only pass to ANY if no specific local IP has been found */
      lpcb = lpcb_any;
      prev = lpcb_prev;
    }
#endif /* SO_REUSE */
    if (lpcb != NULL) {
 801d8a6:	697b      	ldr	r3, [r7, #20]
 801d8a8:	2b00      	cmp	r3, #0
 801d8aa:	d029      	beq.n	801d900 <tcp_input+0x4c8>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      if (prev != NULL) {
 801d8ac:	69fb      	ldr	r3, [r7, #28]
 801d8ae:	2b00      	cmp	r3, #0
 801d8b0:	d00a      	beq.n	801d8c8 <tcp_input+0x490>
        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
 801d8b2:	697b      	ldr	r3, [r7, #20]
 801d8b4:	68da      	ldr	r2, [r3, #12]
 801d8b6:	69fb      	ldr	r3, [r7, #28]
 801d8b8:	60da      	str	r2, [r3, #12]
        /* our successor is the remainder of the listening list */
        lpcb->next = tcp_listen_pcbs.listen_pcbs;
 801d8ba:	4b10      	ldr	r3, [pc, #64]	@ (801d8fc <tcp_input+0x4c4>)
 801d8bc:	681a      	ldr	r2, [r3, #0]
 801d8be:	697b      	ldr	r3, [r7, #20]
 801d8c0:	60da      	str	r2, [r3, #12]
        /* put this listening pcb at the head of the listening list */
        tcp_listen_pcbs.listen_pcbs = lpcb;
 801d8c2:	4a0e      	ldr	r2, [pc, #56]	@ (801d8fc <tcp_input+0x4c4>)
 801d8c4:	697b      	ldr	r3, [r7, #20]
 801d8c6:	6013      	str	r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
      {
        tcp_listen_input(lpcb);
 801d8c8:	6978      	ldr	r0, [r7, #20]
 801d8ca:	f000 fa03 	bl	801dcd4 <tcp_listen_input>
      }
      pbuf_free(p);
 801d8ce:	6878      	ldr	r0, [r7, #4]
 801d8d0:	f7fd fccc 	bl	801b26c <pbuf_free>
      return;
 801d8d4:	e1a8      	b.n	801dc28 <tcp_input+0x7f0>
 801d8d6:	bf00      	nop
 801d8d8:	2402af94 	.word	0x2402af94
 801d8dc:	24024418 	.word	0x24024418
 801d8e0:	0802fbf4 	.word	0x0802fbf4
 801d8e4:	0802fd20 	.word	0x0802fd20
 801d8e8:	0802fc40 	.word	0x0802fc40
 801d8ec:	2402af74 	.word	0x2402af74
 801d8f0:	0802fd4c 	.word	0x0802fd4c
 801d8f4:	2402af78 	.word	0x2402af78
 801d8f8:	0802fd78 	.word	0x0802fd78
 801d8fc:	2402af70 	.word	0x2402af70
      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
    pbuf_free(p);
    return;
  }
#endif
  if (pcb != NULL) {
 801d900:	69bb      	ldr	r3, [r7, #24]
 801d902:	2b00      	cmp	r3, #0
 801d904:	f000 8158 	beq.w	801dbb8 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
    tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */

    /* Set up a tcp_seg structure. */
    inseg.next = NULL;
 801d908:	4b95      	ldr	r3, [pc, #596]	@ (801db60 <tcp_input+0x728>)
 801d90a:	2200      	movs	r2, #0
 801d90c:	601a      	str	r2, [r3, #0]
    inseg.len = p->tot_len;
 801d90e:	687b      	ldr	r3, [r7, #4]
 801d910:	891a      	ldrh	r2, [r3, #8]
 801d912:	4b93      	ldr	r3, [pc, #588]	@ (801db60 <tcp_input+0x728>)
 801d914:	811a      	strh	r2, [r3, #8]
    inseg.p = p;
 801d916:	4a92      	ldr	r2, [pc, #584]	@ (801db60 <tcp_input+0x728>)
 801d918:	687b      	ldr	r3, [r7, #4]
 801d91a:	6053      	str	r3, [r2, #4]
    inseg.tcphdr = tcphdr;
 801d91c:	4b91      	ldr	r3, [pc, #580]	@ (801db64 <tcp_input+0x72c>)
 801d91e:	681b      	ldr	r3, [r3, #0]
 801d920:	4a8f      	ldr	r2, [pc, #572]	@ (801db60 <tcp_input+0x728>)
 801d922:	6113      	str	r3, [r2, #16]

    recv_data = NULL;
 801d924:	4b90      	ldr	r3, [pc, #576]	@ (801db68 <tcp_input+0x730>)
 801d926:	2200      	movs	r2, #0
 801d928:	601a      	str	r2, [r3, #0]
    recv_flags = 0;
 801d92a:	4b90      	ldr	r3, [pc, #576]	@ (801db6c <tcp_input+0x734>)
 801d92c:	2200      	movs	r2, #0
 801d92e:	701a      	strb	r2, [r3, #0]
    recv_acked = 0;
 801d930:	4b8f      	ldr	r3, [pc, #572]	@ (801db70 <tcp_input+0x738>)
 801d932:	2200      	movs	r2, #0
 801d934:	801a      	strh	r2, [r3, #0]

    if (flags & TCP_PSH) {
 801d936:	4b8f      	ldr	r3, [pc, #572]	@ (801db74 <tcp_input+0x73c>)
 801d938:	781b      	ldrb	r3, [r3, #0]
 801d93a:	f003 0308 	and.w	r3, r3, #8
 801d93e:	2b00      	cmp	r3, #0
 801d940:	d006      	beq.n	801d950 <tcp_input+0x518>
      p->flags |= PBUF_FLAG_PUSH;
 801d942:	687b      	ldr	r3, [r7, #4]
 801d944:	7b5b      	ldrb	r3, [r3, #13]
 801d946:	f043 0301 	orr.w	r3, r3, #1
 801d94a:	b2da      	uxtb	r2, r3
 801d94c:	687b      	ldr	r3, [r7, #4]
 801d94e:	735a      	strb	r2, [r3, #13]
    }

    /* If there is data which was previously "refused" by upper layer */
    if (pcb->refused_data != NULL) {
 801d950:	69bb      	ldr	r3, [r7, #24]
 801d952:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d954:	2b00      	cmp	r3, #0
 801d956:	d017      	beq.n	801d988 <tcp_input+0x550>
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801d958:	69b8      	ldr	r0, [r7, #24]
 801d95a:	f7ff f84d 	bl	801c9f8 <tcp_process_refused_data>
 801d95e:	4603      	mov	r3, r0
 801d960:	f113 0f0d 	cmn.w	r3, #13
 801d964:	d007      	beq.n	801d976 <tcp_input+0x53e>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801d966:	69bb      	ldr	r3, [r7, #24]
 801d968:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801d96a:	2b00      	cmp	r3, #0
 801d96c:	d00c      	beq.n	801d988 <tcp_input+0x550>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801d96e:	4b82      	ldr	r3, [pc, #520]	@ (801db78 <tcp_input+0x740>)
 801d970:	881b      	ldrh	r3, [r3, #0]
 801d972:	2b00      	cmp	r3, #0
 801d974:	d008      	beq.n	801d988 <tcp_input+0x550>
        /* pcb has been aborted or refused data is still refused and the new
           segment contains data */
        if (pcb->rcv_ann_wnd == 0) {
 801d976:	69bb      	ldr	r3, [r7, #24]
 801d978:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
 801d97a:	2b00      	cmp	r3, #0
 801d97c:	f040 80e4 	bne.w	801db48 <tcp_input+0x710>
          /* this is a zero-window probe, we respond to it with current RCV.NXT
          and drop the data segment */
          tcp_send_empty_ack(pcb);
 801d980:	69b8      	ldr	r0, [r7, #24]
 801d982:	f003 fe73 	bl	802166c <tcp_send_empty_ack>
        }
        TCP_STATS_INC(tcp.drop);
        MIB2_STATS_INC(mib2.tcpinerrs);
        goto aborted;
 801d986:	e0df      	b.n	801db48 <tcp_input+0x710>
      }
    }
    tcp_input_pcb = pcb;
 801d988:	4a7c      	ldr	r2, [pc, #496]	@ (801db7c <tcp_input+0x744>)
 801d98a:	69bb      	ldr	r3, [r7, #24]
 801d98c:	6013      	str	r3, [r2, #0]
    err = tcp_process(pcb);
 801d98e:	69b8      	ldr	r0, [r7, #24]
 801d990:	f000 fb18 	bl	801dfc4 <tcp_process>
 801d994:	4603      	mov	r3, r0
 801d996:	74fb      	strb	r3, [r7, #19]
    /* A return value of ERR_ABRT means that tcp_abort() was called
       and that the pcb has been freed. If so, we don't do anything. */
    if (err != ERR_ABRT) {
 801d998:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801d99c:	f113 0f0d 	cmn.w	r3, #13
 801d9a0:	f000 80d4 	beq.w	801db4c <tcp_input+0x714>
      if (recv_flags & TF_RESET) {
 801d9a4:	4b71      	ldr	r3, [pc, #452]	@ (801db6c <tcp_input+0x734>)
 801d9a6:	781b      	ldrb	r3, [r3, #0]
 801d9a8:	f003 0308 	and.w	r3, r3, #8
 801d9ac:	2b00      	cmp	r3, #0
 801d9ae:	d015      	beq.n	801d9dc <tcp_input+0x5a4>
        /* TF_RESET means that the connection was reset by the other
           end. We then call the error callback to inform the
           application that the connection is dead before we
           deallocate the PCB. */
        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
 801d9b0:	69bb      	ldr	r3, [r7, #24]
 801d9b2:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d9b6:	2b00      	cmp	r3, #0
 801d9b8:	d008      	beq.n	801d9cc <tcp_input+0x594>
 801d9ba:	69bb      	ldr	r3, [r7, #24]
 801d9bc:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801d9c0:	69ba      	ldr	r2, [r7, #24]
 801d9c2:	6912      	ldr	r2, [r2, #16]
 801d9c4:	f06f 010d 	mvn.w	r1, #13
 801d9c8:	4610      	mov	r0, r2
 801d9ca:	4798      	blx	r3
        tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801d9cc:	69b9      	ldr	r1, [r7, #24]
 801d9ce:	486c      	ldr	r0, [pc, #432]	@ (801db80 <tcp_input+0x748>)
 801d9d0:	f7ff fbba 	bl	801d148 <tcp_pcb_remove>
        tcp_free(pcb);
 801d9d4:	69b8      	ldr	r0, [r7, #24]
 801d9d6:	f7fd ff05 	bl	801b7e4 <tcp_free>
 801d9da:	e0da      	b.n	801db92 <tcp_input+0x75a>
      } else {
        err = ERR_OK;
 801d9dc:	2300      	movs	r3, #0
 801d9de:	74fb      	strb	r3, [r7, #19]
        /* If the application has registered a "sent" function to be
           called when new send buffer space is available, we call it
           now. */
        if (recv_acked > 0) {
 801d9e0:	4b63      	ldr	r3, [pc, #396]	@ (801db70 <tcp_input+0x738>)
 801d9e2:	881b      	ldrh	r3, [r3, #0]
 801d9e4:	2b00      	cmp	r3, #0
 801d9e6:	d01d      	beq.n	801da24 <tcp_input+0x5ec>
          while (acked > 0) {
            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
            acked -= acked16;
#else
          {
            acked16 = recv_acked;
 801d9e8:	4b61      	ldr	r3, [pc, #388]	@ (801db70 <tcp_input+0x738>)
 801d9ea:	881b      	ldrh	r3, [r3, #0]
 801d9ec:	81fb      	strh	r3, [r7, #14]
#endif
            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
 801d9ee:	69bb      	ldr	r3, [r7, #24]
 801d9f0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801d9f4:	2b00      	cmp	r3, #0
 801d9f6:	d00a      	beq.n	801da0e <tcp_input+0x5d6>
 801d9f8:	69bb      	ldr	r3, [r7, #24]
 801d9fa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801d9fe:	69ba      	ldr	r2, [r7, #24]
 801da00:	6910      	ldr	r0, [r2, #16]
 801da02:	89fa      	ldrh	r2, [r7, #14]
 801da04:	69b9      	ldr	r1, [r7, #24]
 801da06:	4798      	blx	r3
 801da08:	4603      	mov	r3, r0
 801da0a:	74fb      	strb	r3, [r7, #19]
 801da0c:	e001      	b.n	801da12 <tcp_input+0x5da>
 801da0e:	2300      	movs	r3, #0
 801da10:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801da12:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801da16:	f113 0f0d 	cmn.w	r3, #13
 801da1a:	f000 8099 	beq.w	801db50 <tcp_input+0x718>
              goto aborted;
            }
          }
          recv_acked = 0;
 801da1e:	4b54      	ldr	r3, [pc, #336]	@ (801db70 <tcp_input+0x738>)
 801da20:	2200      	movs	r2, #0
 801da22:	801a      	strh	r2, [r3, #0]
        }
        if (tcp_input_delayed_close(pcb)) {
 801da24:	69b8      	ldr	r0, [r7, #24]
 801da26:	f000 f915 	bl	801dc54 <tcp_input_delayed_close>
 801da2a:	4603      	mov	r3, r0
 801da2c:	2b00      	cmp	r3, #0
 801da2e:	f040 8091 	bne.w	801db54 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
        while (recv_data != NULL) {
          struct pbuf *rest = NULL;
          pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
        if (recv_data != NULL) {
 801da32:	4b4d      	ldr	r3, [pc, #308]	@ (801db68 <tcp_input+0x730>)
 801da34:	681b      	ldr	r3, [r3, #0]
 801da36:	2b00      	cmp	r3, #0
 801da38:	d041      	beq.n	801dabe <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
 801da3a:	69bb      	ldr	r3, [r7, #24]
 801da3c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801da3e:	2b00      	cmp	r3, #0
 801da40:	d006      	beq.n	801da50 <tcp_input+0x618>
 801da42:	4b50      	ldr	r3, [pc, #320]	@ (801db84 <tcp_input+0x74c>)
 801da44:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801da48:	494f      	ldr	r1, [pc, #316]	@ (801db88 <tcp_input+0x750>)
 801da4a:	4850      	ldr	r0, [pc, #320]	@ (801db8c <tcp_input+0x754>)
 801da4c:	f00c fe86 	bl	802a75c <iprintf>
          if (pcb->flags & TF_RXCLOSED) {
 801da50:	69bb      	ldr	r3, [r7, #24]
 801da52:	8b5b      	ldrh	r3, [r3, #26]
 801da54:	f003 0310 	and.w	r3, r3, #16
 801da58:	2b00      	cmp	r3, #0
 801da5a:	d008      	beq.n	801da6e <tcp_input+0x636>
            /* received data although already closed -> abort (send RST) to
               notify the remote host that not all data has been processed */
            pbuf_free(recv_data);
 801da5c:	4b42      	ldr	r3, [pc, #264]	@ (801db68 <tcp_input+0x730>)
 801da5e:	681b      	ldr	r3, [r3, #0]
 801da60:	4618      	mov	r0, r3
 801da62:	f7fd fc03 	bl	801b26c <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_free(rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            tcp_abort(pcb);
 801da66:	69b8      	ldr	r0, [r7, #24]
 801da68:	f7fe fa06 	bl	801be78 <tcp_abort>
            goto aborted;
 801da6c:	e091      	b.n	801db92 <tcp_input+0x75a>
          }

          /* Notify application that data has been received. */
          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
 801da6e:	69bb      	ldr	r3, [r7, #24]
 801da70:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801da74:	2b00      	cmp	r3, #0
 801da76:	d00c      	beq.n	801da92 <tcp_input+0x65a>
 801da78:	69bb      	ldr	r3, [r7, #24]
 801da7a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801da7e:	69bb      	ldr	r3, [r7, #24]
 801da80:	6918      	ldr	r0, [r3, #16]
 801da82:	4b39      	ldr	r3, [pc, #228]	@ (801db68 <tcp_input+0x730>)
 801da84:	681a      	ldr	r2, [r3, #0]
 801da86:	2300      	movs	r3, #0
 801da88:	69b9      	ldr	r1, [r7, #24]
 801da8a:	47a0      	blx	r4
 801da8c:	4603      	mov	r3, r0
 801da8e:	74fb      	strb	r3, [r7, #19]
 801da90:	e008      	b.n	801daa4 <tcp_input+0x66c>
 801da92:	4b35      	ldr	r3, [pc, #212]	@ (801db68 <tcp_input+0x730>)
 801da94:	681a      	ldr	r2, [r3, #0]
 801da96:	2300      	movs	r3, #0
 801da98:	69b9      	ldr	r1, [r7, #24]
 801da9a:	2000      	movs	r0, #0
 801da9c:	f7ff f884 	bl	801cba8 <tcp_recv_null>
 801daa0:	4603      	mov	r3, r0
 801daa2:	74fb      	strb	r3, [r7, #19]
          if (err == ERR_ABRT) {
 801daa4:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801daa8:	f113 0f0d 	cmn.w	r3, #13
 801daac:	d054      	beq.n	801db58 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            goto aborted;
          }

          /* If the upper layer can't receive this data, store it */
          if (err != ERR_OK) {
 801daae:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801dab2:	2b00      	cmp	r3, #0
 801dab4:	d003      	beq.n	801dabe <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_cat(recv_data, rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            pcb->refused_data = recv_data;
 801dab6:	4b2c      	ldr	r3, [pc, #176]	@ (801db68 <tcp_input+0x730>)
 801dab8:	681a      	ldr	r2, [r3, #0]
 801daba:	69bb      	ldr	r3, [r7, #24]
 801dabc:	679a      	str	r2, [r3, #120]	@ 0x78
          }
        }

        /* If a FIN segment was received, we call the callback
           function with a NULL buffer to indicate EOF. */
        if (recv_flags & TF_GOT_FIN) {
 801dabe:	4b2b      	ldr	r3, [pc, #172]	@ (801db6c <tcp_input+0x734>)
 801dac0:	781b      	ldrb	r3, [r3, #0]
 801dac2:	f003 0320 	and.w	r3, r3, #32
 801dac6:	2b00      	cmp	r3, #0
 801dac8:	d031      	beq.n	801db2e <tcp_input+0x6f6>
          if (pcb->refused_data != NULL) {
 801daca:	69bb      	ldr	r3, [r7, #24]
 801dacc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dace:	2b00      	cmp	r3, #0
 801dad0:	d009      	beq.n	801dae6 <tcp_input+0x6ae>
            /* Delay this if we have refused data. */
            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
 801dad2:	69bb      	ldr	r3, [r7, #24]
 801dad4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dad6:	7b5a      	ldrb	r2, [r3, #13]
 801dad8:	69bb      	ldr	r3, [r7, #24]
 801dada:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dadc:	f042 0220 	orr.w	r2, r2, #32
 801dae0:	b2d2      	uxtb	r2, r2
 801dae2:	735a      	strb	r2, [r3, #13]
 801dae4:	e023      	b.n	801db2e <tcp_input+0x6f6>
          } else {
            /* correct rcv_wnd as the application won't call tcp_recved()
               for the FIN's seqno */
            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801dae6:	69bb      	ldr	r3, [r7, #24]
 801dae8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801daea:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801daee:	4293      	cmp	r3, r2
 801daf0:	d005      	beq.n	801dafe <tcp_input+0x6c6>
              pcb->rcv_wnd++;
 801daf2:	69bb      	ldr	r3, [r7, #24]
 801daf4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801daf6:	3301      	adds	r3, #1
 801daf8:	b29a      	uxth	r2, r3
 801dafa:	69bb      	ldr	r3, [r7, #24]
 801dafc:	851a      	strh	r2, [r3, #40]	@ 0x28
            }
            TCP_EVENT_CLOSED(pcb, err);
 801dafe:	69bb      	ldr	r3, [r7, #24]
 801db00:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801db04:	2b00      	cmp	r3, #0
 801db06:	d00b      	beq.n	801db20 <tcp_input+0x6e8>
 801db08:	69bb      	ldr	r3, [r7, #24]
 801db0a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801db0e:	69bb      	ldr	r3, [r7, #24]
 801db10:	6918      	ldr	r0, [r3, #16]
 801db12:	2300      	movs	r3, #0
 801db14:	2200      	movs	r2, #0
 801db16:	69b9      	ldr	r1, [r7, #24]
 801db18:	47a0      	blx	r4
 801db1a:	4603      	mov	r3, r0
 801db1c:	74fb      	strb	r3, [r7, #19]
 801db1e:	e001      	b.n	801db24 <tcp_input+0x6ec>
 801db20:	2300      	movs	r3, #0
 801db22:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801db24:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801db28:	f113 0f0d 	cmn.w	r3, #13
 801db2c:	d016      	beq.n	801db5c <tcp_input+0x724>
              goto aborted;
            }
          }
        }

        tcp_input_pcb = NULL;
 801db2e:	4b13      	ldr	r3, [pc, #76]	@ (801db7c <tcp_input+0x744>)
 801db30:	2200      	movs	r2, #0
 801db32:	601a      	str	r2, [r3, #0]
        if (tcp_input_delayed_close(pcb)) {
 801db34:	69b8      	ldr	r0, [r7, #24]
 801db36:	f000 f88d 	bl	801dc54 <tcp_input_delayed_close>
 801db3a:	4603      	mov	r3, r0
 801db3c:	2b00      	cmp	r3, #0
 801db3e:	d127      	bne.n	801db90 <tcp_input+0x758>
          goto aborted;
        }
        /* Try to send something out. */
        tcp_output(pcb);
 801db40:	69b8      	ldr	r0, [r7, #24]
 801db42:	f002 ff7f 	bl	8020a44 <tcp_output>
 801db46:	e024      	b.n	801db92 <tcp_input+0x75a>
        goto aborted;
 801db48:	bf00      	nop
 801db4a:	e022      	b.n	801db92 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
      }
    }
    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
       Below this line, 'pcb' may not be dereferenced! */
aborted:
 801db4c:	bf00      	nop
 801db4e:	e020      	b.n	801db92 <tcp_input+0x75a>
              goto aborted;
 801db50:	bf00      	nop
 801db52:	e01e      	b.n	801db92 <tcp_input+0x75a>
          goto aborted;
 801db54:	bf00      	nop
 801db56:	e01c      	b.n	801db92 <tcp_input+0x75a>
            goto aborted;
 801db58:	bf00      	nop
 801db5a:	e01a      	b.n	801db92 <tcp_input+0x75a>
              goto aborted;
 801db5c:	bf00      	nop
 801db5e:	e018      	b.n	801db92 <tcp_input+0x75a>
 801db60:	2402af80 	.word	0x2402af80
 801db64:	2402af94 	.word	0x2402af94
 801db68:	2402afb4 	.word	0x2402afb4
 801db6c:	2402afb1 	.word	0x2402afb1
 801db70:	2402afac 	.word	0x2402afac
 801db74:	2402afb0 	.word	0x2402afb0
 801db78:	2402afae 	.word	0x2402afae
 801db7c:	2402afb8 	.word	0x2402afb8
 801db80:	2402af74 	.word	0x2402af74
 801db84:	0802fbf4 	.word	0x0802fbf4
 801db88:	0802fda8 	.word	0x0802fda8
 801db8c:	0802fc40 	.word	0x0802fc40
          goto aborted;
 801db90:	bf00      	nop
    tcp_input_pcb = NULL;
 801db92:	4b27      	ldr	r3, [pc, #156]	@ (801dc30 <tcp_input+0x7f8>)
 801db94:	2200      	movs	r2, #0
 801db96:	601a      	str	r2, [r3, #0]
    recv_data = NULL;
 801db98:	4b26      	ldr	r3, [pc, #152]	@ (801dc34 <tcp_input+0x7fc>)
 801db9a:	2200      	movs	r2, #0
 801db9c:	601a      	str	r2, [r3, #0]

    /* give up our reference to inseg.p */
    if (inseg.p != NULL) {
 801db9e:	4b26      	ldr	r3, [pc, #152]	@ (801dc38 <tcp_input+0x800>)
 801dba0:	685b      	ldr	r3, [r3, #4]
 801dba2:	2b00      	cmp	r3, #0
 801dba4:	d03f      	beq.n	801dc26 <tcp_input+0x7ee>
      pbuf_free(inseg.p);
 801dba6:	4b24      	ldr	r3, [pc, #144]	@ (801dc38 <tcp_input+0x800>)
 801dba8:	685b      	ldr	r3, [r3, #4]
 801dbaa:	4618      	mov	r0, r3
 801dbac:	f7fd fb5e 	bl	801b26c <pbuf_free>
      inseg.p = NULL;
 801dbb0:	4b21      	ldr	r3, [pc, #132]	@ (801dc38 <tcp_input+0x800>)
 801dbb2:	2200      	movs	r2, #0
 801dbb4:	605a      	str	r2, [r3, #4]
    pbuf_free(p);
  }

  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
  PERF_STOP("tcp_input");
  return;
 801dbb6:	e036      	b.n	801dc26 <tcp_input+0x7ee>
    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
 801dbb8:	4b20      	ldr	r3, [pc, #128]	@ (801dc3c <tcp_input+0x804>)
 801dbba:	681b      	ldr	r3, [r3, #0]
 801dbbc:	899b      	ldrh	r3, [r3, #12]
 801dbbe:	b29b      	uxth	r3, r3
 801dbc0:	4618      	mov	r0, r3
 801dbc2:	f7fb fe71 	bl	80198a8 <lwip_htons>
 801dbc6:	4603      	mov	r3, r0
 801dbc8:	b2db      	uxtb	r3, r3
 801dbca:	f003 0304 	and.w	r3, r3, #4
 801dbce:	2b00      	cmp	r3, #0
 801dbd0:	d118      	bne.n	801dc04 <tcp_input+0x7cc>
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dbd2:	4b1b      	ldr	r3, [pc, #108]	@ (801dc40 <tcp_input+0x808>)
 801dbd4:	6819      	ldr	r1, [r3, #0]
 801dbd6:	4b1b      	ldr	r3, [pc, #108]	@ (801dc44 <tcp_input+0x80c>)
 801dbd8:	881b      	ldrh	r3, [r3, #0]
 801dbda:	461a      	mov	r2, r3
 801dbdc:	4b1a      	ldr	r3, [pc, #104]	@ (801dc48 <tcp_input+0x810>)
 801dbde:	681b      	ldr	r3, [r3, #0]
 801dbe0:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dbe2:	4b16      	ldr	r3, [pc, #88]	@ (801dc3c <tcp_input+0x804>)
 801dbe4:	681b      	ldr	r3, [r3, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dbe6:	885b      	ldrh	r3, [r3, #2]
 801dbe8:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dbea:	4a14      	ldr	r2, [pc, #80]	@ (801dc3c <tcp_input+0x804>)
 801dbec:	6812      	ldr	r2, [r2, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dbee:	8812      	ldrh	r2, [r2, #0]
 801dbf0:	b292      	uxth	r2, r2
 801dbf2:	9202      	str	r2, [sp, #8]
 801dbf4:	9301      	str	r3, [sp, #4]
 801dbf6:	4b15      	ldr	r3, [pc, #84]	@ (801dc4c <tcp_input+0x814>)
 801dbf8:	9300      	str	r3, [sp, #0]
 801dbfa:	4b15      	ldr	r3, [pc, #84]	@ (801dc50 <tcp_input+0x818>)
 801dbfc:	4602      	mov	r2, r0
 801dbfe:	2000      	movs	r0, #0
 801dc00:	f003 fce2 	bl	80215c8 <tcp_rst>
    pbuf_free(p);
 801dc04:	6878      	ldr	r0, [r7, #4]
 801dc06:	f7fd fb31 	bl	801b26c <pbuf_free>
  return;
 801dc0a:	e00c      	b.n	801dc26 <tcp_input+0x7ee>
    goto dropped;
 801dc0c:	bf00      	nop
 801dc0e:	e006      	b.n	801dc1e <tcp_input+0x7e6>
    goto dropped;
 801dc10:	bf00      	nop
 801dc12:	e004      	b.n	801dc1e <tcp_input+0x7e6>
    goto dropped;
 801dc14:	bf00      	nop
 801dc16:	e002      	b.n	801dc1e <tcp_input+0x7e6>
      goto dropped;
 801dc18:	bf00      	nop
 801dc1a:	e000      	b.n	801dc1e <tcp_input+0x7e6>
      goto dropped;
 801dc1c:	bf00      	nop
dropped:
  TCP_STATS_INC(tcp.drop);
  MIB2_STATS_INC(mib2.tcpinerrs);
  pbuf_free(p);
 801dc1e:	6878      	ldr	r0, [r7, #4]
 801dc20:	f7fd fb24 	bl	801b26c <pbuf_free>
 801dc24:	e000      	b.n	801dc28 <tcp_input+0x7f0>
  return;
 801dc26:	bf00      	nop
}
 801dc28:	3724      	adds	r7, #36	@ 0x24
 801dc2a:	46bd      	mov	sp, r7
 801dc2c:	bd90      	pop	{r4, r7, pc}
 801dc2e:	bf00      	nop
 801dc30:	2402afb8 	.word	0x2402afb8
 801dc34:	2402afb4 	.word	0x2402afb4
 801dc38:	2402af80 	.word	0x2402af80
 801dc3c:	2402af94 	.word	0x2402af94
 801dc40:	2402afa8 	.word	0x2402afa8
 801dc44:	2402afae 	.word	0x2402afae
 801dc48:	2402afa4 	.word	0x2402afa4
 801dc4c:	24024428 	.word	0x24024428
 801dc50:	2402442c 	.word	0x2402442c

0801dc54 <tcp_input_delayed_close>:
 * any more.
 * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
 */
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
 801dc54:	b580      	push	{r7, lr}
 801dc56:	b082      	sub	sp, #8
 801dc58:	af00      	add	r7, sp, #0
 801dc5a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
 801dc5c:	687b      	ldr	r3, [r7, #4]
 801dc5e:	2b00      	cmp	r3, #0
 801dc60:	d106      	bne.n	801dc70 <tcp_input_delayed_close+0x1c>
 801dc62:	4b17      	ldr	r3, [pc, #92]	@ (801dcc0 <tcp_input_delayed_close+0x6c>)
 801dc64:	f240 225a 	movw	r2, #602	@ 0x25a
 801dc68:	4916      	ldr	r1, [pc, #88]	@ (801dcc4 <tcp_input_delayed_close+0x70>)
 801dc6a:	4817      	ldr	r0, [pc, #92]	@ (801dcc8 <tcp_input_delayed_close+0x74>)
 801dc6c:	f00c fd76 	bl	802a75c <iprintf>

  if (recv_flags & TF_CLOSED) {
 801dc70:	4b16      	ldr	r3, [pc, #88]	@ (801dccc <tcp_input_delayed_close+0x78>)
 801dc72:	781b      	ldrb	r3, [r3, #0]
 801dc74:	f003 0310 	and.w	r3, r3, #16
 801dc78:	2b00      	cmp	r3, #0
 801dc7a:	d01c      	beq.n	801dcb6 <tcp_input_delayed_close+0x62>
    /* The connection has been closed and we will deallocate the
        PCB. */
    if (!(pcb->flags & TF_RXCLOSED)) {
 801dc7c:	687b      	ldr	r3, [r7, #4]
 801dc7e:	8b5b      	ldrh	r3, [r3, #26]
 801dc80:	f003 0310 	and.w	r3, r3, #16
 801dc84:	2b00      	cmp	r3, #0
 801dc86:	d10d      	bne.n	801dca4 <tcp_input_delayed_close+0x50>
      /* Connection closed although the application has only shut down the
          tx side: call the PCB's err callback and indicate the closure to
          ensure the application doesn't continue using the PCB. */
      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
 801dc88:	687b      	ldr	r3, [r7, #4]
 801dc8a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801dc8e:	2b00      	cmp	r3, #0
 801dc90:	d008      	beq.n	801dca4 <tcp_input_delayed_close+0x50>
 801dc92:	687b      	ldr	r3, [r7, #4]
 801dc94:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801dc98:	687a      	ldr	r2, [r7, #4]
 801dc9a:	6912      	ldr	r2, [r2, #16]
 801dc9c:	f06f 010e 	mvn.w	r1, #14
 801dca0:	4610      	mov	r0, r2
 801dca2:	4798      	blx	r3
    }
    tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801dca4:	6879      	ldr	r1, [r7, #4]
 801dca6:	480a      	ldr	r0, [pc, #40]	@ (801dcd0 <tcp_input_delayed_close+0x7c>)
 801dca8:	f7ff fa4e 	bl	801d148 <tcp_pcb_remove>
    tcp_free(pcb);
 801dcac:	6878      	ldr	r0, [r7, #4]
 801dcae:	f7fd fd99 	bl	801b7e4 <tcp_free>
    return 1;
 801dcb2:	2301      	movs	r3, #1
 801dcb4:	e000      	b.n	801dcb8 <tcp_input_delayed_close+0x64>
  }
  return 0;
 801dcb6:	2300      	movs	r3, #0
}
 801dcb8:	4618      	mov	r0, r3
 801dcba:	3708      	adds	r7, #8
 801dcbc:	46bd      	mov	sp, r7
 801dcbe:	bd80      	pop	{r7, pc}
 801dcc0:	0802fbf4 	.word	0x0802fbf4
 801dcc4:	0802fdc4 	.word	0x0802fdc4
 801dcc8:	0802fc40 	.word	0x0802fc40
 801dccc:	2402afb1 	.word	0x2402afb1
 801dcd0:	2402af74 	.word	0x2402af74

0801dcd4 <tcp_listen_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
 801dcd4:	b590      	push	{r4, r7, lr}
 801dcd6:	b08b      	sub	sp, #44	@ 0x2c
 801dcd8:	af04      	add	r7, sp, #16
 801dcda:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *npcb;
  u32_t iss;
  err_t rc;

  if (flags & TCP_RST) {
 801dcdc:	4b6f      	ldr	r3, [pc, #444]	@ (801de9c <tcp_listen_input+0x1c8>)
 801dcde:	781b      	ldrb	r3, [r3, #0]
 801dce0:	f003 0304 	and.w	r3, r3, #4
 801dce4:	2b00      	cmp	r3, #0
 801dce6:	f040 80d2 	bne.w	801de8e <tcp_listen_input+0x1ba>
    /* An incoming RST should be ignored. Return. */
    return;
  }

  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
 801dcea:	687b      	ldr	r3, [r7, #4]
 801dcec:	2b00      	cmp	r3, #0
 801dcee:	d106      	bne.n	801dcfe <tcp_listen_input+0x2a>
 801dcf0:	4b6b      	ldr	r3, [pc, #428]	@ (801dea0 <tcp_listen_input+0x1cc>)
 801dcf2:	f240 2281 	movw	r2, #641	@ 0x281
 801dcf6:	496b      	ldr	r1, [pc, #428]	@ (801dea4 <tcp_listen_input+0x1d0>)
 801dcf8:	486b      	ldr	r0, [pc, #428]	@ (801dea8 <tcp_listen_input+0x1d4>)
 801dcfa:	f00c fd2f 	bl	802a75c <iprintf>

  /* In the LISTEN state, we check for incoming SYN segments,
     creates a new PCB, and responds with a SYN|ACK. */
  if (flags & TCP_ACK) {
 801dcfe:	4b67      	ldr	r3, [pc, #412]	@ (801de9c <tcp_listen_input+0x1c8>)
 801dd00:	781b      	ldrb	r3, [r3, #0]
 801dd02:	f003 0310 	and.w	r3, r3, #16
 801dd06:	2b00      	cmp	r3, #0
 801dd08:	d019      	beq.n	801dd3e <tcp_listen_input+0x6a>
    /* For incoming segments with the ACK flag set, respond with a
       RST. */
    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd0a:	4b68      	ldr	r3, [pc, #416]	@ (801deac <tcp_listen_input+0x1d8>)
 801dd0c:	6819      	ldr	r1, [r3, #0]
 801dd0e:	4b68      	ldr	r3, [pc, #416]	@ (801deb0 <tcp_listen_input+0x1dc>)
 801dd10:	881b      	ldrh	r3, [r3, #0]
 801dd12:	461a      	mov	r2, r3
 801dd14:	4b67      	ldr	r3, [pc, #412]	@ (801deb4 <tcp_listen_input+0x1e0>)
 801dd16:	681b      	ldr	r3, [r3, #0]
 801dd18:	18d0      	adds	r0, r2, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dd1a:	4b67      	ldr	r3, [pc, #412]	@ (801deb8 <tcp_listen_input+0x1e4>)
 801dd1c:	681b      	ldr	r3, [r3, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd1e:	885b      	ldrh	r3, [r3, #2]
 801dd20:	b29b      	uxth	r3, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dd22:	4a65      	ldr	r2, [pc, #404]	@ (801deb8 <tcp_listen_input+0x1e4>)
 801dd24:	6812      	ldr	r2, [r2, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dd26:	8812      	ldrh	r2, [r2, #0]
 801dd28:	b292      	uxth	r2, r2
 801dd2a:	9202      	str	r2, [sp, #8]
 801dd2c:	9301      	str	r3, [sp, #4]
 801dd2e:	4b63      	ldr	r3, [pc, #396]	@ (801debc <tcp_listen_input+0x1e8>)
 801dd30:	9300      	str	r3, [sp, #0]
 801dd32:	4b63      	ldr	r3, [pc, #396]	@ (801dec0 <tcp_listen_input+0x1ec>)
 801dd34:	4602      	mov	r2, r0
 801dd36:	6878      	ldr	r0, [r7, #4]
 801dd38:	f003 fc46 	bl	80215c8 <tcp_rst>
      tcp_abandon(npcb, 0);
      return;
    }
    tcp_output(npcb);
  }
  return;
 801dd3c:	e0a9      	b.n	801de92 <tcp_listen_input+0x1be>
  } else if (flags & TCP_SYN) {
 801dd3e:	4b57      	ldr	r3, [pc, #348]	@ (801de9c <tcp_listen_input+0x1c8>)
 801dd40:	781b      	ldrb	r3, [r3, #0]
 801dd42:	f003 0302 	and.w	r3, r3, #2
 801dd46:	2b00      	cmp	r3, #0
 801dd48:	f000 80a3 	beq.w	801de92 <tcp_listen_input+0x1be>
    npcb = tcp_alloc(pcb->prio);
 801dd4c:	687b      	ldr	r3, [r7, #4]
 801dd4e:	7d5b      	ldrb	r3, [r3, #21]
 801dd50:	4618      	mov	r0, r3
 801dd52:	f7ff f84d 	bl	801cdf0 <tcp_alloc>
 801dd56:	6178      	str	r0, [r7, #20]
    if (npcb == NULL) {
 801dd58:	697b      	ldr	r3, [r7, #20]
 801dd5a:	2b00      	cmp	r3, #0
 801dd5c:	d111      	bne.n	801dd82 <tcp_listen_input+0xae>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801dd5e:	687b      	ldr	r3, [r7, #4]
 801dd60:	699b      	ldr	r3, [r3, #24]
 801dd62:	2b00      	cmp	r3, #0
 801dd64:	d00a      	beq.n	801dd7c <tcp_listen_input+0xa8>
 801dd66:	687b      	ldr	r3, [r7, #4]
 801dd68:	699b      	ldr	r3, [r3, #24]
 801dd6a:	687a      	ldr	r2, [r7, #4]
 801dd6c:	6910      	ldr	r0, [r2, #16]
 801dd6e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801dd72:	2100      	movs	r1, #0
 801dd74:	4798      	blx	r3
 801dd76:	4603      	mov	r3, r0
 801dd78:	73bb      	strb	r3, [r7, #14]
      return;
 801dd7a:	e08b      	b.n	801de94 <tcp_listen_input+0x1c0>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801dd7c:	23f0      	movs	r3, #240	@ 0xf0
 801dd7e:	73bb      	strb	r3, [r7, #14]
      return;
 801dd80:	e088      	b.n	801de94 <tcp_listen_input+0x1c0>
    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
 801dd82:	4b50      	ldr	r3, [pc, #320]	@ (801dec4 <tcp_listen_input+0x1f0>)
 801dd84:	695a      	ldr	r2, [r3, #20]
 801dd86:	697b      	ldr	r3, [r7, #20]
 801dd88:	601a      	str	r2, [r3, #0]
    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
 801dd8a:	4b4e      	ldr	r3, [pc, #312]	@ (801dec4 <tcp_listen_input+0x1f0>)
 801dd8c:	691a      	ldr	r2, [r3, #16]
 801dd8e:	697b      	ldr	r3, [r7, #20]
 801dd90:	605a      	str	r2, [r3, #4]
    npcb->local_port = pcb->local_port;
 801dd92:	687b      	ldr	r3, [r7, #4]
 801dd94:	8ada      	ldrh	r2, [r3, #22]
 801dd96:	697b      	ldr	r3, [r7, #20]
 801dd98:	82da      	strh	r2, [r3, #22]
    npcb->remote_port = tcphdr->src;
 801dd9a:	4b47      	ldr	r3, [pc, #284]	@ (801deb8 <tcp_listen_input+0x1e4>)
 801dd9c:	681b      	ldr	r3, [r3, #0]
 801dd9e:	881b      	ldrh	r3, [r3, #0]
 801dda0:	b29a      	uxth	r2, r3
 801dda2:	697b      	ldr	r3, [r7, #20]
 801dda4:	831a      	strh	r2, [r3, #24]
    npcb->state = SYN_RCVD;
 801dda6:	697b      	ldr	r3, [r7, #20]
 801dda8:	2203      	movs	r2, #3
 801ddaa:	751a      	strb	r2, [r3, #20]
    npcb->rcv_nxt = seqno + 1;
 801ddac:	4b41      	ldr	r3, [pc, #260]	@ (801deb4 <tcp_listen_input+0x1e0>)
 801ddae:	681b      	ldr	r3, [r3, #0]
 801ddb0:	1c5a      	adds	r2, r3, #1
 801ddb2:	697b      	ldr	r3, [r7, #20]
 801ddb4:	625a      	str	r2, [r3, #36]	@ 0x24
    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
 801ddb6:	697b      	ldr	r3, [r7, #20]
 801ddb8:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801ddba:	697b      	ldr	r3, [r7, #20]
 801ddbc:	62da      	str	r2, [r3, #44]	@ 0x2c
    iss = tcp_next_iss(npcb);
 801ddbe:	6978      	ldr	r0, [r7, #20]
 801ddc0:	f7ff fa56 	bl	801d270 <tcp_next_iss>
 801ddc4:	6138      	str	r0, [r7, #16]
    npcb->snd_wl2 = iss;
 801ddc6:	697b      	ldr	r3, [r7, #20]
 801ddc8:	693a      	ldr	r2, [r7, #16]
 801ddca:	659a      	str	r2, [r3, #88]	@ 0x58
    npcb->snd_nxt = iss;
 801ddcc:	697b      	ldr	r3, [r7, #20]
 801ddce:	693a      	ldr	r2, [r7, #16]
 801ddd0:	651a      	str	r2, [r3, #80]	@ 0x50
    npcb->lastack = iss;
 801ddd2:	697b      	ldr	r3, [r7, #20]
 801ddd4:	693a      	ldr	r2, [r7, #16]
 801ddd6:	645a      	str	r2, [r3, #68]	@ 0x44
    npcb->snd_lbb = iss;
 801ddd8:	697b      	ldr	r3, [r7, #20]
 801ddda:	693a      	ldr	r2, [r7, #16]
 801dddc:	65da      	str	r2, [r3, #92]	@ 0x5c
    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
 801ddde:	4b35      	ldr	r3, [pc, #212]	@ (801deb4 <tcp_listen_input+0x1e0>)
 801dde0:	681b      	ldr	r3, [r3, #0]
 801dde2:	1e5a      	subs	r2, r3, #1
 801dde4:	697b      	ldr	r3, [r7, #20]
 801dde6:	655a      	str	r2, [r3, #84]	@ 0x54
    npcb->callback_arg = pcb->callback_arg;
 801dde8:	687b      	ldr	r3, [r7, #4]
 801ddea:	691a      	ldr	r2, [r3, #16]
 801ddec:	697b      	ldr	r3, [r7, #20]
 801ddee:	611a      	str	r2, [r3, #16]
    npcb->listener = pcb;
 801ddf0:	697b      	ldr	r3, [r7, #20]
 801ddf2:	687a      	ldr	r2, [r7, #4]
 801ddf4:	67da      	str	r2, [r3, #124]	@ 0x7c
    npcb->so_options = pcb->so_options & SOF_INHERITED;
 801ddf6:	687b      	ldr	r3, [r7, #4]
 801ddf8:	7a5b      	ldrb	r3, [r3, #9]
 801ddfa:	f003 030c 	and.w	r3, r3, #12
 801ddfe:	b2da      	uxtb	r2, r3
 801de00:	697b      	ldr	r3, [r7, #20]
 801de02:	725a      	strb	r2, [r3, #9]
    npcb->netif_idx = pcb->netif_idx;
 801de04:	687b      	ldr	r3, [r7, #4]
 801de06:	7a1a      	ldrb	r2, [r3, #8]
 801de08:	697b      	ldr	r3, [r7, #20]
 801de0a:	721a      	strb	r2, [r3, #8]
    TCP_REG_ACTIVE(npcb);
 801de0c:	4b2e      	ldr	r3, [pc, #184]	@ (801dec8 <tcp_listen_input+0x1f4>)
 801de0e:	681a      	ldr	r2, [r3, #0]
 801de10:	697b      	ldr	r3, [r7, #20]
 801de12:	60da      	str	r2, [r3, #12]
 801de14:	4a2c      	ldr	r2, [pc, #176]	@ (801dec8 <tcp_listen_input+0x1f4>)
 801de16:	697b      	ldr	r3, [r7, #20]
 801de18:	6013      	str	r3, [r2, #0]
 801de1a:	f003 fd97 	bl	802194c <tcp_timer_needed>
 801de1e:	4b2b      	ldr	r3, [pc, #172]	@ (801decc <tcp_listen_input+0x1f8>)
 801de20:	2201      	movs	r2, #1
 801de22:	701a      	strb	r2, [r3, #0]
    tcp_parseopt(npcb);
 801de24:	6978      	ldr	r0, [r7, #20]
 801de26:	f001 fd8b 	bl	801f940 <tcp_parseopt>
    npcb->snd_wnd = tcphdr->wnd;
 801de2a:	4b23      	ldr	r3, [pc, #140]	@ (801deb8 <tcp_listen_input+0x1e4>)
 801de2c:	681b      	ldr	r3, [r3, #0]
 801de2e:	89db      	ldrh	r3, [r3, #14]
 801de30:	b29a      	uxth	r2, r3
 801de32:	697b      	ldr	r3, [r7, #20]
 801de34:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
    npcb->snd_wnd_max = npcb->snd_wnd;
 801de38:	697b      	ldr	r3, [r7, #20]
 801de3a:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801de3e:	697b      	ldr	r3, [r7, #20]
 801de40:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
 801de44:	697b      	ldr	r3, [r7, #20]
 801de46:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801de48:	697b      	ldr	r3, [r7, #20]
 801de4a:	3304      	adds	r3, #4
 801de4c:	4618      	mov	r0, r3
 801de4e:	f007 fc77 	bl	8025740 <ip4_route>
 801de52:	4601      	mov	r1, r0
 801de54:	697b      	ldr	r3, [r7, #20]
 801de56:	3304      	adds	r3, #4
 801de58:	461a      	mov	r2, r3
 801de5a:	4620      	mov	r0, r4
 801de5c:	f7ff fa2e 	bl	801d2bc <tcp_eff_send_mss_netif>
 801de60:	4603      	mov	r3, r0
 801de62:	461a      	mov	r2, r3
 801de64:	697b      	ldr	r3, [r7, #20]
 801de66:	865a      	strh	r2, [r3, #50]	@ 0x32
    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
 801de68:	2112      	movs	r1, #18
 801de6a:	6978      	ldr	r0, [r7, #20]
 801de6c:	f002 fcfc 	bl	8020868 <tcp_enqueue_flags>
 801de70:	4603      	mov	r3, r0
 801de72:	73fb      	strb	r3, [r7, #15]
    if (rc != ERR_OK) {
 801de74:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801de78:	2b00      	cmp	r3, #0
 801de7a:	d004      	beq.n	801de86 <tcp_listen_input+0x1b2>
      tcp_abandon(npcb, 0);
 801de7c:	2100      	movs	r1, #0
 801de7e:	6978      	ldr	r0, [r7, #20]
 801de80:	f7fd ff3a 	bl	801bcf8 <tcp_abandon>
      return;
 801de84:	e006      	b.n	801de94 <tcp_listen_input+0x1c0>
    tcp_output(npcb);
 801de86:	6978      	ldr	r0, [r7, #20]
 801de88:	f002 fddc 	bl	8020a44 <tcp_output>
  return;
 801de8c:	e001      	b.n	801de92 <tcp_listen_input+0x1be>
    return;
 801de8e:	bf00      	nop
 801de90:	e000      	b.n	801de94 <tcp_listen_input+0x1c0>
  return;
 801de92:	bf00      	nop
}
 801de94:	371c      	adds	r7, #28
 801de96:	46bd      	mov	sp, r7
 801de98:	bd90      	pop	{r4, r7, pc}
 801de9a:	bf00      	nop
 801de9c:	2402afb0 	.word	0x2402afb0
 801dea0:	0802fbf4 	.word	0x0802fbf4
 801dea4:	0802fdec 	.word	0x0802fdec
 801dea8:	0802fc40 	.word	0x0802fc40
 801deac:	2402afa8 	.word	0x2402afa8
 801deb0:	2402afae 	.word	0x2402afae
 801deb4:	2402afa4 	.word	0x2402afa4
 801deb8:	2402af94 	.word	0x2402af94
 801debc:	24024428 	.word	0x24024428
 801dec0:	2402442c 	.word	0x2402442c
 801dec4:	24024418 	.word	0x24024418
 801dec8:	2402af74 	.word	0x2402af74
 801decc:	2402af7c 	.word	0x2402af7c

0801ded0 <tcp_timewait_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
 801ded0:	b580      	push	{r7, lr}
 801ded2:	b086      	sub	sp, #24
 801ded4:	af04      	add	r7, sp, #16
 801ded6:	6078      	str	r0, [r7, #4]
  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
  /* RFC 793 3.9 Event Processing - Segment Arrives:
   * - first check sequence number - we skip that one in TIME_WAIT (always
   *   acceptable since we only send ACKs)
   * - second check the RST bit (... return) */
  if (flags & TCP_RST) {
 801ded8:	4b2f      	ldr	r3, [pc, #188]	@ (801df98 <tcp_timewait_input+0xc8>)
 801deda:	781b      	ldrb	r3, [r3, #0]
 801dedc:	f003 0304 	and.w	r3, r3, #4
 801dee0:	2b00      	cmp	r3, #0
 801dee2:	d153      	bne.n	801df8c <tcp_timewait_input+0xbc>
    return;
  }

  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
 801dee4:	687b      	ldr	r3, [r7, #4]
 801dee6:	2b00      	cmp	r3, #0
 801dee8:	d106      	bne.n	801def8 <tcp_timewait_input+0x28>
 801deea:	4b2c      	ldr	r3, [pc, #176]	@ (801df9c <tcp_timewait_input+0xcc>)
 801deec:	f240 22ee 	movw	r2, #750	@ 0x2ee
 801def0:	492b      	ldr	r1, [pc, #172]	@ (801dfa0 <tcp_timewait_input+0xd0>)
 801def2:	482c      	ldr	r0, [pc, #176]	@ (801dfa4 <tcp_timewait_input+0xd4>)
 801def4:	f00c fc32 	bl	802a75c <iprintf>

  /* - fourth, check the SYN bit, */
  if (flags & TCP_SYN) {
 801def8:	4b27      	ldr	r3, [pc, #156]	@ (801df98 <tcp_timewait_input+0xc8>)
 801defa:	781b      	ldrb	r3, [r3, #0]
 801defc:	f003 0302 	and.w	r3, r3, #2
 801df00:	2b00      	cmp	r3, #0
 801df02:	d02a      	beq.n	801df5a <tcp_timewait_input+0x8a>
    /* If an incoming segment is not acceptable, an acknowledgment
       should be sent in reply */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
 801df04:	4b28      	ldr	r3, [pc, #160]	@ (801dfa8 <tcp_timewait_input+0xd8>)
 801df06:	681a      	ldr	r2, [r3, #0]
 801df08:	687b      	ldr	r3, [r7, #4]
 801df0a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801df0c:	1ad3      	subs	r3, r2, r3
 801df0e:	2b00      	cmp	r3, #0
 801df10:	db2d      	blt.n	801df6e <tcp_timewait_input+0x9e>
 801df12:	4b25      	ldr	r3, [pc, #148]	@ (801dfa8 <tcp_timewait_input+0xd8>)
 801df14:	681a      	ldr	r2, [r3, #0]
 801df16:	687b      	ldr	r3, [r7, #4]
 801df18:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801df1a:	6879      	ldr	r1, [r7, #4]
 801df1c:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801df1e:	440b      	add	r3, r1
 801df20:	1ad3      	subs	r3, r2, r3
 801df22:	2b00      	cmp	r3, #0
 801df24:	dc23      	bgt.n	801df6e <tcp_timewait_input+0x9e>
      /* If the SYN is in the window it is an error, send a reset */
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801df26:	4b21      	ldr	r3, [pc, #132]	@ (801dfac <tcp_timewait_input+0xdc>)
 801df28:	6819      	ldr	r1, [r3, #0]
 801df2a:	4b21      	ldr	r3, [pc, #132]	@ (801dfb0 <tcp_timewait_input+0xe0>)
 801df2c:	881b      	ldrh	r3, [r3, #0]
 801df2e:	461a      	mov	r2, r3
 801df30:	4b1d      	ldr	r3, [pc, #116]	@ (801dfa8 <tcp_timewait_input+0xd8>)
 801df32:	681b      	ldr	r3, [r3, #0]
 801df34:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801df36:	4b1f      	ldr	r3, [pc, #124]	@ (801dfb4 <tcp_timewait_input+0xe4>)
 801df38:	681b      	ldr	r3, [r3, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801df3a:	885b      	ldrh	r3, [r3, #2]
 801df3c:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801df3e:	4a1d      	ldr	r2, [pc, #116]	@ (801dfb4 <tcp_timewait_input+0xe4>)
 801df40:	6812      	ldr	r2, [r2, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801df42:	8812      	ldrh	r2, [r2, #0]
 801df44:	b292      	uxth	r2, r2
 801df46:	9202      	str	r2, [sp, #8]
 801df48:	9301      	str	r3, [sp, #4]
 801df4a:	4b1b      	ldr	r3, [pc, #108]	@ (801dfb8 <tcp_timewait_input+0xe8>)
 801df4c:	9300      	str	r3, [sp, #0]
 801df4e:	4b1b      	ldr	r3, [pc, #108]	@ (801dfbc <tcp_timewait_input+0xec>)
 801df50:	4602      	mov	r2, r0
 801df52:	6878      	ldr	r0, [r7, #4]
 801df54:	f003 fb38 	bl	80215c8 <tcp_rst>
      return;
 801df58:	e01b      	b.n	801df92 <tcp_timewait_input+0xc2>
    }
  } else if (flags & TCP_FIN) {
 801df5a:	4b0f      	ldr	r3, [pc, #60]	@ (801df98 <tcp_timewait_input+0xc8>)
 801df5c:	781b      	ldrb	r3, [r3, #0]
 801df5e:	f003 0301 	and.w	r3, r3, #1
 801df62:	2b00      	cmp	r3, #0
 801df64:	d003      	beq.n	801df6e <tcp_timewait_input+0x9e>
    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
         Restart the 2 MSL time-wait timeout.*/
    pcb->tmr = tcp_ticks;
 801df66:	4b16      	ldr	r3, [pc, #88]	@ (801dfc0 <tcp_timewait_input+0xf0>)
 801df68:	681a      	ldr	r2, [r3, #0]
 801df6a:	687b      	ldr	r3, [r7, #4]
 801df6c:	621a      	str	r2, [r3, #32]
  }

  if ((tcplen > 0)) {
 801df6e:	4b10      	ldr	r3, [pc, #64]	@ (801dfb0 <tcp_timewait_input+0xe0>)
 801df70:	881b      	ldrh	r3, [r3, #0]
 801df72:	2b00      	cmp	r3, #0
 801df74:	d00c      	beq.n	801df90 <tcp_timewait_input+0xc0>
    /* Acknowledge data, FIN or out-of-window SYN */
    tcp_ack_now(pcb);
 801df76:	687b      	ldr	r3, [r7, #4]
 801df78:	8b5b      	ldrh	r3, [r3, #26]
 801df7a:	f043 0302 	orr.w	r3, r3, #2
 801df7e:	b29a      	uxth	r2, r3
 801df80:	687b      	ldr	r3, [r7, #4]
 801df82:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801df84:	6878      	ldr	r0, [r7, #4]
 801df86:	f002 fd5d 	bl	8020a44 <tcp_output>
  }
  return;
 801df8a:	e001      	b.n	801df90 <tcp_timewait_input+0xc0>
    return;
 801df8c:	bf00      	nop
 801df8e:	e000      	b.n	801df92 <tcp_timewait_input+0xc2>
  return;
 801df90:	bf00      	nop
}
 801df92:	3708      	adds	r7, #8
 801df94:	46bd      	mov	sp, r7
 801df96:	bd80      	pop	{r7, pc}
 801df98:	2402afb0 	.word	0x2402afb0
 801df9c:	0802fbf4 	.word	0x0802fbf4
 801dfa0:	0802fe0c 	.word	0x0802fe0c
 801dfa4:	0802fc40 	.word	0x0802fc40
 801dfa8:	2402afa4 	.word	0x2402afa4
 801dfac:	2402afa8 	.word	0x2402afa8
 801dfb0:	2402afae 	.word	0x2402afae
 801dfb4:	2402af94 	.word	0x2402af94
 801dfb8:	24024428 	.word	0x24024428
 801dfbc:	2402442c 	.word	0x2402442c
 801dfc0:	2402af68 	.word	0x2402af68

0801dfc4 <tcp_process>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static err_t
tcp_process(struct tcp_pcb *pcb)
{
 801dfc4:	b590      	push	{r4, r7, lr}
 801dfc6:	b08d      	sub	sp, #52	@ 0x34
 801dfc8:	af04      	add	r7, sp, #16
 801dfca:	6078      	str	r0, [r7, #4]
  struct tcp_seg *rseg;
  u8_t acceptable = 0;
 801dfcc:	2300      	movs	r3, #0
 801dfce:	77fb      	strb	r3, [r7, #31]
  err_t err;

  err = ERR_OK;
 801dfd0:	2300      	movs	r3, #0
 801dfd2:	77bb      	strb	r3, [r7, #30]

  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
 801dfd4:	687b      	ldr	r3, [r7, #4]
 801dfd6:	2b00      	cmp	r3, #0
 801dfd8:	d106      	bne.n	801dfe8 <tcp_process+0x24>
 801dfda:	4b9d      	ldr	r3, [pc, #628]	@ (801e250 <tcp_process+0x28c>)
 801dfdc:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 801dfe0:	499c      	ldr	r1, [pc, #624]	@ (801e254 <tcp_process+0x290>)
 801dfe2:	489d      	ldr	r0, [pc, #628]	@ (801e258 <tcp_process+0x294>)
 801dfe4:	f00c fbba 	bl	802a75c <iprintf>

  /* Process incoming RST segments. */
  if (flags & TCP_RST) {
 801dfe8:	4b9c      	ldr	r3, [pc, #624]	@ (801e25c <tcp_process+0x298>)
 801dfea:	781b      	ldrb	r3, [r3, #0]
 801dfec:	f003 0304 	and.w	r3, r3, #4
 801dff0:	2b00      	cmp	r3, #0
 801dff2:	d04e      	beq.n	801e092 <tcp_process+0xce>
    /* First, determine if the reset is acceptable. */
    if (pcb->state == SYN_SENT) {
 801dff4:	687b      	ldr	r3, [r7, #4]
 801dff6:	7d1b      	ldrb	r3, [r3, #20]
 801dff8:	2b02      	cmp	r3, #2
 801dffa:	d108      	bne.n	801e00e <tcp_process+0x4a>
      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
          the RST is acceptable if the ACK field acknowledges the SYN." */
      if (ackno == pcb->snd_nxt) {
 801dffc:	687b      	ldr	r3, [r7, #4]
 801dffe:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e000:	4b97      	ldr	r3, [pc, #604]	@ (801e260 <tcp_process+0x29c>)
 801e002:	681b      	ldr	r3, [r3, #0]
 801e004:	429a      	cmp	r2, r3
 801e006:	d123      	bne.n	801e050 <tcp_process+0x8c>
        acceptable = 1;
 801e008:	2301      	movs	r3, #1
 801e00a:	77fb      	strb	r3, [r7, #31]
 801e00c:	e020      	b.n	801e050 <tcp_process+0x8c>
      }
    } else {
      /* "In all states except SYN-SENT, all reset (RST) segments are validated
          by checking their SEQ-fields." */
      if (seqno == pcb->rcv_nxt) {
 801e00e:	687b      	ldr	r3, [r7, #4]
 801e010:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e012:	4b94      	ldr	r3, [pc, #592]	@ (801e264 <tcp_process+0x2a0>)
 801e014:	681b      	ldr	r3, [r3, #0]
 801e016:	429a      	cmp	r2, r3
 801e018:	d102      	bne.n	801e020 <tcp_process+0x5c>
        acceptable = 1;
 801e01a:	2301      	movs	r3, #1
 801e01c:	77fb      	strb	r3, [r7, #31]
 801e01e:	e017      	b.n	801e050 <tcp_process+0x8c>
      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801e020:	4b90      	ldr	r3, [pc, #576]	@ (801e264 <tcp_process+0x2a0>)
 801e022:	681a      	ldr	r2, [r3, #0]
 801e024:	687b      	ldr	r3, [r7, #4]
 801e026:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e028:	1ad3      	subs	r3, r2, r3
 801e02a:	2b00      	cmp	r3, #0
 801e02c:	db10      	blt.n	801e050 <tcp_process+0x8c>
 801e02e:	4b8d      	ldr	r3, [pc, #564]	@ (801e264 <tcp_process+0x2a0>)
 801e030:	681a      	ldr	r2, [r3, #0]
 801e032:	687b      	ldr	r3, [r7, #4]
 801e034:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e036:	6879      	ldr	r1, [r7, #4]
 801e038:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e03a:	440b      	add	r3, r1
 801e03c:	1ad3      	subs	r3, r2, r3
 801e03e:	2b00      	cmp	r3, #0
 801e040:	dc06      	bgt.n	801e050 <tcp_process+0x8c>
                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
        /* If the sequence number is inside the window, we send a challenge ACK
           and wait for a re-send with matching sequence number.
           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
           (RST spoofing attack), which is present in RFC 793 RST handling. */
        tcp_ack_now(pcb);
 801e042:	687b      	ldr	r3, [r7, #4]
 801e044:	8b5b      	ldrh	r3, [r3, #26]
 801e046:	f043 0302 	orr.w	r3, r3, #2
 801e04a:	b29a      	uxth	r2, r3
 801e04c:	687b      	ldr	r3, [r7, #4]
 801e04e:	835a      	strh	r2, [r3, #26]
      }
    }

    if (acceptable) {
 801e050:	7ffb      	ldrb	r3, [r7, #31]
 801e052:	2b00      	cmp	r3, #0
 801e054:	d01b      	beq.n	801e08e <tcp_process+0xca>
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
 801e056:	687b      	ldr	r3, [r7, #4]
 801e058:	7d1b      	ldrb	r3, [r3, #20]
 801e05a:	2b00      	cmp	r3, #0
 801e05c:	d106      	bne.n	801e06c <tcp_process+0xa8>
 801e05e:	4b7c      	ldr	r3, [pc, #496]	@ (801e250 <tcp_process+0x28c>)
 801e060:	f44f 724e 	mov.w	r2, #824	@ 0x338
 801e064:	4980      	ldr	r1, [pc, #512]	@ (801e268 <tcp_process+0x2a4>)
 801e066:	487c      	ldr	r0, [pc, #496]	@ (801e258 <tcp_process+0x294>)
 801e068:	f00c fb78 	bl	802a75c <iprintf>
      recv_flags |= TF_RESET;
 801e06c:	4b7f      	ldr	r3, [pc, #508]	@ (801e26c <tcp_process+0x2a8>)
 801e06e:	781b      	ldrb	r3, [r3, #0]
 801e070:	f043 0308 	orr.w	r3, r3, #8
 801e074:	b2da      	uxtb	r2, r3
 801e076:	4b7d      	ldr	r3, [pc, #500]	@ (801e26c <tcp_process+0x2a8>)
 801e078:	701a      	strb	r2, [r3, #0]
      tcp_clear_flags(pcb, TF_ACK_DELAY);
 801e07a:	687b      	ldr	r3, [r7, #4]
 801e07c:	8b5b      	ldrh	r3, [r3, #26]
 801e07e:	f023 0301 	bic.w	r3, r3, #1
 801e082:	b29a      	uxth	r2, r3
 801e084:	687b      	ldr	r3, [r7, #4]
 801e086:	835a      	strh	r2, [r3, #26]
      return ERR_RST;
 801e088:	f06f 030d 	mvn.w	r3, #13
 801e08c:	e37a      	b.n	801e784 <tcp_process+0x7c0>
    } else {
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                                    seqno, pcb->rcv_nxt));
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                              seqno, pcb->rcv_nxt));
      return ERR_OK;
 801e08e:	2300      	movs	r3, #0
 801e090:	e378      	b.n	801e784 <tcp_process+0x7c0>
    }
  }

  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
 801e092:	4b72      	ldr	r3, [pc, #456]	@ (801e25c <tcp_process+0x298>)
 801e094:	781b      	ldrb	r3, [r3, #0]
 801e096:	f003 0302 	and.w	r3, r3, #2
 801e09a:	2b00      	cmp	r3, #0
 801e09c:	d010      	beq.n	801e0c0 <tcp_process+0xfc>
 801e09e:	687b      	ldr	r3, [r7, #4]
 801e0a0:	7d1b      	ldrb	r3, [r3, #20]
 801e0a2:	2b02      	cmp	r3, #2
 801e0a4:	d00c      	beq.n	801e0c0 <tcp_process+0xfc>
 801e0a6:	687b      	ldr	r3, [r7, #4]
 801e0a8:	7d1b      	ldrb	r3, [r3, #20]
 801e0aa:	2b03      	cmp	r3, #3
 801e0ac:	d008      	beq.n	801e0c0 <tcp_process+0xfc>
    /* Cope with new connection attempt after remote end crashed */
    tcp_ack_now(pcb);
 801e0ae:	687b      	ldr	r3, [r7, #4]
 801e0b0:	8b5b      	ldrh	r3, [r3, #26]
 801e0b2:	f043 0302 	orr.w	r3, r3, #2
 801e0b6:	b29a      	uxth	r2, r3
 801e0b8:	687b      	ldr	r3, [r7, #4]
 801e0ba:	835a      	strh	r2, [r3, #26]
    return ERR_OK;
 801e0bc:	2300      	movs	r3, #0
 801e0be:	e361      	b.n	801e784 <tcp_process+0x7c0>
  }

  if ((pcb->flags & TF_RXCLOSED) == 0) {
 801e0c0:	687b      	ldr	r3, [r7, #4]
 801e0c2:	8b5b      	ldrh	r3, [r3, #26]
 801e0c4:	f003 0310 	and.w	r3, r3, #16
 801e0c8:	2b00      	cmp	r3, #0
 801e0ca:	d103      	bne.n	801e0d4 <tcp_process+0x110>
    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
    pcb->tmr = tcp_ticks;
 801e0cc:	4b68      	ldr	r3, [pc, #416]	@ (801e270 <tcp_process+0x2ac>)
 801e0ce:	681a      	ldr	r2, [r3, #0]
 801e0d0:	687b      	ldr	r3, [r7, #4]
 801e0d2:	621a      	str	r2, [r3, #32]
  }
  pcb->keep_cnt_sent = 0;
 801e0d4:	687b      	ldr	r3, [r7, #4]
 801e0d6:	2200      	movs	r2, #0
 801e0d8:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
  pcb->persist_probe = 0;
 801e0dc:	687b      	ldr	r3, [r7, #4]
 801e0de:	2200      	movs	r2, #0
 801e0e0:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a

  tcp_parseopt(pcb);
 801e0e4:	6878      	ldr	r0, [r7, #4]
 801e0e6:	f001 fc2b 	bl	801f940 <tcp_parseopt>

  /* Do different things depending on the TCP state. */
  switch (pcb->state) {
 801e0ea:	687b      	ldr	r3, [r7, #4]
 801e0ec:	7d1b      	ldrb	r3, [r3, #20]
 801e0ee:	3b02      	subs	r3, #2
 801e0f0:	2b07      	cmp	r3, #7
 801e0f2:	f200 8337 	bhi.w	801e764 <tcp_process+0x7a0>
 801e0f6:	a201      	add	r2, pc, #4	@ (adr r2, 801e0fc <tcp_process+0x138>)
 801e0f8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801e0fc:	0801e11d 	.word	0x0801e11d
 801e100:	0801e34d 	.word	0x0801e34d
 801e104:	0801e4c5 	.word	0x0801e4c5
 801e108:	0801e4ef 	.word	0x0801e4ef
 801e10c:	0801e613 	.word	0x0801e613
 801e110:	0801e4c5 	.word	0x0801e4c5
 801e114:	0801e69f 	.word	0x0801e69f
 801e118:	0801e72f 	.word	0x0801e72f
    case SYN_SENT:
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
      /* received SYN ACK with expected sequence number? */
      if ((flags & TCP_ACK) && (flags & TCP_SYN)
 801e11c:	4b4f      	ldr	r3, [pc, #316]	@ (801e25c <tcp_process+0x298>)
 801e11e:	781b      	ldrb	r3, [r3, #0]
 801e120:	f003 0310 	and.w	r3, r3, #16
 801e124:	2b00      	cmp	r3, #0
 801e126:	f000 80e4 	beq.w	801e2f2 <tcp_process+0x32e>
 801e12a:	4b4c      	ldr	r3, [pc, #304]	@ (801e25c <tcp_process+0x298>)
 801e12c:	781b      	ldrb	r3, [r3, #0]
 801e12e:	f003 0302 	and.w	r3, r3, #2
 801e132:	2b00      	cmp	r3, #0
 801e134:	f000 80dd 	beq.w	801e2f2 <tcp_process+0x32e>
          && (ackno == pcb->lastack + 1)) {
 801e138:	687b      	ldr	r3, [r7, #4]
 801e13a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e13c:	1c5a      	adds	r2, r3, #1
 801e13e:	4b48      	ldr	r3, [pc, #288]	@ (801e260 <tcp_process+0x29c>)
 801e140:	681b      	ldr	r3, [r3, #0]
 801e142:	429a      	cmp	r2, r3
 801e144:	f040 80d5 	bne.w	801e2f2 <tcp_process+0x32e>
        pcb->rcv_nxt = seqno + 1;
 801e148:	4b46      	ldr	r3, [pc, #280]	@ (801e264 <tcp_process+0x2a0>)
 801e14a:	681b      	ldr	r3, [r3, #0]
 801e14c:	1c5a      	adds	r2, r3, #1
 801e14e:	687b      	ldr	r3, [r7, #4]
 801e150:	625a      	str	r2, [r3, #36]	@ 0x24
        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801e152:	687b      	ldr	r3, [r7, #4]
 801e154:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e156:	687b      	ldr	r3, [r7, #4]
 801e158:	62da      	str	r2, [r3, #44]	@ 0x2c
        pcb->lastack = ackno;
 801e15a:	4b41      	ldr	r3, [pc, #260]	@ (801e260 <tcp_process+0x29c>)
 801e15c:	681a      	ldr	r2, [r3, #0]
 801e15e:	687b      	ldr	r3, [r7, #4]
 801e160:	645a      	str	r2, [r3, #68]	@ 0x44
        pcb->snd_wnd = tcphdr->wnd;
 801e162:	4b44      	ldr	r3, [pc, #272]	@ (801e274 <tcp_process+0x2b0>)
 801e164:	681b      	ldr	r3, [r3, #0]
 801e166:	89db      	ldrh	r3, [r3, #14]
 801e168:	b29a      	uxth	r2, r3
 801e16a:	687b      	ldr	r3, [r7, #4]
 801e16c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
        pcb->snd_wnd_max = pcb->snd_wnd;
 801e170:	687b      	ldr	r3, [r7, #4]
 801e172:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801e176:	687b      	ldr	r3, [r7, #4]
 801e178:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
 801e17c:	4b39      	ldr	r3, [pc, #228]	@ (801e264 <tcp_process+0x2a0>)
 801e17e:	681b      	ldr	r3, [r3, #0]
 801e180:	1e5a      	subs	r2, r3, #1
 801e182:	687b      	ldr	r3, [r7, #4]
 801e184:	655a      	str	r2, [r3, #84]	@ 0x54
        pcb->state = ESTABLISHED;
 801e186:	687b      	ldr	r3, [r7, #4]
 801e188:	2204      	movs	r2, #4
 801e18a:	751a      	strb	r2, [r3, #20]

#if TCP_CALCULATE_EFF_SEND_MSS
        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
 801e18c:	687b      	ldr	r3, [r7, #4]
 801e18e:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801e190:	687b      	ldr	r3, [r7, #4]
 801e192:	3304      	adds	r3, #4
 801e194:	4618      	mov	r0, r3
 801e196:	f007 fad3 	bl	8025740 <ip4_route>
 801e19a:	4601      	mov	r1, r0
 801e19c:	687b      	ldr	r3, [r7, #4]
 801e19e:	3304      	adds	r3, #4
 801e1a0:	461a      	mov	r2, r3
 801e1a2:	4620      	mov	r0, r4
 801e1a4:	f7ff f88a 	bl	801d2bc <tcp_eff_send_mss_netif>
 801e1a8:	4603      	mov	r3, r0
 801e1aa:	461a      	mov	r2, r3
 801e1ac:	687b      	ldr	r3, [r7, #4]
 801e1ae:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801e1b0:	687b      	ldr	r3, [r7, #4]
 801e1b2:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e1b4:	009a      	lsls	r2, r3, #2
 801e1b6:	687b      	ldr	r3, [r7, #4]
 801e1b8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e1ba:	005b      	lsls	r3, r3, #1
 801e1bc:	f241 111c 	movw	r1, #4380	@ 0x111c
 801e1c0:	428b      	cmp	r3, r1
 801e1c2:	bf38      	it	cc
 801e1c4:	460b      	movcc	r3, r1
 801e1c6:	429a      	cmp	r2, r3
 801e1c8:	d204      	bcs.n	801e1d4 <tcp_process+0x210>
 801e1ca:	687b      	ldr	r3, [r7, #4]
 801e1cc:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e1ce:	009b      	lsls	r3, r3, #2
 801e1d0:	b29b      	uxth	r3, r3
 801e1d2:	e00d      	b.n	801e1f0 <tcp_process+0x22c>
 801e1d4:	687b      	ldr	r3, [r7, #4]
 801e1d6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e1d8:	005b      	lsls	r3, r3, #1
 801e1da:	f241 121c 	movw	r2, #4380	@ 0x111c
 801e1de:	4293      	cmp	r3, r2
 801e1e0:	d904      	bls.n	801e1ec <tcp_process+0x228>
 801e1e2:	687b      	ldr	r3, [r7, #4]
 801e1e4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e1e6:	005b      	lsls	r3, r3, #1
 801e1e8:	b29b      	uxth	r3, r3
 801e1ea:	e001      	b.n	801e1f0 <tcp_process+0x22c>
 801e1ec:	f241 131c 	movw	r3, #4380	@ 0x111c
 801e1f0:	687a      	ldr	r2, [r7, #4]
 801e1f2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
                                     " ssthresh %"TCPWNDSIZE_F"\n",
                                     pcb->cwnd, pcb->ssthresh));
        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
 801e1f6:	687b      	ldr	r3, [r7, #4]
 801e1f8:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e1fc:	2b00      	cmp	r3, #0
 801e1fe:	d106      	bne.n	801e20e <tcp_process+0x24a>
 801e200:	4b13      	ldr	r3, [pc, #76]	@ (801e250 <tcp_process+0x28c>)
 801e202:	f44f 725b 	mov.w	r2, #876	@ 0x36c
 801e206:	491c      	ldr	r1, [pc, #112]	@ (801e278 <tcp_process+0x2b4>)
 801e208:	4813      	ldr	r0, [pc, #76]	@ (801e258 <tcp_process+0x294>)
 801e20a:	f00c faa7 	bl	802a75c <iprintf>
        --pcb->snd_queuelen;
 801e20e:	687b      	ldr	r3, [r7, #4]
 801e210:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e214:	3b01      	subs	r3, #1
 801e216:	b29a      	uxth	r2, r3
 801e218:	687b      	ldr	r3, [r7, #4]
 801e21a:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
        rseg = pcb->unacked;
 801e21e:	687b      	ldr	r3, [r7, #4]
 801e220:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e222:	617b      	str	r3, [r7, #20]
        if (rseg == NULL) {
 801e224:	697b      	ldr	r3, [r7, #20]
 801e226:	2b00      	cmp	r3, #0
 801e228:	d12a      	bne.n	801e280 <tcp_process+0x2bc>
          /* might happen if tcp_output fails in tcp_rexmit_rto()
             in which case the segment is on the unsent list */
          rseg = pcb->unsent;
 801e22a:	687b      	ldr	r3, [r7, #4]
 801e22c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e22e:	617b      	str	r3, [r7, #20]
          LWIP_ASSERT("no segment to free", rseg != NULL);
 801e230:	697b      	ldr	r3, [r7, #20]
 801e232:	2b00      	cmp	r3, #0
 801e234:	d106      	bne.n	801e244 <tcp_process+0x280>
 801e236:	4b06      	ldr	r3, [pc, #24]	@ (801e250 <tcp_process+0x28c>)
 801e238:	f44f 725d 	mov.w	r2, #884	@ 0x374
 801e23c:	490f      	ldr	r1, [pc, #60]	@ (801e27c <tcp_process+0x2b8>)
 801e23e:	4806      	ldr	r0, [pc, #24]	@ (801e258 <tcp_process+0x294>)
 801e240:	f00c fa8c 	bl	802a75c <iprintf>
          pcb->unsent = rseg->next;
 801e244:	697b      	ldr	r3, [r7, #20]
 801e246:	681a      	ldr	r2, [r3, #0]
 801e248:	687b      	ldr	r3, [r7, #4]
 801e24a:	66da      	str	r2, [r3, #108]	@ 0x6c
 801e24c:	e01c      	b.n	801e288 <tcp_process+0x2c4>
 801e24e:	bf00      	nop
 801e250:	0802fbf4 	.word	0x0802fbf4
 801e254:	0802fe2c 	.word	0x0802fe2c
 801e258:	0802fc40 	.word	0x0802fc40
 801e25c:	2402afb0 	.word	0x2402afb0
 801e260:	2402afa8 	.word	0x2402afa8
 801e264:	2402afa4 	.word	0x2402afa4
 801e268:	0802fe48 	.word	0x0802fe48
 801e26c:	2402afb1 	.word	0x2402afb1
 801e270:	2402af68 	.word	0x2402af68
 801e274:	2402af94 	.word	0x2402af94
 801e278:	0802fe68 	.word	0x0802fe68
 801e27c:	0802fe80 	.word	0x0802fe80
        } else {
          pcb->unacked = rseg->next;
 801e280:	697b      	ldr	r3, [r7, #20]
 801e282:	681a      	ldr	r2, [r3, #0]
 801e284:	687b      	ldr	r3, [r7, #4]
 801e286:	671a      	str	r2, [r3, #112]	@ 0x70
        }
        tcp_seg_free(rseg);
 801e288:	6978      	ldr	r0, [r7, #20]
 801e28a:	f7fe fc48 	bl	801cb1e <tcp_seg_free>

        /* If there's nothing left to acknowledge, stop the retransmit
           timer, otherwise reset it to start again */
        if (pcb->unacked == NULL) {
 801e28e:	687b      	ldr	r3, [r7, #4]
 801e290:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e292:	2b00      	cmp	r3, #0
 801e294:	d104      	bne.n	801e2a0 <tcp_process+0x2dc>
          pcb->rtime = -1;
 801e296:	687b      	ldr	r3, [r7, #4]
 801e298:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e29c:	861a      	strh	r2, [r3, #48]	@ 0x30
 801e29e:	e006      	b.n	801e2ae <tcp_process+0x2ea>
        } else {
          pcb->rtime = 0;
 801e2a0:	687b      	ldr	r3, [r7, #4]
 801e2a2:	2200      	movs	r2, #0
 801e2a4:	861a      	strh	r2, [r3, #48]	@ 0x30
          pcb->nrtx = 0;
 801e2a6:	687b      	ldr	r3, [r7, #4]
 801e2a8:	2200      	movs	r2, #0
 801e2aa:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
        }

        /* Call the user specified function to call when successfully
         * connected. */
        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
 801e2ae:	687b      	ldr	r3, [r7, #4]
 801e2b0:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801e2b4:	2b00      	cmp	r3, #0
 801e2b6:	d00a      	beq.n	801e2ce <tcp_process+0x30a>
 801e2b8:	687b      	ldr	r3, [r7, #4]
 801e2ba:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801e2be:	687a      	ldr	r2, [r7, #4]
 801e2c0:	6910      	ldr	r0, [r2, #16]
 801e2c2:	2200      	movs	r2, #0
 801e2c4:	6879      	ldr	r1, [r7, #4]
 801e2c6:	4798      	blx	r3
 801e2c8:	4603      	mov	r3, r0
 801e2ca:	77bb      	strb	r3, [r7, #30]
 801e2cc:	e001      	b.n	801e2d2 <tcp_process+0x30e>
 801e2ce:	2300      	movs	r3, #0
 801e2d0:	77bb      	strb	r3, [r7, #30]
        if (err == ERR_ABRT) {
 801e2d2:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e2d6:	f113 0f0d 	cmn.w	r3, #13
 801e2da:	d102      	bne.n	801e2e2 <tcp_process+0x31e>
          return ERR_ABRT;
 801e2dc:	f06f 030c 	mvn.w	r3, #12
 801e2e0:	e250      	b.n	801e784 <tcp_process+0x7c0>
        }
        tcp_ack_now(pcb);
 801e2e2:	687b      	ldr	r3, [r7, #4]
 801e2e4:	8b5b      	ldrh	r3, [r3, #26]
 801e2e6:	f043 0302 	orr.w	r3, r3, #2
 801e2ea:	b29a      	uxth	r2, r3
 801e2ec:	687b      	ldr	r3, [r7, #4]
 801e2ee:	835a      	strh	r2, [r3, #26]
        if (pcb->nrtx < TCP_SYNMAXRTX) {
          pcb->rtime = 0;
          tcp_rexmit_rto(pcb);
        }
      }
      break;
 801e2f0:	e23a      	b.n	801e768 <tcp_process+0x7a4>
      else if (flags & TCP_ACK) {
 801e2f2:	4b98      	ldr	r3, [pc, #608]	@ (801e554 <tcp_process+0x590>)
 801e2f4:	781b      	ldrb	r3, [r3, #0]
 801e2f6:	f003 0310 	and.w	r3, r3, #16
 801e2fa:	2b00      	cmp	r3, #0
 801e2fc:	f000 8234 	beq.w	801e768 <tcp_process+0x7a4>
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e300:	4b95      	ldr	r3, [pc, #596]	@ (801e558 <tcp_process+0x594>)
 801e302:	6819      	ldr	r1, [r3, #0]
 801e304:	4b95      	ldr	r3, [pc, #596]	@ (801e55c <tcp_process+0x598>)
 801e306:	881b      	ldrh	r3, [r3, #0]
 801e308:	461a      	mov	r2, r3
 801e30a:	4b95      	ldr	r3, [pc, #596]	@ (801e560 <tcp_process+0x59c>)
 801e30c:	681b      	ldr	r3, [r3, #0]
 801e30e:	18d0      	adds	r0, r2, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e310:	4b94      	ldr	r3, [pc, #592]	@ (801e564 <tcp_process+0x5a0>)
 801e312:	681b      	ldr	r3, [r3, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e314:	885b      	ldrh	r3, [r3, #2]
 801e316:	b29b      	uxth	r3, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e318:	4a92      	ldr	r2, [pc, #584]	@ (801e564 <tcp_process+0x5a0>)
 801e31a:	6812      	ldr	r2, [r2, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e31c:	8812      	ldrh	r2, [r2, #0]
 801e31e:	b292      	uxth	r2, r2
 801e320:	9202      	str	r2, [sp, #8]
 801e322:	9301      	str	r3, [sp, #4]
 801e324:	4b90      	ldr	r3, [pc, #576]	@ (801e568 <tcp_process+0x5a4>)
 801e326:	9300      	str	r3, [sp, #0]
 801e328:	4b90      	ldr	r3, [pc, #576]	@ (801e56c <tcp_process+0x5a8>)
 801e32a:	4602      	mov	r2, r0
 801e32c:	6878      	ldr	r0, [r7, #4]
 801e32e:	f003 f94b 	bl	80215c8 <tcp_rst>
        if (pcb->nrtx < TCP_SYNMAXRTX) {
 801e332:	687b      	ldr	r3, [r7, #4]
 801e334:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801e338:	2b05      	cmp	r3, #5
 801e33a:	f200 8215 	bhi.w	801e768 <tcp_process+0x7a4>
          pcb->rtime = 0;
 801e33e:	687b      	ldr	r3, [r7, #4]
 801e340:	2200      	movs	r2, #0
 801e342:	861a      	strh	r2, [r3, #48]	@ 0x30
          tcp_rexmit_rto(pcb);
 801e344:	6878      	ldr	r0, [r7, #4]
 801e346:	f002 ff17 	bl	8021178 <tcp_rexmit_rto>
      break;
 801e34a:	e20d      	b.n	801e768 <tcp_process+0x7a4>
    case SYN_RCVD:
      if (flags & TCP_ACK) {
 801e34c:	4b81      	ldr	r3, [pc, #516]	@ (801e554 <tcp_process+0x590>)
 801e34e:	781b      	ldrb	r3, [r3, #0]
 801e350:	f003 0310 	and.w	r3, r3, #16
 801e354:	2b00      	cmp	r3, #0
 801e356:	f000 80a1 	beq.w	801e49c <tcp_process+0x4d8>
        /* expected ACK number? */
        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e35a:	4b7f      	ldr	r3, [pc, #508]	@ (801e558 <tcp_process+0x594>)
 801e35c:	681a      	ldr	r2, [r3, #0]
 801e35e:	687b      	ldr	r3, [r7, #4]
 801e360:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e362:	1ad3      	subs	r3, r2, r3
 801e364:	3b01      	subs	r3, #1
 801e366:	2b00      	cmp	r3, #0
 801e368:	db7e      	blt.n	801e468 <tcp_process+0x4a4>
 801e36a:	4b7b      	ldr	r3, [pc, #492]	@ (801e558 <tcp_process+0x594>)
 801e36c:	681a      	ldr	r2, [r3, #0]
 801e36e:	687b      	ldr	r3, [r7, #4]
 801e370:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801e372:	1ad3      	subs	r3, r2, r3
 801e374:	2b00      	cmp	r3, #0
 801e376:	dc77      	bgt.n	801e468 <tcp_process+0x4a4>
          pcb->state = ESTABLISHED;
 801e378:	687b      	ldr	r3, [r7, #4]
 801e37a:	2204      	movs	r2, #4
 801e37c:	751a      	strb	r2, [r3, #20]
          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
          if (pcb->listener == NULL) {
 801e37e:	687b      	ldr	r3, [r7, #4]
 801e380:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e382:	2b00      	cmp	r3, #0
 801e384:	d102      	bne.n	801e38c <tcp_process+0x3c8>
            /* listen pcb might be closed by now */
            err = ERR_VAL;
 801e386:	23fa      	movs	r3, #250	@ 0xfa
 801e388:	77bb      	strb	r3, [r7, #30]
 801e38a:	e01d      	b.n	801e3c8 <tcp_process+0x404>
          } else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
          {
#if LWIP_CALLBACK_API
            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
 801e38c:	687b      	ldr	r3, [r7, #4]
 801e38e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e390:	699b      	ldr	r3, [r3, #24]
 801e392:	2b00      	cmp	r3, #0
 801e394:	d106      	bne.n	801e3a4 <tcp_process+0x3e0>
 801e396:	4b76      	ldr	r3, [pc, #472]	@ (801e570 <tcp_process+0x5ac>)
 801e398:	f44f 726a 	mov.w	r2, #936	@ 0x3a8
 801e39c:	4975      	ldr	r1, [pc, #468]	@ (801e574 <tcp_process+0x5b0>)
 801e39e:	4876      	ldr	r0, [pc, #472]	@ (801e578 <tcp_process+0x5b4>)
 801e3a0:	f00c f9dc 	bl	802a75c <iprintf>
#endif
            tcp_backlog_accepted(pcb);
            /* Call the accept function. */
            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
 801e3a4:	687b      	ldr	r3, [r7, #4]
 801e3a6:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e3a8:	699b      	ldr	r3, [r3, #24]
 801e3aa:	2b00      	cmp	r3, #0
 801e3ac:	d00a      	beq.n	801e3c4 <tcp_process+0x400>
 801e3ae:	687b      	ldr	r3, [r7, #4]
 801e3b0:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e3b2:	699b      	ldr	r3, [r3, #24]
 801e3b4:	687a      	ldr	r2, [r7, #4]
 801e3b6:	6910      	ldr	r0, [r2, #16]
 801e3b8:	2200      	movs	r2, #0
 801e3ba:	6879      	ldr	r1, [r7, #4]
 801e3bc:	4798      	blx	r3
 801e3be:	4603      	mov	r3, r0
 801e3c0:	77bb      	strb	r3, [r7, #30]
 801e3c2:	e001      	b.n	801e3c8 <tcp_process+0x404>
 801e3c4:	23f0      	movs	r3, #240	@ 0xf0
 801e3c6:	77bb      	strb	r3, [r7, #30]
          }
          if (err != ERR_OK) {
 801e3c8:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e3cc:	2b00      	cmp	r3, #0
 801e3ce:	d00a      	beq.n	801e3e6 <tcp_process+0x422>
            /* If the accept function returns with an error, we abort
             * the connection. */
            /* Already aborted? */
            if (err != ERR_ABRT) {
 801e3d0:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e3d4:	f113 0f0d 	cmn.w	r3, #13
 801e3d8:	d002      	beq.n	801e3e0 <tcp_process+0x41c>
              tcp_abort(pcb);
 801e3da:	6878      	ldr	r0, [r7, #4]
 801e3dc:	f7fd fd4c 	bl	801be78 <tcp_abort>
            }
            return ERR_ABRT;
 801e3e0:	f06f 030c 	mvn.w	r3, #12
 801e3e4:	e1ce      	b.n	801e784 <tcp_process+0x7c0>
          }
          /* If there was any data contained within this ACK,
           * we'd better pass it on to the application as well. */
          tcp_receive(pcb);
 801e3e6:	6878      	ldr	r0, [r7, #4]
 801e3e8:	f000 fae0 	bl	801e9ac <tcp_receive>

          /* Prevent ACK for SYN to generate a sent event */
          if (recv_acked != 0) {
 801e3ec:	4b63      	ldr	r3, [pc, #396]	@ (801e57c <tcp_process+0x5b8>)
 801e3ee:	881b      	ldrh	r3, [r3, #0]
 801e3f0:	2b00      	cmp	r3, #0
 801e3f2:	d005      	beq.n	801e400 <tcp_process+0x43c>
            recv_acked--;
 801e3f4:	4b61      	ldr	r3, [pc, #388]	@ (801e57c <tcp_process+0x5b8>)
 801e3f6:	881b      	ldrh	r3, [r3, #0]
 801e3f8:	3b01      	subs	r3, #1
 801e3fa:	b29a      	uxth	r2, r3
 801e3fc:	4b5f      	ldr	r3, [pc, #380]	@ (801e57c <tcp_process+0x5b8>)
 801e3fe:	801a      	strh	r2, [r3, #0]
          }

          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801e400:	687b      	ldr	r3, [r7, #4]
 801e402:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e404:	009a      	lsls	r2, r3, #2
 801e406:	687b      	ldr	r3, [r7, #4]
 801e408:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e40a:	005b      	lsls	r3, r3, #1
 801e40c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801e410:	428b      	cmp	r3, r1
 801e412:	bf38      	it	cc
 801e414:	460b      	movcc	r3, r1
 801e416:	429a      	cmp	r2, r3
 801e418:	d204      	bcs.n	801e424 <tcp_process+0x460>
 801e41a:	687b      	ldr	r3, [r7, #4]
 801e41c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e41e:	009b      	lsls	r3, r3, #2
 801e420:	b29b      	uxth	r3, r3
 801e422:	e00d      	b.n	801e440 <tcp_process+0x47c>
 801e424:	687b      	ldr	r3, [r7, #4]
 801e426:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e428:	005b      	lsls	r3, r3, #1
 801e42a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801e42e:	4293      	cmp	r3, r2
 801e430:	d904      	bls.n	801e43c <tcp_process+0x478>
 801e432:	687b      	ldr	r3, [r7, #4]
 801e434:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e436:	005b      	lsls	r3, r3, #1
 801e438:	b29b      	uxth	r3, r3
 801e43a:	e001      	b.n	801e440 <tcp_process+0x47c>
 801e43c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801e440:	687a      	ldr	r2, [r7, #4]
 801e442:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
                                       " ssthresh %"TCPWNDSIZE_F"\n",
                                       pcb->cwnd, pcb->ssthresh));

          if (recv_flags & TF_GOT_FIN) {
 801e446:	4b4e      	ldr	r3, [pc, #312]	@ (801e580 <tcp_process+0x5bc>)
 801e448:	781b      	ldrb	r3, [r3, #0]
 801e44a:	f003 0320 	and.w	r3, r3, #32
 801e44e:	2b00      	cmp	r3, #0
 801e450:	d037      	beq.n	801e4c2 <tcp_process+0x4fe>
            tcp_ack_now(pcb);
 801e452:	687b      	ldr	r3, [r7, #4]
 801e454:	8b5b      	ldrh	r3, [r3, #26]
 801e456:	f043 0302 	orr.w	r3, r3, #2
 801e45a:	b29a      	uxth	r2, r3
 801e45c:	687b      	ldr	r3, [r7, #4]
 801e45e:	835a      	strh	r2, [r3, #26]
            pcb->state = CLOSE_WAIT;
 801e460:	687b      	ldr	r3, [r7, #4]
 801e462:	2207      	movs	r2, #7
 801e464:	751a      	strb	r2, [r3, #20]
          if (recv_flags & TF_GOT_FIN) {
 801e466:	e02c      	b.n	801e4c2 <tcp_process+0x4fe>
          }
        } else {
          /* incorrect ACK number, send RST */
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e468:	4b3b      	ldr	r3, [pc, #236]	@ (801e558 <tcp_process+0x594>)
 801e46a:	6819      	ldr	r1, [r3, #0]
 801e46c:	4b3b      	ldr	r3, [pc, #236]	@ (801e55c <tcp_process+0x598>)
 801e46e:	881b      	ldrh	r3, [r3, #0]
 801e470:	461a      	mov	r2, r3
 801e472:	4b3b      	ldr	r3, [pc, #236]	@ (801e560 <tcp_process+0x59c>)
 801e474:	681b      	ldr	r3, [r3, #0]
 801e476:	18d0      	adds	r0, r2, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e478:	4b3a      	ldr	r3, [pc, #232]	@ (801e564 <tcp_process+0x5a0>)
 801e47a:	681b      	ldr	r3, [r3, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e47c:	885b      	ldrh	r3, [r3, #2]
 801e47e:	b29b      	uxth	r3, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e480:	4a38      	ldr	r2, [pc, #224]	@ (801e564 <tcp_process+0x5a0>)
 801e482:	6812      	ldr	r2, [r2, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e484:	8812      	ldrh	r2, [r2, #0]
 801e486:	b292      	uxth	r2, r2
 801e488:	9202      	str	r2, [sp, #8]
 801e48a:	9301      	str	r3, [sp, #4]
 801e48c:	4b36      	ldr	r3, [pc, #216]	@ (801e568 <tcp_process+0x5a4>)
 801e48e:	9300      	str	r3, [sp, #0]
 801e490:	4b36      	ldr	r3, [pc, #216]	@ (801e56c <tcp_process+0x5a8>)
 801e492:	4602      	mov	r2, r0
 801e494:	6878      	ldr	r0, [r7, #4]
 801e496:	f003 f897 	bl	80215c8 <tcp_rst>
        }
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
        tcp_rexmit(pcb);
      }
      break;
 801e49a:	e167      	b.n	801e76c <tcp_process+0x7a8>
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
 801e49c:	4b2d      	ldr	r3, [pc, #180]	@ (801e554 <tcp_process+0x590>)
 801e49e:	781b      	ldrb	r3, [r3, #0]
 801e4a0:	f003 0302 	and.w	r3, r3, #2
 801e4a4:	2b00      	cmp	r3, #0
 801e4a6:	f000 8161 	beq.w	801e76c <tcp_process+0x7a8>
 801e4aa:	687b      	ldr	r3, [r7, #4]
 801e4ac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e4ae:	1e5a      	subs	r2, r3, #1
 801e4b0:	4b2b      	ldr	r3, [pc, #172]	@ (801e560 <tcp_process+0x59c>)
 801e4b2:	681b      	ldr	r3, [r3, #0]
 801e4b4:	429a      	cmp	r2, r3
 801e4b6:	f040 8159 	bne.w	801e76c <tcp_process+0x7a8>
        tcp_rexmit(pcb);
 801e4ba:	6878      	ldr	r0, [r7, #4]
 801e4bc:	f002 fe7e 	bl	80211bc <tcp_rexmit>
      break;
 801e4c0:	e154      	b.n	801e76c <tcp_process+0x7a8>
 801e4c2:	e153      	b.n	801e76c <tcp_process+0x7a8>
    case CLOSE_WAIT:
    /* FALLTHROUGH */
    case ESTABLISHED:
      tcp_receive(pcb);
 801e4c4:	6878      	ldr	r0, [r7, #4]
 801e4c6:	f000 fa71 	bl	801e9ac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) { /* passive close */
 801e4ca:	4b2d      	ldr	r3, [pc, #180]	@ (801e580 <tcp_process+0x5bc>)
 801e4cc:	781b      	ldrb	r3, [r3, #0]
 801e4ce:	f003 0320 	and.w	r3, r3, #32
 801e4d2:	2b00      	cmp	r3, #0
 801e4d4:	f000 814c 	beq.w	801e770 <tcp_process+0x7ac>
        tcp_ack_now(pcb);
 801e4d8:	687b      	ldr	r3, [r7, #4]
 801e4da:	8b5b      	ldrh	r3, [r3, #26]
 801e4dc:	f043 0302 	orr.w	r3, r3, #2
 801e4e0:	b29a      	uxth	r2, r3
 801e4e2:	687b      	ldr	r3, [r7, #4]
 801e4e4:	835a      	strh	r2, [r3, #26]
        pcb->state = CLOSE_WAIT;
 801e4e6:	687b      	ldr	r3, [r7, #4]
 801e4e8:	2207      	movs	r2, #7
 801e4ea:	751a      	strb	r2, [r3, #20]
      }
      break;
 801e4ec:	e140      	b.n	801e770 <tcp_process+0x7ac>
    case FIN_WAIT_1:
      tcp_receive(pcb);
 801e4ee:	6878      	ldr	r0, [r7, #4]
 801e4f0:	f000 fa5c 	bl	801e9ac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801e4f4:	4b22      	ldr	r3, [pc, #136]	@ (801e580 <tcp_process+0x5bc>)
 801e4f6:	781b      	ldrb	r3, [r3, #0]
 801e4f8:	f003 0320 	and.w	r3, r3, #32
 801e4fc:	2b00      	cmp	r3, #0
 801e4fe:	d071      	beq.n	801e5e4 <tcp_process+0x620>
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e500:	4b14      	ldr	r3, [pc, #80]	@ (801e554 <tcp_process+0x590>)
 801e502:	781b      	ldrb	r3, [r3, #0]
 801e504:	f003 0310 	and.w	r3, r3, #16
 801e508:	2b00      	cmp	r3, #0
 801e50a:	d060      	beq.n	801e5ce <tcp_process+0x60a>
 801e50c:	687b      	ldr	r3, [r7, #4]
 801e50e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e510:	4b11      	ldr	r3, [pc, #68]	@ (801e558 <tcp_process+0x594>)
 801e512:	681b      	ldr	r3, [r3, #0]
 801e514:	429a      	cmp	r2, r3
 801e516:	d15a      	bne.n	801e5ce <tcp_process+0x60a>
            pcb->unsent == NULL) {
 801e518:	687b      	ldr	r3, [r7, #4]
 801e51a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e51c:	2b00      	cmp	r3, #0
 801e51e:	d156      	bne.n	801e5ce <tcp_process+0x60a>
          LWIP_DEBUGF(TCP_DEBUG,
                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
          tcp_ack_now(pcb);
 801e520:	687b      	ldr	r3, [r7, #4]
 801e522:	8b5b      	ldrh	r3, [r3, #26]
 801e524:	f043 0302 	orr.w	r3, r3, #2
 801e528:	b29a      	uxth	r2, r3
 801e52a:	687b      	ldr	r3, [r7, #4]
 801e52c:	835a      	strh	r2, [r3, #26]
          tcp_pcb_purge(pcb);
 801e52e:	6878      	ldr	r0, [r7, #4]
 801e530:	f7fe fdba 	bl	801d0a8 <tcp_pcb_purge>
          TCP_RMV_ACTIVE(pcb);
 801e534:	4b13      	ldr	r3, [pc, #76]	@ (801e584 <tcp_process+0x5c0>)
 801e536:	681b      	ldr	r3, [r3, #0]
 801e538:	687a      	ldr	r2, [r7, #4]
 801e53a:	429a      	cmp	r2, r3
 801e53c:	d105      	bne.n	801e54a <tcp_process+0x586>
 801e53e:	4b11      	ldr	r3, [pc, #68]	@ (801e584 <tcp_process+0x5c0>)
 801e540:	681b      	ldr	r3, [r3, #0]
 801e542:	68db      	ldr	r3, [r3, #12]
 801e544:	4a0f      	ldr	r2, [pc, #60]	@ (801e584 <tcp_process+0x5c0>)
 801e546:	6013      	str	r3, [r2, #0]
 801e548:	e02e      	b.n	801e5a8 <tcp_process+0x5e4>
 801e54a:	4b0e      	ldr	r3, [pc, #56]	@ (801e584 <tcp_process+0x5c0>)
 801e54c:	681b      	ldr	r3, [r3, #0]
 801e54e:	613b      	str	r3, [r7, #16]
 801e550:	e027      	b.n	801e5a2 <tcp_process+0x5de>
 801e552:	bf00      	nop
 801e554:	2402afb0 	.word	0x2402afb0
 801e558:	2402afa8 	.word	0x2402afa8
 801e55c:	2402afae 	.word	0x2402afae
 801e560:	2402afa4 	.word	0x2402afa4
 801e564:	2402af94 	.word	0x2402af94
 801e568:	24024428 	.word	0x24024428
 801e56c:	2402442c 	.word	0x2402442c
 801e570:	0802fbf4 	.word	0x0802fbf4
 801e574:	0802fe94 	.word	0x0802fe94
 801e578:	0802fc40 	.word	0x0802fc40
 801e57c:	2402afac 	.word	0x2402afac
 801e580:	2402afb1 	.word	0x2402afb1
 801e584:	2402af74 	.word	0x2402af74
 801e588:	693b      	ldr	r3, [r7, #16]
 801e58a:	68db      	ldr	r3, [r3, #12]
 801e58c:	687a      	ldr	r2, [r7, #4]
 801e58e:	429a      	cmp	r2, r3
 801e590:	d104      	bne.n	801e59c <tcp_process+0x5d8>
 801e592:	687b      	ldr	r3, [r7, #4]
 801e594:	68da      	ldr	r2, [r3, #12]
 801e596:	693b      	ldr	r3, [r7, #16]
 801e598:	60da      	str	r2, [r3, #12]
 801e59a:	e005      	b.n	801e5a8 <tcp_process+0x5e4>
 801e59c:	693b      	ldr	r3, [r7, #16]
 801e59e:	68db      	ldr	r3, [r3, #12]
 801e5a0:	613b      	str	r3, [r7, #16]
 801e5a2:	693b      	ldr	r3, [r7, #16]
 801e5a4:	2b00      	cmp	r3, #0
 801e5a6:	d1ef      	bne.n	801e588 <tcp_process+0x5c4>
 801e5a8:	687b      	ldr	r3, [r7, #4]
 801e5aa:	2200      	movs	r2, #0
 801e5ac:	60da      	str	r2, [r3, #12]
 801e5ae:	4b77      	ldr	r3, [pc, #476]	@ (801e78c <tcp_process+0x7c8>)
 801e5b0:	2201      	movs	r2, #1
 801e5b2:	701a      	strb	r2, [r3, #0]
          pcb->state = TIME_WAIT;
 801e5b4:	687b      	ldr	r3, [r7, #4]
 801e5b6:	220a      	movs	r2, #10
 801e5b8:	751a      	strb	r2, [r3, #20]
          TCP_REG(&tcp_tw_pcbs, pcb);
 801e5ba:	4b75      	ldr	r3, [pc, #468]	@ (801e790 <tcp_process+0x7cc>)
 801e5bc:	681a      	ldr	r2, [r3, #0]
 801e5be:	687b      	ldr	r3, [r7, #4]
 801e5c0:	60da      	str	r2, [r3, #12]
 801e5c2:	4a73      	ldr	r2, [pc, #460]	@ (801e790 <tcp_process+0x7cc>)
 801e5c4:	687b      	ldr	r3, [r7, #4]
 801e5c6:	6013      	str	r3, [r2, #0]
 801e5c8:	f003 f9c0 	bl	802194c <tcp_timer_needed>
        }
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
                 pcb->unsent == NULL) {
        pcb->state = FIN_WAIT_2;
      }
      break;
 801e5cc:	e0d2      	b.n	801e774 <tcp_process+0x7b0>
          tcp_ack_now(pcb);
 801e5ce:	687b      	ldr	r3, [r7, #4]
 801e5d0:	8b5b      	ldrh	r3, [r3, #26]
 801e5d2:	f043 0302 	orr.w	r3, r3, #2
 801e5d6:	b29a      	uxth	r2, r3
 801e5d8:	687b      	ldr	r3, [r7, #4]
 801e5da:	835a      	strh	r2, [r3, #26]
          pcb->state = CLOSING;
 801e5dc:	687b      	ldr	r3, [r7, #4]
 801e5de:	2208      	movs	r2, #8
 801e5e0:	751a      	strb	r2, [r3, #20]
      break;
 801e5e2:	e0c7      	b.n	801e774 <tcp_process+0x7b0>
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e5e4:	4b6b      	ldr	r3, [pc, #428]	@ (801e794 <tcp_process+0x7d0>)
 801e5e6:	781b      	ldrb	r3, [r3, #0]
 801e5e8:	f003 0310 	and.w	r3, r3, #16
 801e5ec:	2b00      	cmp	r3, #0
 801e5ee:	f000 80c1 	beq.w	801e774 <tcp_process+0x7b0>
 801e5f2:	687b      	ldr	r3, [r7, #4]
 801e5f4:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e5f6:	4b68      	ldr	r3, [pc, #416]	@ (801e798 <tcp_process+0x7d4>)
 801e5f8:	681b      	ldr	r3, [r3, #0]
 801e5fa:	429a      	cmp	r2, r3
 801e5fc:	f040 80ba 	bne.w	801e774 <tcp_process+0x7b0>
                 pcb->unsent == NULL) {
 801e600:	687b      	ldr	r3, [r7, #4]
 801e602:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e604:	2b00      	cmp	r3, #0
 801e606:	f040 80b5 	bne.w	801e774 <tcp_process+0x7b0>
        pcb->state = FIN_WAIT_2;
 801e60a:	687b      	ldr	r3, [r7, #4]
 801e60c:	2206      	movs	r2, #6
 801e60e:	751a      	strb	r2, [r3, #20]
      break;
 801e610:	e0b0      	b.n	801e774 <tcp_process+0x7b0>
    case FIN_WAIT_2:
      tcp_receive(pcb);
 801e612:	6878      	ldr	r0, [r7, #4]
 801e614:	f000 f9ca 	bl	801e9ac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801e618:	4b60      	ldr	r3, [pc, #384]	@ (801e79c <tcp_process+0x7d8>)
 801e61a:	781b      	ldrb	r3, [r3, #0]
 801e61c:	f003 0320 	and.w	r3, r3, #32
 801e620:	2b00      	cmp	r3, #0
 801e622:	f000 80a9 	beq.w	801e778 <tcp_process+0x7b4>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_ack_now(pcb);
 801e626:	687b      	ldr	r3, [r7, #4]
 801e628:	8b5b      	ldrh	r3, [r3, #26]
 801e62a:	f043 0302 	orr.w	r3, r3, #2
 801e62e:	b29a      	uxth	r2, r3
 801e630:	687b      	ldr	r3, [r7, #4]
 801e632:	835a      	strh	r2, [r3, #26]
        tcp_pcb_purge(pcb);
 801e634:	6878      	ldr	r0, [r7, #4]
 801e636:	f7fe fd37 	bl	801d0a8 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e63a:	4b59      	ldr	r3, [pc, #356]	@ (801e7a0 <tcp_process+0x7dc>)
 801e63c:	681b      	ldr	r3, [r3, #0]
 801e63e:	687a      	ldr	r2, [r7, #4]
 801e640:	429a      	cmp	r2, r3
 801e642:	d105      	bne.n	801e650 <tcp_process+0x68c>
 801e644:	4b56      	ldr	r3, [pc, #344]	@ (801e7a0 <tcp_process+0x7dc>)
 801e646:	681b      	ldr	r3, [r3, #0]
 801e648:	68db      	ldr	r3, [r3, #12]
 801e64a:	4a55      	ldr	r2, [pc, #340]	@ (801e7a0 <tcp_process+0x7dc>)
 801e64c:	6013      	str	r3, [r2, #0]
 801e64e:	e013      	b.n	801e678 <tcp_process+0x6b4>
 801e650:	4b53      	ldr	r3, [pc, #332]	@ (801e7a0 <tcp_process+0x7dc>)
 801e652:	681b      	ldr	r3, [r3, #0]
 801e654:	60fb      	str	r3, [r7, #12]
 801e656:	e00c      	b.n	801e672 <tcp_process+0x6ae>
 801e658:	68fb      	ldr	r3, [r7, #12]
 801e65a:	68db      	ldr	r3, [r3, #12]
 801e65c:	687a      	ldr	r2, [r7, #4]
 801e65e:	429a      	cmp	r2, r3
 801e660:	d104      	bne.n	801e66c <tcp_process+0x6a8>
 801e662:	687b      	ldr	r3, [r7, #4]
 801e664:	68da      	ldr	r2, [r3, #12]
 801e666:	68fb      	ldr	r3, [r7, #12]
 801e668:	60da      	str	r2, [r3, #12]
 801e66a:	e005      	b.n	801e678 <tcp_process+0x6b4>
 801e66c:	68fb      	ldr	r3, [r7, #12]
 801e66e:	68db      	ldr	r3, [r3, #12]
 801e670:	60fb      	str	r3, [r7, #12]
 801e672:	68fb      	ldr	r3, [r7, #12]
 801e674:	2b00      	cmp	r3, #0
 801e676:	d1ef      	bne.n	801e658 <tcp_process+0x694>
 801e678:	687b      	ldr	r3, [r7, #4]
 801e67a:	2200      	movs	r2, #0
 801e67c:	60da      	str	r2, [r3, #12]
 801e67e:	4b43      	ldr	r3, [pc, #268]	@ (801e78c <tcp_process+0x7c8>)
 801e680:	2201      	movs	r2, #1
 801e682:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801e684:	687b      	ldr	r3, [r7, #4]
 801e686:	220a      	movs	r2, #10
 801e688:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801e68a:	4b41      	ldr	r3, [pc, #260]	@ (801e790 <tcp_process+0x7cc>)
 801e68c:	681a      	ldr	r2, [r3, #0]
 801e68e:	687b      	ldr	r3, [r7, #4]
 801e690:	60da      	str	r2, [r3, #12]
 801e692:	4a3f      	ldr	r2, [pc, #252]	@ (801e790 <tcp_process+0x7cc>)
 801e694:	687b      	ldr	r3, [r7, #4]
 801e696:	6013      	str	r3, [r2, #0]
 801e698:	f003 f958 	bl	802194c <tcp_timer_needed>
      }
      break;
 801e69c:	e06c      	b.n	801e778 <tcp_process+0x7b4>
    case CLOSING:
      tcp_receive(pcb);
 801e69e:	6878      	ldr	r0, [r7, #4]
 801e6a0:	f000 f984 	bl	801e9ac <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801e6a4:	4b3b      	ldr	r3, [pc, #236]	@ (801e794 <tcp_process+0x7d0>)
 801e6a6:	781b      	ldrb	r3, [r3, #0]
 801e6a8:	f003 0310 	and.w	r3, r3, #16
 801e6ac:	2b00      	cmp	r3, #0
 801e6ae:	d065      	beq.n	801e77c <tcp_process+0x7b8>
 801e6b0:	687b      	ldr	r3, [r7, #4]
 801e6b2:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e6b4:	4b38      	ldr	r3, [pc, #224]	@ (801e798 <tcp_process+0x7d4>)
 801e6b6:	681b      	ldr	r3, [r3, #0]
 801e6b8:	429a      	cmp	r2, r3
 801e6ba:	d15f      	bne.n	801e77c <tcp_process+0x7b8>
 801e6bc:	687b      	ldr	r3, [r7, #4]
 801e6be:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e6c0:	2b00      	cmp	r3, #0
 801e6c2:	d15b      	bne.n	801e77c <tcp_process+0x7b8>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_pcb_purge(pcb);
 801e6c4:	6878      	ldr	r0, [r7, #4]
 801e6c6:	f7fe fcef 	bl	801d0a8 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e6ca:	4b35      	ldr	r3, [pc, #212]	@ (801e7a0 <tcp_process+0x7dc>)
 801e6cc:	681b      	ldr	r3, [r3, #0]
 801e6ce:	687a      	ldr	r2, [r7, #4]
 801e6d0:	429a      	cmp	r2, r3
 801e6d2:	d105      	bne.n	801e6e0 <tcp_process+0x71c>
 801e6d4:	4b32      	ldr	r3, [pc, #200]	@ (801e7a0 <tcp_process+0x7dc>)
 801e6d6:	681b      	ldr	r3, [r3, #0]
 801e6d8:	68db      	ldr	r3, [r3, #12]
 801e6da:	4a31      	ldr	r2, [pc, #196]	@ (801e7a0 <tcp_process+0x7dc>)
 801e6dc:	6013      	str	r3, [r2, #0]
 801e6de:	e013      	b.n	801e708 <tcp_process+0x744>
 801e6e0:	4b2f      	ldr	r3, [pc, #188]	@ (801e7a0 <tcp_process+0x7dc>)
 801e6e2:	681b      	ldr	r3, [r3, #0]
 801e6e4:	61bb      	str	r3, [r7, #24]
 801e6e6:	e00c      	b.n	801e702 <tcp_process+0x73e>
 801e6e8:	69bb      	ldr	r3, [r7, #24]
 801e6ea:	68db      	ldr	r3, [r3, #12]
 801e6ec:	687a      	ldr	r2, [r7, #4]
 801e6ee:	429a      	cmp	r2, r3
 801e6f0:	d104      	bne.n	801e6fc <tcp_process+0x738>
 801e6f2:	687b      	ldr	r3, [r7, #4]
 801e6f4:	68da      	ldr	r2, [r3, #12]
 801e6f6:	69bb      	ldr	r3, [r7, #24]
 801e6f8:	60da      	str	r2, [r3, #12]
 801e6fa:	e005      	b.n	801e708 <tcp_process+0x744>
 801e6fc:	69bb      	ldr	r3, [r7, #24]
 801e6fe:	68db      	ldr	r3, [r3, #12]
 801e700:	61bb      	str	r3, [r7, #24]
 801e702:	69bb      	ldr	r3, [r7, #24]
 801e704:	2b00      	cmp	r3, #0
 801e706:	d1ef      	bne.n	801e6e8 <tcp_process+0x724>
 801e708:	687b      	ldr	r3, [r7, #4]
 801e70a:	2200      	movs	r2, #0
 801e70c:	60da      	str	r2, [r3, #12]
 801e70e:	4b1f      	ldr	r3, [pc, #124]	@ (801e78c <tcp_process+0x7c8>)
 801e710:	2201      	movs	r2, #1
 801e712:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801e714:	687b      	ldr	r3, [r7, #4]
 801e716:	220a      	movs	r2, #10
 801e718:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801e71a:	4b1d      	ldr	r3, [pc, #116]	@ (801e790 <tcp_process+0x7cc>)
 801e71c:	681a      	ldr	r2, [r3, #0]
 801e71e:	687b      	ldr	r3, [r7, #4]
 801e720:	60da      	str	r2, [r3, #12]
 801e722:	4a1b      	ldr	r2, [pc, #108]	@ (801e790 <tcp_process+0x7cc>)
 801e724:	687b      	ldr	r3, [r7, #4]
 801e726:	6013      	str	r3, [r2, #0]
 801e728:	f003 f910 	bl	802194c <tcp_timer_needed>
      }
      break;
 801e72c:	e026      	b.n	801e77c <tcp_process+0x7b8>
    case LAST_ACK:
      tcp_receive(pcb);
 801e72e:	6878      	ldr	r0, [r7, #4]
 801e730:	f000 f93c 	bl	801e9ac <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801e734:	4b17      	ldr	r3, [pc, #92]	@ (801e794 <tcp_process+0x7d0>)
 801e736:	781b      	ldrb	r3, [r3, #0]
 801e738:	f003 0310 	and.w	r3, r3, #16
 801e73c:	2b00      	cmp	r3, #0
 801e73e:	d01f      	beq.n	801e780 <tcp_process+0x7bc>
 801e740:	687b      	ldr	r3, [r7, #4]
 801e742:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e744:	4b14      	ldr	r3, [pc, #80]	@ (801e798 <tcp_process+0x7d4>)
 801e746:	681b      	ldr	r3, [r3, #0]
 801e748:	429a      	cmp	r2, r3
 801e74a:	d119      	bne.n	801e780 <tcp_process+0x7bc>
 801e74c:	687b      	ldr	r3, [r7, #4]
 801e74e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e750:	2b00      	cmp	r3, #0
 801e752:	d115      	bne.n	801e780 <tcp_process+0x7bc>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
        recv_flags |= TF_CLOSED;
 801e754:	4b11      	ldr	r3, [pc, #68]	@ (801e79c <tcp_process+0x7d8>)
 801e756:	781b      	ldrb	r3, [r3, #0]
 801e758:	f043 0310 	orr.w	r3, r3, #16
 801e75c:	b2da      	uxtb	r2, r3
 801e75e:	4b0f      	ldr	r3, [pc, #60]	@ (801e79c <tcp_process+0x7d8>)
 801e760:	701a      	strb	r2, [r3, #0]
      }
      break;
 801e762:	e00d      	b.n	801e780 <tcp_process+0x7bc>
    default:
      break;
 801e764:	bf00      	nop
 801e766:	e00c      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e768:	bf00      	nop
 801e76a:	e00a      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e76c:	bf00      	nop
 801e76e:	e008      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e770:	bf00      	nop
 801e772:	e006      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e774:	bf00      	nop
 801e776:	e004      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e778:	bf00      	nop
 801e77a:	e002      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e77c:	bf00      	nop
 801e77e:	e000      	b.n	801e782 <tcp_process+0x7be>
      break;
 801e780:	bf00      	nop
  }
  return ERR_OK;
 801e782:	2300      	movs	r3, #0
}
 801e784:	4618      	mov	r0, r3
 801e786:	3724      	adds	r7, #36	@ 0x24
 801e788:	46bd      	mov	sp, r7
 801e78a:	bd90      	pop	{r4, r7, pc}
 801e78c:	2402af7c 	.word	0x2402af7c
 801e790:	2402af78 	.word	0x2402af78
 801e794:	2402afb0 	.word	0x2402afb0
 801e798:	2402afa8 	.word	0x2402afa8
 801e79c:	2402afb1 	.word	0x2402afb1
 801e7a0:	2402af74 	.word	0x2402af74

0801e7a4 <tcp_oos_insert_segment>:
 *
 * Called from tcp_receive()
 */
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
 801e7a4:	b590      	push	{r4, r7, lr}
 801e7a6:	b085      	sub	sp, #20
 801e7a8:	af00      	add	r7, sp, #0
 801e7aa:	6078      	str	r0, [r7, #4]
 801e7ac:	6039      	str	r1, [r7, #0]
  struct tcp_seg *old_seg;

  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
 801e7ae:	687b      	ldr	r3, [r7, #4]
 801e7b0:	2b00      	cmp	r3, #0
 801e7b2:	d106      	bne.n	801e7c2 <tcp_oos_insert_segment+0x1e>
 801e7b4:	4b3b      	ldr	r3, [pc, #236]	@ (801e8a4 <tcp_oos_insert_segment+0x100>)
 801e7b6:	f240 421f 	movw	r2, #1055	@ 0x41f
 801e7ba:	493b      	ldr	r1, [pc, #236]	@ (801e8a8 <tcp_oos_insert_segment+0x104>)
 801e7bc:	483b      	ldr	r0, [pc, #236]	@ (801e8ac <tcp_oos_insert_segment+0x108>)
 801e7be:	f00b ffcd 	bl	802a75c <iprintf>

  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801e7c2:	687b      	ldr	r3, [r7, #4]
 801e7c4:	691b      	ldr	r3, [r3, #16]
 801e7c6:	899b      	ldrh	r3, [r3, #12]
 801e7c8:	b29b      	uxth	r3, r3
 801e7ca:	4618      	mov	r0, r3
 801e7cc:	f7fb f86c 	bl	80198a8 <lwip_htons>
 801e7d0:	4603      	mov	r3, r0
 801e7d2:	b2db      	uxtb	r3, r3
 801e7d4:	f003 0301 	and.w	r3, r3, #1
 801e7d8:	2b00      	cmp	r3, #0
 801e7da:	d028      	beq.n	801e82e <tcp_oos_insert_segment+0x8a>
    /* received segment overlaps all following segments */
    tcp_segs_free(next);
 801e7dc:	6838      	ldr	r0, [r7, #0]
 801e7de:	f7fe f989 	bl	801caf4 <tcp_segs_free>
    next = NULL;
 801e7e2:	2300      	movs	r3, #0
 801e7e4:	603b      	str	r3, [r7, #0]
 801e7e6:	e056      	b.n	801e896 <tcp_oos_insert_segment+0xf2>
       oos queue may have segments with FIN flag */
    while (next &&
           TCP_SEQ_GEQ((seqno + cseg->len),
                       (next->tcphdr->seqno + next->len))) {
      /* cseg with FIN already processed */
      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801e7e8:	683b      	ldr	r3, [r7, #0]
 801e7ea:	691b      	ldr	r3, [r3, #16]
 801e7ec:	899b      	ldrh	r3, [r3, #12]
 801e7ee:	b29b      	uxth	r3, r3
 801e7f0:	4618      	mov	r0, r3
 801e7f2:	f7fb f859 	bl	80198a8 <lwip_htons>
 801e7f6:	4603      	mov	r3, r0
 801e7f8:	b2db      	uxtb	r3, r3
 801e7fa:	f003 0301 	and.w	r3, r3, #1
 801e7fe:	2b00      	cmp	r3, #0
 801e800:	d00d      	beq.n	801e81e <tcp_oos_insert_segment+0x7a>
        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
 801e802:	687b      	ldr	r3, [r7, #4]
 801e804:	691b      	ldr	r3, [r3, #16]
 801e806:	899b      	ldrh	r3, [r3, #12]
 801e808:	b29c      	uxth	r4, r3
 801e80a:	2001      	movs	r0, #1
 801e80c:	f7fb f84c 	bl	80198a8 <lwip_htons>
 801e810:	4603      	mov	r3, r0
 801e812:	461a      	mov	r2, r3
 801e814:	687b      	ldr	r3, [r7, #4]
 801e816:	691b      	ldr	r3, [r3, #16]
 801e818:	4322      	orrs	r2, r4
 801e81a:	b292      	uxth	r2, r2
 801e81c:	819a      	strh	r2, [r3, #12]
      }
      old_seg = next;
 801e81e:	683b      	ldr	r3, [r7, #0]
 801e820:	60fb      	str	r3, [r7, #12]
      next = next->next;
 801e822:	683b      	ldr	r3, [r7, #0]
 801e824:	681b      	ldr	r3, [r3, #0]
 801e826:	603b      	str	r3, [r7, #0]
      tcp_seg_free(old_seg);
 801e828:	68f8      	ldr	r0, [r7, #12]
 801e82a:	f7fe f978 	bl	801cb1e <tcp_seg_free>
    while (next &&
 801e82e:	683b      	ldr	r3, [r7, #0]
 801e830:	2b00      	cmp	r3, #0
 801e832:	d00e      	beq.n	801e852 <tcp_oos_insert_segment+0xae>
           TCP_SEQ_GEQ((seqno + cseg->len),
 801e834:	687b      	ldr	r3, [r7, #4]
 801e836:	891b      	ldrh	r3, [r3, #8]
 801e838:	461a      	mov	r2, r3
 801e83a:	4b1d      	ldr	r3, [pc, #116]	@ (801e8b0 <tcp_oos_insert_segment+0x10c>)
 801e83c:	681b      	ldr	r3, [r3, #0]
 801e83e:	441a      	add	r2, r3
 801e840:	683b      	ldr	r3, [r7, #0]
 801e842:	691b      	ldr	r3, [r3, #16]
 801e844:	685b      	ldr	r3, [r3, #4]
 801e846:	6839      	ldr	r1, [r7, #0]
 801e848:	8909      	ldrh	r1, [r1, #8]
 801e84a:	440b      	add	r3, r1
 801e84c:	1ad3      	subs	r3, r2, r3
    while (next &&
 801e84e:	2b00      	cmp	r3, #0
 801e850:	daca      	bge.n	801e7e8 <tcp_oos_insert_segment+0x44>
    }
    if (next &&
 801e852:	683b      	ldr	r3, [r7, #0]
 801e854:	2b00      	cmp	r3, #0
 801e856:	d01e      	beq.n	801e896 <tcp_oos_insert_segment+0xf2>
        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
 801e858:	687b      	ldr	r3, [r7, #4]
 801e85a:	891b      	ldrh	r3, [r3, #8]
 801e85c:	461a      	mov	r2, r3
 801e85e:	4b14      	ldr	r3, [pc, #80]	@ (801e8b0 <tcp_oos_insert_segment+0x10c>)
 801e860:	681b      	ldr	r3, [r3, #0]
 801e862:	441a      	add	r2, r3
 801e864:	683b      	ldr	r3, [r7, #0]
 801e866:	691b      	ldr	r3, [r3, #16]
 801e868:	685b      	ldr	r3, [r3, #4]
 801e86a:	1ad3      	subs	r3, r2, r3
    if (next &&
 801e86c:	2b00      	cmp	r3, #0
 801e86e:	dd12      	ble.n	801e896 <tcp_oos_insert_segment+0xf2>
      /* We need to trim the incoming segment. */
      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
 801e870:	683b      	ldr	r3, [r7, #0]
 801e872:	691b      	ldr	r3, [r3, #16]
 801e874:	685b      	ldr	r3, [r3, #4]
 801e876:	b29a      	uxth	r2, r3
 801e878:	4b0d      	ldr	r3, [pc, #52]	@ (801e8b0 <tcp_oos_insert_segment+0x10c>)
 801e87a:	681b      	ldr	r3, [r3, #0]
 801e87c:	b29b      	uxth	r3, r3
 801e87e:	1ad3      	subs	r3, r2, r3
 801e880:	b29a      	uxth	r2, r3
 801e882:	687b      	ldr	r3, [r7, #4]
 801e884:	811a      	strh	r2, [r3, #8]
      pbuf_realloc(cseg->p, cseg->len);
 801e886:	687b      	ldr	r3, [r7, #4]
 801e888:	685a      	ldr	r2, [r3, #4]
 801e88a:	687b      	ldr	r3, [r7, #4]
 801e88c:	891b      	ldrh	r3, [r3, #8]
 801e88e:	4619      	mov	r1, r3
 801e890:	4610      	mov	r0, r2
 801e892:	f7fc fb35 	bl	801af00 <pbuf_realloc>
    }
  }
  cseg->next = next;
 801e896:	687b      	ldr	r3, [r7, #4]
 801e898:	683a      	ldr	r2, [r7, #0]
 801e89a:	601a      	str	r2, [r3, #0]
}
 801e89c:	bf00      	nop
 801e89e:	3714      	adds	r7, #20
 801e8a0:	46bd      	mov	sp, r7
 801e8a2:	bd90      	pop	{r4, r7, pc}
 801e8a4:	0802fbf4 	.word	0x0802fbf4
 801e8a8:	0802feb4 	.word	0x0802feb4
 801e8ac:	0802fc40 	.word	0x0802fc40
 801e8b0:	2402afa4 	.word	0x2402afa4

0801e8b4 <tcp_free_acked_segments>:

/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
                        struct tcp_seg *dbg_other_seg_list)
{
 801e8b4:	b5b0      	push	{r4, r5, r7, lr}
 801e8b6:	b086      	sub	sp, #24
 801e8b8:	af00      	add	r7, sp, #0
 801e8ba:	60f8      	str	r0, [r7, #12]
 801e8bc:	60b9      	str	r1, [r7, #8]
 801e8be:	607a      	str	r2, [r7, #4]
 801e8c0:	603b      	str	r3, [r7, #0]
  u16_t clen;

  LWIP_UNUSED_ARG(dbg_list_name);
  LWIP_UNUSED_ARG(dbg_other_seg_list);

  while (seg_list != NULL &&
 801e8c2:	e03e      	b.n	801e942 <tcp_free_acked_segments+0x8e>
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
                                  lwip_ntohl(seg_list->tcphdr->seqno),
                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
                                  dbg_list_name));

    next = seg_list;
 801e8c4:	68bb      	ldr	r3, [r7, #8]
 801e8c6:	617b      	str	r3, [r7, #20]
    seg_list = seg_list->next;
 801e8c8:	68bb      	ldr	r3, [r7, #8]
 801e8ca:	681b      	ldr	r3, [r3, #0]
 801e8cc:	60bb      	str	r3, [r7, #8]

    clen = pbuf_clen(next->p);
 801e8ce:	697b      	ldr	r3, [r7, #20]
 801e8d0:	685b      	ldr	r3, [r3, #4]
 801e8d2:	4618      	mov	r0, r3
 801e8d4:	f7fc fd58 	bl	801b388 <pbuf_clen>
 801e8d8:	4603      	mov	r3, r0
 801e8da:	827b      	strh	r3, [r7, #18]
    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
                                 (tcpwnd_size_t)pcb->snd_queuelen));
    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
 801e8dc:	68fb      	ldr	r3, [r7, #12]
 801e8de:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e8e2:	8a7a      	ldrh	r2, [r7, #18]
 801e8e4:	429a      	cmp	r2, r3
 801e8e6:	d906      	bls.n	801e8f6 <tcp_free_acked_segments+0x42>
 801e8e8:	4b2a      	ldr	r3, [pc, #168]	@ (801e994 <tcp_free_acked_segments+0xe0>)
 801e8ea:	f240 4257 	movw	r2, #1111	@ 0x457
 801e8ee:	492a      	ldr	r1, [pc, #168]	@ (801e998 <tcp_free_acked_segments+0xe4>)
 801e8f0:	482a      	ldr	r0, [pc, #168]	@ (801e99c <tcp_free_acked_segments+0xe8>)
 801e8f2:	f00b ff33 	bl	802a75c <iprintf>

    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
 801e8f6:	68fb      	ldr	r3, [r7, #12]
 801e8f8:	f8b3 2066 	ldrh.w	r2, [r3, #102]	@ 0x66
 801e8fc:	8a7b      	ldrh	r3, [r7, #18]
 801e8fe:	1ad3      	subs	r3, r2, r3
 801e900:	b29a      	uxth	r2, r3
 801e902:	68fb      	ldr	r3, [r7, #12]
 801e904:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
 801e908:	697b      	ldr	r3, [r7, #20]
 801e90a:	891a      	ldrh	r2, [r3, #8]
 801e90c:	4b24      	ldr	r3, [pc, #144]	@ (801e9a0 <tcp_free_acked_segments+0xec>)
 801e90e:	881b      	ldrh	r3, [r3, #0]
 801e910:	4413      	add	r3, r2
 801e912:	b29a      	uxth	r2, r3
 801e914:	4b22      	ldr	r3, [pc, #136]	@ (801e9a0 <tcp_free_acked_segments+0xec>)
 801e916:	801a      	strh	r2, [r3, #0]
    tcp_seg_free(next);
 801e918:	6978      	ldr	r0, [r7, #20]
 801e91a:	f7fe f900 	bl	801cb1e <tcp_seg_free>

    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
                                 (tcpwnd_size_t)pcb->snd_queuelen,
                                 dbg_list_name));
    if (pcb->snd_queuelen != 0) {
 801e91e:	68fb      	ldr	r3, [r7, #12]
 801e920:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e924:	2b00      	cmp	r3, #0
 801e926:	d00c      	beq.n	801e942 <tcp_free_acked_segments+0x8e>
      LWIP_ASSERT("tcp_receive: valid queue length",
 801e928:	68bb      	ldr	r3, [r7, #8]
 801e92a:	2b00      	cmp	r3, #0
 801e92c:	d109      	bne.n	801e942 <tcp_free_acked_segments+0x8e>
 801e92e:	683b      	ldr	r3, [r7, #0]
 801e930:	2b00      	cmp	r3, #0
 801e932:	d106      	bne.n	801e942 <tcp_free_acked_segments+0x8e>
 801e934:	4b17      	ldr	r3, [pc, #92]	@ (801e994 <tcp_free_acked_segments+0xe0>)
 801e936:	f240 4261 	movw	r2, #1121	@ 0x461
 801e93a:	491a      	ldr	r1, [pc, #104]	@ (801e9a4 <tcp_free_acked_segments+0xf0>)
 801e93c:	4817      	ldr	r0, [pc, #92]	@ (801e99c <tcp_free_acked_segments+0xe8>)
 801e93e:	f00b ff0d 	bl	802a75c <iprintf>
  while (seg_list != NULL &&
 801e942:	68bb      	ldr	r3, [r7, #8]
 801e944:	2b00      	cmp	r3, #0
 801e946:	d020      	beq.n	801e98a <tcp_free_acked_segments+0xd6>
         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
 801e948:	68bb      	ldr	r3, [r7, #8]
 801e94a:	691b      	ldr	r3, [r3, #16]
 801e94c:	685b      	ldr	r3, [r3, #4]
 801e94e:	4618      	mov	r0, r3
 801e950:	f7fa ffbf 	bl	80198d2 <lwip_htonl>
 801e954:	4604      	mov	r4, r0
 801e956:	68bb      	ldr	r3, [r7, #8]
 801e958:	891b      	ldrh	r3, [r3, #8]
 801e95a:	461d      	mov	r5, r3
 801e95c:	68bb      	ldr	r3, [r7, #8]
 801e95e:	691b      	ldr	r3, [r3, #16]
 801e960:	899b      	ldrh	r3, [r3, #12]
 801e962:	b29b      	uxth	r3, r3
 801e964:	4618      	mov	r0, r3
 801e966:	f7fa ff9f 	bl	80198a8 <lwip_htons>
 801e96a:	4603      	mov	r3, r0
 801e96c:	b2db      	uxtb	r3, r3
 801e96e:	f003 0303 	and.w	r3, r3, #3
 801e972:	2b00      	cmp	r3, #0
 801e974:	d001      	beq.n	801e97a <tcp_free_acked_segments+0xc6>
 801e976:	2301      	movs	r3, #1
 801e978:	e000      	b.n	801e97c <tcp_free_acked_segments+0xc8>
 801e97a:	2300      	movs	r3, #0
 801e97c:	442b      	add	r3, r5
 801e97e:	18e2      	adds	r2, r4, r3
 801e980:	4b09      	ldr	r3, [pc, #36]	@ (801e9a8 <tcp_free_acked_segments+0xf4>)
 801e982:	681b      	ldr	r3, [r3, #0]
 801e984:	1ad3      	subs	r3, r2, r3
  while (seg_list != NULL &&
 801e986:	2b00      	cmp	r3, #0
 801e988:	dd9c      	ble.n	801e8c4 <tcp_free_acked_segments+0x10>
                  seg_list != NULL || dbg_other_seg_list != NULL);
    }
  }
  return seg_list;
 801e98a:	68bb      	ldr	r3, [r7, #8]
}
 801e98c:	4618      	mov	r0, r3
 801e98e:	3718      	adds	r7, #24
 801e990:	46bd      	mov	sp, r7
 801e992:	bdb0      	pop	{r4, r5, r7, pc}
 801e994:	0802fbf4 	.word	0x0802fbf4
 801e998:	0802fedc 	.word	0x0802fedc
 801e99c:	0802fc40 	.word	0x0802fc40
 801e9a0:	2402afac 	.word	0x2402afac
 801e9a4:	0802ff04 	.word	0x0802ff04
 801e9a8:	2402afa8 	.word	0x2402afa8

0801e9ac <tcp_receive>:
 *
 * Called from tcp_process().
 */
static void
tcp_receive(struct tcp_pcb *pcb)
{
 801e9ac:	b5b0      	push	{r4, r5, r7, lr}
 801e9ae:	b094      	sub	sp, #80	@ 0x50
 801e9b0:	af00      	add	r7, sp, #0
 801e9b2:	6078      	str	r0, [r7, #4]
  s16_t m;
  u32_t right_wnd_edge;
  int found_dupack = 0;
 801e9b4:	2300      	movs	r3, #0
 801e9b6:	64bb      	str	r3, [r7, #72]	@ 0x48

  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
 801e9b8:	687b      	ldr	r3, [r7, #4]
 801e9ba:	2b00      	cmp	r3, #0
 801e9bc:	d106      	bne.n	801e9cc <tcp_receive+0x20>
 801e9be:	4b91      	ldr	r3, [pc, #580]	@ (801ec04 <tcp_receive+0x258>)
 801e9c0:	f240 427b 	movw	r2, #1147	@ 0x47b
 801e9c4:	4990      	ldr	r1, [pc, #576]	@ (801ec08 <tcp_receive+0x25c>)
 801e9c6:	4891      	ldr	r0, [pc, #580]	@ (801ec0c <tcp_receive+0x260>)
 801e9c8:	f00b fec8 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
 801e9cc:	687b      	ldr	r3, [r7, #4]
 801e9ce:	7d1b      	ldrb	r3, [r3, #20]
 801e9d0:	2b03      	cmp	r3, #3
 801e9d2:	d806      	bhi.n	801e9e2 <tcp_receive+0x36>
 801e9d4:	4b8b      	ldr	r3, [pc, #556]	@ (801ec04 <tcp_receive+0x258>)
 801e9d6:	f240 427c 	movw	r2, #1148	@ 0x47c
 801e9da:	498d      	ldr	r1, [pc, #564]	@ (801ec10 <tcp_receive+0x264>)
 801e9dc:	488b      	ldr	r0, [pc, #556]	@ (801ec0c <tcp_receive+0x260>)
 801e9de:	f00b febd 	bl	802a75c <iprintf>

  if (flags & TCP_ACK) {
 801e9e2:	4b8c      	ldr	r3, [pc, #560]	@ (801ec14 <tcp_receive+0x268>)
 801e9e4:	781b      	ldrb	r3, [r3, #0]
 801e9e6:	f003 0310 	and.w	r3, r3, #16
 801e9ea:	2b00      	cmp	r3, #0
 801e9ec:	f000 8264 	beq.w	801eeb8 <tcp_receive+0x50c>
    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
 801e9f0:	687b      	ldr	r3, [r7, #4]
 801e9f2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801e9f6:	461a      	mov	r2, r3
 801e9f8:	687b      	ldr	r3, [r7, #4]
 801e9fa:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801e9fc:	4413      	add	r3, r2
 801e9fe:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Update window. */
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801ea00:	687b      	ldr	r3, [r7, #4]
 801ea02:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801ea04:	4b84      	ldr	r3, [pc, #528]	@ (801ec18 <tcp_receive+0x26c>)
 801ea06:	681b      	ldr	r3, [r3, #0]
 801ea08:	1ad3      	subs	r3, r2, r3
 801ea0a:	2b00      	cmp	r3, #0
 801ea0c:	db1b      	blt.n	801ea46 <tcp_receive+0x9a>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ea0e:	687b      	ldr	r3, [r7, #4]
 801ea10:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801ea12:	4b81      	ldr	r3, [pc, #516]	@ (801ec18 <tcp_receive+0x26c>)
 801ea14:	681b      	ldr	r3, [r3, #0]
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801ea16:	429a      	cmp	r2, r3
 801ea18:	d106      	bne.n	801ea28 <tcp_receive+0x7c>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ea1a:	687b      	ldr	r3, [r7, #4]
 801ea1c:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801ea1e:	4b7f      	ldr	r3, [pc, #508]	@ (801ec1c <tcp_receive+0x270>)
 801ea20:	681b      	ldr	r3, [r3, #0]
 801ea22:	1ad3      	subs	r3, r2, r3
 801ea24:	2b00      	cmp	r3, #0
 801ea26:	db0e      	blt.n	801ea46 <tcp_receive+0x9a>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801ea28:	687b      	ldr	r3, [r7, #4]
 801ea2a:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801ea2c:	4b7b      	ldr	r3, [pc, #492]	@ (801ec1c <tcp_receive+0x270>)
 801ea2e:	681b      	ldr	r3, [r3, #0]
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ea30:	429a      	cmp	r2, r3
 801ea32:	d125      	bne.n	801ea80 <tcp_receive+0xd4>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801ea34:	4b7a      	ldr	r3, [pc, #488]	@ (801ec20 <tcp_receive+0x274>)
 801ea36:	681b      	ldr	r3, [r3, #0]
 801ea38:	89db      	ldrh	r3, [r3, #14]
 801ea3a:	b29a      	uxth	r2, r3
 801ea3c:	687b      	ldr	r3, [r7, #4]
 801ea3e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801ea42:	429a      	cmp	r2, r3
 801ea44:	d91c      	bls.n	801ea80 <tcp_receive+0xd4>
      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
 801ea46:	4b76      	ldr	r3, [pc, #472]	@ (801ec20 <tcp_receive+0x274>)
 801ea48:	681b      	ldr	r3, [r3, #0]
 801ea4a:	89db      	ldrh	r3, [r3, #14]
 801ea4c:	b29a      	uxth	r2, r3
 801ea4e:	687b      	ldr	r3, [r7, #4]
 801ea50:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
      /* keep track of the biggest window announced by the remote host to calculate
         the maximum segment size */
      if (pcb->snd_wnd_max < pcb->snd_wnd) {
 801ea54:	687b      	ldr	r3, [r7, #4]
 801ea56:	f8b3 2062 	ldrh.w	r2, [r3, #98]	@ 0x62
 801ea5a:	687b      	ldr	r3, [r7, #4]
 801ea5c:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801ea60:	429a      	cmp	r2, r3
 801ea62:	d205      	bcs.n	801ea70 <tcp_receive+0xc4>
        pcb->snd_wnd_max = pcb->snd_wnd;
 801ea64:	687b      	ldr	r3, [r7, #4]
 801ea66:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801ea6a:	687b      	ldr	r3, [r7, #4]
 801ea6c:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
      }
      pcb->snd_wl1 = seqno;
 801ea70:	4b69      	ldr	r3, [pc, #420]	@ (801ec18 <tcp_receive+0x26c>)
 801ea72:	681a      	ldr	r2, [r3, #0]
 801ea74:	687b      	ldr	r3, [r7, #4]
 801ea76:	655a      	str	r2, [r3, #84]	@ 0x54
      pcb->snd_wl2 = ackno;
 801ea78:	4b68      	ldr	r3, [pc, #416]	@ (801ec1c <tcp_receive+0x270>)
 801ea7a:	681a      	ldr	r2, [r3, #0]
 801ea7c:	687b      	ldr	r3, [r7, #4]
 801ea7e:	659a      	str	r2, [r3, #88]	@ 0x58
     * If it only passes 1, should reset dupack counter
     *
     */

    /* Clause 1 */
    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
 801ea80:	4b66      	ldr	r3, [pc, #408]	@ (801ec1c <tcp_receive+0x270>)
 801ea82:	681a      	ldr	r2, [r3, #0]
 801ea84:	687b      	ldr	r3, [r7, #4]
 801ea86:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ea88:	1ad3      	subs	r3, r2, r3
 801ea8a:	2b00      	cmp	r3, #0
 801ea8c:	dc58      	bgt.n	801eb40 <tcp_receive+0x194>
      /* Clause 2 */
      if (tcplen == 0) {
 801ea8e:	4b65      	ldr	r3, [pc, #404]	@ (801ec24 <tcp_receive+0x278>)
 801ea90:	881b      	ldrh	r3, [r3, #0]
 801ea92:	2b00      	cmp	r3, #0
 801ea94:	d14b      	bne.n	801eb2e <tcp_receive+0x182>
        /* Clause 3 */
        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
 801ea96:	687b      	ldr	r3, [r7, #4]
 801ea98:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801ea9a:	687a      	ldr	r2, [r7, #4]
 801ea9c:	f8b2 2060 	ldrh.w	r2, [r2, #96]	@ 0x60
 801eaa0:	4413      	add	r3, r2
 801eaa2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801eaa4:	429a      	cmp	r2, r3
 801eaa6:	d142      	bne.n	801eb2e <tcp_receive+0x182>
          /* Clause 4 */
          if (pcb->rtime >= 0) {
 801eaa8:	687b      	ldr	r3, [r7, #4]
 801eaaa:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801eaae:	2b00      	cmp	r3, #0
 801eab0:	db3d      	blt.n	801eb2e <tcp_receive+0x182>
            /* Clause 5 */
            if (pcb->lastack == ackno) {
 801eab2:	687b      	ldr	r3, [r7, #4]
 801eab4:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 801eab6:	4b59      	ldr	r3, [pc, #356]	@ (801ec1c <tcp_receive+0x270>)
 801eab8:	681b      	ldr	r3, [r3, #0]
 801eaba:	429a      	cmp	r2, r3
 801eabc:	d137      	bne.n	801eb2e <tcp_receive+0x182>
              found_dupack = 1;
 801eabe:	2301      	movs	r3, #1
 801eac0:	64bb      	str	r3, [r7, #72]	@ 0x48
              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
 801eac2:	687b      	ldr	r3, [r7, #4]
 801eac4:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801eac8:	2bff      	cmp	r3, #255	@ 0xff
 801eaca:	d007      	beq.n	801eadc <tcp_receive+0x130>
                ++pcb->dupacks;
 801eacc:	687b      	ldr	r3, [r7, #4]
 801eace:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801ead2:	3301      	adds	r3, #1
 801ead4:	b2da      	uxtb	r2, r3
 801ead6:	687b      	ldr	r3, [r7, #4]
 801ead8:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
              }
              if (pcb->dupacks > 3) {
 801eadc:	687b      	ldr	r3, [r7, #4]
 801eade:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801eae2:	2b03      	cmp	r3, #3
 801eae4:	d91b      	bls.n	801eb1e <tcp_receive+0x172>
                /* Inflate the congestion window */
                TCP_WND_INC(pcb->cwnd, pcb->mss);
 801eae6:	687b      	ldr	r3, [r7, #4]
 801eae8:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801eaec:	687b      	ldr	r3, [r7, #4]
 801eaee:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801eaf0:	4413      	add	r3, r2
 801eaf2:	b29a      	uxth	r2, r3
 801eaf4:	687b      	ldr	r3, [r7, #4]
 801eaf6:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801eafa:	429a      	cmp	r2, r3
 801eafc:	d30a      	bcc.n	801eb14 <tcp_receive+0x168>
 801eafe:	687b      	ldr	r3, [r7, #4]
 801eb00:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801eb04:	687b      	ldr	r3, [r7, #4]
 801eb06:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801eb08:	4413      	add	r3, r2
 801eb0a:	b29a      	uxth	r2, r3
 801eb0c:	687b      	ldr	r3, [r7, #4]
 801eb0e:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801eb12:	e004      	b.n	801eb1e <tcp_receive+0x172>
 801eb14:	687b      	ldr	r3, [r7, #4]
 801eb16:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801eb1a:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
              }
              if (pcb->dupacks >= 3) {
 801eb1e:	687b      	ldr	r3, [r7, #4]
 801eb20:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801eb24:	2b02      	cmp	r3, #2
 801eb26:	d902      	bls.n	801eb2e <tcp_receive+0x182>
                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
                tcp_rexmit_fast(pcb);
 801eb28:	6878      	ldr	r0, [r7, #4]
 801eb2a:	f002 fbb3 	bl	8021294 <tcp_rexmit_fast>
          }
        }
      }
      /* If Clause (1) or more is true, but not a duplicate ack, reset
       * count of consecutive duplicate acks */
      if (!found_dupack) {
 801eb2e:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 801eb30:	2b00      	cmp	r3, #0
 801eb32:	f040 8161 	bne.w	801edf8 <tcp_receive+0x44c>
        pcb->dupacks = 0;
 801eb36:	687b      	ldr	r3, [r7, #4]
 801eb38:	2200      	movs	r2, #0
 801eb3a:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 801eb3e:	e15b      	b.n	801edf8 <tcp_receive+0x44c>
      }
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801eb40:	4b36      	ldr	r3, [pc, #216]	@ (801ec1c <tcp_receive+0x270>)
 801eb42:	681a      	ldr	r2, [r3, #0]
 801eb44:	687b      	ldr	r3, [r7, #4]
 801eb46:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801eb48:	1ad3      	subs	r3, r2, r3
 801eb4a:	3b01      	subs	r3, #1
 801eb4c:	2b00      	cmp	r3, #0
 801eb4e:	f2c0 814e 	blt.w	801edee <tcp_receive+0x442>
 801eb52:	4b32      	ldr	r3, [pc, #200]	@ (801ec1c <tcp_receive+0x270>)
 801eb54:	681a      	ldr	r2, [r3, #0]
 801eb56:	687b      	ldr	r3, [r7, #4]
 801eb58:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801eb5a:	1ad3      	subs	r3, r2, r3
 801eb5c:	2b00      	cmp	r3, #0
 801eb5e:	f300 8146 	bgt.w	801edee <tcp_receive+0x442>
      tcpwnd_size_t acked;

      /* Reset the "IN Fast Retransmit" flag, since we are no longer
         in fast retransmit. Also reset the congestion window to the
         slow start threshold. */
      if (pcb->flags & TF_INFR) {
 801eb62:	687b      	ldr	r3, [r7, #4]
 801eb64:	8b5b      	ldrh	r3, [r3, #26]
 801eb66:	f003 0304 	and.w	r3, r3, #4
 801eb6a:	2b00      	cmp	r3, #0
 801eb6c:	d010      	beq.n	801eb90 <tcp_receive+0x1e4>
        tcp_clear_flags(pcb, TF_INFR);
 801eb6e:	687b      	ldr	r3, [r7, #4]
 801eb70:	8b5b      	ldrh	r3, [r3, #26]
 801eb72:	f023 0304 	bic.w	r3, r3, #4
 801eb76:	b29a      	uxth	r2, r3
 801eb78:	687b      	ldr	r3, [r7, #4]
 801eb7a:	835a      	strh	r2, [r3, #26]
        pcb->cwnd = pcb->ssthresh;
 801eb7c:	687b      	ldr	r3, [r7, #4]
 801eb7e:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801eb82:	687b      	ldr	r3, [r7, #4]
 801eb84:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
        pcb->bytes_acked = 0;
 801eb88:	687b      	ldr	r3, [r7, #4]
 801eb8a:	2200      	movs	r2, #0
 801eb8c:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
      }

      /* Reset the number of retransmissions. */
      pcb->nrtx = 0;
 801eb90:	687b      	ldr	r3, [r7, #4]
 801eb92:	2200      	movs	r2, #0
 801eb94:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42

      /* Reset the retransmission time-out. */
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801eb98:	687b      	ldr	r3, [r7, #4]
 801eb9a:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801eb9e:	10db      	asrs	r3, r3, #3
 801eba0:	b21b      	sxth	r3, r3
 801eba2:	b29a      	uxth	r2, r3
 801eba4:	687b      	ldr	r3, [r7, #4]
 801eba6:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801ebaa:	b29b      	uxth	r3, r3
 801ebac:	4413      	add	r3, r2
 801ebae:	b29b      	uxth	r3, r3
 801ebb0:	b21a      	sxth	r2, r3
 801ebb2:	687b      	ldr	r3, [r7, #4]
 801ebb4:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      /* Record how much data this ACK acks */
      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
 801ebb8:	4b18      	ldr	r3, [pc, #96]	@ (801ec1c <tcp_receive+0x270>)
 801ebba:	681b      	ldr	r3, [r3, #0]
 801ebbc:	b29a      	uxth	r2, r3
 801ebbe:	687b      	ldr	r3, [r7, #4]
 801ebc0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ebc2:	b29b      	uxth	r3, r3
 801ebc4:	1ad3      	subs	r3, r2, r3
 801ebc6:	85fb      	strh	r3, [r7, #46]	@ 0x2e

      /* Reset the fast retransmit variables. */
      pcb->dupacks = 0;
 801ebc8:	687b      	ldr	r3, [r7, #4]
 801ebca:	2200      	movs	r2, #0
 801ebcc:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
      pcb->lastack = ackno;
 801ebd0:	4b12      	ldr	r3, [pc, #72]	@ (801ec1c <tcp_receive+0x270>)
 801ebd2:	681a      	ldr	r2, [r3, #0]
 801ebd4:	687b      	ldr	r3, [r7, #4]
 801ebd6:	645a      	str	r2, [r3, #68]	@ 0x44

      /* Update the congestion control variables (cwnd and
         ssthresh). */
      if (pcb->state >= ESTABLISHED) {
 801ebd8:	687b      	ldr	r3, [r7, #4]
 801ebda:	7d1b      	ldrb	r3, [r3, #20]
 801ebdc:	2b03      	cmp	r3, #3
 801ebde:	f240 8097 	bls.w	801ed10 <tcp_receive+0x364>
        if (pcb->cwnd < pcb->ssthresh) {
 801ebe2:	687b      	ldr	r3, [r7, #4]
 801ebe4:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ebe8:	687b      	ldr	r3, [r7, #4]
 801ebea:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 801ebee:	429a      	cmp	r2, r3
 801ebf0:	d245      	bcs.n	801ec7e <tcp_receive+0x2d2>
          tcpwnd_size_t increase;
          /* limit to 1 SMSS segment during period following RTO */
          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
 801ebf2:	687b      	ldr	r3, [r7, #4]
 801ebf4:	8b5b      	ldrh	r3, [r3, #26]
 801ebf6:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801ebfa:	2b00      	cmp	r3, #0
 801ebfc:	d014      	beq.n	801ec28 <tcp_receive+0x27c>
 801ebfe:	2301      	movs	r3, #1
 801ec00:	e013      	b.n	801ec2a <tcp_receive+0x27e>
 801ec02:	bf00      	nop
 801ec04:	0802fbf4 	.word	0x0802fbf4
 801ec08:	0802ff24 	.word	0x0802ff24
 801ec0c:	0802fc40 	.word	0x0802fc40
 801ec10:	0802ff40 	.word	0x0802ff40
 801ec14:	2402afb0 	.word	0x2402afb0
 801ec18:	2402afa4 	.word	0x2402afa4
 801ec1c:	2402afa8 	.word	0x2402afa8
 801ec20:	2402af94 	.word	0x2402af94
 801ec24:	2402afae 	.word	0x2402afae
 801ec28:	2302      	movs	r3, #2
 801ec2a:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
          /* RFC 3465, section 2.2 Slow Start */
          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
 801ec2e:	f897 302d 	ldrb.w	r3, [r7, #45]	@ 0x2d
 801ec32:	b29a      	uxth	r2, r3
 801ec34:	687b      	ldr	r3, [r7, #4]
 801ec36:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ec38:	fb12 f303 	smulbb	r3, r2, r3
 801ec3c:	b29b      	uxth	r3, r3
 801ec3e:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801ec40:	4293      	cmp	r3, r2
 801ec42:	bf28      	it	cs
 801ec44:	4613      	movcs	r3, r2
 801ec46:	857b      	strh	r3, [r7, #42]	@ 0x2a
          TCP_WND_INC(pcb->cwnd, increase);
 801ec48:	687b      	ldr	r3, [r7, #4]
 801ec4a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ec4e:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801ec50:	4413      	add	r3, r2
 801ec52:	b29a      	uxth	r2, r3
 801ec54:	687b      	ldr	r3, [r7, #4]
 801ec56:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801ec5a:	429a      	cmp	r2, r3
 801ec5c:	d309      	bcc.n	801ec72 <tcp_receive+0x2c6>
 801ec5e:	687b      	ldr	r3, [r7, #4]
 801ec60:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ec64:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801ec66:	4413      	add	r3, r2
 801ec68:	b29a      	uxth	r2, r3
 801ec6a:	687b      	ldr	r3, [r7, #4]
 801ec6c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ec70:	e04e      	b.n	801ed10 <tcp_receive+0x364>
 801ec72:	687b      	ldr	r3, [r7, #4]
 801ec74:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ec78:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ec7c:	e048      	b.n	801ed10 <tcp_receive+0x364>
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
        } else {
          /* RFC 3465, section 2.1 Congestion Avoidance */
          TCP_WND_INC(pcb->bytes_acked, acked);
 801ec7e:	687b      	ldr	r3, [r7, #4]
 801ec80:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ec84:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801ec86:	4413      	add	r3, r2
 801ec88:	b29a      	uxth	r2, r3
 801ec8a:	687b      	ldr	r3, [r7, #4]
 801ec8c:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 801ec90:	429a      	cmp	r2, r3
 801ec92:	d309      	bcc.n	801eca8 <tcp_receive+0x2fc>
 801ec94:	687b      	ldr	r3, [r7, #4]
 801ec96:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ec9a:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801ec9c:	4413      	add	r3, r2
 801ec9e:	b29a      	uxth	r2, r3
 801eca0:	687b      	ldr	r3, [r7, #4]
 801eca2:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
 801eca6:	e004      	b.n	801ecb2 <tcp_receive+0x306>
 801eca8:	687b      	ldr	r3, [r7, #4]
 801ecaa:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ecae:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
          if (pcb->bytes_acked >= pcb->cwnd) {
 801ecb2:	687b      	ldr	r3, [r7, #4]
 801ecb4:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ecb8:	687b      	ldr	r3, [r7, #4]
 801ecba:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801ecbe:	429a      	cmp	r2, r3
 801ecc0:	d326      	bcc.n	801ed10 <tcp_receive+0x364>
            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
 801ecc2:	687b      	ldr	r3, [r7, #4]
 801ecc4:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ecc8:	687b      	ldr	r3, [r7, #4]
 801ecca:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801ecce:	1ad3      	subs	r3, r2, r3
 801ecd0:	b29a      	uxth	r2, r3
 801ecd2:	687b      	ldr	r3, [r7, #4]
 801ecd4:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            TCP_WND_INC(pcb->cwnd, pcb->mss);
 801ecd8:	687b      	ldr	r3, [r7, #4]
 801ecda:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ecde:	687b      	ldr	r3, [r7, #4]
 801ece0:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ece2:	4413      	add	r3, r2
 801ece4:	b29a      	uxth	r2, r3
 801ece6:	687b      	ldr	r3, [r7, #4]
 801ece8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801ecec:	429a      	cmp	r2, r3
 801ecee:	d30a      	bcc.n	801ed06 <tcp_receive+0x35a>
 801ecf0:	687b      	ldr	r3, [r7, #4]
 801ecf2:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ecf6:	687b      	ldr	r3, [r7, #4]
 801ecf8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ecfa:	4413      	add	r3, r2
 801ecfc:	b29a      	uxth	r2, r3
 801ecfe:	687b      	ldr	r3, [r7, #4]
 801ed00:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ed04:	e004      	b.n	801ed10 <tcp_receive+0x364>
 801ed06:	687b      	ldr	r3, [r7, #4]
 801ed08:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ed0c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
                                    pcb->unacked != NULL ?
                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));

      /* Remove segment from the unacknowledged list if the incoming
         ACK acknowledges them. */
      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
 801ed10:	687b      	ldr	r3, [r7, #4]
 801ed12:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 801ed14:	687b      	ldr	r3, [r7, #4]
 801ed16:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ed18:	4a98      	ldr	r2, [pc, #608]	@ (801ef7c <tcp_receive+0x5d0>)
 801ed1a:	6878      	ldr	r0, [r7, #4]
 801ed1c:	f7ff fdca 	bl	801e8b4 <tcp_free_acked_segments>
 801ed20:	4602      	mov	r2, r0
 801ed22:	687b      	ldr	r3, [r7, #4]
 801ed24:	671a      	str	r2, [r3, #112]	@ 0x70
         on the list are acknowledged by the ACK. This may seem
         strange since an "unsent" segment shouldn't be acked. The
         rationale is that lwIP puts all outstanding segments on the
         ->unsent list after a retransmission, so these segments may
         in fact have been sent once. */
      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
 801ed26:	687b      	ldr	r3, [r7, #4]
 801ed28:	6ed9      	ldr	r1, [r3, #108]	@ 0x6c
 801ed2a:	687b      	ldr	r3, [r7, #4]
 801ed2c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ed2e:	4a94      	ldr	r2, [pc, #592]	@ (801ef80 <tcp_receive+0x5d4>)
 801ed30:	6878      	ldr	r0, [r7, #4]
 801ed32:	f7ff fdbf 	bl	801e8b4 <tcp_free_acked_segments>
 801ed36:	4602      	mov	r2, r0
 801ed38:	687b      	ldr	r3, [r7, #4]
 801ed3a:	66da      	str	r2, [r3, #108]	@ 0x6c

      /* If there's nothing left to acknowledge, stop the retransmit
         timer, otherwise reset it to start again */
      if (pcb->unacked == NULL) {
 801ed3c:	687b      	ldr	r3, [r7, #4]
 801ed3e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ed40:	2b00      	cmp	r3, #0
 801ed42:	d104      	bne.n	801ed4e <tcp_receive+0x3a2>
        pcb->rtime = -1;
 801ed44:	687b      	ldr	r3, [r7, #4]
 801ed46:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ed4a:	861a      	strh	r2, [r3, #48]	@ 0x30
 801ed4c:	e002      	b.n	801ed54 <tcp_receive+0x3a8>
      } else {
        pcb->rtime = 0;
 801ed4e:	687b      	ldr	r3, [r7, #4]
 801ed50:	2200      	movs	r2, #0
 801ed52:	861a      	strh	r2, [r3, #48]	@ 0x30
      }

      pcb->polltmr = 0;
 801ed54:	687b      	ldr	r3, [r7, #4]
 801ed56:	2200      	movs	r2, #0
 801ed58:	771a      	strb	r2, [r3, #28]

#if TCP_OVERSIZE
      if (pcb->unsent == NULL) {
 801ed5a:	687b      	ldr	r3, [r7, #4]
 801ed5c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ed5e:	2b00      	cmp	r3, #0
 801ed60:	d103      	bne.n	801ed6a <tcp_receive+0x3be>
        pcb->unsent_oversize = 0;
 801ed62:	687b      	ldr	r3, [r7, #4]
 801ed64:	2200      	movs	r2, #0
 801ed66:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
        /* Inform neighbor reachability of forward progress. */
        nd6_reachability_hint(ip6_current_src_addr());
      }
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/

      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
 801ed6a:	687b      	ldr	r3, [r7, #4]
 801ed6c:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801ed70:	4b84      	ldr	r3, [pc, #528]	@ (801ef84 <tcp_receive+0x5d8>)
 801ed72:	881b      	ldrh	r3, [r3, #0]
 801ed74:	4413      	add	r3, r2
 801ed76:	b29a      	uxth	r2, r3
 801ed78:	687b      	ldr	r3, [r7, #4]
 801ed7a:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
      /* check if this ACK ends our retransmission of in-flight data */
      if (pcb->flags & TF_RTO) {
 801ed7e:	687b      	ldr	r3, [r7, #4]
 801ed80:	8b5b      	ldrh	r3, [r3, #26]
 801ed82:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801ed86:	2b00      	cmp	r3, #0
 801ed88:	d035      	beq.n	801edf6 <tcp_receive+0x44a>
        /* RTO is done if
            1) both queues are empty or
            2) unacked is empty and unsent head contains data not part of RTO or
            3) unacked head contains data not part of RTO */
        if (pcb->unacked == NULL) {
 801ed8a:	687b      	ldr	r3, [r7, #4]
 801ed8c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801ed8e:	2b00      	cmp	r3, #0
 801ed90:	d118      	bne.n	801edc4 <tcp_receive+0x418>
          if ((pcb->unsent == NULL) ||
 801ed92:	687b      	ldr	r3, [r7, #4]
 801ed94:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ed96:	2b00      	cmp	r3, #0
 801ed98:	d00c      	beq.n	801edb4 <tcp_receive+0x408>
              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
 801ed9a:	687b      	ldr	r3, [r7, #4]
 801ed9c:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801ed9e:	687b      	ldr	r3, [r7, #4]
 801eda0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801eda2:	691b      	ldr	r3, [r3, #16]
 801eda4:	685b      	ldr	r3, [r3, #4]
 801eda6:	4618      	mov	r0, r3
 801eda8:	f7fa fd93 	bl	80198d2 <lwip_htonl>
 801edac:	4603      	mov	r3, r0
 801edae:	1ae3      	subs	r3, r4, r3
          if ((pcb->unsent == NULL) ||
 801edb0:	2b00      	cmp	r3, #0
 801edb2:	dc20      	bgt.n	801edf6 <tcp_receive+0x44a>
            tcp_clear_flags(pcb, TF_RTO);
 801edb4:	687b      	ldr	r3, [r7, #4]
 801edb6:	8b5b      	ldrh	r3, [r3, #26]
 801edb8:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801edbc:	b29a      	uxth	r2, r3
 801edbe:	687b      	ldr	r3, [r7, #4]
 801edc0:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801edc2:	e018      	b.n	801edf6 <tcp_receive+0x44a>
          }
        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
 801edc4:	687b      	ldr	r3, [r7, #4]
 801edc6:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801edc8:	687b      	ldr	r3, [r7, #4]
 801edca:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801edcc:	691b      	ldr	r3, [r3, #16]
 801edce:	685b      	ldr	r3, [r3, #4]
 801edd0:	4618      	mov	r0, r3
 801edd2:	f7fa fd7e 	bl	80198d2 <lwip_htonl>
 801edd6:	4603      	mov	r3, r0
 801edd8:	1ae3      	subs	r3, r4, r3
 801edda:	2b00      	cmp	r3, #0
 801eddc:	dc0b      	bgt.n	801edf6 <tcp_receive+0x44a>
          tcp_clear_flags(pcb, TF_RTO);
 801edde:	687b      	ldr	r3, [r7, #4]
 801ede0:	8b5b      	ldrh	r3, [r3, #26]
 801ede2:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801ede6:	b29a      	uxth	r2, r3
 801ede8:	687b      	ldr	r3, [r7, #4]
 801edea:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801edec:	e003      	b.n	801edf6 <tcp_receive+0x44a>
        }
      }
      /* End of ACK for new data processing. */
    } else {
      /* Out of sequence ACK, didn't really ack anything */
      tcp_send_empty_ack(pcb);
 801edee:	6878      	ldr	r0, [r7, #4]
 801edf0:	f002 fc3c 	bl	802166c <tcp_send_empty_ack>
 801edf4:	e000      	b.n	801edf8 <tcp_receive+0x44c>
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801edf6:	bf00      	nop
                                pcb->rttest, pcb->rtseq, ackno));

    /* RTT estimation calculations. This is done by checking if the
       incoming segment acknowledges the segment we use to take a
       round-trip time measurement. */
    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
 801edf8:	687b      	ldr	r3, [r7, #4]
 801edfa:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801edfc:	2b00      	cmp	r3, #0
 801edfe:	d05b      	beq.n	801eeb8 <tcp_receive+0x50c>
 801ee00:	687b      	ldr	r3, [r7, #4]
 801ee02:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801ee04:	4b60      	ldr	r3, [pc, #384]	@ (801ef88 <tcp_receive+0x5dc>)
 801ee06:	681b      	ldr	r3, [r3, #0]
 801ee08:	1ad3      	subs	r3, r2, r3
 801ee0a:	2b00      	cmp	r3, #0
 801ee0c:	da54      	bge.n	801eeb8 <tcp_receive+0x50c>
      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
         and a round-trip shouldn't be that long... */
      m = (s16_t)(tcp_ticks - pcb->rttest);
 801ee0e:	4b5f      	ldr	r3, [pc, #380]	@ (801ef8c <tcp_receive+0x5e0>)
 801ee10:	681b      	ldr	r3, [r3, #0]
 801ee12:	b29a      	uxth	r2, r3
 801ee14:	687b      	ldr	r3, [r7, #4]
 801ee16:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801ee18:	b29b      	uxth	r3, r3
 801ee1a:	1ad3      	subs	r3, r2, r3
 801ee1c:	b29b      	uxth	r3, r3
 801ee1e:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));

      /* This is taken directly from VJs original code in his paper */
      m = (s16_t)(m - (pcb->sa >> 3));
 801ee22:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801ee26:	687b      	ldr	r3, [r7, #4]
 801ee28:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801ee2c:	10db      	asrs	r3, r3, #3
 801ee2e:	b21b      	sxth	r3, r3
 801ee30:	b29b      	uxth	r3, r3
 801ee32:	1ad3      	subs	r3, r2, r3
 801ee34:	b29b      	uxth	r3, r3
 801ee36:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sa = (s16_t)(pcb->sa + m);
 801ee3a:	687b      	ldr	r3, [r7, #4]
 801ee3c:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801ee40:	b29a      	uxth	r2, r3
 801ee42:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801ee46:	4413      	add	r3, r2
 801ee48:	b29b      	uxth	r3, r3
 801ee4a:	b21a      	sxth	r2, r3
 801ee4c:	687b      	ldr	r3, [r7, #4]
 801ee4e:	879a      	strh	r2, [r3, #60]	@ 0x3c
      if (m < 0) {
 801ee50:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	@ 0x4e
 801ee54:	2b00      	cmp	r3, #0
 801ee56:	da05      	bge.n	801ee64 <tcp_receive+0x4b8>
        m = (s16_t) - m;
 801ee58:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801ee5c:	425b      	negs	r3, r3
 801ee5e:	b29b      	uxth	r3, r3
 801ee60:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      }
      m = (s16_t)(m - (pcb->sv >> 2));
 801ee64:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801ee68:	687b      	ldr	r3, [r7, #4]
 801ee6a:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801ee6e:	109b      	asrs	r3, r3, #2
 801ee70:	b21b      	sxth	r3, r3
 801ee72:	b29b      	uxth	r3, r3
 801ee74:	1ad3      	subs	r3, r2, r3
 801ee76:	b29b      	uxth	r3, r3
 801ee78:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sv = (s16_t)(pcb->sv + m);
 801ee7c:	687b      	ldr	r3, [r7, #4]
 801ee7e:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801ee82:	b29a      	uxth	r2, r3
 801ee84:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801ee88:	4413      	add	r3, r2
 801ee8a:	b29b      	uxth	r3, r3
 801ee8c:	b21a      	sxth	r2, r3
 801ee8e:	687b      	ldr	r3, [r7, #4]
 801ee90:	87da      	strh	r2, [r3, #62]	@ 0x3e
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801ee92:	687b      	ldr	r3, [r7, #4]
 801ee94:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801ee98:	10db      	asrs	r3, r3, #3
 801ee9a:	b21b      	sxth	r3, r3
 801ee9c:	b29a      	uxth	r2, r3
 801ee9e:	687b      	ldr	r3, [r7, #4]
 801eea0:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801eea4:	b29b      	uxth	r3, r3
 801eea6:	4413      	add	r3, r2
 801eea8:	b29b      	uxth	r3, r3
 801eeaa:	b21a      	sxth	r2, r3
 801eeac:	687b      	ldr	r3, [r7, #4]
 801eeae:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));

      pcb->rttest = 0;
 801eeb2:	687b      	ldr	r3, [r7, #4]
 801eeb4:	2200      	movs	r2, #0
 801eeb6:	635a      	str	r2, [r3, #52]	@ 0x34

  /* If the incoming segment contains data, we must process it
     further unless the pcb already received a FIN.
     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
 801eeb8:	4b35      	ldr	r3, [pc, #212]	@ (801ef90 <tcp_receive+0x5e4>)
 801eeba:	881b      	ldrh	r3, [r3, #0]
 801eebc:	2b00      	cmp	r3, #0
 801eebe:	f000 84df 	beq.w	801f880 <tcp_receive+0xed4>
 801eec2:	687b      	ldr	r3, [r7, #4]
 801eec4:	7d1b      	ldrb	r3, [r3, #20]
 801eec6:	2b06      	cmp	r3, #6
 801eec8:	f200 84da 	bhi.w	801f880 <tcp_receive+0xed4>
       this if the sequence number of the incoming segment is less
       than rcv_nxt, and the sequence number plus the length of the
       segment is larger than rcv_nxt. */
    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801eecc:	687b      	ldr	r3, [r7, #4]
 801eece:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801eed0:	4b30      	ldr	r3, [pc, #192]	@ (801ef94 <tcp_receive+0x5e8>)
 801eed2:	681b      	ldr	r3, [r3, #0]
 801eed4:	1ad3      	subs	r3, r2, r3
 801eed6:	3b01      	subs	r3, #1
 801eed8:	2b00      	cmp	r3, #0
 801eeda:	f2c0 808f 	blt.w	801effc <tcp_receive+0x650>
 801eede:	687b      	ldr	r3, [r7, #4]
 801eee0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801eee2:	4b2b      	ldr	r3, [pc, #172]	@ (801ef90 <tcp_receive+0x5e4>)
 801eee4:	881b      	ldrh	r3, [r3, #0]
 801eee6:	4619      	mov	r1, r3
 801eee8:	4b2a      	ldr	r3, [pc, #168]	@ (801ef94 <tcp_receive+0x5e8>)
 801eeea:	681b      	ldr	r3, [r3, #0]
 801eeec:	440b      	add	r3, r1
 801eeee:	1ad3      	subs	r3, r2, r3
 801eef0:	3301      	adds	r3, #1
 801eef2:	2b00      	cmp	r3, #0
 801eef4:	f300 8082 	bgt.w	801effc <tcp_receive+0x650>

         After we are done with adjusting the pbuf pointers we must
         adjust the ->data pointer in the seg and the segment
         length.*/

      struct pbuf *p = inseg.p;
 801eef8:	4b27      	ldr	r3, [pc, #156]	@ (801ef98 <tcp_receive+0x5ec>)
 801eefa:	685b      	ldr	r3, [r3, #4]
 801eefc:	647b      	str	r3, [r7, #68]	@ 0x44
      u32_t off32 = pcb->rcv_nxt - seqno;
 801eefe:	687b      	ldr	r3, [r7, #4]
 801ef00:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801ef02:	4b24      	ldr	r3, [pc, #144]	@ (801ef94 <tcp_receive+0x5e8>)
 801ef04:	681b      	ldr	r3, [r3, #0]
 801ef06:	1ad3      	subs	r3, r2, r3
 801ef08:	627b      	str	r3, [r7, #36]	@ 0x24
      u16_t new_tot_len, off;
      LWIP_ASSERT("inseg.p != NULL", inseg.p);
 801ef0a:	4b23      	ldr	r3, [pc, #140]	@ (801ef98 <tcp_receive+0x5ec>)
 801ef0c:	685b      	ldr	r3, [r3, #4]
 801ef0e:	2b00      	cmp	r3, #0
 801ef10:	d106      	bne.n	801ef20 <tcp_receive+0x574>
 801ef12:	4b22      	ldr	r3, [pc, #136]	@ (801ef9c <tcp_receive+0x5f0>)
 801ef14:	f240 5294 	movw	r2, #1428	@ 0x594
 801ef18:	4921      	ldr	r1, [pc, #132]	@ (801efa0 <tcp_receive+0x5f4>)
 801ef1a:	4822      	ldr	r0, [pc, #136]	@ (801efa4 <tcp_receive+0x5f8>)
 801ef1c:	f00b fc1e 	bl	802a75c <iprintf>
      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
 801ef20:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ef22:	f64f 72fe 	movw	r2, #65534	@ 0xfffe
 801ef26:	4293      	cmp	r3, r2
 801ef28:	d906      	bls.n	801ef38 <tcp_receive+0x58c>
 801ef2a:	4b1c      	ldr	r3, [pc, #112]	@ (801ef9c <tcp_receive+0x5f0>)
 801ef2c:	f240 5295 	movw	r2, #1429	@ 0x595
 801ef30:	491d      	ldr	r1, [pc, #116]	@ (801efa8 <tcp_receive+0x5fc>)
 801ef32:	481c      	ldr	r0, [pc, #112]	@ (801efa4 <tcp_receive+0x5f8>)
 801ef34:	f00b fc12 	bl	802a75c <iprintf>
      off = (u16_t)off32;
 801ef38:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801ef3a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
 801ef3e:	4b16      	ldr	r3, [pc, #88]	@ (801ef98 <tcp_receive+0x5ec>)
 801ef40:	685b      	ldr	r3, [r3, #4]
 801ef42:	891b      	ldrh	r3, [r3, #8]
 801ef44:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801ef48:	429a      	cmp	r2, r3
 801ef4a:	d906      	bls.n	801ef5a <tcp_receive+0x5ae>
 801ef4c:	4b13      	ldr	r3, [pc, #76]	@ (801ef9c <tcp_receive+0x5f0>)
 801ef4e:	f240 5297 	movw	r2, #1431	@ 0x597
 801ef52:	4916      	ldr	r1, [pc, #88]	@ (801efac <tcp_receive+0x600>)
 801ef54:	4813      	ldr	r0, [pc, #76]	@ (801efa4 <tcp_receive+0x5f8>)
 801ef56:	f00b fc01 	bl	802a75c <iprintf>
      inseg.len -= off;
 801ef5a:	4b0f      	ldr	r3, [pc, #60]	@ (801ef98 <tcp_receive+0x5ec>)
 801ef5c:	891a      	ldrh	r2, [r3, #8]
 801ef5e:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801ef62:	1ad3      	subs	r3, r2, r3
 801ef64:	b29a      	uxth	r2, r3
 801ef66:	4b0c      	ldr	r3, [pc, #48]	@ (801ef98 <tcp_receive+0x5ec>)
 801ef68:	811a      	strh	r2, [r3, #8]
      new_tot_len = (u16_t)(inseg.p->tot_len - off);
 801ef6a:	4b0b      	ldr	r3, [pc, #44]	@ (801ef98 <tcp_receive+0x5ec>)
 801ef6c:	685b      	ldr	r3, [r3, #4]
 801ef6e:	891a      	ldrh	r2, [r3, #8]
 801ef70:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801ef74:	1ad3      	subs	r3, r2, r3
 801ef76:	847b      	strh	r3, [r7, #34]	@ 0x22
      while (p->len < off) {
 801ef78:	e02a      	b.n	801efd0 <tcp_receive+0x624>
 801ef7a:	bf00      	nop
 801ef7c:	0802ff5c 	.word	0x0802ff5c
 801ef80:	0802ff64 	.word	0x0802ff64
 801ef84:	2402afac 	.word	0x2402afac
 801ef88:	2402afa8 	.word	0x2402afa8
 801ef8c:	2402af68 	.word	0x2402af68
 801ef90:	2402afae 	.word	0x2402afae
 801ef94:	2402afa4 	.word	0x2402afa4
 801ef98:	2402af80 	.word	0x2402af80
 801ef9c:	0802fbf4 	.word	0x0802fbf4
 801efa0:	0802ff6c 	.word	0x0802ff6c
 801efa4:	0802fc40 	.word	0x0802fc40
 801efa8:	0802ff7c 	.word	0x0802ff7c
 801efac:	0802ff8c 	.word	0x0802ff8c
        off -= p->len;
 801efb0:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801efb2:	895b      	ldrh	r3, [r3, #10]
 801efb4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801efb8:	1ad3      	subs	r3, r2, r3
 801efba:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
        /* all pbufs up to and including this one have len==0, so tot_len is equal */
        p->tot_len = new_tot_len;
 801efbe:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801efc0:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801efc2:	811a      	strh	r2, [r3, #8]
        p->len = 0;
 801efc4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801efc6:	2200      	movs	r2, #0
 801efc8:	815a      	strh	r2, [r3, #10]
        p = p->next;
 801efca:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801efcc:	681b      	ldr	r3, [r3, #0]
 801efce:	647b      	str	r3, [r7, #68]	@ 0x44
      while (p->len < off) {
 801efd0:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801efd2:	895b      	ldrh	r3, [r3, #10]
 801efd4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801efd8:	429a      	cmp	r2, r3
 801efda:	d8e9      	bhi.n	801efb0 <tcp_receive+0x604>
      }
      /* cannot fail... */
      pbuf_remove_header(p, off);
 801efdc:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801efe0:	4619      	mov	r1, r3
 801efe2:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 801efe4:	f7fc f88a 	bl	801b0fc <pbuf_remove_header>
      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
 801efe8:	687b      	ldr	r3, [r7, #4]
 801efea:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801efec:	4a90      	ldr	r2, [pc, #576]	@ (801f230 <tcp_receive+0x884>)
 801efee:	6013      	str	r3, [r2, #0]
 801eff0:	4b90      	ldr	r3, [pc, #576]	@ (801f234 <tcp_receive+0x888>)
 801eff2:	691b      	ldr	r3, [r3, #16]
 801eff4:	4a8e      	ldr	r2, [pc, #568]	@ (801f230 <tcp_receive+0x884>)
 801eff6:	6812      	ldr	r2, [r2, #0]
 801eff8:	605a      	str	r2, [r3, #4]
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801effa:	e00d      	b.n	801f018 <tcp_receive+0x66c>
    } else {
      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
 801effc:	4b8c      	ldr	r3, [pc, #560]	@ (801f230 <tcp_receive+0x884>)
 801effe:	681a      	ldr	r2, [r3, #0]
 801f000:	687b      	ldr	r3, [r7, #4]
 801f002:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f004:	1ad3      	subs	r3, r2, r3
 801f006:	2b00      	cmp	r3, #0
 801f008:	da06      	bge.n	801f018 <tcp_receive+0x66c>
        /* the whole segment is < rcv_nxt */
        /* must be a duplicate of a packet that has already been correctly handled */

        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
        tcp_ack_now(pcb);
 801f00a:	687b      	ldr	r3, [r7, #4]
 801f00c:	8b5b      	ldrh	r3, [r3, #26]
 801f00e:	f043 0302 	orr.w	r3, r3, #2
 801f012:	b29a      	uxth	r2, r3
 801f014:	687b      	ldr	r3, [r7, #4]
 801f016:	835a      	strh	r2, [r3, #26]
    }

    /* The sequence number must be within the window (above rcv_nxt
       and below rcv_nxt + rcv_wnd) in order to be further
       processed. */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801f018:	4b85      	ldr	r3, [pc, #532]	@ (801f230 <tcp_receive+0x884>)
 801f01a:	681a      	ldr	r2, [r3, #0]
 801f01c:	687b      	ldr	r3, [r7, #4]
 801f01e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f020:	1ad3      	subs	r3, r2, r3
 801f022:	2b00      	cmp	r3, #0
 801f024:	f2c0 8427 	blt.w	801f876 <tcp_receive+0xeca>
 801f028:	4b81      	ldr	r3, [pc, #516]	@ (801f230 <tcp_receive+0x884>)
 801f02a:	681a      	ldr	r2, [r3, #0]
 801f02c:	687b      	ldr	r3, [r7, #4]
 801f02e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f030:	6879      	ldr	r1, [r7, #4]
 801f032:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f034:	440b      	add	r3, r1
 801f036:	1ad3      	subs	r3, r2, r3
 801f038:	3301      	adds	r3, #1
 801f03a:	2b00      	cmp	r3, #0
 801f03c:	f300 841b 	bgt.w	801f876 <tcp_receive+0xeca>
                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
      if (pcb->rcv_nxt == seqno) {
 801f040:	687b      	ldr	r3, [r7, #4]
 801f042:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801f044:	4b7a      	ldr	r3, [pc, #488]	@ (801f230 <tcp_receive+0x884>)
 801f046:	681b      	ldr	r3, [r3, #0]
 801f048:	429a      	cmp	r2, r3
 801f04a:	f040 8298 	bne.w	801f57e <tcp_receive+0xbd2>
        /* The incoming segment is the next in sequence. We check if
           we have to trim the end of the segment and update rcv_nxt
           and pass the data to the application. */
        tcplen = TCP_TCPLEN(&inseg);
 801f04e:	4b79      	ldr	r3, [pc, #484]	@ (801f234 <tcp_receive+0x888>)
 801f050:	891c      	ldrh	r4, [r3, #8]
 801f052:	4b78      	ldr	r3, [pc, #480]	@ (801f234 <tcp_receive+0x888>)
 801f054:	691b      	ldr	r3, [r3, #16]
 801f056:	899b      	ldrh	r3, [r3, #12]
 801f058:	b29b      	uxth	r3, r3
 801f05a:	4618      	mov	r0, r3
 801f05c:	f7fa fc24 	bl	80198a8 <lwip_htons>
 801f060:	4603      	mov	r3, r0
 801f062:	b2db      	uxtb	r3, r3
 801f064:	f003 0303 	and.w	r3, r3, #3
 801f068:	2b00      	cmp	r3, #0
 801f06a:	d001      	beq.n	801f070 <tcp_receive+0x6c4>
 801f06c:	2301      	movs	r3, #1
 801f06e:	e000      	b.n	801f072 <tcp_receive+0x6c6>
 801f070:	2300      	movs	r3, #0
 801f072:	4423      	add	r3, r4
 801f074:	b29a      	uxth	r2, r3
 801f076:	4b70      	ldr	r3, [pc, #448]	@ (801f238 <tcp_receive+0x88c>)
 801f078:	801a      	strh	r2, [r3, #0]

        if (tcplen > pcb->rcv_wnd) {
 801f07a:	687b      	ldr	r3, [r7, #4]
 801f07c:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f07e:	4b6e      	ldr	r3, [pc, #440]	@ (801f238 <tcp_receive+0x88c>)
 801f080:	881b      	ldrh	r3, [r3, #0]
 801f082:	429a      	cmp	r2, r3
 801f084:	d274      	bcs.n	801f170 <tcp_receive+0x7c4>
          LWIP_DEBUGF(TCP_INPUT_DEBUG,
                      ("tcp_receive: other end overran receive window"
                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f086:	4b6b      	ldr	r3, [pc, #428]	@ (801f234 <tcp_receive+0x888>)
 801f088:	691b      	ldr	r3, [r3, #16]
 801f08a:	899b      	ldrh	r3, [r3, #12]
 801f08c:	b29b      	uxth	r3, r3
 801f08e:	4618      	mov	r0, r3
 801f090:	f7fa fc0a 	bl	80198a8 <lwip_htons>
 801f094:	4603      	mov	r3, r0
 801f096:	b2db      	uxtb	r3, r3
 801f098:	f003 0301 	and.w	r3, r3, #1
 801f09c:	2b00      	cmp	r3, #0
 801f09e:	d01e      	beq.n	801f0de <tcp_receive+0x732>
            /* Must remove the FIN from the header as we're trimming
             * that byte of sequence-space from the packet */
            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
 801f0a0:	4b64      	ldr	r3, [pc, #400]	@ (801f234 <tcp_receive+0x888>)
 801f0a2:	691b      	ldr	r3, [r3, #16]
 801f0a4:	899b      	ldrh	r3, [r3, #12]
 801f0a6:	b29b      	uxth	r3, r3
 801f0a8:	b21b      	sxth	r3, r3
 801f0aa:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801f0ae:	b21c      	sxth	r4, r3
 801f0b0:	4b60      	ldr	r3, [pc, #384]	@ (801f234 <tcp_receive+0x888>)
 801f0b2:	691b      	ldr	r3, [r3, #16]
 801f0b4:	899b      	ldrh	r3, [r3, #12]
 801f0b6:	b29b      	uxth	r3, r3
 801f0b8:	4618      	mov	r0, r3
 801f0ba:	f7fa fbf5 	bl	80198a8 <lwip_htons>
 801f0be:	4603      	mov	r3, r0
 801f0c0:	b2db      	uxtb	r3, r3
 801f0c2:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801f0c6:	b29b      	uxth	r3, r3
 801f0c8:	4618      	mov	r0, r3
 801f0ca:	f7fa fbed 	bl	80198a8 <lwip_htons>
 801f0ce:	4603      	mov	r3, r0
 801f0d0:	b21b      	sxth	r3, r3
 801f0d2:	4323      	orrs	r3, r4
 801f0d4:	b21a      	sxth	r2, r3
 801f0d6:	4b57      	ldr	r3, [pc, #348]	@ (801f234 <tcp_receive+0x888>)
 801f0d8:	691b      	ldr	r3, [r3, #16]
 801f0da:	b292      	uxth	r2, r2
 801f0dc:	819a      	strh	r2, [r3, #12]
          }
          /* Adjust length of segment to fit in the window. */
          TCPWND_CHECK16(pcb->rcv_wnd);
          inseg.len = (u16_t)pcb->rcv_wnd;
 801f0de:	687b      	ldr	r3, [r7, #4]
 801f0e0:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f0e2:	4b54      	ldr	r3, [pc, #336]	@ (801f234 <tcp_receive+0x888>)
 801f0e4:	811a      	strh	r2, [r3, #8]
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801f0e6:	4b53      	ldr	r3, [pc, #332]	@ (801f234 <tcp_receive+0x888>)
 801f0e8:	691b      	ldr	r3, [r3, #16]
 801f0ea:	899b      	ldrh	r3, [r3, #12]
 801f0ec:	b29b      	uxth	r3, r3
 801f0ee:	4618      	mov	r0, r3
 801f0f0:	f7fa fbda 	bl	80198a8 <lwip_htons>
 801f0f4:	4603      	mov	r3, r0
 801f0f6:	b2db      	uxtb	r3, r3
 801f0f8:	f003 0302 	and.w	r3, r3, #2
 801f0fc:	2b00      	cmp	r3, #0
 801f0fe:	d005      	beq.n	801f10c <tcp_receive+0x760>
            inseg.len -= 1;
 801f100:	4b4c      	ldr	r3, [pc, #304]	@ (801f234 <tcp_receive+0x888>)
 801f102:	891b      	ldrh	r3, [r3, #8]
 801f104:	3b01      	subs	r3, #1
 801f106:	b29a      	uxth	r2, r3
 801f108:	4b4a      	ldr	r3, [pc, #296]	@ (801f234 <tcp_receive+0x888>)
 801f10a:	811a      	strh	r2, [r3, #8]
          }
          pbuf_realloc(inseg.p, inseg.len);
 801f10c:	4b49      	ldr	r3, [pc, #292]	@ (801f234 <tcp_receive+0x888>)
 801f10e:	685b      	ldr	r3, [r3, #4]
 801f110:	4a48      	ldr	r2, [pc, #288]	@ (801f234 <tcp_receive+0x888>)
 801f112:	8912      	ldrh	r2, [r2, #8]
 801f114:	4611      	mov	r1, r2
 801f116:	4618      	mov	r0, r3
 801f118:	f7fb fef2 	bl	801af00 <pbuf_realloc>
          tcplen = TCP_TCPLEN(&inseg);
 801f11c:	4b45      	ldr	r3, [pc, #276]	@ (801f234 <tcp_receive+0x888>)
 801f11e:	891c      	ldrh	r4, [r3, #8]
 801f120:	4b44      	ldr	r3, [pc, #272]	@ (801f234 <tcp_receive+0x888>)
 801f122:	691b      	ldr	r3, [r3, #16]
 801f124:	899b      	ldrh	r3, [r3, #12]
 801f126:	b29b      	uxth	r3, r3
 801f128:	4618      	mov	r0, r3
 801f12a:	f7fa fbbd 	bl	80198a8 <lwip_htons>
 801f12e:	4603      	mov	r3, r0
 801f130:	b2db      	uxtb	r3, r3
 801f132:	f003 0303 	and.w	r3, r3, #3
 801f136:	2b00      	cmp	r3, #0
 801f138:	d001      	beq.n	801f13e <tcp_receive+0x792>
 801f13a:	2301      	movs	r3, #1
 801f13c:	e000      	b.n	801f140 <tcp_receive+0x794>
 801f13e:	2300      	movs	r3, #0
 801f140:	4423      	add	r3, r4
 801f142:	b29a      	uxth	r2, r3
 801f144:	4b3c      	ldr	r3, [pc, #240]	@ (801f238 <tcp_receive+0x88c>)
 801f146:	801a      	strh	r2, [r3, #0]
          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801f148:	4b3b      	ldr	r3, [pc, #236]	@ (801f238 <tcp_receive+0x88c>)
 801f14a:	881b      	ldrh	r3, [r3, #0]
 801f14c:	461a      	mov	r2, r3
 801f14e:	4b38      	ldr	r3, [pc, #224]	@ (801f230 <tcp_receive+0x884>)
 801f150:	681b      	ldr	r3, [r3, #0]
 801f152:	441a      	add	r2, r3
 801f154:	687b      	ldr	r3, [r7, #4]
 801f156:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f158:	6879      	ldr	r1, [r7, #4]
 801f15a:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f15c:	440b      	add	r3, r1
 801f15e:	429a      	cmp	r2, r3
 801f160:	d006      	beq.n	801f170 <tcp_receive+0x7c4>
 801f162:	4b36      	ldr	r3, [pc, #216]	@ (801f23c <tcp_receive+0x890>)
 801f164:	f240 52cb 	movw	r2, #1483	@ 0x5cb
 801f168:	4935      	ldr	r1, [pc, #212]	@ (801f240 <tcp_receive+0x894>)
 801f16a:	4836      	ldr	r0, [pc, #216]	@ (801f244 <tcp_receive+0x898>)
 801f16c:	f00b faf6 	bl	802a75c <iprintf>
        }
#if TCP_QUEUE_OOSEQ
        /* Received in-sequence data, adjust ooseq data if:
           - FIN has been received or
           - inseq overlaps with ooseq */
        if (pcb->ooseq != NULL) {
 801f170:	687b      	ldr	r3, [r7, #4]
 801f172:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f174:	2b00      	cmp	r3, #0
 801f176:	f000 80e6 	beq.w	801f346 <tcp_receive+0x99a>
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f17a:	4b2e      	ldr	r3, [pc, #184]	@ (801f234 <tcp_receive+0x888>)
 801f17c:	691b      	ldr	r3, [r3, #16]
 801f17e:	899b      	ldrh	r3, [r3, #12]
 801f180:	b29b      	uxth	r3, r3
 801f182:	4618      	mov	r0, r3
 801f184:	f7fa fb90 	bl	80198a8 <lwip_htons>
 801f188:	4603      	mov	r3, r0
 801f18a:	b2db      	uxtb	r3, r3
 801f18c:	f003 0301 	and.w	r3, r3, #1
 801f190:	2b00      	cmp	r3, #0
 801f192:	d010      	beq.n	801f1b6 <tcp_receive+0x80a>
            LWIP_DEBUGF(TCP_INPUT_DEBUG,
                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
            /* Received in-order FIN means anything that was received
             * out of order must now have been received in-order, so
             * bin the ooseq queue */
            while (pcb->ooseq != NULL) {
 801f194:	e00a      	b.n	801f1ac <tcp_receive+0x800>
              struct tcp_seg *old_ooseq = pcb->ooseq;
 801f196:	687b      	ldr	r3, [r7, #4]
 801f198:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f19a:	60fb      	str	r3, [r7, #12]
              pcb->ooseq = pcb->ooseq->next;
 801f19c:	687b      	ldr	r3, [r7, #4]
 801f19e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f1a0:	681a      	ldr	r2, [r3, #0]
 801f1a2:	687b      	ldr	r3, [r7, #4]
 801f1a4:	675a      	str	r2, [r3, #116]	@ 0x74
              tcp_seg_free(old_ooseq);
 801f1a6:	68f8      	ldr	r0, [r7, #12]
 801f1a8:	f7fd fcb9 	bl	801cb1e <tcp_seg_free>
            while (pcb->ooseq != NULL) {
 801f1ac:	687b      	ldr	r3, [r7, #4]
 801f1ae:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f1b0:	2b00      	cmp	r3, #0
 801f1b2:	d1f0      	bne.n	801f196 <tcp_receive+0x7ea>
 801f1b4:	e0c7      	b.n	801f346 <tcp_receive+0x99a>
            }
          } else {
            struct tcp_seg *next = pcb->ooseq;
 801f1b6:	687b      	ldr	r3, [r7, #4]
 801f1b8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f1ba:	63fb      	str	r3, [r7, #60]	@ 0x3c
            /* Remove all segments on ooseq that are covered by inseg already.
             * FIN is copied from ooseq to inseg if present. */
            while (next &&
 801f1bc:	e051      	b.n	801f262 <tcp_receive+0x8b6>
                   TCP_SEQ_GEQ(seqno + tcplen,
                               next->tcphdr->seqno + next->len)) {
              struct tcp_seg *tmp;
              /* inseg cannot have FIN here (already processed above) */
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801f1be:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f1c0:	691b      	ldr	r3, [r3, #16]
 801f1c2:	899b      	ldrh	r3, [r3, #12]
 801f1c4:	b29b      	uxth	r3, r3
 801f1c6:	4618      	mov	r0, r3
 801f1c8:	f7fa fb6e 	bl	80198a8 <lwip_htons>
 801f1cc:	4603      	mov	r3, r0
 801f1ce:	b2db      	uxtb	r3, r3
 801f1d0:	f003 0301 	and.w	r3, r3, #1
 801f1d4:	2b00      	cmp	r3, #0
 801f1d6:	d03c      	beq.n	801f252 <tcp_receive+0x8a6>
                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
 801f1d8:	4b16      	ldr	r3, [pc, #88]	@ (801f234 <tcp_receive+0x888>)
 801f1da:	691b      	ldr	r3, [r3, #16]
 801f1dc:	899b      	ldrh	r3, [r3, #12]
 801f1de:	b29b      	uxth	r3, r3
 801f1e0:	4618      	mov	r0, r3
 801f1e2:	f7fa fb61 	bl	80198a8 <lwip_htons>
 801f1e6:	4603      	mov	r3, r0
 801f1e8:	b2db      	uxtb	r3, r3
 801f1ea:	f003 0302 	and.w	r3, r3, #2
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801f1ee:	2b00      	cmp	r3, #0
 801f1f0:	d12f      	bne.n	801f252 <tcp_receive+0x8a6>
                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
 801f1f2:	4b10      	ldr	r3, [pc, #64]	@ (801f234 <tcp_receive+0x888>)
 801f1f4:	691b      	ldr	r3, [r3, #16]
 801f1f6:	899b      	ldrh	r3, [r3, #12]
 801f1f8:	b29c      	uxth	r4, r3
 801f1fa:	2001      	movs	r0, #1
 801f1fc:	f7fa fb54 	bl	80198a8 <lwip_htons>
 801f200:	4603      	mov	r3, r0
 801f202:	461a      	mov	r2, r3
 801f204:	4b0b      	ldr	r3, [pc, #44]	@ (801f234 <tcp_receive+0x888>)
 801f206:	691b      	ldr	r3, [r3, #16]
 801f208:	4322      	orrs	r2, r4
 801f20a:	b292      	uxth	r2, r2
 801f20c:	819a      	strh	r2, [r3, #12]
                tcplen = TCP_TCPLEN(&inseg);
 801f20e:	4b09      	ldr	r3, [pc, #36]	@ (801f234 <tcp_receive+0x888>)
 801f210:	891c      	ldrh	r4, [r3, #8]
 801f212:	4b08      	ldr	r3, [pc, #32]	@ (801f234 <tcp_receive+0x888>)
 801f214:	691b      	ldr	r3, [r3, #16]
 801f216:	899b      	ldrh	r3, [r3, #12]
 801f218:	b29b      	uxth	r3, r3
 801f21a:	4618      	mov	r0, r3
 801f21c:	f7fa fb44 	bl	80198a8 <lwip_htons>
 801f220:	4603      	mov	r3, r0
 801f222:	b2db      	uxtb	r3, r3
 801f224:	f003 0303 	and.w	r3, r3, #3
 801f228:	2b00      	cmp	r3, #0
 801f22a:	d00d      	beq.n	801f248 <tcp_receive+0x89c>
 801f22c:	2301      	movs	r3, #1
 801f22e:	e00c      	b.n	801f24a <tcp_receive+0x89e>
 801f230:	2402afa4 	.word	0x2402afa4
 801f234:	2402af80 	.word	0x2402af80
 801f238:	2402afae 	.word	0x2402afae
 801f23c:	0802fbf4 	.word	0x0802fbf4
 801f240:	0802ff9c 	.word	0x0802ff9c
 801f244:	0802fc40 	.word	0x0802fc40
 801f248:	2300      	movs	r3, #0
 801f24a:	4423      	add	r3, r4
 801f24c:	b29a      	uxth	r2, r3
 801f24e:	4b98      	ldr	r3, [pc, #608]	@ (801f4b0 <tcp_receive+0xb04>)
 801f250:	801a      	strh	r2, [r3, #0]
              }
              tmp = next;
 801f252:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f254:	613b      	str	r3, [r7, #16]
              next = next->next;
 801f256:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f258:	681b      	ldr	r3, [r3, #0]
 801f25a:	63fb      	str	r3, [r7, #60]	@ 0x3c
              tcp_seg_free(tmp);
 801f25c:	6938      	ldr	r0, [r7, #16]
 801f25e:	f7fd fc5e 	bl	801cb1e <tcp_seg_free>
            while (next &&
 801f262:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f264:	2b00      	cmp	r3, #0
 801f266:	d00e      	beq.n	801f286 <tcp_receive+0x8da>
                   TCP_SEQ_GEQ(seqno + tcplen,
 801f268:	4b91      	ldr	r3, [pc, #580]	@ (801f4b0 <tcp_receive+0xb04>)
 801f26a:	881b      	ldrh	r3, [r3, #0]
 801f26c:	461a      	mov	r2, r3
 801f26e:	4b91      	ldr	r3, [pc, #580]	@ (801f4b4 <tcp_receive+0xb08>)
 801f270:	681b      	ldr	r3, [r3, #0]
 801f272:	441a      	add	r2, r3
 801f274:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f276:	691b      	ldr	r3, [r3, #16]
 801f278:	685b      	ldr	r3, [r3, #4]
 801f27a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801f27c:	8909      	ldrh	r1, [r1, #8]
 801f27e:	440b      	add	r3, r1
 801f280:	1ad3      	subs	r3, r2, r3
            while (next &&
 801f282:	2b00      	cmp	r3, #0
 801f284:	da9b      	bge.n	801f1be <tcp_receive+0x812>
            }
            /* Now trim right side of inseg if it overlaps with the first
             * segment on ooseq */
            if (next &&
 801f286:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f288:	2b00      	cmp	r3, #0
 801f28a:	d059      	beq.n	801f340 <tcp_receive+0x994>
                TCP_SEQ_GT(seqno + tcplen,
 801f28c:	4b88      	ldr	r3, [pc, #544]	@ (801f4b0 <tcp_receive+0xb04>)
 801f28e:	881b      	ldrh	r3, [r3, #0]
 801f290:	461a      	mov	r2, r3
 801f292:	4b88      	ldr	r3, [pc, #544]	@ (801f4b4 <tcp_receive+0xb08>)
 801f294:	681b      	ldr	r3, [r3, #0]
 801f296:	441a      	add	r2, r3
 801f298:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f29a:	691b      	ldr	r3, [r3, #16]
 801f29c:	685b      	ldr	r3, [r3, #4]
 801f29e:	1ad3      	subs	r3, r2, r3
            if (next &&
 801f2a0:	2b00      	cmp	r3, #0
 801f2a2:	dd4d      	ble.n	801f340 <tcp_receive+0x994>
                           next->tcphdr->seqno)) {
              /* inseg cannot have FIN here (already processed above) */
              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
 801f2a4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f2a6:	691b      	ldr	r3, [r3, #16]
 801f2a8:	685b      	ldr	r3, [r3, #4]
 801f2aa:	b29a      	uxth	r2, r3
 801f2ac:	4b81      	ldr	r3, [pc, #516]	@ (801f4b4 <tcp_receive+0xb08>)
 801f2ae:	681b      	ldr	r3, [r3, #0]
 801f2b0:	b29b      	uxth	r3, r3
 801f2b2:	1ad3      	subs	r3, r2, r3
 801f2b4:	b29a      	uxth	r2, r3
 801f2b6:	4b80      	ldr	r3, [pc, #512]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2b8:	811a      	strh	r2, [r3, #8]
              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801f2ba:	4b7f      	ldr	r3, [pc, #508]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2bc:	691b      	ldr	r3, [r3, #16]
 801f2be:	899b      	ldrh	r3, [r3, #12]
 801f2c0:	b29b      	uxth	r3, r3
 801f2c2:	4618      	mov	r0, r3
 801f2c4:	f7fa faf0 	bl	80198a8 <lwip_htons>
 801f2c8:	4603      	mov	r3, r0
 801f2ca:	b2db      	uxtb	r3, r3
 801f2cc:	f003 0302 	and.w	r3, r3, #2
 801f2d0:	2b00      	cmp	r3, #0
 801f2d2:	d005      	beq.n	801f2e0 <tcp_receive+0x934>
                inseg.len -= 1;
 801f2d4:	4b78      	ldr	r3, [pc, #480]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2d6:	891b      	ldrh	r3, [r3, #8]
 801f2d8:	3b01      	subs	r3, #1
 801f2da:	b29a      	uxth	r2, r3
 801f2dc:	4b76      	ldr	r3, [pc, #472]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2de:	811a      	strh	r2, [r3, #8]
              }
              pbuf_realloc(inseg.p, inseg.len);
 801f2e0:	4b75      	ldr	r3, [pc, #468]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2e2:	685b      	ldr	r3, [r3, #4]
 801f2e4:	4a74      	ldr	r2, [pc, #464]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2e6:	8912      	ldrh	r2, [r2, #8]
 801f2e8:	4611      	mov	r1, r2
 801f2ea:	4618      	mov	r0, r3
 801f2ec:	f7fb fe08 	bl	801af00 <pbuf_realloc>
              tcplen = TCP_TCPLEN(&inseg);
 801f2f0:	4b71      	ldr	r3, [pc, #452]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2f2:	891c      	ldrh	r4, [r3, #8]
 801f2f4:	4b70      	ldr	r3, [pc, #448]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f2f6:	691b      	ldr	r3, [r3, #16]
 801f2f8:	899b      	ldrh	r3, [r3, #12]
 801f2fa:	b29b      	uxth	r3, r3
 801f2fc:	4618      	mov	r0, r3
 801f2fe:	f7fa fad3 	bl	80198a8 <lwip_htons>
 801f302:	4603      	mov	r3, r0
 801f304:	b2db      	uxtb	r3, r3
 801f306:	f003 0303 	and.w	r3, r3, #3
 801f30a:	2b00      	cmp	r3, #0
 801f30c:	d001      	beq.n	801f312 <tcp_receive+0x966>
 801f30e:	2301      	movs	r3, #1
 801f310:	e000      	b.n	801f314 <tcp_receive+0x968>
 801f312:	2300      	movs	r3, #0
 801f314:	4423      	add	r3, r4
 801f316:	b29a      	uxth	r2, r3
 801f318:	4b65      	ldr	r3, [pc, #404]	@ (801f4b0 <tcp_receive+0xb04>)
 801f31a:	801a      	strh	r2, [r3, #0]
              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
 801f31c:	4b64      	ldr	r3, [pc, #400]	@ (801f4b0 <tcp_receive+0xb04>)
 801f31e:	881b      	ldrh	r3, [r3, #0]
 801f320:	461a      	mov	r2, r3
 801f322:	4b64      	ldr	r3, [pc, #400]	@ (801f4b4 <tcp_receive+0xb08>)
 801f324:	681b      	ldr	r3, [r3, #0]
 801f326:	441a      	add	r2, r3
 801f328:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f32a:	691b      	ldr	r3, [r3, #16]
 801f32c:	685b      	ldr	r3, [r3, #4]
 801f32e:	429a      	cmp	r2, r3
 801f330:	d006      	beq.n	801f340 <tcp_receive+0x994>
 801f332:	4b62      	ldr	r3, [pc, #392]	@ (801f4bc <tcp_receive+0xb10>)
 801f334:	f240 52fc 	movw	r2, #1532	@ 0x5fc
 801f338:	4961      	ldr	r1, [pc, #388]	@ (801f4c0 <tcp_receive+0xb14>)
 801f33a:	4862      	ldr	r0, [pc, #392]	@ (801f4c4 <tcp_receive+0xb18>)
 801f33c:	f00b fa0e 	bl	802a75c <iprintf>
                          (seqno + tcplen) == next->tcphdr->seqno);
            }
            pcb->ooseq = next;
 801f340:	687b      	ldr	r3, [r7, #4]
 801f342:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 801f344:	675a      	str	r2, [r3, #116]	@ 0x74
          }
        }
#endif /* TCP_QUEUE_OOSEQ */

        pcb->rcv_nxt = seqno + tcplen;
 801f346:	4b5a      	ldr	r3, [pc, #360]	@ (801f4b0 <tcp_receive+0xb04>)
 801f348:	881b      	ldrh	r3, [r3, #0]
 801f34a:	461a      	mov	r2, r3
 801f34c:	4b59      	ldr	r3, [pc, #356]	@ (801f4b4 <tcp_receive+0xb08>)
 801f34e:	681b      	ldr	r3, [r3, #0]
 801f350:	441a      	add	r2, r3
 801f352:	687b      	ldr	r3, [r7, #4]
 801f354:	625a      	str	r2, [r3, #36]	@ 0x24

        /* Update the receiver's (our) window. */
        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
 801f356:	687b      	ldr	r3, [r7, #4]
 801f358:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f35a:	4b55      	ldr	r3, [pc, #340]	@ (801f4b0 <tcp_receive+0xb04>)
 801f35c:	881b      	ldrh	r3, [r3, #0]
 801f35e:	429a      	cmp	r2, r3
 801f360:	d206      	bcs.n	801f370 <tcp_receive+0x9c4>
 801f362:	4b56      	ldr	r3, [pc, #344]	@ (801f4bc <tcp_receive+0xb10>)
 801f364:	f240 6207 	movw	r2, #1543	@ 0x607
 801f368:	4957      	ldr	r1, [pc, #348]	@ (801f4c8 <tcp_receive+0xb1c>)
 801f36a:	4856      	ldr	r0, [pc, #344]	@ (801f4c4 <tcp_receive+0xb18>)
 801f36c:	f00b f9f6 	bl	802a75c <iprintf>
        pcb->rcv_wnd -= tcplen;
 801f370:	687b      	ldr	r3, [r7, #4]
 801f372:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f374:	4b4e      	ldr	r3, [pc, #312]	@ (801f4b0 <tcp_receive+0xb04>)
 801f376:	881b      	ldrh	r3, [r3, #0]
 801f378:	1ad3      	subs	r3, r2, r3
 801f37a:	b29a      	uxth	r2, r3
 801f37c:	687b      	ldr	r3, [r7, #4]
 801f37e:	851a      	strh	r2, [r3, #40]	@ 0x28

        tcp_update_rcv_ann_wnd(pcb);
 801f380:	6878      	ldr	r0, [r7, #4]
 801f382:	f7fc fd85 	bl	801be90 <tcp_update_rcv_ann_wnd>
           chains its data on this pbuf as well.

           If the segment was a FIN, we set the TF_GOT_FIN flag that will
           be used to indicate to the application that the remote side has
           closed its end of the connection. */
        if (inseg.p->tot_len > 0) {
 801f386:	4b4c      	ldr	r3, [pc, #304]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f388:	685b      	ldr	r3, [r3, #4]
 801f38a:	891b      	ldrh	r3, [r3, #8]
 801f38c:	2b00      	cmp	r3, #0
 801f38e:	d006      	beq.n	801f39e <tcp_receive+0x9f2>
          recv_data = inseg.p;
 801f390:	4b49      	ldr	r3, [pc, #292]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f392:	685b      	ldr	r3, [r3, #4]
 801f394:	4a4d      	ldr	r2, [pc, #308]	@ (801f4cc <tcp_receive+0xb20>)
 801f396:	6013      	str	r3, [r2, #0]
          /* Since this pbuf now is the responsibility of the
             application, we delete our reference to it so that we won't
             (mistakingly) deallocate it. */
          inseg.p = NULL;
 801f398:	4b47      	ldr	r3, [pc, #284]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f39a:	2200      	movs	r2, #0
 801f39c:	605a      	str	r2, [r3, #4]
        }
        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f39e:	4b46      	ldr	r3, [pc, #280]	@ (801f4b8 <tcp_receive+0xb0c>)
 801f3a0:	691b      	ldr	r3, [r3, #16]
 801f3a2:	899b      	ldrh	r3, [r3, #12]
 801f3a4:	b29b      	uxth	r3, r3
 801f3a6:	4618      	mov	r0, r3
 801f3a8:	f7fa fa7e 	bl	80198a8 <lwip_htons>
 801f3ac:	4603      	mov	r3, r0
 801f3ae:	b2db      	uxtb	r3, r3
 801f3b0:	f003 0301 	and.w	r3, r3, #1
 801f3b4:	2b00      	cmp	r3, #0
 801f3b6:	f000 80b8 	beq.w	801f52a <tcp_receive+0xb7e>
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
          recv_flags |= TF_GOT_FIN;
 801f3ba:	4b45      	ldr	r3, [pc, #276]	@ (801f4d0 <tcp_receive+0xb24>)
 801f3bc:	781b      	ldrb	r3, [r3, #0]
 801f3be:	f043 0320 	orr.w	r3, r3, #32
 801f3c2:	b2da      	uxtb	r2, r3
 801f3c4:	4b42      	ldr	r3, [pc, #264]	@ (801f4d0 <tcp_receive+0xb24>)
 801f3c6:	701a      	strb	r2, [r3, #0]
        }

#if TCP_QUEUE_OOSEQ
        /* We now check if we have segments on the ->ooseq queue that
           are now in sequence. */
        while (pcb->ooseq != NULL &&
 801f3c8:	e0af      	b.n	801f52a <tcp_receive+0xb7e>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {

          struct tcp_seg *cseg = pcb->ooseq;
 801f3ca:	687b      	ldr	r3, [r7, #4]
 801f3cc:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f3ce:	60bb      	str	r3, [r7, #8]
          seqno = pcb->ooseq->tcphdr->seqno;
 801f3d0:	687b      	ldr	r3, [r7, #4]
 801f3d2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f3d4:	691b      	ldr	r3, [r3, #16]
 801f3d6:	685b      	ldr	r3, [r3, #4]
 801f3d8:	4a36      	ldr	r2, [pc, #216]	@ (801f4b4 <tcp_receive+0xb08>)
 801f3da:	6013      	str	r3, [r2, #0]

          pcb->rcv_nxt += TCP_TCPLEN(cseg);
 801f3dc:	68bb      	ldr	r3, [r7, #8]
 801f3de:	891b      	ldrh	r3, [r3, #8]
 801f3e0:	461c      	mov	r4, r3
 801f3e2:	68bb      	ldr	r3, [r7, #8]
 801f3e4:	691b      	ldr	r3, [r3, #16]
 801f3e6:	899b      	ldrh	r3, [r3, #12]
 801f3e8:	b29b      	uxth	r3, r3
 801f3ea:	4618      	mov	r0, r3
 801f3ec:	f7fa fa5c 	bl	80198a8 <lwip_htons>
 801f3f0:	4603      	mov	r3, r0
 801f3f2:	b2db      	uxtb	r3, r3
 801f3f4:	f003 0303 	and.w	r3, r3, #3
 801f3f8:	2b00      	cmp	r3, #0
 801f3fa:	d001      	beq.n	801f400 <tcp_receive+0xa54>
 801f3fc:	2301      	movs	r3, #1
 801f3fe:	e000      	b.n	801f402 <tcp_receive+0xa56>
 801f400:	2300      	movs	r3, #0
 801f402:	191a      	adds	r2, r3, r4
 801f404:	687b      	ldr	r3, [r7, #4]
 801f406:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f408:	441a      	add	r2, r3
 801f40a:	687b      	ldr	r3, [r7, #4]
 801f40c:	625a      	str	r2, [r3, #36]	@ 0x24
          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
 801f40e:	687b      	ldr	r3, [r7, #4]
 801f410:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801f412:	461c      	mov	r4, r3
 801f414:	68bb      	ldr	r3, [r7, #8]
 801f416:	891b      	ldrh	r3, [r3, #8]
 801f418:	461d      	mov	r5, r3
 801f41a:	68bb      	ldr	r3, [r7, #8]
 801f41c:	691b      	ldr	r3, [r3, #16]
 801f41e:	899b      	ldrh	r3, [r3, #12]
 801f420:	b29b      	uxth	r3, r3
 801f422:	4618      	mov	r0, r3
 801f424:	f7fa fa40 	bl	80198a8 <lwip_htons>
 801f428:	4603      	mov	r3, r0
 801f42a:	b2db      	uxtb	r3, r3
 801f42c:	f003 0303 	and.w	r3, r3, #3
 801f430:	2b00      	cmp	r3, #0
 801f432:	d001      	beq.n	801f438 <tcp_receive+0xa8c>
 801f434:	2301      	movs	r3, #1
 801f436:	e000      	b.n	801f43a <tcp_receive+0xa8e>
 801f438:	2300      	movs	r3, #0
 801f43a:	442b      	add	r3, r5
 801f43c:	429c      	cmp	r4, r3
 801f43e:	d206      	bcs.n	801f44e <tcp_receive+0xaa2>
 801f440:	4b1e      	ldr	r3, [pc, #120]	@ (801f4bc <tcp_receive+0xb10>)
 801f442:	f240 622b 	movw	r2, #1579	@ 0x62b
 801f446:	4923      	ldr	r1, [pc, #140]	@ (801f4d4 <tcp_receive+0xb28>)
 801f448:	481e      	ldr	r0, [pc, #120]	@ (801f4c4 <tcp_receive+0xb18>)
 801f44a:	f00b f987 	bl	802a75c <iprintf>
                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
 801f44e:	68bb      	ldr	r3, [r7, #8]
 801f450:	891b      	ldrh	r3, [r3, #8]
 801f452:	461c      	mov	r4, r3
 801f454:	68bb      	ldr	r3, [r7, #8]
 801f456:	691b      	ldr	r3, [r3, #16]
 801f458:	899b      	ldrh	r3, [r3, #12]
 801f45a:	b29b      	uxth	r3, r3
 801f45c:	4618      	mov	r0, r3
 801f45e:	f7fa fa23 	bl	80198a8 <lwip_htons>
 801f462:	4603      	mov	r3, r0
 801f464:	b2db      	uxtb	r3, r3
 801f466:	f003 0303 	and.w	r3, r3, #3
 801f46a:	2b00      	cmp	r3, #0
 801f46c:	d001      	beq.n	801f472 <tcp_receive+0xac6>
 801f46e:	2301      	movs	r3, #1
 801f470:	e000      	b.n	801f474 <tcp_receive+0xac8>
 801f472:	2300      	movs	r3, #0
 801f474:	1919      	adds	r1, r3, r4
 801f476:	687b      	ldr	r3, [r7, #4]
 801f478:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f47a:	b28b      	uxth	r3, r1
 801f47c:	1ad3      	subs	r3, r2, r3
 801f47e:	b29a      	uxth	r2, r3
 801f480:	687b      	ldr	r3, [r7, #4]
 801f482:	851a      	strh	r2, [r3, #40]	@ 0x28

          tcp_update_rcv_ann_wnd(pcb);
 801f484:	6878      	ldr	r0, [r7, #4]
 801f486:	f7fc fd03 	bl	801be90 <tcp_update_rcv_ann_wnd>

          if (cseg->p->tot_len > 0) {
 801f48a:	68bb      	ldr	r3, [r7, #8]
 801f48c:	685b      	ldr	r3, [r3, #4]
 801f48e:	891b      	ldrh	r3, [r3, #8]
 801f490:	2b00      	cmp	r3, #0
 801f492:	d028      	beq.n	801f4e6 <tcp_receive+0xb3a>
            /* Chain this pbuf onto the pbuf that we will pass to
               the application. */
            /* With window scaling, this can overflow recv_data->tot_len, but
               that's not a problem since we explicitly fix that before passing
               recv_data to the application. */
            if (recv_data) {
 801f494:	4b0d      	ldr	r3, [pc, #52]	@ (801f4cc <tcp_receive+0xb20>)
 801f496:	681b      	ldr	r3, [r3, #0]
 801f498:	2b00      	cmp	r3, #0
 801f49a:	d01d      	beq.n	801f4d8 <tcp_receive+0xb2c>
              pbuf_cat(recv_data, cseg->p);
 801f49c:	4b0b      	ldr	r3, [pc, #44]	@ (801f4cc <tcp_receive+0xb20>)
 801f49e:	681a      	ldr	r2, [r3, #0]
 801f4a0:	68bb      	ldr	r3, [r7, #8]
 801f4a2:	685b      	ldr	r3, [r3, #4]
 801f4a4:	4619      	mov	r1, r3
 801f4a6:	4610      	mov	r0, r2
 801f4a8:	f7fb ffae 	bl	801b408 <pbuf_cat>
 801f4ac:	e018      	b.n	801f4e0 <tcp_receive+0xb34>
 801f4ae:	bf00      	nop
 801f4b0:	2402afae 	.word	0x2402afae
 801f4b4:	2402afa4 	.word	0x2402afa4
 801f4b8:	2402af80 	.word	0x2402af80
 801f4bc:	0802fbf4 	.word	0x0802fbf4
 801f4c0:	0802ffd4 	.word	0x0802ffd4
 801f4c4:	0802fc40 	.word	0x0802fc40
 801f4c8:	08030010 	.word	0x08030010
 801f4cc:	2402afb4 	.word	0x2402afb4
 801f4d0:	2402afb1 	.word	0x2402afb1
 801f4d4:	08030030 	.word	0x08030030
            } else {
              recv_data = cseg->p;
 801f4d8:	68bb      	ldr	r3, [r7, #8]
 801f4da:	685b      	ldr	r3, [r3, #4]
 801f4dc:	4a70      	ldr	r2, [pc, #448]	@ (801f6a0 <tcp_receive+0xcf4>)
 801f4de:	6013      	str	r3, [r2, #0]
            }
            cseg->p = NULL;
 801f4e0:	68bb      	ldr	r3, [r7, #8]
 801f4e2:	2200      	movs	r2, #0
 801f4e4:	605a      	str	r2, [r3, #4]
          }
          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801f4e6:	68bb      	ldr	r3, [r7, #8]
 801f4e8:	691b      	ldr	r3, [r3, #16]
 801f4ea:	899b      	ldrh	r3, [r3, #12]
 801f4ec:	b29b      	uxth	r3, r3
 801f4ee:	4618      	mov	r0, r3
 801f4f0:	f7fa f9da 	bl	80198a8 <lwip_htons>
 801f4f4:	4603      	mov	r3, r0
 801f4f6:	b2db      	uxtb	r3, r3
 801f4f8:	f003 0301 	and.w	r3, r3, #1
 801f4fc:	2b00      	cmp	r3, #0
 801f4fe:	d00d      	beq.n	801f51c <tcp_receive+0xb70>
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
            recv_flags |= TF_GOT_FIN;
 801f500:	4b68      	ldr	r3, [pc, #416]	@ (801f6a4 <tcp_receive+0xcf8>)
 801f502:	781b      	ldrb	r3, [r3, #0]
 801f504:	f043 0320 	orr.w	r3, r3, #32
 801f508:	b2da      	uxtb	r2, r3
 801f50a:	4b66      	ldr	r3, [pc, #408]	@ (801f6a4 <tcp_receive+0xcf8>)
 801f50c:	701a      	strb	r2, [r3, #0]
            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
 801f50e:	687b      	ldr	r3, [r7, #4]
 801f510:	7d1b      	ldrb	r3, [r3, #20]
 801f512:	2b04      	cmp	r3, #4
 801f514:	d102      	bne.n	801f51c <tcp_receive+0xb70>
              pcb->state = CLOSE_WAIT;
 801f516:	687b      	ldr	r3, [r7, #4]
 801f518:	2207      	movs	r2, #7
 801f51a:	751a      	strb	r2, [r3, #20]
            }
          }

          pcb->ooseq = cseg->next;
 801f51c:	68bb      	ldr	r3, [r7, #8]
 801f51e:	681a      	ldr	r2, [r3, #0]
 801f520:	687b      	ldr	r3, [r7, #4]
 801f522:	675a      	str	r2, [r3, #116]	@ 0x74
          tcp_seg_free(cseg);
 801f524:	68b8      	ldr	r0, [r7, #8]
 801f526:	f7fd fafa 	bl	801cb1e <tcp_seg_free>
        while (pcb->ooseq != NULL &&
 801f52a:	687b      	ldr	r3, [r7, #4]
 801f52c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f52e:	2b00      	cmp	r3, #0
 801f530:	d008      	beq.n	801f544 <tcp_receive+0xb98>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
 801f532:	687b      	ldr	r3, [r7, #4]
 801f534:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f536:	691b      	ldr	r3, [r3, #16]
 801f538:	685a      	ldr	r2, [r3, #4]
 801f53a:	687b      	ldr	r3, [r7, #4]
 801f53c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
        while (pcb->ooseq != NULL &&
 801f53e:	429a      	cmp	r2, r3
 801f540:	f43f af43 	beq.w	801f3ca <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */


        /* Acknowledge the segment(s). */
        tcp_ack(pcb);
 801f544:	687b      	ldr	r3, [r7, #4]
 801f546:	8b5b      	ldrh	r3, [r3, #26]
 801f548:	f003 0301 	and.w	r3, r3, #1
 801f54c:	2b00      	cmp	r3, #0
 801f54e:	d00e      	beq.n	801f56e <tcp_receive+0xbc2>
 801f550:	687b      	ldr	r3, [r7, #4]
 801f552:	8b5b      	ldrh	r3, [r3, #26]
 801f554:	f023 0301 	bic.w	r3, r3, #1
 801f558:	b29a      	uxth	r2, r3
 801f55a:	687b      	ldr	r3, [r7, #4]
 801f55c:	835a      	strh	r2, [r3, #26]
 801f55e:	687b      	ldr	r3, [r7, #4]
 801f560:	8b5b      	ldrh	r3, [r3, #26]
 801f562:	f043 0302 	orr.w	r3, r3, #2
 801f566:	b29a      	uxth	r2, r3
 801f568:	687b      	ldr	r3, [r7, #4]
 801f56a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801f56c:	e187      	b.n	801f87e <tcp_receive+0xed2>
        tcp_ack(pcb);
 801f56e:	687b      	ldr	r3, [r7, #4]
 801f570:	8b5b      	ldrh	r3, [r3, #26]
 801f572:	f043 0301 	orr.w	r3, r3, #1
 801f576:	b29a      	uxth	r2, r3
 801f578:	687b      	ldr	r3, [r7, #4]
 801f57a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801f57c:	e17f      	b.n	801f87e <tcp_receive+0xed2>
      } else {
        /* We get here if the incoming segment is out-of-sequence. */

#if TCP_QUEUE_OOSEQ
        /* We queue the segment on the ->ooseq queue. */
        if (pcb->ooseq == NULL) {
 801f57e:	687b      	ldr	r3, [r7, #4]
 801f580:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f582:	2b00      	cmp	r3, #0
 801f584:	d106      	bne.n	801f594 <tcp_receive+0xbe8>
          pcb->ooseq = tcp_seg_copy(&inseg);
 801f586:	4848      	ldr	r0, [pc, #288]	@ (801f6a8 <tcp_receive+0xcfc>)
 801f588:	f7fd fae2 	bl	801cb50 <tcp_seg_copy>
 801f58c:	4602      	mov	r2, r0
 801f58e:	687b      	ldr	r3, [r7, #4]
 801f590:	675a      	str	r2, [r3, #116]	@ 0x74
 801f592:	e16c      	b.n	801f86e <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
          /* This is the left edge of the lowest possible SACK range.
             It may start before the newly received segment (possibly adjusted below). */
          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
          struct tcp_seg *next, *prev = NULL;
 801f594:	2300      	movs	r3, #0
 801f596:	637b      	str	r3, [r7, #52]	@ 0x34
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801f598:	687b      	ldr	r3, [r7, #4]
 801f59a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f59c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f59e:	e156      	b.n	801f84e <tcp_receive+0xea2>
            if (seqno == next->tcphdr->seqno) {
 801f5a0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f5a2:	691b      	ldr	r3, [r3, #16]
 801f5a4:	685a      	ldr	r2, [r3, #4]
 801f5a6:	4b41      	ldr	r3, [pc, #260]	@ (801f6ac <tcp_receive+0xd00>)
 801f5a8:	681b      	ldr	r3, [r3, #0]
 801f5aa:	429a      	cmp	r2, r3
 801f5ac:	d11d      	bne.n	801f5ea <tcp_receive+0xc3e>
              /* The sequence number of the incoming segment is the
                 same as the sequence number of the segment on
                 ->ooseq. We check the lengths to see which one to
                 discard. */
              if (inseg.len > next->len) {
 801f5ae:	4b3e      	ldr	r3, [pc, #248]	@ (801f6a8 <tcp_receive+0xcfc>)
 801f5b0:	891a      	ldrh	r2, [r3, #8]
 801f5b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f5b4:	891b      	ldrh	r3, [r3, #8]
 801f5b6:	429a      	cmp	r2, r3
 801f5b8:	f240 814e 	bls.w	801f858 <tcp_receive+0xeac>
                /* The incoming segment is larger than the old
                   segment. We replace some segments with the new
                   one. */
                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f5bc:	483a      	ldr	r0, [pc, #232]	@ (801f6a8 <tcp_receive+0xcfc>)
 801f5be:	f7fd fac7 	bl	801cb50 <tcp_seg_copy>
 801f5c2:	6178      	str	r0, [r7, #20]
                if (cseg != NULL) {
 801f5c4:	697b      	ldr	r3, [r7, #20]
 801f5c6:	2b00      	cmp	r3, #0
 801f5c8:	f000 8148 	beq.w	801f85c <tcp_receive+0xeb0>
                  if (prev != NULL) {
 801f5cc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f5ce:	2b00      	cmp	r3, #0
 801f5d0:	d003      	beq.n	801f5da <tcp_receive+0xc2e>
                    prev->next = cseg;
 801f5d2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f5d4:	697a      	ldr	r2, [r7, #20]
 801f5d6:	601a      	str	r2, [r3, #0]
 801f5d8:	e002      	b.n	801f5e0 <tcp_receive+0xc34>
                  } else {
                    pcb->ooseq = cseg;
 801f5da:	687b      	ldr	r3, [r7, #4]
 801f5dc:	697a      	ldr	r2, [r7, #20]
 801f5de:	675a      	str	r2, [r3, #116]	@ 0x74
                  }
                  tcp_oos_insert_segment(cseg, next);
 801f5e0:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f5e2:	6978      	ldr	r0, [r7, #20]
 801f5e4:	f7ff f8de 	bl	801e7a4 <tcp_oos_insert_segment>
                }
                break;
 801f5e8:	e138      	b.n	801f85c <tcp_receive+0xeb0>
                   segment was smaller than the old one; in either
                   case, we ditch the incoming segment. */
                break;
              }
            } else {
              if (prev == NULL) {
 801f5ea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f5ec:	2b00      	cmp	r3, #0
 801f5ee:	d117      	bne.n	801f620 <tcp_receive+0xc74>
                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
 801f5f0:	4b2e      	ldr	r3, [pc, #184]	@ (801f6ac <tcp_receive+0xd00>)
 801f5f2:	681a      	ldr	r2, [r3, #0]
 801f5f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f5f6:	691b      	ldr	r3, [r3, #16]
 801f5f8:	685b      	ldr	r3, [r3, #4]
 801f5fa:	1ad3      	subs	r3, r2, r3
 801f5fc:	2b00      	cmp	r3, #0
 801f5fe:	da57      	bge.n	801f6b0 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is lower
                     than the sequence number of the first segment on the
                     queue. We put the incoming segment first on the
                     queue. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f600:	4829      	ldr	r0, [pc, #164]	@ (801f6a8 <tcp_receive+0xcfc>)
 801f602:	f7fd faa5 	bl	801cb50 <tcp_seg_copy>
 801f606:	61b8      	str	r0, [r7, #24]
                  if (cseg != NULL) {
 801f608:	69bb      	ldr	r3, [r7, #24]
 801f60a:	2b00      	cmp	r3, #0
 801f60c:	f000 8128 	beq.w	801f860 <tcp_receive+0xeb4>
                    pcb->ooseq = cseg;
 801f610:	687b      	ldr	r3, [r7, #4]
 801f612:	69ba      	ldr	r2, [r7, #24]
 801f614:	675a      	str	r2, [r3, #116]	@ 0x74
                    tcp_oos_insert_segment(cseg, next);
 801f616:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f618:	69b8      	ldr	r0, [r7, #24]
 801f61a:	f7ff f8c3 	bl	801e7a4 <tcp_oos_insert_segment>
                  }
                  break;
 801f61e:	e11f      	b.n	801f860 <tcp_receive+0xeb4>
                }
              } else {
                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
 801f620:	4b22      	ldr	r3, [pc, #136]	@ (801f6ac <tcp_receive+0xd00>)
 801f622:	681a      	ldr	r2, [r3, #0]
 801f624:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f626:	691b      	ldr	r3, [r3, #16]
 801f628:	685b      	ldr	r3, [r3, #4]
 801f62a:	1ad3      	subs	r3, r2, r3
 801f62c:	3b01      	subs	r3, #1
 801f62e:	2b00      	cmp	r3, #0
 801f630:	db3e      	blt.n	801f6b0 <tcp_receive+0xd04>
 801f632:	4b1e      	ldr	r3, [pc, #120]	@ (801f6ac <tcp_receive+0xd00>)
 801f634:	681a      	ldr	r2, [r3, #0]
 801f636:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f638:	691b      	ldr	r3, [r3, #16]
 801f63a:	685b      	ldr	r3, [r3, #4]
 801f63c:	1ad3      	subs	r3, r2, r3
 801f63e:	3301      	adds	r3, #1
 801f640:	2b00      	cmp	r3, #0
 801f642:	dc35      	bgt.n	801f6b0 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is in
                     between the sequence numbers of the previous and
                     the next segment on ->ooseq. We trim trim the previous
                     segment, delete next segments that included in received segment
                     and trim received, if needed. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f644:	4818      	ldr	r0, [pc, #96]	@ (801f6a8 <tcp_receive+0xcfc>)
 801f646:	f7fd fa83 	bl	801cb50 <tcp_seg_copy>
 801f64a:	61f8      	str	r0, [r7, #28]
                  if (cseg != NULL) {
 801f64c:	69fb      	ldr	r3, [r7, #28]
 801f64e:	2b00      	cmp	r3, #0
 801f650:	f000 8108 	beq.w	801f864 <tcp_receive+0xeb8>
                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
 801f654:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f656:	691b      	ldr	r3, [r3, #16]
 801f658:	685b      	ldr	r3, [r3, #4]
 801f65a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801f65c:	8912      	ldrh	r2, [r2, #8]
 801f65e:	441a      	add	r2, r3
 801f660:	4b12      	ldr	r3, [pc, #72]	@ (801f6ac <tcp_receive+0xd00>)
 801f662:	681b      	ldr	r3, [r3, #0]
 801f664:	1ad3      	subs	r3, r2, r3
 801f666:	2b00      	cmp	r3, #0
 801f668:	dd12      	ble.n	801f690 <tcp_receive+0xce4>
                      /* We need to trim the prev segment. */
                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
 801f66a:	4b10      	ldr	r3, [pc, #64]	@ (801f6ac <tcp_receive+0xd00>)
 801f66c:	681b      	ldr	r3, [r3, #0]
 801f66e:	b29a      	uxth	r2, r3
 801f670:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f672:	691b      	ldr	r3, [r3, #16]
 801f674:	685b      	ldr	r3, [r3, #4]
 801f676:	b29b      	uxth	r3, r3
 801f678:	1ad3      	subs	r3, r2, r3
 801f67a:	b29a      	uxth	r2, r3
 801f67c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f67e:	811a      	strh	r2, [r3, #8]
                      pbuf_realloc(prev->p, prev->len);
 801f680:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f682:	685a      	ldr	r2, [r3, #4]
 801f684:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f686:	891b      	ldrh	r3, [r3, #8]
 801f688:	4619      	mov	r1, r3
 801f68a:	4610      	mov	r0, r2
 801f68c:	f7fb fc38 	bl	801af00 <pbuf_realloc>
                    }
                    prev->next = cseg;
 801f690:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f692:	69fa      	ldr	r2, [r7, #28]
 801f694:	601a      	str	r2, [r3, #0]
                    tcp_oos_insert_segment(cseg, next);
 801f696:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f698:	69f8      	ldr	r0, [r7, #28]
 801f69a:	f7ff f883 	bl	801e7a4 <tcp_oos_insert_segment>
                  }
                  break;
 801f69e:	e0e1      	b.n	801f864 <tcp_receive+0xeb8>
 801f6a0:	2402afb4 	.word	0x2402afb4
 801f6a4:	2402afb1 	.word	0x2402afb1
 801f6a8:	2402af80 	.word	0x2402af80
 801f6ac:	2402afa4 	.word	0x2402afa4
#endif /* LWIP_TCP_SACK_OUT */

              /* We don't use 'prev' below, so let's set it to current 'next'.
                 This way even if we break the loop below, 'prev' will be pointing
                 at the segment right in front of the newly added one. */
              prev = next;
 801f6b0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6b2:	637b      	str	r3, [r7, #52]	@ 0x34

              /* If the "next" segment is the last segment on the
                 ooseq queue, we add the incoming segment to the end
                 of the list. */
              if (next->next == NULL &&
 801f6b4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6b6:	681b      	ldr	r3, [r3, #0]
 801f6b8:	2b00      	cmp	r3, #0
 801f6ba:	f040 80c5 	bne.w	801f848 <tcp_receive+0xe9c>
                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
 801f6be:	4b7f      	ldr	r3, [pc, #508]	@ (801f8bc <tcp_receive+0xf10>)
 801f6c0:	681a      	ldr	r2, [r3, #0]
 801f6c2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6c4:	691b      	ldr	r3, [r3, #16]
 801f6c6:	685b      	ldr	r3, [r3, #4]
 801f6c8:	1ad3      	subs	r3, r2, r3
              if (next->next == NULL &&
 801f6ca:	2b00      	cmp	r3, #0
 801f6cc:	f340 80bc 	ble.w	801f848 <tcp_receive+0xe9c>
                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801f6d0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6d2:	691b      	ldr	r3, [r3, #16]
 801f6d4:	899b      	ldrh	r3, [r3, #12]
 801f6d6:	b29b      	uxth	r3, r3
 801f6d8:	4618      	mov	r0, r3
 801f6da:	f7fa f8e5 	bl	80198a8 <lwip_htons>
 801f6de:	4603      	mov	r3, r0
 801f6e0:	b2db      	uxtb	r3, r3
 801f6e2:	f003 0301 	and.w	r3, r3, #1
 801f6e6:	2b00      	cmp	r3, #0
 801f6e8:	f040 80be 	bne.w	801f868 <tcp_receive+0xebc>
                  /* segment "next" already contains all data */
                  break;
                }
                next->next = tcp_seg_copy(&inseg);
 801f6ec:	4874      	ldr	r0, [pc, #464]	@ (801f8c0 <tcp_receive+0xf14>)
 801f6ee:	f7fd fa2f 	bl	801cb50 <tcp_seg_copy>
 801f6f2:	4602      	mov	r2, r0
 801f6f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6f6:	601a      	str	r2, [r3, #0]
                if (next->next != NULL) {
 801f6f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f6fa:	681b      	ldr	r3, [r3, #0]
 801f6fc:	2b00      	cmp	r3, #0
 801f6fe:	f000 80b5 	beq.w	801f86c <tcp_receive+0xec0>
                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
 801f702:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f704:	691b      	ldr	r3, [r3, #16]
 801f706:	685b      	ldr	r3, [r3, #4]
 801f708:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801f70a:	8912      	ldrh	r2, [r2, #8]
 801f70c:	441a      	add	r2, r3
 801f70e:	4b6b      	ldr	r3, [pc, #428]	@ (801f8bc <tcp_receive+0xf10>)
 801f710:	681b      	ldr	r3, [r3, #0]
 801f712:	1ad3      	subs	r3, r2, r3
 801f714:	2b00      	cmp	r3, #0
 801f716:	dd12      	ble.n	801f73e <tcp_receive+0xd92>
                    /* We need to trim the last segment. */
                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
 801f718:	4b68      	ldr	r3, [pc, #416]	@ (801f8bc <tcp_receive+0xf10>)
 801f71a:	681b      	ldr	r3, [r3, #0]
 801f71c:	b29a      	uxth	r2, r3
 801f71e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f720:	691b      	ldr	r3, [r3, #16]
 801f722:	685b      	ldr	r3, [r3, #4]
 801f724:	b29b      	uxth	r3, r3
 801f726:	1ad3      	subs	r3, r2, r3
 801f728:	b29a      	uxth	r2, r3
 801f72a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f72c:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->p, next->len);
 801f72e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f730:	685a      	ldr	r2, [r3, #4]
 801f732:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f734:	891b      	ldrh	r3, [r3, #8]
 801f736:	4619      	mov	r1, r3
 801f738:	4610      	mov	r0, r2
 801f73a:	f7fb fbe1 	bl	801af00 <pbuf_realloc>
                  }
                  /* check if the remote side overruns our receive window */
                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
 801f73e:	4b61      	ldr	r3, [pc, #388]	@ (801f8c4 <tcp_receive+0xf18>)
 801f740:	881b      	ldrh	r3, [r3, #0]
 801f742:	461a      	mov	r2, r3
 801f744:	4b5d      	ldr	r3, [pc, #372]	@ (801f8bc <tcp_receive+0xf10>)
 801f746:	681b      	ldr	r3, [r3, #0]
 801f748:	441a      	add	r2, r3
 801f74a:	687b      	ldr	r3, [r7, #4]
 801f74c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f74e:	6879      	ldr	r1, [r7, #4]
 801f750:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f752:	440b      	add	r3, r1
 801f754:	1ad3      	subs	r3, r2, r3
 801f756:	2b00      	cmp	r3, #0
 801f758:	f340 8088 	ble.w	801f86c <tcp_receive+0xec0>
                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
                                ("tcp_receive: other end overran receive window"
                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
 801f75c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f75e:	681b      	ldr	r3, [r3, #0]
 801f760:	691b      	ldr	r3, [r3, #16]
 801f762:	899b      	ldrh	r3, [r3, #12]
 801f764:	b29b      	uxth	r3, r3
 801f766:	4618      	mov	r0, r3
 801f768:	f7fa f89e 	bl	80198a8 <lwip_htons>
 801f76c:	4603      	mov	r3, r0
 801f76e:	b2db      	uxtb	r3, r3
 801f770:	f003 0301 	and.w	r3, r3, #1
 801f774:	2b00      	cmp	r3, #0
 801f776:	d021      	beq.n	801f7bc <tcp_receive+0xe10>
                      /* Must remove the FIN from the header as we're trimming
                       * that byte of sequence-space from the packet */
                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
 801f778:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f77a:	681b      	ldr	r3, [r3, #0]
 801f77c:	691b      	ldr	r3, [r3, #16]
 801f77e:	899b      	ldrh	r3, [r3, #12]
 801f780:	b29b      	uxth	r3, r3
 801f782:	b21b      	sxth	r3, r3
 801f784:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801f788:	b21c      	sxth	r4, r3
 801f78a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f78c:	681b      	ldr	r3, [r3, #0]
 801f78e:	691b      	ldr	r3, [r3, #16]
 801f790:	899b      	ldrh	r3, [r3, #12]
 801f792:	b29b      	uxth	r3, r3
 801f794:	4618      	mov	r0, r3
 801f796:	f7fa f887 	bl	80198a8 <lwip_htons>
 801f79a:	4603      	mov	r3, r0
 801f79c:	b2db      	uxtb	r3, r3
 801f79e:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801f7a2:	b29b      	uxth	r3, r3
 801f7a4:	4618      	mov	r0, r3
 801f7a6:	f7fa f87f 	bl	80198a8 <lwip_htons>
 801f7aa:	4603      	mov	r3, r0
 801f7ac:	b21b      	sxth	r3, r3
 801f7ae:	4323      	orrs	r3, r4
 801f7b0:	b21a      	sxth	r2, r3
 801f7b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7b4:	681b      	ldr	r3, [r3, #0]
 801f7b6:	691b      	ldr	r3, [r3, #16]
 801f7b8:	b292      	uxth	r2, r2
 801f7ba:	819a      	strh	r2, [r3, #12]
                    }
                    /* Adjust length of segment to fit in the window. */
                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
 801f7bc:	687b      	ldr	r3, [r7, #4]
 801f7be:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f7c0:	b29a      	uxth	r2, r3
 801f7c2:	687b      	ldr	r3, [r7, #4]
 801f7c4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801f7c6:	4413      	add	r3, r2
 801f7c8:	b299      	uxth	r1, r3
 801f7ca:	4b3c      	ldr	r3, [pc, #240]	@ (801f8bc <tcp_receive+0xf10>)
 801f7cc:	681b      	ldr	r3, [r3, #0]
 801f7ce:	b29a      	uxth	r2, r3
 801f7d0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7d2:	681b      	ldr	r3, [r3, #0]
 801f7d4:	1a8a      	subs	r2, r1, r2
 801f7d6:	b292      	uxth	r2, r2
 801f7d8:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->next->p, next->next->len);
 801f7da:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7dc:	681b      	ldr	r3, [r3, #0]
 801f7de:	685a      	ldr	r2, [r3, #4]
 801f7e0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7e2:	681b      	ldr	r3, [r3, #0]
 801f7e4:	891b      	ldrh	r3, [r3, #8]
 801f7e6:	4619      	mov	r1, r3
 801f7e8:	4610      	mov	r0, r2
 801f7ea:	f7fb fb89 	bl	801af00 <pbuf_realloc>
                    tcplen = TCP_TCPLEN(next->next);
 801f7ee:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7f0:	681b      	ldr	r3, [r3, #0]
 801f7f2:	891c      	ldrh	r4, [r3, #8]
 801f7f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f7f6:	681b      	ldr	r3, [r3, #0]
 801f7f8:	691b      	ldr	r3, [r3, #16]
 801f7fa:	899b      	ldrh	r3, [r3, #12]
 801f7fc:	b29b      	uxth	r3, r3
 801f7fe:	4618      	mov	r0, r3
 801f800:	f7fa f852 	bl	80198a8 <lwip_htons>
 801f804:	4603      	mov	r3, r0
 801f806:	b2db      	uxtb	r3, r3
 801f808:	f003 0303 	and.w	r3, r3, #3
 801f80c:	2b00      	cmp	r3, #0
 801f80e:	d001      	beq.n	801f814 <tcp_receive+0xe68>
 801f810:	2301      	movs	r3, #1
 801f812:	e000      	b.n	801f816 <tcp_receive+0xe6a>
 801f814:	2300      	movs	r3, #0
 801f816:	4423      	add	r3, r4
 801f818:	b29a      	uxth	r2, r3
 801f81a:	4b2a      	ldr	r3, [pc, #168]	@ (801f8c4 <tcp_receive+0xf18>)
 801f81c:	801a      	strh	r2, [r3, #0]
                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801f81e:	4b29      	ldr	r3, [pc, #164]	@ (801f8c4 <tcp_receive+0xf18>)
 801f820:	881b      	ldrh	r3, [r3, #0]
 801f822:	461a      	mov	r2, r3
 801f824:	4b25      	ldr	r3, [pc, #148]	@ (801f8bc <tcp_receive+0xf10>)
 801f826:	681b      	ldr	r3, [r3, #0]
 801f828:	441a      	add	r2, r3
 801f82a:	687b      	ldr	r3, [r7, #4]
 801f82c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f82e:	6879      	ldr	r1, [r7, #4]
 801f830:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f832:	440b      	add	r3, r1
 801f834:	429a      	cmp	r2, r3
 801f836:	d019      	beq.n	801f86c <tcp_receive+0xec0>
 801f838:	4b23      	ldr	r3, [pc, #140]	@ (801f8c8 <tcp_receive+0xf1c>)
 801f83a:	f44f 62df 	mov.w	r2, #1784	@ 0x6f8
 801f83e:	4923      	ldr	r1, [pc, #140]	@ (801f8cc <tcp_receive+0xf20>)
 801f840:	4823      	ldr	r0, [pc, #140]	@ (801f8d0 <tcp_receive+0xf24>)
 801f842:	f00a ff8b 	bl	802a75c <iprintf>
                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
                  }
                }
                break;
 801f846:	e011      	b.n	801f86c <tcp_receive+0xec0>
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801f848:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f84a:	681b      	ldr	r3, [r3, #0]
 801f84c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f84e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f850:	2b00      	cmp	r3, #0
 801f852:	f47f aea5 	bne.w	801f5a0 <tcp_receive+0xbf4>
 801f856:	e00a      	b.n	801f86e <tcp_receive+0xec2>
                break;
 801f858:	bf00      	nop
 801f85a:	e008      	b.n	801f86e <tcp_receive+0xec2>
                break;
 801f85c:	bf00      	nop
 801f85e:	e006      	b.n	801f86e <tcp_receive+0xec2>
                  break;
 801f860:	bf00      	nop
 801f862:	e004      	b.n	801f86e <tcp_receive+0xec2>
                  break;
 801f864:	bf00      	nop
 801f866:	e002      	b.n	801f86e <tcp_receive+0xec2>
                  break;
 801f868:	bf00      	nop
 801f86a:	e000      	b.n	801f86e <tcp_receive+0xec2>
                break;
 801f86c:	bf00      	nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */

        /* We send the ACK packet after we've (potentially) dealt with SACKs,
           so they can be included in the acknowledgment. */
        tcp_send_empty_ack(pcb);
 801f86e:	6878      	ldr	r0, [r7, #4]
 801f870:	f001 fefc 	bl	802166c <tcp_send_empty_ack>
      if (pcb->rcv_nxt == seqno) {
 801f874:	e003      	b.n	801f87e <tcp_receive+0xed2>
      }
    } else {
      /* The incoming segment is not within the window. */
      tcp_send_empty_ack(pcb);
 801f876:	6878      	ldr	r0, [r7, #4]
 801f878:	f001 fef8 	bl	802166c <tcp_send_empty_ack>
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801f87c:	e01a      	b.n	801f8b4 <tcp_receive+0xf08>
 801f87e:	e019      	b.n	801f8b4 <tcp_receive+0xf08>
    }
  } else {
    /* Segments with length 0 is taken care of here. Segments that
       fall out of the window are ACKed. */
    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
 801f880:	4b0e      	ldr	r3, [pc, #56]	@ (801f8bc <tcp_receive+0xf10>)
 801f882:	681a      	ldr	r2, [r3, #0]
 801f884:	687b      	ldr	r3, [r7, #4]
 801f886:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f888:	1ad3      	subs	r3, r2, r3
 801f88a:	2b00      	cmp	r3, #0
 801f88c:	db0a      	blt.n	801f8a4 <tcp_receive+0xef8>
 801f88e:	4b0b      	ldr	r3, [pc, #44]	@ (801f8bc <tcp_receive+0xf10>)
 801f890:	681a      	ldr	r2, [r3, #0]
 801f892:	687b      	ldr	r3, [r7, #4]
 801f894:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f896:	6879      	ldr	r1, [r7, #4]
 801f898:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f89a:	440b      	add	r3, r1
 801f89c:	1ad3      	subs	r3, r2, r3
 801f89e:	3301      	adds	r3, #1
 801f8a0:	2b00      	cmp	r3, #0
 801f8a2:	dd07      	ble.n	801f8b4 <tcp_receive+0xf08>
      tcp_ack_now(pcb);
 801f8a4:	687b      	ldr	r3, [r7, #4]
 801f8a6:	8b5b      	ldrh	r3, [r3, #26]
 801f8a8:	f043 0302 	orr.w	r3, r3, #2
 801f8ac:	b29a      	uxth	r2, r3
 801f8ae:	687b      	ldr	r3, [r7, #4]
 801f8b0:	835a      	strh	r2, [r3, #26]
    }
  }
}
 801f8b2:	e7ff      	b.n	801f8b4 <tcp_receive+0xf08>
 801f8b4:	bf00      	nop
 801f8b6:	3750      	adds	r7, #80	@ 0x50
 801f8b8:	46bd      	mov	sp, r7
 801f8ba:	bdb0      	pop	{r4, r5, r7, pc}
 801f8bc:	2402afa4 	.word	0x2402afa4
 801f8c0:	2402af80 	.word	0x2402af80
 801f8c4:	2402afae 	.word	0x2402afae
 801f8c8:	0802fbf4 	.word	0x0802fbf4
 801f8cc:	0802ff9c 	.word	0x0802ff9c
 801f8d0:	0802fc40 	.word	0x0802fc40

0801f8d4 <tcp_get_next_optbyte>:

static u8_t
tcp_get_next_optbyte(void)
{
 801f8d4:	b480      	push	{r7}
 801f8d6:	b083      	sub	sp, #12
 801f8d8:	af00      	add	r7, sp, #0
  u16_t optidx = tcp_optidx++;
 801f8da:	4b15      	ldr	r3, [pc, #84]	@ (801f930 <tcp_get_next_optbyte+0x5c>)
 801f8dc:	881b      	ldrh	r3, [r3, #0]
 801f8de:	1c5a      	adds	r2, r3, #1
 801f8e0:	b291      	uxth	r1, r2
 801f8e2:	4a13      	ldr	r2, [pc, #76]	@ (801f930 <tcp_get_next_optbyte+0x5c>)
 801f8e4:	8011      	strh	r1, [r2, #0]
 801f8e6:	80fb      	strh	r3, [r7, #6]
  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
 801f8e8:	4b12      	ldr	r3, [pc, #72]	@ (801f934 <tcp_get_next_optbyte+0x60>)
 801f8ea:	681b      	ldr	r3, [r3, #0]
 801f8ec:	2b00      	cmp	r3, #0
 801f8ee:	d004      	beq.n	801f8fa <tcp_get_next_optbyte+0x26>
 801f8f0:	4b11      	ldr	r3, [pc, #68]	@ (801f938 <tcp_get_next_optbyte+0x64>)
 801f8f2:	881b      	ldrh	r3, [r3, #0]
 801f8f4:	88fa      	ldrh	r2, [r7, #6]
 801f8f6:	429a      	cmp	r2, r3
 801f8f8:	d208      	bcs.n	801f90c <tcp_get_next_optbyte+0x38>
    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
 801f8fa:	4b10      	ldr	r3, [pc, #64]	@ (801f93c <tcp_get_next_optbyte+0x68>)
 801f8fc:	681b      	ldr	r3, [r3, #0]
 801f8fe:	3314      	adds	r3, #20
 801f900:	603b      	str	r3, [r7, #0]
    return opts[optidx];
 801f902:	88fb      	ldrh	r3, [r7, #6]
 801f904:	683a      	ldr	r2, [r7, #0]
 801f906:	4413      	add	r3, r2
 801f908:	781b      	ldrb	r3, [r3, #0]
 801f90a:	e00b      	b.n	801f924 <tcp_get_next_optbyte+0x50>
  } else {
    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
 801f90c:	88fb      	ldrh	r3, [r7, #6]
 801f90e:	b2da      	uxtb	r2, r3
 801f910:	4b09      	ldr	r3, [pc, #36]	@ (801f938 <tcp_get_next_optbyte+0x64>)
 801f912:	881b      	ldrh	r3, [r3, #0]
 801f914:	b2db      	uxtb	r3, r3
 801f916:	1ad3      	subs	r3, r2, r3
 801f918:	717b      	strb	r3, [r7, #5]
    return tcphdr_opt2[idx];
 801f91a:	4b06      	ldr	r3, [pc, #24]	@ (801f934 <tcp_get_next_optbyte+0x60>)
 801f91c:	681a      	ldr	r2, [r3, #0]
 801f91e:	797b      	ldrb	r3, [r7, #5]
 801f920:	4413      	add	r3, r2
 801f922:	781b      	ldrb	r3, [r3, #0]
  }
}
 801f924:	4618      	mov	r0, r3
 801f926:	370c      	adds	r7, #12
 801f928:	46bd      	mov	sp, r7
 801f92a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801f92e:	4770      	bx	lr
 801f930:	2402afa0 	.word	0x2402afa0
 801f934:	2402af9c 	.word	0x2402af9c
 801f938:	2402af9a 	.word	0x2402af9a
 801f93c:	2402af94 	.word	0x2402af94

0801f940 <tcp_parseopt>:
 *
 * @param pcb the tcp_pcb for which a segment arrived
 */
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
 801f940:	b580      	push	{r7, lr}
 801f942:	b084      	sub	sp, #16
 801f944:	af00      	add	r7, sp, #0
 801f946:	6078      	str	r0, [r7, #4]
  u16_t mss;
#if LWIP_TCP_TIMESTAMPS
  u32_t tsval;
#endif

  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
 801f948:	687b      	ldr	r3, [r7, #4]
 801f94a:	2b00      	cmp	r3, #0
 801f94c:	d106      	bne.n	801f95c <tcp_parseopt+0x1c>
 801f94e:	4b33      	ldr	r3, [pc, #204]	@ (801fa1c <tcp_parseopt+0xdc>)
 801f950:	f240 727d 	movw	r2, #1917	@ 0x77d
 801f954:	4932      	ldr	r1, [pc, #200]	@ (801fa20 <tcp_parseopt+0xe0>)
 801f956:	4833      	ldr	r0, [pc, #204]	@ (801fa24 <tcp_parseopt+0xe4>)
 801f958:	f00a ff00 	bl	802a75c <iprintf>

  /* Parse the TCP MSS option, if present. */
  if (tcphdr_optlen != 0) {
 801f95c:	4b32      	ldr	r3, [pc, #200]	@ (801fa28 <tcp_parseopt+0xe8>)
 801f95e:	881b      	ldrh	r3, [r3, #0]
 801f960:	2b00      	cmp	r3, #0
 801f962:	d057      	beq.n	801fa14 <tcp_parseopt+0xd4>
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801f964:	4b31      	ldr	r3, [pc, #196]	@ (801fa2c <tcp_parseopt+0xec>)
 801f966:	2200      	movs	r2, #0
 801f968:	801a      	strh	r2, [r3, #0]
 801f96a:	e047      	b.n	801f9fc <tcp_parseopt+0xbc>
      u8_t opt = tcp_get_next_optbyte();
 801f96c:	f7ff ffb2 	bl	801f8d4 <tcp_get_next_optbyte>
 801f970:	4603      	mov	r3, r0
 801f972:	73fb      	strb	r3, [r7, #15]
      switch (opt) {
 801f974:	7bfb      	ldrb	r3, [r7, #15]
 801f976:	2b02      	cmp	r3, #2
 801f978:	d006      	beq.n	801f988 <tcp_parseopt+0x48>
 801f97a:	2b02      	cmp	r3, #2
 801f97c:	dc2b      	bgt.n	801f9d6 <tcp_parseopt+0x96>
 801f97e:	2b00      	cmp	r3, #0
 801f980:	d043      	beq.n	801fa0a <tcp_parseopt+0xca>
 801f982:	2b01      	cmp	r3, #1
 801f984:	d039      	beq.n	801f9fa <tcp_parseopt+0xba>
 801f986:	e026      	b.n	801f9d6 <tcp_parseopt+0x96>
          /* NOP option. */
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
          break;
        case LWIP_TCP_OPT_MSS:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
 801f988:	f7ff ffa4 	bl	801f8d4 <tcp_get_next_optbyte>
 801f98c:	4603      	mov	r3, r0
 801f98e:	2b04      	cmp	r3, #4
 801f990:	d13d      	bne.n	801fa0e <tcp_parseopt+0xce>
 801f992:	4b26      	ldr	r3, [pc, #152]	@ (801fa2c <tcp_parseopt+0xec>)
 801f994:	881b      	ldrh	r3, [r3, #0]
 801f996:	3301      	adds	r3, #1
 801f998:	4a23      	ldr	r2, [pc, #140]	@ (801fa28 <tcp_parseopt+0xe8>)
 801f99a:	8812      	ldrh	r2, [r2, #0]
 801f99c:	4293      	cmp	r3, r2
 801f99e:	da36      	bge.n	801fa0e <tcp_parseopt+0xce>
            /* Bad length */
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
            return;
          }
          /* An MSS option with the right option length. */
          mss = (u16_t)(tcp_get_next_optbyte() << 8);
 801f9a0:	f7ff ff98 	bl	801f8d4 <tcp_get_next_optbyte>
 801f9a4:	4603      	mov	r3, r0
 801f9a6:	021b      	lsls	r3, r3, #8
 801f9a8:	81bb      	strh	r3, [r7, #12]
          mss |= tcp_get_next_optbyte();
 801f9aa:	f7ff ff93 	bl	801f8d4 <tcp_get_next_optbyte>
 801f9ae:	4603      	mov	r3, r0
 801f9b0:	461a      	mov	r2, r3
 801f9b2:	89bb      	ldrh	r3, [r7, #12]
 801f9b4:	4313      	orrs	r3, r2
 801f9b6:	81bb      	strh	r3, [r7, #12]
          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
 801f9b8:	89bb      	ldrh	r3, [r7, #12]
 801f9ba:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801f9be:	4293      	cmp	r3, r2
 801f9c0:	d804      	bhi.n	801f9cc <tcp_parseopt+0x8c>
 801f9c2:	89bb      	ldrh	r3, [r7, #12]
 801f9c4:	2b00      	cmp	r3, #0
 801f9c6:	d001      	beq.n	801f9cc <tcp_parseopt+0x8c>
 801f9c8:	89ba      	ldrh	r2, [r7, #12]
 801f9ca:	e001      	b.n	801f9d0 <tcp_parseopt+0x90>
 801f9cc:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801f9d0:	687b      	ldr	r3, [r7, #4]
 801f9d2:	865a      	strh	r2, [r3, #50]	@ 0x32
          break;
 801f9d4:	e012      	b.n	801f9fc <tcp_parseopt+0xbc>
          }
          break;
#endif /* LWIP_TCP_SACK_OUT */
        default:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
          data = tcp_get_next_optbyte();
 801f9d6:	f7ff ff7d 	bl	801f8d4 <tcp_get_next_optbyte>
 801f9da:	4603      	mov	r3, r0
 801f9dc:	72fb      	strb	r3, [r7, #11]
          if (data < 2) {
 801f9de:	7afb      	ldrb	r3, [r7, #11]
 801f9e0:	2b01      	cmp	r3, #1
 801f9e2:	d916      	bls.n	801fa12 <tcp_parseopt+0xd2>
               and we don't process them further. */
            return;
          }
          /* All other options have a length field, so that we easily
             can skip past them. */
          tcp_optidx += data - 2;
 801f9e4:	7afb      	ldrb	r3, [r7, #11]
 801f9e6:	b29a      	uxth	r2, r3
 801f9e8:	4b10      	ldr	r3, [pc, #64]	@ (801fa2c <tcp_parseopt+0xec>)
 801f9ea:	881b      	ldrh	r3, [r3, #0]
 801f9ec:	4413      	add	r3, r2
 801f9ee:	b29b      	uxth	r3, r3
 801f9f0:	3b02      	subs	r3, #2
 801f9f2:	b29a      	uxth	r2, r3
 801f9f4:	4b0d      	ldr	r3, [pc, #52]	@ (801fa2c <tcp_parseopt+0xec>)
 801f9f6:	801a      	strh	r2, [r3, #0]
 801f9f8:	e000      	b.n	801f9fc <tcp_parseopt+0xbc>
          break;
 801f9fa:	bf00      	nop
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801f9fc:	4b0b      	ldr	r3, [pc, #44]	@ (801fa2c <tcp_parseopt+0xec>)
 801f9fe:	881a      	ldrh	r2, [r3, #0]
 801fa00:	4b09      	ldr	r3, [pc, #36]	@ (801fa28 <tcp_parseopt+0xe8>)
 801fa02:	881b      	ldrh	r3, [r3, #0]
 801fa04:	429a      	cmp	r2, r3
 801fa06:	d3b1      	bcc.n	801f96c <tcp_parseopt+0x2c>
 801fa08:	e004      	b.n	801fa14 <tcp_parseopt+0xd4>
          return;
 801fa0a:	bf00      	nop
 801fa0c:	e002      	b.n	801fa14 <tcp_parseopt+0xd4>
            return;
 801fa0e:	bf00      	nop
 801fa10:	e000      	b.n	801fa14 <tcp_parseopt+0xd4>
            return;
 801fa12:	bf00      	nop
      }
    }
  }
}
 801fa14:	3710      	adds	r7, #16
 801fa16:	46bd      	mov	sp, r7
 801fa18:	bd80      	pop	{r7, pc}
 801fa1a:	bf00      	nop
 801fa1c:	0802fbf4 	.word	0x0802fbf4
 801fa20:	08030058 	.word	0x08030058
 801fa24:	0802fc40 	.word	0x0802fc40
 801fa28:	2402af98 	.word	0x2402af98
 801fa2c:	2402afa0 	.word	0x2402afa0

0801fa30 <tcp_trigger_input_pcb_close>:

void
tcp_trigger_input_pcb_close(void)
{
 801fa30:	b480      	push	{r7}
 801fa32:	af00      	add	r7, sp, #0
  recv_flags |= TF_CLOSED;
 801fa34:	4b05      	ldr	r3, [pc, #20]	@ (801fa4c <tcp_trigger_input_pcb_close+0x1c>)
 801fa36:	781b      	ldrb	r3, [r3, #0]
 801fa38:	f043 0310 	orr.w	r3, r3, #16
 801fa3c:	b2da      	uxtb	r2, r3
 801fa3e:	4b03      	ldr	r3, [pc, #12]	@ (801fa4c <tcp_trigger_input_pcb_close+0x1c>)
 801fa40:	701a      	strb	r2, [r3, #0]
}
 801fa42:	bf00      	nop
 801fa44:	46bd      	mov	sp, r7
 801fa46:	f85d 7b04 	ldr.w	r7, [sp], #4
 801fa4a:	4770      	bx	lr
 801fa4c:	2402afb1 	.word	0x2402afb1

0801fa50 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);

/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
 801fa50:	b580      	push	{r7, lr}
 801fa52:	b084      	sub	sp, #16
 801fa54:	af00      	add	r7, sp, #0
 801fa56:	60f8      	str	r0, [r7, #12]
 801fa58:	60b9      	str	r1, [r7, #8]
 801fa5a:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */

  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
 801fa5c:	68fb      	ldr	r3, [r7, #12]
 801fa5e:	2b00      	cmp	r3, #0
 801fa60:	d00a      	beq.n	801fa78 <tcp_route+0x28>
 801fa62:	68fb      	ldr	r3, [r7, #12]
 801fa64:	7a1b      	ldrb	r3, [r3, #8]
 801fa66:	2b00      	cmp	r3, #0
 801fa68:	d006      	beq.n	801fa78 <tcp_route+0x28>
    return netif_get_by_index(pcb->netif_idx);
 801fa6a:	68fb      	ldr	r3, [r7, #12]
 801fa6c:	7a1b      	ldrb	r3, [r3, #8]
 801fa6e:	4618      	mov	r0, r3
 801fa70:	f7fb f83c 	bl	801aaec <netif_get_by_index>
 801fa74:	4603      	mov	r3, r0
 801fa76:	e003      	b.n	801fa80 <tcp_route+0x30>
  } else {
    return ip_route(src, dst);
 801fa78:	6878      	ldr	r0, [r7, #4]
 801fa7a:	f005 fe61 	bl	8025740 <ip4_route>
 801fa7e:	4603      	mov	r3, r0
  }
}
 801fa80:	4618      	mov	r0, r3
 801fa82:	3710      	adds	r7, #16
 801fa84:	46bd      	mov	sp, r7
 801fa86:	bd80      	pop	{r7, pc}

0801fa88 <tcp_create_segment>:
 * The TCP header is filled in except ackno and wnd.
 * p is freed on failure.
 */
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
 801fa88:	b590      	push	{r4, r7, lr}
 801fa8a:	b087      	sub	sp, #28
 801fa8c:	af00      	add	r7, sp, #0
 801fa8e:	60f8      	str	r0, [r7, #12]
 801fa90:	60b9      	str	r1, [r7, #8]
 801fa92:	603b      	str	r3, [r7, #0]
 801fa94:	4613      	mov	r3, r2
 801fa96:	71fb      	strb	r3, [r7, #7]
  struct tcp_seg *seg;
  u8_t optlen;

  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
 801fa98:	68fb      	ldr	r3, [r7, #12]
 801fa9a:	2b00      	cmp	r3, #0
 801fa9c:	d105      	bne.n	801faaa <tcp_create_segment+0x22>
 801fa9e:	4b45      	ldr	r3, [pc, #276]	@ (801fbb4 <tcp_create_segment+0x12c>)
 801faa0:	22a3      	movs	r2, #163	@ 0xa3
 801faa2:	4945      	ldr	r1, [pc, #276]	@ (801fbb8 <tcp_create_segment+0x130>)
 801faa4:	4845      	ldr	r0, [pc, #276]	@ (801fbbc <tcp_create_segment+0x134>)
 801faa6:	f00a fe59 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
 801faaa:	68bb      	ldr	r3, [r7, #8]
 801faac:	2b00      	cmp	r3, #0
 801faae:	d105      	bne.n	801fabc <tcp_create_segment+0x34>
 801fab0:	4b40      	ldr	r3, [pc, #256]	@ (801fbb4 <tcp_create_segment+0x12c>)
 801fab2:	22a4      	movs	r2, #164	@ 0xa4
 801fab4:	4942      	ldr	r1, [pc, #264]	@ (801fbc0 <tcp_create_segment+0x138>)
 801fab6:	4841      	ldr	r0, [pc, #260]	@ (801fbbc <tcp_create_segment+0x134>)
 801fab8:	f00a fe50 	bl	802a75c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801fabc:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801fac0:	009b      	lsls	r3, r3, #2
 801fac2:	b2db      	uxtb	r3, r3
 801fac4:	f003 0304 	and.w	r3, r3, #4
 801fac8:	75fb      	strb	r3, [r7, #23]

  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
 801faca:	2003      	movs	r0, #3
 801facc:	f7fa fc6a 	bl	801a3a4 <memp_malloc>
 801fad0:	6138      	str	r0, [r7, #16]
 801fad2:	693b      	ldr	r3, [r7, #16]
 801fad4:	2b00      	cmp	r3, #0
 801fad6:	d104      	bne.n	801fae2 <tcp_create_segment+0x5a>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
    pbuf_free(p);
 801fad8:	68b8      	ldr	r0, [r7, #8]
 801fada:	f7fb fbc7 	bl	801b26c <pbuf_free>
    return NULL;
 801fade:	2300      	movs	r3, #0
 801fae0:	e063      	b.n	801fbaa <tcp_create_segment+0x122>
  }
  seg->flags = optflags;
 801fae2:	693b      	ldr	r3, [r7, #16]
 801fae4:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 801fae8:	731a      	strb	r2, [r3, #12]
  seg->next = NULL;
 801faea:	693b      	ldr	r3, [r7, #16]
 801faec:	2200      	movs	r2, #0
 801faee:	601a      	str	r2, [r3, #0]
  seg->p = p;
 801faf0:	693b      	ldr	r3, [r7, #16]
 801faf2:	68ba      	ldr	r2, [r7, #8]
 801faf4:	605a      	str	r2, [r3, #4]
  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
 801faf6:	68bb      	ldr	r3, [r7, #8]
 801faf8:	891a      	ldrh	r2, [r3, #8]
 801fafa:	7dfb      	ldrb	r3, [r7, #23]
 801fafc:	b29b      	uxth	r3, r3
 801fafe:	429a      	cmp	r2, r3
 801fb00:	d205      	bcs.n	801fb0e <tcp_create_segment+0x86>
 801fb02:	4b2c      	ldr	r3, [pc, #176]	@ (801fbb4 <tcp_create_segment+0x12c>)
 801fb04:	22b0      	movs	r2, #176	@ 0xb0
 801fb06:	492f      	ldr	r1, [pc, #188]	@ (801fbc4 <tcp_create_segment+0x13c>)
 801fb08:	482c      	ldr	r0, [pc, #176]	@ (801fbbc <tcp_create_segment+0x134>)
 801fb0a:	f00a fe27 	bl	802a75c <iprintf>
  seg->len = p->tot_len - optlen;
 801fb0e:	68bb      	ldr	r3, [r7, #8]
 801fb10:	891a      	ldrh	r2, [r3, #8]
 801fb12:	7dfb      	ldrb	r3, [r7, #23]
 801fb14:	b29b      	uxth	r3, r3
 801fb16:	1ad3      	subs	r3, r2, r3
 801fb18:	b29a      	uxth	r2, r3
 801fb1a:	693b      	ldr	r3, [r7, #16]
 801fb1c:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
  seg->oversize_left = 0;
 801fb1e:	693b      	ldr	r3, [r7, #16]
 801fb20:	2200      	movs	r2, #0
 801fb22:	815a      	strh	r2, [r3, #10]
  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */

  /* build TCP header */
  if (pbuf_add_header(p, TCP_HLEN)) {
 801fb24:	2114      	movs	r1, #20
 801fb26:	68b8      	ldr	r0, [r7, #8]
 801fb28:	f7fb fad8 	bl	801b0dc <pbuf_add_header>
 801fb2c:	4603      	mov	r3, r0
 801fb2e:	2b00      	cmp	r3, #0
 801fb30:	d004      	beq.n	801fb3c <tcp_create_segment+0xb4>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
    TCP_STATS_INC(tcp.err);
    tcp_seg_free(seg);
 801fb32:	6938      	ldr	r0, [r7, #16]
 801fb34:	f7fc fff3 	bl	801cb1e <tcp_seg_free>
    return NULL;
 801fb38:	2300      	movs	r3, #0
 801fb3a:	e036      	b.n	801fbaa <tcp_create_segment+0x122>
  }
  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
 801fb3c:	693b      	ldr	r3, [r7, #16]
 801fb3e:	685b      	ldr	r3, [r3, #4]
 801fb40:	685a      	ldr	r2, [r3, #4]
 801fb42:	693b      	ldr	r3, [r7, #16]
 801fb44:	611a      	str	r2, [r3, #16]
  seg->tcphdr->src = lwip_htons(pcb->local_port);
 801fb46:	68fb      	ldr	r3, [r7, #12]
 801fb48:	8ada      	ldrh	r2, [r3, #22]
 801fb4a:	693b      	ldr	r3, [r7, #16]
 801fb4c:	691c      	ldr	r4, [r3, #16]
 801fb4e:	4610      	mov	r0, r2
 801fb50:	f7f9 feaa 	bl	80198a8 <lwip_htons>
 801fb54:	4603      	mov	r3, r0
 801fb56:	8023      	strh	r3, [r4, #0]
  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
 801fb58:	68fb      	ldr	r3, [r7, #12]
 801fb5a:	8b1a      	ldrh	r2, [r3, #24]
 801fb5c:	693b      	ldr	r3, [r7, #16]
 801fb5e:	691c      	ldr	r4, [r3, #16]
 801fb60:	4610      	mov	r0, r2
 801fb62:	f7f9 fea1 	bl	80198a8 <lwip_htons>
 801fb66:	4603      	mov	r3, r0
 801fb68:	8063      	strh	r3, [r4, #2]
  seg->tcphdr->seqno = lwip_htonl(seqno);
 801fb6a:	693b      	ldr	r3, [r7, #16]
 801fb6c:	691c      	ldr	r4, [r3, #16]
 801fb6e:	6838      	ldr	r0, [r7, #0]
 801fb70:	f7f9 feaf 	bl	80198d2 <lwip_htonl>
 801fb74:	4603      	mov	r3, r0
 801fb76:	6063      	str	r3, [r4, #4]
  /* ackno is set in tcp_output */
  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
 801fb78:	7dfb      	ldrb	r3, [r7, #23]
 801fb7a:	089b      	lsrs	r3, r3, #2
 801fb7c:	b2db      	uxtb	r3, r3
 801fb7e:	3305      	adds	r3, #5
 801fb80:	b29b      	uxth	r3, r3
 801fb82:	031b      	lsls	r3, r3, #12
 801fb84:	b29a      	uxth	r2, r3
 801fb86:	79fb      	ldrb	r3, [r7, #7]
 801fb88:	b29b      	uxth	r3, r3
 801fb8a:	4313      	orrs	r3, r2
 801fb8c:	b29a      	uxth	r2, r3
 801fb8e:	693b      	ldr	r3, [r7, #16]
 801fb90:	691c      	ldr	r4, [r3, #16]
 801fb92:	4610      	mov	r0, r2
 801fb94:	f7f9 fe88 	bl	80198a8 <lwip_htons>
 801fb98:	4603      	mov	r3, r0
 801fb9a:	81a3      	strh	r3, [r4, #12]
  /* wnd and chksum are set in tcp_output */
  seg->tcphdr->urgp = 0;
 801fb9c:	693b      	ldr	r3, [r7, #16]
 801fb9e:	691b      	ldr	r3, [r3, #16]
 801fba0:	2200      	movs	r2, #0
 801fba2:	749a      	strb	r2, [r3, #18]
 801fba4:	2200      	movs	r2, #0
 801fba6:	74da      	strb	r2, [r3, #19]
  return seg;
 801fba8:	693b      	ldr	r3, [r7, #16]
}
 801fbaa:	4618      	mov	r0, r3
 801fbac:	371c      	adds	r7, #28
 801fbae:	46bd      	mov	sp, r7
 801fbb0:	bd90      	pop	{r4, r7, pc}
 801fbb2:	bf00      	nop
 801fbb4:	08030074 	.word	0x08030074
 801fbb8:	080300a8 	.word	0x080300a8
 801fbbc:	080300c8 	.word	0x080300c8
 801fbc0:	080300f0 	.word	0x080300f0
 801fbc4:	08030114 	.word	0x08030114

0801fbc8 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
                  u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
                  u8_t first_seg)
{
 801fbc8:	b580      	push	{r7, lr}
 801fbca:	b086      	sub	sp, #24
 801fbcc:	af00      	add	r7, sp, #0
 801fbce:	607b      	str	r3, [r7, #4]
 801fbd0:	4603      	mov	r3, r0
 801fbd2:	73fb      	strb	r3, [r7, #15]
 801fbd4:	460b      	mov	r3, r1
 801fbd6:	81bb      	strh	r3, [r7, #12]
 801fbd8:	4613      	mov	r3, r2
 801fbda:	817b      	strh	r3, [r7, #10]
  struct pbuf *p;
  u16_t alloc = length;
 801fbdc:	89bb      	ldrh	r3, [r7, #12]
 801fbde:	82fb      	strh	r3, [r7, #22]

  LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
 801fbe0:	687b      	ldr	r3, [r7, #4]
 801fbe2:	2b00      	cmp	r3, #0
 801fbe4:	d105      	bne.n	801fbf2 <tcp_pbuf_prealloc+0x2a>
 801fbe6:	4b30      	ldr	r3, [pc, #192]	@ (801fca8 <tcp_pbuf_prealloc+0xe0>)
 801fbe8:	22e8      	movs	r2, #232	@ 0xe8
 801fbea:	4930      	ldr	r1, [pc, #192]	@ (801fcac <tcp_pbuf_prealloc+0xe4>)
 801fbec:	4830      	ldr	r0, [pc, #192]	@ (801fcb0 <tcp_pbuf_prealloc+0xe8>)
 801fbee:	f00a fdb5 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
 801fbf2:	6a3b      	ldr	r3, [r7, #32]
 801fbf4:	2b00      	cmp	r3, #0
 801fbf6:	d105      	bne.n	801fc04 <tcp_pbuf_prealloc+0x3c>
 801fbf8:	4b2b      	ldr	r3, [pc, #172]	@ (801fca8 <tcp_pbuf_prealloc+0xe0>)
 801fbfa:	22e9      	movs	r2, #233	@ 0xe9
 801fbfc:	492d      	ldr	r1, [pc, #180]	@ (801fcb4 <tcp_pbuf_prealloc+0xec>)
 801fbfe:	482c      	ldr	r0, [pc, #176]	@ (801fcb0 <tcp_pbuf_prealloc+0xe8>)
 801fc00:	f00a fdac 	bl	802a75c <iprintf>
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(apiflags);
  LWIP_UNUSED_ARG(first_seg);
  alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (length < max_length) {
 801fc04:	89ba      	ldrh	r2, [r7, #12]
 801fc06:	897b      	ldrh	r3, [r7, #10]
 801fc08:	429a      	cmp	r2, r3
 801fc0a:	d221      	bcs.n	801fc50 <tcp_pbuf_prealloc+0x88>
     *
     * Did the user set TCP_WRITE_FLAG_MORE?
     *
     * Will the Nagle algorithm defer transmission of this segment?
     */
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801fc0c:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 801fc10:	f003 0302 	and.w	r3, r3, #2
 801fc14:	2b00      	cmp	r3, #0
 801fc16:	d111      	bne.n	801fc3c <tcp_pbuf_prealloc+0x74>
        (!(pcb->flags & TF_NODELAY) &&
 801fc18:	6a3b      	ldr	r3, [r7, #32]
 801fc1a:	8b5b      	ldrh	r3, [r3, #26]
 801fc1c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801fc20:	2b00      	cmp	r3, #0
 801fc22:	d115      	bne.n	801fc50 <tcp_pbuf_prealloc+0x88>
        (!(pcb->flags & TF_NODELAY) &&
 801fc24:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801fc28:	2b00      	cmp	r3, #0
 801fc2a:	d007      	beq.n	801fc3c <tcp_pbuf_prealloc+0x74>
         (!first_seg ||
          pcb->unsent != NULL ||
 801fc2c:	6a3b      	ldr	r3, [r7, #32]
 801fc2e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
         (!first_seg ||
 801fc30:	2b00      	cmp	r3, #0
 801fc32:	d103      	bne.n	801fc3c <tcp_pbuf_prealloc+0x74>
          pcb->unacked != NULL))) {
 801fc34:	6a3b      	ldr	r3, [r7, #32]
 801fc36:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
          pcb->unsent != NULL ||
 801fc38:	2b00      	cmp	r3, #0
 801fc3a:	d009      	beq.n	801fc50 <tcp_pbuf_prealloc+0x88>
      alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
 801fc3c:	89bb      	ldrh	r3, [r7, #12]
 801fc3e:	f203 53b7 	addw	r3, r3, #1463	@ 0x5b7
 801fc42:	f023 0203 	bic.w	r2, r3, #3
 801fc46:	897b      	ldrh	r3, [r7, #10]
 801fc48:	4293      	cmp	r3, r2
 801fc4a:	bf28      	it	cs
 801fc4c:	4613      	movcs	r3, r2
 801fc4e:	82fb      	strh	r3, [r7, #22]
    }
  }
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  p = pbuf_alloc(layer, alloc, PBUF_RAM);
 801fc50:	8af9      	ldrh	r1, [r7, #22]
 801fc52:	7bfb      	ldrb	r3, [r7, #15]
 801fc54:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801fc58:	4618      	mov	r0, r3
 801fc5a:	f7fa fff1 	bl	801ac40 <pbuf_alloc>
 801fc5e:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801fc60:	693b      	ldr	r3, [r7, #16]
 801fc62:	2b00      	cmp	r3, #0
 801fc64:	d101      	bne.n	801fc6a <tcp_pbuf_prealloc+0xa2>
    return NULL;
 801fc66:	2300      	movs	r3, #0
 801fc68:	e019      	b.n	801fc9e <tcp_pbuf_prealloc+0xd6>
  }
  LWIP_ASSERT("need unchained pbuf", p->next == NULL);
 801fc6a:	693b      	ldr	r3, [r7, #16]
 801fc6c:	681b      	ldr	r3, [r3, #0]
 801fc6e:	2b00      	cmp	r3, #0
 801fc70:	d006      	beq.n	801fc80 <tcp_pbuf_prealloc+0xb8>
 801fc72:	4b0d      	ldr	r3, [pc, #52]	@ (801fca8 <tcp_pbuf_prealloc+0xe0>)
 801fc74:	f240 120b 	movw	r2, #267	@ 0x10b
 801fc78:	490f      	ldr	r1, [pc, #60]	@ (801fcb8 <tcp_pbuf_prealloc+0xf0>)
 801fc7a:	480d      	ldr	r0, [pc, #52]	@ (801fcb0 <tcp_pbuf_prealloc+0xe8>)
 801fc7c:	f00a fd6e 	bl	802a75c <iprintf>
  *oversize = p->len - length;
 801fc80:	693b      	ldr	r3, [r7, #16]
 801fc82:	895a      	ldrh	r2, [r3, #10]
 801fc84:	89bb      	ldrh	r3, [r7, #12]
 801fc86:	1ad3      	subs	r3, r2, r3
 801fc88:	b29a      	uxth	r2, r3
 801fc8a:	687b      	ldr	r3, [r7, #4]
 801fc8c:	801a      	strh	r2, [r3, #0]
  /* trim p->len to the currently used size */
  p->len = p->tot_len = length;
 801fc8e:	693b      	ldr	r3, [r7, #16]
 801fc90:	89ba      	ldrh	r2, [r7, #12]
 801fc92:	811a      	strh	r2, [r3, #8]
 801fc94:	693b      	ldr	r3, [r7, #16]
 801fc96:	891a      	ldrh	r2, [r3, #8]
 801fc98:	693b      	ldr	r3, [r7, #16]
 801fc9a:	815a      	strh	r2, [r3, #10]
  return p;
 801fc9c:	693b      	ldr	r3, [r7, #16]
}
 801fc9e:	4618      	mov	r0, r3
 801fca0:	3718      	adds	r7, #24
 801fca2:	46bd      	mov	sp, r7
 801fca4:	bd80      	pop	{r7, pc}
 801fca6:	bf00      	nop
 801fca8:	08030074 	.word	0x08030074
 801fcac:	0803012c 	.word	0x0803012c
 801fcb0:	080300c8 	.word	0x080300c8
 801fcb4:	08030150 	.word	0x08030150
 801fcb8:	08030170 	.word	0x08030170

0801fcbc <tcp_write_checks>:
 * @param len length of data to send (checked agains snd_buf)
 * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
 */
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
 801fcbc:	b580      	push	{r7, lr}
 801fcbe:	b082      	sub	sp, #8
 801fcc0:	af00      	add	r7, sp, #0
 801fcc2:	6078      	str	r0, [r7, #4]
 801fcc4:	460b      	mov	r3, r1
 801fcc6:	807b      	strh	r3, [r7, #2]
  LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
 801fcc8:	687b      	ldr	r3, [r7, #4]
 801fcca:	2b00      	cmp	r3, #0
 801fccc:	d106      	bne.n	801fcdc <tcp_write_checks+0x20>
 801fcce:	4b33      	ldr	r3, [pc, #204]	@ (801fd9c <tcp_write_checks+0xe0>)
 801fcd0:	f240 1233 	movw	r2, #307	@ 0x133
 801fcd4:	4932      	ldr	r1, [pc, #200]	@ (801fda0 <tcp_write_checks+0xe4>)
 801fcd6:	4833      	ldr	r0, [pc, #204]	@ (801fda4 <tcp_write_checks+0xe8>)
 801fcd8:	f00a fd40 	bl	802a75c <iprintf>

  /* connection is in invalid state for data transmission? */
  if ((pcb->state != ESTABLISHED) &&
 801fcdc:	687b      	ldr	r3, [r7, #4]
 801fcde:	7d1b      	ldrb	r3, [r3, #20]
 801fce0:	2b04      	cmp	r3, #4
 801fce2:	d00e      	beq.n	801fd02 <tcp_write_checks+0x46>
      (pcb->state != CLOSE_WAIT) &&
 801fce4:	687b      	ldr	r3, [r7, #4]
 801fce6:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != ESTABLISHED) &&
 801fce8:	2b07      	cmp	r3, #7
 801fcea:	d00a      	beq.n	801fd02 <tcp_write_checks+0x46>
      (pcb->state != SYN_SENT) &&
 801fcec:	687b      	ldr	r3, [r7, #4]
 801fcee:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != CLOSE_WAIT) &&
 801fcf0:	2b02      	cmp	r3, #2
 801fcf2:	d006      	beq.n	801fd02 <tcp_write_checks+0x46>
      (pcb->state != SYN_RCVD)) {
 801fcf4:	687b      	ldr	r3, [r7, #4]
 801fcf6:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != SYN_SENT) &&
 801fcf8:	2b03      	cmp	r3, #3
 801fcfa:	d002      	beq.n	801fd02 <tcp_write_checks+0x46>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
    return ERR_CONN;
 801fcfc:	f06f 030a 	mvn.w	r3, #10
 801fd00:	e048      	b.n	801fd94 <tcp_write_checks+0xd8>
  } else if (len == 0) {
 801fd02:	887b      	ldrh	r3, [r7, #2]
 801fd04:	2b00      	cmp	r3, #0
 801fd06:	d101      	bne.n	801fd0c <tcp_write_checks+0x50>
    return ERR_OK;
 801fd08:	2300      	movs	r3, #0
 801fd0a:	e043      	b.n	801fd94 <tcp_write_checks+0xd8>
  }

  /* fail on too much data */
  if (len > pcb->snd_buf) {
 801fd0c:	687b      	ldr	r3, [r7, #4]
 801fd0e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 801fd12:	887a      	ldrh	r2, [r7, #2]
 801fd14:	429a      	cmp	r2, r3
 801fd16:	d909      	bls.n	801fd2c <tcp_write_checks+0x70>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
                len, pcb->snd_buf));
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801fd18:	687b      	ldr	r3, [r7, #4]
 801fd1a:	8b5b      	ldrh	r3, [r3, #26]
 801fd1c:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fd20:	b29a      	uxth	r2, r3
 801fd22:	687b      	ldr	r3, [r7, #4]
 801fd24:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801fd26:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801fd2a:	e033      	b.n	801fd94 <tcp_write_checks+0xd8>
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));

  /* If total number of pbufs on the unsent/unacked queues exceeds the
   * configured maximum, return an error */
  /* check for configured max queuelen and possible overflow */
  if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
 801fd2c:	687b      	ldr	r3, [r7, #4]
 801fd2e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fd32:	2b0f      	cmp	r3, #15
 801fd34:	d909      	bls.n	801fd4a <tcp_write_checks+0x8e>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
                pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
    TCP_STATS_INC(tcp.memerr);
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 801fd36:	687b      	ldr	r3, [r7, #4]
 801fd38:	8b5b      	ldrh	r3, [r3, #26]
 801fd3a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 801fd3e:	b29a      	uxth	r2, r3
 801fd40:	687b      	ldr	r3, [r7, #4]
 801fd42:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 801fd44:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801fd48:	e024      	b.n	801fd94 <tcp_write_checks+0xd8>
  }
  if (pcb->snd_queuelen != 0) {
 801fd4a:	687b      	ldr	r3, [r7, #4]
 801fd4c:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fd50:	2b00      	cmp	r3, #0
 801fd52:	d00f      	beq.n	801fd74 <tcp_write_checks+0xb8>
    LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
 801fd54:	687b      	ldr	r3, [r7, #4]
 801fd56:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fd58:	2b00      	cmp	r3, #0
 801fd5a:	d11a      	bne.n	801fd92 <tcp_write_checks+0xd6>
 801fd5c:	687b      	ldr	r3, [r7, #4]
 801fd5e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fd60:	2b00      	cmp	r3, #0
 801fd62:	d116      	bne.n	801fd92 <tcp_write_checks+0xd6>
 801fd64:	4b0d      	ldr	r3, [pc, #52]	@ (801fd9c <tcp_write_checks+0xe0>)
 801fd66:	f240 1255 	movw	r2, #341	@ 0x155
 801fd6a:	490f      	ldr	r1, [pc, #60]	@ (801fda8 <tcp_write_checks+0xec>)
 801fd6c:	480d      	ldr	r0, [pc, #52]	@ (801fda4 <tcp_write_checks+0xe8>)
 801fd6e:	f00a fcf5 	bl	802a75c <iprintf>
 801fd72:	e00e      	b.n	801fd92 <tcp_write_checks+0xd6>
                pcb->unacked != NULL || pcb->unsent != NULL);
  } else {
    LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
 801fd74:	687b      	ldr	r3, [r7, #4]
 801fd76:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801fd78:	2b00      	cmp	r3, #0
 801fd7a:	d103      	bne.n	801fd84 <tcp_write_checks+0xc8>
 801fd7c:	687b      	ldr	r3, [r7, #4]
 801fd7e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fd80:	2b00      	cmp	r3, #0
 801fd82:	d006      	beq.n	801fd92 <tcp_write_checks+0xd6>
 801fd84:	4b05      	ldr	r3, [pc, #20]	@ (801fd9c <tcp_write_checks+0xe0>)
 801fd86:	f44f 72ac 	mov.w	r2, #344	@ 0x158
 801fd8a:	4908      	ldr	r1, [pc, #32]	@ (801fdac <tcp_write_checks+0xf0>)
 801fd8c:	4805      	ldr	r0, [pc, #20]	@ (801fda4 <tcp_write_checks+0xe8>)
 801fd8e:	f00a fce5 	bl	802a75c <iprintf>
                pcb->unacked == NULL && pcb->unsent == NULL);
  }
  return ERR_OK;
 801fd92:	2300      	movs	r3, #0
}
 801fd94:	4618      	mov	r0, r3
 801fd96:	3708      	adds	r7, #8
 801fd98:	46bd      	mov	sp, r7
 801fd9a:	bd80      	pop	{r7, pc}
 801fd9c:	08030074 	.word	0x08030074
 801fda0:	08030184 	.word	0x08030184
 801fda4:	080300c8 	.word	0x080300c8
 801fda8:	080301a4 	.word	0x080301a4
 801fdac:	080301e0 	.word	0x080301e0

0801fdb0 <tcp_write>:
 * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
 * @return ERR_OK if enqueued, another err_t on error
 */
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
 801fdb0:	b590      	push	{r4, r7, lr}
 801fdb2:	b09d      	sub	sp, #116	@ 0x74
 801fdb4:	af04      	add	r7, sp, #16
 801fdb6:	60f8      	str	r0, [r7, #12]
 801fdb8:	60b9      	str	r1, [r7, #8]
 801fdba:	4611      	mov	r1, r2
 801fdbc:	461a      	mov	r2, r3
 801fdbe:	460b      	mov	r3, r1
 801fdc0:	80fb      	strh	r3, [r7, #6]
 801fdc2:	4613      	mov	r3, r2
 801fdc4:	717b      	strb	r3, [r7, #5]
  struct pbuf *concat_p = NULL;
 801fdc6:	2300      	movs	r3, #0
 801fdc8:	63fb      	str	r3, [r7, #60]	@ 0x3c
  struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
 801fdca:	2300      	movs	r3, #0
 801fdcc:	643b      	str	r3, [r7, #64]	@ 0x40
 801fdce:	2300      	movs	r3, #0
 801fdd0:	657b      	str	r3, [r7, #84]	@ 0x54
 801fdd2:	2300      	movs	r3, #0
 801fdd4:	653b      	str	r3, [r7, #80]	@ 0x50
 801fdd6:	2300      	movs	r3, #0
 801fdd8:	64fb      	str	r3, [r7, #76]	@ 0x4c
  u16_t pos = 0; /* position in 'arg' data */
 801fdda:	2300      	movs	r3, #0
 801fddc:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  u16_t queuelen;
  u8_t optlen;
  u8_t optflags = 0;
 801fde0:	2300      	movs	r3, #0
 801fde2:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
#if TCP_OVERSIZE
  u16_t oversize = 0;
 801fde6:	2300      	movs	r3, #0
 801fde8:	82fb      	strh	r3, [r7, #22]
  u16_t oversize_used = 0;
 801fdea:	2300      	movs	r3, #0
 801fdec:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
#if TCP_OVERSIZE_DBGCHECK
  u16_t oversize_add = 0;
 801fdf0:	2300      	movs	r3, #0
 801fdf2:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
  u16_t extendlen = 0;
 801fdf6:	2300      	movs	r3, #0
 801fdf8:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
  u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
  err_t err;
  u16_t mss_local;

  LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
 801fdfc:	68fb      	ldr	r3, [r7, #12]
 801fdfe:	2b00      	cmp	r3, #0
 801fe00:	d109      	bne.n	801fe16 <tcp_write+0x66>
 801fe02:	4b9d      	ldr	r3, [pc, #628]	@ (8020078 <tcp_write+0x2c8>)
 801fe04:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 801fe08:	499c      	ldr	r1, [pc, #624]	@ (802007c <tcp_write+0x2cc>)
 801fe0a:	489d      	ldr	r0, [pc, #628]	@ (8020080 <tcp_write+0x2d0>)
 801fe0c:	f00a fca6 	bl	802a75c <iprintf>
 801fe10:	f06f 030f 	mvn.w	r3, #15
 801fe14:	e37b      	b.n	802050e <tcp_write+0x75e>

  /* don't allocate segments bigger than half the maximum window we ever received */
  mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
 801fe16:	68fb      	ldr	r3, [r7, #12]
 801fe18:	f8b3 3062 	ldrh.w	r3, [r3, #98]	@ 0x62
 801fe1c:	085b      	lsrs	r3, r3, #1
 801fe1e:	b29a      	uxth	r2, r3
 801fe20:	68fb      	ldr	r3, [r7, #12]
 801fe22:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801fe24:	4293      	cmp	r3, r2
 801fe26:	bf28      	it	cs
 801fe28:	4613      	movcs	r3, r2
 801fe2a:	853b      	strh	r3, [r7, #40]	@ 0x28
  mss_local = mss_local ? mss_local : pcb->mss;
 801fe2c:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801fe2e:	2b00      	cmp	r3, #0
 801fe30:	d102      	bne.n	801fe38 <tcp_write+0x88>
 801fe32:	68fb      	ldr	r3, [r7, #12]
 801fe34:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801fe36:	e000      	b.n	801fe3a <tcp_write+0x8a>
 801fe38:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 801fe3a:	853b      	strh	r3, [r7, #40]	@ 0x28

  LWIP_ASSERT_CORE_LOCKED();
 801fe3c:	f7f1 f860 	bl	8010f00 <sys_check_core_locking>
  apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
                                 (void *)pcb, arg, len, (u16_t)apiflags));
  LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
 801fe40:	68bb      	ldr	r3, [r7, #8]
 801fe42:	2b00      	cmp	r3, #0
 801fe44:	d109      	bne.n	801fe5a <tcp_write+0xaa>
 801fe46:	4b8c      	ldr	r3, [pc, #560]	@ (8020078 <tcp_write+0x2c8>)
 801fe48:	f240 12ad 	movw	r2, #429	@ 0x1ad
 801fe4c:	498d      	ldr	r1, [pc, #564]	@ (8020084 <tcp_write+0x2d4>)
 801fe4e:	488c      	ldr	r0, [pc, #560]	@ (8020080 <tcp_write+0x2d0>)
 801fe50:	f00a fc84 	bl	802a75c <iprintf>
 801fe54:	f06f 030f 	mvn.w	r3, #15
 801fe58:	e359      	b.n	802050e <tcp_write+0x75e>
             arg != NULL, return ERR_ARG;);

  err = tcp_write_checks(pcb, len);
 801fe5a:	88fb      	ldrh	r3, [r7, #6]
 801fe5c:	4619      	mov	r1, r3
 801fe5e:	68f8      	ldr	r0, [r7, #12]
 801fe60:	f7ff ff2c 	bl	801fcbc <tcp_write_checks>
 801fe64:	4603      	mov	r3, r0
 801fe66:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  if (err != ERR_OK) {
 801fe6a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801fe6e:	2b00      	cmp	r3, #0
 801fe70:	d002      	beq.n	801fe78 <tcp_write+0xc8>
    return err;
 801fe72:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 801fe76:	e34a      	b.n	802050e <tcp_write+0x75e>
  }
  queuelen = pcb->snd_queuelen;
 801fe78:	68fb      	ldr	r3, [r7, #12]
 801fe7a:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801fe7e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
    /* ensure that segments can hold at least one data byte... */
    mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
  } else
#endif /* LWIP_TCP_TIMESTAMPS */
  {
    optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 801fe82:	2300      	movs	r3, #0
 801fe84:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
   *
   * pos records progress as data is segmented.
   */

  /* Find the tail of the unsent queue. */
  if (pcb->unsent != NULL) {
 801fe88:	68fb      	ldr	r3, [r7, #12]
 801fe8a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe8c:	2b00      	cmp	r3, #0
 801fe8e:	f000 8127 	beq.w	80200e0 <tcp_write+0x330>
    u16_t space;
    u16_t unsent_optlen;

    /* @todo: this could be sped up by keeping last_unsent in the pcb */
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801fe92:	68fb      	ldr	r3, [r7, #12]
 801fe94:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801fe96:	643b      	str	r3, [r7, #64]	@ 0x40
 801fe98:	e002      	b.n	801fea0 <tcp_write+0xf0>
         last_unsent = last_unsent->next);
 801fe9a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fe9c:	681b      	ldr	r3, [r3, #0]
 801fe9e:	643b      	str	r3, [r7, #64]	@ 0x40
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 801fea0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fea2:	681b      	ldr	r3, [r3, #0]
 801fea4:	2b00      	cmp	r3, #0
 801fea6:	d1f8      	bne.n	801fe9a <tcp_write+0xea>

    /* Usable space at the end of the last unsent segment */
    unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
 801fea8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801feaa:	7b1b      	ldrb	r3, [r3, #12]
 801feac:	009b      	lsls	r3, r3, #2
 801feae:	b29b      	uxth	r3, r3
 801feb0:	f003 0304 	and.w	r3, r3, #4
 801feb4:	84bb      	strh	r3, [r7, #36]	@ 0x24
    LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
 801feb6:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801feb8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801feba:	891b      	ldrh	r3, [r3, #8]
 801febc:	4619      	mov	r1, r3
 801febe:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801fec0:	440b      	add	r3, r1
 801fec2:	429a      	cmp	r2, r3
 801fec4:	da06      	bge.n	801fed4 <tcp_write+0x124>
 801fec6:	4b6c      	ldr	r3, [pc, #432]	@ (8020078 <tcp_write+0x2c8>)
 801fec8:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801fecc:	496e      	ldr	r1, [pc, #440]	@ (8020088 <tcp_write+0x2d8>)
 801fece:	486c      	ldr	r0, [pc, #432]	@ (8020080 <tcp_write+0x2d0>)
 801fed0:	f00a fc44 	bl	802a75c <iprintf>
    space = mss_local - (last_unsent->len + unsent_optlen);
 801fed4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801fed6:	891a      	ldrh	r2, [r3, #8]
 801fed8:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801feda:	4413      	add	r3, r2
 801fedc:	b29b      	uxth	r3, r3
 801fede:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 801fee0:	1ad3      	subs	r3, r2, r3
 801fee2:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
     * function.
     */
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
    /* check that pcb->unsent_oversize matches last_unsent->oversize_left */
    LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
 801fee6:	68fb      	ldr	r3, [r7, #12]
 801fee8:	f8b3 2068 	ldrh.w	r2, [r3, #104]	@ 0x68
 801feec:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801feee:	895b      	ldrh	r3, [r3, #10]
 801fef0:	429a      	cmp	r2, r3
 801fef2:	d006      	beq.n	801ff02 <tcp_write+0x152>
 801fef4:	4b60      	ldr	r3, [pc, #384]	@ (8020078 <tcp_write+0x2c8>)
 801fef6:	f240 12f3 	movw	r2, #499	@ 0x1f3
 801fefa:	4964      	ldr	r1, [pc, #400]	@ (802008c <tcp_write+0x2dc>)
 801fefc:	4860      	ldr	r0, [pc, #384]	@ (8020080 <tcp_write+0x2d0>)
 801fefe:	f00a fc2d 	bl	802a75c <iprintf>
                pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
    oversize = pcb->unsent_oversize;
 801ff02:	68fb      	ldr	r3, [r7, #12]
 801ff04:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 801ff08:	82fb      	strh	r3, [r7, #22]
    if (oversize > 0) {
 801ff0a:	8afb      	ldrh	r3, [r7, #22]
 801ff0c:	2b00      	cmp	r3, #0
 801ff0e:	d02e      	beq.n	801ff6e <tcp_write+0x1be>
      LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
 801ff10:	8afb      	ldrh	r3, [r7, #22]
 801ff12:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ff16:	429a      	cmp	r2, r3
 801ff18:	d206      	bcs.n	801ff28 <tcp_write+0x178>
 801ff1a:	4b57      	ldr	r3, [pc, #348]	@ (8020078 <tcp_write+0x2c8>)
 801ff1c:	f44f 72fc 	mov.w	r2, #504	@ 0x1f8
 801ff20:	495b      	ldr	r1, [pc, #364]	@ (8020090 <tcp_write+0x2e0>)
 801ff22:	4857      	ldr	r0, [pc, #348]	@ (8020080 <tcp_write+0x2d0>)
 801ff24:	f00a fc1a 	bl	802a75c <iprintf>
      seg = last_unsent;
 801ff28:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ff2a:	657b      	str	r3, [r7, #84]	@ 0x54
      oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
 801ff2c:	8afb      	ldrh	r3, [r7, #22]
 801ff2e:	88fa      	ldrh	r2, [r7, #6]
 801ff30:	4293      	cmp	r3, r2
 801ff32:	bf28      	it	cs
 801ff34:	4613      	movcs	r3, r2
 801ff36:	b29b      	uxth	r3, r3
 801ff38:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ff3c:	4293      	cmp	r3, r2
 801ff3e:	bf28      	it	cs
 801ff40:	4613      	movcs	r3, r2
 801ff42:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      pos += oversize_used;
 801ff46:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ff4a:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ff4e:	4413      	add	r3, r2
 801ff50:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
      oversize -= oversize_used;
 801ff54:	8afa      	ldrh	r2, [r7, #22]
 801ff56:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ff5a:	1ad3      	subs	r3, r2, r3
 801ff5c:	b29b      	uxth	r3, r3
 801ff5e:	82fb      	strh	r3, [r7, #22]
      space -= oversize_used;
 801ff60:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ff64:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 801ff68:	1ad3      	subs	r3, r2, r3
 801ff6a:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
    }
    /* now we are either finished or oversize is zero */
    LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
 801ff6e:	8afb      	ldrh	r3, [r7, #22]
 801ff70:	2b00      	cmp	r3, #0
 801ff72:	d00b      	beq.n	801ff8c <tcp_write+0x1dc>
 801ff74:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ff78:	88fb      	ldrh	r3, [r7, #6]
 801ff7a:	429a      	cmp	r2, r3
 801ff7c:	d006      	beq.n	801ff8c <tcp_write+0x1dc>
 801ff7e:	4b3e      	ldr	r3, [pc, #248]	@ (8020078 <tcp_write+0x2c8>)
 801ff80:	f44f 7200 	mov.w	r2, #512	@ 0x200
 801ff84:	4943      	ldr	r1, [pc, #268]	@ (8020094 <tcp_write+0x2e4>)
 801ff86:	483e      	ldr	r0, [pc, #248]	@ (8020080 <tcp_write+0x2d0>)
 801ff88:	f00a fbe8 	bl	802a75c <iprintf>
     *
     * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
     * it after rexmit puts a segment from unacked to unsent and at this point,
     * oversize info is lost.
     */
    if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
 801ff8c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 801ff90:	88fb      	ldrh	r3, [r7, #6]
 801ff92:	429a      	cmp	r2, r3
 801ff94:	f080 8172 	bcs.w	802027c <tcp_write+0x4cc>
 801ff98:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801ff9c:	2b00      	cmp	r3, #0
 801ff9e:	f000 816d 	beq.w	802027c <tcp_write+0x4cc>
 801ffa2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ffa4:	891b      	ldrh	r3, [r3, #8]
 801ffa6:	2b00      	cmp	r3, #0
 801ffa8:	f000 8168 	beq.w	802027c <tcp_write+0x4cc>
      u16_t seglen = LWIP_MIN(space, len - pos);
 801ffac:	88fa      	ldrh	r2, [r7, #6]
 801ffae:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 801ffb2:	1ad2      	subs	r2, r2, r3
 801ffb4:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 801ffb8:	4293      	cmp	r3, r2
 801ffba:	bfa8      	it	ge
 801ffbc:	4613      	movge	r3, r2
 801ffbe:	847b      	strh	r3, [r7, #34]	@ 0x22
      seg = last_unsent;
 801ffc0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801ffc2:	657b      	str	r3, [r7, #84]	@ 0x54

      /* Create a pbuf with a copy or reference to seglen bytes. We
       * can use PBUF_RAW here since the data appears in the middle of
       * a segment. A header will never be prepended. */
      if (apiflags & TCP_WRITE_FLAG_COPY) {
 801ffc4:	797b      	ldrb	r3, [r7, #5]
 801ffc6:	f003 0301 	and.w	r3, r3, #1
 801ffca:	2b00      	cmp	r3, #0
 801ffcc:	d02b      	beq.n	8020026 <tcp_write+0x276>
        /* Data is copied */
        if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
 801ffce:	f107 0016 	add.w	r0, r7, #22
 801ffd2:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 801ffd6:	8c79      	ldrh	r1, [r7, #34]	@ 0x22
 801ffd8:	2301      	movs	r3, #1
 801ffda:	9302      	str	r3, [sp, #8]
 801ffdc:	797b      	ldrb	r3, [r7, #5]
 801ffde:	9301      	str	r3, [sp, #4]
 801ffe0:	68fb      	ldr	r3, [r7, #12]
 801ffe2:	9300      	str	r3, [sp, #0]
 801ffe4:	4603      	mov	r3, r0
 801ffe6:	2000      	movs	r0, #0
 801ffe8:	f7ff fdee 	bl	801fbc8 <tcp_pbuf_prealloc>
 801ffec:	63f8      	str	r0, [r7, #60]	@ 0x3c
 801ffee:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fff0:	2b00      	cmp	r3, #0
 801fff2:	f000 825a 	beq.w	80204aa <tcp_write+0x6fa>
                      ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
                       seglen));
          goto memerr;
        }
#if TCP_OVERSIZE_DBGCHECK
        oversize_add = oversize;
 801fff6:	8afb      	ldrh	r3, [r7, #22]
 801fff8:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
        TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
 801fffc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801fffe:	6858      	ldr	r0, [r3, #4]
 8020000:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020004:	68ba      	ldr	r2, [r7, #8]
 8020006:	4413      	add	r3, r2
 8020008:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 802000a:	4619      	mov	r1, r3
 802000c:	f00a fe2f 	bl	802ac6e <memcpy>
#if TCP_CHECKSUM_ON_COPY
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
        queuelen += pbuf_clen(concat_p);
 8020010:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 8020012:	f7fb f9b9 	bl	801b388 <pbuf_clen>
 8020016:	4603      	mov	r3, r0
 8020018:	461a      	mov	r2, r3
 802001a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 802001e:	4413      	add	r3, r2
 8020020:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
 8020024:	e055      	b.n	80200d2 <tcp_write+0x322>
      } else {
        /* Data is not copied */
        /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
        struct pbuf *p;
        for (p = last_unsent->p; p->next != NULL; p = p->next);
 8020026:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020028:	685b      	ldr	r3, [r3, #4]
 802002a:	63bb      	str	r3, [r7, #56]	@ 0x38
 802002c:	e002      	b.n	8020034 <tcp_write+0x284>
 802002e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8020030:	681b      	ldr	r3, [r3, #0]
 8020032:	63bb      	str	r3, [r7, #56]	@ 0x38
 8020034:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8020036:	681b      	ldr	r3, [r3, #0]
 8020038:	2b00      	cmp	r3, #0
 802003a:	d1f8      	bne.n	802002e <tcp_write+0x27e>
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 802003c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 802003e:	7b1b      	ldrb	r3, [r3, #12]
 8020040:	f003 03c0 	and.w	r3, r3, #192	@ 0xc0
 8020044:	2b00      	cmp	r3, #0
 8020046:	d129      	bne.n	802009c <tcp_write+0x2ec>
            (const u8_t *)p->payload + p->len == (const u8_t *)arg) {
 8020048:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 802004a:	685b      	ldr	r3, [r3, #4]
 802004c:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 802004e:	8952      	ldrh	r2, [r2, #10]
 8020050:	4413      	add	r3, r2
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 8020052:	68ba      	ldr	r2, [r7, #8]
 8020054:	429a      	cmp	r2, r3
 8020056:	d121      	bne.n	802009c <tcp_write+0x2ec>
          LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
 8020058:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 802005c:	2b00      	cmp	r3, #0
 802005e:	d006      	beq.n	802006e <tcp_write+0x2be>
 8020060:	4b05      	ldr	r3, [pc, #20]	@ (8020078 <tcp_write+0x2c8>)
 8020062:	f240 2231 	movw	r2, #561	@ 0x231
 8020066:	490c      	ldr	r1, [pc, #48]	@ (8020098 <tcp_write+0x2e8>)
 8020068:	4805      	ldr	r0, [pc, #20]	@ (8020080 <tcp_write+0x2d0>)
 802006a:	f00a fb77 	bl	802a75c <iprintf>
          extendlen = seglen;
 802006e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8020070:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
 8020074:	e02d      	b.n	80200d2 <tcp_write+0x322>
 8020076:	bf00      	nop
 8020078:	08030074 	.word	0x08030074
 802007c:	08030214 	.word	0x08030214
 8020080:	080300c8 	.word	0x080300c8
 8020084:	0803022c 	.word	0x0803022c
 8020088:	08030260 	.word	0x08030260
 802008c:	08030278 	.word	0x08030278
 8020090:	080302a8 	.word	0x080302a8
 8020094:	080302c8 	.word	0x080302c8
 8020098:	080302e8 	.word	0x080302e8
        } else {
          if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
 802009c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802009e:	2201      	movs	r2, #1
 80200a0:	4619      	mov	r1, r3
 80200a2:	2000      	movs	r0, #0
 80200a4:	f7fa fdcc 	bl	801ac40 <pbuf_alloc>
 80200a8:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80200aa:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80200ac:	2b00      	cmp	r3, #0
 80200ae:	f000 81fe 	beq.w	80204ae <tcp_write+0x6fe>
            LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                        ("tcp_write: could not allocate memory for zero-copy pbuf\n"));
            goto memerr;
          }
          /* reference the non-volatile payload data */
          ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
 80200b2:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 80200b6:	68ba      	ldr	r2, [r7, #8]
 80200b8:	441a      	add	r2, r3
 80200ba:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80200bc:	605a      	str	r2, [r3, #4]
          queuelen += pbuf_clen(concat_p);
 80200be:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80200c0:	f7fb f962 	bl	801b388 <pbuf_clen>
 80200c4:	4603      	mov	r3, r0
 80200c6:	461a      	mov	r2, r3
 80200c8:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 80200cc:	4413      	add	r3, r2
 80200ce:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
                           &concat_chksum, &concat_chksum_swapped);
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
      }

      pos += seglen;
 80200d2:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 80200d6:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80200d8:	4413      	add	r3, r2
 80200da:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
 80200de:	e0cd      	b.n	802027c <tcp_write+0x4cc>
    }
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
  } else {
#if TCP_OVERSIZE
    LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
 80200e0:	68fb      	ldr	r3, [r7, #12]
 80200e2:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 80200e6:	2b00      	cmp	r3, #0
 80200e8:	f000 80c8 	beq.w	802027c <tcp_write+0x4cc>
 80200ec:	4b72      	ldr	r3, [pc, #456]	@ (80202b8 <tcp_write+0x508>)
 80200ee:	f240 224a 	movw	r2, #586	@ 0x24a
 80200f2:	4972      	ldr	r1, [pc, #456]	@ (80202bc <tcp_write+0x50c>)
 80200f4:	4872      	ldr	r0, [pc, #456]	@ (80202c0 <tcp_write+0x510>)
 80200f6:	f00a fb31 	bl	802a75c <iprintf>
   * Phase 3: Create new segments.
   *
   * The new segments are chained together in the local 'queue'
   * variable, ready to be appended to pcb->unsent.
   */
  while (pos < len) {
 80200fa:	e0bf      	b.n	802027c <tcp_write+0x4cc>
    struct pbuf *p;
    u16_t left = len - pos;
 80200fc:	88fa      	ldrh	r2, [r7, #6]
 80200fe:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020102:	1ad3      	subs	r3, r2, r3
 8020104:	843b      	strh	r3, [r7, #32]
    u16_t max_len = mss_local - optlen;
 8020106:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802010a:	b29b      	uxth	r3, r3
 802010c:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 802010e:	1ad3      	subs	r3, r2, r3
 8020110:	83fb      	strh	r3, [r7, #30]
    u16_t seglen = LWIP_MIN(left, max_len);
 8020112:	8bfa      	ldrh	r2, [r7, #30]
 8020114:	8c3b      	ldrh	r3, [r7, #32]
 8020116:	4293      	cmp	r3, r2
 8020118:	bf28      	it	cs
 802011a:	4613      	movcs	r3, r2
 802011c:	83bb      	strh	r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
    u16_t chksum = 0;
    u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */

    if (apiflags & TCP_WRITE_FLAG_COPY) {
 802011e:	797b      	ldrb	r3, [r7, #5]
 8020120:	f003 0301 	and.w	r3, r3, #1
 8020124:	2b00      	cmp	r3, #0
 8020126:	d036      	beq.n	8020196 <tcp_write+0x3e6>
      /* If copy is set, memory should be allocated and data copied
       * into pbuf */
      if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
 8020128:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802012c:	b29a      	uxth	r2, r3
 802012e:	8bbb      	ldrh	r3, [r7, #28]
 8020130:	4413      	add	r3, r2
 8020132:	b299      	uxth	r1, r3
 8020134:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8020136:	2b00      	cmp	r3, #0
 8020138:	bf0c      	ite	eq
 802013a:	2301      	moveq	r3, #1
 802013c:	2300      	movne	r3, #0
 802013e:	b2db      	uxtb	r3, r3
 8020140:	f107 0016 	add.w	r0, r7, #22
 8020144:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 8020146:	9302      	str	r3, [sp, #8]
 8020148:	797b      	ldrb	r3, [r7, #5]
 802014a:	9301      	str	r3, [sp, #4]
 802014c:	68fb      	ldr	r3, [r7, #12]
 802014e:	9300      	str	r3, [sp, #0]
 8020150:	4603      	mov	r3, r0
 8020152:	2036      	movs	r0, #54	@ 0x36
 8020154:	f7ff fd38 	bl	801fbc8 <tcp_pbuf_prealloc>
 8020158:	6378      	str	r0, [r7, #52]	@ 0x34
 802015a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802015c:	2b00      	cmp	r3, #0
 802015e:	f000 81a8 	beq.w	80204b2 <tcp_write+0x702>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
        goto memerr;
      }
      LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
 8020162:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8020164:	895b      	ldrh	r3, [r3, #10]
 8020166:	8bba      	ldrh	r2, [r7, #28]
 8020168:	429a      	cmp	r2, r3
 802016a:	d906      	bls.n	802017a <tcp_write+0x3ca>
 802016c:	4b52      	ldr	r3, [pc, #328]	@ (80202b8 <tcp_write+0x508>)
 802016e:	f240 2266 	movw	r2, #614	@ 0x266
 8020172:	4954      	ldr	r1, [pc, #336]	@ (80202c4 <tcp_write+0x514>)
 8020174:	4852      	ldr	r0, [pc, #328]	@ (80202c0 <tcp_write+0x510>)
 8020176:	f00a faf1 	bl	802a75c <iprintf>
                  (p->len >= seglen));
      TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
 802017a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802017c:	685a      	ldr	r2, [r3, #4]
 802017e:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8020182:	18d0      	adds	r0, r2, r3
 8020184:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020188:	68ba      	ldr	r2, [r7, #8]
 802018a:	4413      	add	r3, r2
 802018c:	8bba      	ldrh	r2, [r7, #28]
 802018e:	4619      	mov	r1, r3
 8020190:	f00a fd6d 	bl	802ac6e <memcpy>
 8020194:	e02f      	b.n	80201f6 <tcp_write+0x446>
       * sent out on the link (as it has to be ACKed by the remote
       * party) we can safely use PBUF_ROM instead of PBUF_REF here.
       */
      struct pbuf *p2;
#if TCP_OVERSIZE
      LWIP_ASSERT("oversize == 0", oversize == 0);
 8020196:	8afb      	ldrh	r3, [r7, #22]
 8020198:	2b00      	cmp	r3, #0
 802019a:	d006      	beq.n	80201aa <tcp_write+0x3fa>
 802019c:	4b46      	ldr	r3, [pc, #280]	@ (80202b8 <tcp_write+0x508>)
 802019e:	f240 2271 	movw	r2, #625	@ 0x271
 80201a2:	4949      	ldr	r1, [pc, #292]	@ (80202c8 <tcp_write+0x518>)
 80201a4:	4846      	ldr	r0, [pc, #280]	@ (80202c0 <tcp_write+0x510>)
 80201a6:	f00a fad9 	bl	802a75c <iprintf>
#endif /* TCP_OVERSIZE */
      if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
 80201aa:	8bbb      	ldrh	r3, [r7, #28]
 80201ac:	2201      	movs	r2, #1
 80201ae:	4619      	mov	r1, r3
 80201b0:	2036      	movs	r0, #54	@ 0x36
 80201b2:	f7fa fd45 	bl	801ac40 <pbuf_alloc>
 80201b6:	61b8      	str	r0, [r7, #24]
 80201b8:	69bb      	ldr	r3, [r7, #24]
 80201ba:	2b00      	cmp	r3, #0
 80201bc:	f000 817b 	beq.w	80204b6 <tcp_write+0x706>
        chksum_swapped = 1;
        chksum = SWAP_BYTES_IN_WORD(chksum);
      }
#endif /* TCP_CHECKSUM_ON_COPY */
      /* reference the non-volatile payload data */
      ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
 80201c0:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 80201c4:	68ba      	ldr	r2, [r7, #8]
 80201c6:	441a      	add	r2, r3
 80201c8:	69bb      	ldr	r3, [r7, #24]
 80201ca:	605a      	str	r2, [r3, #4]

      /* Second, allocate a pbuf for the headers. */
      if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 80201cc:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 80201d0:	b29b      	uxth	r3, r3
 80201d2:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80201d6:	4619      	mov	r1, r3
 80201d8:	2036      	movs	r0, #54	@ 0x36
 80201da:	f7fa fd31 	bl	801ac40 <pbuf_alloc>
 80201de:	6378      	str	r0, [r7, #52]	@ 0x34
 80201e0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80201e2:	2b00      	cmp	r3, #0
 80201e4:	d103      	bne.n	80201ee <tcp_write+0x43e>
        /* If allocation fails, we have to deallocate the data pbuf as
         * well. */
        pbuf_free(p2);
 80201e6:	69b8      	ldr	r0, [r7, #24]
 80201e8:	f7fb f840 	bl	801b26c <pbuf_free>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
        goto memerr;
 80201ec:	e166      	b.n	80204bc <tcp_write+0x70c>
      }
      /* Concatenate the headers and data pbufs together. */
      pbuf_cat(p/*header*/, p2/*data*/);
 80201ee:	69b9      	ldr	r1, [r7, #24]
 80201f0:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80201f2:	f7fb f909 	bl	801b408 <pbuf_cat>
    }

    queuelen += pbuf_clen(p);
 80201f6:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80201f8:	f7fb f8c6 	bl	801b388 <pbuf_clen>
 80201fc:	4603      	mov	r3, r0
 80201fe:	461a      	mov	r2, r3
 8020200:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 8020204:	4413      	add	r3, r2
 8020206:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48

    /* Now that there are more segments queued, we check again if the
     * length of the queue exceeds the configured maximum or
     * overflows. */
    if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
 802020a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 802020e:	2b10      	cmp	r3, #16
 8020210:	d903      	bls.n	802021a <tcp_write+0x46a>
      LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
                  queuelen, (int)TCP_SND_QUEUELEN));
      pbuf_free(p);
 8020212:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8020214:	f7fb f82a 	bl	801b26c <pbuf_free>
      goto memerr;
 8020218:	e150      	b.n	80204bc <tcp_write+0x70c>
    }

    if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
 802021a:	68fb      	ldr	r3, [r7, #12]
 802021c:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 802021e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020222:	441a      	add	r2, r3
 8020224:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8020228:	9300      	str	r3, [sp, #0]
 802022a:	4613      	mov	r3, r2
 802022c:	2200      	movs	r2, #0
 802022e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8020230:	68f8      	ldr	r0, [r7, #12]
 8020232:	f7ff fc29 	bl	801fa88 <tcp_create_segment>
 8020236:	6578      	str	r0, [r7, #84]	@ 0x54
 8020238:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802023a:	2b00      	cmp	r3, #0
 802023c:	f000 813d 	beq.w	80204ba <tcp_write+0x70a>
      goto memerr;
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = oversize;
 8020240:	8afa      	ldrh	r2, [r7, #22]
 8020242:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8020244:	815a      	strh	r2, [r3, #10]
    seg->chksum_swapped = chksum_swapped;
    seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

    /* first segment of to-be-queued data? */
    if (queue == NULL) {
 8020246:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8020248:	2b00      	cmp	r3, #0
 802024a:	d102      	bne.n	8020252 <tcp_write+0x4a2>
      queue = seg;
 802024c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802024e:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8020250:	e00c      	b.n	802026c <tcp_write+0x4bc>
    } else {
      /* Attach the segment to the end of the queued segments */
      LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
 8020252:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8020254:	2b00      	cmp	r3, #0
 8020256:	d106      	bne.n	8020266 <tcp_write+0x4b6>
 8020258:	4b17      	ldr	r3, [pc, #92]	@ (80202b8 <tcp_write+0x508>)
 802025a:	f240 22ab 	movw	r2, #683	@ 0x2ab
 802025e:	491b      	ldr	r1, [pc, #108]	@ (80202cc <tcp_write+0x51c>)
 8020260:	4817      	ldr	r0, [pc, #92]	@ (80202c0 <tcp_write+0x510>)
 8020262:	f00a fa7b 	bl	802a75c <iprintf>
      prev_seg->next = seg;
 8020266:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8020268:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 802026a:	601a      	str	r2, [r3, #0]
    }
    /* remember last segment of to-be-queued data for next iteration */
    prev_seg = seg;
 802026c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802026e:	653b      	str	r3, [r7, #80]	@ 0x50

    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
                lwip_ntohl(seg->tcphdr->seqno),
                lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));

    pos += seglen;
 8020270:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020274:	8bbb      	ldrh	r3, [r7, #28]
 8020276:	4413      	add	r3, r2
 8020278:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  while (pos < len) {
 802027c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020280:	88fb      	ldrh	r3, [r7, #6]
 8020282:	429a      	cmp	r2, r3
 8020284:	f4ff af3a 	bcc.w	80200fc <tcp_write+0x34c>
  /*
   * All three segmentation phases were successful. We can commit the
   * transaction.
   */
#if TCP_OVERSIZE_DBGCHECK
  if ((last_unsent != NULL) && (oversize_add != 0)) {
 8020288:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802028a:	2b00      	cmp	r3, #0
 802028c:	d00b      	beq.n	80202a6 <tcp_write+0x4f6>
 802028e:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 8020292:	2b00      	cmp	r3, #0
 8020294:	d007      	beq.n	80202a6 <tcp_write+0x4f6>
    last_unsent->oversize_left += oversize_add;
 8020296:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020298:	895a      	ldrh	r2, [r3, #10]
 802029a:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 802029e:	4413      	add	r3, r2
 80202a0:	b29a      	uxth	r2, r3
 80202a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80202a4:	815a      	strh	r2, [r3, #10]
  /*
   * Phase 1: If data has been added to the preallocated tail of
   * last_unsent, we update the length fields of the pbuf chain.
   */
#if TCP_OVERSIZE
  if (oversize_used > 0) {
 80202a6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80202aa:	2b00      	cmp	r3, #0
 80202ac:	d052      	beq.n	8020354 <tcp_write+0x5a4>
    struct pbuf *p;
    /* Bump tot_len of whole chain, len of tail */
    for (p = last_unsent->p; p; p = p->next) {
 80202ae:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80202b0:	685b      	ldr	r3, [r3, #4]
 80202b2:	633b      	str	r3, [r7, #48]	@ 0x30
 80202b4:	e02e      	b.n	8020314 <tcp_write+0x564>
 80202b6:	bf00      	nop
 80202b8:	08030074 	.word	0x08030074
 80202bc:	08030314 	.word	0x08030314
 80202c0:	080300c8 	.word	0x080300c8
 80202c4:	08030344 	.word	0x08030344
 80202c8:	08030384 	.word	0x08030384
 80202cc:	08030394 	.word	0x08030394
      p->tot_len += oversize_used;
 80202d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80202d2:	891a      	ldrh	r2, [r3, #8]
 80202d4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80202d8:	4413      	add	r3, r2
 80202da:	b29a      	uxth	r2, r3
 80202dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80202de:	811a      	strh	r2, [r3, #8]
      if (p->next == NULL) {
 80202e0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80202e2:	681b      	ldr	r3, [r3, #0]
 80202e4:	2b00      	cmp	r3, #0
 80202e6:	d112      	bne.n	802030e <tcp_write+0x55e>
        TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
 80202e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80202ea:	685b      	ldr	r3, [r3, #4]
 80202ec:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80202ee:	8952      	ldrh	r2, [r2, #10]
 80202f0:	4413      	add	r3, r2
 80202f2:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80202f6:	68b9      	ldr	r1, [r7, #8]
 80202f8:	4618      	mov	r0, r3
 80202fa:	f00a fcb8 	bl	802ac6e <memcpy>
        p->len += oversize_used;
 80202fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020300:	895a      	ldrh	r2, [r3, #10]
 8020302:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8020306:	4413      	add	r3, r2
 8020308:	b29a      	uxth	r2, r3
 802030a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802030c:	815a      	strh	r2, [r3, #10]
    for (p = last_unsent->p; p; p = p->next) {
 802030e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020310:	681b      	ldr	r3, [r3, #0]
 8020312:	633b      	str	r3, [r7, #48]	@ 0x30
 8020314:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020316:	2b00      	cmp	r3, #0
 8020318:	d1da      	bne.n	80202d0 <tcp_write+0x520>
      }
    }
    last_unsent->len += oversize_used;
 802031a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802031c:	891a      	ldrh	r2, [r3, #8]
 802031e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8020322:	4413      	add	r3, r2
 8020324:	b29a      	uxth	r2, r3
 8020326:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020328:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
    LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
 802032a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802032c:	895b      	ldrh	r3, [r3, #10]
 802032e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8020332:	429a      	cmp	r2, r3
 8020334:	d906      	bls.n	8020344 <tcp_write+0x594>
 8020336:	4b78      	ldr	r3, [pc, #480]	@ (8020518 <tcp_write+0x768>)
 8020338:	f240 22d3 	movw	r2, #723	@ 0x2d3
 802033c:	4977      	ldr	r1, [pc, #476]	@ (802051c <tcp_write+0x76c>)
 802033e:	4878      	ldr	r0, [pc, #480]	@ (8020520 <tcp_write+0x770>)
 8020340:	f00a fa0c 	bl	802a75c <iprintf>
                last_unsent->oversize_left >= oversize_used);
    last_unsent->oversize_left -= oversize_used;
 8020344:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020346:	895a      	ldrh	r2, [r3, #10]
 8020348:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802034c:	1ad3      	subs	r3, r2, r3
 802034e:	b29a      	uxth	r2, r3
 8020350:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020352:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
  }
  pcb->unsent_oversize = oversize;
 8020354:	8afa      	ldrh	r2, [r7, #22]
 8020356:	68fb      	ldr	r3, [r7, #12]
 8020358:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /*
   * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
   * determined that the last ROM pbuf can be extended to include the new data.
   */
  if (concat_p != NULL) {
 802035c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 802035e:	2b00      	cmp	r3, #0
 8020360:	d018      	beq.n	8020394 <tcp_write+0x5e4>
    LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
 8020362:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020364:	2b00      	cmp	r3, #0
 8020366:	d106      	bne.n	8020376 <tcp_write+0x5c6>
 8020368:	4b6b      	ldr	r3, [pc, #428]	@ (8020518 <tcp_write+0x768>)
 802036a:	f44f 7238 	mov.w	r2, #736	@ 0x2e0
 802036e:	496d      	ldr	r1, [pc, #436]	@ (8020524 <tcp_write+0x774>)
 8020370:	486b      	ldr	r0, [pc, #428]	@ (8020520 <tcp_write+0x770>)
 8020372:	f00a f9f3 	bl	802a75c <iprintf>
                (last_unsent != NULL));
    pbuf_cat(last_unsent->p, concat_p);
 8020376:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020378:	685b      	ldr	r3, [r3, #4]
 802037a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 802037c:	4618      	mov	r0, r3
 802037e:	f7fb f843 	bl	801b408 <pbuf_cat>
    last_unsent->len += concat_p->tot_len;
 8020382:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020384:	891a      	ldrh	r2, [r3, #8]
 8020386:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8020388:	891b      	ldrh	r3, [r3, #8]
 802038a:	4413      	add	r3, r2
 802038c:	b29a      	uxth	r2, r3
 802038e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020390:	811a      	strh	r2, [r3, #8]
 8020392:	e03c      	b.n	802040e <tcp_write+0x65e>
  } else if (extendlen > 0) {
 8020394:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 8020398:	2b00      	cmp	r3, #0
 802039a:	d038      	beq.n	802040e <tcp_write+0x65e>
    struct pbuf *p;
    LWIP_ASSERT("tcp_write: extension of reference requires reference",
 802039c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802039e:	2b00      	cmp	r3, #0
 80203a0:	d003      	beq.n	80203aa <tcp_write+0x5fa>
 80203a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80203a4:	685b      	ldr	r3, [r3, #4]
 80203a6:	2b00      	cmp	r3, #0
 80203a8:	d106      	bne.n	80203b8 <tcp_write+0x608>
 80203aa:	4b5b      	ldr	r3, [pc, #364]	@ (8020518 <tcp_write+0x768>)
 80203ac:	f240 22e6 	movw	r2, #742	@ 0x2e6
 80203b0:	495d      	ldr	r1, [pc, #372]	@ (8020528 <tcp_write+0x778>)
 80203b2:	485b      	ldr	r0, [pc, #364]	@ (8020520 <tcp_write+0x770>)
 80203b4:	f00a f9d2 	bl	802a75c <iprintf>
                last_unsent != NULL && last_unsent->p != NULL);
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 80203b8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80203ba:	685b      	ldr	r3, [r3, #4]
 80203bc:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80203be:	e00a      	b.n	80203d6 <tcp_write+0x626>
      p->tot_len += extendlen;
 80203c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203c2:	891a      	ldrh	r2, [r3, #8]
 80203c4:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80203c8:	4413      	add	r3, r2
 80203ca:	b29a      	uxth	r2, r3
 80203cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203ce:	811a      	strh	r2, [r3, #8]
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 80203d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203d2:	681b      	ldr	r3, [r3, #0]
 80203d4:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80203d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203d8:	681b      	ldr	r3, [r3, #0]
 80203da:	2b00      	cmp	r3, #0
 80203dc:	d1f0      	bne.n	80203c0 <tcp_write+0x610>
    }
    p->tot_len += extendlen;
 80203de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203e0:	891a      	ldrh	r2, [r3, #8]
 80203e2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80203e6:	4413      	add	r3, r2
 80203e8:	b29a      	uxth	r2, r3
 80203ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203ec:	811a      	strh	r2, [r3, #8]
    p->len += extendlen;
 80203ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203f0:	895a      	ldrh	r2, [r3, #10]
 80203f2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80203f6:	4413      	add	r3, r2
 80203f8:	b29a      	uxth	r2, r3
 80203fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80203fc:	815a      	strh	r2, [r3, #10]
    last_unsent->len += extendlen;
 80203fe:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020400:	891a      	ldrh	r2, [r3, #8]
 8020402:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 8020406:	4413      	add	r3, r2
 8020408:	b29a      	uxth	r2, r3
 802040a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802040c:	811a      	strh	r2, [r3, #8]

  /*
   * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
   * is harmless
   */
  if (last_unsent == NULL) {
 802040e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020410:	2b00      	cmp	r3, #0
 8020412:	d103      	bne.n	802041c <tcp_write+0x66c>
    pcb->unsent = queue;
 8020414:	68fb      	ldr	r3, [r7, #12]
 8020416:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8020418:	66da      	str	r2, [r3, #108]	@ 0x6c
 802041a:	e002      	b.n	8020422 <tcp_write+0x672>
  } else {
    last_unsent->next = queue;
 802041c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802041e:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8020420:	601a      	str	r2, [r3, #0]
  }

  /*
   * Finally update the pcb state.
   */
  pcb->snd_lbb += len;
 8020422:	68fb      	ldr	r3, [r7, #12]
 8020424:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 8020426:	88fb      	ldrh	r3, [r7, #6]
 8020428:	441a      	add	r2, r3
 802042a:	68fb      	ldr	r3, [r7, #12]
 802042c:	65da      	str	r2, [r3, #92]	@ 0x5c
  pcb->snd_buf -= len;
 802042e:	68fb      	ldr	r3, [r7, #12]
 8020430:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 8020434:	88fb      	ldrh	r3, [r7, #6]
 8020436:	1ad3      	subs	r3, r2, r3
 8020438:	b29a      	uxth	r2, r3
 802043a:	68fb      	ldr	r3, [r7, #12]
 802043c:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
  pcb->snd_queuelen = queuelen;
 8020440:	68fb      	ldr	r3, [r7, #12]
 8020442:	f8b7 2048 	ldrh.w	r2, [r7, #72]	@ 0x48
 8020446:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
                               pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 802044a:	68fb      	ldr	r3, [r7, #12]
 802044c:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020450:	2b00      	cmp	r3, #0
 8020452:	d00e      	beq.n	8020472 <tcp_write+0x6c2>
    LWIP_ASSERT("tcp_write: valid queue length",
 8020454:	68fb      	ldr	r3, [r7, #12]
 8020456:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020458:	2b00      	cmp	r3, #0
 802045a:	d10a      	bne.n	8020472 <tcp_write+0x6c2>
 802045c:	68fb      	ldr	r3, [r7, #12]
 802045e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020460:	2b00      	cmp	r3, #0
 8020462:	d106      	bne.n	8020472 <tcp_write+0x6c2>
 8020464:	4b2c      	ldr	r3, [pc, #176]	@ (8020518 <tcp_write+0x768>)
 8020466:	f240 3212 	movw	r2, #786	@ 0x312
 802046a:	4930      	ldr	r1, [pc, #192]	@ (802052c <tcp_write+0x77c>)
 802046c:	482c      	ldr	r0, [pc, #176]	@ (8020520 <tcp_write+0x770>)
 802046e:	f00a f975 	bl	802a75c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  /* Set the PSH flag in the last segment that we enqueued. */
  if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
 8020472:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8020474:	2b00      	cmp	r3, #0
 8020476:	d016      	beq.n	80204a6 <tcp_write+0x6f6>
 8020478:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802047a:	691b      	ldr	r3, [r3, #16]
 802047c:	2b00      	cmp	r3, #0
 802047e:	d012      	beq.n	80204a6 <tcp_write+0x6f6>
 8020480:	797b      	ldrb	r3, [r7, #5]
 8020482:	f003 0302 	and.w	r3, r3, #2
 8020486:	2b00      	cmp	r3, #0
 8020488:	d10d      	bne.n	80204a6 <tcp_write+0x6f6>
    TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
 802048a:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802048c:	691b      	ldr	r3, [r3, #16]
 802048e:	899b      	ldrh	r3, [r3, #12]
 8020490:	b29c      	uxth	r4, r3
 8020492:	2008      	movs	r0, #8
 8020494:	f7f9 fa08 	bl	80198a8 <lwip_htons>
 8020498:	4603      	mov	r3, r0
 802049a:	461a      	mov	r2, r3
 802049c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802049e:	691b      	ldr	r3, [r3, #16]
 80204a0:	4322      	orrs	r2, r4
 80204a2:	b292      	uxth	r2, r2
 80204a4:	819a      	strh	r2, [r3, #12]
  }

  return ERR_OK;
 80204a6:	2300      	movs	r3, #0
 80204a8:	e031      	b.n	802050e <tcp_write+0x75e>
          goto memerr;
 80204aa:	bf00      	nop
 80204ac:	e006      	b.n	80204bc <tcp_write+0x70c>
            goto memerr;
 80204ae:	bf00      	nop
 80204b0:	e004      	b.n	80204bc <tcp_write+0x70c>
        goto memerr;
 80204b2:	bf00      	nop
 80204b4:	e002      	b.n	80204bc <tcp_write+0x70c>
        goto memerr;
 80204b6:	bf00      	nop
 80204b8:	e000      	b.n	80204bc <tcp_write+0x70c>
      goto memerr;
 80204ba:	bf00      	nop
memerr:
  tcp_set_flags(pcb, TF_NAGLEMEMERR);
 80204bc:	68fb      	ldr	r3, [r7, #12]
 80204be:	8b5b      	ldrh	r3, [r3, #26]
 80204c0:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80204c4:	b29a      	uxth	r2, r3
 80204c6:	68fb      	ldr	r3, [r7, #12]
 80204c8:	835a      	strh	r2, [r3, #26]
  TCP_STATS_INC(tcp.memerr);

  if (concat_p != NULL) {
 80204ca:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80204cc:	2b00      	cmp	r3, #0
 80204ce:	d002      	beq.n	80204d6 <tcp_write+0x726>
    pbuf_free(concat_p);
 80204d0:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80204d2:	f7fa fecb 	bl	801b26c <pbuf_free>
  }
  if (queue != NULL) {
 80204d6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 80204d8:	2b00      	cmp	r3, #0
 80204da:	d002      	beq.n	80204e2 <tcp_write+0x732>
    tcp_segs_free(queue);
 80204dc:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80204de:	f7fc fb09 	bl	801caf4 <tcp_segs_free>
  }
  if (pcb->snd_queuelen != 0) {
 80204e2:	68fb      	ldr	r3, [r7, #12]
 80204e4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80204e8:	2b00      	cmp	r3, #0
 80204ea:	d00e      	beq.n	802050a <tcp_write+0x75a>
    LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
 80204ec:	68fb      	ldr	r3, [r7, #12]
 80204ee:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80204f0:	2b00      	cmp	r3, #0
 80204f2:	d10a      	bne.n	802050a <tcp_write+0x75a>
 80204f4:	68fb      	ldr	r3, [r7, #12]
 80204f6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80204f8:	2b00      	cmp	r3, #0
 80204fa:	d106      	bne.n	802050a <tcp_write+0x75a>
 80204fc:	4b06      	ldr	r3, [pc, #24]	@ (8020518 <tcp_write+0x768>)
 80204fe:	f240 3227 	movw	r2, #807	@ 0x327
 8020502:	490a      	ldr	r1, [pc, #40]	@ (802052c <tcp_write+0x77c>)
 8020504:	4806      	ldr	r0, [pc, #24]	@ (8020520 <tcp_write+0x770>)
 8020506:	f00a f929 	bl	802a75c <iprintf>
                pcb->unsent != NULL);
  }
  LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
  return ERR_MEM;
 802050a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 802050e:	4618      	mov	r0, r3
 8020510:	3764      	adds	r7, #100	@ 0x64
 8020512:	46bd      	mov	sp, r7
 8020514:	bd90      	pop	{r4, r7, pc}
 8020516:	bf00      	nop
 8020518:	08030074 	.word	0x08030074
 802051c:	080303a8 	.word	0x080303a8
 8020520:	080300c8 	.word	0x080300c8
 8020524:	080303d4 	.word	0x080303d4
 8020528:	0803040c 	.word	0x0803040c
 802052c:	08030444 	.word	0x08030444

08020530 <tcp_split_unsent_seg>:
 * @param pcb the tcp_pcb for which to split the unsent head
 * @param split the amount of payload to remain in the head
 */
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
 8020530:	b590      	push	{r4, r7, lr}
 8020532:	b08b      	sub	sp, #44	@ 0x2c
 8020534:	af02      	add	r7, sp, #8
 8020536:	6078      	str	r0, [r7, #4]
 8020538:	460b      	mov	r3, r1
 802053a:	807b      	strh	r3, [r7, #2]
  struct tcp_seg *seg = NULL, *useg = NULL;
 802053c:	2300      	movs	r3, #0
 802053e:	61bb      	str	r3, [r7, #24]
 8020540:	2300      	movs	r3, #0
 8020542:	617b      	str	r3, [r7, #20]
  struct pbuf *p = NULL;
 8020544:	2300      	movs	r3, #0
 8020546:	613b      	str	r3, [r7, #16]
  u16_t chksum = 0;
  u8_t chksum_swapped = 0;
  struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */

  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
 8020548:	687b      	ldr	r3, [r7, #4]
 802054a:	2b00      	cmp	r3, #0
 802054c:	d106      	bne.n	802055c <tcp_split_unsent_seg+0x2c>
 802054e:	4b97      	ldr	r3, [pc, #604]	@ (80207ac <tcp_split_unsent_seg+0x27c>)
 8020550:	f240 324b 	movw	r2, #843	@ 0x34b
 8020554:	4996      	ldr	r1, [pc, #600]	@ (80207b0 <tcp_split_unsent_seg+0x280>)
 8020556:	4897      	ldr	r0, [pc, #604]	@ (80207b4 <tcp_split_unsent_seg+0x284>)
 8020558:	f00a f900 	bl	802a75c <iprintf>

  useg = pcb->unsent;
 802055c:	687b      	ldr	r3, [r7, #4]
 802055e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020560:	617b      	str	r3, [r7, #20]
  if (useg == NULL) {
 8020562:	697b      	ldr	r3, [r7, #20]
 8020564:	2b00      	cmp	r3, #0
 8020566:	d102      	bne.n	802056e <tcp_split_unsent_seg+0x3e>
    return ERR_MEM;
 8020568:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802056c:	e119      	b.n	80207a2 <tcp_split_unsent_seg+0x272>
  }

  if (split == 0) {
 802056e:	887b      	ldrh	r3, [r7, #2]
 8020570:	2b00      	cmp	r3, #0
 8020572:	d109      	bne.n	8020588 <tcp_split_unsent_seg+0x58>
    LWIP_ASSERT("Can't split segment into length 0", 0);
 8020574:	4b8d      	ldr	r3, [pc, #564]	@ (80207ac <tcp_split_unsent_seg+0x27c>)
 8020576:	f240 3253 	movw	r2, #851	@ 0x353
 802057a:	498f      	ldr	r1, [pc, #572]	@ (80207b8 <tcp_split_unsent_seg+0x288>)
 802057c:	488d      	ldr	r0, [pc, #564]	@ (80207b4 <tcp_split_unsent_seg+0x284>)
 802057e:	f00a f8ed 	bl	802a75c <iprintf>
    return ERR_VAL;
 8020582:	f06f 0305 	mvn.w	r3, #5
 8020586:	e10c      	b.n	80207a2 <tcp_split_unsent_seg+0x272>
  }

  if (useg->len <= split) {
 8020588:	697b      	ldr	r3, [r7, #20]
 802058a:	891b      	ldrh	r3, [r3, #8]
 802058c:	887a      	ldrh	r2, [r7, #2]
 802058e:	429a      	cmp	r2, r3
 8020590:	d301      	bcc.n	8020596 <tcp_split_unsent_seg+0x66>
    return ERR_OK;
 8020592:	2300      	movs	r3, #0
 8020594:	e105      	b.n	80207a2 <tcp_split_unsent_seg+0x272>
  }

  LWIP_ASSERT("split <= mss", split <= pcb->mss);
 8020596:	687b      	ldr	r3, [r7, #4]
 8020598:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802059a:	887a      	ldrh	r2, [r7, #2]
 802059c:	429a      	cmp	r2, r3
 802059e:	d906      	bls.n	80205ae <tcp_split_unsent_seg+0x7e>
 80205a0:	4b82      	ldr	r3, [pc, #520]	@ (80207ac <tcp_split_unsent_seg+0x27c>)
 80205a2:	f240 325b 	movw	r2, #859	@ 0x35b
 80205a6:	4985      	ldr	r1, [pc, #532]	@ (80207bc <tcp_split_unsent_seg+0x28c>)
 80205a8:	4882      	ldr	r0, [pc, #520]	@ (80207b4 <tcp_split_unsent_seg+0x284>)
 80205aa:	f00a f8d7 	bl	802a75c <iprintf>
  LWIP_ASSERT("useg->len > 0", useg->len > 0);
 80205ae:	697b      	ldr	r3, [r7, #20]
 80205b0:	891b      	ldrh	r3, [r3, #8]
 80205b2:	2b00      	cmp	r3, #0
 80205b4:	d106      	bne.n	80205c4 <tcp_split_unsent_seg+0x94>
 80205b6:	4b7d      	ldr	r3, [pc, #500]	@ (80207ac <tcp_split_unsent_seg+0x27c>)
 80205b8:	f44f 7257 	mov.w	r2, #860	@ 0x35c
 80205bc:	4980      	ldr	r1, [pc, #512]	@ (80207c0 <tcp_split_unsent_seg+0x290>)
 80205be:	487d      	ldr	r0, [pc, #500]	@ (80207b4 <tcp_split_unsent_seg+0x284>)
 80205c0:	f00a f8cc 	bl	802a75c <iprintf>
   * to split this packet so we may actually exceed the max value by
   * one!
   */
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));

  optflags = useg->flags;
 80205c4:	697b      	ldr	r3, [r7, #20]
 80205c6:	7b1b      	ldrb	r3, [r3, #12]
 80205c8:	73fb      	strb	r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
  /* Remove since checksum is not stored until after tcp_create_segment() */
  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
  optlen = LWIP_TCP_OPT_LENGTH(optflags);
 80205ca:	7bfb      	ldrb	r3, [r7, #15]
 80205cc:	009b      	lsls	r3, r3, #2
 80205ce:	b2db      	uxtb	r3, r3
 80205d0:	f003 0304 	and.w	r3, r3, #4
 80205d4:	73bb      	strb	r3, [r7, #14]
  remainder = useg->len - split;
 80205d6:	697b      	ldr	r3, [r7, #20]
 80205d8:	891a      	ldrh	r2, [r3, #8]
 80205da:	887b      	ldrh	r3, [r7, #2]
 80205dc:	1ad3      	subs	r3, r2, r3
 80205de:	81bb      	strh	r3, [r7, #12]

  /* Create new pbuf for the remainder of the split */
  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
 80205e0:	7bbb      	ldrb	r3, [r7, #14]
 80205e2:	b29a      	uxth	r2, r3
 80205e4:	89bb      	ldrh	r3, [r7, #12]
 80205e6:	4413      	add	r3, r2
 80205e8:	b29b      	uxth	r3, r3
 80205ea:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80205ee:	4619      	mov	r1, r3
 80205f0:	2036      	movs	r0, #54	@ 0x36
 80205f2:	f7fa fb25 	bl	801ac40 <pbuf_alloc>
 80205f6:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 80205f8:	693b      	ldr	r3, [r7, #16]
 80205fa:	2b00      	cmp	r3, #0
 80205fc:	f000 80ba 	beq.w	8020774 <tcp_split_unsent_seg+0x244>
                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
    goto memerr;
  }

  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
  offset = useg->p->tot_len - useg->len + split;
 8020600:	697b      	ldr	r3, [r7, #20]
 8020602:	685b      	ldr	r3, [r3, #4]
 8020604:	891a      	ldrh	r2, [r3, #8]
 8020606:	697b      	ldr	r3, [r7, #20]
 8020608:	891b      	ldrh	r3, [r3, #8]
 802060a:	1ad3      	subs	r3, r2, r3
 802060c:	b29a      	uxth	r2, r3
 802060e:	887b      	ldrh	r3, [r7, #2]
 8020610:	4413      	add	r3, r2
 8020612:	817b      	strh	r3, [r7, #10]
  /* Copy remainder into new pbuf, headers and options will not be filled out */
  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
 8020614:	697b      	ldr	r3, [r7, #20]
 8020616:	6858      	ldr	r0, [r3, #4]
 8020618:	693b      	ldr	r3, [r7, #16]
 802061a:	685a      	ldr	r2, [r3, #4]
 802061c:	7bbb      	ldrb	r3, [r7, #14]
 802061e:	18d1      	adds	r1, r2, r3
 8020620:	897b      	ldrh	r3, [r7, #10]
 8020622:	89ba      	ldrh	r2, [r7, #12]
 8020624:	f7fb f828 	bl	801b678 <pbuf_copy_partial>
 8020628:	4603      	mov	r3, r0
 802062a:	461a      	mov	r2, r3
 802062c:	89bb      	ldrh	r3, [r7, #12]
 802062e:	4293      	cmp	r3, r2
 8020630:	f040 80a2 	bne.w	8020778 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Options are created when calling tcp_output() */

  /* Migrate flags from original segment */
  split_flags = TCPH_FLAGS(useg->tcphdr);
 8020634:	697b      	ldr	r3, [r7, #20]
 8020636:	691b      	ldr	r3, [r3, #16]
 8020638:	899b      	ldrh	r3, [r3, #12]
 802063a:	b29b      	uxth	r3, r3
 802063c:	4618      	mov	r0, r3
 802063e:	f7f9 f933 	bl	80198a8 <lwip_htons>
 8020642:	4603      	mov	r3, r0
 8020644:	b2db      	uxtb	r3, r3
 8020646:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 802064a:	77fb      	strb	r3, [r7, #31]
  remainder_flags = 0; /* ACK added in tcp_output() */
 802064c:	2300      	movs	r3, #0
 802064e:	77bb      	strb	r3, [r7, #30]

  if (split_flags & TCP_PSH) {
 8020650:	7ffb      	ldrb	r3, [r7, #31]
 8020652:	f003 0308 	and.w	r3, r3, #8
 8020656:	2b00      	cmp	r3, #0
 8020658:	d007      	beq.n	802066a <tcp_split_unsent_seg+0x13a>
    split_flags &= ~TCP_PSH;
 802065a:	7ffb      	ldrb	r3, [r7, #31]
 802065c:	f023 0308 	bic.w	r3, r3, #8
 8020660:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_PSH;
 8020662:	7fbb      	ldrb	r3, [r7, #30]
 8020664:	f043 0308 	orr.w	r3, r3, #8
 8020668:	77bb      	strb	r3, [r7, #30]
  }
  if (split_flags & TCP_FIN) {
 802066a:	7ffb      	ldrb	r3, [r7, #31]
 802066c:	f003 0301 	and.w	r3, r3, #1
 8020670:	2b00      	cmp	r3, #0
 8020672:	d007      	beq.n	8020684 <tcp_split_unsent_seg+0x154>
    split_flags &= ~TCP_FIN;
 8020674:	7ffb      	ldrb	r3, [r7, #31]
 8020676:	f023 0301 	bic.w	r3, r3, #1
 802067a:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_FIN;
 802067c:	7fbb      	ldrb	r3, [r7, #30]
 802067e:	f043 0301 	orr.w	r3, r3, #1
 8020682:	77bb      	strb	r3, [r7, #30]
  }
  /* SYN should be left on split, RST should not be present with data */

  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
 8020684:	697b      	ldr	r3, [r7, #20]
 8020686:	691b      	ldr	r3, [r3, #16]
 8020688:	685b      	ldr	r3, [r3, #4]
 802068a:	4618      	mov	r0, r3
 802068c:	f7f9 f921 	bl	80198d2 <lwip_htonl>
 8020690:	4602      	mov	r2, r0
 8020692:	887b      	ldrh	r3, [r7, #2]
 8020694:	18d1      	adds	r1, r2, r3
 8020696:	7fba      	ldrb	r2, [r7, #30]
 8020698:	7bfb      	ldrb	r3, [r7, #15]
 802069a:	9300      	str	r3, [sp, #0]
 802069c:	460b      	mov	r3, r1
 802069e:	6939      	ldr	r1, [r7, #16]
 80206a0:	6878      	ldr	r0, [r7, #4]
 80206a2:	f7ff f9f1 	bl	801fa88 <tcp_create_segment>
 80206a6:	61b8      	str	r0, [r7, #24]
  if (seg == NULL) {
 80206a8:	69bb      	ldr	r3, [r7, #24]
 80206aa:	2b00      	cmp	r3, #0
 80206ac:	d066      	beq.n	802077c <tcp_split_unsent_seg+0x24c>
  seg->chksum_swapped = chksum_swapped;
  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Remove this segment from the queue since trimming it may free pbufs */
  pcb->snd_queuelen -= pbuf_clen(useg->p);
 80206ae:	697b      	ldr	r3, [r7, #20]
 80206b0:	685b      	ldr	r3, [r3, #4]
 80206b2:	4618      	mov	r0, r3
 80206b4:	f7fa fe68 	bl	801b388 <pbuf_clen>
 80206b8:	4603      	mov	r3, r0
 80206ba:	461a      	mov	r2, r3
 80206bc:	687b      	ldr	r3, [r7, #4]
 80206be:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80206c2:	1a9b      	subs	r3, r3, r2
 80206c4:	b29a      	uxth	r2, r3
 80206c6:	687b      	ldr	r3, [r7, #4]
 80206c8:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
  successfully because we are modifying the original segment */
  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
 80206cc:	697b      	ldr	r3, [r7, #20]
 80206ce:	6858      	ldr	r0, [r3, #4]
 80206d0:	697b      	ldr	r3, [r7, #20]
 80206d2:	685b      	ldr	r3, [r3, #4]
 80206d4:	891a      	ldrh	r2, [r3, #8]
 80206d6:	89bb      	ldrh	r3, [r7, #12]
 80206d8:	1ad3      	subs	r3, r2, r3
 80206da:	b29b      	uxth	r3, r3
 80206dc:	4619      	mov	r1, r3
 80206de:	f7fa fc0f 	bl	801af00 <pbuf_realloc>
  useg->len -= remainder;
 80206e2:	697b      	ldr	r3, [r7, #20]
 80206e4:	891a      	ldrh	r2, [r3, #8]
 80206e6:	89bb      	ldrh	r3, [r7, #12]
 80206e8:	1ad3      	subs	r3, r2, r3
 80206ea:	b29a      	uxth	r2, r3
 80206ec:	697b      	ldr	r3, [r7, #20]
 80206ee:	811a      	strh	r2, [r3, #8]
  TCPH_SET_FLAG(useg->tcphdr, split_flags);
 80206f0:	697b      	ldr	r3, [r7, #20]
 80206f2:	691b      	ldr	r3, [r3, #16]
 80206f4:	899b      	ldrh	r3, [r3, #12]
 80206f6:	b29c      	uxth	r4, r3
 80206f8:	7ffb      	ldrb	r3, [r7, #31]
 80206fa:	b29b      	uxth	r3, r3
 80206fc:	4618      	mov	r0, r3
 80206fe:	f7f9 f8d3 	bl	80198a8 <lwip_htons>
 8020702:	4603      	mov	r3, r0
 8020704:	461a      	mov	r2, r3
 8020706:	697b      	ldr	r3, [r7, #20]
 8020708:	691b      	ldr	r3, [r3, #16]
 802070a:	4322      	orrs	r2, r4
 802070c:	b292      	uxth	r2, r2
 802070e:	819a      	strh	r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
  useg->oversize_left = 0;
 8020710:	697b      	ldr	r3, [r7, #20]
 8020712:	2200      	movs	r2, #0
 8020714:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */

  /* Add back to the queue with new trimmed pbuf */
  pcb->snd_queuelen += pbuf_clen(useg->p);
 8020716:	697b      	ldr	r3, [r7, #20]
 8020718:	685b      	ldr	r3, [r3, #4]
 802071a:	4618      	mov	r0, r3
 802071c:	f7fa fe34 	bl	801b388 <pbuf_clen>
 8020720:	4603      	mov	r3, r0
 8020722:	461a      	mov	r2, r3
 8020724:	687b      	ldr	r3, [r7, #4]
 8020726:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 802072a:	4413      	add	r3, r2
 802072c:	b29a      	uxth	r2, r3
 802072e:	687b      	ldr	r3, [r7, #4]
 8020730:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Update number of segments on the queues. Note that length now may
   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
   * because the total amount of data is constant when packet is split */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 8020734:	69bb      	ldr	r3, [r7, #24]
 8020736:	685b      	ldr	r3, [r3, #4]
 8020738:	4618      	mov	r0, r3
 802073a:	f7fa fe25 	bl	801b388 <pbuf_clen>
 802073e:	4603      	mov	r3, r0
 8020740:	461a      	mov	r2, r3
 8020742:	687b      	ldr	r3, [r7, #4]
 8020744:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020748:	4413      	add	r3, r2
 802074a:	b29a      	uxth	r2, r3
 802074c:	687b      	ldr	r3, [r7, #4]
 802074e:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Finally insert remainder into queue after split (which stays head) */
  seg->next = useg->next;
 8020752:	697b      	ldr	r3, [r7, #20]
 8020754:	681a      	ldr	r2, [r3, #0]
 8020756:	69bb      	ldr	r3, [r7, #24]
 8020758:	601a      	str	r2, [r3, #0]
  useg->next = seg;
 802075a:	697b      	ldr	r3, [r7, #20]
 802075c:	69ba      	ldr	r2, [r7, #24]
 802075e:	601a      	str	r2, [r3, #0]

#if TCP_OVERSIZE
  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
   * because the remainder is always sized to the exact remaining amount */
  if (seg->next == NULL) {
 8020760:	69bb      	ldr	r3, [r7, #24]
 8020762:	681b      	ldr	r3, [r3, #0]
 8020764:	2b00      	cmp	r3, #0
 8020766:	d103      	bne.n	8020770 <tcp_split_unsent_seg+0x240>
    pcb->unsent_oversize = 0;
 8020768:	687b      	ldr	r3, [r7, #4]
 802076a:	2200      	movs	r2, #0
 802076c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  return ERR_OK;
 8020770:	2300      	movs	r3, #0
 8020772:	e016      	b.n	80207a2 <tcp_split_unsent_seg+0x272>
    goto memerr;
 8020774:	bf00      	nop
 8020776:	e002      	b.n	802077e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 8020778:	bf00      	nop
 802077a:	e000      	b.n	802077e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 802077c:	bf00      	nop
memerr:
  TCP_STATS_INC(tcp.memerr);

  LWIP_ASSERT("seg == NULL", seg == NULL);
 802077e:	69bb      	ldr	r3, [r7, #24]
 8020780:	2b00      	cmp	r3, #0
 8020782:	d006      	beq.n	8020792 <tcp_split_unsent_seg+0x262>
 8020784:	4b09      	ldr	r3, [pc, #36]	@ (80207ac <tcp_split_unsent_seg+0x27c>)
 8020786:	f44f 7276 	mov.w	r2, #984	@ 0x3d8
 802078a:	490e      	ldr	r1, [pc, #56]	@ (80207c4 <tcp_split_unsent_seg+0x294>)
 802078c:	4809      	ldr	r0, [pc, #36]	@ (80207b4 <tcp_split_unsent_seg+0x284>)
 802078e:	f009 ffe5 	bl	802a75c <iprintf>
  if (p != NULL) {
 8020792:	693b      	ldr	r3, [r7, #16]
 8020794:	2b00      	cmp	r3, #0
 8020796:	d002      	beq.n	802079e <tcp_split_unsent_seg+0x26e>
    pbuf_free(p);
 8020798:	6938      	ldr	r0, [r7, #16]
 802079a:	f7fa fd67 	bl	801b26c <pbuf_free>
  }

  return ERR_MEM;
 802079e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80207a2:	4618      	mov	r0, r3
 80207a4:	3724      	adds	r7, #36	@ 0x24
 80207a6:	46bd      	mov	sp, r7
 80207a8:	bd90      	pop	{r4, r7, pc}
 80207aa:	bf00      	nop
 80207ac:	08030074 	.word	0x08030074
 80207b0:	08030464 	.word	0x08030464
 80207b4:	080300c8 	.word	0x080300c8
 80207b8:	08030488 	.word	0x08030488
 80207bc:	080304ac 	.word	0x080304ac
 80207c0:	080304bc 	.word	0x080304bc
 80207c4:	080304cc 	.word	0x080304cc

080207c8 <tcp_send_fin>:
 * @param pcb the tcp_pcb over which to send a segment
 * @return ERR_OK if sent, another err_t otherwise
 */
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
 80207c8:	b590      	push	{r4, r7, lr}
 80207ca:	b085      	sub	sp, #20
 80207cc:	af00      	add	r7, sp, #0
 80207ce:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
 80207d0:	687b      	ldr	r3, [r7, #4]
 80207d2:	2b00      	cmp	r3, #0
 80207d4:	d106      	bne.n	80207e4 <tcp_send_fin+0x1c>
 80207d6:	4b21      	ldr	r3, [pc, #132]	@ (802085c <tcp_send_fin+0x94>)
 80207d8:	f240 32eb 	movw	r2, #1003	@ 0x3eb
 80207dc:	4920      	ldr	r1, [pc, #128]	@ (8020860 <tcp_send_fin+0x98>)
 80207de:	4821      	ldr	r0, [pc, #132]	@ (8020864 <tcp_send_fin+0x9c>)
 80207e0:	f009 ffbc 	bl	802a75c <iprintf>

  /* first, try to add the fin to the last unsent segment */
  if (pcb->unsent != NULL) {
 80207e4:	687b      	ldr	r3, [r7, #4]
 80207e6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80207e8:	2b00      	cmp	r3, #0
 80207ea:	d02e      	beq.n	802084a <tcp_send_fin+0x82>
    struct tcp_seg *last_unsent;
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 80207ec:	687b      	ldr	r3, [r7, #4]
 80207ee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80207f0:	60fb      	str	r3, [r7, #12]
 80207f2:	e002      	b.n	80207fa <tcp_send_fin+0x32>
         last_unsent = last_unsent->next);
 80207f4:	68fb      	ldr	r3, [r7, #12]
 80207f6:	681b      	ldr	r3, [r3, #0]
 80207f8:	60fb      	str	r3, [r7, #12]
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 80207fa:	68fb      	ldr	r3, [r7, #12]
 80207fc:	681b      	ldr	r3, [r3, #0]
 80207fe:	2b00      	cmp	r3, #0
 8020800:	d1f8      	bne.n	80207f4 <tcp_send_fin+0x2c>

    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
 8020802:	68fb      	ldr	r3, [r7, #12]
 8020804:	691b      	ldr	r3, [r3, #16]
 8020806:	899b      	ldrh	r3, [r3, #12]
 8020808:	b29b      	uxth	r3, r3
 802080a:	4618      	mov	r0, r3
 802080c:	f7f9 f84c 	bl	80198a8 <lwip_htons>
 8020810:	4603      	mov	r3, r0
 8020812:	b2db      	uxtb	r3, r3
 8020814:	f003 0307 	and.w	r3, r3, #7
 8020818:	2b00      	cmp	r3, #0
 802081a:	d116      	bne.n	802084a <tcp_send_fin+0x82>
      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
 802081c:	68fb      	ldr	r3, [r7, #12]
 802081e:	691b      	ldr	r3, [r3, #16]
 8020820:	899b      	ldrh	r3, [r3, #12]
 8020822:	b29c      	uxth	r4, r3
 8020824:	2001      	movs	r0, #1
 8020826:	f7f9 f83f 	bl	80198a8 <lwip_htons>
 802082a:	4603      	mov	r3, r0
 802082c:	461a      	mov	r2, r3
 802082e:	68fb      	ldr	r3, [r7, #12]
 8020830:	691b      	ldr	r3, [r3, #16]
 8020832:	4322      	orrs	r2, r4
 8020834:	b292      	uxth	r2, r2
 8020836:	819a      	strh	r2, [r3, #12]
      tcp_set_flags(pcb, TF_FIN);
 8020838:	687b      	ldr	r3, [r7, #4]
 802083a:	8b5b      	ldrh	r3, [r3, #26]
 802083c:	f043 0320 	orr.w	r3, r3, #32
 8020840:	b29a      	uxth	r2, r3
 8020842:	687b      	ldr	r3, [r7, #4]
 8020844:	835a      	strh	r2, [r3, #26]
      return ERR_OK;
 8020846:	2300      	movs	r3, #0
 8020848:	e004      	b.n	8020854 <tcp_send_fin+0x8c>
    }
  }
  /* no data, no length, flags, copy=1, no optdata */
  return tcp_enqueue_flags(pcb, TCP_FIN);
 802084a:	2101      	movs	r1, #1
 802084c:	6878      	ldr	r0, [r7, #4]
 802084e:	f000 f80b 	bl	8020868 <tcp_enqueue_flags>
 8020852:	4603      	mov	r3, r0
}
 8020854:	4618      	mov	r0, r3
 8020856:	3714      	adds	r7, #20
 8020858:	46bd      	mov	sp, r7
 802085a:	bd90      	pop	{r4, r7, pc}
 802085c:	08030074 	.word	0x08030074
 8020860:	080304d8 	.word	0x080304d8
 8020864:	080300c8 	.word	0x080300c8

08020868 <tcp_enqueue_flags>:
 * @param pcb Protocol control block for the TCP connection.
 * @param flags TCP header flags to set in the outgoing segment.
 */
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
 8020868:	b580      	push	{r7, lr}
 802086a:	b088      	sub	sp, #32
 802086c:	af02      	add	r7, sp, #8
 802086e:	6078      	str	r0, [r7, #4]
 8020870:	460b      	mov	r3, r1
 8020872:	70fb      	strb	r3, [r7, #3]
  struct pbuf *p;
  struct tcp_seg *seg;
  u8_t optflags = 0;
 8020874:	2300      	movs	r3, #0
 8020876:	75fb      	strb	r3, [r7, #23]
  u8_t optlen = 0;
 8020878:	2300      	movs	r3, #0
 802087a:	75bb      	strb	r3, [r7, #22]

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));

  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
 802087c:	78fb      	ldrb	r3, [r7, #3]
 802087e:	f003 0303 	and.w	r3, r3, #3
 8020882:	2b00      	cmp	r3, #0
 8020884:	d106      	bne.n	8020894 <tcp_enqueue_flags+0x2c>
 8020886:	4b67      	ldr	r3, [pc, #412]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 8020888:	f240 4211 	movw	r2, #1041	@ 0x411
 802088c:	4966      	ldr	r1, [pc, #408]	@ (8020a28 <tcp_enqueue_flags+0x1c0>)
 802088e:	4867      	ldr	r0, [pc, #412]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 8020890:	f009 ff64 	bl	802a75c <iprintf>
              (flags & (TCP_SYN | TCP_FIN)) != 0);
  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
 8020894:	687b      	ldr	r3, [r7, #4]
 8020896:	2b00      	cmp	r3, #0
 8020898:	d106      	bne.n	80208a8 <tcp_enqueue_flags+0x40>
 802089a:	4b62      	ldr	r3, [pc, #392]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 802089c:	f240 4213 	movw	r2, #1043	@ 0x413
 80208a0:	4963      	ldr	r1, [pc, #396]	@ (8020a30 <tcp_enqueue_flags+0x1c8>)
 80208a2:	4862      	ldr	r0, [pc, #392]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 80208a4:	f009 ff5a 	bl	802a75c <iprintf>

  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */

  /* Get options for this segment. This is a special case since this is the
     only place where a SYN can be sent. */
  if (flags & TCP_SYN) {
 80208a8:	78fb      	ldrb	r3, [r7, #3]
 80208aa:	f003 0302 	and.w	r3, r3, #2
 80208ae:	2b00      	cmp	r3, #0
 80208b0:	d001      	beq.n	80208b6 <tcp_enqueue_flags+0x4e>
    optflags = TF_SEG_OPTS_MSS;
 80208b2:	2301      	movs	r3, #1
 80208b4:	75fb      	strb	r3, [r7, #23]
    /* Make sure the timestamp option is only included in data segments if we
       agreed about it with the remote host (and in active open SYN segments). */
    optflags |= TF_SEG_OPTS_TS;
  }
#endif /* LWIP_TCP_TIMESTAMPS */
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 80208b6:	7dfb      	ldrb	r3, [r7, #23]
 80208b8:	009b      	lsls	r3, r3, #2
 80208ba:	b2db      	uxtb	r3, r3
 80208bc:	f003 0304 	and.w	r3, r3, #4
 80208c0:	75bb      	strb	r3, [r7, #22]

  /* Allocate pbuf with room for TCP header + options */
  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 80208c2:	7dbb      	ldrb	r3, [r7, #22]
 80208c4:	b29b      	uxth	r3, r3
 80208c6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80208ca:	4619      	mov	r1, r3
 80208cc:	2036      	movs	r0, #54	@ 0x36
 80208ce:	f7fa f9b7 	bl	801ac40 <pbuf_alloc>
 80208d2:	60f8      	str	r0, [r7, #12]
 80208d4:	68fb      	ldr	r3, [r7, #12]
 80208d6:	2b00      	cmp	r3, #0
 80208d8:	d109      	bne.n	80208ee <tcp_enqueue_flags+0x86>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 80208da:	687b      	ldr	r3, [r7, #4]
 80208dc:	8b5b      	ldrh	r3, [r3, #26]
 80208de:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80208e2:	b29a      	uxth	r2, r3
 80208e4:	687b      	ldr	r3, [r7, #4]
 80208e6:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 80208e8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80208ec:	e095      	b.n	8020a1a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
 80208ee:	68fb      	ldr	r3, [r7, #12]
 80208f0:	895a      	ldrh	r2, [r3, #10]
 80208f2:	7dbb      	ldrb	r3, [r7, #22]
 80208f4:	b29b      	uxth	r3, r3
 80208f6:	429a      	cmp	r2, r3
 80208f8:	d206      	bcs.n	8020908 <tcp_enqueue_flags+0xa0>
 80208fa:	4b4a      	ldr	r3, [pc, #296]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 80208fc:	f240 4239 	movw	r2, #1081	@ 0x439
 8020900:	494c      	ldr	r1, [pc, #304]	@ (8020a34 <tcp_enqueue_flags+0x1cc>)
 8020902:	484a      	ldr	r0, [pc, #296]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 8020904:	f009 ff2a 	bl	802a75c <iprintf>
              (p->len >= optlen));

  /* Allocate memory for tcp_seg, and fill in fields. */
  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
 8020908:	687b      	ldr	r3, [r7, #4]
 802090a:	6dd9      	ldr	r1, [r3, #92]	@ 0x5c
 802090c:	78fa      	ldrb	r2, [r7, #3]
 802090e:	7dfb      	ldrb	r3, [r7, #23]
 8020910:	9300      	str	r3, [sp, #0]
 8020912:	460b      	mov	r3, r1
 8020914:	68f9      	ldr	r1, [r7, #12]
 8020916:	6878      	ldr	r0, [r7, #4]
 8020918:	f7ff f8b6 	bl	801fa88 <tcp_create_segment>
 802091c:	60b8      	str	r0, [r7, #8]
 802091e:	68bb      	ldr	r3, [r7, #8]
 8020920:	2b00      	cmp	r3, #0
 8020922:	d109      	bne.n	8020938 <tcp_enqueue_flags+0xd0>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020924:	687b      	ldr	r3, [r7, #4]
 8020926:	8b5b      	ldrh	r3, [r3, #26]
 8020928:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802092c:	b29a      	uxth	r2, r3
 802092e:	687b      	ldr	r3, [r7, #4]
 8020930:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 8020932:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020936:	e070      	b.n	8020a1a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
 8020938:	68bb      	ldr	r3, [r7, #8]
 802093a:	691b      	ldr	r3, [r3, #16]
 802093c:	f003 0303 	and.w	r3, r3, #3
 8020940:	2b00      	cmp	r3, #0
 8020942:	d006      	beq.n	8020952 <tcp_enqueue_flags+0xea>
 8020944:	4b37      	ldr	r3, [pc, #220]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 8020946:	f240 4242 	movw	r2, #1090	@ 0x442
 802094a:	493b      	ldr	r1, [pc, #236]	@ (8020a38 <tcp_enqueue_flags+0x1d0>)
 802094c:	4837      	ldr	r0, [pc, #220]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 802094e:	f009 ff05 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
 8020952:	68bb      	ldr	r3, [r7, #8]
 8020954:	891b      	ldrh	r3, [r3, #8]
 8020956:	2b00      	cmp	r3, #0
 8020958:	d006      	beq.n	8020968 <tcp_enqueue_flags+0x100>
 802095a:	4b32      	ldr	r3, [pc, #200]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 802095c:	f240 4243 	movw	r2, #1091	@ 0x443
 8020960:	4936      	ldr	r1, [pc, #216]	@ (8020a3c <tcp_enqueue_flags+0x1d4>)
 8020962:	4832      	ldr	r0, [pc, #200]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 8020964:	f009 fefa 	bl	802a75c <iprintf>
               lwip_ntohl(seg->tcphdr->seqno),
               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
               (u16_t)flags));

  /* Now append seg to pcb->unsent queue */
  if (pcb->unsent == NULL) {
 8020968:	687b      	ldr	r3, [r7, #4]
 802096a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 802096c:	2b00      	cmp	r3, #0
 802096e:	d103      	bne.n	8020978 <tcp_enqueue_flags+0x110>
    pcb->unsent = seg;
 8020970:	687b      	ldr	r3, [r7, #4]
 8020972:	68ba      	ldr	r2, [r7, #8]
 8020974:	66da      	str	r2, [r3, #108]	@ 0x6c
 8020976:	e00d      	b.n	8020994 <tcp_enqueue_flags+0x12c>
  } else {
    struct tcp_seg *useg;
    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
 8020978:	687b      	ldr	r3, [r7, #4]
 802097a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 802097c:	613b      	str	r3, [r7, #16]
 802097e:	e002      	b.n	8020986 <tcp_enqueue_flags+0x11e>
 8020980:	693b      	ldr	r3, [r7, #16]
 8020982:	681b      	ldr	r3, [r3, #0]
 8020984:	613b      	str	r3, [r7, #16]
 8020986:	693b      	ldr	r3, [r7, #16]
 8020988:	681b      	ldr	r3, [r3, #0]
 802098a:	2b00      	cmp	r3, #0
 802098c:	d1f8      	bne.n	8020980 <tcp_enqueue_flags+0x118>
    useg->next = seg;
 802098e:	693b      	ldr	r3, [r7, #16]
 8020990:	68ba      	ldr	r2, [r7, #8]
 8020992:	601a      	str	r2, [r3, #0]
  }
#if TCP_OVERSIZE
  /* The new unsent tail has no space */
  pcb->unsent_oversize = 0;
 8020994:	687b      	ldr	r3, [r7, #4]
 8020996:	2200      	movs	r2, #0
 8020998:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */

  /* SYN and FIN bump the sequence number */
  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
 802099c:	78fb      	ldrb	r3, [r7, #3]
 802099e:	f003 0302 	and.w	r3, r3, #2
 80209a2:	2b00      	cmp	r3, #0
 80209a4:	d104      	bne.n	80209b0 <tcp_enqueue_flags+0x148>
 80209a6:	78fb      	ldrb	r3, [r7, #3]
 80209a8:	f003 0301 	and.w	r3, r3, #1
 80209ac:	2b00      	cmp	r3, #0
 80209ae:	d004      	beq.n	80209ba <tcp_enqueue_flags+0x152>
    pcb->snd_lbb++;
 80209b0:	687b      	ldr	r3, [r7, #4]
 80209b2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80209b4:	1c5a      	adds	r2, r3, #1
 80209b6:	687b      	ldr	r3, [r7, #4]
 80209b8:	65da      	str	r2, [r3, #92]	@ 0x5c
    /* optlen does not influence snd_buf */
  }
  if (flags & TCP_FIN) {
 80209ba:	78fb      	ldrb	r3, [r7, #3]
 80209bc:	f003 0301 	and.w	r3, r3, #1
 80209c0:	2b00      	cmp	r3, #0
 80209c2:	d006      	beq.n	80209d2 <tcp_enqueue_flags+0x16a>
    tcp_set_flags(pcb, TF_FIN);
 80209c4:	687b      	ldr	r3, [r7, #4]
 80209c6:	8b5b      	ldrh	r3, [r3, #26]
 80209c8:	f043 0320 	orr.w	r3, r3, #32
 80209cc:	b29a      	uxth	r2, r3
 80209ce:	687b      	ldr	r3, [r7, #4]
 80209d0:	835a      	strh	r2, [r3, #26]
  }

  /* update number of segments on the queues */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 80209d2:	68bb      	ldr	r3, [r7, #8]
 80209d4:	685b      	ldr	r3, [r3, #4]
 80209d6:	4618      	mov	r0, r3
 80209d8:	f7fa fcd6 	bl	801b388 <pbuf_clen>
 80209dc:	4603      	mov	r3, r0
 80209de:	461a      	mov	r2, r3
 80209e0:	687b      	ldr	r3, [r7, #4]
 80209e2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80209e6:	4413      	add	r3, r2
 80209e8:	b29a      	uxth	r2, r3
 80209ea:	687b      	ldr	r3, [r7, #4]
 80209ec:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 80209f0:	687b      	ldr	r3, [r7, #4]
 80209f2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80209f6:	2b00      	cmp	r3, #0
 80209f8:	d00e      	beq.n	8020a18 <tcp_enqueue_flags+0x1b0>
    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
 80209fa:	687b      	ldr	r3, [r7, #4]
 80209fc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80209fe:	2b00      	cmp	r3, #0
 8020a00:	d10a      	bne.n	8020a18 <tcp_enqueue_flags+0x1b0>
 8020a02:	687b      	ldr	r3, [r7, #4]
 8020a04:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020a06:	2b00      	cmp	r3, #0
 8020a08:	d106      	bne.n	8020a18 <tcp_enqueue_flags+0x1b0>
 8020a0a:	4b06      	ldr	r3, [pc, #24]	@ (8020a24 <tcp_enqueue_flags+0x1bc>)
 8020a0c:	f240 4265 	movw	r2, #1125	@ 0x465
 8020a10:	490b      	ldr	r1, [pc, #44]	@ (8020a40 <tcp_enqueue_flags+0x1d8>)
 8020a12:	4806      	ldr	r0, [pc, #24]	@ (8020a2c <tcp_enqueue_flags+0x1c4>)
 8020a14:	f009 fea2 	bl	802a75c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  return ERR_OK;
 8020a18:	2300      	movs	r3, #0
}
 8020a1a:	4618      	mov	r0, r3
 8020a1c:	3718      	adds	r7, #24
 8020a1e:	46bd      	mov	sp, r7
 8020a20:	bd80      	pop	{r7, pc}
 8020a22:	bf00      	nop
 8020a24:	08030074 	.word	0x08030074
 8020a28:	080304f4 	.word	0x080304f4
 8020a2c:	080300c8 	.word	0x080300c8
 8020a30:	0803054c 	.word	0x0803054c
 8020a34:	0803056c 	.word	0x0803056c
 8020a38:	080305a8 	.word	0x080305a8
 8020a3c:	080305c0 	.word	0x080305c0
 8020a40:	080305ec 	.word	0x080305ec

08020a44 <tcp_output>:
 * @return ERR_OK if data has been sent or nothing to send
 *         another err_t on error
 */
err_t
tcp_output(struct tcp_pcb *pcb)
{
 8020a44:	b5b0      	push	{r4, r5, r7, lr}
 8020a46:	b08a      	sub	sp, #40	@ 0x28
 8020a48:	af00      	add	r7, sp, #0
 8020a4a:	6078      	str	r0, [r7, #4]
  struct netif *netif;
#if TCP_CWND_DEBUG
  s16_t i = 0;
#endif /* TCP_CWND_DEBUG */

  LWIP_ASSERT_CORE_LOCKED();
 8020a4c:	f7f0 fa58 	bl	8010f00 <sys_check_core_locking>

  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
 8020a50:	687b      	ldr	r3, [r7, #4]
 8020a52:	2b00      	cmp	r3, #0
 8020a54:	d106      	bne.n	8020a64 <tcp_output+0x20>
 8020a56:	4b8a      	ldr	r3, [pc, #552]	@ (8020c80 <tcp_output+0x23c>)
 8020a58:	f240 42e1 	movw	r2, #1249	@ 0x4e1
 8020a5c:	4989      	ldr	r1, [pc, #548]	@ (8020c84 <tcp_output+0x240>)
 8020a5e:	488a      	ldr	r0, [pc, #552]	@ (8020c88 <tcp_output+0x244>)
 8020a60:	f009 fe7c 	bl	802a75c <iprintf>
  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
 8020a64:	687b      	ldr	r3, [r7, #4]
 8020a66:	7d1b      	ldrb	r3, [r3, #20]
 8020a68:	2b01      	cmp	r3, #1
 8020a6a:	d106      	bne.n	8020a7a <tcp_output+0x36>
 8020a6c:	4b84      	ldr	r3, [pc, #528]	@ (8020c80 <tcp_output+0x23c>)
 8020a6e:	f240 42e3 	movw	r2, #1251	@ 0x4e3
 8020a72:	4986      	ldr	r1, [pc, #536]	@ (8020c8c <tcp_output+0x248>)
 8020a74:	4884      	ldr	r0, [pc, #528]	@ (8020c88 <tcp_output+0x244>)
 8020a76:	f009 fe71 	bl	802a75c <iprintf>

  /* First, check if we are invoked by the TCP input processing
     code. If so, we do not output anything. Instead, we rely on the
     input processing code to call us when input processing is done
     with. */
  if (tcp_input_pcb == pcb) {
 8020a7a:	4b85      	ldr	r3, [pc, #532]	@ (8020c90 <tcp_output+0x24c>)
 8020a7c:	681b      	ldr	r3, [r3, #0]
 8020a7e:	687a      	ldr	r2, [r7, #4]
 8020a80:	429a      	cmp	r2, r3
 8020a82:	d101      	bne.n	8020a88 <tcp_output+0x44>
    return ERR_OK;
 8020a84:	2300      	movs	r3, #0
 8020a86:	e1d1      	b.n	8020e2c <tcp_output+0x3e8>
  }

  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
 8020a88:	687b      	ldr	r3, [r7, #4]
 8020a8a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 8020a8e:	687b      	ldr	r3, [r7, #4]
 8020a90:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8020a94:	4293      	cmp	r3, r2
 8020a96:	bf28      	it	cs
 8020a98:	4613      	movcs	r3, r2
 8020a9a:	b29b      	uxth	r3, r3
 8020a9c:	61bb      	str	r3, [r7, #24]

  seg = pcb->unsent;
 8020a9e:	687b      	ldr	r3, [r7, #4]
 8020aa0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020aa2:	627b      	str	r3, [r7, #36]	@ 0x24

  if (seg == NULL) {
 8020aa4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020aa6:	2b00      	cmp	r3, #0
 8020aa8:	d10b      	bne.n	8020ac2 <tcp_output+0x7e>
                                 ", seg == NULL, ack %"U32_F"\n",
                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));

    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
     * an empty ACK segment and send it. */
    if (pcb->flags & TF_ACK_NOW) {
 8020aaa:	687b      	ldr	r3, [r7, #4]
 8020aac:	8b5b      	ldrh	r3, [r3, #26]
 8020aae:	f003 0302 	and.w	r3, r3, #2
 8020ab2:	2b00      	cmp	r3, #0
 8020ab4:	f000 81ad 	beq.w	8020e12 <tcp_output+0x3ce>
      return tcp_send_empty_ack(pcb);
 8020ab8:	6878      	ldr	r0, [r7, #4]
 8020aba:	f000 fdd7 	bl	802166c <tcp_send_empty_ack>
 8020abe:	4603      	mov	r3, r0
 8020ac0:	e1b4      	b.n	8020e2c <tcp_output+0x3e8>
                 pcb->snd_wnd, pcb->cwnd, wnd,
                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
  }

  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
 8020ac2:	6879      	ldr	r1, [r7, #4]
 8020ac4:	687b      	ldr	r3, [r7, #4]
 8020ac6:	3304      	adds	r3, #4
 8020ac8:	461a      	mov	r2, r3
 8020aca:	6878      	ldr	r0, [r7, #4]
 8020acc:	f7fe ffc0 	bl	801fa50 <tcp_route>
 8020ad0:	6178      	str	r0, [r7, #20]
  if (netif == NULL) {
 8020ad2:	697b      	ldr	r3, [r7, #20]
 8020ad4:	2b00      	cmp	r3, #0
 8020ad6:	d102      	bne.n	8020ade <tcp_output+0x9a>
    return ERR_RTE;
 8020ad8:	f06f 0303 	mvn.w	r3, #3
 8020adc:	e1a6      	b.n	8020e2c <tcp_output+0x3e8>
  }

  /* If we don't have a local IP address, we get one from netif */
  if (ip_addr_isany(&pcb->local_ip)) {
 8020ade:	687b      	ldr	r3, [r7, #4]
 8020ae0:	2b00      	cmp	r3, #0
 8020ae2:	d003      	beq.n	8020aec <tcp_output+0xa8>
 8020ae4:	687b      	ldr	r3, [r7, #4]
 8020ae6:	681b      	ldr	r3, [r3, #0]
 8020ae8:	2b00      	cmp	r3, #0
 8020aea:	d111      	bne.n	8020b10 <tcp_output+0xcc>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
 8020aec:	697b      	ldr	r3, [r7, #20]
 8020aee:	2b00      	cmp	r3, #0
 8020af0:	d002      	beq.n	8020af8 <tcp_output+0xb4>
 8020af2:	697b      	ldr	r3, [r7, #20]
 8020af4:	3304      	adds	r3, #4
 8020af6:	e000      	b.n	8020afa <tcp_output+0xb6>
 8020af8:	2300      	movs	r3, #0
 8020afa:	613b      	str	r3, [r7, #16]
    if (local_ip == NULL) {
 8020afc:	693b      	ldr	r3, [r7, #16]
 8020afe:	2b00      	cmp	r3, #0
 8020b00:	d102      	bne.n	8020b08 <tcp_output+0xc4>
      return ERR_RTE;
 8020b02:	f06f 0303 	mvn.w	r3, #3
 8020b06:	e191      	b.n	8020e2c <tcp_output+0x3e8>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 8020b08:	693b      	ldr	r3, [r7, #16]
 8020b0a:	681a      	ldr	r2, [r3, #0]
 8020b0c:	687b      	ldr	r3, [r7, #4]
 8020b0e:	601a      	str	r2, [r3, #0]
  }

  /* Handle the current segment not fitting within the window */
  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
 8020b10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020b12:	691b      	ldr	r3, [r3, #16]
 8020b14:	685b      	ldr	r3, [r3, #4]
 8020b16:	4618      	mov	r0, r3
 8020b18:	f7f8 fedb 	bl	80198d2 <lwip_htonl>
 8020b1c:	4602      	mov	r2, r0
 8020b1e:	687b      	ldr	r3, [r7, #4]
 8020b20:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8020b22:	1ad3      	subs	r3, r2, r3
 8020b24:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020b26:	8912      	ldrh	r2, [r2, #8]
 8020b28:	4413      	add	r3, r2
 8020b2a:	69ba      	ldr	r2, [r7, #24]
 8020b2c:	429a      	cmp	r2, r3
 8020b2e:	d227      	bcs.n	8020b80 <tcp_output+0x13c>
     * within the remaining (could be 0) send window and RTO timer is not running (we
     * have no in-flight data). If window is still too small after persist timer fires,
     * then we split the segment. We don't consider the congestion window since a cwnd
     * smaller than 1 SMSS implies in-flight data
     */
    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
 8020b30:	687b      	ldr	r3, [r7, #4]
 8020b32:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8020b36:	461a      	mov	r2, r3
 8020b38:	69bb      	ldr	r3, [r7, #24]
 8020b3a:	4293      	cmp	r3, r2
 8020b3c:	d114      	bne.n	8020b68 <tcp_output+0x124>
 8020b3e:	687b      	ldr	r3, [r7, #4]
 8020b40:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020b42:	2b00      	cmp	r3, #0
 8020b44:	d110      	bne.n	8020b68 <tcp_output+0x124>
 8020b46:	687b      	ldr	r3, [r7, #4]
 8020b48:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 8020b4c:	2b00      	cmp	r3, #0
 8020b4e:	d10b      	bne.n	8020b68 <tcp_output+0x124>
      pcb->persist_cnt = 0;
 8020b50:	687b      	ldr	r3, [r7, #4]
 8020b52:	2200      	movs	r2, #0
 8020b54:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
      pcb->persist_backoff = 1;
 8020b58:	687b      	ldr	r3, [r7, #4]
 8020b5a:	2201      	movs	r2, #1
 8020b5c:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
      pcb->persist_probe = 0;
 8020b60:	687b      	ldr	r3, [r7, #4]
 8020b62:	2200      	movs	r2, #0
 8020b64:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
    }
    /* We need an ACK, but can't send data now, so send an empty ACK */
    if (pcb->flags & TF_ACK_NOW) {
 8020b68:	687b      	ldr	r3, [r7, #4]
 8020b6a:	8b5b      	ldrh	r3, [r3, #26]
 8020b6c:	f003 0302 	and.w	r3, r3, #2
 8020b70:	2b00      	cmp	r3, #0
 8020b72:	f000 8150 	beq.w	8020e16 <tcp_output+0x3d2>
      return tcp_send_empty_ack(pcb);
 8020b76:	6878      	ldr	r0, [r7, #4]
 8020b78:	f000 fd78 	bl	802166c <tcp_send_empty_ack>
 8020b7c:	4603      	mov	r3, r0
 8020b7e:	e155      	b.n	8020e2c <tcp_output+0x3e8>
    }
    goto output_done;
  }
  /* Stop persist timer, above conditions are not active */
  pcb->persist_backoff = 0;
 8020b80:	687b      	ldr	r3, [r7, #4]
 8020b82:	2200      	movs	r2, #0
 8020b84:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99

  /* useg should point to last segment on unacked queue */
  useg = pcb->unacked;
 8020b88:	687b      	ldr	r3, [r7, #4]
 8020b8a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020b8c:	623b      	str	r3, [r7, #32]
  if (useg != NULL) {
 8020b8e:	6a3b      	ldr	r3, [r7, #32]
 8020b90:	2b00      	cmp	r3, #0
 8020b92:	f000 811f 	beq.w	8020dd4 <tcp_output+0x390>
    for (; useg->next != NULL; useg = useg->next);
 8020b96:	e002      	b.n	8020b9e <tcp_output+0x15a>
 8020b98:	6a3b      	ldr	r3, [r7, #32]
 8020b9a:	681b      	ldr	r3, [r3, #0]
 8020b9c:	623b      	str	r3, [r7, #32]
 8020b9e:	6a3b      	ldr	r3, [r7, #32]
 8020ba0:	681b      	ldr	r3, [r3, #0]
 8020ba2:	2b00      	cmp	r3, #0
 8020ba4:	d1f8      	bne.n	8020b98 <tcp_output+0x154>
  }
  /* data available and window allows it to be sent? */
  while (seg != NULL &&
 8020ba6:	e115      	b.n	8020dd4 <tcp_output+0x390>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
    LWIP_ASSERT("RST not expected here!",
 8020ba8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020baa:	691b      	ldr	r3, [r3, #16]
 8020bac:	899b      	ldrh	r3, [r3, #12]
 8020bae:	b29b      	uxth	r3, r3
 8020bb0:	4618      	mov	r0, r3
 8020bb2:	f7f8 fe79 	bl	80198a8 <lwip_htons>
 8020bb6:	4603      	mov	r3, r0
 8020bb8:	b2db      	uxtb	r3, r3
 8020bba:	f003 0304 	and.w	r3, r3, #4
 8020bbe:	2b00      	cmp	r3, #0
 8020bc0:	d006      	beq.n	8020bd0 <tcp_output+0x18c>
 8020bc2:	4b2f      	ldr	r3, [pc, #188]	@ (8020c80 <tcp_output+0x23c>)
 8020bc4:	f240 5236 	movw	r2, #1334	@ 0x536
 8020bc8:	4932      	ldr	r1, [pc, #200]	@ (8020c94 <tcp_output+0x250>)
 8020bca:	482f      	ldr	r0, [pc, #188]	@ (8020c88 <tcp_output+0x244>)
 8020bcc:	f009 fdc6 	bl	802a75c <iprintf>
     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
     *   either seg->next != NULL or pcb->unacked == NULL;
     *   RST is no sent using tcp_write/tcp_output.
     */
    if ((tcp_do_output_nagle(pcb) == 0) &&
 8020bd0:	687b      	ldr	r3, [r7, #4]
 8020bd2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020bd4:	2b00      	cmp	r3, #0
 8020bd6:	d01f      	beq.n	8020c18 <tcp_output+0x1d4>
 8020bd8:	687b      	ldr	r3, [r7, #4]
 8020bda:	8b5b      	ldrh	r3, [r3, #26]
 8020bdc:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8020be0:	2b00      	cmp	r3, #0
 8020be2:	d119      	bne.n	8020c18 <tcp_output+0x1d4>
 8020be4:	687b      	ldr	r3, [r7, #4]
 8020be6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020be8:	2b00      	cmp	r3, #0
 8020bea:	d00b      	beq.n	8020c04 <tcp_output+0x1c0>
 8020bec:	687b      	ldr	r3, [r7, #4]
 8020bee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020bf0:	681b      	ldr	r3, [r3, #0]
 8020bf2:	2b00      	cmp	r3, #0
 8020bf4:	d110      	bne.n	8020c18 <tcp_output+0x1d4>
 8020bf6:	687b      	ldr	r3, [r7, #4]
 8020bf8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020bfa:	891a      	ldrh	r2, [r3, #8]
 8020bfc:	687b      	ldr	r3, [r7, #4]
 8020bfe:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020c00:	429a      	cmp	r2, r3
 8020c02:	d209      	bcs.n	8020c18 <tcp_output+0x1d4>
 8020c04:	687b      	ldr	r3, [r7, #4]
 8020c06:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8020c0a:	2b00      	cmp	r3, #0
 8020c0c:	d004      	beq.n	8020c18 <tcp_output+0x1d4>
 8020c0e:	687b      	ldr	r3, [r7, #4]
 8020c10:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020c14:	2b0f      	cmp	r3, #15
 8020c16:	d901      	bls.n	8020c1c <tcp_output+0x1d8>
 8020c18:	2301      	movs	r3, #1
 8020c1a:	e000      	b.n	8020c1e <tcp_output+0x1da>
 8020c1c:	2300      	movs	r3, #0
 8020c1e:	2b00      	cmp	r3, #0
 8020c20:	d106      	bne.n	8020c30 <tcp_output+0x1ec>
        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
 8020c22:	687b      	ldr	r3, [r7, #4]
 8020c24:	8b5b      	ldrh	r3, [r3, #26]
 8020c26:	f003 03a0 	and.w	r3, r3, #160	@ 0xa0
    if ((tcp_do_output_nagle(pcb) == 0) &&
 8020c2a:	2b00      	cmp	r3, #0
 8020c2c:	f000 80e7 	beq.w	8020dfe <tcp_output+0x3ba>
                                 pcb->lastack,
                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
    ++i;
#endif /* TCP_CWND_DEBUG */

    if (pcb->state != SYN_SENT) {
 8020c30:	687b      	ldr	r3, [r7, #4]
 8020c32:	7d1b      	ldrb	r3, [r3, #20]
 8020c34:	2b02      	cmp	r3, #2
 8020c36:	d00d      	beq.n	8020c54 <tcp_output+0x210>
      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
 8020c38:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020c3a:	691b      	ldr	r3, [r3, #16]
 8020c3c:	899b      	ldrh	r3, [r3, #12]
 8020c3e:	b29c      	uxth	r4, r3
 8020c40:	2010      	movs	r0, #16
 8020c42:	f7f8 fe31 	bl	80198a8 <lwip_htons>
 8020c46:	4603      	mov	r3, r0
 8020c48:	461a      	mov	r2, r3
 8020c4a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020c4c:	691b      	ldr	r3, [r3, #16]
 8020c4e:	4322      	orrs	r2, r4
 8020c50:	b292      	uxth	r2, r2
 8020c52:	819a      	strh	r2, [r3, #12]
    }

    err = tcp_output_segment(seg, pcb, netif);
 8020c54:	697a      	ldr	r2, [r7, #20]
 8020c56:	6879      	ldr	r1, [r7, #4]
 8020c58:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8020c5a:	f000 f90b 	bl	8020e74 <tcp_output_segment>
 8020c5e:	4603      	mov	r3, r0
 8020c60:	73fb      	strb	r3, [r7, #15]
    if (err != ERR_OK) {
 8020c62:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8020c66:	2b00      	cmp	r3, #0
 8020c68:	d016      	beq.n	8020c98 <tcp_output+0x254>
      /* segment could not be sent, for whatever reason */
      tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020c6a:	687b      	ldr	r3, [r7, #4]
 8020c6c:	8b5b      	ldrh	r3, [r3, #26]
 8020c6e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020c72:	b29a      	uxth	r2, r3
 8020c74:	687b      	ldr	r3, [r7, #4]
 8020c76:	835a      	strh	r2, [r3, #26]
      return err;
 8020c78:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8020c7c:	e0d6      	b.n	8020e2c <tcp_output+0x3e8>
 8020c7e:	bf00      	nop
 8020c80:	08030074 	.word	0x08030074
 8020c84:	08030614 	.word	0x08030614
 8020c88:	080300c8 	.word	0x080300c8
 8020c8c:	0803062c 	.word	0x0803062c
 8020c90:	2402afb8 	.word	0x2402afb8
 8020c94:	08030654 	.word	0x08030654
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = 0;
 8020c98:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020c9a:	2200      	movs	r2, #0
 8020c9c:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
    pcb->unsent = seg->next;
 8020c9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020ca0:	681a      	ldr	r2, [r3, #0]
 8020ca2:	687b      	ldr	r3, [r7, #4]
 8020ca4:	66da      	str	r2, [r3, #108]	@ 0x6c
    if (pcb->state != SYN_SENT) {
 8020ca6:	687b      	ldr	r3, [r7, #4]
 8020ca8:	7d1b      	ldrb	r3, [r3, #20]
 8020caa:	2b02      	cmp	r3, #2
 8020cac:	d006      	beq.n	8020cbc <tcp_output+0x278>
      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8020cae:	687b      	ldr	r3, [r7, #4]
 8020cb0:	8b5b      	ldrh	r3, [r3, #26]
 8020cb2:	f023 0303 	bic.w	r3, r3, #3
 8020cb6:	b29a      	uxth	r2, r3
 8020cb8:	687b      	ldr	r3, [r7, #4]
 8020cba:	835a      	strh	r2, [r3, #26]
    }
    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 8020cbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020cbe:	691b      	ldr	r3, [r3, #16]
 8020cc0:	685b      	ldr	r3, [r3, #4]
 8020cc2:	4618      	mov	r0, r3
 8020cc4:	f7f8 fe05 	bl	80198d2 <lwip_htonl>
 8020cc8:	4604      	mov	r4, r0
 8020cca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020ccc:	891b      	ldrh	r3, [r3, #8]
 8020cce:	461d      	mov	r5, r3
 8020cd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020cd2:	691b      	ldr	r3, [r3, #16]
 8020cd4:	899b      	ldrh	r3, [r3, #12]
 8020cd6:	b29b      	uxth	r3, r3
 8020cd8:	4618      	mov	r0, r3
 8020cda:	f7f8 fde5 	bl	80198a8 <lwip_htons>
 8020cde:	4603      	mov	r3, r0
 8020ce0:	b2db      	uxtb	r3, r3
 8020ce2:	f003 0303 	and.w	r3, r3, #3
 8020ce6:	2b00      	cmp	r3, #0
 8020ce8:	d001      	beq.n	8020cee <tcp_output+0x2aa>
 8020cea:	2301      	movs	r3, #1
 8020cec:	e000      	b.n	8020cf0 <tcp_output+0x2ac>
 8020cee:	2300      	movs	r3, #0
 8020cf0:	442b      	add	r3, r5
 8020cf2:	4423      	add	r3, r4
 8020cf4:	60bb      	str	r3, [r7, #8]
    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 8020cf6:	687b      	ldr	r3, [r7, #4]
 8020cf8:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8020cfa:	68bb      	ldr	r3, [r7, #8]
 8020cfc:	1ad3      	subs	r3, r2, r3
 8020cfe:	2b00      	cmp	r3, #0
 8020d00:	da02      	bge.n	8020d08 <tcp_output+0x2c4>
      pcb->snd_nxt = snd_nxt;
 8020d02:	687b      	ldr	r3, [r7, #4]
 8020d04:	68ba      	ldr	r2, [r7, #8]
 8020d06:	651a      	str	r2, [r3, #80]	@ 0x50
    }
    /* put segment on unacknowledged list if length > 0 */
    if (TCP_TCPLEN(seg) > 0) {
 8020d08:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d0a:	891b      	ldrh	r3, [r3, #8]
 8020d0c:	461c      	mov	r4, r3
 8020d0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d10:	691b      	ldr	r3, [r3, #16]
 8020d12:	899b      	ldrh	r3, [r3, #12]
 8020d14:	b29b      	uxth	r3, r3
 8020d16:	4618      	mov	r0, r3
 8020d18:	f7f8 fdc6 	bl	80198a8 <lwip_htons>
 8020d1c:	4603      	mov	r3, r0
 8020d1e:	b2db      	uxtb	r3, r3
 8020d20:	f003 0303 	and.w	r3, r3, #3
 8020d24:	2b00      	cmp	r3, #0
 8020d26:	d001      	beq.n	8020d2c <tcp_output+0x2e8>
 8020d28:	2301      	movs	r3, #1
 8020d2a:	e000      	b.n	8020d2e <tcp_output+0x2ea>
 8020d2c:	2300      	movs	r3, #0
 8020d2e:	4423      	add	r3, r4
 8020d30:	2b00      	cmp	r3, #0
 8020d32:	d049      	beq.n	8020dc8 <tcp_output+0x384>
      seg->next = NULL;
 8020d34:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d36:	2200      	movs	r2, #0
 8020d38:	601a      	str	r2, [r3, #0]
      /* unacked list is empty? */
      if (pcb->unacked == NULL) {
 8020d3a:	687b      	ldr	r3, [r7, #4]
 8020d3c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020d3e:	2b00      	cmp	r3, #0
 8020d40:	d105      	bne.n	8020d4e <tcp_output+0x30a>
        pcb->unacked = seg;
 8020d42:	687b      	ldr	r3, [r7, #4]
 8020d44:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020d46:	671a      	str	r2, [r3, #112]	@ 0x70
        useg = seg;
 8020d48:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d4a:	623b      	str	r3, [r7, #32]
 8020d4c:	e03f      	b.n	8020dce <tcp_output+0x38a>
        /* unacked list is not empty? */
      } else {
        /* In the case of fast retransmit, the packet should not go to the tail
         * of the unacked queue, but rather somewhere before it. We need to check for
         * this case. -STJ Jul 27, 2004 */
        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
 8020d4e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d50:	691b      	ldr	r3, [r3, #16]
 8020d52:	685b      	ldr	r3, [r3, #4]
 8020d54:	4618      	mov	r0, r3
 8020d56:	f7f8 fdbc 	bl	80198d2 <lwip_htonl>
 8020d5a:	4604      	mov	r4, r0
 8020d5c:	6a3b      	ldr	r3, [r7, #32]
 8020d5e:	691b      	ldr	r3, [r3, #16]
 8020d60:	685b      	ldr	r3, [r3, #4]
 8020d62:	4618      	mov	r0, r3
 8020d64:	f7f8 fdb5 	bl	80198d2 <lwip_htonl>
 8020d68:	4603      	mov	r3, r0
 8020d6a:	1ae3      	subs	r3, r4, r3
 8020d6c:	2b00      	cmp	r3, #0
 8020d6e:	da24      	bge.n	8020dba <tcp_output+0x376>
          /* add segment to before tail of unacked list, keeping the list sorted */
          struct tcp_seg **cur_seg = &(pcb->unacked);
 8020d70:	687b      	ldr	r3, [r7, #4]
 8020d72:	3370      	adds	r3, #112	@ 0x70
 8020d74:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 8020d76:	e002      	b.n	8020d7e <tcp_output+0x33a>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
            cur_seg = &((*cur_seg)->next );
 8020d78:	69fb      	ldr	r3, [r7, #28]
 8020d7a:	681b      	ldr	r3, [r3, #0]
 8020d7c:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 8020d7e:	69fb      	ldr	r3, [r7, #28]
 8020d80:	681b      	ldr	r3, [r3, #0]
 8020d82:	2b00      	cmp	r3, #0
 8020d84:	d011      	beq.n	8020daa <tcp_output+0x366>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 8020d86:	69fb      	ldr	r3, [r7, #28]
 8020d88:	681b      	ldr	r3, [r3, #0]
 8020d8a:	691b      	ldr	r3, [r3, #16]
 8020d8c:	685b      	ldr	r3, [r3, #4]
 8020d8e:	4618      	mov	r0, r3
 8020d90:	f7f8 fd9f 	bl	80198d2 <lwip_htonl>
 8020d94:	4604      	mov	r4, r0
 8020d96:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020d98:	691b      	ldr	r3, [r3, #16]
 8020d9a:	685b      	ldr	r3, [r3, #4]
 8020d9c:	4618      	mov	r0, r3
 8020d9e:	f7f8 fd98 	bl	80198d2 <lwip_htonl>
 8020da2:	4603      	mov	r3, r0
 8020da4:	1ae3      	subs	r3, r4, r3
          while (*cur_seg &&
 8020da6:	2b00      	cmp	r3, #0
 8020da8:	dbe6      	blt.n	8020d78 <tcp_output+0x334>
          }
          seg->next = (*cur_seg);
 8020daa:	69fb      	ldr	r3, [r7, #28]
 8020dac:	681a      	ldr	r2, [r3, #0]
 8020dae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020db0:	601a      	str	r2, [r3, #0]
          (*cur_seg) = seg;
 8020db2:	69fb      	ldr	r3, [r7, #28]
 8020db4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020db6:	601a      	str	r2, [r3, #0]
 8020db8:	e009      	b.n	8020dce <tcp_output+0x38a>
        } else {
          /* add segment to tail of unacked list */
          useg->next = seg;
 8020dba:	6a3b      	ldr	r3, [r7, #32]
 8020dbc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020dbe:	601a      	str	r2, [r3, #0]
          useg = useg->next;
 8020dc0:	6a3b      	ldr	r3, [r7, #32]
 8020dc2:	681b      	ldr	r3, [r3, #0]
 8020dc4:	623b      	str	r3, [r7, #32]
 8020dc6:	e002      	b.n	8020dce <tcp_output+0x38a>
        }
      }
      /* do not queue empty segments on the unacked list */
    } else {
      tcp_seg_free(seg);
 8020dc8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8020dca:	f7fb fea8 	bl	801cb1e <tcp_seg_free>
    }
    seg = pcb->unsent;
 8020dce:	687b      	ldr	r3, [r7, #4]
 8020dd0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020dd2:	627b      	str	r3, [r7, #36]	@ 0x24
  while (seg != NULL &&
 8020dd4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020dd6:	2b00      	cmp	r3, #0
 8020dd8:	d012      	beq.n	8020e00 <tcp_output+0x3bc>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
 8020dda:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020ddc:	691b      	ldr	r3, [r3, #16]
 8020dde:	685b      	ldr	r3, [r3, #4]
 8020de0:	4618      	mov	r0, r3
 8020de2:	f7f8 fd76 	bl	80198d2 <lwip_htonl>
 8020de6:	4602      	mov	r2, r0
 8020de8:	687b      	ldr	r3, [r7, #4]
 8020dea:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8020dec:	1ad3      	subs	r3, r2, r3
 8020dee:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020df0:	8912      	ldrh	r2, [r2, #8]
 8020df2:	4413      	add	r3, r2
  while (seg != NULL &&
 8020df4:	69ba      	ldr	r2, [r7, #24]
 8020df6:	429a      	cmp	r2, r3
 8020df8:	f4bf aed6 	bcs.w	8020ba8 <tcp_output+0x164>
 8020dfc:	e000      	b.n	8020e00 <tcp_output+0x3bc>
      break;
 8020dfe:	bf00      	nop
  }
#if TCP_OVERSIZE
  if (pcb->unsent == NULL) {
 8020e00:	687b      	ldr	r3, [r7, #4]
 8020e02:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020e04:	2b00      	cmp	r3, #0
 8020e06:	d108      	bne.n	8020e1a <tcp_output+0x3d6>
    /* last unsent has been removed, reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8020e08:	687b      	ldr	r3, [r7, #4]
 8020e0a:	2200      	movs	r2, #0
 8020e0c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
 8020e10:	e004      	b.n	8020e1c <tcp_output+0x3d8>
    goto output_done;
 8020e12:	bf00      	nop
 8020e14:	e002      	b.n	8020e1c <tcp_output+0x3d8>
    goto output_done;
 8020e16:	bf00      	nop
 8020e18:	e000      	b.n	8020e1c <tcp_output+0x3d8>
  }
#endif /* TCP_OVERSIZE */

output_done:
 8020e1a:	bf00      	nop
  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
 8020e1c:	687b      	ldr	r3, [r7, #4]
 8020e1e:	8b5b      	ldrh	r3, [r3, #26]
 8020e20:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 8020e24:	b29a      	uxth	r2, r3
 8020e26:	687b      	ldr	r3, [r7, #4]
 8020e28:	835a      	strh	r2, [r3, #26]
  return ERR_OK;
 8020e2a:	2300      	movs	r3, #0
}
 8020e2c:	4618      	mov	r0, r3
 8020e2e:	3728      	adds	r7, #40	@ 0x28
 8020e30:	46bd      	mov	sp, r7
 8020e32:	bdb0      	pop	{r4, r5, r7, pc}

08020e34 <tcp_output_segment_busy>:
 * @arg seg the tcp segment to check
 * @return 1 if ref != 1, 0 if ref == 1
 */
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
 8020e34:	b580      	push	{r7, lr}
 8020e36:	b082      	sub	sp, #8
 8020e38:	af00      	add	r7, sp, #0
 8020e3a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
 8020e3c:	687b      	ldr	r3, [r7, #4]
 8020e3e:	2b00      	cmp	r3, #0
 8020e40:	d106      	bne.n	8020e50 <tcp_output_segment_busy+0x1c>
 8020e42:	4b09      	ldr	r3, [pc, #36]	@ (8020e68 <tcp_output_segment_busy+0x34>)
 8020e44:	f240 529a 	movw	r2, #1434	@ 0x59a
 8020e48:	4908      	ldr	r1, [pc, #32]	@ (8020e6c <tcp_output_segment_busy+0x38>)
 8020e4a:	4809      	ldr	r0, [pc, #36]	@ (8020e70 <tcp_output_segment_busy+0x3c>)
 8020e4c:	f009 fc86 	bl	802a75c <iprintf>

  /* We only need to check the first pbuf here:
     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
     which only changes the ref count of the first pbuf */
  if (seg->p->ref != 1) {
 8020e50:	687b      	ldr	r3, [r7, #4]
 8020e52:	685b      	ldr	r3, [r3, #4]
 8020e54:	7b9b      	ldrb	r3, [r3, #14]
 8020e56:	2b01      	cmp	r3, #1
 8020e58:	d001      	beq.n	8020e5e <tcp_output_segment_busy+0x2a>
    /* other reference found */
    return 1;
 8020e5a:	2301      	movs	r3, #1
 8020e5c:	e000      	b.n	8020e60 <tcp_output_segment_busy+0x2c>
  }
  /* no other references found */
  return 0;
 8020e5e:	2300      	movs	r3, #0
}
 8020e60:	4618      	mov	r0, r3
 8020e62:	3708      	adds	r7, #8
 8020e64:	46bd      	mov	sp, r7
 8020e66:	bd80      	pop	{r7, pc}
 8020e68:	08030074 	.word	0x08030074
 8020e6c:	0803066c 	.word	0x0803066c
 8020e70:	080300c8 	.word	0x080300c8

08020e74 <tcp_output_segment>:
 * @param pcb the tcp_pcb for the TCP connection used to send the segment
 * @param netif the netif used to send the segment
 */
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
 8020e74:	b5b0      	push	{r4, r5, r7, lr}
 8020e76:	b08c      	sub	sp, #48	@ 0x30
 8020e78:	af04      	add	r7, sp, #16
 8020e7a:	60f8      	str	r0, [r7, #12]
 8020e7c:	60b9      	str	r1, [r7, #8]
 8020e7e:	607a      	str	r2, [r7, #4]
  u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
  int seg_chksum_was_swapped = 0;
#endif

  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
 8020e80:	68fb      	ldr	r3, [r7, #12]
 8020e82:	2b00      	cmp	r3, #0
 8020e84:	d106      	bne.n	8020e94 <tcp_output_segment+0x20>
 8020e86:	4b64      	ldr	r3, [pc, #400]	@ (8021018 <tcp_output_segment+0x1a4>)
 8020e88:	f44f 62b7 	mov.w	r2, #1464	@ 0x5b8
 8020e8c:	4963      	ldr	r1, [pc, #396]	@ (802101c <tcp_output_segment+0x1a8>)
 8020e8e:	4864      	ldr	r0, [pc, #400]	@ (8021020 <tcp_output_segment+0x1ac>)
 8020e90:	f009 fc64 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
 8020e94:	68bb      	ldr	r3, [r7, #8]
 8020e96:	2b00      	cmp	r3, #0
 8020e98:	d106      	bne.n	8020ea8 <tcp_output_segment+0x34>
 8020e9a:	4b5f      	ldr	r3, [pc, #380]	@ (8021018 <tcp_output_segment+0x1a4>)
 8020e9c:	f240 52b9 	movw	r2, #1465	@ 0x5b9
 8020ea0:	4960      	ldr	r1, [pc, #384]	@ (8021024 <tcp_output_segment+0x1b0>)
 8020ea2:	485f      	ldr	r0, [pc, #380]	@ (8021020 <tcp_output_segment+0x1ac>)
 8020ea4:	f009 fc5a 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
 8020ea8:	687b      	ldr	r3, [r7, #4]
 8020eaa:	2b00      	cmp	r3, #0
 8020eac:	d106      	bne.n	8020ebc <tcp_output_segment+0x48>
 8020eae:	4b5a      	ldr	r3, [pc, #360]	@ (8021018 <tcp_output_segment+0x1a4>)
 8020eb0:	f240 52ba 	movw	r2, #1466	@ 0x5ba
 8020eb4:	495c      	ldr	r1, [pc, #368]	@ (8021028 <tcp_output_segment+0x1b4>)
 8020eb6:	485a      	ldr	r0, [pc, #360]	@ (8021020 <tcp_output_segment+0x1ac>)
 8020eb8:	f009 fc50 	bl	802a75c <iprintf>

  if (tcp_output_segment_busy(seg)) {
 8020ebc:	68f8      	ldr	r0, [r7, #12]
 8020ebe:	f7ff ffb9 	bl	8020e34 <tcp_output_segment_busy>
 8020ec2:	4603      	mov	r3, r0
 8020ec4:	2b00      	cmp	r3, #0
 8020ec6:	d001      	beq.n	8020ecc <tcp_output_segment+0x58>
    /* This should not happen: rexmit functions should have checked this.
       However, since this function modifies p->len, we must not continue in this case. */
    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
    return ERR_OK;
 8020ec8:	2300      	movs	r3, #0
 8020eca:	e0a1      	b.n	8021010 <tcp_output_segment+0x19c>
  }

  /* The TCP header has already been constructed, but the ackno and
   wnd fields remain. */
  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
 8020ecc:	68bb      	ldr	r3, [r7, #8]
 8020ece:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8020ed0:	68fb      	ldr	r3, [r7, #12]
 8020ed2:	691c      	ldr	r4, [r3, #16]
 8020ed4:	4610      	mov	r0, r2
 8020ed6:	f7f8 fcfc 	bl	80198d2 <lwip_htonl>
 8020eda:	4603      	mov	r3, r0
 8020edc:	60a3      	str	r3, [r4, #8]
       the window scale option) is never scaled. */
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
  } else
#endif /* LWIP_WND_SCALE */
  {
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
 8020ede:	68bb      	ldr	r3, [r7, #8]
 8020ee0:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 8020ee2:	68fb      	ldr	r3, [r7, #12]
 8020ee4:	691c      	ldr	r4, [r3, #16]
 8020ee6:	4610      	mov	r0, r2
 8020ee8:	f7f8 fcde 	bl	80198a8 <lwip_htons>
 8020eec:	4603      	mov	r3, r0
 8020eee:	81e3      	strh	r3, [r4, #14]
  }

  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8020ef0:	68bb      	ldr	r3, [r7, #8]
 8020ef2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8020ef4:	68ba      	ldr	r2, [r7, #8]
 8020ef6:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 8020ef8:	441a      	add	r2, r3
 8020efa:	68bb      	ldr	r3, [r7, #8]
 8020efc:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Add any requested options.  NB MSS option is only set on SYN
     packets, so ignore it here */
  /* cast through void* to get rid of alignment warnings */
  opts = (u32_t *)(void *)(seg->tcphdr + 1);
 8020efe:	68fb      	ldr	r3, [r7, #12]
 8020f00:	691b      	ldr	r3, [r3, #16]
 8020f02:	3314      	adds	r3, #20
 8020f04:	61fb      	str	r3, [r7, #28]
  if (seg->flags & TF_SEG_OPTS_MSS) {
 8020f06:	68fb      	ldr	r3, [r7, #12]
 8020f08:	7b1b      	ldrb	r3, [r3, #12]
 8020f0a:	f003 0301 	and.w	r3, r3, #1
 8020f0e:	2b00      	cmp	r3, #0
 8020f10:	d015      	beq.n	8020f3e <tcp_output_segment+0xca>
    u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
 8020f12:	68bb      	ldr	r3, [r7, #8]
 8020f14:	3304      	adds	r3, #4
 8020f16:	461a      	mov	r2, r3
 8020f18:	6879      	ldr	r1, [r7, #4]
 8020f1a:	f240 50b4 	movw	r0, #1460	@ 0x5b4
 8020f1e:	f7fc f9cd 	bl	801d2bc <tcp_eff_send_mss_netif>
 8020f22:	4603      	mov	r3, r0
 8020f24:	837b      	strh	r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
    mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
    *opts = TCP_BUILD_MSS_OPTION(mss);
 8020f26:	8b7b      	ldrh	r3, [r7, #26]
 8020f28:	f043 7301 	orr.w	r3, r3, #33816576	@ 0x2040000
 8020f2c:	4618      	mov	r0, r3
 8020f2e:	f7f8 fcd0 	bl	80198d2 <lwip_htonl>
 8020f32:	4602      	mov	r2, r0
 8020f34:	69fb      	ldr	r3, [r7, #28]
 8020f36:	601a      	str	r2, [r3, #0]
    opts += 1;
 8020f38:	69fb      	ldr	r3, [r7, #28]
 8020f3a:	3304      	adds	r3, #4
 8020f3c:	61fb      	str	r3, [r7, #28]
  }
#endif

  /* Set retransmission timer running if it is not currently enabled
     This must be set before checking the route. */
  if (pcb->rtime < 0) {
 8020f3e:	68bb      	ldr	r3, [r7, #8]
 8020f40:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 8020f44:	2b00      	cmp	r3, #0
 8020f46:	da02      	bge.n	8020f4e <tcp_output_segment+0xda>
    pcb->rtime = 0;
 8020f48:	68bb      	ldr	r3, [r7, #8]
 8020f4a:	2200      	movs	r2, #0
 8020f4c:	861a      	strh	r2, [r3, #48]	@ 0x30
  }

  if (pcb->rttest == 0) {
 8020f4e:	68bb      	ldr	r3, [r7, #8]
 8020f50:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 8020f52:	2b00      	cmp	r3, #0
 8020f54:	d10c      	bne.n	8020f70 <tcp_output_segment+0xfc>
    pcb->rttest = tcp_ticks;
 8020f56:	4b35      	ldr	r3, [pc, #212]	@ (802102c <tcp_output_segment+0x1b8>)
 8020f58:	681a      	ldr	r2, [r3, #0]
 8020f5a:	68bb      	ldr	r3, [r7, #8]
 8020f5c:	635a      	str	r2, [r3, #52]	@ 0x34
    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
 8020f5e:	68fb      	ldr	r3, [r7, #12]
 8020f60:	691b      	ldr	r3, [r3, #16]
 8020f62:	685b      	ldr	r3, [r3, #4]
 8020f64:	4618      	mov	r0, r3
 8020f66:	f7f8 fcb4 	bl	80198d2 <lwip_htonl>
 8020f6a:	4602      	mov	r2, r0
 8020f6c:	68bb      	ldr	r3, [r7, #8]
 8020f6e:	639a      	str	r2, [r3, #56]	@ 0x38
  }
  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
                                 seg->len));

  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
 8020f70:	68fb      	ldr	r3, [r7, #12]
 8020f72:	691a      	ldr	r2, [r3, #16]
 8020f74:	68fb      	ldr	r3, [r7, #12]
 8020f76:	685b      	ldr	r3, [r3, #4]
 8020f78:	685b      	ldr	r3, [r3, #4]
 8020f7a:	1ad3      	subs	r3, r2, r3
 8020f7c:	833b      	strh	r3, [r7, #24]
  if (len == 0) {
    /** Exclude retransmitted segments from this count. */
    MIB2_STATS_INC(mib2.tcpoutsegs);
  }

  seg->p->len -= len;
 8020f7e:	68fb      	ldr	r3, [r7, #12]
 8020f80:	685b      	ldr	r3, [r3, #4]
 8020f82:	8959      	ldrh	r1, [r3, #10]
 8020f84:	68fb      	ldr	r3, [r7, #12]
 8020f86:	685b      	ldr	r3, [r3, #4]
 8020f88:	8b3a      	ldrh	r2, [r7, #24]
 8020f8a:	1a8a      	subs	r2, r1, r2
 8020f8c:	b292      	uxth	r2, r2
 8020f8e:	815a      	strh	r2, [r3, #10]
  seg->p->tot_len -= len;
 8020f90:	68fb      	ldr	r3, [r7, #12]
 8020f92:	685b      	ldr	r3, [r3, #4]
 8020f94:	8919      	ldrh	r1, [r3, #8]
 8020f96:	68fb      	ldr	r3, [r7, #12]
 8020f98:	685b      	ldr	r3, [r3, #4]
 8020f9a:	8b3a      	ldrh	r2, [r7, #24]
 8020f9c:	1a8a      	subs	r2, r1, r2
 8020f9e:	b292      	uxth	r2, r2
 8020fa0:	811a      	strh	r2, [r3, #8]

  seg->p->payload = seg->tcphdr;
 8020fa2:	68fb      	ldr	r3, [r7, #12]
 8020fa4:	685b      	ldr	r3, [r3, #4]
 8020fa6:	68fa      	ldr	r2, [r7, #12]
 8020fa8:	6912      	ldr	r2, [r2, #16]
 8020faa:	605a      	str	r2, [r3, #4]

  seg->tcphdr->chksum = 0;
 8020fac:	68fb      	ldr	r3, [r7, #12]
 8020fae:	691b      	ldr	r3, [r3, #16]
 8020fb0:	2200      	movs	r2, #0
 8020fb2:	741a      	strb	r2, [r3, #16]
 8020fb4:	2200      	movs	r2, #0
 8020fb6:	745a      	strb	r2, [r3, #17]

#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
 8020fb8:	68fb      	ldr	r3, [r7, #12]
 8020fba:	691a      	ldr	r2, [r3, #16]
 8020fbc:	68fb      	ldr	r3, [r7, #12]
 8020fbe:	7b1b      	ldrb	r3, [r3, #12]
 8020fc0:	f003 0301 	and.w	r3, r3, #1
 8020fc4:	2b00      	cmp	r3, #0
 8020fc6:	d001      	beq.n	8020fcc <tcp_output_segment+0x158>
 8020fc8:	2318      	movs	r3, #24
 8020fca:	e000      	b.n	8020fce <tcp_output_segment+0x15a>
 8020fcc:	2314      	movs	r3, #20
 8020fce:	4413      	add	r3, r2
 8020fd0:	69fa      	ldr	r2, [r7, #28]
 8020fd2:	429a      	cmp	r2, r3
 8020fd4:	d006      	beq.n	8020fe4 <tcp_output_segment+0x170>
 8020fd6:	4b10      	ldr	r3, [pc, #64]	@ (8021018 <tcp_output_segment+0x1a4>)
 8020fd8:	f240 621c 	movw	r2, #1564	@ 0x61c
 8020fdc:	4914      	ldr	r1, [pc, #80]	@ (8021030 <tcp_output_segment+0x1bc>)
 8020fde:	4810      	ldr	r0, [pc, #64]	@ (8021020 <tcp_output_segment+0x1ac>)
 8020fe0:	f009 fbbc 	bl	802a75c <iprintf>
  }
#endif /* CHECKSUM_GEN_TCP */
  TCP_STATS_INC(tcp.xmit);

  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
 8020fe4:	68fb      	ldr	r3, [r7, #12]
 8020fe6:	6858      	ldr	r0, [r3, #4]
 8020fe8:	68b9      	ldr	r1, [r7, #8]
 8020fea:	68bb      	ldr	r3, [r7, #8]
 8020fec:	1d1c      	adds	r4, r3, #4
 8020fee:	68bb      	ldr	r3, [r7, #8]
 8020ff0:	7add      	ldrb	r5, [r3, #11]
 8020ff2:	68bb      	ldr	r3, [r7, #8]
 8020ff4:	7a9b      	ldrb	r3, [r3, #10]
 8020ff6:	687a      	ldr	r2, [r7, #4]
 8020ff8:	9202      	str	r2, [sp, #8]
 8020ffa:	2206      	movs	r2, #6
 8020ffc:	9201      	str	r2, [sp, #4]
 8020ffe:	9300      	str	r3, [sp, #0]
 8021000:	462b      	mov	r3, r5
 8021002:	4622      	mov	r2, r4
 8021004:	f004 fd7a 	bl	8025afc <ip4_output_if>
 8021008:	4603      	mov	r3, r0
 802100a:	75fb      	strb	r3, [r7, #23]
    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
    seg->chksum_swapped = 1;
  }
#endif

  return err;
 802100c:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8021010:	4618      	mov	r0, r3
 8021012:	3720      	adds	r7, #32
 8021014:	46bd      	mov	sp, r7
 8021016:	bdb0      	pop	{r4, r5, r7, pc}
 8021018:	08030074 	.word	0x08030074
 802101c:	08030694 	.word	0x08030694
 8021020:	080300c8 	.word	0x080300c8
 8021024:	080306b4 	.word	0x080306b4
 8021028:	080306d4 	.word	0x080306d4
 802102c:	2402af68 	.word	0x2402af68
 8021030:	080306f8 	.word	0x080306f8

08021034 <tcp_rexmit_rto_prepare>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
 8021034:	b5b0      	push	{r4, r5, r7, lr}
 8021036:	b084      	sub	sp, #16
 8021038:	af00      	add	r7, sp, #0
 802103a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;

  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
 802103c:	687b      	ldr	r3, [r7, #4]
 802103e:	2b00      	cmp	r3, #0
 8021040:	d106      	bne.n	8021050 <tcp_rexmit_rto_prepare+0x1c>
 8021042:	4b36      	ldr	r3, [pc, #216]	@ (802111c <tcp_rexmit_rto_prepare+0xe8>)
 8021044:	f240 6263 	movw	r2, #1635	@ 0x663
 8021048:	4935      	ldr	r1, [pc, #212]	@ (8021120 <tcp_rexmit_rto_prepare+0xec>)
 802104a:	4836      	ldr	r0, [pc, #216]	@ (8021124 <tcp_rexmit_rto_prepare+0xf0>)
 802104c:	f009 fb86 	bl	802a75c <iprintf>

  if (pcb->unacked == NULL) {
 8021050:	687b      	ldr	r3, [r7, #4]
 8021052:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8021054:	2b00      	cmp	r3, #0
 8021056:	d102      	bne.n	802105e <tcp_rexmit_rto_prepare+0x2a>
    return ERR_VAL;
 8021058:	f06f 0305 	mvn.w	r3, #5
 802105c:	e059      	b.n	8021112 <tcp_rexmit_rto_prepare+0xde>

  /* Move all unacked segments to the head of the unsent queue.
     However, give up if any of the unsent pbufs are still referenced by the
     netif driver due to deferred transmission. No point loading the link further
     if it is struggling to flush its buffered writes. */
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 802105e:	687b      	ldr	r3, [r7, #4]
 8021060:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8021062:	60fb      	str	r3, [r7, #12]
 8021064:	e00b      	b.n	802107e <tcp_rexmit_rto_prepare+0x4a>
    if (tcp_output_segment_busy(seg)) {
 8021066:	68f8      	ldr	r0, [r7, #12]
 8021068:	f7ff fee4 	bl	8020e34 <tcp_output_segment_busy>
 802106c:	4603      	mov	r3, r0
 802106e:	2b00      	cmp	r3, #0
 8021070:	d002      	beq.n	8021078 <tcp_rexmit_rto_prepare+0x44>
      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
      return ERR_VAL;
 8021072:	f06f 0305 	mvn.w	r3, #5
 8021076:	e04c      	b.n	8021112 <tcp_rexmit_rto_prepare+0xde>
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 8021078:	68fb      	ldr	r3, [r7, #12]
 802107a:	681b      	ldr	r3, [r3, #0]
 802107c:	60fb      	str	r3, [r7, #12]
 802107e:	68fb      	ldr	r3, [r7, #12]
 8021080:	681b      	ldr	r3, [r3, #0]
 8021082:	2b00      	cmp	r3, #0
 8021084:	d1ef      	bne.n	8021066 <tcp_rexmit_rto_prepare+0x32>
    }
  }
  if (tcp_output_segment_busy(seg)) {
 8021086:	68f8      	ldr	r0, [r7, #12]
 8021088:	f7ff fed4 	bl	8020e34 <tcp_output_segment_busy>
 802108c:	4603      	mov	r3, r0
 802108e:	2b00      	cmp	r3, #0
 8021090:	d002      	beq.n	8021098 <tcp_rexmit_rto_prepare+0x64>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
    return ERR_VAL;
 8021092:	f06f 0305 	mvn.w	r3, #5
 8021096:	e03c      	b.n	8021112 <tcp_rexmit_rto_prepare+0xde>
  }
  /* concatenate unsent queue after unacked queue */
  seg->next = pcb->unsent;
 8021098:	687b      	ldr	r3, [r7, #4]
 802109a:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 802109c:	68fb      	ldr	r3, [r7, #12]
 802109e:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
  /* if last unsent changed, we need to update unsent_oversize */
  if (pcb->unsent == NULL) {
 80210a0:	687b      	ldr	r3, [r7, #4]
 80210a2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80210a4:	2b00      	cmp	r3, #0
 80210a6:	d104      	bne.n	80210b2 <tcp_rexmit_rto_prepare+0x7e>
    pcb->unsent_oversize = seg->oversize_left;
 80210a8:	68fb      	ldr	r3, [r7, #12]
 80210aa:	895a      	ldrh	r2, [r3, #10]
 80210ac:	687b      	ldr	r3, [r7, #4]
 80210ae:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE_DBGCHECK */
  /* unsent queue is the concatenated queue (of unacked, unsent) */
  pcb->unsent = pcb->unacked;
 80210b2:	687b      	ldr	r3, [r7, #4]
 80210b4:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 80210b6:	687b      	ldr	r3, [r7, #4]
 80210b8:	66da      	str	r2, [r3, #108]	@ 0x6c
  /* unacked queue is now empty */
  pcb->unacked = NULL;
 80210ba:	687b      	ldr	r3, [r7, #4]
 80210bc:	2200      	movs	r2, #0
 80210be:	671a      	str	r2, [r3, #112]	@ 0x70

  /* Mark RTO in-progress */
  tcp_set_flags(pcb, TF_RTO);
 80210c0:	687b      	ldr	r3, [r7, #4]
 80210c2:	8b5b      	ldrh	r3, [r3, #26]
 80210c4:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
 80210c8:	b29a      	uxth	r2, r3
 80210ca:	687b      	ldr	r3, [r7, #4]
 80210cc:	835a      	strh	r2, [r3, #26]
  /* Record the next byte following retransmit */
  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 80210ce:	68fb      	ldr	r3, [r7, #12]
 80210d0:	691b      	ldr	r3, [r3, #16]
 80210d2:	685b      	ldr	r3, [r3, #4]
 80210d4:	4618      	mov	r0, r3
 80210d6:	f7f8 fbfc 	bl	80198d2 <lwip_htonl>
 80210da:	4604      	mov	r4, r0
 80210dc:	68fb      	ldr	r3, [r7, #12]
 80210de:	891b      	ldrh	r3, [r3, #8]
 80210e0:	461d      	mov	r5, r3
 80210e2:	68fb      	ldr	r3, [r7, #12]
 80210e4:	691b      	ldr	r3, [r3, #16]
 80210e6:	899b      	ldrh	r3, [r3, #12]
 80210e8:	b29b      	uxth	r3, r3
 80210ea:	4618      	mov	r0, r3
 80210ec:	f7f8 fbdc 	bl	80198a8 <lwip_htons>
 80210f0:	4603      	mov	r3, r0
 80210f2:	b2db      	uxtb	r3, r3
 80210f4:	f003 0303 	and.w	r3, r3, #3
 80210f8:	2b00      	cmp	r3, #0
 80210fa:	d001      	beq.n	8021100 <tcp_rexmit_rto_prepare+0xcc>
 80210fc:	2301      	movs	r3, #1
 80210fe:	e000      	b.n	8021102 <tcp_rexmit_rto_prepare+0xce>
 8021100:	2300      	movs	r3, #0
 8021102:	442b      	add	r3, r5
 8021104:	18e2      	adds	r2, r4, r3
 8021106:	687b      	ldr	r3, [r7, #4]
 8021108:	64da      	str	r2, [r3, #76]	@ 0x4c
  /* Don't take any RTT measurements after retransmitting. */
  pcb->rttest = 0;
 802110a:	687b      	ldr	r3, [r7, #4]
 802110c:	2200      	movs	r2, #0
 802110e:	635a      	str	r2, [r3, #52]	@ 0x34

  return ERR_OK;
 8021110:	2300      	movs	r3, #0
}
 8021112:	4618      	mov	r0, r3
 8021114:	3710      	adds	r7, #16
 8021116:	46bd      	mov	sp, r7
 8021118:	bdb0      	pop	{r4, r5, r7, pc}
 802111a:	bf00      	nop
 802111c:	08030074 	.word	0x08030074
 8021120:	0803070c 	.word	0x0803070c
 8021124:	080300c8 	.word	0x080300c8

08021128 <tcp_rexmit_rto_commit>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
 8021128:	b580      	push	{r7, lr}
 802112a:	b082      	sub	sp, #8
 802112c:	af00      	add	r7, sp, #0
 802112e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
 8021130:	687b      	ldr	r3, [r7, #4]
 8021132:	2b00      	cmp	r3, #0
 8021134:	d106      	bne.n	8021144 <tcp_rexmit_rto_commit+0x1c>
 8021136:	4b0d      	ldr	r3, [pc, #52]	@ (802116c <tcp_rexmit_rto_commit+0x44>)
 8021138:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 802113c:	490c      	ldr	r1, [pc, #48]	@ (8021170 <tcp_rexmit_rto_commit+0x48>)
 802113e:	480d      	ldr	r0, [pc, #52]	@ (8021174 <tcp_rexmit_rto_commit+0x4c>)
 8021140:	f009 fb0c 	bl	802a75c <iprintf>

  /* increment number of retransmissions */
  if (pcb->nrtx < 0xFF) {
 8021144:	687b      	ldr	r3, [r7, #4]
 8021146:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 802114a:	2bff      	cmp	r3, #255	@ 0xff
 802114c:	d007      	beq.n	802115e <tcp_rexmit_rto_commit+0x36>
    ++pcb->nrtx;
 802114e:	687b      	ldr	r3, [r7, #4]
 8021150:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8021154:	3301      	adds	r3, #1
 8021156:	b2da      	uxtb	r2, r3
 8021158:	687b      	ldr	r3, [r7, #4]
 802115a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }
  /* Do the actual retransmission */
  tcp_output(pcb);
 802115e:	6878      	ldr	r0, [r7, #4]
 8021160:	f7ff fc70 	bl	8020a44 <tcp_output>
}
 8021164:	bf00      	nop
 8021166:	3708      	adds	r7, #8
 8021168:	46bd      	mov	sp, r7
 802116a:	bd80      	pop	{r7, pc}
 802116c:	08030074 	.word	0x08030074
 8021170:	08030730 	.word	0x08030730
 8021174:	080300c8 	.word	0x080300c8

08021178 <tcp_rexmit_rto>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
 8021178:	b580      	push	{r7, lr}
 802117a:	b082      	sub	sp, #8
 802117c:	af00      	add	r7, sp, #0
 802117e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
 8021180:	687b      	ldr	r3, [r7, #4]
 8021182:	2b00      	cmp	r3, #0
 8021184:	d106      	bne.n	8021194 <tcp_rexmit_rto+0x1c>
 8021186:	4b0a      	ldr	r3, [pc, #40]	@ (80211b0 <tcp_rexmit_rto+0x38>)
 8021188:	f240 62ad 	movw	r2, #1709	@ 0x6ad
 802118c:	4909      	ldr	r1, [pc, #36]	@ (80211b4 <tcp_rexmit_rto+0x3c>)
 802118e:	480a      	ldr	r0, [pc, #40]	@ (80211b8 <tcp_rexmit_rto+0x40>)
 8021190:	f009 fae4 	bl	802a75c <iprintf>

  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
 8021194:	6878      	ldr	r0, [r7, #4]
 8021196:	f7ff ff4d 	bl	8021034 <tcp_rexmit_rto_prepare>
 802119a:	4603      	mov	r3, r0
 802119c:	2b00      	cmp	r3, #0
 802119e:	d102      	bne.n	80211a6 <tcp_rexmit_rto+0x2e>
    tcp_rexmit_rto_commit(pcb);
 80211a0:	6878      	ldr	r0, [r7, #4]
 80211a2:	f7ff ffc1 	bl	8021128 <tcp_rexmit_rto_commit>
  }
}
 80211a6:	bf00      	nop
 80211a8:	3708      	adds	r7, #8
 80211aa:	46bd      	mov	sp, r7
 80211ac:	bd80      	pop	{r7, pc}
 80211ae:	bf00      	nop
 80211b0:	08030074 	.word	0x08030074
 80211b4:	08030754 	.word	0x08030754
 80211b8:	080300c8 	.word	0x080300c8

080211bc <tcp_rexmit>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
 80211bc:	b590      	push	{r4, r7, lr}
 80211be:	b085      	sub	sp, #20
 80211c0:	af00      	add	r7, sp, #0
 80211c2:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;
  struct tcp_seg **cur_seg;

  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
 80211c4:	687b      	ldr	r3, [r7, #4]
 80211c6:	2b00      	cmp	r3, #0
 80211c8:	d106      	bne.n	80211d8 <tcp_rexmit+0x1c>
 80211ca:	4b2f      	ldr	r3, [pc, #188]	@ (8021288 <tcp_rexmit+0xcc>)
 80211cc:	f240 62c1 	movw	r2, #1729	@ 0x6c1
 80211d0:	492e      	ldr	r1, [pc, #184]	@ (802128c <tcp_rexmit+0xd0>)
 80211d2:	482f      	ldr	r0, [pc, #188]	@ (8021290 <tcp_rexmit+0xd4>)
 80211d4:	f009 fac2 	bl	802a75c <iprintf>

  if (pcb->unacked == NULL) {
 80211d8:	687b      	ldr	r3, [r7, #4]
 80211da:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80211dc:	2b00      	cmp	r3, #0
 80211de:	d102      	bne.n	80211e6 <tcp_rexmit+0x2a>
    return ERR_VAL;
 80211e0:	f06f 0305 	mvn.w	r3, #5
 80211e4:	e04c      	b.n	8021280 <tcp_rexmit+0xc4>
  }

  seg = pcb->unacked;
 80211e6:	687b      	ldr	r3, [r7, #4]
 80211e8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80211ea:	60bb      	str	r3, [r7, #8]

  /* Give up if the segment is still referenced by the netif driver
     due to deferred transmission. */
  if (tcp_output_segment_busy(seg)) {
 80211ec:	68b8      	ldr	r0, [r7, #8]
 80211ee:	f7ff fe21 	bl	8020e34 <tcp_output_segment_busy>
 80211f2:	4603      	mov	r3, r0
 80211f4:	2b00      	cmp	r3, #0
 80211f6:	d002      	beq.n	80211fe <tcp_rexmit+0x42>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
    return ERR_VAL;
 80211f8:	f06f 0305 	mvn.w	r3, #5
 80211fc:	e040      	b.n	8021280 <tcp_rexmit+0xc4>
  }

  /* Move the first unacked segment to the unsent queue */
  /* Keep the unsent queue sorted. */
  pcb->unacked = seg->next;
 80211fe:	68bb      	ldr	r3, [r7, #8]
 8021200:	681a      	ldr	r2, [r3, #0]
 8021202:	687b      	ldr	r3, [r7, #4]
 8021204:	671a      	str	r2, [r3, #112]	@ 0x70

  cur_seg = &(pcb->unsent);
 8021206:	687b      	ldr	r3, [r7, #4]
 8021208:	336c      	adds	r3, #108	@ 0x6c
 802120a:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 802120c:	e002      	b.n	8021214 <tcp_rexmit+0x58>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
    cur_seg = &((*cur_seg)->next );
 802120e:	68fb      	ldr	r3, [r7, #12]
 8021210:	681b      	ldr	r3, [r3, #0]
 8021212:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 8021214:	68fb      	ldr	r3, [r7, #12]
 8021216:	681b      	ldr	r3, [r3, #0]
 8021218:	2b00      	cmp	r3, #0
 802121a:	d011      	beq.n	8021240 <tcp_rexmit+0x84>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 802121c:	68fb      	ldr	r3, [r7, #12]
 802121e:	681b      	ldr	r3, [r3, #0]
 8021220:	691b      	ldr	r3, [r3, #16]
 8021222:	685b      	ldr	r3, [r3, #4]
 8021224:	4618      	mov	r0, r3
 8021226:	f7f8 fb54 	bl	80198d2 <lwip_htonl>
 802122a:	4604      	mov	r4, r0
 802122c:	68bb      	ldr	r3, [r7, #8]
 802122e:	691b      	ldr	r3, [r3, #16]
 8021230:	685b      	ldr	r3, [r3, #4]
 8021232:	4618      	mov	r0, r3
 8021234:	f7f8 fb4d 	bl	80198d2 <lwip_htonl>
 8021238:	4603      	mov	r3, r0
 802123a:	1ae3      	subs	r3, r4, r3
  while (*cur_seg &&
 802123c:	2b00      	cmp	r3, #0
 802123e:	dbe6      	blt.n	802120e <tcp_rexmit+0x52>
  }
  seg->next = *cur_seg;
 8021240:	68fb      	ldr	r3, [r7, #12]
 8021242:	681a      	ldr	r2, [r3, #0]
 8021244:	68bb      	ldr	r3, [r7, #8]
 8021246:	601a      	str	r2, [r3, #0]
  *cur_seg = seg;
 8021248:	68fb      	ldr	r3, [r7, #12]
 802124a:	68ba      	ldr	r2, [r7, #8]
 802124c:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE
  if (seg->next == NULL) {
 802124e:	68bb      	ldr	r3, [r7, #8]
 8021250:	681b      	ldr	r3, [r3, #0]
 8021252:	2b00      	cmp	r3, #0
 8021254:	d103      	bne.n	802125e <tcp_rexmit+0xa2>
    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8021256:	687b      	ldr	r3, [r7, #4]
 8021258:	2200      	movs	r2, #0
 802125a:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  if (pcb->nrtx < 0xFF) {
 802125e:	687b      	ldr	r3, [r7, #4]
 8021260:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8021264:	2bff      	cmp	r3, #255	@ 0xff
 8021266:	d007      	beq.n	8021278 <tcp_rexmit+0xbc>
    ++pcb->nrtx;
 8021268:	687b      	ldr	r3, [r7, #4]
 802126a:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 802126e:	3301      	adds	r3, #1
 8021270:	b2da      	uxtb	r2, r3
 8021272:	687b      	ldr	r3, [r7, #4]
 8021274:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }

  /* Don't take any rtt measurements after retransmitting. */
  pcb->rttest = 0;
 8021278:	687b      	ldr	r3, [r7, #4]
 802127a:	2200      	movs	r2, #0
 802127c:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Do the actual retransmission. */
  MIB2_STATS_INC(mib2.tcpretranssegs);
  /* No need to call tcp_output: we are always called from tcp_input()
     and thus tcp_output directly returns. */
  return ERR_OK;
 802127e:	2300      	movs	r3, #0
}
 8021280:	4618      	mov	r0, r3
 8021282:	3714      	adds	r7, #20
 8021284:	46bd      	mov	sp, r7
 8021286:	bd90      	pop	{r4, r7, pc}
 8021288:	08030074 	.word	0x08030074
 802128c:	08030770 	.word	0x08030770
 8021290:	080300c8 	.word	0x080300c8

08021294 <tcp_rexmit_fast>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
 8021294:	b580      	push	{r7, lr}
 8021296:	b082      	sub	sp, #8
 8021298:	af00      	add	r7, sp, #0
 802129a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
 802129c:	687b      	ldr	r3, [r7, #4]
 802129e:	2b00      	cmp	r3, #0
 80212a0:	d106      	bne.n	80212b0 <tcp_rexmit_fast+0x1c>
 80212a2:	4b2a      	ldr	r3, [pc, #168]	@ (802134c <tcp_rexmit_fast+0xb8>)
 80212a4:	f240 62f9 	movw	r2, #1785	@ 0x6f9
 80212a8:	4929      	ldr	r1, [pc, #164]	@ (8021350 <tcp_rexmit_fast+0xbc>)
 80212aa:	482a      	ldr	r0, [pc, #168]	@ (8021354 <tcp_rexmit_fast+0xc0>)
 80212ac:	f009 fa56 	bl	802a75c <iprintf>

  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
 80212b0:	687b      	ldr	r3, [r7, #4]
 80212b2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80212b4:	2b00      	cmp	r3, #0
 80212b6:	d045      	beq.n	8021344 <tcp_rexmit_fast+0xb0>
 80212b8:	687b      	ldr	r3, [r7, #4]
 80212ba:	8b5b      	ldrh	r3, [r3, #26]
 80212bc:	f003 0304 	and.w	r3, r3, #4
 80212c0:	2b00      	cmp	r3, #0
 80212c2:	d13f      	bne.n	8021344 <tcp_rexmit_fast+0xb0>
    LWIP_DEBUGF(TCP_FR_DEBUG,
                ("tcp_receive: dupacks %"U16_F" (%"U32_F
                 "), fast retransmit %"U32_F"\n",
                 (u16_t)pcb->dupacks, pcb->lastack,
                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
    if (tcp_rexmit(pcb) == ERR_OK) {
 80212c4:	6878      	ldr	r0, [r7, #4]
 80212c6:	f7ff ff79 	bl	80211bc <tcp_rexmit>
 80212ca:	4603      	mov	r3, r0
 80212cc:	2b00      	cmp	r3, #0
 80212ce:	d139      	bne.n	8021344 <tcp_rexmit_fast+0xb0>
      /* Set ssthresh to half of the minimum of the current
       * cwnd and the advertised window */
      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
 80212d0:	687b      	ldr	r3, [r7, #4]
 80212d2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 80212d6:	687b      	ldr	r3, [r7, #4]
 80212d8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 80212dc:	4293      	cmp	r3, r2
 80212de:	bf28      	it	cs
 80212e0:	4613      	movcs	r3, r2
 80212e2:	b29b      	uxth	r3, r3
 80212e4:	2b00      	cmp	r3, #0
 80212e6:	da00      	bge.n	80212ea <tcp_rexmit_fast+0x56>
 80212e8:	3301      	adds	r3, #1
 80212ea:	105b      	asrs	r3, r3, #1
 80212ec:	b29a      	uxth	r2, r3
 80212ee:	687b      	ldr	r3, [r7, #4]
 80212f0:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

      /* The minimum value for ssthresh should be 2 MSS */
      if (pcb->ssthresh < (2U * pcb->mss)) {
 80212f4:	687b      	ldr	r3, [r7, #4]
 80212f6:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 80212fa:	461a      	mov	r2, r3
 80212fc:	687b      	ldr	r3, [r7, #4]
 80212fe:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8021300:	005b      	lsls	r3, r3, #1
 8021302:	429a      	cmp	r2, r3
 8021304:	d206      	bcs.n	8021314 <tcp_rexmit_fast+0x80>
        LWIP_DEBUGF(TCP_FR_DEBUG,
                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
                     " should be min 2 mss %"U16_F"...\n",
                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
        pcb->ssthresh = 2 * pcb->mss;
 8021306:	687b      	ldr	r3, [r7, #4]
 8021308:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802130a:	005b      	lsls	r3, r3, #1
 802130c:	b29a      	uxth	r2, r3
 802130e:	687b      	ldr	r3, [r7, #4]
 8021310:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
      }

      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
 8021314:	687b      	ldr	r3, [r7, #4]
 8021316:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 802131a:	687b      	ldr	r3, [r7, #4]
 802131c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802131e:	4619      	mov	r1, r3
 8021320:	0049      	lsls	r1, r1, #1
 8021322:	440b      	add	r3, r1
 8021324:	b29b      	uxth	r3, r3
 8021326:	4413      	add	r3, r2
 8021328:	b29a      	uxth	r2, r3
 802132a:	687b      	ldr	r3, [r7, #4]
 802132c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
      tcp_set_flags(pcb, TF_INFR);
 8021330:	687b      	ldr	r3, [r7, #4]
 8021332:	8b5b      	ldrh	r3, [r3, #26]
 8021334:	f043 0304 	orr.w	r3, r3, #4
 8021338:	b29a      	uxth	r2, r3
 802133a:	687b      	ldr	r3, [r7, #4]
 802133c:	835a      	strh	r2, [r3, #26]

      /* Reset the retransmission timer to prevent immediate rto retransmissions */
      pcb->rtime = 0;
 802133e:	687b      	ldr	r3, [r7, #4]
 8021340:	2200      	movs	r2, #0
 8021342:	861a      	strh	r2, [r3, #48]	@ 0x30
    }
  }
}
 8021344:	bf00      	nop
 8021346:	3708      	adds	r7, #8
 8021348:	46bd      	mov	sp, r7
 802134a:	bd80      	pop	{r7, pc}
 802134c:	08030074 	.word	0x08030074
 8021350:	08030788 	.word	0x08030788
 8021354:	080300c8 	.word	0x080300c8

08021358 <tcp_output_alloc_header_common>:

static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */,
                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
 8021358:	b580      	push	{r7, lr}
 802135a:	b086      	sub	sp, #24
 802135c:	af00      	add	r7, sp, #0
 802135e:	60f8      	str	r0, [r7, #12]
 8021360:	607b      	str	r3, [r7, #4]
 8021362:	460b      	mov	r3, r1
 8021364:	817b      	strh	r3, [r7, #10]
 8021366:	4613      	mov	r3, r2
 8021368:	813b      	strh	r3, [r7, #8]
  struct tcp_hdr *tcphdr;
  struct pbuf *p;

  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
 802136a:	897a      	ldrh	r2, [r7, #10]
 802136c:	893b      	ldrh	r3, [r7, #8]
 802136e:	4413      	add	r3, r2
 8021370:	b29b      	uxth	r3, r3
 8021372:	3314      	adds	r3, #20
 8021374:	b29b      	uxth	r3, r3
 8021376:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802137a:	4619      	mov	r1, r3
 802137c:	2022      	movs	r0, #34	@ 0x22
 802137e:	f7f9 fc5f 	bl	801ac40 <pbuf_alloc>
 8021382:	6178      	str	r0, [r7, #20]
  if (p != NULL) {
 8021384:	697b      	ldr	r3, [r7, #20]
 8021386:	2b00      	cmp	r3, #0
 8021388:	d04d      	beq.n	8021426 <tcp_output_alloc_header_common+0xce>
    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
 802138a:	897b      	ldrh	r3, [r7, #10]
 802138c:	3313      	adds	r3, #19
 802138e:	697a      	ldr	r2, [r7, #20]
 8021390:	8952      	ldrh	r2, [r2, #10]
 8021392:	4293      	cmp	r3, r2
 8021394:	db06      	blt.n	80213a4 <tcp_output_alloc_header_common+0x4c>
 8021396:	4b26      	ldr	r3, [pc, #152]	@ (8021430 <tcp_output_alloc_header_common+0xd8>)
 8021398:	f240 7223 	movw	r2, #1827	@ 0x723
 802139c:	4925      	ldr	r1, [pc, #148]	@ (8021434 <tcp_output_alloc_header_common+0xdc>)
 802139e:	4826      	ldr	r0, [pc, #152]	@ (8021438 <tcp_output_alloc_header_common+0xe0>)
 80213a0:	f009 f9dc 	bl	802a75c <iprintf>
                (p->len >= TCP_HLEN + optlen));
    tcphdr = (struct tcp_hdr *)p->payload;
 80213a4:	697b      	ldr	r3, [r7, #20]
 80213a6:	685b      	ldr	r3, [r3, #4]
 80213a8:	613b      	str	r3, [r7, #16]
    tcphdr->src = lwip_htons(src_port);
 80213aa:	8c3b      	ldrh	r3, [r7, #32]
 80213ac:	4618      	mov	r0, r3
 80213ae:	f7f8 fa7b 	bl	80198a8 <lwip_htons>
 80213b2:	4603      	mov	r3, r0
 80213b4:	461a      	mov	r2, r3
 80213b6:	693b      	ldr	r3, [r7, #16]
 80213b8:	801a      	strh	r2, [r3, #0]
    tcphdr->dest = lwip_htons(dst_port);
 80213ba:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80213bc:	4618      	mov	r0, r3
 80213be:	f7f8 fa73 	bl	80198a8 <lwip_htons>
 80213c2:	4603      	mov	r3, r0
 80213c4:	461a      	mov	r2, r3
 80213c6:	693b      	ldr	r3, [r7, #16]
 80213c8:	805a      	strh	r2, [r3, #2]
    tcphdr->seqno = seqno_be;
 80213ca:	693b      	ldr	r3, [r7, #16]
 80213cc:	687a      	ldr	r2, [r7, #4]
 80213ce:	605a      	str	r2, [r3, #4]
    tcphdr->ackno = lwip_htonl(ackno);
 80213d0:	68f8      	ldr	r0, [r7, #12]
 80213d2:	f7f8 fa7e 	bl	80198d2 <lwip_htonl>
 80213d6:	4602      	mov	r2, r0
 80213d8:	693b      	ldr	r3, [r7, #16]
 80213da:	609a      	str	r2, [r3, #8]
    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
 80213dc:	897b      	ldrh	r3, [r7, #10]
 80213de:	089b      	lsrs	r3, r3, #2
 80213e0:	b29b      	uxth	r3, r3
 80213e2:	3305      	adds	r3, #5
 80213e4:	b29b      	uxth	r3, r3
 80213e6:	031b      	lsls	r3, r3, #12
 80213e8:	b29a      	uxth	r2, r3
 80213ea:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 80213ee:	b29b      	uxth	r3, r3
 80213f0:	4313      	orrs	r3, r2
 80213f2:	b29b      	uxth	r3, r3
 80213f4:	4618      	mov	r0, r3
 80213f6:	f7f8 fa57 	bl	80198a8 <lwip_htons>
 80213fa:	4603      	mov	r3, r0
 80213fc:	461a      	mov	r2, r3
 80213fe:	693b      	ldr	r3, [r7, #16]
 8021400:	819a      	strh	r2, [r3, #12]
    tcphdr->wnd = lwip_htons(wnd);
 8021402:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8021404:	4618      	mov	r0, r3
 8021406:	f7f8 fa4f 	bl	80198a8 <lwip_htons>
 802140a:	4603      	mov	r3, r0
 802140c:	461a      	mov	r2, r3
 802140e:	693b      	ldr	r3, [r7, #16]
 8021410:	81da      	strh	r2, [r3, #14]
    tcphdr->chksum = 0;
 8021412:	693b      	ldr	r3, [r7, #16]
 8021414:	2200      	movs	r2, #0
 8021416:	741a      	strb	r2, [r3, #16]
 8021418:	2200      	movs	r2, #0
 802141a:	745a      	strb	r2, [r3, #17]
    tcphdr->urgp = 0;
 802141c:	693b      	ldr	r3, [r7, #16]
 802141e:	2200      	movs	r2, #0
 8021420:	749a      	strb	r2, [r3, #18]
 8021422:	2200      	movs	r2, #0
 8021424:	74da      	strb	r2, [r3, #19]
  }
  return p;
 8021426:	697b      	ldr	r3, [r7, #20]
}
 8021428:	4618      	mov	r0, r3
 802142a:	3718      	adds	r7, #24
 802142c:	46bd      	mov	sp, r7
 802142e:	bd80      	pop	{r7, pc}
 8021430:	08030074 	.word	0x08030074
 8021434:	080307a8 	.word	0x080307a8
 8021438:	080300c8 	.word	0x080300c8

0802143c <tcp_output_alloc_header>:
 * @return pbuf with p->payload being the tcp_hdr
 */
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */)
{
 802143c:	b5b0      	push	{r4, r5, r7, lr}
 802143e:	b08a      	sub	sp, #40	@ 0x28
 8021440:	af04      	add	r7, sp, #16
 8021442:	60f8      	str	r0, [r7, #12]
 8021444:	607b      	str	r3, [r7, #4]
 8021446:	460b      	mov	r3, r1
 8021448:	817b      	strh	r3, [r7, #10]
 802144a:	4613      	mov	r3, r2
 802144c:	813b      	strh	r3, [r7, #8]
  struct pbuf *p;

  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
 802144e:	68fb      	ldr	r3, [r7, #12]
 8021450:	2b00      	cmp	r3, #0
 8021452:	d106      	bne.n	8021462 <tcp_output_alloc_header+0x26>
 8021454:	4b15      	ldr	r3, [pc, #84]	@ (80214ac <tcp_output_alloc_header+0x70>)
 8021456:	f240 7242 	movw	r2, #1858	@ 0x742
 802145a:	4915      	ldr	r1, [pc, #84]	@ (80214b0 <tcp_output_alloc_header+0x74>)
 802145c:	4815      	ldr	r0, [pc, #84]	@ (80214b4 <tcp_output_alloc_header+0x78>)
 802145e:	f009 f97d 	bl	802a75c <iprintf>

  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
 8021462:	68fb      	ldr	r3, [r7, #12]
 8021464:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8021466:	68fb      	ldr	r3, [r7, #12]
 8021468:	8adb      	ldrh	r3, [r3, #22]
 802146a:	68fa      	ldr	r2, [r7, #12]
 802146c:	8b12      	ldrh	r2, [r2, #24]
 802146e:	68f9      	ldr	r1, [r7, #12]
 8021470:	8d49      	ldrh	r1, [r1, #42]	@ 0x2a
 8021472:	893d      	ldrh	r5, [r7, #8]
 8021474:	897c      	ldrh	r4, [r7, #10]
 8021476:	9103      	str	r1, [sp, #12]
 8021478:	2110      	movs	r1, #16
 802147a:	9102      	str	r1, [sp, #8]
 802147c:	9201      	str	r2, [sp, #4]
 802147e:	9300      	str	r3, [sp, #0]
 8021480:	687b      	ldr	r3, [r7, #4]
 8021482:	462a      	mov	r2, r5
 8021484:	4621      	mov	r1, r4
 8021486:	f7ff ff67 	bl	8021358 <tcp_output_alloc_header_common>
 802148a:	6178      	str	r0, [r7, #20]
    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
  if (p != NULL) {
 802148c:	697b      	ldr	r3, [r7, #20]
 802148e:	2b00      	cmp	r3, #0
 8021490:	d006      	beq.n	80214a0 <tcp_output_alloc_header+0x64>
    /* If we're sending a packet, update the announced right window edge */
    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8021492:	68fb      	ldr	r3, [r7, #12]
 8021494:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021496:	68fa      	ldr	r2, [r7, #12]
 8021498:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 802149a:	441a      	add	r2, r3
 802149c:	68fb      	ldr	r3, [r7, #12]
 802149e:	62da      	str	r2, [r3, #44]	@ 0x2c
  }
  return p;
 80214a0:	697b      	ldr	r3, [r7, #20]
}
 80214a2:	4618      	mov	r0, r3
 80214a4:	3718      	adds	r7, #24
 80214a6:	46bd      	mov	sp, r7
 80214a8:	bdb0      	pop	{r4, r5, r7, pc}
 80214aa:	bf00      	nop
 80214ac:	08030074 	.word	0x08030074
 80214b0:	080307d8 	.word	0x080307d8
 80214b4:	080300c8 	.word	0x080300c8

080214b8 <tcp_output_fill_options>:

/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
 80214b8:	b580      	push	{r7, lr}
 80214ba:	b088      	sub	sp, #32
 80214bc:	af00      	add	r7, sp, #0
 80214be:	60f8      	str	r0, [r7, #12]
 80214c0:	60b9      	str	r1, [r7, #8]
 80214c2:	4611      	mov	r1, r2
 80214c4:	461a      	mov	r2, r3
 80214c6:	460b      	mov	r3, r1
 80214c8:	71fb      	strb	r3, [r7, #7]
 80214ca:	4613      	mov	r3, r2
 80214cc:	71bb      	strb	r3, [r7, #6]
  struct tcp_hdr *tcphdr;
  u32_t *opts;
  u16_t sacks_len = 0;
 80214ce:	2300      	movs	r3, #0
 80214d0:	83fb      	strh	r3, [r7, #30]

  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
 80214d2:	68bb      	ldr	r3, [r7, #8]
 80214d4:	2b00      	cmp	r3, #0
 80214d6:	d106      	bne.n	80214e6 <tcp_output_fill_options+0x2e>
 80214d8:	4b12      	ldr	r3, [pc, #72]	@ (8021524 <tcp_output_fill_options+0x6c>)
 80214da:	f240 7256 	movw	r2, #1878	@ 0x756
 80214de:	4912      	ldr	r1, [pc, #72]	@ (8021528 <tcp_output_fill_options+0x70>)
 80214e0:	4812      	ldr	r0, [pc, #72]	@ (802152c <tcp_output_fill_options+0x74>)
 80214e2:	f009 f93b 	bl	802a75c <iprintf>

  tcphdr = (struct tcp_hdr *)p->payload;
 80214e6:	68bb      	ldr	r3, [r7, #8]
 80214e8:	685b      	ldr	r3, [r3, #4]
 80214ea:	61bb      	str	r3, [r7, #24]
  opts = (u32_t *)(void *)(tcphdr + 1);
 80214ec:	69bb      	ldr	r3, [r7, #24]
 80214ee:	3314      	adds	r3, #20
 80214f0:	617b      	str	r3, [r7, #20]
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif

  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(sacks_len);
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
 80214f2:	8bfb      	ldrh	r3, [r7, #30]
 80214f4:	009b      	lsls	r3, r3, #2
 80214f6:	461a      	mov	r2, r3
 80214f8:	79fb      	ldrb	r3, [r7, #7]
 80214fa:	009b      	lsls	r3, r3, #2
 80214fc:	f003 0304 	and.w	r3, r3, #4
 8021500:	4413      	add	r3, r2
 8021502:	3314      	adds	r3, #20
 8021504:	69ba      	ldr	r2, [r7, #24]
 8021506:	4413      	add	r3, r2
 8021508:	697a      	ldr	r2, [r7, #20]
 802150a:	429a      	cmp	r2, r3
 802150c:	d006      	beq.n	802151c <tcp_output_fill_options+0x64>
 802150e:	4b05      	ldr	r3, [pc, #20]	@ (8021524 <tcp_output_fill_options+0x6c>)
 8021510:	f240 7275 	movw	r2, #1909	@ 0x775
 8021514:	4906      	ldr	r1, [pc, #24]	@ (8021530 <tcp_output_fill_options+0x78>)
 8021516:	4805      	ldr	r0, [pc, #20]	@ (802152c <tcp_output_fill_options+0x74>)
 8021518:	f009 f920 	bl	802a75c <iprintf>
  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
 802151c:	bf00      	nop
 802151e:	3720      	adds	r7, #32
 8021520:	46bd      	mov	sp, r7
 8021522:	bd80      	pop	{r7, pc}
 8021524:	08030074 	.word	0x08030074
 8021528:	08030800 	.word	0x08030800
 802152c:	080300c8 	.word	0x080300c8
 8021530:	080306f8 	.word	0x080306f8

08021534 <tcp_output_control_segment>:
 * header checksum and calling ip_output_if while handling netif hints and stats.
 */
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
                           const ip_addr_t *src, const ip_addr_t *dst)
{
 8021534:	b580      	push	{r7, lr}
 8021536:	b08a      	sub	sp, #40	@ 0x28
 8021538:	af04      	add	r7, sp, #16
 802153a:	60f8      	str	r0, [r7, #12]
 802153c:	60b9      	str	r1, [r7, #8]
 802153e:	607a      	str	r2, [r7, #4]
 8021540:	603b      	str	r3, [r7, #0]
  err_t err;
  struct netif *netif;

  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
 8021542:	68bb      	ldr	r3, [r7, #8]
 8021544:	2b00      	cmp	r3, #0
 8021546:	d106      	bne.n	8021556 <tcp_output_control_segment+0x22>
 8021548:	4b1c      	ldr	r3, [pc, #112]	@ (80215bc <tcp_output_control_segment+0x88>)
 802154a:	f240 7287 	movw	r2, #1927	@ 0x787
 802154e:	491c      	ldr	r1, [pc, #112]	@ (80215c0 <tcp_output_control_segment+0x8c>)
 8021550:	481c      	ldr	r0, [pc, #112]	@ (80215c4 <tcp_output_control_segment+0x90>)
 8021552:	f009 f903 	bl	802a75c <iprintf>

  netif = tcp_route(pcb, src, dst);
 8021556:	683a      	ldr	r2, [r7, #0]
 8021558:	6879      	ldr	r1, [r7, #4]
 802155a:	68f8      	ldr	r0, [r7, #12]
 802155c:	f7fe fa78 	bl	801fa50 <tcp_route>
 8021560:	6138      	str	r0, [r7, #16]
  if (netif == NULL) {
 8021562:	693b      	ldr	r3, [r7, #16]
 8021564:	2b00      	cmp	r3, #0
 8021566:	d102      	bne.n	802156e <tcp_output_control_segment+0x3a>
    err = ERR_RTE;
 8021568:	23fc      	movs	r3, #252	@ 0xfc
 802156a:	75fb      	strb	r3, [r7, #23]
 802156c:	e01c      	b.n	80215a8 <tcp_output_control_segment+0x74>
      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
                                        src, dst);
    }
#endif
    if (pcb != NULL) {
 802156e:	68fb      	ldr	r3, [r7, #12]
 8021570:	2b00      	cmp	r3, #0
 8021572:	d006      	beq.n	8021582 <tcp_output_control_segment+0x4e>
      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
      ttl = pcb->ttl;
 8021574:	68fb      	ldr	r3, [r7, #12]
 8021576:	7adb      	ldrb	r3, [r3, #11]
 8021578:	75bb      	strb	r3, [r7, #22]
      tos = pcb->tos;
 802157a:	68fb      	ldr	r3, [r7, #12]
 802157c:	7a9b      	ldrb	r3, [r3, #10]
 802157e:	757b      	strb	r3, [r7, #21]
 8021580:	e003      	b.n	802158a <tcp_output_control_segment+0x56>
    } else {
      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
      ttl = TCP_TTL;
 8021582:	23ff      	movs	r3, #255	@ 0xff
 8021584:	75bb      	strb	r3, [r7, #22]
      tos = 0;
 8021586:	2300      	movs	r3, #0
 8021588:	757b      	strb	r3, [r7, #21]
    }
    TCP_STATS_INC(tcp.xmit);
    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
 802158a:	7dba      	ldrb	r2, [r7, #22]
 802158c:	693b      	ldr	r3, [r7, #16]
 802158e:	9302      	str	r3, [sp, #8]
 8021590:	2306      	movs	r3, #6
 8021592:	9301      	str	r3, [sp, #4]
 8021594:	7d7b      	ldrb	r3, [r7, #21]
 8021596:	9300      	str	r3, [sp, #0]
 8021598:	4613      	mov	r3, r2
 802159a:	683a      	ldr	r2, [r7, #0]
 802159c:	6879      	ldr	r1, [r7, #4]
 802159e:	68b8      	ldr	r0, [r7, #8]
 80215a0:	f004 faac 	bl	8025afc <ip4_output_if>
 80215a4:	4603      	mov	r3, r0
 80215a6:	75fb      	strb	r3, [r7, #23]
    NETIF_RESET_HINTS(netif);
  }
  pbuf_free(p);
 80215a8:	68b8      	ldr	r0, [r7, #8]
 80215aa:	f7f9 fe5f 	bl	801b26c <pbuf_free>
  return err;
 80215ae:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 80215b2:	4618      	mov	r0, r3
 80215b4:	3718      	adds	r7, #24
 80215b6:	46bd      	mov	sp, r7
 80215b8:	bd80      	pop	{r7, pc}
 80215ba:	bf00      	nop
 80215bc:	08030074 	.word	0x08030074
 80215c0:	08030828 	.word	0x08030828
 80215c4:	080300c8 	.word	0x080300c8

080215c8 <tcp_rst>:
 */
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
        u16_t local_port, u16_t remote_port)
{
 80215c8:	b590      	push	{r4, r7, lr}
 80215ca:	b08b      	sub	sp, #44	@ 0x2c
 80215cc:	af04      	add	r7, sp, #16
 80215ce:	60f8      	str	r0, [r7, #12]
 80215d0:	60b9      	str	r1, [r7, #8]
 80215d2:	607a      	str	r2, [r7, #4]
 80215d4:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  u16_t wnd;
  u8_t optlen;

  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
 80215d6:	683b      	ldr	r3, [r7, #0]
 80215d8:	2b00      	cmp	r3, #0
 80215da:	d106      	bne.n	80215ea <tcp_rst+0x22>
 80215dc:	4b1f      	ldr	r3, [pc, #124]	@ (802165c <tcp_rst+0x94>)
 80215de:	f240 72c4 	movw	r2, #1988	@ 0x7c4
 80215e2:	491f      	ldr	r1, [pc, #124]	@ (8021660 <tcp_rst+0x98>)
 80215e4:	481f      	ldr	r0, [pc, #124]	@ (8021664 <tcp_rst+0x9c>)
 80215e6:	f009 f8b9 	bl	802a75c <iprintf>
  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
 80215ea:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80215ec:	2b00      	cmp	r3, #0
 80215ee:	d106      	bne.n	80215fe <tcp_rst+0x36>
 80215f0:	4b1a      	ldr	r3, [pc, #104]	@ (802165c <tcp_rst+0x94>)
 80215f2:	f240 72c5 	movw	r2, #1989	@ 0x7c5
 80215f6:	491c      	ldr	r1, [pc, #112]	@ (8021668 <tcp_rst+0xa0>)
 80215f8:	481a      	ldr	r0, [pc, #104]	@ (8021664 <tcp_rst+0x9c>)
 80215fa:	f009 f8af 	bl	802a75c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80215fe:	2300      	movs	r3, #0
 8021600:	75fb      	strb	r3, [r7, #23]

#if LWIP_WND_SCALE
  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
  wnd = PP_HTONS(TCP_WND);
 8021602:	f24d 0316 	movw	r3, #53270	@ 0xd016
 8021606:	82bb      	strh	r3, [r7, #20]
#endif

  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
 8021608:	7dfb      	ldrb	r3, [r7, #23]
 802160a:	b29c      	uxth	r4, r3
 802160c:	68b8      	ldr	r0, [r7, #8]
 802160e:	f7f8 f960 	bl	80198d2 <lwip_htonl>
 8021612:	4602      	mov	r2, r0
 8021614:	8abb      	ldrh	r3, [r7, #20]
 8021616:	9303      	str	r3, [sp, #12]
 8021618:	2314      	movs	r3, #20
 802161a:	9302      	str	r3, [sp, #8]
 802161c:	8e3b      	ldrh	r3, [r7, #48]	@ 0x30
 802161e:	9301      	str	r3, [sp, #4]
 8021620:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8021622:	9300      	str	r3, [sp, #0]
 8021624:	4613      	mov	r3, r2
 8021626:	2200      	movs	r2, #0
 8021628:	4621      	mov	r1, r4
 802162a:	6878      	ldr	r0, [r7, #4]
 802162c:	f7ff fe94 	bl	8021358 <tcp_output_alloc_header_common>
 8021630:	6138      	str	r0, [r7, #16]
    remote_port, TCP_RST | TCP_ACK, wnd);
  if (p == NULL) {
 8021632:	693b      	ldr	r3, [r7, #16]
 8021634:	2b00      	cmp	r3, #0
 8021636:	d00c      	beq.n	8021652 <tcp_rst+0x8a>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
    return;
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8021638:	7dfb      	ldrb	r3, [r7, #23]
 802163a:	2200      	movs	r2, #0
 802163c:	6939      	ldr	r1, [r7, #16]
 802163e:	68f8      	ldr	r0, [r7, #12]
 8021640:	f7ff ff3a 	bl	80214b8 <tcp_output_fill_options>

  MIB2_STATS_INC(mib2.tcpoutrsts);

  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
 8021644:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8021646:	683a      	ldr	r2, [r7, #0]
 8021648:	6939      	ldr	r1, [r7, #16]
 802164a:	68f8      	ldr	r0, [r7, #12]
 802164c:	f7ff ff72 	bl	8021534 <tcp_output_control_segment>
 8021650:	e000      	b.n	8021654 <tcp_rst+0x8c>
    return;
 8021652:	bf00      	nop
  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
 8021654:	371c      	adds	r7, #28
 8021656:	46bd      	mov	sp, r7
 8021658:	bd90      	pop	{r4, r7, pc}
 802165a:	bf00      	nop
 802165c:	08030074 	.word	0x08030074
 8021660:	08030854 	.word	0x08030854
 8021664:	080300c8 	.word	0x080300c8
 8021668:	08030870 	.word	0x08030870

0802166c <tcp_send_empty_ack>:
 *
 * @param pcb Protocol control block for the TCP connection to send the ACK
 */
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
 802166c:	b590      	push	{r4, r7, lr}
 802166e:	b087      	sub	sp, #28
 8021670:	af00      	add	r7, sp, #0
 8021672:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen, optflags = 0;
 8021674:	2300      	movs	r3, #0
 8021676:	75fb      	strb	r3, [r7, #23]
  u8_t num_sacks = 0;
 8021678:	2300      	movs	r3, #0
 802167a:	75bb      	strb	r3, [r7, #22]

  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
 802167c:	687b      	ldr	r3, [r7, #4]
 802167e:	2b00      	cmp	r3, #0
 8021680:	d106      	bne.n	8021690 <tcp_send_empty_ack+0x24>
 8021682:	4b28      	ldr	r3, [pc, #160]	@ (8021724 <tcp_send_empty_ack+0xb8>)
 8021684:	f240 72ea 	movw	r2, #2026	@ 0x7ea
 8021688:	4927      	ldr	r1, [pc, #156]	@ (8021728 <tcp_send_empty_ack+0xbc>)
 802168a:	4828      	ldr	r0, [pc, #160]	@ (802172c <tcp_send_empty_ack+0xc0>)
 802168c:	f009 f866 	bl	802a75c <iprintf>
#if LWIP_TCP_TIMESTAMPS
  if (pcb->flags & TF_TIMESTAMP) {
    optflags = TF_SEG_OPTS_TS;
  }
#endif
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8021690:	7dfb      	ldrb	r3, [r7, #23]
 8021692:	009b      	lsls	r3, r3, #2
 8021694:	b2db      	uxtb	r3, r3
 8021696:	f003 0304 	and.w	r3, r3, #4
 802169a:	757b      	strb	r3, [r7, #21]
  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
  }
#endif

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
 802169c:	7d7b      	ldrb	r3, [r7, #21]
 802169e:	b29c      	uxth	r4, r3
 80216a0:	687b      	ldr	r3, [r7, #4]
 80216a2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80216a4:	4618      	mov	r0, r3
 80216a6:	f7f8 f914 	bl	80198d2 <lwip_htonl>
 80216aa:	4603      	mov	r3, r0
 80216ac:	2200      	movs	r2, #0
 80216ae:	4621      	mov	r1, r4
 80216b0:	6878      	ldr	r0, [r7, #4]
 80216b2:	f7ff fec3 	bl	802143c <tcp_output_alloc_header>
 80216b6:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 80216b8:	693b      	ldr	r3, [r7, #16]
 80216ba:	2b00      	cmp	r3, #0
 80216bc:	d109      	bne.n	80216d2 <tcp_send_empty_ack+0x66>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80216be:	687b      	ldr	r3, [r7, #4]
 80216c0:	8b5b      	ldrh	r3, [r3, #26]
 80216c2:	f043 0303 	orr.w	r3, r3, #3
 80216c6:	b29a      	uxth	r2, r3
 80216c8:	687b      	ldr	r3, [r7, #4]
 80216ca:	835a      	strh	r2, [r3, #26]
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
    return ERR_BUF;
 80216cc:	f06f 0301 	mvn.w	r3, #1
 80216d0:	e023      	b.n	802171a <tcp_send_empty_ack+0xae>
  }
  tcp_output_fill_options(pcb, p, optflags, num_sacks);
 80216d2:	7dbb      	ldrb	r3, [r7, #22]
 80216d4:	7dfa      	ldrb	r2, [r7, #23]
 80216d6:	6939      	ldr	r1, [r7, #16]
 80216d8:	6878      	ldr	r0, [r7, #4]
 80216da:	f7ff feed 	bl	80214b8 <tcp_output_fill_options>
  pcb->ts_lastacksent = pcb->rcv_nxt;
#endif

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 80216de:	687a      	ldr	r2, [r7, #4]
 80216e0:	687b      	ldr	r3, [r7, #4]
 80216e2:	3304      	adds	r3, #4
 80216e4:	6939      	ldr	r1, [r7, #16]
 80216e6:	6878      	ldr	r0, [r7, #4]
 80216e8:	f7ff ff24 	bl	8021534 <tcp_output_control_segment>
 80216ec:	4603      	mov	r3, r0
 80216ee:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 80216f0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80216f4:	2b00      	cmp	r3, #0
 80216f6:	d007      	beq.n	8021708 <tcp_send_empty_ack+0x9c>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80216f8:	687b      	ldr	r3, [r7, #4]
 80216fa:	8b5b      	ldrh	r3, [r3, #26]
 80216fc:	f043 0303 	orr.w	r3, r3, #3
 8021700:	b29a      	uxth	r2, r3
 8021702:	687b      	ldr	r3, [r7, #4]
 8021704:	835a      	strh	r2, [r3, #26]
 8021706:	e006      	b.n	8021716 <tcp_send_empty_ack+0xaa>
  } else {
    /* remove ACK flags from the PCB, as we sent an empty ACK now */
    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8021708:	687b      	ldr	r3, [r7, #4]
 802170a:	8b5b      	ldrh	r3, [r3, #26]
 802170c:	f023 0303 	bic.w	r3, r3, #3
 8021710:	b29a      	uxth	r2, r3
 8021712:	687b      	ldr	r3, [r7, #4]
 8021714:	835a      	strh	r2, [r3, #26]
  }

  return err;
 8021716:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 802171a:	4618      	mov	r0, r3
 802171c:	371c      	adds	r7, #28
 802171e:	46bd      	mov	sp, r7
 8021720:	bd90      	pop	{r4, r7, pc}
 8021722:	bf00      	nop
 8021724:	08030074 	.word	0x08030074
 8021728:	0803088c 	.word	0x0803088c
 802172c:	080300c8 	.word	0x080300c8

08021730 <tcp_keepalive>:
 *
 * @param pcb the tcp_pcb for which to send a keepalive packet
 */
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
 8021730:	b590      	push	{r4, r7, lr}
 8021732:	b085      	sub	sp, #20
 8021734:	af00      	add	r7, sp, #0
 8021736:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8021738:	2300      	movs	r3, #0
 802173a:	72bb      	strb	r3, [r7, #10]

  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
 802173c:	687b      	ldr	r3, [r7, #4]
 802173e:	2b00      	cmp	r3, #0
 8021740:	d106      	bne.n	8021750 <tcp_keepalive+0x20>
 8021742:	4b18      	ldr	r3, [pc, #96]	@ (80217a4 <tcp_keepalive+0x74>)
 8021744:	f640 0224 	movw	r2, #2084	@ 0x824
 8021748:	4917      	ldr	r1, [pc, #92]	@ (80217a8 <tcp_keepalive+0x78>)
 802174a:	4818      	ldr	r0, [pc, #96]	@ (80217ac <tcp_keepalive+0x7c>)
 802174c:	f009 f806 	bl	802a75c <iprintf>
  LWIP_DEBUGF(TCP_DEBUG, ("\n"));

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
 8021750:	7abb      	ldrb	r3, [r7, #10]
 8021752:	b29c      	uxth	r4, r3
 8021754:	687b      	ldr	r3, [r7, #4]
 8021756:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8021758:	3b01      	subs	r3, #1
 802175a:	4618      	mov	r0, r3
 802175c:	f7f8 f8b9 	bl	80198d2 <lwip_htonl>
 8021760:	4603      	mov	r3, r0
 8021762:	2200      	movs	r2, #0
 8021764:	4621      	mov	r1, r4
 8021766:	6878      	ldr	r0, [r7, #4]
 8021768:	f7ff fe68 	bl	802143c <tcp_output_alloc_header>
 802176c:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 802176e:	68fb      	ldr	r3, [r7, #12]
 8021770:	2b00      	cmp	r3, #0
 8021772:	d102      	bne.n	802177a <tcp_keepalive+0x4a>
    LWIP_DEBUGF(TCP_DEBUG,
                ("tcp_keepalive: could not allocate memory for pbuf\n"));
    return ERR_MEM;
 8021774:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021778:	e010      	b.n	802179c <tcp_keepalive+0x6c>
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 802177a:	7abb      	ldrb	r3, [r7, #10]
 802177c:	2200      	movs	r2, #0
 802177e:	68f9      	ldr	r1, [r7, #12]
 8021780:	6878      	ldr	r0, [r7, #4]
 8021782:	f7ff fe99 	bl	80214b8 <tcp_output_fill_options>
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8021786:	687a      	ldr	r2, [r7, #4]
 8021788:	687b      	ldr	r3, [r7, #4]
 802178a:	3304      	adds	r3, #4
 802178c:	68f9      	ldr	r1, [r7, #12]
 802178e:	6878      	ldr	r0, [r7, #4]
 8021790:	f7ff fed0 	bl	8021534 <tcp_output_control_segment>
 8021794:	4603      	mov	r3, r0
 8021796:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8021798:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 802179c:	4618      	mov	r0, r3
 802179e:	3714      	adds	r7, #20
 80217a0:	46bd      	mov	sp, r7
 80217a2:	bd90      	pop	{r4, r7, pc}
 80217a4:	08030074 	.word	0x08030074
 80217a8:	080308ac 	.word	0x080308ac
 80217ac:	080300c8 	.word	0x080300c8

080217b0 <tcp_zero_window_probe>:
 *
 * @param pcb the tcp_pcb for which to send a zero-window probe packet
 */
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
 80217b0:	b590      	push	{r4, r7, lr}
 80217b2:	b08b      	sub	sp, #44	@ 0x2c
 80217b4:	af00      	add	r7, sp, #0
 80217b6:	6078      	str	r0, [r7, #4]
  struct tcp_hdr *tcphdr;
  struct tcp_seg *seg;
  u16_t len;
  u8_t is_fin;
  u32_t snd_nxt;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80217b8:	2300      	movs	r3, #0
 80217ba:	74fb      	strb	r3, [r7, #19]

  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
 80217bc:	687b      	ldr	r3, [r7, #4]
 80217be:	2b00      	cmp	r3, #0
 80217c0:	d106      	bne.n	80217d0 <tcp_zero_window_probe+0x20>
 80217c2:	4b4d      	ldr	r3, [pc, #308]	@ (80218f8 <tcp_zero_window_probe+0x148>)
 80217c4:	f640 024f 	movw	r2, #2127	@ 0x84f
 80217c8:	494c      	ldr	r1, [pc, #304]	@ (80218fc <tcp_zero_window_probe+0x14c>)
 80217ca:	484d      	ldr	r0, [pc, #308]	@ (8021900 <tcp_zero_window_probe+0x150>)
 80217cc:	f008 ffc6 	bl	802a75c <iprintf>
              ("tcp_zero_window_probe: tcp_ticks %"U32_F
               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  /* Only consider unsent, persist timer should be off when there is data in-flight */
  seg = pcb->unsent;
 80217d0:	687b      	ldr	r3, [r7, #4]
 80217d2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80217d4:	627b      	str	r3, [r7, #36]	@ 0x24
  if (seg == NULL) {
 80217d6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80217d8:	2b00      	cmp	r3, #0
 80217da:	d101      	bne.n	80217e0 <tcp_zero_window_probe+0x30>
    /* Not expected, persist timer should be off when the send buffer is empty */
    return ERR_OK;
 80217dc:	2300      	movs	r3, #0
 80217de:	e087      	b.n	80218f0 <tcp_zero_window_probe+0x140>

  /* increment probe count. NOTE: we record probe even if it fails
     to actually transmit due to an error. This ensures memory exhaustion/
     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
     RTO mechanism has similar behavior, see pcb->nrtx */
  if (pcb->persist_probe < 0xFF) {
 80217e0:	687b      	ldr	r3, [r7, #4]
 80217e2:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 80217e6:	2bff      	cmp	r3, #255	@ 0xff
 80217e8:	d007      	beq.n	80217fa <tcp_zero_window_probe+0x4a>
    ++pcb->persist_probe;
 80217ea:	687b      	ldr	r3, [r7, #4]
 80217ec:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 80217f0:	3301      	adds	r3, #1
 80217f2:	b2da      	uxtb	r2, r3
 80217f4:	687b      	ldr	r3, [r7, #4]
 80217f6:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
  }

  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
 80217fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80217fc:	691b      	ldr	r3, [r3, #16]
 80217fe:	899b      	ldrh	r3, [r3, #12]
 8021800:	b29b      	uxth	r3, r3
 8021802:	4618      	mov	r0, r3
 8021804:	f7f8 f850 	bl	80198a8 <lwip_htons>
 8021808:	4603      	mov	r3, r0
 802180a:	b2db      	uxtb	r3, r3
 802180c:	f003 0301 	and.w	r3, r3, #1
 8021810:	2b00      	cmp	r3, #0
 8021812:	d005      	beq.n	8021820 <tcp_zero_window_probe+0x70>
 8021814:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021816:	891b      	ldrh	r3, [r3, #8]
 8021818:	2b00      	cmp	r3, #0
 802181a:	d101      	bne.n	8021820 <tcp_zero_window_probe+0x70>
 802181c:	2301      	movs	r3, #1
 802181e:	e000      	b.n	8021822 <tcp_zero_window_probe+0x72>
 8021820:	2300      	movs	r3, #0
 8021822:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* we want to send one seqno: either FIN or data (no options) */
  len = is_fin ? 0 : 1;
 8021826:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802182a:	2b00      	cmp	r3, #0
 802182c:	bf0c      	ite	eq
 802182e:	2301      	moveq	r3, #1
 8021830:	2300      	movne	r3, #0
 8021832:	b2db      	uxtb	r3, r3
 8021834:	843b      	strh	r3, [r7, #32]

  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
 8021836:	7cfb      	ldrb	r3, [r7, #19]
 8021838:	b299      	uxth	r1, r3
 802183a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802183c:	691b      	ldr	r3, [r3, #16]
 802183e:	685b      	ldr	r3, [r3, #4]
 8021840:	8c3a      	ldrh	r2, [r7, #32]
 8021842:	6878      	ldr	r0, [r7, #4]
 8021844:	f7ff fdfa 	bl	802143c <tcp_output_alloc_header>
 8021848:	61f8      	str	r0, [r7, #28]
  if (p == NULL) {
 802184a:	69fb      	ldr	r3, [r7, #28]
 802184c:	2b00      	cmp	r3, #0
 802184e:	d102      	bne.n	8021856 <tcp_zero_window_probe+0xa6>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
    return ERR_MEM;
 8021850:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021854:	e04c      	b.n	80218f0 <tcp_zero_window_probe+0x140>
  }
  tcphdr = (struct tcp_hdr *)p->payload;
 8021856:	69fb      	ldr	r3, [r7, #28]
 8021858:	685b      	ldr	r3, [r3, #4]
 802185a:	61bb      	str	r3, [r7, #24]

  if (is_fin) {
 802185c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8021860:	2b00      	cmp	r3, #0
 8021862:	d011      	beq.n	8021888 <tcp_zero_window_probe+0xd8>
    /* FIN segment, no data */
    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
 8021864:	69bb      	ldr	r3, [r7, #24]
 8021866:	899b      	ldrh	r3, [r3, #12]
 8021868:	b29b      	uxth	r3, r3
 802186a:	b21b      	sxth	r3, r3
 802186c:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 8021870:	b21c      	sxth	r4, r3
 8021872:	2011      	movs	r0, #17
 8021874:	f7f8 f818 	bl	80198a8 <lwip_htons>
 8021878:	4603      	mov	r3, r0
 802187a:	b21b      	sxth	r3, r3
 802187c:	4323      	orrs	r3, r4
 802187e:	b21b      	sxth	r3, r3
 8021880:	b29a      	uxth	r2, r3
 8021882:	69bb      	ldr	r3, [r7, #24]
 8021884:	819a      	strh	r2, [r3, #12]
 8021886:	e010      	b.n	80218aa <tcp_zero_window_probe+0xfa>
  } else {
    /* Data segment, copy in one byte from the head of the unacked queue */
    char *d = ((char *)p->payload + TCP_HLEN);
 8021888:	69fb      	ldr	r3, [r7, #28]
 802188a:	685b      	ldr	r3, [r3, #4]
 802188c:	3314      	adds	r3, #20
 802188e:	617b      	str	r3, [r7, #20]
    /* Depending on whether the segment has already been sent (unacked) or not
       (unsent), seg->p->payload points to the IP header or TCP header.
       Ensure we copy the first TCP data byte: */
    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
 8021890:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021892:	6858      	ldr	r0, [r3, #4]
 8021894:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021896:	685b      	ldr	r3, [r3, #4]
 8021898:	891a      	ldrh	r2, [r3, #8]
 802189a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802189c:	891b      	ldrh	r3, [r3, #8]
 802189e:	1ad3      	subs	r3, r2, r3
 80218a0:	b29b      	uxth	r3, r3
 80218a2:	2201      	movs	r2, #1
 80218a4:	6979      	ldr	r1, [r7, #20]
 80218a6:	f7f9 fee7 	bl	801b678 <pbuf_copy_partial>
  }

  /* The byte may be acknowledged without the window being opened. */
  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
 80218aa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80218ac:	691b      	ldr	r3, [r3, #16]
 80218ae:	685b      	ldr	r3, [r3, #4]
 80218b0:	4618      	mov	r0, r3
 80218b2:	f7f8 f80e 	bl	80198d2 <lwip_htonl>
 80218b6:	4603      	mov	r3, r0
 80218b8:	3301      	adds	r3, #1
 80218ba:	60fb      	str	r3, [r7, #12]
  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 80218bc:	687b      	ldr	r3, [r7, #4]
 80218be:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 80218c0:	68fb      	ldr	r3, [r7, #12]
 80218c2:	1ad3      	subs	r3, r2, r3
 80218c4:	2b00      	cmp	r3, #0
 80218c6:	da02      	bge.n	80218ce <tcp_zero_window_probe+0x11e>
    pcb->snd_nxt = snd_nxt;
 80218c8:	687b      	ldr	r3, [r7, #4]
 80218ca:	68fa      	ldr	r2, [r7, #12]
 80218cc:	651a      	str	r2, [r3, #80]	@ 0x50
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 80218ce:	7cfb      	ldrb	r3, [r7, #19]
 80218d0:	2200      	movs	r2, #0
 80218d2:	69f9      	ldr	r1, [r7, #28]
 80218d4:	6878      	ldr	r0, [r7, #4]
 80218d6:	f7ff fdef 	bl	80214b8 <tcp_output_fill_options>

  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 80218da:	687a      	ldr	r2, [r7, #4]
 80218dc:	687b      	ldr	r3, [r7, #4]
 80218de:	3304      	adds	r3, #4
 80218e0:	69f9      	ldr	r1, [r7, #28]
 80218e2:	6878      	ldr	r0, [r7, #4]
 80218e4:	f7ff fe26 	bl	8021534 <tcp_output_control_segment>
 80218e8:	4603      	mov	r3, r0
 80218ea:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
                          " ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 80218ec:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 80218f0:	4618      	mov	r0, r3
 80218f2:	372c      	adds	r7, #44	@ 0x2c
 80218f4:	46bd      	mov	sp, r7
 80218f6:	bd90      	pop	{r4, r7, pc}
 80218f8:	08030074 	.word	0x08030074
 80218fc:	080308c8 	.word	0x080308c8
 8021900:	080300c8 	.word	0x080300c8

08021904 <tcpip_tcp_timer>:
 *
 * @param arg unused argument
 */
static void
tcpip_tcp_timer(void *arg)
{
 8021904:	b580      	push	{r7, lr}
 8021906:	b082      	sub	sp, #8
 8021908:	af00      	add	r7, sp, #0
 802190a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);

  /* call TCP timer handler */
  tcp_tmr();
 802190c:	f7f9 ffa2 	bl	801b854 <tcp_tmr>
  /* timer still needed? */
  if (tcp_active_pcbs || tcp_tw_pcbs) {
 8021910:	4b0a      	ldr	r3, [pc, #40]	@ (802193c <tcpip_tcp_timer+0x38>)
 8021912:	681b      	ldr	r3, [r3, #0]
 8021914:	2b00      	cmp	r3, #0
 8021916:	d103      	bne.n	8021920 <tcpip_tcp_timer+0x1c>
 8021918:	4b09      	ldr	r3, [pc, #36]	@ (8021940 <tcpip_tcp_timer+0x3c>)
 802191a:	681b      	ldr	r3, [r3, #0]
 802191c:	2b00      	cmp	r3, #0
 802191e:	d005      	beq.n	802192c <tcpip_tcp_timer+0x28>
    /* restart timer */
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8021920:	2200      	movs	r2, #0
 8021922:	4908      	ldr	r1, [pc, #32]	@ (8021944 <tcpip_tcp_timer+0x40>)
 8021924:	20fa      	movs	r0, #250	@ 0xfa
 8021926:	f000 f8f5 	bl	8021b14 <sys_timeout>
 802192a:	e003      	b.n	8021934 <tcpip_tcp_timer+0x30>
  } else {
    /* disable timer */
    tcpip_tcp_timer_active = 0;
 802192c:	4b06      	ldr	r3, [pc, #24]	@ (8021948 <tcpip_tcp_timer+0x44>)
 802192e:	2200      	movs	r2, #0
 8021930:	601a      	str	r2, [r3, #0]
  }
}
 8021932:	bf00      	nop
 8021934:	bf00      	nop
 8021936:	3708      	adds	r7, #8
 8021938:	46bd      	mov	sp, r7
 802193a:	bd80      	pop	{r7, pc}
 802193c:	2402af74 	.word	0x2402af74
 8021940:	2402af78 	.word	0x2402af78
 8021944:	08021905 	.word	0x08021905
 8021948:	2402afc4 	.word	0x2402afc4

0802194c <tcp_timer_needed>:
 * the reason is to have the TCP timer only running when
 * there are active (or time-wait) PCBs.
 */
void
tcp_timer_needed(void)
{
 802194c:	b580      	push	{r7, lr}
 802194e:	af00      	add	r7, sp, #0
  LWIP_ASSERT_CORE_LOCKED();
 8021950:	f7ef fad6 	bl	8010f00 <sys_check_core_locking>

  /* timer is off but needed again? */
  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
 8021954:	4b0a      	ldr	r3, [pc, #40]	@ (8021980 <tcp_timer_needed+0x34>)
 8021956:	681b      	ldr	r3, [r3, #0]
 8021958:	2b00      	cmp	r3, #0
 802195a:	d10f      	bne.n	802197c <tcp_timer_needed+0x30>
 802195c:	4b09      	ldr	r3, [pc, #36]	@ (8021984 <tcp_timer_needed+0x38>)
 802195e:	681b      	ldr	r3, [r3, #0]
 8021960:	2b00      	cmp	r3, #0
 8021962:	d103      	bne.n	802196c <tcp_timer_needed+0x20>
 8021964:	4b08      	ldr	r3, [pc, #32]	@ (8021988 <tcp_timer_needed+0x3c>)
 8021966:	681b      	ldr	r3, [r3, #0]
 8021968:	2b00      	cmp	r3, #0
 802196a:	d007      	beq.n	802197c <tcp_timer_needed+0x30>
    /* enable and start timer */
    tcpip_tcp_timer_active = 1;
 802196c:	4b04      	ldr	r3, [pc, #16]	@ (8021980 <tcp_timer_needed+0x34>)
 802196e:	2201      	movs	r2, #1
 8021970:	601a      	str	r2, [r3, #0]
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8021972:	2200      	movs	r2, #0
 8021974:	4905      	ldr	r1, [pc, #20]	@ (802198c <tcp_timer_needed+0x40>)
 8021976:	20fa      	movs	r0, #250	@ 0xfa
 8021978:	f000 f8cc 	bl	8021b14 <sys_timeout>
  }
}
 802197c:	bf00      	nop
 802197e:	bd80      	pop	{r7, pc}
 8021980:	2402afc4 	.word	0x2402afc4
 8021984:	2402af74 	.word	0x2402af74
 8021988:	2402af78 	.word	0x2402af78
 802198c:	08021905 	.word	0x08021905

08021990 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
 8021990:	b580      	push	{r7, lr}
 8021992:	b086      	sub	sp, #24
 8021994:	af00      	add	r7, sp, #0
 8021996:	60f8      	str	r0, [r7, #12]
 8021998:	60b9      	str	r1, [r7, #8]
 802199a:	607a      	str	r2, [r7, #4]
  struct sys_timeo *timeout, *t;

  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
 802199c:	200a      	movs	r0, #10
 802199e:	f7f8 fd01 	bl	801a3a4 <memp_malloc>
 80219a2:	6138      	str	r0, [r7, #16]
  if (timeout == NULL) {
 80219a4:	693b      	ldr	r3, [r7, #16]
 80219a6:	2b00      	cmp	r3, #0
 80219a8:	d109      	bne.n	80219be <sys_timeout_abs+0x2e>
    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
 80219aa:	693b      	ldr	r3, [r7, #16]
 80219ac:	2b00      	cmp	r3, #0
 80219ae:	d151      	bne.n	8021a54 <sys_timeout_abs+0xc4>
 80219b0:	4b2a      	ldr	r3, [pc, #168]	@ (8021a5c <sys_timeout_abs+0xcc>)
 80219b2:	22be      	movs	r2, #190	@ 0xbe
 80219b4:	492a      	ldr	r1, [pc, #168]	@ (8021a60 <sys_timeout_abs+0xd0>)
 80219b6:	482b      	ldr	r0, [pc, #172]	@ (8021a64 <sys_timeout_abs+0xd4>)
 80219b8:	f008 fed0 	bl	802a75c <iprintf>
    return;
 80219bc:	e04a      	b.n	8021a54 <sys_timeout_abs+0xc4>
  }

  timeout->next = NULL;
 80219be:	693b      	ldr	r3, [r7, #16]
 80219c0:	2200      	movs	r2, #0
 80219c2:	601a      	str	r2, [r3, #0]
  timeout->h = handler;
 80219c4:	693b      	ldr	r3, [r7, #16]
 80219c6:	68ba      	ldr	r2, [r7, #8]
 80219c8:	609a      	str	r2, [r3, #8]
  timeout->arg = arg;
 80219ca:	693b      	ldr	r3, [r7, #16]
 80219cc:	687a      	ldr	r2, [r7, #4]
 80219ce:	60da      	str	r2, [r3, #12]
  timeout->time = abs_time;
 80219d0:	693b      	ldr	r3, [r7, #16]
 80219d2:	68fa      	ldr	r2, [r7, #12]
 80219d4:	605a      	str	r2, [r3, #4]
  timeout->handler_name = handler_name;
  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
                             (void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */

  if (next_timeout == NULL) {
 80219d6:	4b24      	ldr	r3, [pc, #144]	@ (8021a68 <sys_timeout_abs+0xd8>)
 80219d8:	681b      	ldr	r3, [r3, #0]
 80219da:	2b00      	cmp	r3, #0
 80219dc:	d103      	bne.n	80219e6 <sys_timeout_abs+0x56>
    next_timeout = timeout;
 80219de:	4a22      	ldr	r2, [pc, #136]	@ (8021a68 <sys_timeout_abs+0xd8>)
 80219e0:	693b      	ldr	r3, [r7, #16]
 80219e2:	6013      	str	r3, [r2, #0]
    return;
 80219e4:	e037      	b.n	8021a56 <sys_timeout_abs+0xc6>
  }
  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
 80219e6:	693b      	ldr	r3, [r7, #16]
 80219e8:	685a      	ldr	r2, [r3, #4]
 80219ea:	4b1f      	ldr	r3, [pc, #124]	@ (8021a68 <sys_timeout_abs+0xd8>)
 80219ec:	681b      	ldr	r3, [r3, #0]
 80219ee:	685b      	ldr	r3, [r3, #4]
 80219f0:	1ad3      	subs	r3, r2, r3
 80219f2:	0fdb      	lsrs	r3, r3, #31
 80219f4:	f003 0301 	and.w	r3, r3, #1
 80219f8:	b2db      	uxtb	r3, r3
 80219fa:	2b00      	cmp	r3, #0
 80219fc:	d007      	beq.n	8021a0e <sys_timeout_abs+0x7e>
    timeout->next = next_timeout;
 80219fe:	4b1a      	ldr	r3, [pc, #104]	@ (8021a68 <sys_timeout_abs+0xd8>)
 8021a00:	681a      	ldr	r2, [r3, #0]
 8021a02:	693b      	ldr	r3, [r7, #16]
 8021a04:	601a      	str	r2, [r3, #0]
    next_timeout = timeout;
 8021a06:	4a18      	ldr	r2, [pc, #96]	@ (8021a68 <sys_timeout_abs+0xd8>)
 8021a08:	693b      	ldr	r3, [r7, #16]
 8021a0a:	6013      	str	r3, [r2, #0]
 8021a0c:	e023      	b.n	8021a56 <sys_timeout_abs+0xc6>
  } else {
    for (t = next_timeout; t != NULL; t = t->next) {
 8021a0e:	4b16      	ldr	r3, [pc, #88]	@ (8021a68 <sys_timeout_abs+0xd8>)
 8021a10:	681b      	ldr	r3, [r3, #0]
 8021a12:	617b      	str	r3, [r7, #20]
 8021a14:	e01a      	b.n	8021a4c <sys_timeout_abs+0xbc>
      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
 8021a16:	697b      	ldr	r3, [r7, #20]
 8021a18:	681b      	ldr	r3, [r3, #0]
 8021a1a:	2b00      	cmp	r3, #0
 8021a1c:	d00b      	beq.n	8021a36 <sys_timeout_abs+0xa6>
 8021a1e:	693b      	ldr	r3, [r7, #16]
 8021a20:	685a      	ldr	r2, [r3, #4]
 8021a22:	697b      	ldr	r3, [r7, #20]
 8021a24:	681b      	ldr	r3, [r3, #0]
 8021a26:	685b      	ldr	r3, [r3, #4]
 8021a28:	1ad3      	subs	r3, r2, r3
 8021a2a:	0fdb      	lsrs	r3, r3, #31
 8021a2c:	f003 0301 	and.w	r3, r3, #1
 8021a30:	b2db      	uxtb	r3, r3
 8021a32:	2b00      	cmp	r3, #0
 8021a34:	d007      	beq.n	8021a46 <sys_timeout_abs+0xb6>
        timeout->next = t->next;
 8021a36:	697b      	ldr	r3, [r7, #20]
 8021a38:	681a      	ldr	r2, [r3, #0]
 8021a3a:	693b      	ldr	r3, [r7, #16]
 8021a3c:	601a      	str	r2, [r3, #0]
        t->next = timeout;
 8021a3e:	697b      	ldr	r3, [r7, #20]
 8021a40:	693a      	ldr	r2, [r7, #16]
 8021a42:	601a      	str	r2, [r3, #0]
        break;
 8021a44:	e007      	b.n	8021a56 <sys_timeout_abs+0xc6>
    for (t = next_timeout; t != NULL; t = t->next) {
 8021a46:	697b      	ldr	r3, [r7, #20]
 8021a48:	681b      	ldr	r3, [r3, #0]
 8021a4a:	617b      	str	r3, [r7, #20]
 8021a4c:	697b      	ldr	r3, [r7, #20]
 8021a4e:	2b00      	cmp	r3, #0
 8021a50:	d1e1      	bne.n	8021a16 <sys_timeout_abs+0x86>
 8021a52:	e000      	b.n	8021a56 <sys_timeout_abs+0xc6>
    return;
 8021a54:	bf00      	nop
      }
    }
  }
}
 8021a56:	3718      	adds	r7, #24
 8021a58:	46bd      	mov	sp, r7
 8021a5a:	bd80      	pop	{r7, pc}
 8021a5c:	080308ec 	.word	0x080308ec
 8021a60:	08030920 	.word	0x08030920
 8021a64:	08030960 	.word	0x08030960
 8021a68:	2402afbc 	.word	0x2402afbc

08021a6c <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
 8021a6c:	b580      	push	{r7, lr}
 8021a6e:	b086      	sub	sp, #24
 8021a70:	af00      	add	r7, sp, #0
 8021a72:	6078      	str	r0, [r7, #4]
  u32_t now;
  u32_t next_timeout_time;
  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
 8021a74:	687b      	ldr	r3, [r7, #4]
 8021a76:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
  cyclic->handler();
 8021a78:	697b      	ldr	r3, [r7, #20]
 8021a7a:	685b      	ldr	r3, [r3, #4]
 8021a7c:	4798      	blx	r3

  now = sys_now();
 8021a7e:	f7ee ffa3 	bl	80109c8 <sys_now>
 8021a82:	6138      	str	r0, [r7, #16]
  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
 8021a84:	697b      	ldr	r3, [r7, #20]
 8021a86:	681a      	ldr	r2, [r3, #0]
 8021a88:	4b0f      	ldr	r3, [pc, #60]	@ (8021ac8 <lwip_cyclic_timer+0x5c>)
 8021a8a:	681b      	ldr	r3, [r3, #0]
 8021a8c:	4413      	add	r3, r2
 8021a8e:	60fb      	str	r3, [r7, #12]
  if (TIME_LESS_THAN(next_timeout_time, now)) {
 8021a90:	68fa      	ldr	r2, [r7, #12]
 8021a92:	693b      	ldr	r3, [r7, #16]
 8021a94:	1ad3      	subs	r3, r2, r3
 8021a96:	0fdb      	lsrs	r3, r3, #31
 8021a98:	f003 0301 	and.w	r3, r3, #1
 8021a9c:	b2db      	uxtb	r3, r3
 8021a9e:	2b00      	cmp	r3, #0
 8021aa0:	d009      	beq.n	8021ab6 <lwip_cyclic_timer+0x4a>
    /* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
 8021aa2:	697b      	ldr	r3, [r7, #20]
 8021aa4:	681a      	ldr	r2, [r3, #0]
 8021aa6:	693b      	ldr	r3, [r7, #16]
 8021aa8:	4413      	add	r3, r2
 8021aaa:	687a      	ldr	r2, [r7, #4]
 8021aac:	4907      	ldr	r1, [pc, #28]	@ (8021acc <lwip_cyclic_timer+0x60>)
 8021aae:	4618      	mov	r0, r3
 8021ab0:	f7ff ff6e 	bl	8021990 <sys_timeout_abs>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
  }
}
 8021ab4:	e004      	b.n	8021ac0 <lwip_cyclic_timer+0x54>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
 8021ab6:	687a      	ldr	r2, [r7, #4]
 8021ab8:	4904      	ldr	r1, [pc, #16]	@ (8021acc <lwip_cyclic_timer+0x60>)
 8021aba:	68f8      	ldr	r0, [r7, #12]
 8021abc:	f7ff ff68 	bl	8021990 <sys_timeout_abs>
}
 8021ac0:	bf00      	nop
 8021ac2:	3718      	adds	r7, #24
 8021ac4:	46bd      	mov	sp, r7
 8021ac6:	bd80      	pop	{r7, pc}
 8021ac8:	2402afc0 	.word	0x2402afc0
 8021acc:	08021a6d 	.word	0x08021a6d

08021ad0 <sys_timeouts_init>:

/** Initialize this module */
void sys_timeouts_init(void)
{
 8021ad0:	b580      	push	{r7, lr}
 8021ad2:	b082      	sub	sp, #8
 8021ad4:	af00      	add	r7, sp, #0
  size_t i;
  /* tcp_tmr() at index 0 is started on demand */
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021ad6:	2301      	movs	r3, #1
 8021ad8:	607b      	str	r3, [r7, #4]
 8021ada:	e00e      	b.n	8021afa <sys_timeouts_init+0x2a>
    /* we have to cast via size_t to get rid of const warning
      (this is OK as cyclic_timer() casts back to const* */
    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
 8021adc:	4a0b      	ldr	r2, [pc, #44]	@ (8021b0c <sys_timeouts_init+0x3c>)
 8021ade:	687b      	ldr	r3, [r7, #4]
 8021ae0:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
 8021ae4:	687b      	ldr	r3, [r7, #4]
 8021ae6:	00db      	lsls	r3, r3, #3
 8021ae8:	4a08      	ldr	r2, [pc, #32]	@ (8021b0c <sys_timeouts_init+0x3c>)
 8021aea:	4413      	add	r3, r2
 8021aec:	461a      	mov	r2, r3
 8021aee:	4908      	ldr	r1, [pc, #32]	@ (8021b10 <sys_timeouts_init+0x40>)
 8021af0:	f000 f810 	bl	8021b14 <sys_timeout>
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021af4:	687b      	ldr	r3, [r7, #4]
 8021af6:	3301      	adds	r3, #1
 8021af8:	607b      	str	r3, [r7, #4]
 8021afa:	687b      	ldr	r3, [r7, #4]
 8021afc:	2b04      	cmp	r3, #4
 8021afe:	d9ed      	bls.n	8021adc <sys_timeouts_init+0xc>
  }
}
 8021b00:	bf00      	nop
 8021b02:	bf00      	nop
 8021b04:	3708      	adds	r7, #8
 8021b06:	46bd      	mov	sp, r7
 8021b08:	bd80      	pop	{r7, pc}
 8021b0a:	bf00      	nop
 8021b0c:	08031b30 	.word	0x08031b30
 8021b10:	08021a6d 	.word	0x08021a6d

08021b14 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
 8021b14:	b580      	push	{r7, lr}
 8021b16:	b086      	sub	sp, #24
 8021b18:	af00      	add	r7, sp, #0
 8021b1a:	60f8      	str	r0, [r7, #12]
 8021b1c:	60b9      	str	r1, [r7, #8]
 8021b1e:	607a      	str	r2, [r7, #4]
  u32_t next_timeout_time;

  LWIP_ASSERT_CORE_LOCKED();
 8021b20:	f7ef f9ee 	bl	8010f00 <sys_check_core_locking>

  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
 8021b24:	68fb      	ldr	r3, [r7, #12]
 8021b26:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 8021b2a:	d306      	bcc.n	8021b3a <sys_timeout+0x26>
 8021b2c:	4b0a      	ldr	r3, [pc, #40]	@ (8021b58 <sys_timeout+0x44>)
 8021b2e:	f240 1229 	movw	r2, #297	@ 0x129
 8021b32:	490a      	ldr	r1, [pc, #40]	@ (8021b5c <sys_timeout+0x48>)
 8021b34:	480a      	ldr	r0, [pc, #40]	@ (8021b60 <sys_timeout+0x4c>)
 8021b36:	f008 fe11 	bl	802a75c <iprintf>

  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
 8021b3a:	f7ee ff45 	bl	80109c8 <sys_now>
 8021b3e:	4602      	mov	r2, r0
 8021b40:	68fb      	ldr	r3, [r7, #12]
 8021b42:	4413      	add	r3, r2
 8021b44:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
  sys_timeout_abs(next_timeout_time, handler, arg);
 8021b46:	687a      	ldr	r2, [r7, #4]
 8021b48:	68b9      	ldr	r1, [r7, #8]
 8021b4a:	6978      	ldr	r0, [r7, #20]
 8021b4c:	f7ff ff20 	bl	8021990 <sys_timeout_abs>
#endif
}
 8021b50:	bf00      	nop
 8021b52:	3718      	adds	r7, #24
 8021b54:	46bd      	mov	sp, r7
 8021b56:	bd80      	pop	{r7, pc}
 8021b58:	080308ec 	.word	0x080308ec
 8021b5c:	08030988 	.word	0x08030988
 8021b60:	08030960 	.word	0x08030960

08021b64 <sys_check_timeouts>:
 *
 * Must be called periodically from your main loop.
 */
void
sys_check_timeouts(void)
{
 8021b64:	b580      	push	{r7, lr}
 8021b66:	b084      	sub	sp, #16
 8021b68:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8021b6a:	f7ef f9c9 	bl	8010f00 <sys_check_core_locking>

  /* Process only timers expired at the start of the function. */
  now = sys_now();
 8021b6e:	f7ee ff2b 	bl	80109c8 <sys_now>
 8021b72:	60f8      	str	r0, [r7, #12]
    sys_timeout_handler handler;
    void *arg;

    PBUF_CHECK_FREE_OOSEQ();

    tmptimeout = next_timeout;
 8021b74:	4b17      	ldr	r3, [pc, #92]	@ (8021bd4 <sys_check_timeouts+0x70>)
 8021b76:	681b      	ldr	r3, [r3, #0]
 8021b78:	60bb      	str	r3, [r7, #8]
    if (tmptimeout == NULL) {
 8021b7a:	68bb      	ldr	r3, [r7, #8]
 8021b7c:	2b00      	cmp	r3, #0
 8021b7e:	d022      	beq.n	8021bc6 <sys_check_timeouts+0x62>
      return;
    }

    if (TIME_LESS_THAN(now, tmptimeout->time)) {
 8021b80:	68bb      	ldr	r3, [r7, #8]
 8021b82:	685b      	ldr	r3, [r3, #4]
 8021b84:	68fa      	ldr	r2, [r7, #12]
 8021b86:	1ad3      	subs	r3, r2, r3
 8021b88:	0fdb      	lsrs	r3, r3, #31
 8021b8a:	f003 0301 	and.w	r3, r3, #1
 8021b8e:	b2db      	uxtb	r3, r3
 8021b90:	2b00      	cmp	r3, #0
 8021b92:	d11a      	bne.n	8021bca <sys_check_timeouts+0x66>
      return;
    }

    /* Timeout has expired */
    next_timeout = tmptimeout->next;
 8021b94:	68bb      	ldr	r3, [r7, #8]
 8021b96:	681b      	ldr	r3, [r3, #0]
 8021b98:	4a0e      	ldr	r2, [pc, #56]	@ (8021bd4 <sys_check_timeouts+0x70>)
 8021b9a:	6013      	str	r3, [r2, #0]
    handler = tmptimeout->h;
 8021b9c:	68bb      	ldr	r3, [r7, #8]
 8021b9e:	689b      	ldr	r3, [r3, #8]
 8021ba0:	607b      	str	r3, [r7, #4]
    arg = tmptimeout->arg;
 8021ba2:	68bb      	ldr	r3, [r7, #8]
 8021ba4:	68db      	ldr	r3, [r3, #12]
 8021ba6:	603b      	str	r3, [r7, #0]
    current_timeout_due_time = tmptimeout->time;
 8021ba8:	68bb      	ldr	r3, [r7, #8]
 8021baa:	685b      	ldr	r3, [r3, #4]
 8021bac:	4a0a      	ldr	r2, [pc, #40]	@ (8021bd8 <sys_check_timeouts+0x74>)
 8021bae:	6013      	str	r3, [r2, #0]
    if (handler != NULL) {
      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
    }
#endif /* LWIP_DEBUG_TIMERNAMES */
    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
 8021bb0:	68b9      	ldr	r1, [r7, #8]
 8021bb2:	200a      	movs	r0, #10
 8021bb4:	f7f8 fc6c 	bl	801a490 <memp_free>
    if (handler != NULL) {
 8021bb8:	687b      	ldr	r3, [r7, #4]
 8021bba:	2b00      	cmp	r3, #0
 8021bbc:	d0da      	beq.n	8021b74 <sys_check_timeouts+0x10>
      handler(arg);
 8021bbe:	687b      	ldr	r3, [r7, #4]
 8021bc0:	6838      	ldr	r0, [r7, #0]
 8021bc2:	4798      	blx	r3
  do {
 8021bc4:	e7d6      	b.n	8021b74 <sys_check_timeouts+0x10>
      return;
 8021bc6:	bf00      	nop
 8021bc8:	e000      	b.n	8021bcc <sys_check_timeouts+0x68>
      return;
 8021bca:	bf00      	nop
    }
    LWIP_TCPIP_THREAD_ALIVE();

    /* Repeat until all expired timers have been called */
  } while (1);
}
 8021bcc:	3710      	adds	r7, #16
 8021bce:	46bd      	mov	sp, r7
 8021bd0:	bd80      	pop	{r7, pc}
 8021bd2:	bf00      	nop
 8021bd4:	2402afbc 	.word	0x2402afbc
 8021bd8:	2402afc0 	.word	0x2402afc0

08021bdc <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
 * enqueued, returns 0xffffffff
 */
u32_t
sys_timeouts_sleeptime(void)
{
 8021bdc:	b580      	push	{r7, lr}
 8021bde:	b082      	sub	sp, #8
 8021be0:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8021be2:	f7ef f98d 	bl	8010f00 <sys_check_core_locking>

  if (next_timeout == NULL) {
 8021be6:	4b16      	ldr	r3, [pc, #88]	@ (8021c40 <sys_timeouts_sleeptime+0x64>)
 8021be8:	681b      	ldr	r3, [r3, #0]
 8021bea:	2b00      	cmp	r3, #0
 8021bec:	d102      	bne.n	8021bf4 <sys_timeouts_sleeptime+0x18>
    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
 8021bee:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021bf2:	e020      	b.n	8021c36 <sys_timeouts_sleeptime+0x5a>
  }
  now = sys_now();
 8021bf4:	f7ee fee8 	bl	80109c8 <sys_now>
 8021bf8:	6078      	str	r0, [r7, #4]
  if (TIME_LESS_THAN(next_timeout->time, now)) {
 8021bfa:	4b11      	ldr	r3, [pc, #68]	@ (8021c40 <sys_timeouts_sleeptime+0x64>)
 8021bfc:	681b      	ldr	r3, [r3, #0]
 8021bfe:	685a      	ldr	r2, [r3, #4]
 8021c00:	687b      	ldr	r3, [r7, #4]
 8021c02:	1ad3      	subs	r3, r2, r3
 8021c04:	0fdb      	lsrs	r3, r3, #31
 8021c06:	f003 0301 	and.w	r3, r3, #1
 8021c0a:	b2db      	uxtb	r3, r3
 8021c0c:	2b00      	cmp	r3, #0
 8021c0e:	d001      	beq.n	8021c14 <sys_timeouts_sleeptime+0x38>
    return 0;
 8021c10:	2300      	movs	r3, #0
 8021c12:	e010      	b.n	8021c36 <sys_timeouts_sleeptime+0x5a>
  } else {
    u32_t ret = (u32_t)(next_timeout->time - now);
 8021c14:	4b0a      	ldr	r3, [pc, #40]	@ (8021c40 <sys_timeouts_sleeptime+0x64>)
 8021c16:	681b      	ldr	r3, [r3, #0]
 8021c18:	685a      	ldr	r2, [r3, #4]
 8021c1a:	687b      	ldr	r3, [r7, #4]
 8021c1c:	1ad3      	subs	r3, r2, r3
 8021c1e:	603b      	str	r3, [r7, #0]
    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
 8021c20:	683b      	ldr	r3, [r7, #0]
 8021c22:	2b00      	cmp	r3, #0
 8021c24:	da06      	bge.n	8021c34 <sys_timeouts_sleeptime+0x58>
 8021c26:	4b07      	ldr	r3, [pc, #28]	@ (8021c44 <sys_timeouts_sleeptime+0x68>)
 8021c28:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8021c2c:	4906      	ldr	r1, [pc, #24]	@ (8021c48 <sys_timeouts_sleeptime+0x6c>)
 8021c2e:	4807      	ldr	r0, [pc, #28]	@ (8021c4c <sys_timeouts_sleeptime+0x70>)
 8021c30:	f008 fd94 	bl	802a75c <iprintf>
    return ret;
 8021c34:	683b      	ldr	r3, [r7, #0]
  }
}
 8021c36:	4618      	mov	r0, r3
 8021c38:	3708      	adds	r7, #8
 8021c3a:	46bd      	mov	sp, r7
 8021c3c:	bd80      	pop	{r7, pc}
 8021c3e:	bf00      	nop
 8021c40:	2402afbc 	.word	0x2402afbc
 8021c44:	080308ec 	.word	0x080308ec
 8021c48:	080309c0 	.word	0x080309c0
 8021c4c:	08030960 	.word	0x08030960

08021c50 <udp_init>:
/**
 * Initialize this module.
 */
void
udp_init(void)
{
 8021c50:	b580      	push	{r7, lr}
 8021c52:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 8021c54:	f007 fa58 	bl	8029108 <rand>
 8021c58:	4603      	mov	r3, r0
 8021c5a:	b29b      	uxth	r3, r3
 8021c5c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 8021c60:	b29b      	uxth	r3, r3
 8021c62:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 8021c66:	b29a      	uxth	r2, r3
 8021c68:	4b01      	ldr	r3, [pc, #4]	@ (8021c70 <udp_init+0x20>)
 8021c6a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 8021c6c:	bf00      	nop
 8021c6e:	bd80      	pop	{r7, pc}
 8021c70:	24000054 	.word	0x24000054

08021c74 <udp_new_port>:
 *
 * @return a new (free) local UDP port number
 */
static u16_t
udp_new_port(void)
{
 8021c74:	b480      	push	{r7}
 8021c76:	b083      	sub	sp, #12
 8021c78:	af00      	add	r7, sp, #0
  u16_t n = 0;
 8021c7a:	2300      	movs	r3, #0
 8021c7c:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *pcb;

again:
  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
 8021c7e:	4b17      	ldr	r3, [pc, #92]	@ (8021cdc <udp_new_port+0x68>)
 8021c80:	881b      	ldrh	r3, [r3, #0]
 8021c82:	1c5a      	adds	r2, r3, #1
 8021c84:	b291      	uxth	r1, r2
 8021c86:	4a15      	ldr	r2, [pc, #84]	@ (8021cdc <udp_new_port+0x68>)
 8021c88:	8011      	strh	r1, [r2, #0]
 8021c8a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8021c8e:	4293      	cmp	r3, r2
 8021c90:	d103      	bne.n	8021c9a <udp_new_port+0x26>
    udp_port = UDP_LOCAL_PORT_RANGE_START;
 8021c92:	4b12      	ldr	r3, [pc, #72]	@ (8021cdc <udp_new_port+0x68>)
 8021c94:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 8021c98:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCBs. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021c9a:	4b11      	ldr	r3, [pc, #68]	@ (8021ce0 <udp_new_port+0x6c>)
 8021c9c:	681b      	ldr	r3, [r3, #0]
 8021c9e:	603b      	str	r3, [r7, #0]
 8021ca0:	e011      	b.n	8021cc6 <udp_new_port+0x52>
    if (pcb->local_port == udp_port) {
 8021ca2:	683b      	ldr	r3, [r7, #0]
 8021ca4:	8a5a      	ldrh	r2, [r3, #18]
 8021ca6:	4b0d      	ldr	r3, [pc, #52]	@ (8021cdc <udp_new_port+0x68>)
 8021ca8:	881b      	ldrh	r3, [r3, #0]
 8021caa:	429a      	cmp	r2, r3
 8021cac:	d108      	bne.n	8021cc0 <udp_new_port+0x4c>
      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
 8021cae:	88fb      	ldrh	r3, [r7, #6]
 8021cb0:	3301      	adds	r3, #1
 8021cb2:	80fb      	strh	r3, [r7, #6]
 8021cb4:	88fb      	ldrh	r3, [r7, #6]
 8021cb6:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8021cba:	d3e0      	bcc.n	8021c7e <udp_new_port+0xa>
        return 0;
 8021cbc:	2300      	movs	r3, #0
 8021cbe:	e007      	b.n	8021cd0 <udp_new_port+0x5c>
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021cc0:	683b      	ldr	r3, [r7, #0]
 8021cc2:	68db      	ldr	r3, [r3, #12]
 8021cc4:	603b      	str	r3, [r7, #0]
 8021cc6:	683b      	ldr	r3, [r7, #0]
 8021cc8:	2b00      	cmp	r3, #0
 8021cca:	d1ea      	bne.n	8021ca2 <udp_new_port+0x2e>
      }
      goto again;
    }
  }
  return udp_port;
 8021ccc:	4b03      	ldr	r3, [pc, #12]	@ (8021cdc <udp_new_port+0x68>)
 8021cce:	881b      	ldrh	r3, [r3, #0]
}
 8021cd0:	4618      	mov	r0, r3
 8021cd2:	370c      	adds	r7, #12
 8021cd4:	46bd      	mov	sp, r7
 8021cd6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8021cda:	4770      	bx	lr
 8021cdc:	24000054 	.word	0x24000054
 8021ce0:	2402afc8 	.word	0x2402afc8

08021ce4 <udp_input_local_match>:
 * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
 * @return 1 on match, 0 otherwise
 */
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
 8021ce4:	b580      	push	{r7, lr}
 8021ce6:	b084      	sub	sp, #16
 8021ce8:	af00      	add	r7, sp, #0
 8021cea:	60f8      	str	r0, [r7, #12]
 8021cec:	60b9      	str	r1, [r7, #8]
 8021cee:	4613      	mov	r3, r2
 8021cf0:	71fb      	strb	r3, [r7, #7]
  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */

  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
 8021cf2:	68fb      	ldr	r3, [r7, #12]
 8021cf4:	2b00      	cmp	r3, #0
 8021cf6:	d105      	bne.n	8021d04 <udp_input_local_match+0x20>
 8021cf8:	4b27      	ldr	r3, [pc, #156]	@ (8021d98 <udp_input_local_match+0xb4>)
 8021cfa:	2287      	movs	r2, #135	@ 0x87
 8021cfc:	4927      	ldr	r1, [pc, #156]	@ (8021d9c <udp_input_local_match+0xb8>)
 8021cfe:	4828      	ldr	r0, [pc, #160]	@ (8021da0 <udp_input_local_match+0xbc>)
 8021d00:	f008 fd2c 	bl	802a75c <iprintf>
  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
 8021d04:	68bb      	ldr	r3, [r7, #8]
 8021d06:	2b00      	cmp	r3, #0
 8021d08:	d105      	bne.n	8021d16 <udp_input_local_match+0x32>
 8021d0a:	4b23      	ldr	r3, [pc, #140]	@ (8021d98 <udp_input_local_match+0xb4>)
 8021d0c:	2288      	movs	r2, #136	@ 0x88
 8021d0e:	4925      	ldr	r1, [pc, #148]	@ (8021da4 <udp_input_local_match+0xc0>)
 8021d10:	4823      	ldr	r0, [pc, #140]	@ (8021da0 <udp_input_local_match+0xbc>)
 8021d12:	f008 fd23 	bl	802a75c <iprintf>

  /* check if PCB is bound to specific netif */
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8021d16:	68fb      	ldr	r3, [r7, #12]
 8021d18:	7a1b      	ldrb	r3, [r3, #8]
 8021d1a:	2b00      	cmp	r3, #0
 8021d1c:	d00b      	beq.n	8021d36 <udp_input_local_match+0x52>
      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 8021d1e:	68fb      	ldr	r3, [r7, #12]
 8021d20:	7a1a      	ldrb	r2, [r3, #8]
 8021d22:	4b21      	ldr	r3, [pc, #132]	@ (8021da8 <udp_input_local_match+0xc4>)
 8021d24:	685b      	ldr	r3, [r3, #4]
 8021d26:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8021d2a:	3301      	adds	r3, #1
 8021d2c:	b2db      	uxtb	r3, r3
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8021d2e:	429a      	cmp	r2, r3
 8021d30:	d001      	beq.n	8021d36 <udp_input_local_match+0x52>
    return 0;
 8021d32:	2300      	movs	r3, #0
 8021d34:	e02b      	b.n	8021d8e <udp_input_local_match+0xaa>
  /* Only need to check PCB if incoming IP version matches PCB IP version */
  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
    if (broadcast != 0) {
 8021d36:	79fb      	ldrb	r3, [r7, #7]
 8021d38:	2b00      	cmp	r3, #0
 8021d3a:	d018      	beq.n	8021d6e <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
      if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
      {
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8021d3c:	68fb      	ldr	r3, [r7, #12]
 8021d3e:	2b00      	cmp	r3, #0
 8021d40:	d013      	beq.n	8021d6a <udp_input_local_match+0x86>
 8021d42:	68fb      	ldr	r3, [r7, #12]
 8021d44:	681b      	ldr	r3, [r3, #0]
 8021d46:	2b00      	cmp	r3, #0
 8021d48:	d00f      	beq.n	8021d6a <udp_input_local_match+0x86>
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8021d4a:	4b17      	ldr	r3, [pc, #92]	@ (8021da8 <udp_input_local_match+0xc4>)
 8021d4c:	695b      	ldr	r3, [r3, #20]
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8021d4e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8021d52:	d00a      	beq.n	8021d6a <udp_input_local_match+0x86>
            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
 8021d54:	68fb      	ldr	r3, [r7, #12]
 8021d56:	681a      	ldr	r2, [r3, #0]
 8021d58:	4b13      	ldr	r3, [pc, #76]	@ (8021da8 <udp_input_local_match+0xc4>)
 8021d5a:	695b      	ldr	r3, [r3, #20]
 8021d5c:	405a      	eors	r2, r3
 8021d5e:	68bb      	ldr	r3, [r7, #8]
 8021d60:	3308      	adds	r3, #8
 8021d62:	681b      	ldr	r3, [r3, #0]
 8021d64:	4013      	ands	r3, r2
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8021d66:	2b00      	cmp	r3, #0
 8021d68:	d110      	bne.n	8021d8c <udp_input_local_match+0xa8>
          return 1;
 8021d6a:	2301      	movs	r3, #1
 8021d6c:	e00f      	b.n	8021d8e <udp_input_local_match+0xaa>
        }
      }
    } else
#endif /* LWIP_IPV4 */
      /* Handle IPv4 and IPv6: all or exact match */
      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 8021d6e:	68fb      	ldr	r3, [r7, #12]
 8021d70:	2b00      	cmp	r3, #0
 8021d72:	d009      	beq.n	8021d88 <udp_input_local_match+0xa4>
 8021d74:	68fb      	ldr	r3, [r7, #12]
 8021d76:	681b      	ldr	r3, [r3, #0]
 8021d78:	2b00      	cmp	r3, #0
 8021d7a:	d005      	beq.n	8021d88 <udp_input_local_match+0xa4>
 8021d7c:	68fb      	ldr	r3, [r7, #12]
 8021d7e:	681a      	ldr	r2, [r3, #0]
 8021d80:	4b09      	ldr	r3, [pc, #36]	@ (8021da8 <udp_input_local_match+0xc4>)
 8021d82:	695b      	ldr	r3, [r3, #20]
 8021d84:	429a      	cmp	r2, r3
 8021d86:	d101      	bne.n	8021d8c <udp_input_local_match+0xa8>
        return 1;
 8021d88:	2301      	movs	r3, #1
 8021d8a:	e000      	b.n	8021d8e <udp_input_local_match+0xaa>
      }
  }

  return 0;
 8021d8c:	2300      	movs	r3, #0
}
 8021d8e:	4618      	mov	r0, r3
 8021d90:	3710      	adds	r7, #16
 8021d92:	46bd      	mov	sp, r7
 8021d94:	bd80      	pop	{r7, pc}
 8021d96:	bf00      	nop
 8021d98:	080309d4 	.word	0x080309d4
 8021d9c:	08030a04 	.word	0x08030a04
 8021da0:	08030a28 	.word	0x08030a28
 8021da4:	08030a50 	.word	0x08030a50
 8021da8:	24024418 	.word	0x24024418

08021dac <udp_input>:
 * @param inp network interface on which the datagram was received.
 *
 */
void
udp_input(struct pbuf *p, struct netif *inp)
{
 8021dac:	b590      	push	{r4, r7, lr}
 8021dae:	b08d      	sub	sp, #52	@ 0x34
 8021db0:	af02      	add	r7, sp, #8
 8021db2:	6078      	str	r0, [r7, #4]
 8021db4:	6039      	str	r1, [r7, #0]
  struct udp_hdr *udphdr;
  struct udp_pcb *pcb, *prev;
  struct udp_pcb *uncon_pcb;
  u16_t src, dest;
  u8_t broadcast;
  u8_t for_us = 0;
 8021db6:	2300      	movs	r3, #0
 8021db8:	77fb      	strb	r3, [r7, #31]

  LWIP_UNUSED_ARG(inp);

  LWIP_ASSERT_CORE_LOCKED();
 8021dba:	f7ef f8a1 	bl	8010f00 <sys_check_core_locking>

  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
 8021dbe:	687b      	ldr	r3, [r7, #4]
 8021dc0:	2b00      	cmp	r3, #0
 8021dc2:	d105      	bne.n	8021dd0 <udp_input+0x24>
 8021dc4:	4b7c      	ldr	r3, [pc, #496]	@ (8021fb8 <udp_input+0x20c>)
 8021dc6:	22cf      	movs	r2, #207	@ 0xcf
 8021dc8:	497c      	ldr	r1, [pc, #496]	@ (8021fbc <udp_input+0x210>)
 8021dca:	487d      	ldr	r0, [pc, #500]	@ (8021fc0 <udp_input+0x214>)
 8021dcc:	f008 fcc6 	bl	802a75c <iprintf>
  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
 8021dd0:	683b      	ldr	r3, [r7, #0]
 8021dd2:	2b00      	cmp	r3, #0
 8021dd4:	d105      	bne.n	8021de2 <udp_input+0x36>
 8021dd6:	4b78      	ldr	r3, [pc, #480]	@ (8021fb8 <udp_input+0x20c>)
 8021dd8:	22d0      	movs	r2, #208	@ 0xd0
 8021dda:	497a      	ldr	r1, [pc, #488]	@ (8021fc4 <udp_input+0x218>)
 8021ddc:	4878      	ldr	r0, [pc, #480]	@ (8021fc0 <udp_input+0x214>)
 8021dde:	f008 fcbd 	bl	802a75c <iprintf>
  PERF_START;

  UDP_STATS_INC(udp.recv);

  /* Check minimum length (UDP header) */
  if (p->len < UDP_HLEN) {
 8021de2:	687b      	ldr	r3, [r7, #4]
 8021de4:	895b      	ldrh	r3, [r3, #10]
 8021de6:	2b07      	cmp	r3, #7
 8021de8:	d803      	bhi.n	8021df2 <udp_input+0x46>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
    UDP_STATS_INC(udp.lenerr);
    UDP_STATS_INC(udp.drop);
    MIB2_STATS_INC(mib2.udpinerrors);
    pbuf_free(p);
 8021dea:	6878      	ldr	r0, [r7, #4]
 8021dec:	f7f9 fa3e 	bl	801b26c <pbuf_free>
    goto end;
 8021df0:	e0de      	b.n	8021fb0 <udp_input+0x204>
  }

  udphdr = (struct udp_hdr *)p->payload;
 8021df2:	687b      	ldr	r3, [r7, #4]
 8021df4:	685b      	ldr	r3, [r3, #4]
 8021df6:	617b      	str	r3, [r7, #20]

  /* is broadcast packet ? */
  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
 8021df8:	4b73      	ldr	r3, [pc, #460]	@ (8021fc8 <udp_input+0x21c>)
 8021dfa:	695b      	ldr	r3, [r3, #20]
 8021dfc:	4a72      	ldr	r2, [pc, #456]	@ (8021fc8 <udp_input+0x21c>)
 8021dfe:	6812      	ldr	r2, [r2, #0]
 8021e00:	4611      	mov	r1, r2
 8021e02:	4618      	mov	r0, r3
 8021e04:	f003 ff54 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8021e08:	4603      	mov	r3, r0
 8021e0a:	74fb      	strb	r3, [r7, #19]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));

  /* convert src and dest ports to host byte order */
  src = lwip_ntohs(udphdr->src);
 8021e0c:	697b      	ldr	r3, [r7, #20]
 8021e0e:	881b      	ldrh	r3, [r3, #0]
 8021e10:	b29b      	uxth	r3, r3
 8021e12:	4618      	mov	r0, r3
 8021e14:	f7f7 fd48 	bl	80198a8 <lwip_htons>
 8021e18:	4603      	mov	r3, r0
 8021e1a:	823b      	strh	r3, [r7, #16]
  dest = lwip_ntohs(udphdr->dest);
 8021e1c:	697b      	ldr	r3, [r7, #20]
 8021e1e:	885b      	ldrh	r3, [r3, #2]
 8021e20:	b29b      	uxth	r3, r3
 8021e22:	4618      	mov	r0, r3
 8021e24:	f7f7 fd40 	bl	80198a8 <lwip_htons>
 8021e28:	4603      	mov	r3, r0
 8021e2a:	81fb      	strh	r3, [r7, #14]
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));

  pcb = NULL;
 8021e2c:	2300      	movs	r3, #0
 8021e2e:	623b      	str	r3, [r7, #32]
  prev = NULL;
 8021e30:	2300      	movs	r3, #0
 8021e32:	627b      	str	r3, [r7, #36]	@ 0x24
  uncon_pcb = NULL;
 8021e34:	2300      	movs	r3, #0
 8021e36:	61bb      	str	r3, [r7, #24]
  /* Iterate through the UDP pcb list for a matching pcb.
   * 'Perfect match' pcbs (connected to the remote port & ip address) are
   * preferred. If no perfect match is found, the first unconnected pcb that
   * matches the local port and ip address gets the datagram. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021e38:	4b64      	ldr	r3, [pc, #400]	@ (8021fcc <udp_input+0x220>)
 8021e3a:	681b      	ldr	r3, [r3, #0]
 8021e3c:	623b      	str	r3, [r7, #32]
 8021e3e:	e054      	b.n	8021eea <udp_input+0x13e>
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));

    /* compare PCB local addr+port to UDP destination addr+port */
    if ((pcb->local_port == dest) &&
 8021e40:	6a3b      	ldr	r3, [r7, #32]
 8021e42:	8a5b      	ldrh	r3, [r3, #18]
 8021e44:	89fa      	ldrh	r2, [r7, #14]
 8021e46:	429a      	cmp	r2, r3
 8021e48:	d14a      	bne.n	8021ee0 <udp_input+0x134>
        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
 8021e4a:	7cfb      	ldrb	r3, [r7, #19]
 8021e4c:	461a      	mov	r2, r3
 8021e4e:	6839      	ldr	r1, [r7, #0]
 8021e50:	6a38      	ldr	r0, [r7, #32]
 8021e52:	f7ff ff47 	bl	8021ce4 <udp_input_local_match>
 8021e56:	4603      	mov	r3, r0
    if ((pcb->local_port == dest) &&
 8021e58:	2b00      	cmp	r3, #0
 8021e5a:	d041      	beq.n	8021ee0 <udp_input+0x134>
      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
 8021e5c:	6a3b      	ldr	r3, [r7, #32]
 8021e5e:	7c1b      	ldrb	r3, [r3, #16]
 8021e60:	f003 0304 	and.w	r3, r3, #4
 8021e64:	2b00      	cmp	r3, #0
 8021e66:	d11d      	bne.n	8021ea4 <udp_input+0xf8>
        if (uncon_pcb == NULL) {
 8021e68:	69bb      	ldr	r3, [r7, #24]
 8021e6a:	2b00      	cmp	r3, #0
 8021e6c:	d102      	bne.n	8021e74 <udp_input+0xc8>
          /* the first unconnected matching PCB */
          uncon_pcb = pcb;
 8021e6e:	6a3b      	ldr	r3, [r7, #32]
 8021e70:	61bb      	str	r3, [r7, #24]
 8021e72:	e017      	b.n	8021ea4 <udp_input+0xf8>
#if LWIP_IPV4
        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
 8021e74:	7cfb      	ldrb	r3, [r7, #19]
 8021e76:	2b00      	cmp	r3, #0
 8021e78:	d014      	beq.n	8021ea4 <udp_input+0xf8>
 8021e7a:	4b53      	ldr	r3, [pc, #332]	@ (8021fc8 <udp_input+0x21c>)
 8021e7c:	695b      	ldr	r3, [r3, #20]
 8021e7e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8021e82:	d10f      	bne.n	8021ea4 <udp_input+0xf8>
          /* global broadcast address (only valid for IPv4; match was checked before) */
          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
 8021e84:	69bb      	ldr	r3, [r7, #24]
 8021e86:	681a      	ldr	r2, [r3, #0]
 8021e88:	683b      	ldr	r3, [r7, #0]
 8021e8a:	3304      	adds	r3, #4
 8021e8c:	681b      	ldr	r3, [r3, #0]
 8021e8e:	429a      	cmp	r2, r3
 8021e90:	d008      	beq.n	8021ea4 <udp_input+0xf8>
            /* uncon_pcb does not match the input netif, check this pcb */
            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
 8021e92:	6a3b      	ldr	r3, [r7, #32]
 8021e94:	681a      	ldr	r2, [r3, #0]
 8021e96:	683b      	ldr	r3, [r7, #0]
 8021e98:	3304      	adds	r3, #4
 8021e9a:	681b      	ldr	r3, [r3, #0]
 8021e9c:	429a      	cmp	r2, r3
 8021e9e:	d101      	bne.n	8021ea4 <udp_input+0xf8>
              /* better match */
              uncon_pcb = pcb;
 8021ea0:	6a3b      	ldr	r3, [r7, #32]
 8021ea2:	61bb      	str	r3, [r7, #24]
        }
#endif /* SO_REUSE */
      }

      /* compare PCB remote addr+port to UDP source addr+port */
      if ((pcb->remote_port == src) &&
 8021ea4:	6a3b      	ldr	r3, [r7, #32]
 8021ea6:	8a9b      	ldrh	r3, [r3, #20]
 8021ea8:	8a3a      	ldrh	r2, [r7, #16]
 8021eaa:	429a      	cmp	r2, r3
 8021eac:	d118      	bne.n	8021ee0 <udp_input+0x134>
          (ip_addr_isany_val(pcb->remote_ip) ||
 8021eae:	6a3b      	ldr	r3, [r7, #32]
 8021eb0:	685b      	ldr	r3, [r3, #4]
      if ((pcb->remote_port == src) &&
 8021eb2:	2b00      	cmp	r3, #0
 8021eb4:	d005      	beq.n	8021ec2 <udp_input+0x116>
           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
 8021eb6:	6a3b      	ldr	r3, [r7, #32]
 8021eb8:	685a      	ldr	r2, [r3, #4]
 8021eba:	4b43      	ldr	r3, [pc, #268]	@ (8021fc8 <udp_input+0x21c>)
 8021ebc:	691b      	ldr	r3, [r3, #16]
          (ip_addr_isany_val(pcb->remote_ip) ||
 8021ebe:	429a      	cmp	r2, r3
 8021ec0:	d10e      	bne.n	8021ee0 <udp_input+0x134>
        /* the first fully matching PCB */
        if (prev != NULL) {
 8021ec2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021ec4:	2b00      	cmp	r3, #0
 8021ec6:	d014      	beq.n	8021ef2 <udp_input+0x146>
          /* move the pcb to the front of udp_pcbs so that is
             found faster next time */
          prev->next = pcb->next;
 8021ec8:	6a3b      	ldr	r3, [r7, #32]
 8021eca:	68da      	ldr	r2, [r3, #12]
 8021ecc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021ece:	60da      	str	r2, [r3, #12]
          pcb->next = udp_pcbs;
 8021ed0:	4b3e      	ldr	r3, [pc, #248]	@ (8021fcc <udp_input+0x220>)
 8021ed2:	681a      	ldr	r2, [r3, #0]
 8021ed4:	6a3b      	ldr	r3, [r7, #32]
 8021ed6:	60da      	str	r2, [r3, #12]
          udp_pcbs = pcb;
 8021ed8:	4a3c      	ldr	r2, [pc, #240]	@ (8021fcc <udp_input+0x220>)
 8021eda:	6a3b      	ldr	r3, [r7, #32]
 8021edc:	6013      	str	r3, [r2, #0]
        } else {
          UDP_STATS_INC(udp.cachehit);
        }
        break;
 8021ede:	e008      	b.n	8021ef2 <udp_input+0x146>
      }
    }

    prev = pcb;
 8021ee0:	6a3b      	ldr	r3, [r7, #32]
 8021ee2:	627b      	str	r3, [r7, #36]	@ 0x24
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021ee4:	6a3b      	ldr	r3, [r7, #32]
 8021ee6:	68db      	ldr	r3, [r3, #12]
 8021ee8:	623b      	str	r3, [r7, #32]
 8021eea:	6a3b      	ldr	r3, [r7, #32]
 8021eec:	2b00      	cmp	r3, #0
 8021eee:	d1a7      	bne.n	8021e40 <udp_input+0x94>
 8021ef0:	e000      	b.n	8021ef4 <udp_input+0x148>
        break;
 8021ef2:	bf00      	nop
  }
  /* no fully matching pcb found? then look for an unconnected pcb */
  if (pcb == NULL) {
 8021ef4:	6a3b      	ldr	r3, [r7, #32]
 8021ef6:	2b00      	cmp	r3, #0
 8021ef8:	d101      	bne.n	8021efe <udp_input+0x152>
    pcb = uncon_pcb;
 8021efa:	69bb      	ldr	r3, [r7, #24]
 8021efc:	623b      	str	r3, [r7, #32]
  }

  /* Check checksum if this is a match or if it was directed at us. */
  if (pcb != NULL) {
 8021efe:	6a3b      	ldr	r3, [r7, #32]
 8021f00:	2b00      	cmp	r3, #0
 8021f02:	d002      	beq.n	8021f0a <udp_input+0x15e>
    for_us = 1;
 8021f04:	2301      	movs	r3, #1
 8021f06:	77fb      	strb	r3, [r7, #31]
 8021f08:	e00a      	b.n	8021f20 <udp_input+0x174>
      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
    }
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    if (!ip_current_is_v6()) {
      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
 8021f0a:	683b      	ldr	r3, [r7, #0]
 8021f0c:	3304      	adds	r3, #4
 8021f0e:	681a      	ldr	r2, [r3, #0]
 8021f10:	4b2d      	ldr	r3, [pc, #180]	@ (8021fc8 <udp_input+0x21c>)
 8021f12:	695b      	ldr	r3, [r3, #20]
 8021f14:	429a      	cmp	r2, r3
 8021f16:	bf0c      	ite	eq
 8021f18:	2301      	moveq	r3, #1
 8021f1a:	2300      	movne	r3, #0
 8021f1c:	b2db      	uxtb	r3, r3
 8021f1e:	77fb      	strb	r3, [r7, #31]
    }
#endif /* LWIP_IPV4 */
  }

  if (for_us) {
 8021f20:	7ffb      	ldrb	r3, [r7, #31]
 8021f22:	2b00      	cmp	r3, #0
 8021f24:	d041      	beq.n	8021faa <udp_input+0x1fe>
          }
        }
      }
    }
#endif /* CHECKSUM_CHECK_UDP */
    if (pbuf_remove_header(p, UDP_HLEN)) {
 8021f26:	2108      	movs	r1, #8
 8021f28:	6878      	ldr	r0, [r7, #4]
 8021f2a:	f7f9 f8e7 	bl	801b0fc <pbuf_remove_header>
 8021f2e:	4603      	mov	r3, r0
 8021f30:	2b00      	cmp	r3, #0
 8021f32:	d00a      	beq.n	8021f4a <udp_input+0x19e>
      /* Can we cope with this failing? Just assert for now */
      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
 8021f34:	4b20      	ldr	r3, [pc, #128]	@ (8021fb8 <udp_input+0x20c>)
 8021f36:	f44f 72b8 	mov.w	r2, #368	@ 0x170
 8021f3a:	4925      	ldr	r1, [pc, #148]	@ (8021fd0 <udp_input+0x224>)
 8021f3c:	4820      	ldr	r0, [pc, #128]	@ (8021fc0 <udp_input+0x214>)
 8021f3e:	f008 fc0d 	bl	802a75c <iprintf>
      UDP_STATS_INC(udp.drop);
      MIB2_STATS_INC(mib2.udpinerrors);
      pbuf_free(p);
 8021f42:	6878      	ldr	r0, [r7, #4]
 8021f44:	f7f9 f992 	bl	801b26c <pbuf_free>
      goto end;
 8021f48:	e032      	b.n	8021fb0 <udp_input+0x204>
    }

    if (pcb != NULL) {
 8021f4a:	6a3b      	ldr	r3, [r7, #32]
 8021f4c:	2b00      	cmp	r3, #0
 8021f4e:	d012      	beq.n	8021f76 <udp_input+0x1ca>
          }
        }
      }
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
      /* callback */
      if (pcb->recv != NULL) {
 8021f50:	6a3b      	ldr	r3, [r7, #32]
 8021f52:	699b      	ldr	r3, [r3, #24]
 8021f54:	2b00      	cmp	r3, #0
 8021f56:	d00a      	beq.n	8021f6e <udp_input+0x1c2>
        /* now the recv function is responsible for freeing p */
        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
 8021f58:	6a3b      	ldr	r3, [r7, #32]
 8021f5a:	699c      	ldr	r4, [r3, #24]
 8021f5c:	6a3b      	ldr	r3, [r7, #32]
 8021f5e:	69d8      	ldr	r0, [r3, #28]
 8021f60:	8a3b      	ldrh	r3, [r7, #16]
 8021f62:	9300      	str	r3, [sp, #0]
 8021f64:	4b1b      	ldr	r3, [pc, #108]	@ (8021fd4 <udp_input+0x228>)
 8021f66:	687a      	ldr	r2, [r7, #4]
 8021f68:	6a39      	ldr	r1, [r7, #32]
 8021f6a:	47a0      	blx	r4
  } else {
    pbuf_free(p);
  }
end:
  PERF_STOP("udp_input");
  return;
 8021f6c:	e021      	b.n	8021fb2 <udp_input+0x206>
        pbuf_free(p);
 8021f6e:	6878      	ldr	r0, [r7, #4]
 8021f70:	f7f9 f97c 	bl	801b26c <pbuf_free>
        goto end;
 8021f74:	e01c      	b.n	8021fb0 <udp_input+0x204>
      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
 8021f76:	7cfb      	ldrb	r3, [r7, #19]
 8021f78:	2b00      	cmp	r3, #0
 8021f7a:	d112      	bne.n	8021fa2 <udp_input+0x1f6>
 8021f7c:	4b12      	ldr	r3, [pc, #72]	@ (8021fc8 <udp_input+0x21c>)
 8021f7e:	695b      	ldr	r3, [r3, #20]
 8021f80:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8021f84:	2be0      	cmp	r3, #224	@ 0xe0
 8021f86:	d00c      	beq.n	8021fa2 <udp_input+0x1f6>
        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
 8021f88:	4b0f      	ldr	r3, [pc, #60]	@ (8021fc8 <udp_input+0x21c>)
 8021f8a:	899b      	ldrh	r3, [r3, #12]
 8021f8c:	3308      	adds	r3, #8
 8021f8e:	b29b      	uxth	r3, r3
 8021f90:	b21b      	sxth	r3, r3
 8021f92:	4619      	mov	r1, r3
 8021f94:	6878      	ldr	r0, [r7, #4]
 8021f96:	f7f9 f924 	bl	801b1e2 <pbuf_header_force>
        icmp_port_unreach(ip_current_is_v6(), p);
 8021f9a:	2103      	movs	r1, #3
 8021f9c:	6878      	ldr	r0, [r7, #4]
 8021f9e:	f003 fb3b 	bl	8025618 <icmp_dest_unreach>
      pbuf_free(p);
 8021fa2:	6878      	ldr	r0, [r7, #4]
 8021fa4:	f7f9 f962 	bl	801b26c <pbuf_free>
  return;
 8021fa8:	e003      	b.n	8021fb2 <udp_input+0x206>
    pbuf_free(p);
 8021faa:	6878      	ldr	r0, [r7, #4]
 8021fac:	f7f9 f95e 	bl	801b26c <pbuf_free>
  return;
 8021fb0:	bf00      	nop
  UDP_STATS_INC(udp.drop);
  MIB2_STATS_INC(mib2.udpinerrors);
  pbuf_free(p);
  PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
 8021fb2:	372c      	adds	r7, #44	@ 0x2c
 8021fb4:	46bd      	mov	sp, r7
 8021fb6:	bd90      	pop	{r4, r7, pc}
 8021fb8:	080309d4 	.word	0x080309d4
 8021fbc:	08030a78 	.word	0x08030a78
 8021fc0:	08030a28 	.word	0x08030a28
 8021fc4:	08030a90 	.word	0x08030a90
 8021fc8:	24024418 	.word	0x24024418
 8021fcc:	2402afc8 	.word	0x2402afc8
 8021fd0:	08030aac 	.word	0x08030aac
 8021fd4:	24024428 	.word	0x24024428

08021fd8 <udp_send>:
 *
 * @see udp_disconnect() udp_sendto()
 */
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
 8021fd8:	b580      	push	{r7, lr}
 8021fda:	b082      	sub	sp, #8
 8021fdc:	af00      	add	r7, sp, #0
 8021fde:	6078      	str	r0, [r7, #4]
 8021fe0:	6039      	str	r1, [r7, #0]
  LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
 8021fe2:	687b      	ldr	r3, [r7, #4]
 8021fe4:	2b00      	cmp	r3, #0
 8021fe6:	d109      	bne.n	8021ffc <udp_send+0x24>
 8021fe8:	4b11      	ldr	r3, [pc, #68]	@ (8022030 <udp_send+0x58>)
 8021fea:	f240 12d5 	movw	r2, #469	@ 0x1d5
 8021fee:	4911      	ldr	r1, [pc, #68]	@ (8022034 <udp_send+0x5c>)
 8021ff0:	4811      	ldr	r0, [pc, #68]	@ (8022038 <udp_send+0x60>)
 8021ff2:	f008 fbb3 	bl	802a75c <iprintf>
 8021ff6:	f06f 030f 	mvn.w	r3, #15
 8021ffa:	e015      	b.n	8022028 <udp_send+0x50>
  LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
 8021ffc:	683b      	ldr	r3, [r7, #0]
 8021ffe:	2b00      	cmp	r3, #0
 8022000:	d109      	bne.n	8022016 <udp_send+0x3e>
 8022002:	4b0b      	ldr	r3, [pc, #44]	@ (8022030 <udp_send+0x58>)
 8022004:	f44f 72eb 	mov.w	r2, #470	@ 0x1d6
 8022008:	490c      	ldr	r1, [pc, #48]	@ (802203c <udp_send+0x64>)
 802200a:	480b      	ldr	r0, [pc, #44]	@ (8022038 <udp_send+0x60>)
 802200c:	f008 fba6 	bl	802a75c <iprintf>
 8022010:	f06f 030f 	mvn.w	r3, #15
 8022014:	e008      	b.n	8022028 <udp_send+0x50>
  if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
    return ERR_VAL;
  }

  /* send to the packet using remote ip and port stored in the pcb */
  return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
 8022016:	687b      	ldr	r3, [r7, #4]
 8022018:	1d1a      	adds	r2, r3, #4
 802201a:	687b      	ldr	r3, [r7, #4]
 802201c:	8a9b      	ldrh	r3, [r3, #20]
 802201e:	6839      	ldr	r1, [r7, #0]
 8022020:	6878      	ldr	r0, [r7, #4]
 8022022:	f000 f80d 	bl	8022040 <udp_sendto>
 8022026:	4603      	mov	r3, r0
}
 8022028:	4618      	mov	r0, r3
 802202a:	3708      	adds	r7, #8
 802202c:	46bd      	mov	sp, r7
 802202e:	bd80      	pop	{r7, pc}
 8022030:	080309d4 	.word	0x080309d4
 8022034:	08030ac8 	.word	0x08030ac8
 8022038:	08030a28 	.word	0x08030a28
 802203c:	08030ae0 	.word	0x08030ae0

08022040 <udp_sendto>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
           const ip_addr_t *dst_ip, u16_t dst_port)
{
 8022040:	b580      	push	{r7, lr}
 8022042:	b088      	sub	sp, #32
 8022044:	af02      	add	r7, sp, #8
 8022046:	60f8      	str	r0, [r7, #12]
 8022048:	60b9      	str	r1, [r7, #8]
 802204a:	607a      	str	r2, [r7, #4]
 802204c:	807b      	strh	r3, [r7, #2]
                  u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  struct netif *netif;

  LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
 802204e:	68fb      	ldr	r3, [r7, #12]
 8022050:	2b00      	cmp	r3, #0
 8022052:	d109      	bne.n	8022068 <udp_sendto+0x28>
 8022054:	4b23      	ldr	r3, [pc, #140]	@ (80220e4 <udp_sendto+0xa4>)
 8022056:	f44f 7206 	mov.w	r2, #536	@ 0x218
 802205a:	4923      	ldr	r1, [pc, #140]	@ (80220e8 <udp_sendto+0xa8>)
 802205c:	4823      	ldr	r0, [pc, #140]	@ (80220ec <udp_sendto+0xac>)
 802205e:	f008 fb7d 	bl	802a75c <iprintf>
 8022062:	f06f 030f 	mvn.w	r3, #15
 8022066:	e038      	b.n	80220da <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
 8022068:	68bb      	ldr	r3, [r7, #8]
 802206a:	2b00      	cmp	r3, #0
 802206c:	d109      	bne.n	8022082 <udp_sendto+0x42>
 802206e:	4b1d      	ldr	r3, [pc, #116]	@ (80220e4 <udp_sendto+0xa4>)
 8022070:	f240 2219 	movw	r2, #537	@ 0x219
 8022074:	491e      	ldr	r1, [pc, #120]	@ (80220f0 <udp_sendto+0xb0>)
 8022076:	481d      	ldr	r0, [pc, #116]	@ (80220ec <udp_sendto+0xac>)
 8022078:	f008 fb70 	bl	802a75c <iprintf>
 802207c:	f06f 030f 	mvn.w	r3, #15
 8022080:	e02b      	b.n	80220da <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8022082:	687b      	ldr	r3, [r7, #4]
 8022084:	2b00      	cmp	r3, #0
 8022086:	d109      	bne.n	802209c <udp_sendto+0x5c>
 8022088:	4b16      	ldr	r3, [pc, #88]	@ (80220e4 <udp_sendto+0xa4>)
 802208a:	f240 221a 	movw	r2, #538	@ 0x21a
 802208e:	4919      	ldr	r1, [pc, #100]	@ (80220f4 <udp_sendto+0xb4>)
 8022090:	4816      	ldr	r0, [pc, #88]	@ (80220ec <udp_sendto+0xac>)
 8022092:	f008 fb63 	bl	802a75c <iprintf>
 8022096:	f06f 030f 	mvn.w	r3, #15
 802209a:	e01e      	b.n	80220da <udp_sendto+0x9a>
    return ERR_VAL;
  }

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 802209c:	68fb      	ldr	r3, [r7, #12]
 802209e:	7a1b      	ldrb	r3, [r3, #8]
 80220a0:	2b00      	cmp	r3, #0
 80220a2:	d006      	beq.n	80220b2 <udp_sendto+0x72>
    netif = netif_get_by_index(pcb->netif_idx);
 80220a4:	68fb      	ldr	r3, [r7, #12]
 80220a6:	7a1b      	ldrb	r3, [r3, #8]
 80220a8:	4618      	mov	r0, r3
 80220aa:	f7f8 fd1f 	bl	801aaec <netif_get_by_index>
 80220ae:	6178      	str	r0, [r7, #20]
 80220b0:	e003      	b.n	80220ba <udp_sendto+0x7a>

    if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
    {
      /* find the outgoing network interface for this packet */
      netif = ip_route(&pcb->local_ip, dst_ip);
 80220b2:	6878      	ldr	r0, [r7, #4]
 80220b4:	f003 fb44 	bl	8025740 <ip4_route>
 80220b8:	6178      	str	r0, [r7, #20]
    }
  }

  /* no outgoing network interface could be found? */
  if (netif == NULL) {
 80220ba:	697b      	ldr	r3, [r7, #20]
 80220bc:	2b00      	cmp	r3, #0
 80220be:	d102      	bne.n	80220c6 <udp_sendto+0x86>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
    ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
    LWIP_DEBUGF(UDP_DEBUG, ("\n"));
    UDP_STATS_INC(udp.rterr);
    return ERR_RTE;
 80220c0:	f06f 0303 	mvn.w	r3, #3
 80220c4:	e009      	b.n	80220da <udp_sendto+0x9a>
  }
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
 80220c6:	887a      	ldrh	r2, [r7, #2]
 80220c8:	697b      	ldr	r3, [r7, #20]
 80220ca:	9300      	str	r3, [sp, #0]
 80220cc:	4613      	mov	r3, r2
 80220ce:	687a      	ldr	r2, [r7, #4]
 80220d0:	68b9      	ldr	r1, [r7, #8]
 80220d2:	68f8      	ldr	r0, [r7, #12]
 80220d4:	f000 f810 	bl	80220f8 <udp_sendto_if>
 80220d8:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 80220da:	4618      	mov	r0, r3
 80220dc:	3718      	adds	r7, #24
 80220de:	46bd      	mov	sp, r7
 80220e0:	bd80      	pop	{r7, pc}
 80220e2:	bf00      	nop
 80220e4:	080309d4 	.word	0x080309d4
 80220e8:	08030af8 	.word	0x08030af8
 80220ec:	08030a28 	.word	0x08030a28
 80220f0:	08030b10 	.word	0x08030b10
 80220f4:	08030b2c 	.word	0x08030b2c

080220f8 <udp_sendto_if>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
 80220f8:	b580      	push	{r7, lr}
 80220fa:	b088      	sub	sp, #32
 80220fc:	af02      	add	r7, sp, #8
 80220fe:	60f8      	str	r0, [r7, #12]
 8022100:	60b9      	str	r1, [r7, #8]
 8022102:	607a      	str	r2, [r7, #4]
 8022104:	807b      	strh	r3, [r7, #2]
                     u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  const ip_addr_t *src_ip;

  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
 8022106:	68fb      	ldr	r3, [r7, #12]
 8022108:	2b00      	cmp	r3, #0
 802210a:	d109      	bne.n	8022120 <udp_sendto_if+0x28>
 802210c:	4b2e      	ldr	r3, [pc, #184]	@ (80221c8 <udp_sendto_if+0xd0>)
 802210e:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8022112:	492e      	ldr	r1, [pc, #184]	@ (80221cc <udp_sendto_if+0xd4>)
 8022114:	482e      	ldr	r0, [pc, #184]	@ (80221d0 <udp_sendto_if+0xd8>)
 8022116:	f008 fb21 	bl	802a75c <iprintf>
 802211a:	f06f 030f 	mvn.w	r3, #15
 802211e:	e04f      	b.n	80221c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
 8022120:	68bb      	ldr	r3, [r7, #8]
 8022122:	2b00      	cmp	r3, #0
 8022124:	d109      	bne.n	802213a <udp_sendto_if+0x42>
 8022126:	4b28      	ldr	r3, [pc, #160]	@ (80221c8 <udp_sendto_if+0xd0>)
 8022128:	f240 2281 	movw	r2, #641	@ 0x281
 802212c:	4929      	ldr	r1, [pc, #164]	@ (80221d4 <udp_sendto_if+0xdc>)
 802212e:	4828      	ldr	r0, [pc, #160]	@ (80221d0 <udp_sendto_if+0xd8>)
 8022130:	f008 fb14 	bl	802a75c <iprintf>
 8022134:	f06f 030f 	mvn.w	r3, #15
 8022138:	e042      	b.n	80221c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 802213a:	687b      	ldr	r3, [r7, #4]
 802213c:	2b00      	cmp	r3, #0
 802213e:	d109      	bne.n	8022154 <udp_sendto_if+0x5c>
 8022140:	4b21      	ldr	r3, [pc, #132]	@ (80221c8 <udp_sendto_if+0xd0>)
 8022142:	f240 2282 	movw	r2, #642	@ 0x282
 8022146:	4924      	ldr	r1, [pc, #144]	@ (80221d8 <udp_sendto_if+0xe0>)
 8022148:	4821      	ldr	r0, [pc, #132]	@ (80221d0 <udp_sendto_if+0xd8>)
 802214a:	f008 fb07 	bl	802a75c <iprintf>
 802214e:	f06f 030f 	mvn.w	r3, #15
 8022152:	e035      	b.n	80221c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
 8022154:	6a3b      	ldr	r3, [r7, #32]
 8022156:	2b00      	cmp	r3, #0
 8022158:	d109      	bne.n	802216e <udp_sendto_if+0x76>
 802215a:	4b1b      	ldr	r3, [pc, #108]	@ (80221c8 <udp_sendto_if+0xd0>)
 802215c:	f240 2283 	movw	r2, #643	@ 0x283
 8022160:	491e      	ldr	r1, [pc, #120]	@ (80221dc <udp_sendto_if+0xe4>)
 8022162:	481b      	ldr	r0, [pc, #108]	@ (80221d0 <udp_sendto_if+0xd8>)
 8022164:	f008 fafa 	bl	802a75c <iprintf>
 8022168:	f06f 030f 	mvn.w	r3, #15
 802216c:	e028      	b.n	80221c0 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
  else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 802216e:	68fb      	ldr	r3, [r7, #12]
 8022170:	2b00      	cmp	r3, #0
 8022172:	d009      	beq.n	8022188 <udp_sendto_if+0x90>
 8022174:	68fb      	ldr	r3, [r7, #12]
 8022176:	681b      	ldr	r3, [r3, #0]
 8022178:	2b00      	cmp	r3, #0
 802217a:	d005      	beq.n	8022188 <udp_sendto_if+0x90>
        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
 802217c:	68fb      	ldr	r3, [r7, #12]
 802217e:	681b      	ldr	r3, [r3, #0]
 8022180:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8022184:	2be0      	cmp	r3, #224	@ 0xe0
 8022186:	d103      	bne.n	8022190 <udp_sendto_if+0x98>
      /* if the local_ip is any or multicast
       * use the outgoing network interface IP address as source address */
      src_ip = netif_ip_addr4(netif);
 8022188:	6a3b      	ldr	r3, [r7, #32]
 802218a:	3304      	adds	r3, #4
 802218c:	617b      	str	r3, [r7, #20]
 802218e:	e00b      	b.n	80221a8 <udp_sendto_if+0xb0>
    } else {
      /* check if UDP PCB local IP address is correct
       * this could be an old address if netif->ip_addr has changed */
      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
 8022190:	68fb      	ldr	r3, [r7, #12]
 8022192:	681a      	ldr	r2, [r3, #0]
 8022194:	6a3b      	ldr	r3, [r7, #32]
 8022196:	3304      	adds	r3, #4
 8022198:	681b      	ldr	r3, [r3, #0]
 802219a:	429a      	cmp	r2, r3
 802219c:	d002      	beq.n	80221a4 <udp_sendto_if+0xac>
        /* local_ip doesn't match, drop the packet */
        return ERR_RTE;
 802219e:	f06f 0303 	mvn.w	r3, #3
 80221a2:	e00d      	b.n	80221c0 <udp_sendto_if+0xc8>
      }
      /* use UDP PCB local IP address as source address */
      src_ip = &pcb->local_ip;
 80221a4:	68fb      	ldr	r3, [r7, #12]
 80221a6:	617b      	str	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
 80221a8:	887a      	ldrh	r2, [r7, #2]
 80221aa:	697b      	ldr	r3, [r7, #20]
 80221ac:	9301      	str	r3, [sp, #4]
 80221ae:	6a3b      	ldr	r3, [r7, #32]
 80221b0:	9300      	str	r3, [sp, #0]
 80221b2:	4613      	mov	r3, r2
 80221b4:	687a      	ldr	r2, [r7, #4]
 80221b6:	68b9      	ldr	r1, [r7, #8]
 80221b8:	68f8      	ldr	r0, [r7, #12]
 80221ba:	f000 f811 	bl	80221e0 <udp_sendto_if_src>
 80221be:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 80221c0:	4618      	mov	r0, r3
 80221c2:	3718      	adds	r7, #24
 80221c4:	46bd      	mov	sp, r7
 80221c6:	bd80      	pop	{r7, pc}
 80221c8:	080309d4 	.word	0x080309d4
 80221cc:	08030b48 	.word	0x08030b48
 80221d0:	08030a28 	.word	0x08030a28
 80221d4:	08030b64 	.word	0x08030b64
 80221d8:	08030b80 	.word	0x08030b80
 80221dc:	08030ba0 	.word	0x08030ba0

080221e0 <udp_sendto_if_src>:
/** @ingroup udp_raw
 * Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
 80221e0:	b580      	push	{r7, lr}
 80221e2:	b08c      	sub	sp, #48	@ 0x30
 80221e4:	af04      	add	r7, sp, #16
 80221e6:	60f8      	str	r0, [r7, #12]
 80221e8:	60b9      	str	r1, [r7, #8]
 80221ea:	607a      	str	r2, [r7, #4]
 80221ec:	807b      	strh	r3, [r7, #2]
  err_t err;
  struct pbuf *q; /* q will be sent down the stack */
  u8_t ip_proto;
  u8_t ttl;

  LWIP_ASSERT_CORE_LOCKED();
 80221ee:	f7ee fe87 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
 80221f2:	68fb      	ldr	r3, [r7, #12]
 80221f4:	2b00      	cmp	r3, #0
 80221f6:	d109      	bne.n	802220c <udp_sendto_if_src+0x2c>
 80221f8:	4b65      	ldr	r3, [pc, #404]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 80221fa:	f240 22d1 	movw	r2, #721	@ 0x2d1
 80221fe:	4965      	ldr	r1, [pc, #404]	@ (8022394 <udp_sendto_if_src+0x1b4>)
 8022200:	4865      	ldr	r0, [pc, #404]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 8022202:	f008 faab 	bl	802a75c <iprintf>
 8022206:	f06f 030f 	mvn.w	r3, #15
 802220a:	e0bc      	b.n	8022386 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
 802220c:	68bb      	ldr	r3, [r7, #8]
 802220e:	2b00      	cmp	r3, #0
 8022210:	d109      	bne.n	8022226 <udp_sendto_if_src+0x46>
 8022212:	4b5f      	ldr	r3, [pc, #380]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 8022214:	f240 22d2 	movw	r2, #722	@ 0x2d2
 8022218:	4960      	ldr	r1, [pc, #384]	@ (802239c <udp_sendto_if_src+0x1bc>)
 802221a:	485f      	ldr	r0, [pc, #380]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 802221c:	f008 fa9e 	bl	802a75c <iprintf>
 8022220:	f06f 030f 	mvn.w	r3, #15
 8022224:	e0af      	b.n	8022386 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8022226:	687b      	ldr	r3, [r7, #4]
 8022228:	2b00      	cmp	r3, #0
 802222a:	d109      	bne.n	8022240 <udp_sendto_if_src+0x60>
 802222c:	4b58      	ldr	r3, [pc, #352]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 802222e:	f240 22d3 	movw	r2, #723	@ 0x2d3
 8022232:	495b      	ldr	r1, [pc, #364]	@ (80223a0 <udp_sendto_if_src+0x1c0>)
 8022234:	4858      	ldr	r0, [pc, #352]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 8022236:	f008 fa91 	bl	802a75c <iprintf>
 802223a:	f06f 030f 	mvn.w	r3, #15
 802223e:	e0a2      	b.n	8022386 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
 8022240:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8022242:	2b00      	cmp	r3, #0
 8022244:	d109      	bne.n	802225a <udp_sendto_if_src+0x7a>
 8022246:	4b52      	ldr	r3, [pc, #328]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 8022248:	f44f 7235 	mov.w	r2, #724	@ 0x2d4
 802224c:	4955      	ldr	r1, [pc, #340]	@ (80223a4 <udp_sendto_if_src+0x1c4>)
 802224e:	4852      	ldr	r0, [pc, #328]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 8022250:	f008 fa84 	bl	802a75c <iprintf>
 8022254:	f06f 030f 	mvn.w	r3, #15
 8022258:	e095      	b.n	8022386 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
 802225a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802225c:	2b00      	cmp	r3, #0
 802225e:	d109      	bne.n	8022274 <udp_sendto_if_src+0x94>
 8022260:	4b4b      	ldr	r3, [pc, #300]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 8022262:	f240 22d5 	movw	r2, #725	@ 0x2d5
 8022266:	4950      	ldr	r1, [pc, #320]	@ (80223a8 <udp_sendto_if_src+0x1c8>)
 8022268:	484b      	ldr	r0, [pc, #300]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 802226a:	f008 fa77 	bl	802a75c <iprintf>
 802226e:	f06f 030f 	mvn.w	r3, #15
 8022272:	e088      	b.n	8022386 <udp_sendto_if_src+0x1a6>
    return ERR_VAL;
  }
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */

  /* if the PCB is not yet bound to a port, bind it here */
  if (pcb->local_port == 0) {
 8022274:	68fb      	ldr	r3, [r7, #12]
 8022276:	8a5b      	ldrh	r3, [r3, #18]
 8022278:	2b00      	cmp	r3, #0
 802227a:	d10f      	bne.n	802229c <udp_sendto_if_src+0xbc>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 802227c:	68f9      	ldr	r1, [r7, #12]
 802227e:	68fb      	ldr	r3, [r7, #12]
 8022280:	8a5b      	ldrh	r3, [r3, #18]
 8022282:	461a      	mov	r2, r3
 8022284:	68f8      	ldr	r0, [r7, #12]
 8022286:	f000 f893 	bl	80223b0 <udp_bind>
 802228a:	4603      	mov	r3, r0
 802228c:	76fb      	strb	r3, [r7, #27]
    if (err != ERR_OK) {
 802228e:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8022292:	2b00      	cmp	r3, #0
 8022294:	d002      	beq.n	802229c <udp_sendto_if_src+0xbc>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
      return err;
 8022296:	f997 301b 	ldrsb.w	r3, [r7, #27]
 802229a:	e074      	b.n	8022386 <udp_sendto_if_src+0x1a6>
    }
  }

  /* packet too large to add a UDP header without causing an overflow? */
  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
 802229c:	68bb      	ldr	r3, [r7, #8]
 802229e:	891b      	ldrh	r3, [r3, #8]
 80222a0:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 80222a4:	4293      	cmp	r3, r2
 80222a6:	d902      	bls.n	80222ae <udp_sendto_if_src+0xce>
    return ERR_MEM;
 80222a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80222ac:	e06b      	b.n	8022386 <udp_sendto_if_src+0x1a6>
  }
  /* not enough space to add an UDP header to first pbuf in given p chain? */
  if (pbuf_add_header(p, UDP_HLEN)) {
 80222ae:	2108      	movs	r1, #8
 80222b0:	68b8      	ldr	r0, [r7, #8]
 80222b2:	f7f8 ff13 	bl	801b0dc <pbuf_add_header>
 80222b6:	4603      	mov	r3, r0
 80222b8:	2b00      	cmp	r3, #0
 80222ba:	d015      	beq.n	80222e8 <udp_sendto_if_src+0x108>
    /* allocate header in a separate new pbuf */
    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
 80222bc:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80222c0:	2108      	movs	r1, #8
 80222c2:	2022      	movs	r0, #34	@ 0x22
 80222c4:	f7f8 fcbc 	bl	801ac40 <pbuf_alloc>
 80222c8:	61f8      	str	r0, [r7, #28]
    /* new header pbuf could not be allocated? */
    if (q == NULL) {
 80222ca:	69fb      	ldr	r3, [r7, #28]
 80222cc:	2b00      	cmp	r3, #0
 80222ce:	d102      	bne.n	80222d6 <udp_sendto_if_src+0xf6>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
      return ERR_MEM;
 80222d0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80222d4:	e057      	b.n	8022386 <udp_sendto_if_src+0x1a6>
    }
    if (p->tot_len != 0) {
 80222d6:	68bb      	ldr	r3, [r7, #8]
 80222d8:	891b      	ldrh	r3, [r3, #8]
 80222da:	2b00      	cmp	r3, #0
 80222dc:	d006      	beq.n	80222ec <udp_sendto_if_src+0x10c>
      /* chain header q in front of given pbuf p (only if p contains data) */
      pbuf_chain(q, p);
 80222de:	68b9      	ldr	r1, [r7, #8]
 80222e0:	69f8      	ldr	r0, [r7, #28]
 80222e2:	f7f9 f8e7 	bl	801b4b4 <pbuf_chain>
 80222e6:	e001      	b.n	80222ec <udp_sendto_if_src+0x10c>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
  } else {
    /* adding space for header within p succeeded */
    /* first pbuf q equals given pbuf */
    q = p;
 80222e8:	68bb      	ldr	r3, [r7, #8]
 80222ea:	61fb      	str	r3, [r7, #28]
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
  }
  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
 80222ec:	69fb      	ldr	r3, [r7, #28]
 80222ee:	895b      	ldrh	r3, [r3, #10]
 80222f0:	2b07      	cmp	r3, #7
 80222f2:	d806      	bhi.n	8022302 <udp_sendto_if_src+0x122>
 80222f4:	4b26      	ldr	r3, [pc, #152]	@ (8022390 <udp_sendto_if_src+0x1b0>)
 80222f6:	f240 320d 	movw	r2, #781	@ 0x30d
 80222fa:	492c      	ldr	r1, [pc, #176]	@ (80223ac <udp_sendto_if_src+0x1cc>)
 80222fc:	4826      	ldr	r0, [pc, #152]	@ (8022398 <udp_sendto_if_src+0x1b8>)
 80222fe:	f008 fa2d 	bl	802a75c <iprintf>
              (q->len >= sizeof(struct udp_hdr)));
  /* q now represents the packet to be sent */
  udphdr = (struct udp_hdr *)q->payload;
 8022302:	69fb      	ldr	r3, [r7, #28]
 8022304:	685b      	ldr	r3, [r3, #4]
 8022306:	617b      	str	r3, [r7, #20]
  udphdr->src = lwip_htons(pcb->local_port);
 8022308:	68fb      	ldr	r3, [r7, #12]
 802230a:	8a5b      	ldrh	r3, [r3, #18]
 802230c:	4618      	mov	r0, r3
 802230e:	f7f7 facb 	bl	80198a8 <lwip_htons>
 8022312:	4603      	mov	r3, r0
 8022314:	461a      	mov	r2, r3
 8022316:	697b      	ldr	r3, [r7, #20]
 8022318:	801a      	strh	r2, [r3, #0]
  udphdr->dest = lwip_htons(dst_port);
 802231a:	887b      	ldrh	r3, [r7, #2]
 802231c:	4618      	mov	r0, r3
 802231e:	f7f7 fac3 	bl	80198a8 <lwip_htons>
 8022322:	4603      	mov	r3, r0
 8022324:	461a      	mov	r2, r3
 8022326:	697b      	ldr	r3, [r7, #20]
 8022328:	805a      	strh	r2, [r3, #2]
  /* in UDP, 0 checksum means 'no checksum' */
  udphdr->chksum = 0x0000;
 802232a:	697b      	ldr	r3, [r7, #20]
 802232c:	2200      	movs	r2, #0
 802232e:	719a      	strb	r2, [r3, #6]
 8022330:	2200      	movs	r2, #0
 8022332:	71da      	strb	r2, [r3, #7]
    ip_proto = IP_PROTO_UDPLITE;
  } else
#endif /* LWIP_UDPLITE */
  {      /* UDP */
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
    udphdr->len = lwip_htons(q->tot_len);
 8022334:	69fb      	ldr	r3, [r7, #28]
 8022336:	891b      	ldrh	r3, [r3, #8]
 8022338:	4618      	mov	r0, r3
 802233a:	f7f7 fab5 	bl	80198a8 <lwip_htons>
 802233e:	4603      	mov	r3, r0
 8022340:	461a      	mov	r2, r3
 8022342:	697b      	ldr	r3, [r7, #20]
 8022344:	809a      	strh	r2, [r3, #4]
        }
        udphdr->chksum = udpchksum;
      }
    }
#endif /* CHECKSUM_GEN_UDP */
    ip_proto = IP_PROTO_UDP;
 8022346:	2311      	movs	r3, #17
 8022348:	74fb      	strb	r3, [r7, #19]

  /* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
  ttl = pcb->ttl;
 802234a:	68fb      	ldr	r3, [r7, #12]
 802234c:	7adb      	ldrb	r3, [r3, #11]
 802234e:	74bb      	strb	r3, [r7, #18]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
  /* output to IP */
  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
 8022350:	68fb      	ldr	r3, [r7, #12]
 8022352:	7a9b      	ldrb	r3, [r3, #10]
 8022354:	7cb9      	ldrb	r1, [r7, #18]
 8022356:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8022358:	9202      	str	r2, [sp, #8]
 802235a:	7cfa      	ldrb	r2, [r7, #19]
 802235c:	9201      	str	r2, [sp, #4]
 802235e:	9300      	str	r3, [sp, #0]
 8022360:	460b      	mov	r3, r1
 8022362:	687a      	ldr	r2, [r7, #4]
 8022364:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8022366:	69f8      	ldr	r0, [r7, #28]
 8022368:	f003 fbf2 	bl	8025b50 <ip4_output_if_src>
 802236c:	4603      	mov	r3, r0
 802236e:	76fb      	strb	r3, [r7, #27]

  /* @todo: must this be increased even if error occurred? */
  MIB2_STATS_INC(mib2.udpoutdatagrams);

  /* did we chain a separate header pbuf earlier? */
  if (q != p) {
 8022370:	69fa      	ldr	r2, [r7, #28]
 8022372:	68bb      	ldr	r3, [r7, #8]
 8022374:	429a      	cmp	r2, r3
 8022376:	d004      	beq.n	8022382 <udp_sendto_if_src+0x1a2>
    /* free the header pbuf */
    pbuf_free(q);
 8022378:	69f8      	ldr	r0, [r7, #28]
 802237a:	f7f8 ff77 	bl	801b26c <pbuf_free>
    q = NULL;
 802237e:	2300      	movs	r3, #0
 8022380:	61fb      	str	r3, [r7, #28]
    /* p is still referenced by the caller, and will live on */
  }

  UDP_STATS_INC(udp.xmit);
  return err;
 8022382:	f997 301b 	ldrsb.w	r3, [r7, #27]
}
 8022386:	4618      	mov	r0, r3
 8022388:	3720      	adds	r7, #32
 802238a:	46bd      	mov	sp, r7
 802238c:	bd80      	pop	{r7, pc}
 802238e:	bf00      	nop
 8022390:	080309d4 	.word	0x080309d4
 8022394:	08030bc0 	.word	0x08030bc0
 8022398:	08030a28 	.word	0x08030a28
 802239c:	08030be0 	.word	0x08030be0
 80223a0:	08030c00 	.word	0x08030c00
 80223a4:	08030c24 	.word	0x08030c24
 80223a8:	08030c48 	.word	0x08030c48
 80223ac:	08030c6c 	.word	0x08030c6c

080223b0 <udp_bind>:
 *
 * @see udp_disconnect()
 */
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 80223b0:	b580      	push	{r7, lr}
 80223b2:	b086      	sub	sp, #24
 80223b4:	af00      	add	r7, sp, #0
 80223b6:	60f8      	str	r0, [r7, #12]
 80223b8:	60b9      	str	r1, [r7, #8]
 80223ba:	4613      	mov	r3, r2
 80223bc:	80fb      	strh	r3, [r7, #6]
  u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
  ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  LWIP_ASSERT_CORE_LOCKED();
 80223be:	f7ee fd9f 	bl	8010f00 <sys_check_core_locking>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 80223c2:	68bb      	ldr	r3, [r7, #8]
 80223c4:	2b00      	cmp	r3, #0
 80223c6:	d101      	bne.n	80223cc <udp_bind+0x1c>
    ipaddr = IP4_ADDR_ANY;
 80223c8:	4b39      	ldr	r3, [pc, #228]	@ (80224b0 <udp_bind+0x100>)
 80223ca:	60bb      	str	r3, [r7, #8]
  }
#else /* LWIP_IPV4 */
  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */

  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
 80223cc:	68fb      	ldr	r3, [r7, #12]
 80223ce:	2b00      	cmp	r3, #0
 80223d0:	d109      	bne.n	80223e6 <udp_bind+0x36>
 80223d2:	4b38      	ldr	r3, [pc, #224]	@ (80224b4 <udp_bind+0x104>)
 80223d4:	f240 32b7 	movw	r2, #951	@ 0x3b7
 80223d8:	4937      	ldr	r1, [pc, #220]	@ (80224b8 <udp_bind+0x108>)
 80223da:	4838      	ldr	r0, [pc, #224]	@ (80224bc <udp_bind+0x10c>)
 80223dc:	f008 f9be 	bl	802a75c <iprintf>
 80223e0:	f06f 030f 	mvn.w	r3, #15
 80223e4:	e060      	b.n	80224a8 <udp_bind+0xf8>

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));

  rebind = 0;
 80223e6:	2300      	movs	r3, #0
 80223e8:	74fb      	strb	r3, [r7, #19]
  /* Check for double bind and rebind of the same pcb */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80223ea:	4b35      	ldr	r3, [pc, #212]	@ (80224c0 <udp_bind+0x110>)
 80223ec:	681b      	ldr	r3, [r3, #0]
 80223ee:	617b      	str	r3, [r7, #20]
 80223f0:	e009      	b.n	8022406 <udp_bind+0x56>
    /* is this UDP PCB already on active list? */
    if (pcb == ipcb) {
 80223f2:	68fa      	ldr	r2, [r7, #12]
 80223f4:	697b      	ldr	r3, [r7, #20]
 80223f6:	429a      	cmp	r2, r3
 80223f8:	d102      	bne.n	8022400 <udp_bind+0x50>
      rebind = 1;
 80223fa:	2301      	movs	r3, #1
 80223fc:	74fb      	strb	r3, [r7, #19]
      break;
 80223fe:	e005      	b.n	802240c <udp_bind+0x5c>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022400:	697b      	ldr	r3, [r7, #20]
 8022402:	68db      	ldr	r3, [r3, #12]
 8022404:	617b      	str	r3, [r7, #20]
 8022406:	697b      	ldr	r3, [r7, #20]
 8022408:	2b00      	cmp	r3, #0
 802240a:	d1f2      	bne.n	80223f2 <udp_bind+0x42>
    ipaddr = &zoned_ipaddr;
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  /* no port specified? */
  if (port == 0) {
 802240c:	88fb      	ldrh	r3, [r7, #6]
 802240e:	2b00      	cmp	r3, #0
 8022410:	d109      	bne.n	8022426 <udp_bind+0x76>
    port = udp_new_port();
 8022412:	f7ff fc2f 	bl	8021c74 <udp_new_port>
 8022416:	4603      	mov	r3, r0
 8022418:	80fb      	strh	r3, [r7, #6]
    if (port == 0) {
 802241a:	88fb      	ldrh	r3, [r7, #6]
 802241c:	2b00      	cmp	r3, #0
 802241e:	d12c      	bne.n	802247a <udp_bind+0xca>
      /* no more ports available in local range */
      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
      return ERR_USE;
 8022420:	f06f 0307 	mvn.w	r3, #7
 8022424:	e040      	b.n	80224a8 <udp_bind+0xf8>
    }
  } else {
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022426:	4b26      	ldr	r3, [pc, #152]	@ (80224c0 <udp_bind+0x110>)
 8022428:	681b      	ldr	r3, [r3, #0]
 802242a:	617b      	str	r3, [r7, #20]
 802242c:	e022      	b.n	8022474 <udp_bind+0xc4>
      if (pcb != ipcb) {
 802242e:	68fa      	ldr	r2, [r7, #12]
 8022430:	697b      	ldr	r3, [r7, #20]
 8022432:	429a      	cmp	r2, r3
 8022434:	d01b      	beq.n	802246e <udp_bind+0xbe>
        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
            !ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
        {
          /* port matches that of PCB in list and REUSEADDR not set -> reject */
          if ((ipcb->local_port == port) &&
 8022436:	697b      	ldr	r3, [r7, #20]
 8022438:	8a5b      	ldrh	r3, [r3, #18]
 802243a:	88fa      	ldrh	r2, [r7, #6]
 802243c:	429a      	cmp	r2, r3
 802243e:	d116      	bne.n	802246e <udp_bind+0xbe>
              /* IP address matches or any IP used? */
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 8022440:	697b      	ldr	r3, [r7, #20]
 8022442:	681a      	ldr	r2, [r3, #0]
 8022444:	68bb      	ldr	r3, [r7, #8]
 8022446:	681b      	ldr	r3, [r3, #0]
          if ((ipcb->local_port == port) &&
 8022448:	429a      	cmp	r2, r3
 802244a:	d00d      	beq.n	8022468 <udp_bind+0xb8>
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 802244c:	68bb      	ldr	r3, [r7, #8]
 802244e:	2b00      	cmp	r3, #0
 8022450:	d00a      	beq.n	8022468 <udp_bind+0xb8>
 8022452:	68bb      	ldr	r3, [r7, #8]
 8022454:	681b      	ldr	r3, [r3, #0]
 8022456:	2b00      	cmp	r3, #0
 8022458:	d006      	beq.n	8022468 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 802245a:	697b      	ldr	r3, [r7, #20]
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 802245c:	2b00      	cmp	r3, #0
 802245e:	d003      	beq.n	8022468 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 8022460:	697b      	ldr	r3, [r7, #20]
 8022462:	681b      	ldr	r3, [r3, #0]
 8022464:	2b00      	cmp	r3, #0
 8022466:	d102      	bne.n	802246e <udp_bind+0xbe>
            /* other PCB already binds to this local IP and port */
            LWIP_DEBUGF(UDP_DEBUG,
                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
            return ERR_USE;
 8022468:	f06f 0307 	mvn.w	r3, #7
 802246c:	e01c      	b.n	80224a8 <udp_bind+0xf8>
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802246e:	697b      	ldr	r3, [r7, #20]
 8022470:	68db      	ldr	r3, [r3, #12]
 8022472:	617b      	str	r3, [r7, #20]
 8022474:	697b      	ldr	r3, [r7, #20]
 8022476:	2b00      	cmp	r3, #0
 8022478:	d1d9      	bne.n	802242e <udp_bind+0x7e>
        }
      }
    }
  }

  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
 802247a:	68bb      	ldr	r3, [r7, #8]
 802247c:	2b00      	cmp	r3, #0
 802247e:	d002      	beq.n	8022486 <udp_bind+0xd6>
 8022480:	68bb      	ldr	r3, [r7, #8]
 8022482:	681b      	ldr	r3, [r3, #0]
 8022484:	e000      	b.n	8022488 <udp_bind+0xd8>
 8022486:	2300      	movs	r3, #0
 8022488:	68fa      	ldr	r2, [r7, #12]
 802248a:	6013      	str	r3, [r2, #0]

  pcb->local_port = port;
 802248c:	68fb      	ldr	r3, [r7, #12]
 802248e:	88fa      	ldrh	r2, [r7, #6]
 8022490:	825a      	strh	r2, [r3, #18]
  mib2_udp_bind(pcb);
  /* pcb not active yet? */
  if (rebind == 0) {
 8022492:	7cfb      	ldrb	r3, [r7, #19]
 8022494:	2b00      	cmp	r3, #0
 8022496:	d106      	bne.n	80224a6 <udp_bind+0xf6>
    /* place the PCB on the active list if not already there */
    pcb->next = udp_pcbs;
 8022498:	4b09      	ldr	r3, [pc, #36]	@ (80224c0 <udp_bind+0x110>)
 802249a:	681a      	ldr	r2, [r3, #0]
 802249c:	68fb      	ldr	r3, [r7, #12]
 802249e:	60da      	str	r2, [r3, #12]
    udp_pcbs = pcb;
 80224a0:	4a07      	ldr	r2, [pc, #28]	@ (80224c0 <udp_bind+0x110>)
 80224a2:	68fb      	ldr	r3, [r7, #12]
 80224a4:	6013      	str	r3, [r2, #0]
  }
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
  return ERR_OK;
 80224a6:	2300      	movs	r3, #0
}
 80224a8:	4618      	mov	r0, r3
 80224aa:	3718      	adds	r7, #24
 80224ac:	46bd      	mov	sp, r7
 80224ae:	bd80      	pop	{r7, pc}
 80224b0:	08031b58 	.word	0x08031b58
 80224b4:	080309d4 	.word	0x080309d4
 80224b8:	08030c9c 	.word	0x08030c9c
 80224bc:	08030a28 	.word	0x08030a28
 80224c0:	2402afc8 	.word	0x2402afc8

080224c4 <udp_connect>:
 *
 * @see udp_disconnect()
 */
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 80224c4:	b580      	push	{r7, lr}
 80224c6:	b086      	sub	sp, #24
 80224c8:	af00      	add	r7, sp, #0
 80224ca:	60f8      	str	r0, [r7, #12]
 80224cc:	60b9      	str	r1, [r7, #8]
 80224ce:	4613      	mov	r3, r2
 80224d0:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *ipcb;

  LWIP_ASSERT_CORE_LOCKED();
 80224d2:	f7ee fd15 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 80224d6:	68fb      	ldr	r3, [r7, #12]
 80224d8:	2b00      	cmp	r3, #0
 80224da:	d109      	bne.n	80224f0 <udp_connect+0x2c>
 80224dc:	4b2c      	ldr	r3, [pc, #176]	@ (8022590 <udp_connect+0xcc>)
 80224de:	f240 4235 	movw	r2, #1077	@ 0x435
 80224e2:	492c      	ldr	r1, [pc, #176]	@ (8022594 <udp_connect+0xd0>)
 80224e4:	482c      	ldr	r0, [pc, #176]	@ (8022598 <udp_connect+0xd4>)
 80224e6:	f008 f939 	bl	802a75c <iprintf>
 80224ea:	f06f 030f 	mvn.w	r3, #15
 80224ee:	e04b      	b.n	8022588 <udp_connect+0xc4>
  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 80224f0:	68bb      	ldr	r3, [r7, #8]
 80224f2:	2b00      	cmp	r3, #0
 80224f4:	d109      	bne.n	802250a <udp_connect+0x46>
 80224f6:	4b26      	ldr	r3, [pc, #152]	@ (8022590 <udp_connect+0xcc>)
 80224f8:	f240 4236 	movw	r2, #1078	@ 0x436
 80224fc:	4927      	ldr	r1, [pc, #156]	@ (802259c <udp_connect+0xd8>)
 80224fe:	4826      	ldr	r0, [pc, #152]	@ (8022598 <udp_connect+0xd4>)
 8022500:	f008 f92c 	bl	802a75c <iprintf>
 8022504:	f06f 030f 	mvn.w	r3, #15
 8022508:	e03e      	b.n	8022588 <udp_connect+0xc4>

  if (pcb->local_port == 0) {
 802250a:	68fb      	ldr	r3, [r7, #12]
 802250c:	8a5b      	ldrh	r3, [r3, #18]
 802250e:	2b00      	cmp	r3, #0
 8022510:	d10f      	bne.n	8022532 <udp_connect+0x6e>
    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 8022512:	68f9      	ldr	r1, [r7, #12]
 8022514:	68fb      	ldr	r3, [r7, #12]
 8022516:	8a5b      	ldrh	r3, [r3, #18]
 8022518:	461a      	mov	r2, r3
 802251a:	68f8      	ldr	r0, [r7, #12]
 802251c:	f7ff ff48 	bl	80223b0 <udp_bind>
 8022520:	4603      	mov	r3, r0
 8022522:	75fb      	strb	r3, [r7, #23]
    if (err != ERR_OK) {
 8022524:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022528:	2b00      	cmp	r3, #0
 802252a:	d002      	beq.n	8022532 <udp_connect+0x6e>
      return err;
 802252c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022530:	e02a      	b.n	8022588 <udp_connect+0xc4>
    }
  }

  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
 8022532:	68bb      	ldr	r3, [r7, #8]
 8022534:	2b00      	cmp	r3, #0
 8022536:	d002      	beq.n	802253e <udp_connect+0x7a>
 8022538:	68bb      	ldr	r3, [r7, #8]
 802253a:	681b      	ldr	r3, [r3, #0]
 802253c:	e000      	b.n	8022540 <udp_connect+0x7c>
 802253e:	2300      	movs	r3, #0
 8022540:	68fa      	ldr	r2, [r7, #12]
 8022542:	6053      	str	r3, [r2, #4]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  pcb->remote_port = port;
 8022544:	68fb      	ldr	r3, [r7, #12]
 8022546:	88fa      	ldrh	r2, [r7, #6]
 8022548:	829a      	strh	r2, [r3, #20]
  pcb->flags |= UDP_FLAGS_CONNECTED;
 802254a:	68fb      	ldr	r3, [r7, #12]
 802254c:	7c1b      	ldrb	r3, [r3, #16]
 802254e:	f043 0304 	orr.w	r3, r3, #4
 8022552:	b2da      	uxtb	r2, r3
 8022554:	68fb      	ldr	r3, [r7, #12]
 8022556:	741a      	strb	r2, [r3, #16]
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                          pcb->remote_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));

  /* Insert UDP PCB into the list of active UDP PCBs. */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022558:	4b11      	ldr	r3, [pc, #68]	@ (80225a0 <udp_connect+0xdc>)
 802255a:	681b      	ldr	r3, [r3, #0]
 802255c:	613b      	str	r3, [r7, #16]
 802255e:	e008      	b.n	8022572 <udp_connect+0xae>
    if (pcb == ipcb) {
 8022560:	68fa      	ldr	r2, [r7, #12]
 8022562:	693b      	ldr	r3, [r7, #16]
 8022564:	429a      	cmp	r2, r3
 8022566:	d101      	bne.n	802256c <udp_connect+0xa8>
      /* already on the list, just return */
      return ERR_OK;
 8022568:	2300      	movs	r3, #0
 802256a:	e00d      	b.n	8022588 <udp_connect+0xc4>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802256c:	693b      	ldr	r3, [r7, #16]
 802256e:	68db      	ldr	r3, [r3, #12]
 8022570:	613b      	str	r3, [r7, #16]
 8022572:	693b      	ldr	r3, [r7, #16]
 8022574:	2b00      	cmp	r3, #0
 8022576:	d1f3      	bne.n	8022560 <udp_connect+0x9c>
    }
  }
  /* PCB not yet on the list, add PCB now */
  pcb->next = udp_pcbs;
 8022578:	4b09      	ldr	r3, [pc, #36]	@ (80225a0 <udp_connect+0xdc>)
 802257a:	681a      	ldr	r2, [r3, #0]
 802257c:	68fb      	ldr	r3, [r7, #12]
 802257e:	60da      	str	r2, [r3, #12]
  udp_pcbs = pcb;
 8022580:	4a07      	ldr	r2, [pc, #28]	@ (80225a0 <udp_connect+0xdc>)
 8022582:	68fb      	ldr	r3, [r7, #12]
 8022584:	6013      	str	r3, [r2, #0]
  return ERR_OK;
 8022586:	2300      	movs	r3, #0
}
 8022588:	4618      	mov	r0, r3
 802258a:	3718      	adds	r7, #24
 802258c:	46bd      	mov	sp, r7
 802258e:	bd80      	pop	{r7, pc}
 8022590:	080309d4 	.word	0x080309d4
 8022594:	08030cb4 	.word	0x08030cb4
 8022598:	08030a28 	.word	0x08030a28
 802259c:	08030cd0 	.word	0x08030cd0
 80225a0:	2402afc8 	.word	0x2402afc8

080225a4 <udp_disconnect>:
 *
 * @param pcb the udp pcb to disconnect.
 */
void
udp_disconnect(struct udp_pcb *pcb)
{
 80225a4:	b580      	push	{r7, lr}
 80225a6:	b082      	sub	sp, #8
 80225a8:	af00      	add	r7, sp, #0
 80225aa:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 80225ac:	f7ee fca8 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
 80225b0:	687b      	ldr	r3, [r7, #4]
 80225b2:	2b00      	cmp	r3, #0
 80225b4:	d107      	bne.n	80225c6 <udp_disconnect+0x22>
 80225b6:	4b0d      	ldr	r3, [pc, #52]	@ (80225ec <udp_disconnect+0x48>)
 80225b8:	f240 426a 	movw	r2, #1130	@ 0x46a
 80225bc:	490c      	ldr	r1, [pc, #48]	@ (80225f0 <udp_disconnect+0x4c>)
 80225be:	480d      	ldr	r0, [pc, #52]	@ (80225f4 <udp_disconnect+0x50>)
 80225c0:	f008 f8cc 	bl	802a75c <iprintf>
 80225c4:	e00f      	b.n	80225e6 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
  if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
    ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
  } else {
#endif
    ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
 80225c6:	687b      	ldr	r3, [r7, #4]
 80225c8:	2200      	movs	r2, #0
 80225ca:	605a      	str	r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
  }
#endif
  pcb->remote_port = 0;
 80225cc:	687b      	ldr	r3, [r7, #4]
 80225ce:	2200      	movs	r2, #0
 80225d0:	829a      	strh	r2, [r3, #20]
  pcb->netif_idx = NETIF_NO_INDEX;
 80225d2:	687b      	ldr	r3, [r7, #4]
 80225d4:	2200      	movs	r2, #0
 80225d6:	721a      	strb	r2, [r3, #8]
  /* mark PCB as unconnected */
  udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
 80225d8:	687b      	ldr	r3, [r7, #4]
 80225da:	7c1b      	ldrb	r3, [r3, #16]
 80225dc:	f023 0304 	bic.w	r3, r3, #4
 80225e0:	b2da      	uxtb	r2, r3
 80225e2:	687b      	ldr	r3, [r7, #4]
 80225e4:	741a      	strb	r2, [r3, #16]
}
 80225e6:	3708      	adds	r7, #8
 80225e8:	46bd      	mov	sp, r7
 80225ea:	bd80      	pop	{r7, pc}
 80225ec:	080309d4 	.word	0x080309d4
 80225f0:	08030cec 	.word	0x08030cec
 80225f4:	08030a28 	.word	0x08030a28

080225f8 <udp_recv>:
 * @param recv function pointer of the callback function
 * @param recv_arg additional argument to pass to the callback function
 */
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
 80225f8:	b580      	push	{r7, lr}
 80225fa:	b084      	sub	sp, #16
 80225fc:	af00      	add	r7, sp, #0
 80225fe:	60f8      	str	r0, [r7, #12]
 8022600:	60b9      	str	r1, [r7, #8]
 8022602:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8022604:	f7ee fc7c 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
 8022608:	68fb      	ldr	r3, [r7, #12]
 802260a:	2b00      	cmp	r3, #0
 802260c:	d107      	bne.n	802261e <udp_recv+0x26>
 802260e:	4b08      	ldr	r3, [pc, #32]	@ (8022630 <udp_recv+0x38>)
 8022610:	f240 428a 	movw	r2, #1162	@ 0x48a
 8022614:	4907      	ldr	r1, [pc, #28]	@ (8022634 <udp_recv+0x3c>)
 8022616:	4808      	ldr	r0, [pc, #32]	@ (8022638 <udp_recv+0x40>)
 8022618:	f008 f8a0 	bl	802a75c <iprintf>
 802261c:	e005      	b.n	802262a <udp_recv+0x32>

  /* remember recv() callback and user data */
  pcb->recv = recv;
 802261e:	68fb      	ldr	r3, [r7, #12]
 8022620:	68ba      	ldr	r2, [r7, #8]
 8022622:	619a      	str	r2, [r3, #24]
  pcb->recv_arg = recv_arg;
 8022624:	68fb      	ldr	r3, [r7, #12]
 8022626:	687a      	ldr	r2, [r7, #4]
 8022628:	61da      	str	r2, [r3, #28]
}
 802262a:	3710      	adds	r7, #16
 802262c:	46bd      	mov	sp, r7
 802262e:	bd80      	pop	{r7, pc}
 8022630:	080309d4 	.word	0x080309d4
 8022634:	08030d08 	.word	0x08030d08
 8022638:	08030a28 	.word	0x08030a28

0802263c <udp_remove>:
 *
 * @see udp_new()
 */
void
udp_remove(struct udp_pcb *pcb)
{
 802263c:	b580      	push	{r7, lr}
 802263e:	b084      	sub	sp, #16
 8022640:	af00      	add	r7, sp, #0
 8022642:	6078      	str	r0, [r7, #4]
  struct udp_pcb *pcb2;

  LWIP_ASSERT_CORE_LOCKED();
 8022644:	f7ee fc5c 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
 8022648:	687b      	ldr	r3, [r7, #4]
 802264a:	2b00      	cmp	r3, #0
 802264c:	d107      	bne.n	802265e <udp_remove+0x22>
 802264e:	4b19      	ldr	r3, [pc, #100]	@ (80226b4 <udp_remove+0x78>)
 8022650:	f240 42a1 	movw	r2, #1185	@ 0x4a1
 8022654:	4918      	ldr	r1, [pc, #96]	@ (80226b8 <udp_remove+0x7c>)
 8022656:	4819      	ldr	r0, [pc, #100]	@ (80226bc <udp_remove+0x80>)
 8022658:	f008 f880 	bl	802a75c <iprintf>
 802265c:	e026      	b.n	80226ac <udp_remove+0x70>

  mib2_udp_unbind(pcb);
  /* pcb to be removed is first in list? */
  if (udp_pcbs == pcb) {
 802265e:	4b18      	ldr	r3, [pc, #96]	@ (80226c0 <udp_remove+0x84>)
 8022660:	681b      	ldr	r3, [r3, #0]
 8022662:	687a      	ldr	r2, [r7, #4]
 8022664:	429a      	cmp	r2, r3
 8022666:	d105      	bne.n	8022674 <udp_remove+0x38>
    /* make list start at 2nd pcb */
    udp_pcbs = udp_pcbs->next;
 8022668:	4b15      	ldr	r3, [pc, #84]	@ (80226c0 <udp_remove+0x84>)
 802266a:	681b      	ldr	r3, [r3, #0]
 802266c:	68db      	ldr	r3, [r3, #12]
 802266e:	4a14      	ldr	r2, [pc, #80]	@ (80226c0 <udp_remove+0x84>)
 8022670:	6013      	str	r3, [r2, #0]
 8022672:	e017      	b.n	80226a4 <udp_remove+0x68>
    /* pcb not 1st in list */
  } else {
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8022674:	4b12      	ldr	r3, [pc, #72]	@ (80226c0 <udp_remove+0x84>)
 8022676:	681b      	ldr	r3, [r3, #0]
 8022678:	60fb      	str	r3, [r7, #12]
 802267a:	e010      	b.n	802269e <udp_remove+0x62>
      /* find pcb in udp_pcbs list */
      if (pcb2->next != NULL && pcb2->next == pcb) {
 802267c:	68fb      	ldr	r3, [r7, #12]
 802267e:	68db      	ldr	r3, [r3, #12]
 8022680:	2b00      	cmp	r3, #0
 8022682:	d009      	beq.n	8022698 <udp_remove+0x5c>
 8022684:	68fb      	ldr	r3, [r7, #12]
 8022686:	68db      	ldr	r3, [r3, #12]
 8022688:	687a      	ldr	r2, [r7, #4]
 802268a:	429a      	cmp	r2, r3
 802268c:	d104      	bne.n	8022698 <udp_remove+0x5c>
        /* remove pcb from list */
        pcb2->next = pcb->next;
 802268e:	687b      	ldr	r3, [r7, #4]
 8022690:	68da      	ldr	r2, [r3, #12]
 8022692:	68fb      	ldr	r3, [r7, #12]
 8022694:	60da      	str	r2, [r3, #12]
        break;
 8022696:	e005      	b.n	80226a4 <udp_remove+0x68>
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8022698:	68fb      	ldr	r3, [r7, #12]
 802269a:	68db      	ldr	r3, [r3, #12]
 802269c:	60fb      	str	r3, [r7, #12]
 802269e:	68fb      	ldr	r3, [r7, #12]
 80226a0:	2b00      	cmp	r3, #0
 80226a2:	d1eb      	bne.n	802267c <udp_remove+0x40>
      }
    }
  }
  memp_free(MEMP_UDP_PCB, pcb);
 80226a4:	6879      	ldr	r1, [r7, #4]
 80226a6:	2000      	movs	r0, #0
 80226a8:	f7f7 fef2 	bl	801a490 <memp_free>
}
 80226ac:	3710      	adds	r7, #16
 80226ae:	46bd      	mov	sp, r7
 80226b0:	bd80      	pop	{r7, pc}
 80226b2:	bf00      	nop
 80226b4:	080309d4 	.word	0x080309d4
 80226b8:	08030d20 	.word	0x08030d20
 80226bc:	08030a28 	.word	0x08030a28
 80226c0:	2402afc8 	.word	0x2402afc8

080226c4 <udp_new>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new(void)
{
 80226c4:	b580      	push	{r7, lr}
 80226c6:	b082      	sub	sp, #8
 80226c8:	af00      	add	r7, sp, #0
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 80226ca:	f7ee fc19 	bl	8010f00 <sys_check_core_locking>

  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
 80226ce:	2000      	movs	r0, #0
 80226d0:	f7f7 fe68 	bl	801a3a4 <memp_malloc>
 80226d4:	6078      	str	r0, [r7, #4]
  /* could allocate UDP PCB? */
  if (pcb != NULL) {
 80226d6:	687b      	ldr	r3, [r7, #4]
 80226d8:	2b00      	cmp	r3, #0
 80226da:	d007      	beq.n	80226ec <udp_new+0x28>
    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
     * which means checksum is generated over the whole datagram per default
     * (recommended as default by RFC 3828). */
    /* initialize PCB to all zeroes */
    memset(pcb, 0, sizeof(struct udp_pcb));
 80226dc:	2220      	movs	r2, #32
 80226de:	2100      	movs	r1, #0
 80226e0:	6878      	ldr	r0, [r7, #4]
 80226e2:	f008 f9cd 	bl	802aa80 <memset>
    pcb->ttl = UDP_TTL;
 80226e6:	687b      	ldr	r3, [r7, #4]
 80226e8:	22ff      	movs	r2, #255	@ 0xff
 80226ea:	72da      	strb	r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
    udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
  }
  return pcb;
 80226ec:	687b      	ldr	r3, [r7, #4]
}
 80226ee:	4618      	mov	r0, r3
 80226f0:	3708      	adds	r7, #8
 80226f2:	46bd      	mov	sp, r7
 80226f4:	bd80      	pop	{r7, pc}

080226f6 <udp_new_ip_type>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
 80226f6:	b580      	push	{r7, lr}
 80226f8:	b084      	sub	sp, #16
 80226fa:	af00      	add	r7, sp, #0
 80226fc:	4603      	mov	r3, r0
 80226fe:	71fb      	strb	r3, [r7, #7]
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 8022700:	f7ee fbfe 	bl	8010f00 <sys_check_core_locking>

  pcb = udp_new();
 8022704:	f7ff ffde 	bl	80226c4 <udp_new>
 8022708:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 802270a:	68fb      	ldr	r3, [r7, #12]
}
 802270c:	4618      	mov	r0, r3
 802270e:	3710      	adds	r7, #16
 8022710:	46bd      	mov	sp, r7
 8022712:	bd80      	pop	{r7, pc}

08022714 <udp_netif_ip_addr_changed>:
 *
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change
 */
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8022714:	b480      	push	{r7}
 8022716:	b085      	sub	sp, #20
 8022718:	af00      	add	r7, sp, #0
 802271a:	6078      	str	r0, [r7, #4]
 802271c:	6039      	str	r1, [r7, #0]
  struct udp_pcb *upcb;

  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
 802271e:	687b      	ldr	r3, [r7, #4]
 8022720:	2b00      	cmp	r3, #0
 8022722:	d01e      	beq.n	8022762 <udp_netif_ip_addr_changed+0x4e>
 8022724:	687b      	ldr	r3, [r7, #4]
 8022726:	681b      	ldr	r3, [r3, #0]
 8022728:	2b00      	cmp	r3, #0
 802272a:	d01a      	beq.n	8022762 <udp_netif_ip_addr_changed+0x4e>
 802272c:	683b      	ldr	r3, [r7, #0]
 802272e:	2b00      	cmp	r3, #0
 8022730:	d017      	beq.n	8022762 <udp_netif_ip_addr_changed+0x4e>
 8022732:	683b      	ldr	r3, [r7, #0]
 8022734:	681b      	ldr	r3, [r3, #0]
 8022736:	2b00      	cmp	r3, #0
 8022738:	d013      	beq.n	8022762 <udp_netif_ip_addr_changed+0x4e>
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 802273a:	4b0d      	ldr	r3, [pc, #52]	@ (8022770 <udp_netif_ip_addr_changed+0x5c>)
 802273c:	681b      	ldr	r3, [r3, #0]
 802273e:	60fb      	str	r3, [r7, #12]
 8022740:	e00c      	b.n	802275c <udp_netif_ip_addr_changed+0x48>
      /* PCB bound to current local interface address? */
      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
 8022742:	68fb      	ldr	r3, [r7, #12]
 8022744:	681a      	ldr	r2, [r3, #0]
 8022746:	687b      	ldr	r3, [r7, #4]
 8022748:	681b      	ldr	r3, [r3, #0]
 802274a:	429a      	cmp	r2, r3
 802274c:	d103      	bne.n	8022756 <udp_netif_ip_addr_changed+0x42>
        /* The PCB is bound to the old ipaddr and
         * is set to bound to the new one instead */
        ip_addr_copy(upcb->local_ip, *new_addr);
 802274e:	683b      	ldr	r3, [r7, #0]
 8022750:	681a      	ldr	r2, [r3, #0]
 8022752:	68fb      	ldr	r3, [r7, #12]
 8022754:	601a      	str	r2, [r3, #0]
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 8022756:	68fb      	ldr	r3, [r7, #12]
 8022758:	68db      	ldr	r3, [r3, #12]
 802275a:	60fb      	str	r3, [r7, #12]
 802275c:	68fb      	ldr	r3, [r7, #12]
 802275e:	2b00      	cmp	r3, #0
 8022760:	d1ef      	bne.n	8022742 <udp_netif_ip_addr_changed+0x2e>
      }
    }
  }
}
 8022762:	bf00      	nop
 8022764:	3714      	adds	r7, #20
 8022766:	46bd      	mov	sp, r7
 8022768:	f85d 7b04 	ldr.w	r7, [sp], #4
 802276c:	4770      	bx	lr
 802276e:	bf00      	nop
 8022770:	2402afc8 	.word	0x2402afc8

08022774 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);

/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
 8022774:	b580      	push	{r7, lr}
 8022776:	af00      	add	r7, sp, #0
  if (dhcp_pcb_refcount == 0) {
 8022778:	4b20      	ldr	r3, [pc, #128]	@ (80227fc <dhcp_inc_pcb_refcount+0x88>)
 802277a:	781b      	ldrb	r3, [r3, #0]
 802277c:	2b00      	cmp	r3, #0
 802277e:	d133      	bne.n	80227e8 <dhcp_inc_pcb_refcount+0x74>
    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
 8022780:	4b1f      	ldr	r3, [pc, #124]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 8022782:	681b      	ldr	r3, [r3, #0]
 8022784:	2b00      	cmp	r3, #0
 8022786:	d005      	beq.n	8022794 <dhcp_inc_pcb_refcount+0x20>
 8022788:	4b1e      	ldr	r3, [pc, #120]	@ (8022804 <dhcp_inc_pcb_refcount+0x90>)
 802278a:	22e5      	movs	r2, #229	@ 0xe5
 802278c:	491e      	ldr	r1, [pc, #120]	@ (8022808 <dhcp_inc_pcb_refcount+0x94>)
 802278e:	481f      	ldr	r0, [pc, #124]	@ (802280c <dhcp_inc_pcb_refcount+0x98>)
 8022790:	f007 ffe4 	bl	802a75c <iprintf>

    /* allocate UDP PCB */
    dhcp_pcb = udp_new();
 8022794:	f7ff ff96 	bl	80226c4 <udp_new>
 8022798:	4603      	mov	r3, r0
 802279a:	4a19      	ldr	r2, [pc, #100]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 802279c:	6013      	str	r3, [r2, #0]

    if (dhcp_pcb == NULL) {
 802279e:	4b18      	ldr	r3, [pc, #96]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227a0:	681b      	ldr	r3, [r3, #0]
 80227a2:	2b00      	cmp	r3, #0
 80227a4:	d102      	bne.n	80227ac <dhcp_inc_pcb_refcount+0x38>
      return ERR_MEM;
 80227a6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80227aa:	e024      	b.n	80227f6 <dhcp_inc_pcb_refcount+0x82>
    }

    ip_set_option(dhcp_pcb, SOF_BROADCAST);
 80227ac:	4b14      	ldr	r3, [pc, #80]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227ae:	681b      	ldr	r3, [r3, #0]
 80227b0:	7a5a      	ldrb	r2, [r3, #9]
 80227b2:	4b13      	ldr	r3, [pc, #76]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227b4:	681b      	ldr	r3, [r3, #0]
 80227b6:	f042 0220 	orr.w	r2, r2, #32
 80227ba:	b2d2      	uxtb	r2, r2
 80227bc:	725a      	strb	r2, [r3, #9]

    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
 80227be:	4b10      	ldr	r3, [pc, #64]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227c0:	681b      	ldr	r3, [r3, #0]
 80227c2:	2244      	movs	r2, #68	@ 0x44
 80227c4:	4912      	ldr	r1, [pc, #72]	@ (8022810 <dhcp_inc_pcb_refcount+0x9c>)
 80227c6:	4618      	mov	r0, r3
 80227c8:	f7ff fdf2 	bl	80223b0 <udp_bind>
    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
 80227cc:	4b0c      	ldr	r3, [pc, #48]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227ce:	681b      	ldr	r3, [r3, #0]
 80227d0:	2243      	movs	r2, #67	@ 0x43
 80227d2:	490f      	ldr	r1, [pc, #60]	@ (8022810 <dhcp_inc_pcb_refcount+0x9c>)
 80227d4:	4618      	mov	r0, r3
 80227d6:	f7ff fe75 	bl	80224c4 <udp_connect>
    udp_recv(dhcp_pcb, dhcp_recv, NULL);
 80227da:	4b09      	ldr	r3, [pc, #36]	@ (8022800 <dhcp_inc_pcb_refcount+0x8c>)
 80227dc:	681b      	ldr	r3, [r3, #0]
 80227de:	2200      	movs	r2, #0
 80227e0:	490c      	ldr	r1, [pc, #48]	@ (8022814 <dhcp_inc_pcb_refcount+0xa0>)
 80227e2:	4618      	mov	r0, r3
 80227e4:	f7ff ff08 	bl	80225f8 <udp_recv>
  }

  dhcp_pcb_refcount++;
 80227e8:	4b04      	ldr	r3, [pc, #16]	@ (80227fc <dhcp_inc_pcb_refcount+0x88>)
 80227ea:	781b      	ldrb	r3, [r3, #0]
 80227ec:	3301      	adds	r3, #1
 80227ee:	b2da      	uxtb	r2, r3
 80227f0:	4b02      	ldr	r3, [pc, #8]	@ (80227fc <dhcp_inc_pcb_refcount+0x88>)
 80227f2:	701a      	strb	r2, [r3, #0]

  return ERR_OK;
 80227f4:	2300      	movs	r3, #0
}
 80227f6:	4618      	mov	r0, r3
 80227f8:	bd80      	pop	{r7, pc}
 80227fa:	bf00      	nop
 80227fc:	2402aff8 	.word	0x2402aff8
 8022800:	2402aff4 	.word	0x2402aff4
 8022804:	08030d38 	.word	0x08030d38
 8022808:	08030d70 	.word	0x08030d70
 802280c:	08030d98 	.word	0x08030d98
 8022810:	08031b58 	.word	0x08031b58
 8022814:	080240e5 	.word	0x080240e5

08022818 <dhcp_dec_pcb_refcount>:

/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
 8022818:	b580      	push	{r7, lr}
 802281a:	af00      	add	r7, sp, #0
  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
 802281c:	4b0e      	ldr	r3, [pc, #56]	@ (8022858 <dhcp_dec_pcb_refcount+0x40>)
 802281e:	781b      	ldrb	r3, [r3, #0]
 8022820:	2b00      	cmp	r3, #0
 8022822:	d105      	bne.n	8022830 <dhcp_dec_pcb_refcount+0x18>
 8022824:	4b0d      	ldr	r3, [pc, #52]	@ (802285c <dhcp_dec_pcb_refcount+0x44>)
 8022826:	22ff      	movs	r2, #255	@ 0xff
 8022828:	490d      	ldr	r1, [pc, #52]	@ (8022860 <dhcp_dec_pcb_refcount+0x48>)
 802282a:	480e      	ldr	r0, [pc, #56]	@ (8022864 <dhcp_dec_pcb_refcount+0x4c>)
 802282c:	f007 ff96 	bl	802a75c <iprintf>
  dhcp_pcb_refcount--;
 8022830:	4b09      	ldr	r3, [pc, #36]	@ (8022858 <dhcp_dec_pcb_refcount+0x40>)
 8022832:	781b      	ldrb	r3, [r3, #0]
 8022834:	3b01      	subs	r3, #1
 8022836:	b2da      	uxtb	r2, r3
 8022838:	4b07      	ldr	r3, [pc, #28]	@ (8022858 <dhcp_dec_pcb_refcount+0x40>)
 802283a:	701a      	strb	r2, [r3, #0]

  if (dhcp_pcb_refcount == 0) {
 802283c:	4b06      	ldr	r3, [pc, #24]	@ (8022858 <dhcp_dec_pcb_refcount+0x40>)
 802283e:	781b      	ldrb	r3, [r3, #0]
 8022840:	2b00      	cmp	r3, #0
 8022842:	d107      	bne.n	8022854 <dhcp_dec_pcb_refcount+0x3c>
    udp_remove(dhcp_pcb);
 8022844:	4b08      	ldr	r3, [pc, #32]	@ (8022868 <dhcp_dec_pcb_refcount+0x50>)
 8022846:	681b      	ldr	r3, [r3, #0]
 8022848:	4618      	mov	r0, r3
 802284a:	f7ff fef7 	bl	802263c <udp_remove>
    dhcp_pcb = NULL;
 802284e:	4b06      	ldr	r3, [pc, #24]	@ (8022868 <dhcp_dec_pcb_refcount+0x50>)
 8022850:	2200      	movs	r2, #0
 8022852:	601a      	str	r2, [r3, #0]
  }
}
 8022854:	bf00      	nop
 8022856:	bd80      	pop	{r7, pc}
 8022858:	2402aff8 	.word	0x2402aff8
 802285c:	08030d38 	.word	0x08030d38
 8022860:	08030dc0 	.word	0x08030dc0
 8022864:	08030d98 	.word	0x08030d98
 8022868:	2402aff4 	.word	0x2402aff4

0802286c <dhcp_handle_nak>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_nak(struct netif *netif)
{
 802286c:	b580      	push	{r7, lr}
 802286e:	b084      	sub	sp, #16
 8022870:	af00      	add	r7, sp, #0
 8022872:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022874:	687b      	ldr	r3, [r7, #4]
 8022876:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022878:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* Change to a defined state - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 802287a:	210c      	movs	r1, #12
 802287c:	68f8      	ldr	r0, [r7, #12]
 802287e:	f001 f862 	bl	8023946 <dhcp_set_state>
  /* remove IP address from interface (must no longer be used, as per RFC2131) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8022882:	4b06      	ldr	r3, [pc, #24]	@ (802289c <dhcp_handle_nak+0x30>)
 8022884:	4a05      	ldr	r2, [pc, #20]	@ (802289c <dhcp_handle_nak+0x30>)
 8022886:	4905      	ldr	r1, [pc, #20]	@ (802289c <dhcp_handle_nak+0x30>)
 8022888:	6878      	ldr	r0, [r7, #4]
 802288a:	f7f7 ffa5 	bl	801a7d8 <netif_set_addr>
  /* We can immediately restart discovery */
  dhcp_discover(netif);
 802288e:	6878      	ldr	r0, [r7, #4]
 8022890:	f000 fc4c 	bl	802312c <dhcp_discover>
}
 8022894:	bf00      	nop
 8022896:	3710      	adds	r7, #16
 8022898:	46bd      	mov	sp, r7
 802289a:	bd80      	pop	{r7, pc}
 802289c:	08031b58 	.word	0x08031b58

080228a0 <dhcp_check>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_check(struct netif *netif)
{
 80228a0:	b580      	push	{r7, lr}
 80228a2:	b084      	sub	sp, #16
 80228a4:	af00      	add	r7, sp, #0
 80228a6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80228a8:	687b      	ldr	r3, [r7, #4]
 80228aa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80228ac:	60fb      	str	r3, [r7, #12]
  err_t result;
  u16_t msecs;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
              (s16_t)netif->name[1]));
  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
 80228ae:	2108      	movs	r1, #8
 80228b0:	68f8      	ldr	r0, [r7, #12]
 80228b2:	f001 f848 	bl	8023946 <dhcp_set_state>
  /* create an ARP query for the offered IP address, expecting that no host
     responds, as the IP address should not be in use. */
  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
 80228b6:	68fb      	ldr	r3, [r7, #12]
 80228b8:	331c      	adds	r3, #28
 80228ba:	2200      	movs	r2, #0
 80228bc:	4619      	mov	r1, r3
 80228be:	6878      	ldr	r0, [r7, #4]
 80228c0:	f002 fb88 	bl	8024fd4 <etharp_query>
 80228c4:	4603      	mov	r3, r0
 80228c6:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
  }
  if (dhcp->tries < 255) {
 80228c8:	68fb      	ldr	r3, [r7, #12]
 80228ca:	799b      	ldrb	r3, [r3, #6]
 80228cc:	2bff      	cmp	r3, #255	@ 0xff
 80228ce:	d005      	beq.n	80228dc <dhcp_check+0x3c>
    dhcp->tries++;
 80228d0:	68fb      	ldr	r3, [r7, #12]
 80228d2:	799b      	ldrb	r3, [r3, #6]
 80228d4:	3301      	adds	r3, #1
 80228d6:	b2da      	uxtb	r2, r3
 80228d8:	68fb      	ldr	r3, [r7, #12]
 80228da:	719a      	strb	r2, [r3, #6]
  }
  msecs = 500;
 80228dc:	f44f 73fa 	mov.w	r3, #500	@ 0x1f4
 80228e0:	813b      	strh	r3, [r7, #8]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80228e2:	893b      	ldrh	r3, [r7, #8]
 80228e4:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80228e8:	4a06      	ldr	r2, [pc, #24]	@ (8022904 <dhcp_check+0x64>)
 80228ea:	fb82 1203 	smull	r1, r2, r2, r3
 80228ee:	1152      	asrs	r2, r2, #5
 80228f0:	17db      	asrs	r3, r3, #31
 80228f2:	1ad3      	subs	r3, r2, r3
 80228f4:	b29a      	uxth	r2, r3
 80228f6:	68fb      	ldr	r3, [r7, #12]
 80228f8:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
 80228fa:	bf00      	nop
 80228fc:	3710      	adds	r7, #16
 80228fe:	46bd      	mov	sp, r7
 8022900:	bd80      	pop	{r7, pc}
 8022902:	bf00      	nop
 8022904:	10624dd3 	.word	0x10624dd3

08022908 <dhcp_handle_offer>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022908:	b580      	push	{r7, lr}
 802290a:	b084      	sub	sp, #16
 802290c:	af00      	add	r7, sp, #0
 802290e:	6078      	str	r0, [r7, #4]
 8022910:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022912:	687b      	ldr	r3, [r7, #4]
 8022914:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022916:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* obtain the server address */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
 8022918:	4b0c      	ldr	r3, [pc, #48]	@ (802294c <dhcp_handle_offer+0x44>)
 802291a:	789b      	ldrb	r3, [r3, #2]
 802291c:	2b00      	cmp	r3, #0
 802291e:	d011      	beq.n	8022944 <dhcp_handle_offer+0x3c>
    dhcp->request_timeout = 0; /* stop timer */
 8022920:	68fb      	ldr	r3, [r7, #12]
 8022922:	2200      	movs	r2, #0
 8022924:	811a      	strh	r2, [r3, #8]

    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
 8022926:	4b0a      	ldr	r3, [pc, #40]	@ (8022950 <dhcp_handle_offer+0x48>)
 8022928:	689b      	ldr	r3, [r3, #8]
 802292a:	4618      	mov	r0, r3
 802292c:	f7f6 ffd1 	bl	80198d2 <lwip_htonl>
 8022930:	4602      	mov	r2, r0
 8022932:	68fb      	ldr	r3, [r7, #12]
 8022934:	619a      	str	r2, [r3, #24]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
    /* remember offered address */
    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8022936:	683b      	ldr	r3, [r7, #0]
 8022938:	691a      	ldr	r2, [r3, #16]
 802293a:	68fb      	ldr	r3, [r7, #12]
 802293c:	61da      	str	r2, [r3, #28]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
                ip4_addr_get_u32(&dhcp->offered_ip_addr)));

    dhcp_select(netif);
 802293e:	6878      	ldr	r0, [r7, #4]
 8022940:	f000 f808 	bl	8022954 <dhcp_select>
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
  }
}
 8022944:	bf00      	nop
 8022946:	3710      	adds	r7, #16
 8022948:	46bd      	mov	sp, r7
 802294a:	bd80      	pop	{r7, pc}
 802294c:	2402afec 	.word	0x2402afec
 8022950:	2402afcc 	.word	0x2402afcc

08022954 <dhcp_select>:
 * @param netif the netif under DHCP control
 * @return lwIP specific error (see error.h)
 */
static err_t
dhcp_select(struct netif *netif)
{
 8022954:	b5b0      	push	{r4, r5, r7, lr}
 8022956:	b08a      	sub	sp, #40	@ 0x28
 8022958:	af02      	add	r7, sp, #8
 802295a:	6078      	str	r0, [r7, #4]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
 802295c:	687b      	ldr	r3, [r7, #4]
 802295e:	2b00      	cmp	r3, #0
 8022960:	d109      	bne.n	8022976 <dhcp_select+0x22>
 8022962:	4b71      	ldr	r3, [pc, #452]	@ (8022b28 <dhcp_select+0x1d4>)
 8022964:	f240 1277 	movw	r2, #375	@ 0x177
 8022968:	4970      	ldr	r1, [pc, #448]	@ (8022b2c <dhcp_select+0x1d8>)
 802296a:	4871      	ldr	r0, [pc, #452]	@ (8022b30 <dhcp_select+0x1dc>)
 802296c:	f007 fef6 	bl	802a75c <iprintf>
 8022970:	f06f 030f 	mvn.w	r3, #15
 8022974:	e0d3      	b.n	8022b1e <dhcp_select+0x1ca>
  dhcp = netif_dhcp_data(netif);
 8022976:	687b      	ldr	r3, [r7, #4]
 8022978:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802297a:	61bb      	str	r3, [r7, #24]
  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
 802297c:	69bb      	ldr	r3, [r7, #24]
 802297e:	2b00      	cmp	r3, #0
 8022980:	d109      	bne.n	8022996 <dhcp_select+0x42>
 8022982:	4b69      	ldr	r3, [pc, #420]	@ (8022b28 <dhcp_select+0x1d4>)
 8022984:	f240 1279 	movw	r2, #377	@ 0x179
 8022988:	496a      	ldr	r1, [pc, #424]	@ (8022b34 <dhcp_select+0x1e0>)
 802298a:	4869      	ldr	r0, [pc, #420]	@ (8022b30 <dhcp_select+0x1dc>)
 802298c:	f007 fee6 	bl	802a75c <iprintf>
 8022990:	f06f 0305 	mvn.w	r3, #5
 8022994:	e0c3      	b.n	8022b1e <dhcp_select+0x1ca>

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
 8022996:	2101      	movs	r1, #1
 8022998:	69b8      	ldr	r0, [r7, #24]
 802299a:	f000 ffd4 	bl	8023946 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 802299e:	f107 030c 	add.w	r3, r7, #12
 80229a2:	2203      	movs	r2, #3
 80229a4:	69b9      	ldr	r1, [r7, #24]
 80229a6:	6878      	ldr	r0, [r7, #4]
 80229a8:	f001 fc66 	bl	8024278 <dhcp_create_msg>
 80229ac:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80229ae:	697b      	ldr	r3, [r7, #20]
 80229b0:	2b00      	cmp	r3, #0
 80229b2:	f000 8085 	beq.w	8022ac0 <dhcp_select+0x16c>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80229b6:	697b      	ldr	r3, [r7, #20]
 80229b8:	685b      	ldr	r3, [r3, #4]
 80229ba:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 80229bc:	89b8      	ldrh	r0, [r7, #12]
 80229be:	693b      	ldr	r3, [r7, #16]
 80229c0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80229c4:	2302      	movs	r3, #2
 80229c6:	2239      	movs	r2, #57	@ 0x39
 80229c8:	f000 ffd8 	bl	802397c <dhcp_option>
 80229cc:	4603      	mov	r3, r0
 80229ce:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 80229d0:	89b8      	ldrh	r0, [r7, #12]
 80229d2:	693b      	ldr	r3, [r7, #16]
 80229d4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80229d8:	687b      	ldr	r3, [r7, #4]
 80229da:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80229dc:	461a      	mov	r2, r3
 80229de:	f001 f827 	bl	8023a30 <dhcp_option_short>
 80229e2:	4603      	mov	r3, r0
 80229e4:	81bb      	strh	r3, [r7, #12]

    /* MUST request the offered IP address */
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 80229e6:	89b8      	ldrh	r0, [r7, #12]
 80229e8:	693b      	ldr	r3, [r7, #16]
 80229ea:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80229ee:	2304      	movs	r3, #4
 80229f0:	2232      	movs	r2, #50	@ 0x32
 80229f2:	f000 ffc3 	bl	802397c <dhcp_option>
 80229f6:	4603      	mov	r3, r0
 80229f8:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 80229fa:	89bc      	ldrh	r4, [r7, #12]
 80229fc:	693b      	ldr	r3, [r7, #16]
 80229fe:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022a02:	69bb      	ldr	r3, [r7, #24]
 8022a04:	69db      	ldr	r3, [r3, #28]
 8022a06:	4618      	mov	r0, r3
 8022a08:	f7f6 ff63 	bl	80198d2 <lwip_htonl>
 8022a0c:	4603      	mov	r3, r0
 8022a0e:	461a      	mov	r2, r3
 8022a10:	4629      	mov	r1, r5
 8022a12:	4620      	mov	r0, r4
 8022a14:	f001 f83e 	bl	8023a94 <dhcp_option_long>
 8022a18:	4603      	mov	r3, r0
 8022a1a:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8022a1c:	89b8      	ldrh	r0, [r7, #12]
 8022a1e:	693b      	ldr	r3, [r7, #16]
 8022a20:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022a24:	2304      	movs	r3, #4
 8022a26:	2236      	movs	r2, #54	@ 0x36
 8022a28:	f000 ffa8 	bl	802397c <dhcp_option>
 8022a2c:	4603      	mov	r3, r0
 8022a2e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
 8022a30:	89bc      	ldrh	r4, [r7, #12]
 8022a32:	693b      	ldr	r3, [r7, #16]
 8022a34:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022a38:	69bb      	ldr	r3, [r7, #24]
 8022a3a:	699b      	ldr	r3, [r3, #24]
 8022a3c:	4618      	mov	r0, r3
 8022a3e:	f7f6 ff48 	bl	80198d2 <lwip_htonl>
 8022a42:	4603      	mov	r3, r0
 8022a44:	461a      	mov	r2, r3
 8022a46:	4629      	mov	r1, r5
 8022a48:	4620      	mov	r0, r4
 8022a4a:	f001 f823 	bl	8023a94 <dhcp_option_long>
 8022a4e:	4603      	mov	r3, r0
 8022a50:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022a52:	89b8      	ldrh	r0, [r7, #12]
 8022a54:	693b      	ldr	r3, [r7, #16]
 8022a56:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022a5a:	2303      	movs	r3, #3
 8022a5c:	2237      	movs	r2, #55	@ 0x37
 8022a5e:	f000 ff8d 	bl	802397c <dhcp_option>
 8022a62:	4603      	mov	r3, r0
 8022a64:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022a66:	2300      	movs	r3, #0
 8022a68:	77fb      	strb	r3, [r7, #31]
 8022a6a:	e00e      	b.n	8022a8a <dhcp_select+0x136>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022a6c:	89b8      	ldrh	r0, [r7, #12]
 8022a6e:	693b      	ldr	r3, [r7, #16]
 8022a70:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022a74:	7ffb      	ldrb	r3, [r7, #31]
 8022a76:	4a30      	ldr	r2, [pc, #192]	@ (8022b38 <dhcp_select+0x1e4>)
 8022a78:	5cd3      	ldrb	r3, [r2, r3]
 8022a7a:	461a      	mov	r2, r3
 8022a7c:	f000 ffb2 	bl	80239e4 <dhcp_option_byte>
 8022a80:	4603      	mov	r3, r0
 8022a82:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022a84:	7ffb      	ldrb	r3, [r7, #31]
 8022a86:	3301      	adds	r3, #1
 8022a88:	77fb      	strb	r3, [r7, #31]
 8022a8a:	7ffb      	ldrb	r3, [r7, #31]
 8022a8c:	2b02      	cmp	r3, #2
 8022a8e:	d9ed      	bls.n	8022a6c <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022a90:	89b8      	ldrh	r0, [r7, #12]
 8022a92:	693b      	ldr	r3, [r7, #16]
 8022a94:	33f0      	adds	r3, #240	@ 0xf0
 8022a96:	697a      	ldr	r2, [r7, #20]
 8022a98:	4619      	mov	r1, r3
 8022a9a:	f001 fcc3 	bl	8024424 <dhcp_option_trailer>

    /* send broadcast to any DHCP server */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8022a9e:	4b27      	ldr	r3, [pc, #156]	@ (8022b3c <dhcp_select+0x1e8>)
 8022aa0:	6818      	ldr	r0, [r3, #0]
 8022aa2:	4b27      	ldr	r3, [pc, #156]	@ (8022b40 <dhcp_select+0x1ec>)
 8022aa4:	9301      	str	r3, [sp, #4]
 8022aa6:	687b      	ldr	r3, [r7, #4]
 8022aa8:	9300      	str	r3, [sp, #0]
 8022aaa:	2343      	movs	r3, #67	@ 0x43
 8022aac:	4a25      	ldr	r2, [pc, #148]	@ (8022b44 <dhcp_select+0x1f0>)
 8022aae:	6979      	ldr	r1, [r7, #20]
 8022ab0:	f7ff fb96 	bl	80221e0 <udp_sendto_if_src>
 8022ab4:	4603      	mov	r3, r0
 8022ab6:	77bb      	strb	r3, [r7, #30]
    pbuf_free(p_out);
 8022ab8:	6978      	ldr	r0, [r7, #20]
 8022aba:	f7f8 fbd7 	bl	801b26c <pbuf_free>
 8022abe:	e001      	b.n	8022ac4 <dhcp_select+0x170>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022ac0:	23ff      	movs	r3, #255	@ 0xff
 8022ac2:	77bb      	strb	r3, [r7, #30]
  }
  if (dhcp->tries < 255) {
 8022ac4:	69bb      	ldr	r3, [r7, #24]
 8022ac6:	799b      	ldrb	r3, [r3, #6]
 8022ac8:	2bff      	cmp	r3, #255	@ 0xff
 8022aca:	d005      	beq.n	8022ad8 <dhcp_select+0x184>
    dhcp->tries++;
 8022acc:	69bb      	ldr	r3, [r7, #24]
 8022ace:	799b      	ldrb	r3, [r3, #6]
 8022ad0:	3301      	adds	r3, #1
 8022ad2:	b2da      	uxtb	r2, r3
 8022ad4:	69bb      	ldr	r3, [r7, #24]
 8022ad6:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8022ad8:	69bb      	ldr	r3, [r7, #24]
 8022ada:	799b      	ldrb	r3, [r3, #6]
 8022adc:	2b05      	cmp	r3, #5
 8022ade:	d80d      	bhi.n	8022afc <dhcp_select+0x1a8>
 8022ae0:	69bb      	ldr	r3, [r7, #24]
 8022ae2:	799b      	ldrb	r3, [r3, #6]
 8022ae4:	461a      	mov	r2, r3
 8022ae6:	2301      	movs	r3, #1
 8022ae8:	4093      	lsls	r3, r2
 8022aea:	b29b      	uxth	r3, r3
 8022aec:	461a      	mov	r2, r3
 8022aee:	0152      	lsls	r2, r2, #5
 8022af0:	1ad2      	subs	r2, r2, r3
 8022af2:	0092      	lsls	r2, r2, #2
 8022af4:	4413      	add	r3, r2
 8022af6:	00db      	lsls	r3, r3, #3
 8022af8:	b29b      	uxth	r3, r3
 8022afa:	e001      	b.n	8022b00 <dhcp_select+0x1ac>
 8022afc:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8022b00:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022b02:	89fb      	ldrh	r3, [r7, #14]
 8022b04:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022b08:	4a0f      	ldr	r2, [pc, #60]	@ (8022b48 <dhcp_select+0x1f4>)
 8022b0a:	fb82 1203 	smull	r1, r2, r2, r3
 8022b0e:	1152      	asrs	r2, r2, #5
 8022b10:	17db      	asrs	r3, r3, #31
 8022b12:	1ad3      	subs	r3, r2, r3
 8022b14:	b29a      	uxth	r2, r3
 8022b16:	69bb      	ldr	r3, [r7, #24]
 8022b18:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022b1a:	f997 301e 	ldrsb.w	r3, [r7, #30]
}
 8022b1e:	4618      	mov	r0, r3
 8022b20:	3720      	adds	r7, #32
 8022b22:	46bd      	mov	sp, r7
 8022b24:	bdb0      	pop	{r4, r5, r7, pc}
 8022b26:	bf00      	nop
 8022b28:	08030d38 	.word	0x08030d38
 8022b2c:	08030de4 	.word	0x08030de4
 8022b30:	08030d98 	.word	0x08030d98
 8022b34:	08030e00 	.word	0x08030e00
 8022b38:	24000058 	.word	0x24000058
 8022b3c:	2402aff4 	.word	0x2402aff4
 8022b40:	08031b58 	.word	0x08031b58
 8022b44:	08031b5c 	.word	0x08031b5c
 8022b48:	10624dd3 	.word	0x10624dd3

08022b4c <dhcp_coarse_tmr>:
 * The DHCP timer that checks for lease renewal/rebind timeouts.
 * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
 */
void
dhcp_coarse_tmr(void)
{
 8022b4c:	b580      	push	{r7, lr}
 8022b4e:	b082      	sub	sp, #8
 8022b50:	af00      	add	r7, sp, #0
  struct netif *netif;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
  /* iterate through all network interfaces */
  NETIF_FOREACH(netif) {
 8022b52:	4b27      	ldr	r3, [pc, #156]	@ (8022bf0 <dhcp_coarse_tmr+0xa4>)
 8022b54:	681b      	ldr	r3, [r3, #0]
 8022b56:	607b      	str	r3, [r7, #4]
 8022b58:	e042      	b.n	8022be0 <dhcp_coarse_tmr+0x94>
    /* only act on DHCP configured interfaces */
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8022b5a:	687b      	ldr	r3, [r7, #4]
 8022b5c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022b5e:	603b      	str	r3, [r7, #0]
    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
 8022b60:	683b      	ldr	r3, [r7, #0]
 8022b62:	2b00      	cmp	r3, #0
 8022b64:	d039      	beq.n	8022bda <dhcp_coarse_tmr+0x8e>
 8022b66:	683b      	ldr	r3, [r7, #0]
 8022b68:	795b      	ldrb	r3, [r3, #5]
 8022b6a:	2b00      	cmp	r3, #0
 8022b6c:	d035      	beq.n	8022bda <dhcp_coarse_tmr+0x8e>
      /* compare lease time to expire timeout */
      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
 8022b6e:	683b      	ldr	r3, [r7, #0]
 8022b70:	8a9b      	ldrh	r3, [r3, #20]
 8022b72:	2b00      	cmp	r3, #0
 8022b74:	d012      	beq.n	8022b9c <dhcp_coarse_tmr+0x50>
 8022b76:	683b      	ldr	r3, [r7, #0]
 8022b78:	8a5b      	ldrh	r3, [r3, #18]
 8022b7a:	3301      	adds	r3, #1
 8022b7c:	b29a      	uxth	r2, r3
 8022b7e:	683b      	ldr	r3, [r7, #0]
 8022b80:	825a      	strh	r2, [r3, #18]
 8022b82:	683b      	ldr	r3, [r7, #0]
 8022b84:	8a5a      	ldrh	r2, [r3, #18]
 8022b86:	683b      	ldr	r3, [r7, #0]
 8022b88:	8a9b      	ldrh	r3, [r3, #20]
 8022b8a:	429a      	cmp	r2, r3
 8022b8c:	d106      	bne.n	8022b9c <dhcp_coarse_tmr+0x50>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
        /* this clients' lease time has expired */
        dhcp_release_and_stop(netif);
 8022b8e:	6878      	ldr	r0, [r7, #4]
 8022b90:	f000 fe32 	bl	80237f8 <dhcp_release_and_stop>
        dhcp_start(netif);
 8022b94:	6878      	ldr	r0, [r7, #4]
 8022b96:	f000 f96b 	bl	8022e70 <dhcp_start>
 8022b9a:	e01e      	b.n	8022bda <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now? */
      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
 8022b9c:	683b      	ldr	r3, [r7, #0]
 8022b9e:	8a1b      	ldrh	r3, [r3, #16]
 8022ba0:	2b00      	cmp	r3, #0
 8022ba2:	d00b      	beq.n	8022bbc <dhcp_coarse_tmr+0x70>
 8022ba4:	683b      	ldr	r3, [r7, #0]
 8022ba6:	8a1b      	ldrh	r3, [r3, #16]
 8022ba8:	1e5a      	subs	r2, r3, #1
 8022baa:	b291      	uxth	r1, r2
 8022bac:	683a      	ldr	r2, [r7, #0]
 8022bae:	8211      	strh	r1, [r2, #16]
 8022bb0:	2b01      	cmp	r3, #1
 8022bb2:	d103      	bne.n	8022bbc <dhcp_coarse_tmr+0x70>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
        /* this clients' rebind timeout triggered */
        dhcp_t2_timeout(netif);
 8022bb4:	6878      	ldr	r0, [r7, #4]
 8022bb6:	f000 f8c7 	bl	8022d48 <dhcp_t2_timeout>
 8022bba:	e00e      	b.n	8022bda <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now */
      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
 8022bbc:	683b      	ldr	r3, [r7, #0]
 8022bbe:	89db      	ldrh	r3, [r3, #14]
 8022bc0:	2b00      	cmp	r3, #0
 8022bc2:	d00a      	beq.n	8022bda <dhcp_coarse_tmr+0x8e>
 8022bc4:	683b      	ldr	r3, [r7, #0]
 8022bc6:	89db      	ldrh	r3, [r3, #14]
 8022bc8:	1e5a      	subs	r2, r3, #1
 8022bca:	b291      	uxth	r1, r2
 8022bcc:	683a      	ldr	r2, [r7, #0]
 8022bce:	81d1      	strh	r1, [r2, #14]
 8022bd0:	2b01      	cmp	r3, #1
 8022bd2:	d102      	bne.n	8022bda <dhcp_coarse_tmr+0x8e>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
        /* this clients' renewal timeout triggered */
        dhcp_t1_timeout(netif);
 8022bd4:	6878      	ldr	r0, [r7, #4]
 8022bd6:	f000 f888 	bl	8022cea <dhcp_t1_timeout>
  NETIF_FOREACH(netif) {
 8022bda:	687b      	ldr	r3, [r7, #4]
 8022bdc:	681b      	ldr	r3, [r3, #0]
 8022bde:	607b      	str	r3, [r7, #4]
 8022be0:	687b      	ldr	r3, [r7, #4]
 8022be2:	2b00      	cmp	r3, #0
 8022be4:	d1b9      	bne.n	8022b5a <dhcp_coarse_tmr+0xe>
      }
    }
  }
}
 8022be6:	bf00      	nop
 8022be8:	bf00      	nop
 8022bea:	3708      	adds	r7, #8
 8022bec:	46bd      	mov	sp, r7
 8022bee:	bd80      	pop	{r7, pc}
 8022bf0:	2402af5c 	.word	0x2402af5c

08022bf4 <dhcp_fine_tmr>:
 * A DHCP server is expected to respond within a short period of time.
 * This timer checks whether an outstanding DHCP request is timed out.
 */
void
dhcp_fine_tmr(void)
{
 8022bf4:	b580      	push	{r7, lr}
 8022bf6:	b082      	sub	sp, #8
 8022bf8:	af00      	add	r7, sp, #0
  struct netif *netif;
  /* loop through netif's */
  NETIF_FOREACH(netif) {
 8022bfa:	4b16      	ldr	r3, [pc, #88]	@ (8022c54 <dhcp_fine_tmr+0x60>)
 8022bfc:	681b      	ldr	r3, [r3, #0]
 8022bfe:	607b      	str	r3, [r7, #4]
 8022c00:	e020      	b.n	8022c44 <dhcp_fine_tmr+0x50>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8022c02:	687b      	ldr	r3, [r7, #4]
 8022c04:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022c06:	603b      	str	r3, [r7, #0]
    /* only act on DHCP configured interfaces */
    if (dhcp != NULL) {
 8022c08:	683b      	ldr	r3, [r7, #0]
 8022c0a:	2b00      	cmp	r3, #0
 8022c0c:	d017      	beq.n	8022c3e <dhcp_fine_tmr+0x4a>
      /* timer is active (non zero), and is about to trigger now */
      if (dhcp->request_timeout > 1) {
 8022c0e:	683b      	ldr	r3, [r7, #0]
 8022c10:	891b      	ldrh	r3, [r3, #8]
 8022c12:	2b01      	cmp	r3, #1
 8022c14:	d906      	bls.n	8022c24 <dhcp_fine_tmr+0x30>
        dhcp->request_timeout--;
 8022c16:	683b      	ldr	r3, [r7, #0]
 8022c18:	891b      	ldrh	r3, [r3, #8]
 8022c1a:	3b01      	subs	r3, #1
 8022c1c:	b29a      	uxth	r2, r3
 8022c1e:	683b      	ldr	r3, [r7, #0]
 8022c20:	811a      	strh	r2, [r3, #8]
 8022c22:	e00c      	b.n	8022c3e <dhcp_fine_tmr+0x4a>
      } else if (dhcp->request_timeout == 1) {
 8022c24:	683b      	ldr	r3, [r7, #0]
 8022c26:	891b      	ldrh	r3, [r3, #8]
 8022c28:	2b01      	cmp	r3, #1
 8022c2a:	d108      	bne.n	8022c3e <dhcp_fine_tmr+0x4a>
        dhcp->request_timeout--;
 8022c2c:	683b      	ldr	r3, [r7, #0]
 8022c2e:	891b      	ldrh	r3, [r3, #8]
 8022c30:	3b01      	subs	r3, #1
 8022c32:	b29a      	uxth	r2, r3
 8022c34:	683b      	ldr	r3, [r7, #0]
 8022c36:	811a      	strh	r2, [r3, #8]
        /* { dhcp->request_timeout == 0 } */
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
        /* this client's request timeout triggered */
        dhcp_timeout(netif);
 8022c38:	6878      	ldr	r0, [r7, #4]
 8022c3a:	f000 f80d 	bl	8022c58 <dhcp_timeout>
  NETIF_FOREACH(netif) {
 8022c3e:	687b      	ldr	r3, [r7, #4]
 8022c40:	681b      	ldr	r3, [r3, #0]
 8022c42:	607b      	str	r3, [r7, #4]
 8022c44:	687b      	ldr	r3, [r7, #4]
 8022c46:	2b00      	cmp	r3, #0
 8022c48:	d1db      	bne.n	8022c02 <dhcp_fine_tmr+0xe>
      }
    }
  }
}
 8022c4a:	bf00      	nop
 8022c4c:	bf00      	nop
 8022c4e:	3708      	adds	r7, #8
 8022c50:	46bd      	mov	sp, r7
 8022c52:	bd80      	pop	{r7, pc}
 8022c54:	2402af5c 	.word	0x2402af5c

08022c58 <dhcp_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_timeout(struct netif *netif)
{
 8022c58:	b580      	push	{r7, lr}
 8022c5a:	b084      	sub	sp, #16
 8022c5c:	af00      	add	r7, sp, #0
 8022c5e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022c60:	687b      	ldr	r3, [r7, #4]
 8022c62:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022c64:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
  /* back-off period has passed, or server selection timed out */
  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
 8022c66:	68fb      	ldr	r3, [r7, #12]
 8022c68:	795b      	ldrb	r3, [r3, #5]
 8022c6a:	2b0c      	cmp	r3, #12
 8022c6c:	d003      	beq.n	8022c76 <dhcp_timeout+0x1e>
 8022c6e:	68fb      	ldr	r3, [r7, #12]
 8022c70:	795b      	ldrb	r3, [r3, #5]
 8022c72:	2b06      	cmp	r3, #6
 8022c74:	d103      	bne.n	8022c7e <dhcp_timeout+0x26>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
    dhcp_discover(netif);
 8022c76:	6878      	ldr	r0, [r7, #4]
 8022c78:	f000 fa58 	bl	802312c <dhcp_discover>
      dhcp_reboot(netif);
    } else {
      dhcp_discover(netif);
    }
  }
}
 8022c7c:	e031      	b.n	8022ce2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
 8022c7e:	68fb      	ldr	r3, [r7, #12]
 8022c80:	795b      	ldrb	r3, [r3, #5]
 8022c82:	2b01      	cmp	r3, #1
 8022c84:	d10e      	bne.n	8022ca4 <dhcp_timeout+0x4c>
    if (dhcp->tries <= 5) {
 8022c86:	68fb      	ldr	r3, [r7, #12]
 8022c88:	799b      	ldrb	r3, [r3, #6]
 8022c8a:	2b05      	cmp	r3, #5
 8022c8c:	d803      	bhi.n	8022c96 <dhcp_timeout+0x3e>
      dhcp_select(netif);
 8022c8e:	6878      	ldr	r0, [r7, #4]
 8022c90:	f7ff fe60 	bl	8022954 <dhcp_select>
}
 8022c94:	e025      	b.n	8022ce2 <dhcp_timeout+0x8a>
      dhcp_release_and_stop(netif);
 8022c96:	6878      	ldr	r0, [r7, #4]
 8022c98:	f000 fdae 	bl	80237f8 <dhcp_release_and_stop>
      dhcp_start(netif);
 8022c9c:	6878      	ldr	r0, [r7, #4]
 8022c9e:	f000 f8e7 	bl	8022e70 <dhcp_start>
}
 8022ca2:	e01e      	b.n	8022ce2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_CHECKING) {
 8022ca4:	68fb      	ldr	r3, [r7, #12]
 8022ca6:	795b      	ldrb	r3, [r3, #5]
 8022ca8:	2b08      	cmp	r3, #8
 8022caa:	d10b      	bne.n	8022cc4 <dhcp_timeout+0x6c>
    if (dhcp->tries <= 1) {
 8022cac:	68fb      	ldr	r3, [r7, #12]
 8022cae:	799b      	ldrb	r3, [r3, #6]
 8022cb0:	2b01      	cmp	r3, #1
 8022cb2:	d803      	bhi.n	8022cbc <dhcp_timeout+0x64>
      dhcp_check(netif);
 8022cb4:	6878      	ldr	r0, [r7, #4]
 8022cb6:	f7ff fdf3 	bl	80228a0 <dhcp_check>
}
 8022cba:	e012      	b.n	8022ce2 <dhcp_timeout+0x8a>
      dhcp_bind(netif);
 8022cbc:	6878      	ldr	r0, [r7, #4]
 8022cbe:	f000 fad7 	bl	8023270 <dhcp_bind>
}
 8022cc2:	e00e      	b.n	8022ce2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
 8022cc4:	68fb      	ldr	r3, [r7, #12]
 8022cc6:	795b      	ldrb	r3, [r3, #5]
 8022cc8:	2b03      	cmp	r3, #3
 8022cca:	d10a      	bne.n	8022ce2 <dhcp_timeout+0x8a>
    if (dhcp->tries < REBOOT_TRIES) {
 8022ccc:	68fb      	ldr	r3, [r7, #12]
 8022cce:	799b      	ldrb	r3, [r3, #6]
 8022cd0:	2b01      	cmp	r3, #1
 8022cd2:	d803      	bhi.n	8022cdc <dhcp_timeout+0x84>
      dhcp_reboot(netif);
 8022cd4:	6878      	ldr	r0, [r7, #4]
 8022cd6:	f000 fcdb 	bl	8023690 <dhcp_reboot>
}
 8022cda:	e002      	b.n	8022ce2 <dhcp_timeout+0x8a>
      dhcp_discover(netif);
 8022cdc:	6878      	ldr	r0, [r7, #4]
 8022cde:	f000 fa25 	bl	802312c <dhcp_discover>
}
 8022ce2:	bf00      	nop
 8022ce4:	3710      	adds	r7, #16
 8022ce6:	46bd      	mov	sp, r7
 8022ce8:	bd80      	pop	{r7, pc}

08022cea <dhcp_t1_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t1_timeout(struct netif *netif)
{
 8022cea:	b580      	push	{r7, lr}
 8022cec:	b084      	sub	sp, #16
 8022cee:	af00      	add	r7, sp, #0
 8022cf0:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022cf2:	687b      	ldr	r3, [r7, #4]
 8022cf4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022cf6:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022cf8:	68fb      	ldr	r3, [r7, #12]
 8022cfa:	795b      	ldrb	r3, [r3, #5]
 8022cfc:	2b01      	cmp	r3, #1
 8022cfe:	d007      	beq.n	8022d10 <dhcp_t1_timeout+0x26>
 8022d00:	68fb      	ldr	r3, [r7, #12]
 8022d02:	795b      	ldrb	r3, [r3, #5]
 8022d04:	2b0a      	cmp	r3, #10
 8022d06:	d003      	beq.n	8022d10 <dhcp_t1_timeout+0x26>
      (dhcp->state == DHCP_STATE_RENEWING)) {
 8022d08:	68fb      	ldr	r3, [r7, #12]
 8022d0a:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022d0c:	2b05      	cmp	r3, #5
 8022d0e:	d117      	bne.n	8022d40 <dhcp_t1_timeout+0x56>
     * eventually time-out if renew tries fail. */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t1_timeout(): must renew\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
    dhcp_renew(netif);
 8022d10:	6878      	ldr	r0, [r7, #4]
 8022d12:	f000 fb87 	bl	8023424 <dhcp_renew>
    /* Calculate next timeout */
    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8022d16:	68fb      	ldr	r3, [r7, #12]
 8022d18:	899b      	ldrh	r3, [r3, #12]
 8022d1a:	461a      	mov	r2, r3
 8022d1c:	68fb      	ldr	r3, [r7, #12]
 8022d1e:	8a5b      	ldrh	r3, [r3, #18]
 8022d20:	1ad3      	subs	r3, r2, r3
 8022d22:	2b01      	cmp	r3, #1
 8022d24:	dd0c      	ble.n	8022d40 <dhcp_t1_timeout+0x56>
      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
 8022d26:	68fb      	ldr	r3, [r7, #12]
 8022d28:	899b      	ldrh	r3, [r3, #12]
 8022d2a:	461a      	mov	r2, r3
 8022d2c:	68fb      	ldr	r3, [r7, #12]
 8022d2e:	8a5b      	ldrh	r3, [r3, #18]
 8022d30:	1ad3      	subs	r3, r2, r3
 8022d32:	2b00      	cmp	r3, #0
 8022d34:	da00      	bge.n	8022d38 <dhcp_t1_timeout+0x4e>
 8022d36:	3301      	adds	r3, #1
 8022d38:	105b      	asrs	r3, r3, #1
 8022d3a:	b29a      	uxth	r2, r3
 8022d3c:	68fb      	ldr	r3, [r7, #12]
 8022d3e:	81da      	strh	r2, [r3, #14]
    }
  }
}
 8022d40:	bf00      	nop
 8022d42:	3710      	adds	r7, #16
 8022d44:	46bd      	mov	sp, r7
 8022d46:	bd80      	pop	{r7, pc}

08022d48 <dhcp_t2_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t2_timeout(struct netif *netif)
{
 8022d48:	b580      	push	{r7, lr}
 8022d4a:	b084      	sub	sp, #16
 8022d4c:	af00      	add	r7, sp, #0
 8022d4e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022d50:	687b      	ldr	r3, [r7, #4]
 8022d52:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022d54:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022d56:	68fb      	ldr	r3, [r7, #12]
 8022d58:	795b      	ldrb	r3, [r3, #5]
 8022d5a:	2b01      	cmp	r3, #1
 8022d5c:	d00b      	beq.n	8022d76 <dhcp_t2_timeout+0x2e>
 8022d5e:	68fb      	ldr	r3, [r7, #12]
 8022d60:	795b      	ldrb	r3, [r3, #5]
 8022d62:	2b0a      	cmp	r3, #10
 8022d64:	d007      	beq.n	8022d76 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8022d66:	68fb      	ldr	r3, [r7, #12]
 8022d68:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022d6a:	2b05      	cmp	r3, #5
 8022d6c:	d003      	beq.n	8022d76 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8022d6e:	68fb      	ldr	r3, [r7, #12]
 8022d70:	795b      	ldrb	r3, [r3, #5]
 8022d72:	2b04      	cmp	r3, #4
 8022d74:	d117      	bne.n	8022da6 <dhcp_t2_timeout+0x5e>
    /* just retry to rebind */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t2_timeout(): must rebind\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
    dhcp_rebind(netif);
 8022d76:	6878      	ldr	r0, [r7, #4]
 8022d78:	f000 fbf0 	bl	802355c <dhcp_rebind>
    /* Calculate next timeout */
    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8022d7c:	68fb      	ldr	r3, [r7, #12]
 8022d7e:	8a9b      	ldrh	r3, [r3, #20]
 8022d80:	461a      	mov	r2, r3
 8022d82:	68fb      	ldr	r3, [r7, #12]
 8022d84:	8a5b      	ldrh	r3, [r3, #18]
 8022d86:	1ad3      	subs	r3, r2, r3
 8022d88:	2b01      	cmp	r3, #1
 8022d8a:	dd0c      	ble.n	8022da6 <dhcp_t2_timeout+0x5e>
      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
 8022d8c:	68fb      	ldr	r3, [r7, #12]
 8022d8e:	8a9b      	ldrh	r3, [r3, #20]
 8022d90:	461a      	mov	r2, r3
 8022d92:	68fb      	ldr	r3, [r7, #12]
 8022d94:	8a5b      	ldrh	r3, [r3, #18]
 8022d96:	1ad3      	subs	r3, r2, r3
 8022d98:	2b00      	cmp	r3, #0
 8022d9a:	da00      	bge.n	8022d9e <dhcp_t2_timeout+0x56>
 8022d9c:	3301      	adds	r3, #1
 8022d9e:	105b      	asrs	r3, r3, #1
 8022da0:	b29a      	uxth	r2, r3
 8022da2:	68fb      	ldr	r3, [r7, #12]
 8022da4:	821a      	strh	r2, [r3, #16]
    }
  }
}
 8022da6:	bf00      	nop
 8022da8:	3710      	adds	r7, #16
 8022daa:	46bd      	mov	sp, r7
 8022dac:	bd80      	pop	{r7, pc}
	...

08022db0 <dhcp_handle_ack>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022db0:	b580      	push	{r7, lr}
 8022db2:	b084      	sub	sp, #16
 8022db4:	af00      	add	r7, sp, #0
 8022db6:	6078      	str	r0, [r7, #4]
 8022db8:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022dba:	687b      	ldr	r3, [r7, #4]
 8022dbc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022dbe:	60fb      	str	r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif

  /* clear options we might not get from the ACK */
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8022dc0:	68fb      	ldr	r3, [r7, #12]
 8022dc2:	2200      	movs	r2, #0
 8022dc4:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8022dc6:	68fb      	ldr	r3, [r7, #12]
 8022dc8:	2200      	movs	r2, #0
 8022dca:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* lease time given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
 8022dcc:	4b26      	ldr	r3, [pc, #152]	@ (8022e68 <dhcp_handle_ack+0xb8>)
 8022dce:	78db      	ldrb	r3, [r3, #3]
 8022dd0:	2b00      	cmp	r3, #0
 8022dd2:	d003      	beq.n	8022ddc <dhcp_handle_ack+0x2c>
    /* remember offered lease time */
    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
 8022dd4:	4b25      	ldr	r3, [pc, #148]	@ (8022e6c <dhcp_handle_ack+0xbc>)
 8022dd6:	68da      	ldr	r2, [r3, #12]
 8022dd8:	68fb      	ldr	r3, [r7, #12]
 8022dda:	629a      	str	r2, [r3, #40]	@ 0x28
  }
  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
 8022ddc:	4b22      	ldr	r3, [pc, #136]	@ (8022e68 <dhcp_handle_ack+0xb8>)
 8022dde:	791b      	ldrb	r3, [r3, #4]
 8022de0:	2b00      	cmp	r3, #0
 8022de2:	d004      	beq.n	8022dee <dhcp_handle_ack+0x3e>
    /* remember given renewal period */
    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
 8022de4:	4b21      	ldr	r3, [pc, #132]	@ (8022e6c <dhcp_handle_ack+0xbc>)
 8022de6:	691a      	ldr	r2, [r3, #16]
 8022de8:	68fb      	ldr	r3, [r7, #12]
 8022dea:	62da      	str	r2, [r3, #44]	@ 0x2c
 8022dec:	e004      	b.n	8022df8 <dhcp_handle_ack+0x48>
  } else {
    /* calculate safe periods for renewal */
    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
 8022dee:	68fb      	ldr	r3, [r7, #12]
 8022df0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8022df2:	085a      	lsrs	r2, r3, #1
 8022df4:	68fb      	ldr	r3, [r7, #12]
 8022df6:	62da      	str	r2, [r3, #44]	@ 0x2c
  }

  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
 8022df8:	4b1b      	ldr	r3, [pc, #108]	@ (8022e68 <dhcp_handle_ack+0xb8>)
 8022dfa:	795b      	ldrb	r3, [r3, #5]
 8022dfc:	2b00      	cmp	r3, #0
 8022dfe:	d004      	beq.n	8022e0a <dhcp_handle_ack+0x5a>
    /* remember given rebind period */
    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
 8022e00:	4b1a      	ldr	r3, [pc, #104]	@ (8022e6c <dhcp_handle_ack+0xbc>)
 8022e02:	695a      	ldr	r2, [r3, #20]
 8022e04:	68fb      	ldr	r3, [r7, #12]
 8022e06:	631a      	str	r2, [r3, #48]	@ 0x30
 8022e08:	e007      	b.n	8022e1a <dhcp_handle_ack+0x6a>
  } else {
    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
 8022e0a:	68fb      	ldr	r3, [r7, #12]
 8022e0c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 8022e0e:	4613      	mov	r3, r2
 8022e10:	00db      	lsls	r3, r3, #3
 8022e12:	1a9b      	subs	r3, r3, r2
 8022e14:	08da      	lsrs	r2, r3, #3
 8022e16:	68fb      	ldr	r3, [r7, #12]
 8022e18:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* (y)our internet address */
  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8022e1a:	683b      	ldr	r3, [r7, #0]
 8022e1c:	691a      	ldr	r2, [r3, #16]
 8022e1e:	68fb      	ldr	r3, [r7, #12]
 8022e20:	61da      	str	r2, [r3, #28]
     boot file name copied in dhcp_parse_reply if not overloaded */
  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* subnet mask given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
 8022e22:	4b11      	ldr	r3, [pc, #68]	@ (8022e68 <dhcp_handle_ack+0xb8>)
 8022e24:	799b      	ldrb	r3, [r3, #6]
 8022e26:	2b00      	cmp	r3, #0
 8022e28:	d00b      	beq.n	8022e42 <dhcp_handle_ack+0x92>
    /* remember given subnet mask */
    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
 8022e2a:	4b10      	ldr	r3, [pc, #64]	@ (8022e6c <dhcp_handle_ack+0xbc>)
 8022e2c:	699b      	ldr	r3, [r3, #24]
 8022e2e:	4618      	mov	r0, r3
 8022e30:	f7f6 fd4f 	bl	80198d2 <lwip_htonl>
 8022e34:	4602      	mov	r2, r0
 8022e36:	68fb      	ldr	r3, [r7, #12]
 8022e38:	621a      	str	r2, [r3, #32]
    dhcp->subnet_mask_given = 1;
 8022e3a:	68fb      	ldr	r3, [r7, #12]
 8022e3c:	2201      	movs	r2, #1
 8022e3e:	71da      	strb	r2, [r3, #7]
 8022e40:	e002      	b.n	8022e48 <dhcp_handle_ack+0x98>
  } else {
    dhcp->subnet_mask_given = 0;
 8022e42:	68fb      	ldr	r3, [r7, #12]
 8022e44:	2200      	movs	r2, #0
 8022e46:	71da      	strb	r2, [r3, #7]
  }

  /* gateway router */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
 8022e48:	4b07      	ldr	r3, [pc, #28]	@ (8022e68 <dhcp_handle_ack+0xb8>)
 8022e4a:	79db      	ldrb	r3, [r3, #7]
 8022e4c:	2b00      	cmp	r3, #0
 8022e4e:	d007      	beq.n	8022e60 <dhcp_handle_ack+0xb0>
    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
 8022e50:	4b06      	ldr	r3, [pc, #24]	@ (8022e6c <dhcp_handle_ack+0xbc>)
 8022e52:	69db      	ldr	r3, [r3, #28]
 8022e54:	4618      	mov	r0, r3
 8022e56:	f7f6 fd3c 	bl	80198d2 <lwip_htonl>
 8022e5a:	4602      	mov	r2, r0
 8022e5c:	68fb      	ldr	r3, [r7, #12]
 8022e5e:	625a      	str	r2, [r3, #36]	@ 0x24
    ip_addr_t dns_addr;
    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
    dns_setserver(n, &dns_addr);
  }
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
 8022e60:	bf00      	nop
 8022e62:	3710      	adds	r7, #16
 8022e64:	46bd      	mov	sp, r7
 8022e66:	bd80      	pop	{r7, pc}
 8022e68:	2402afec 	.word	0x2402afec
 8022e6c:	2402afcc 	.word	0x2402afcc

08022e70 <dhcp_start>:
 * - ERR_OK - No error
 * - ERR_MEM - Out of memory
 */
err_t
dhcp_start(struct netif *netif)
{
 8022e70:	b580      	push	{r7, lr}
 8022e72:	b084      	sub	sp, #16
 8022e74:	af00      	add	r7, sp, #0
 8022e76:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp;
  err_t result;

  LWIP_ASSERT_CORE_LOCKED();
 8022e78:	f7ee f842 	bl	8010f00 <sys_check_core_locking>
  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
 8022e7c:	687b      	ldr	r3, [r7, #4]
 8022e7e:	2b00      	cmp	r3, #0
 8022e80:	d109      	bne.n	8022e96 <dhcp_start+0x26>
 8022e82:	4b37      	ldr	r3, [pc, #220]	@ (8022f60 <dhcp_start+0xf0>)
 8022e84:	f240 22e7 	movw	r2, #743	@ 0x2e7
 8022e88:	4936      	ldr	r1, [pc, #216]	@ (8022f64 <dhcp_start+0xf4>)
 8022e8a:	4837      	ldr	r0, [pc, #220]	@ (8022f68 <dhcp_start+0xf8>)
 8022e8c:	f007 fc66 	bl	802a75c <iprintf>
 8022e90:	f06f 030f 	mvn.w	r3, #15
 8022e94:	e060      	b.n	8022f58 <dhcp_start+0xe8>
  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
 8022e96:	687b      	ldr	r3, [r7, #4]
 8022e98:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8022e9c:	f003 0301 	and.w	r3, r3, #1
 8022ea0:	2b00      	cmp	r3, #0
 8022ea2:	d109      	bne.n	8022eb8 <dhcp_start+0x48>
 8022ea4:	4b2e      	ldr	r3, [pc, #184]	@ (8022f60 <dhcp_start+0xf0>)
 8022ea6:	f44f 723a 	mov.w	r2, #744	@ 0x2e8
 8022eaa:	4930      	ldr	r1, [pc, #192]	@ (8022f6c <dhcp_start+0xfc>)
 8022eac:	482e      	ldr	r0, [pc, #184]	@ (8022f68 <dhcp_start+0xf8>)
 8022eae:	f007 fc55 	bl	802a75c <iprintf>
 8022eb2:	f06f 030f 	mvn.w	r3, #15
 8022eb6:	e04f      	b.n	8022f58 <dhcp_start+0xe8>
  dhcp = netif_dhcp_data(netif);
 8022eb8:	687b      	ldr	r3, [r7, #4]
 8022eba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022ebc:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* check MTU of the netif */
  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
 8022ebe:	687b      	ldr	r3, [r7, #4]
 8022ec0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022ec2:	f5b3 7f10 	cmp.w	r3, #576	@ 0x240
 8022ec6:	d202      	bcs.n	8022ece <dhcp_start+0x5e>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
    return ERR_MEM;
 8022ec8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022ecc:	e044      	b.n	8022f58 <dhcp_start+0xe8>
  }

  /* no DHCP client attached yet? */
  if (dhcp == NULL) {
 8022ece:	68fb      	ldr	r3, [r7, #12]
 8022ed0:	2b00      	cmp	r3, #0
 8022ed2:	d10d      	bne.n	8022ef0 <dhcp_start+0x80>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
 8022ed4:	2034      	movs	r0, #52	@ 0x34
 8022ed6:	f7f7 f8c9 	bl	801a06c <mem_malloc>
 8022eda:	60f8      	str	r0, [r7, #12]
    if (dhcp == NULL) {
 8022edc:	68fb      	ldr	r3, [r7, #12]
 8022ede:	2b00      	cmp	r3, #0
 8022ee0:	d102      	bne.n	8022ee8 <dhcp_start+0x78>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
      return ERR_MEM;
 8022ee2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022ee6:	e037      	b.n	8022f58 <dhcp_start+0xe8>
    }

    /* store this dhcp client in the netif */
    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
 8022ee8:	687b      	ldr	r3, [r7, #4]
 8022eea:	68fa      	ldr	r2, [r7, #12]
 8022eec:	625a      	str	r2, [r3, #36]	@ 0x24
 8022eee:	e005      	b.n	8022efc <dhcp_start+0x8c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
    /* already has DHCP client attached */
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));

    if (dhcp->pcb_allocated != 0) {
 8022ef0:	68fb      	ldr	r3, [r7, #12]
 8022ef2:	791b      	ldrb	r3, [r3, #4]
 8022ef4:	2b00      	cmp	r3, #0
 8022ef6:	d001      	beq.n	8022efc <dhcp_start+0x8c>
      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8022ef8:	f7ff fc8e 	bl	8022818 <dhcp_dec_pcb_refcount>
    }
    /* dhcp is cleared below, no need to reset flag*/
  }

  /* clear data structure */
  memset(dhcp, 0, sizeof(struct dhcp));
 8022efc:	2234      	movs	r2, #52	@ 0x34
 8022efe:	2100      	movs	r1, #0
 8022f00:	68f8      	ldr	r0, [r7, #12]
 8022f02:	f007 fdbd 	bl	802aa80 <memset>
  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));

  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
 8022f06:	f7ff fc35 	bl	8022774 <dhcp_inc_pcb_refcount>
 8022f0a:	4603      	mov	r3, r0
 8022f0c:	2b00      	cmp	r3, #0
 8022f0e:	d002      	beq.n	8022f16 <dhcp_start+0xa6>
    return ERR_MEM;
 8022f10:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022f14:	e020      	b.n	8022f58 <dhcp_start+0xe8>
  }
  dhcp->pcb_allocated = 1;
 8022f16:	68fb      	ldr	r3, [r7, #12]
 8022f18:	2201      	movs	r2, #1
 8022f1a:	711a      	strb	r2, [r3, #4]

  if (!netif_is_link_up(netif)) {
 8022f1c:	687b      	ldr	r3, [r7, #4]
 8022f1e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8022f22:	f003 0304 	and.w	r3, r3, #4
 8022f26:	2b00      	cmp	r3, #0
 8022f28:	d105      	bne.n	8022f36 <dhcp_start+0xc6>
    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
    dhcp_set_state(dhcp, DHCP_STATE_INIT);
 8022f2a:	2102      	movs	r1, #2
 8022f2c:	68f8      	ldr	r0, [r7, #12]
 8022f2e:	f000 fd0a 	bl	8023946 <dhcp_set_state>
    return ERR_OK;
 8022f32:	2300      	movs	r3, #0
 8022f34:	e010      	b.n	8022f58 <dhcp_start+0xe8>
  }

  /* (re)start the DHCP negotiation */
  result = dhcp_discover(netif);
 8022f36:	6878      	ldr	r0, [r7, #4]
 8022f38:	f000 f8f8 	bl	802312c <dhcp_discover>
 8022f3c:	4603      	mov	r3, r0
 8022f3e:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
 8022f40:	f997 300b 	ldrsb.w	r3, [r7, #11]
 8022f44:	2b00      	cmp	r3, #0
 8022f46:	d005      	beq.n	8022f54 <dhcp_start+0xe4>
    /* free resources allocated above */
    dhcp_release_and_stop(netif);
 8022f48:	6878      	ldr	r0, [r7, #4]
 8022f4a:	f000 fc55 	bl	80237f8 <dhcp_release_and_stop>
    return ERR_MEM;
 8022f4e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022f52:	e001      	b.n	8022f58 <dhcp_start+0xe8>
  }
  return result;
 8022f54:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8022f58:	4618      	mov	r0, r3
 8022f5a:	3710      	adds	r7, #16
 8022f5c:	46bd      	mov	sp, r7
 8022f5e:	bd80      	pop	{r7, pc}
 8022f60:	08030d38 	.word	0x08030d38
 8022f64:	08030e1c 	.word	0x08030e1c
 8022f68:	08030d98 	.word	0x08030d98
 8022f6c:	08030e60 	.word	0x08030e60

08022f70 <dhcp_network_changed>:
 * This enters the REBOOTING state to verify that the currently bound
 * address is still valid.
 */
void
dhcp_network_changed(struct netif *netif)
{
 8022f70:	b580      	push	{r7, lr}
 8022f72:	b084      	sub	sp, #16
 8022f74:	af00      	add	r7, sp, #0
 8022f76:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022f78:	687b      	ldr	r3, [r7, #4]
 8022f7a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022f7c:	60fb      	str	r3, [r7, #12]

  if (!dhcp) {
 8022f7e:	68fb      	ldr	r3, [r7, #12]
 8022f80:	2b00      	cmp	r3, #0
 8022f82:	d025      	beq.n	8022fd0 <dhcp_network_changed+0x60>
    return;
  }
  switch (dhcp->state) {
 8022f84:	68fb      	ldr	r3, [r7, #12]
 8022f86:	795b      	ldrb	r3, [r3, #5]
 8022f88:	2b0a      	cmp	r3, #10
 8022f8a:	d008      	beq.n	8022f9e <dhcp_network_changed+0x2e>
 8022f8c:	2b0a      	cmp	r3, #10
 8022f8e:	dc0d      	bgt.n	8022fac <dhcp_network_changed+0x3c>
 8022f90:	2b00      	cmp	r3, #0
 8022f92:	d01f      	beq.n	8022fd4 <dhcp_network_changed+0x64>
 8022f94:	2b00      	cmp	r3, #0
 8022f96:	db09      	blt.n	8022fac <dhcp_network_changed+0x3c>
 8022f98:	3b03      	subs	r3, #3
 8022f9a:	2b02      	cmp	r3, #2
 8022f9c:	d806      	bhi.n	8022fac <dhcp_network_changed+0x3c>
    case DHCP_STATE_REBINDING:
    case DHCP_STATE_RENEWING:
    case DHCP_STATE_BOUND:
    case DHCP_STATE_REBOOTING:
      dhcp->tries = 0;
 8022f9e:	68fb      	ldr	r3, [r7, #12]
 8022fa0:	2200      	movs	r2, #0
 8022fa2:	719a      	strb	r2, [r3, #6]
      dhcp_reboot(netif);
 8022fa4:	6878      	ldr	r0, [r7, #4]
 8022fa6:	f000 fb73 	bl	8023690 <dhcp_reboot>
      break;
 8022faa:	e014      	b.n	8022fd6 <dhcp_network_changed+0x66>
    case DHCP_STATE_OFF:
      /* stay off */
      break;
    default:
      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
 8022fac:	68fb      	ldr	r3, [r7, #12]
 8022fae:	795b      	ldrb	r3, [r3, #5]
 8022fb0:	2b0c      	cmp	r3, #12
 8022fb2:	d906      	bls.n	8022fc2 <dhcp_network_changed+0x52>
 8022fb4:	4b09      	ldr	r3, [pc, #36]	@ (8022fdc <dhcp_network_changed+0x6c>)
 8022fb6:	f240 326d 	movw	r2, #877	@ 0x36d
 8022fba:	4909      	ldr	r1, [pc, #36]	@ (8022fe0 <dhcp_network_changed+0x70>)
 8022fbc:	4809      	ldr	r0, [pc, #36]	@ (8022fe4 <dhcp_network_changed+0x74>)
 8022fbe:	f007 fbcd 	bl	802a75c <iprintf>
        autoip_stop(netif);
        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
      }
#endif /* LWIP_DHCP_AUTOIP_COOP */
      /* ensure we start with short timeouts, even if already discovering */
      dhcp->tries = 0;
 8022fc2:	68fb      	ldr	r3, [r7, #12]
 8022fc4:	2200      	movs	r2, #0
 8022fc6:	719a      	strb	r2, [r3, #6]
      dhcp_discover(netif);
 8022fc8:	6878      	ldr	r0, [r7, #4]
 8022fca:	f000 f8af 	bl	802312c <dhcp_discover>
      break;
 8022fce:	e002      	b.n	8022fd6 <dhcp_network_changed+0x66>
    return;
 8022fd0:	bf00      	nop
 8022fd2:	e000      	b.n	8022fd6 <dhcp_network_changed+0x66>
      break;
 8022fd4:	bf00      	nop
  }
}
 8022fd6:	3710      	adds	r7, #16
 8022fd8:	46bd      	mov	sp, r7
 8022fda:	bd80      	pop	{r7, pc}
 8022fdc:	08030d38 	.word	0x08030d38
 8022fe0:	08030e84 	.word	0x08030e84
 8022fe4:	08030d98 	.word	0x08030d98

08022fe8 <dhcp_arp_reply>:
 * @param netif the network interface on which the reply was received
 * @param addr The IP address we received a reply from
 */
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
 8022fe8:	b580      	push	{r7, lr}
 8022fea:	b084      	sub	sp, #16
 8022fec:	af00      	add	r7, sp, #0
 8022fee:	6078      	str	r0, [r7, #4]
 8022ff0:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp;

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8022ff2:	687b      	ldr	r3, [r7, #4]
 8022ff4:	2b00      	cmp	r3, #0
 8022ff6:	d107      	bne.n	8023008 <dhcp_arp_reply+0x20>
 8022ff8:	4b0e      	ldr	r3, [pc, #56]	@ (8023034 <dhcp_arp_reply+0x4c>)
 8022ffa:	f240 328b 	movw	r2, #907	@ 0x38b
 8022ffe:	490e      	ldr	r1, [pc, #56]	@ (8023038 <dhcp_arp_reply+0x50>)
 8023000:	480e      	ldr	r0, [pc, #56]	@ (802303c <dhcp_arp_reply+0x54>)
 8023002:	f007 fbab 	bl	802a75c <iprintf>
 8023006:	e012      	b.n	802302e <dhcp_arp_reply+0x46>
  dhcp = netif_dhcp_data(netif);
 8023008:	687b      	ldr	r3, [r7, #4]
 802300a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802300c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
  /* is a DHCP client doing an ARP check? */
  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
 802300e:	68fb      	ldr	r3, [r7, #12]
 8023010:	2b00      	cmp	r3, #0
 8023012:	d00c      	beq.n	802302e <dhcp_arp_reply+0x46>
 8023014:	68fb      	ldr	r3, [r7, #12]
 8023016:	795b      	ldrb	r3, [r3, #5]
 8023018:	2b08      	cmp	r3, #8
 802301a:	d108      	bne.n	802302e <dhcp_arp_reply+0x46>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
                ip4_addr_get_u32(addr)));
    /* did a host respond with the address we
       were offered by the DHCP server? */
    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
 802301c:	683b      	ldr	r3, [r7, #0]
 802301e:	681a      	ldr	r2, [r3, #0]
 8023020:	68fb      	ldr	r3, [r7, #12]
 8023022:	69db      	ldr	r3, [r3, #28]
 8023024:	429a      	cmp	r2, r3
 8023026:	d102      	bne.n	802302e <dhcp_arp_reply+0x46>
      /* we will not accept the offered address */
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
      dhcp_decline(netif);
 8023028:	6878      	ldr	r0, [r7, #4]
 802302a:	f000 f809 	bl	8023040 <dhcp_decline>
    }
  }
}
 802302e:	3710      	adds	r7, #16
 8023030:	46bd      	mov	sp, r7
 8023032:	bd80      	pop	{r7, pc}
 8023034:	08030d38 	.word	0x08030d38
 8023038:	08030e1c 	.word	0x08030e1c
 802303c:	08030d98 	.word	0x08030d98

08023040 <dhcp_decline>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_decline(struct netif *netif)
{
 8023040:	b5b0      	push	{r4, r5, r7, lr}
 8023042:	b08a      	sub	sp, #40	@ 0x28
 8023044:	af02      	add	r7, sp, #8
 8023046:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023048:	687b      	ldr	r3, [r7, #4]
 802304a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802304c:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 802304e:	210c      	movs	r1, #12
 8023050:	69b8      	ldr	r0, [r7, #24]
 8023052:	f000 fc78 	bl	8023946 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
 8023056:	f107 030c 	add.w	r3, r7, #12
 802305a:	2204      	movs	r2, #4
 802305c:	69b9      	ldr	r1, [r7, #24]
 802305e:	6878      	ldr	r0, [r7, #4]
 8023060:	f001 f90a 	bl	8024278 <dhcp_create_msg>
 8023064:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8023066:	697b      	ldr	r3, [r7, #20]
 8023068:	2b00      	cmp	r3, #0
 802306a:	d035      	beq.n	80230d8 <dhcp_decline+0x98>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 802306c:	697b      	ldr	r3, [r7, #20]
 802306e:	685b      	ldr	r3, [r3, #4]
 8023070:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8023072:	89b8      	ldrh	r0, [r7, #12]
 8023074:	693b      	ldr	r3, [r7, #16]
 8023076:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802307a:	2304      	movs	r3, #4
 802307c:	2232      	movs	r2, #50	@ 0x32
 802307e:	f000 fc7d 	bl	802397c <dhcp_option>
 8023082:	4603      	mov	r3, r0
 8023084:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8023086:	89bc      	ldrh	r4, [r7, #12]
 8023088:	693b      	ldr	r3, [r7, #16]
 802308a:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 802308e:	69bb      	ldr	r3, [r7, #24]
 8023090:	69db      	ldr	r3, [r3, #28]
 8023092:	4618      	mov	r0, r3
 8023094:	f7f6 fc1d 	bl	80198d2 <lwip_htonl>
 8023098:	4603      	mov	r3, r0
 802309a:	461a      	mov	r2, r3
 802309c:	4629      	mov	r1, r5
 802309e:	4620      	mov	r0, r4
 80230a0:	f000 fcf8 	bl	8023a94 <dhcp_option_long>
 80230a4:	4603      	mov	r3, r0
 80230a6:	81bb      	strh	r3, [r7, #12]

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80230a8:	89b8      	ldrh	r0, [r7, #12]
 80230aa:	693b      	ldr	r3, [r7, #16]
 80230ac:	33f0      	adds	r3, #240	@ 0xf0
 80230ae:	697a      	ldr	r2, [r7, #20]
 80230b0:	4619      	mov	r1, r3
 80230b2:	f001 f9b7 	bl	8024424 <dhcp_option_trailer>

    /* per section 4.4.4, broadcast DECLINE messages */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 80230b6:	4b19      	ldr	r3, [pc, #100]	@ (802311c <dhcp_decline+0xdc>)
 80230b8:	6818      	ldr	r0, [r3, #0]
 80230ba:	4b19      	ldr	r3, [pc, #100]	@ (8023120 <dhcp_decline+0xe0>)
 80230bc:	9301      	str	r3, [sp, #4]
 80230be:	687b      	ldr	r3, [r7, #4]
 80230c0:	9300      	str	r3, [sp, #0]
 80230c2:	2343      	movs	r3, #67	@ 0x43
 80230c4:	4a17      	ldr	r2, [pc, #92]	@ (8023124 <dhcp_decline+0xe4>)
 80230c6:	6979      	ldr	r1, [r7, #20]
 80230c8:	f7ff f88a 	bl	80221e0 <udp_sendto_if_src>
 80230cc:	4603      	mov	r3, r0
 80230ce:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80230d0:	6978      	ldr	r0, [r7, #20]
 80230d2:	f7f8 f8cb 	bl	801b26c <pbuf_free>
 80230d6:	e001      	b.n	80230dc <dhcp_decline+0x9c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_decline: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80230d8:	23ff      	movs	r3, #255	@ 0xff
 80230da:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80230dc:	69bb      	ldr	r3, [r7, #24]
 80230de:	799b      	ldrb	r3, [r3, #6]
 80230e0:	2bff      	cmp	r3, #255	@ 0xff
 80230e2:	d005      	beq.n	80230f0 <dhcp_decline+0xb0>
    dhcp->tries++;
 80230e4:	69bb      	ldr	r3, [r7, #24]
 80230e6:	799b      	ldrb	r3, [r3, #6]
 80230e8:	3301      	adds	r3, #1
 80230ea:	b2da      	uxtb	r2, r3
 80230ec:	69bb      	ldr	r3, [r7, #24]
 80230ee:	719a      	strb	r2, [r3, #6]
  }
  msecs = 10 * 1000;
 80230f0:	f242 7310 	movw	r3, #10000	@ 0x2710
 80230f4:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80230f6:	89fb      	ldrh	r3, [r7, #14]
 80230f8:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80230fc:	4a0a      	ldr	r2, [pc, #40]	@ (8023128 <dhcp_decline+0xe8>)
 80230fe:	fb82 1203 	smull	r1, r2, r2, r3
 8023102:	1152      	asrs	r2, r2, #5
 8023104:	17db      	asrs	r3, r3, #31
 8023106:	1ad3      	subs	r3, r2, r3
 8023108:	b29a      	uxth	r2, r3
 802310a:	69bb      	ldr	r3, [r7, #24]
 802310c:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802310e:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023112:	4618      	mov	r0, r3
 8023114:	3720      	adds	r7, #32
 8023116:	46bd      	mov	sp, r7
 8023118:	bdb0      	pop	{r4, r5, r7, pc}
 802311a:	bf00      	nop
 802311c:	2402aff4 	.word	0x2402aff4
 8023120:	08031b58 	.word	0x08031b58
 8023124:	08031b5c 	.word	0x08031b5c
 8023128:	10624dd3 	.word	0x10624dd3

0802312c <dhcp_discover>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_discover(struct netif *netif)
{
 802312c:	b580      	push	{r7, lr}
 802312e:	b08a      	sub	sp, #40	@ 0x28
 8023130:	af02      	add	r7, sp, #8
 8023132:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023134:	687b      	ldr	r3, [r7, #4]
 8023136:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023138:	61bb      	str	r3, [r7, #24]
  err_t result = ERR_OK;
 802313a:	2300      	movs	r3, #0
 802313c:	75fb      	strb	r3, [r7, #23]
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));

  ip4_addr_set_any(&dhcp->offered_ip_addr);
 802313e:	69bb      	ldr	r3, [r7, #24]
 8023140:	2200      	movs	r2, #0
 8023142:	61da      	str	r2, [r3, #28]
  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
 8023144:	2106      	movs	r1, #6
 8023146:	69b8      	ldr	r0, [r7, #24]
 8023148:	f000 fbfd 	bl	8023946 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
 802314c:	f107 0308 	add.w	r3, r7, #8
 8023150:	2201      	movs	r2, #1
 8023152:	69b9      	ldr	r1, [r7, #24]
 8023154:	6878      	ldr	r0, [r7, #4]
 8023156:	f001 f88f 	bl	8024278 <dhcp_create_msg>
 802315a:	6138      	str	r0, [r7, #16]
  if (p_out != NULL) {
 802315c:	693b      	ldr	r3, [r7, #16]
 802315e:	2b00      	cmp	r3, #0
 8023160:	d04b      	beq.n	80231fa <dhcp_discover+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023162:	693b      	ldr	r3, [r7, #16]
 8023164:	685b      	ldr	r3, [r3, #4]
 8023166:	60fb      	str	r3, [r7, #12]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8023168:	8938      	ldrh	r0, [r7, #8]
 802316a:	68fb      	ldr	r3, [r7, #12]
 802316c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023170:	2302      	movs	r3, #2
 8023172:	2239      	movs	r2, #57	@ 0x39
 8023174:	f000 fc02 	bl	802397c <dhcp_option>
 8023178:	4603      	mov	r3, r0
 802317a:	813b      	strh	r3, [r7, #8]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 802317c:	8938      	ldrh	r0, [r7, #8]
 802317e:	68fb      	ldr	r3, [r7, #12]
 8023180:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023184:	687b      	ldr	r3, [r7, #4]
 8023186:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8023188:	461a      	mov	r2, r3
 802318a:	f000 fc51 	bl	8023a30 <dhcp_option_short>
 802318e:	4603      	mov	r3, r0
 8023190:	813b      	strh	r3, [r7, #8]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023192:	8938      	ldrh	r0, [r7, #8]
 8023194:	68fb      	ldr	r3, [r7, #12]
 8023196:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802319a:	2303      	movs	r3, #3
 802319c:	2237      	movs	r2, #55	@ 0x37
 802319e:	f000 fbed 	bl	802397c <dhcp_option>
 80231a2:	4603      	mov	r3, r0
 80231a4:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80231a6:	2300      	movs	r3, #0
 80231a8:	77fb      	strb	r3, [r7, #31]
 80231aa:	e00e      	b.n	80231ca <dhcp_discover+0x9e>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80231ac:	8938      	ldrh	r0, [r7, #8]
 80231ae:	68fb      	ldr	r3, [r7, #12]
 80231b0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80231b4:	7ffb      	ldrb	r3, [r7, #31]
 80231b6:	4a29      	ldr	r2, [pc, #164]	@ (802325c <dhcp_discover+0x130>)
 80231b8:	5cd3      	ldrb	r3, [r2, r3]
 80231ba:	461a      	mov	r2, r3
 80231bc:	f000 fc12 	bl	80239e4 <dhcp_option_byte>
 80231c0:	4603      	mov	r3, r0
 80231c2:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80231c4:	7ffb      	ldrb	r3, [r7, #31]
 80231c6:	3301      	adds	r3, #1
 80231c8:	77fb      	strb	r3, [r7, #31]
 80231ca:	7ffb      	ldrb	r3, [r7, #31]
 80231cc:	2b02      	cmp	r3, #2
 80231ce:	d9ed      	bls.n	80231ac <dhcp_discover+0x80>
    }
    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80231d0:	8938      	ldrh	r0, [r7, #8]
 80231d2:	68fb      	ldr	r3, [r7, #12]
 80231d4:	33f0      	adds	r3, #240	@ 0xf0
 80231d6:	693a      	ldr	r2, [r7, #16]
 80231d8:	4619      	mov	r1, r3
 80231da:	f001 f923 	bl	8024424 <dhcp_option_trailer>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 80231de:	4b20      	ldr	r3, [pc, #128]	@ (8023260 <dhcp_discover+0x134>)
 80231e0:	6818      	ldr	r0, [r3, #0]
 80231e2:	4b20      	ldr	r3, [pc, #128]	@ (8023264 <dhcp_discover+0x138>)
 80231e4:	9301      	str	r3, [sp, #4]
 80231e6:	687b      	ldr	r3, [r7, #4]
 80231e8:	9300      	str	r3, [sp, #0]
 80231ea:	2343      	movs	r3, #67	@ 0x43
 80231ec:	4a1e      	ldr	r2, [pc, #120]	@ (8023268 <dhcp_discover+0x13c>)
 80231ee:	6939      	ldr	r1, [r7, #16]
 80231f0:	f7fe fff6 	bl	80221e0 <udp_sendto_if_src>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
    pbuf_free(p_out);
 80231f4:	6938      	ldr	r0, [r7, #16]
 80231f6:	f7f8 f839 	bl	801b26c <pbuf_free>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
  }
  if (dhcp->tries < 255) {
 80231fa:	69bb      	ldr	r3, [r7, #24]
 80231fc:	799b      	ldrb	r3, [r3, #6]
 80231fe:	2bff      	cmp	r3, #255	@ 0xff
 8023200:	d005      	beq.n	802320e <dhcp_discover+0xe2>
    dhcp->tries++;
 8023202:	69bb      	ldr	r3, [r7, #24]
 8023204:	799b      	ldrb	r3, [r3, #6]
 8023206:	3301      	adds	r3, #1
 8023208:	b2da      	uxtb	r2, r3
 802320a:	69bb      	ldr	r3, [r7, #24]
 802320c:	719a      	strb	r2, [r3, #6]
  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
    autoip_start(netif);
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 802320e:	69bb      	ldr	r3, [r7, #24]
 8023210:	799b      	ldrb	r3, [r3, #6]
 8023212:	2b05      	cmp	r3, #5
 8023214:	d80d      	bhi.n	8023232 <dhcp_discover+0x106>
 8023216:	69bb      	ldr	r3, [r7, #24]
 8023218:	799b      	ldrb	r3, [r3, #6]
 802321a:	461a      	mov	r2, r3
 802321c:	2301      	movs	r3, #1
 802321e:	4093      	lsls	r3, r2
 8023220:	b29b      	uxth	r3, r3
 8023222:	461a      	mov	r2, r3
 8023224:	0152      	lsls	r2, r2, #5
 8023226:	1ad2      	subs	r2, r2, r3
 8023228:	0092      	lsls	r2, r2, #2
 802322a:	4413      	add	r3, r2
 802322c:	00db      	lsls	r3, r3, #3
 802322e:	b29b      	uxth	r3, r3
 8023230:	e001      	b.n	8023236 <dhcp_discover+0x10a>
 8023232:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8023236:	817b      	strh	r3, [r7, #10]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8023238:	897b      	ldrh	r3, [r7, #10]
 802323a:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 802323e:	4a0b      	ldr	r2, [pc, #44]	@ (802326c <dhcp_discover+0x140>)
 8023240:	fb82 1203 	smull	r1, r2, r2, r3
 8023244:	1152      	asrs	r2, r2, #5
 8023246:	17db      	asrs	r3, r3, #31
 8023248:	1ad3      	subs	r3, r2, r3
 802324a:	b29a      	uxth	r2, r3
 802324c:	69bb      	ldr	r3, [r7, #24]
 802324e:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023250:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8023254:	4618      	mov	r0, r3
 8023256:	3720      	adds	r7, #32
 8023258:	46bd      	mov	sp, r7
 802325a:	bd80      	pop	{r7, pc}
 802325c:	24000058 	.word	0x24000058
 8023260:	2402aff4 	.word	0x2402aff4
 8023264:	08031b58 	.word	0x08031b58
 8023268:	08031b5c 	.word	0x08031b5c
 802326c:	10624dd3 	.word	0x10624dd3

08023270 <dhcp_bind>:
 *
 * @param netif network interface to bind to the offered address
 */
static void
dhcp_bind(struct netif *netif)
{
 8023270:	b580      	push	{r7, lr}
 8023272:	b088      	sub	sp, #32
 8023274:	af00      	add	r7, sp, #0
 8023276:	6078      	str	r0, [r7, #4]
  u32_t timeout;
  struct dhcp *dhcp;
  ip4_addr_t sn_mask, gw_addr;
  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
 8023278:	687b      	ldr	r3, [r7, #4]
 802327a:	2b00      	cmp	r3, #0
 802327c:	d107      	bne.n	802328e <dhcp_bind+0x1e>
 802327e:	4b64      	ldr	r3, [pc, #400]	@ (8023410 <dhcp_bind+0x1a0>)
 8023280:	f240 4215 	movw	r2, #1045	@ 0x415
 8023284:	4963      	ldr	r1, [pc, #396]	@ (8023414 <dhcp_bind+0x1a4>)
 8023286:	4864      	ldr	r0, [pc, #400]	@ (8023418 <dhcp_bind+0x1a8>)
 8023288:	f007 fa68 	bl	802a75c <iprintf>
 802328c:	e0bc      	b.n	8023408 <dhcp_bind+0x198>
  dhcp = netif_dhcp_data(netif);
 802328e:	687b      	ldr	r3, [r7, #4]
 8023290:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023292:	61fb      	str	r3, [r7, #28]
  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
 8023294:	69fb      	ldr	r3, [r7, #28]
 8023296:	2b00      	cmp	r3, #0
 8023298:	d107      	bne.n	80232aa <dhcp_bind+0x3a>
 802329a:	4b5d      	ldr	r3, [pc, #372]	@ (8023410 <dhcp_bind+0x1a0>)
 802329c:	f240 4217 	movw	r2, #1047	@ 0x417
 80232a0:	495e      	ldr	r1, [pc, #376]	@ (802341c <dhcp_bind+0x1ac>)
 80232a2:	485d      	ldr	r0, [pc, #372]	@ (8023418 <dhcp_bind+0x1a8>)
 80232a4:	f007 fa5a 	bl	802a75c <iprintf>
 80232a8:	e0ae      	b.n	8023408 <dhcp_bind+0x198>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* reset time used of lease */
  dhcp->lease_used = 0;
 80232aa:	69fb      	ldr	r3, [r7, #28]
 80232ac:	2200      	movs	r2, #0
 80232ae:	825a      	strh	r2, [r3, #18]

  if (dhcp->offered_t0_lease != 0xffffffffUL) {
 80232b0:	69fb      	ldr	r3, [r7, #28]
 80232b2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80232b4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80232b8:	d019      	beq.n	80232ee <dhcp_bind+0x7e>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80232ba:	69fb      	ldr	r3, [r7, #28]
 80232bc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80232be:	331e      	adds	r3, #30
 80232c0:	4a57      	ldr	r2, [pc, #348]	@ (8023420 <dhcp_bind+0x1b0>)
 80232c2:	fba2 2303 	umull	r2, r3, r2, r3
 80232c6:	095b      	lsrs	r3, r3, #5
 80232c8:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 80232ca:	69bb      	ldr	r3, [r7, #24]
 80232cc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80232d0:	d302      	bcc.n	80232d8 <dhcp_bind+0x68>
      timeout = 0xffff;
 80232d2:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80232d6:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t0_timeout = (u16_t)timeout;
 80232d8:	69bb      	ldr	r3, [r7, #24]
 80232da:	b29a      	uxth	r2, r3
 80232dc:	69fb      	ldr	r3, [r7, #28]
 80232de:	829a      	strh	r2, [r3, #20]
    if (dhcp->t0_timeout == 0) {
 80232e0:	69fb      	ldr	r3, [r7, #28]
 80232e2:	8a9b      	ldrh	r3, [r3, #20]
 80232e4:	2b00      	cmp	r3, #0
 80232e6:	d102      	bne.n	80232ee <dhcp_bind+0x7e>
      dhcp->t0_timeout = 1;
 80232e8:	69fb      	ldr	r3, [r7, #28]
 80232ea:	2201      	movs	r2, #1
 80232ec:	829a      	strh	r2, [r3, #20]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
  }

  /* temporary DHCP lease? */
  if (dhcp->offered_t1_renew != 0xffffffffUL) {
 80232ee:	69fb      	ldr	r3, [r7, #28]
 80232f0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80232f2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80232f6:	d01d      	beq.n	8023334 <dhcp_bind+0xc4>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80232f8:	69fb      	ldr	r3, [r7, #28]
 80232fa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80232fc:	331e      	adds	r3, #30
 80232fe:	4a48      	ldr	r2, [pc, #288]	@ (8023420 <dhcp_bind+0x1b0>)
 8023300:	fba2 2303 	umull	r2, r3, r2, r3
 8023304:	095b      	lsrs	r3, r3, #5
 8023306:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8023308:	69bb      	ldr	r3, [r7, #24]
 802330a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 802330e:	d302      	bcc.n	8023316 <dhcp_bind+0xa6>
      timeout = 0xffff;
 8023310:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8023314:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t1_timeout = (u16_t)timeout;
 8023316:	69bb      	ldr	r3, [r7, #24]
 8023318:	b29a      	uxth	r2, r3
 802331a:	69fb      	ldr	r3, [r7, #28]
 802331c:	815a      	strh	r2, [r3, #10]
    if (dhcp->t1_timeout == 0) {
 802331e:	69fb      	ldr	r3, [r7, #28]
 8023320:	895b      	ldrh	r3, [r3, #10]
 8023322:	2b00      	cmp	r3, #0
 8023324:	d102      	bne.n	802332c <dhcp_bind+0xbc>
      dhcp->t1_timeout = 1;
 8023326:	69fb      	ldr	r3, [r7, #28]
 8023328:	2201      	movs	r2, #1
 802332a:	815a      	strh	r2, [r3, #10]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
    dhcp->t1_renew_time = dhcp->t1_timeout;
 802332c:	69fb      	ldr	r3, [r7, #28]
 802332e:	895a      	ldrh	r2, [r3, #10]
 8023330:	69fb      	ldr	r3, [r7, #28]
 8023332:	81da      	strh	r2, [r3, #14]
  }
  /* set renewal period timer */
  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
 8023334:	69fb      	ldr	r3, [r7, #28]
 8023336:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8023338:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802333c:	d01d      	beq.n	802337a <dhcp_bind+0x10a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 802333e:	69fb      	ldr	r3, [r7, #28]
 8023340:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8023342:	331e      	adds	r3, #30
 8023344:	4a36      	ldr	r2, [pc, #216]	@ (8023420 <dhcp_bind+0x1b0>)
 8023346:	fba2 2303 	umull	r2, r3, r2, r3
 802334a:	095b      	lsrs	r3, r3, #5
 802334c:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 802334e:	69bb      	ldr	r3, [r7, #24]
 8023350:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8023354:	d302      	bcc.n	802335c <dhcp_bind+0xec>
      timeout = 0xffff;
 8023356:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 802335a:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t2_timeout = (u16_t)timeout;
 802335c:	69bb      	ldr	r3, [r7, #24]
 802335e:	b29a      	uxth	r2, r3
 8023360:	69fb      	ldr	r3, [r7, #28]
 8023362:	819a      	strh	r2, [r3, #12]
    if (dhcp->t2_timeout == 0) {
 8023364:	69fb      	ldr	r3, [r7, #28]
 8023366:	899b      	ldrh	r3, [r3, #12]
 8023368:	2b00      	cmp	r3, #0
 802336a:	d102      	bne.n	8023372 <dhcp_bind+0x102>
      dhcp->t2_timeout = 1;
 802336c:	69fb      	ldr	r3, [r7, #28]
 802336e:	2201      	movs	r2, #1
 8023370:	819a      	strh	r2, [r3, #12]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
    dhcp->t2_rebind_time = dhcp->t2_timeout;
 8023372:	69fb      	ldr	r3, [r7, #28]
 8023374:	899a      	ldrh	r2, [r3, #12]
 8023376:	69fb      	ldr	r3, [r7, #28]
 8023378:	821a      	strh	r2, [r3, #16]
  }

  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
 802337a:	69fb      	ldr	r3, [r7, #28]
 802337c:	895a      	ldrh	r2, [r3, #10]
 802337e:	69fb      	ldr	r3, [r7, #28]
 8023380:	899b      	ldrh	r3, [r3, #12]
 8023382:	429a      	cmp	r2, r3
 8023384:	d306      	bcc.n	8023394 <dhcp_bind+0x124>
 8023386:	69fb      	ldr	r3, [r7, #28]
 8023388:	899b      	ldrh	r3, [r3, #12]
 802338a:	2b00      	cmp	r3, #0
 802338c:	d002      	beq.n	8023394 <dhcp_bind+0x124>
    dhcp->t1_timeout = 0;
 802338e:	69fb      	ldr	r3, [r7, #28]
 8023390:	2200      	movs	r2, #0
 8023392:	815a      	strh	r2, [r3, #10]
  }

  if (dhcp->subnet_mask_given) {
 8023394:	69fb      	ldr	r3, [r7, #28]
 8023396:	79db      	ldrb	r3, [r3, #7]
 8023398:	2b00      	cmp	r3, #0
 802339a:	d003      	beq.n	80233a4 <dhcp_bind+0x134>
    /* copy offered network mask */
    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
 802339c:	69fb      	ldr	r3, [r7, #28]
 802339e:	6a1b      	ldr	r3, [r3, #32]
 80233a0:	613b      	str	r3, [r7, #16]
 80233a2:	e014      	b.n	80233ce <dhcp_bind+0x15e>
  } else {
    /* subnet mask not given, choose a safe subnet mask given the network class */
    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
 80233a4:	69fb      	ldr	r3, [r7, #28]
 80233a6:	331c      	adds	r3, #28
 80233a8:	781b      	ldrb	r3, [r3, #0]
 80233aa:	75fb      	strb	r3, [r7, #23]
    if (first_octet <= 127) {
 80233ac:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80233b0:	2b00      	cmp	r3, #0
 80233b2:	db02      	blt.n	80233ba <dhcp_bind+0x14a>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
 80233b4:	23ff      	movs	r3, #255	@ 0xff
 80233b6:	613b      	str	r3, [r7, #16]
 80233b8:	e009      	b.n	80233ce <dhcp_bind+0x15e>
    } else if (first_octet >= 192) {
 80233ba:	7dfb      	ldrb	r3, [r7, #23]
 80233bc:	2bbf      	cmp	r3, #191	@ 0xbf
 80233be:	d903      	bls.n	80233c8 <dhcp_bind+0x158>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
 80233c0:	f06f 437f 	mvn.w	r3, #4278190080	@ 0xff000000
 80233c4:	613b      	str	r3, [r7, #16]
 80233c6:	e002      	b.n	80233ce <dhcp_bind+0x15e>
    } else {
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
 80233c8:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80233cc:	613b      	str	r3, [r7, #16]
    }
  }

  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
 80233ce:	69fb      	ldr	r3, [r7, #28]
 80233d0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80233d2:	60fb      	str	r3, [r7, #12]
  /* gateway address not given? */
  if (ip4_addr_isany_val(gw_addr)) {
 80233d4:	68fb      	ldr	r3, [r7, #12]
 80233d6:	2b00      	cmp	r3, #0
 80233d8:	d108      	bne.n	80233ec <dhcp_bind+0x17c>
    /* copy network address */
    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
 80233da:	69fb      	ldr	r3, [r7, #28]
 80233dc:	69da      	ldr	r2, [r3, #28]
 80233de:	693b      	ldr	r3, [r7, #16]
 80233e0:	4013      	ands	r3, r2
 80233e2:	60fb      	str	r3, [r7, #12]
    /* use first host address on network as gateway */
    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
 80233e4:	68fb      	ldr	r3, [r7, #12]
 80233e6:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 80233ea:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
  /* netif is now bound to DHCP leased address - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
 80233ec:	210a      	movs	r1, #10
 80233ee:	69f8      	ldr	r0, [r7, #28]
 80233f0:	f000 faa9 	bl	8023946 <dhcp_set_state>

  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
 80233f4:	69fb      	ldr	r3, [r7, #28]
 80233f6:	f103 011c 	add.w	r1, r3, #28
 80233fa:	f107 030c 	add.w	r3, r7, #12
 80233fe:	f107 0210 	add.w	r2, r7, #16
 8023402:	6878      	ldr	r0, [r7, #4]
 8023404:	f7f7 f9e8 	bl	801a7d8 <netif_set_addr>
  /* interface is used by routing now that an address is set */
}
 8023408:	3720      	adds	r7, #32
 802340a:	46bd      	mov	sp, r7
 802340c:	bd80      	pop	{r7, pc}
 802340e:	bf00      	nop
 8023410:	08030d38 	.word	0x08030d38
 8023414:	08030e98 	.word	0x08030e98
 8023418:	08030d98 	.word	0x08030d98
 802341c:	08030eb4 	.word	0x08030eb4
 8023420:	88888889 	.word	0x88888889

08023424 <dhcp_renew>:
 *
 * @param netif network interface which must renew its lease
 */
err_t
dhcp_renew(struct netif *netif)
{
 8023424:	b580      	push	{r7, lr}
 8023426:	b08a      	sub	sp, #40	@ 0x28
 8023428:	af02      	add	r7, sp, #8
 802342a:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 802342c:	687b      	ldr	r3, [r7, #4]
 802342e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023430:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ASSERT_CORE_LOCKED();
 8023432:	f7ed fd65 	bl	8010f00 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
 8023436:	2105      	movs	r1, #5
 8023438:	69b8      	ldr	r0, [r7, #24]
 802343a:	f000 fa84 	bl	8023946 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 802343e:	f107 030c 	add.w	r3, r7, #12
 8023442:	2203      	movs	r2, #3
 8023444:	69b9      	ldr	r1, [r7, #24]
 8023446:	6878      	ldr	r0, [r7, #4]
 8023448:	f000 ff16 	bl	8024278 <dhcp_create_msg>
 802344c:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 802344e:	697b      	ldr	r3, [r7, #20]
 8023450:	2b00      	cmp	r3, #0
 8023452:	d04e      	beq.n	80234f2 <dhcp_renew+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023454:	697b      	ldr	r3, [r7, #20]
 8023456:	685b      	ldr	r3, [r3, #4]
 8023458:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802345a:	89b8      	ldrh	r0, [r7, #12]
 802345c:	693b      	ldr	r3, [r7, #16]
 802345e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023462:	2302      	movs	r3, #2
 8023464:	2239      	movs	r2, #57	@ 0x39
 8023466:	f000 fa89 	bl	802397c <dhcp_option>
 802346a:	4603      	mov	r3, r0
 802346c:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 802346e:	89b8      	ldrh	r0, [r7, #12]
 8023470:	693b      	ldr	r3, [r7, #16]
 8023472:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023476:	687b      	ldr	r3, [r7, #4]
 8023478:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802347a:	461a      	mov	r2, r3
 802347c:	f000 fad8 	bl	8023a30 <dhcp_option_short>
 8023480:	4603      	mov	r3, r0
 8023482:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023484:	89b8      	ldrh	r0, [r7, #12]
 8023486:	693b      	ldr	r3, [r7, #16]
 8023488:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802348c:	2303      	movs	r3, #3
 802348e:	2237      	movs	r2, #55	@ 0x37
 8023490:	f000 fa74 	bl	802397c <dhcp_option>
 8023494:	4603      	mov	r3, r0
 8023496:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023498:	2300      	movs	r3, #0
 802349a:	77bb      	strb	r3, [r7, #30]
 802349c:	e00e      	b.n	80234bc <dhcp_renew+0x98>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802349e:	89b8      	ldrh	r0, [r7, #12]
 80234a0:	693b      	ldr	r3, [r7, #16]
 80234a2:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80234a6:	7fbb      	ldrb	r3, [r7, #30]
 80234a8:	4a29      	ldr	r2, [pc, #164]	@ (8023550 <dhcp_renew+0x12c>)
 80234aa:	5cd3      	ldrb	r3, [r2, r3]
 80234ac:	461a      	mov	r2, r3
 80234ae:	f000 fa99 	bl	80239e4 <dhcp_option_byte>
 80234b2:	4603      	mov	r3, r0
 80234b4:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80234b6:	7fbb      	ldrb	r3, [r7, #30]
 80234b8:	3301      	adds	r3, #1
 80234ba:	77bb      	strb	r3, [r7, #30]
 80234bc:	7fbb      	ldrb	r3, [r7, #30]
 80234be:	2b02      	cmp	r3, #2
 80234c0:	d9ed      	bls.n	802349e <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80234c2:	89b8      	ldrh	r0, [r7, #12]
 80234c4:	693b      	ldr	r3, [r7, #16]
 80234c6:	33f0      	adds	r3, #240	@ 0xf0
 80234c8:	697a      	ldr	r2, [r7, #20]
 80234ca:	4619      	mov	r1, r3
 80234cc:	f000 ffaa 	bl	8024424 <dhcp_option_trailer>

    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80234d0:	4b20      	ldr	r3, [pc, #128]	@ (8023554 <dhcp_renew+0x130>)
 80234d2:	6818      	ldr	r0, [r3, #0]
 80234d4:	69bb      	ldr	r3, [r7, #24]
 80234d6:	f103 0218 	add.w	r2, r3, #24
 80234da:	687b      	ldr	r3, [r7, #4]
 80234dc:	9300      	str	r3, [sp, #0]
 80234de:	2343      	movs	r3, #67	@ 0x43
 80234e0:	6979      	ldr	r1, [r7, #20]
 80234e2:	f7fe fe09 	bl	80220f8 <udp_sendto_if>
 80234e6:	4603      	mov	r3, r0
 80234e8:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80234ea:	6978      	ldr	r0, [r7, #20]
 80234ec:	f7f7 febe 	bl	801b26c <pbuf_free>
 80234f0:	e001      	b.n	80234f6 <dhcp_renew+0xd2>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80234f2:	23ff      	movs	r3, #255	@ 0xff
 80234f4:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80234f6:	69bb      	ldr	r3, [r7, #24]
 80234f8:	799b      	ldrb	r3, [r3, #6]
 80234fa:	2bff      	cmp	r3, #255	@ 0xff
 80234fc:	d005      	beq.n	802350a <dhcp_renew+0xe6>
    dhcp->tries++;
 80234fe:	69bb      	ldr	r3, [r7, #24]
 8023500:	799b      	ldrb	r3, [r3, #6]
 8023502:	3301      	adds	r3, #1
 8023504:	b2da      	uxtb	r2, r3
 8023506:	69bb      	ldr	r3, [r7, #24]
 8023508:	719a      	strb	r2, [r3, #6]
  }
  /* back-off on retries, but to a maximum of 20 seconds */
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
 802350a:	69bb      	ldr	r3, [r7, #24]
 802350c:	799b      	ldrb	r3, [r3, #6]
 802350e:	2b09      	cmp	r3, #9
 8023510:	d809      	bhi.n	8023526 <dhcp_renew+0x102>
 8023512:	69bb      	ldr	r3, [r7, #24]
 8023514:	799b      	ldrb	r3, [r3, #6]
 8023516:	461a      	mov	r2, r3
 8023518:	0152      	lsls	r2, r2, #5
 802351a:	1ad2      	subs	r2, r2, r3
 802351c:	0092      	lsls	r2, r2, #2
 802351e:	4413      	add	r3, r2
 8023520:	011b      	lsls	r3, r3, #4
 8023522:	b29b      	uxth	r3, r3
 8023524:	e001      	b.n	802352a <dhcp_renew+0x106>
 8023526:	f644 6320 	movw	r3, #20000	@ 0x4e20
 802352a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 802352c:	89fb      	ldrh	r3, [r7, #14]
 802352e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8023532:	4a09      	ldr	r2, [pc, #36]	@ (8023558 <dhcp_renew+0x134>)
 8023534:	fb82 1203 	smull	r1, r2, r2, r3
 8023538:	1152      	asrs	r2, r2, #5
 802353a:	17db      	asrs	r3, r3, #31
 802353c:	1ad3      	subs	r3, r2, r3
 802353e:	b29a      	uxth	r2, r3
 8023540:	69bb      	ldr	r3, [r7, #24]
 8023542:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023544:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023548:	4618      	mov	r0, r3
 802354a:	3720      	adds	r7, #32
 802354c:	46bd      	mov	sp, r7
 802354e:	bd80      	pop	{r7, pc}
 8023550:	24000058 	.word	0x24000058
 8023554:	2402aff4 	.word	0x2402aff4
 8023558:	10624dd3 	.word	0x10624dd3

0802355c <dhcp_rebind>:
 *
 * @param netif network interface which must rebind with a DHCP server
 */
static err_t
dhcp_rebind(struct netif *netif)
{
 802355c:	b580      	push	{r7, lr}
 802355e:	b08a      	sub	sp, #40	@ 0x28
 8023560:	af02      	add	r7, sp, #8
 8023562:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023564:	687b      	ldr	r3, [r7, #4]
 8023566:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023568:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
 802356a:	2104      	movs	r1, #4
 802356c:	69b8      	ldr	r0, [r7, #24]
 802356e:	f000 f9ea 	bl	8023946 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8023572:	f107 030c 	add.w	r3, r7, #12
 8023576:	2203      	movs	r2, #3
 8023578:	69b9      	ldr	r1, [r7, #24]
 802357a:	6878      	ldr	r0, [r7, #4]
 802357c:	f000 fe7c 	bl	8024278 <dhcp_create_msg>
 8023580:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8023582:	697b      	ldr	r3, [r7, #20]
 8023584:	2b00      	cmp	r3, #0
 8023586:	d04c      	beq.n	8023622 <dhcp_rebind+0xc6>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023588:	697b      	ldr	r3, [r7, #20]
 802358a:	685b      	ldr	r3, [r3, #4]
 802358c:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802358e:	89b8      	ldrh	r0, [r7, #12]
 8023590:	693b      	ldr	r3, [r7, #16]
 8023592:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023596:	2302      	movs	r3, #2
 8023598:	2239      	movs	r2, #57	@ 0x39
 802359a:	f000 f9ef 	bl	802397c <dhcp_option>
 802359e:	4603      	mov	r3, r0
 80235a0:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 80235a2:	89b8      	ldrh	r0, [r7, #12]
 80235a4:	693b      	ldr	r3, [r7, #16]
 80235a6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80235aa:	687b      	ldr	r3, [r7, #4]
 80235ac:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80235ae:	461a      	mov	r2, r3
 80235b0:	f000 fa3e 	bl	8023a30 <dhcp_option_short>
 80235b4:	4603      	mov	r3, r0
 80235b6:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 80235b8:	89b8      	ldrh	r0, [r7, #12]
 80235ba:	693b      	ldr	r3, [r7, #16]
 80235bc:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80235c0:	2303      	movs	r3, #3
 80235c2:	2237      	movs	r2, #55	@ 0x37
 80235c4:	f000 f9da 	bl	802397c <dhcp_option>
 80235c8:	4603      	mov	r3, r0
 80235ca:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80235cc:	2300      	movs	r3, #0
 80235ce:	77bb      	strb	r3, [r7, #30]
 80235d0:	e00e      	b.n	80235f0 <dhcp_rebind+0x94>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80235d2:	89b8      	ldrh	r0, [r7, #12]
 80235d4:	693b      	ldr	r3, [r7, #16]
 80235d6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80235da:	7fbb      	ldrb	r3, [r7, #30]
 80235dc:	4a28      	ldr	r2, [pc, #160]	@ (8023680 <dhcp_rebind+0x124>)
 80235de:	5cd3      	ldrb	r3, [r2, r3]
 80235e0:	461a      	mov	r2, r3
 80235e2:	f000 f9ff 	bl	80239e4 <dhcp_option_byte>
 80235e6:	4603      	mov	r3, r0
 80235e8:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80235ea:	7fbb      	ldrb	r3, [r7, #30]
 80235ec:	3301      	adds	r3, #1
 80235ee:	77bb      	strb	r3, [r7, #30]
 80235f0:	7fbb      	ldrb	r3, [r7, #30]
 80235f2:	2b02      	cmp	r3, #2
 80235f4:	d9ed      	bls.n	80235d2 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80235f6:	89b8      	ldrh	r0, [r7, #12]
 80235f8:	693b      	ldr	r3, [r7, #16]
 80235fa:	33f0      	adds	r3, #240	@ 0xf0
 80235fc:	697a      	ldr	r2, [r7, #20]
 80235fe:	4619      	mov	r1, r3
 8023600:	f000 ff10 	bl	8024424 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023604:	4b1f      	ldr	r3, [pc, #124]	@ (8023684 <dhcp_rebind+0x128>)
 8023606:	6818      	ldr	r0, [r3, #0]
 8023608:	687b      	ldr	r3, [r7, #4]
 802360a:	9300      	str	r3, [sp, #0]
 802360c:	2343      	movs	r3, #67	@ 0x43
 802360e:	4a1e      	ldr	r2, [pc, #120]	@ (8023688 <dhcp_rebind+0x12c>)
 8023610:	6979      	ldr	r1, [r7, #20]
 8023612:	f7fe fd71 	bl	80220f8 <udp_sendto_if>
 8023616:	4603      	mov	r3, r0
 8023618:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802361a:	6978      	ldr	r0, [r7, #20]
 802361c:	f7f7 fe26 	bl	801b26c <pbuf_free>
 8023620:	e001      	b.n	8023626 <dhcp_rebind+0xca>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8023622:	23ff      	movs	r3, #255	@ 0xff
 8023624:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8023626:	69bb      	ldr	r3, [r7, #24]
 8023628:	799b      	ldrb	r3, [r3, #6]
 802362a:	2bff      	cmp	r3, #255	@ 0xff
 802362c:	d005      	beq.n	802363a <dhcp_rebind+0xde>
    dhcp->tries++;
 802362e:	69bb      	ldr	r3, [r7, #24]
 8023630:	799b      	ldrb	r3, [r3, #6]
 8023632:	3301      	adds	r3, #1
 8023634:	b2da      	uxtb	r2, r3
 8023636:	69bb      	ldr	r3, [r7, #24]
 8023638:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 802363a:	69bb      	ldr	r3, [r7, #24]
 802363c:	799b      	ldrb	r3, [r3, #6]
 802363e:	2b09      	cmp	r3, #9
 8023640:	d809      	bhi.n	8023656 <dhcp_rebind+0xfa>
 8023642:	69bb      	ldr	r3, [r7, #24]
 8023644:	799b      	ldrb	r3, [r3, #6]
 8023646:	461a      	mov	r2, r3
 8023648:	0152      	lsls	r2, r2, #5
 802364a:	1ad2      	subs	r2, r2, r3
 802364c:	0092      	lsls	r2, r2, #2
 802364e:	4413      	add	r3, r2
 8023650:	00db      	lsls	r3, r3, #3
 8023652:	b29b      	uxth	r3, r3
 8023654:	e001      	b.n	802365a <dhcp_rebind+0xfe>
 8023656:	f242 7310 	movw	r3, #10000	@ 0x2710
 802365a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 802365c:	89fb      	ldrh	r3, [r7, #14]
 802365e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8023662:	4a0a      	ldr	r2, [pc, #40]	@ (802368c <dhcp_rebind+0x130>)
 8023664:	fb82 1203 	smull	r1, r2, r2, r3
 8023668:	1152      	asrs	r2, r2, #5
 802366a:	17db      	asrs	r3, r3, #31
 802366c:	1ad3      	subs	r3, r2, r3
 802366e:	b29a      	uxth	r2, r3
 8023670:	69bb      	ldr	r3, [r7, #24]
 8023672:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023674:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023678:	4618      	mov	r0, r3
 802367a:	3720      	adds	r7, #32
 802367c:	46bd      	mov	sp, r7
 802367e:	bd80      	pop	{r7, pc}
 8023680:	24000058 	.word	0x24000058
 8023684:	2402aff4 	.word	0x2402aff4
 8023688:	08031b5c 	.word	0x08031b5c
 802368c:	10624dd3 	.word	0x10624dd3

08023690 <dhcp_reboot>:
 *
 * @param netif network interface which must reboot
 */
static err_t
dhcp_reboot(struct netif *netif)
{
 8023690:	b5b0      	push	{r4, r5, r7, lr}
 8023692:	b08a      	sub	sp, #40	@ 0x28
 8023694:	af02      	add	r7, sp, #8
 8023696:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023698:	687b      	ldr	r3, [r7, #4]
 802369a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802369c:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
 802369e:	2103      	movs	r1, #3
 80236a0:	69b8      	ldr	r0, [r7, #24]
 80236a2:	f000 f950 	bl	8023946 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80236a6:	f107 030c 	add.w	r3, r7, #12
 80236aa:	2203      	movs	r2, #3
 80236ac:	69b9      	ldr	r1, [r7, #24]
 80236ae:	6878      	ldr	r0, [r7, #4]
 80236b0:	f000 fde2 	bl	8024278 <dhcp_create_msg>
 80236b4:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80236b6:	697b      	ldr	r3, [r7, #20]
 80236b8:	2b00      	cmp	r3, #0
 80236ba:	d066      	beq.n	802378a <dhcp_reboot+0xfa>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80236bc:	697b      	ldr	r3, [r7, #20]
 80236be:	685b      	ldr	r3, [r3, #4]
 80236c0:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 80236c2:	89b8      	ldrh	r0, [r7, #12]
 80236c4:	693b      	ldr	r3, [r7, #16]
 80236c6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80236ca:	2302      	movs	r3, #2
 80236cc:	2239      	movs	r2, #57	@ 0x39
 80236ce:	f000 f955 	bl	802397c <dhcp_option>
 80236d2:	4603      	mov	r3, r0
 80236d4:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
 80236d6:	89b8      	ldrh	r0, [r7, #12]
 80236d8:	693b      	ldr	r3, [r7, #16]
 80236da:	33f0      	adds	r3, #240	@ 0xf0
 80236dc:	f44f 7210 	mov.w	r2, #576	@ 0x240
 80236e0:	4619      	mov	r1, r3
 80236e2:	f000 f9a5 	bl	8023a30 <dhcp_option_short>
 80236e6:	4603      	mov	r3, r0
 80236e8:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 80236ea:	89b8      	ldrh	r0, [r7, #12]
 80236ec:	693b      	ldr	r3, [r7, #16]
 80236ee:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80236f2:	2304      	movs	r3, #4
 80236f4:	2232      	movs	r2, #50	@ 0x32
 80236f6:	f000 f941 	bl	802397c <dhcp_option>
 80236fa:	4603      	mov	r3, r0
 80236fc:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 80236fe:	89bc      	ldrh	r4, [r7, #12]
 8023700:	693b      	ldr	r3, [r7, #16]
 8023702:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8023706:	69bb      	ldr	r3, [r7, #24]
 8023708:	69db      	ldr	r3, [r3, #28]
 802370a:	4618      	mov	r0, r3
 802370c:	f7f6 f8e1 	bl	80198d2 <lwip_htonl>
 8023710:	4603      	mov	r3, r0
 8023712:	461a      	mov	r2, r3
 8023714:	4629      	mov	r1, r5
 8023716:	4620      	mov	r0, r4
 8023718:	f000 f9bc 	bl	8023a94 <dhcp_option_long>
 802371c:	4603      	mov	r3, r0
 802371e:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023720:	89b8      	ldrh	r0, [r7, #12]
 8023722:	693b      	ldr	r3, [r7, #16]
 8023724:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023728:	2303      	movs	r3, #3
 802372a:	2237      	movs	r2, #55	@ 0x37
 802372c:	f000 f926 	bl	802397c <dhcp_option>
 8023730:	4603      	mov	r3, r0
 8023732:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023734:	2300      	movs	r3, #0
 8023736:	77bb      	strb	r3, [r7, #30]
 8023738:	e00e      	b.n	8023758 <dhcp_reboot+0xc8>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802373a:	89b8      	ldrh	r0, [r7, #12]
 802373c:	693b      	ldr	r3, [r7, #16]
 802373e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023742:	7fbb      	ldrb	r3, [r7, #30]
 8023744:	4a28      	ldr	r2, [pc, #160]	@ (80237e8 <dhcp_reboot+0x158>)
 8023746:	5cd3      	ldrb	r3, [r2, r3]
 8023748:	461a      	mov	r2, r3
 802374a:	f000 f94b 	bl	80239e4 <dhcp_option_byte>
 802374e:	4603      	mov	r3, r0
 8023750:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023752:	7fbb      	ldrb	r3, [r7, #30]
 8023754:	3301      	adds	r3, #1
 8023756:	77bb      	strb	r3, [r7, #30]
 8023758:	7fbb      	ldrb	r3, [r7, #30]
 802375a:	2b02      	cmp	r3, #2
 802375c:	d9ed      	bls.n	802373a <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 802375e:	89b8      	ldrh	r0, [r7, #12]
 8023760:	693b      	ldr	r3, [r7, #16]
 8023762:	33f0      	adds	r3, #240	@ 0xf0
 8023764:	697a      	ldr	r2, [r7, #20]
 8023766:	4619      	mov	r1, r3
 8023768:	f000 fe5c 	bl	8024424 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 802376c:	4b1f      	ldr	r3, [pc, #124]	@ (80237ec <dhcp_reboot+0x15c>)
 802376e:	6818      	ldr	r0, [r3, #0]
 8023770:	687b      	ldr	r3, [r7, #4]
 8023772:	9300      	str	r3, [sp, #0]
 8023774:	2343      	movs	r3, #67	@ 0x43
 8023776:	4a1e      	ldr	r2, [pc, #120]	@ (80237f0 <dhcp_reboot+0x160>)
 8023778:	6979      	ldr	r1, [r7, #20]
 802377a:	f7fe fcbd 	bl	80220f8 <udp_sendto_if>
 802377e:	4603      	mov	r3, r0
 8023780:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8023782:	6978      	ldr	r0, [r7, #20]
 8023784:	f7f7 fd72 	bl	801b26c <pbuf_free>
 8023788:	e001      	b.n	802378e <dhcp_reboot+0xfe>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
    result = ERR_MEM;
 802378a:	23ff      	movs	r3, #255	@ 0xff
 802378c:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 802378e:	69bb      	ldr	r3, [r7, #24]
 8023790:	799b      	ldrb	r3, [r3, #6]
 8023792:	2bff      	cmp	r3, #255	@ 0xff
 8023794:	d005      	beq.n	80237a2 <dhcp_reboot+0x112>
    dhcp->tries++;
 8023796:	69bb      	ldr	r3, [r7, #24]
 8023798:	799b      	ldrb	r3, [r3, #6]
 802379a:	3301      	adds	r3, #1
 802379c:	b2da      	uxtb	r2, r3
 802379e:	69bb      	ldr	r3, [r7, #24]
 80237a0:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 80237a2:	69bb      	ldr	r3, [r7, #24]
 80237a4:	799b      	ldrb	r3, [r3, #6]
 80237a6:	2b09      	cmp	r3, #9
 80237a8:	d809      	bhi.n	80237be <dhcp_reboot+0x12e>
 80237aa:	69bb      	ldr	r3, [r7, #24]
 80237ac:	799b      	ldrb	r3, [r3, #6]
 80237ae:	461a      	mov	r2, r3
 80237b0:	0152      	lsls	r2, r2, #5
 80237b2:	1ad2      	subs	r2, r2, r3
 80237b4:	0092      	lsls	r2, r2, #2
 80237b6:	4413      	add	r3, r2
 80237b8:	00db      	lsls	r3, r3, #3
 80237ba:	b29b      	uxth	r3, r3
 80237bc:	e001      	b.n	80237c2 <dhcp_reboot+0x132>
 80237be:	f242 7310 	movw	r3, #10000	@ 0x2710
 80237c2:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80237c4:	89fb      	ldrh	r3, [r7, #14]
 80237c6:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80237ca:	4a0a      	ldr	r2, [pc, #40]	@ (80237f4 <dhcp_reboot+0x164>)
 80237cc:	fb82 1203 	smull	r1, r2, r2, r3
 80237d0:	1152      	asrs	r2, r2, #5
 80237d2:	17db      	asrs	r3, r3, #31
 80237d4:	1ad3      	subs	r3, r2, r3
 80237d6:	b29a      	uxth	r2, r3
 80237d8:	69bb      	ldr	r3, [r7, #24]
 80237da:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 80237dc:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 80237e0:	4618      	mov	r0, r3
 80237e2:	3720      	adds	r7, #32
 80237e4:	46bd      	mov	sp, r7
 80237e6:	bdb0      	pop	{r4, r5, r7, pc}
 80237e8:	24000058 	.word	0x24000058
 80237ec:	2402aff4 	.word	0x2402aff4
 80237f0:	08031b5c 	.word	0x08031b5c
 80237f4:	10624dd3 	.word	0x10624dd3

080237f8 <dhcp_release_and_stop>:
 *
 * @param netif network interface
 */
void
dhcp_release_and_stop(struct netif *netif)
{
 80237f8:	b5b0      	push	{r4, r5, r7, lr}
 80237fa:	b08a      	sub	sp, #40	@ 0x28
 80237fc:	af02      	add	r7, sp, #8
 80237fe:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023800:	687b      	ldr	r3, [r7, #4]
 8023802:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023804:	61fb      	str	r3, [r7, #28]
  ip_addr_t server_ip_addr;

  LWIP_ASSERT_CORE_LOCKED();
 8023806:	f7ed fb7b 	bl	8010f00 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
  if (dhcp == NULL) {
 802380a:	69fb      	ldr	r3, [r7, #28]
 802380c:	2b00      	cmp	r3, #0
 802380e:	f000 8084 	beq.w	802391a <dhcp_release_and_stop+0x122>
    return;
  }

  /* already off? -> nothing to do */
  if (dhcp->state == DHCP_STATE_OFF) {
 8023812:	69fb      	ldr	r3, [r7, #28]
 8023814:	795b      	ldrb	r3, [r3, #5]
 8023816:	2b00      	cmp	r3, #0
 8023818:	f000 8081 	beq.w	802391e <dhcp_release_and_stop+0x126>
    return;
  }

  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
 802381c:	69fb      	ldr	r3, [r7, #28]
 802381e:	699b      	ldr	r3, [r3, #24]
 8023820:	613b      	str	r3, [r7, #16]

  /* clean old DHCP offer */
  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
 8023822:	69fb      	ldr	r3, [r7, #28]
 8023824:	2200      	movs	r2, #0
 8023826:	619a      	str	r2, [r3, #24]
  ip4_addr_set_zero(&dhcp->offered_ip_addr);
 8023828:	69fb      	ldr	r3, [r7, #28]
 802382a:	2200      	movs	r2, #0
 802382c:	61da      	str	r2, [r3, #28]
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 802382e:	69fb      	ldr	r3, [r7, #28]
 8023830:	2200      	movs	r2, #0
 8023832:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8023834:	69fb      	ldr	r3, [r7, #28]
 8023836:	2200      	movs	r2, #0
 8023838:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
 802383a:	69fb      	ldr	r3, [r7, #28]
 802383c:	2200      	movs	r2, #0
 802383e:	631a      	str	r2, [r3, #48]	@ 0x30
 8023840:	69fb      	ldr	r3, [r7, #28]
 8023842:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 8023844:	69fb      	ldr	r3, [r7, #28]
 8023846:	62da      	str	r2, [r3, #44]	@ 0x2c
 8023848:	69fb      	ldr	r3, [r7, #28]
 802384a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 802384c:	69fb      	ldr	r3, [r7, #28]
 802384e:	629a      	str	r2, [r3, #40]	@ 0x28
  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
 8023850:	69fb      	ldr	r3, [r7, #28]
 8023852:	2200      	movs	r2, #0
 8023854:	829a      	strh	r2, [r3, #20]
 8023856:	69fb      	ldr	r3, [r7, #28]
 8023858:	8a9a      	ldrh	r2, [r3, #20]
 802385a:	69fb      	ldr	r3, [r7, #28]
 802385c:	825a      	strh	r2, [r3, #18]
 802385e:	69fb      	ldr	r3, [r7, #28]
 8023860:	8a5a      	ldrh	r2, [r3, #18]
 8023862:	69fb      	ldr	r3, [r7, #28]
 8023864:	821a      	strh	r2, [r3, #16]
 8023866:	69fb      	ldr	r3, [r7, #28]
 8023868:	8a1a      	ldrh	r2, [r3, #16]
 802386a:	69fb      	ldr	r3, [r7, #28]
 802386c:	81da      	strh	r2, [r3, #14]

  /* send release message when current IP was assigned via DHCP */
  if (dhcp_supplied_address(netif)) {
 802386e:	6878      	ldr	r0, [r7, #4]
 8023870:	f000 fe06 	bl	8024480 <dhcp_supplied_address>
 8023874:	4603      	mov	r3, r0
 8023876:	2b00      	cmp	r3, #0
 8023878:	d03b      	beq.n	80238f2 <dhcp_release_and_stop+0xfa>
    /* create and initialize the DHCP message header */
    struct pbuf *p_out;
    u16_t options_out_len;
    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
 802387a:	f107 030e 	add.w	r3, r7, #14
 802387e:	2207      	movs	r2, #7
 8023880:	69f9      	ldr	r1, [r7, #28]
 8023882:	6878      	ldr	r0, [r7, #4]
 8023884:	f000 fcf8 	bl	8024278 <dhcp_create_msg>
 8023888:	61b8      	str	r0, [r7, #24]
    if (p_out != NULL) {
 802388a:	69bb      	ldr	r3, [r7, #24]
 802388c:	2b00      	cmp	r3, #0
 802388e:	d030      	beq.n	80238f2 <dhcp_release_and_stop+0xfa>
      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023890:	69bb      	ldr	r3, [r7, #24]
 8023892:	685b      	ldr	r3, [r3, #4]
 8023894:	617b      	str	r3, [r7, #20]
      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8023896:	89f8      	ldrh	r0, [r7, #14]
 8023898:	697b      	ldr	r3, [r7, #20]
 802389a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802389e:	2304      	movs	r3, #4
 80238a0:	2236      	movs	r2, #54	@ 0x36
 80238a2:	f000 f86b 	bl	802397c <dhcp_option>
 80238a6:	4603      	mov	r3, r0
 80238a8:	81fb      	strh	r3, [r7, #14]
      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
 80238aa:	89fc      	ldrh	r4, [r7, #14]
 80238ac:	697b      	ldr	r3, [r7, #20]
 80238ae:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 80238b2:	693b      	ldr	r3, [r7, #16]
 80238b4:	4618      	mov	r0, r3
 80238b6:	f7f6 f80c 	bl	80198d2 <lwip_htonl>
 80238ba:	4603      	mov	r3, r0
 80238bc:	461a      	mov	r2, r3
 80238be:	4629      	mov	r1, r5
 80238c0:	4620      	mov	r0, r4
 80238c2:	f000 f8e7 	bl	8023a94 <dhcp_option_long>
 80238c6:	4603      	mov	r3, r0
 80238c8:	81fb      	strh	r3, [r7, #14]

      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80238ca:	89f8      	ldrh	r0, [r7, #14]
 80238cc:	697b      	ldr	r3, [r7, #20]
 80238ce:	33f0      	adds	r3, #240	@ 0xf0
 80238d0:	69ba      	ldr	r2, [r7, #24]
 80238d2:	4619      	mov	r1, r3
 80238d4:	f000 fda6 	bl	8024424 <dhcp_option_trailer>

      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80238d8:	4b13      	ldr	r3, [pc, #76]	@ (8023928 <dhcp_release_and_stop+0x130>)
 80238da:	6818      	ldr	r0, [r3, #0]
 80238dc:	f107 0210 	add.w	r2, r7, #16
 80238e0:	687b      	ldr	r3, [r7, #4]
 80238e2:	9300      	str	r3, [sp, #0]
 80238e4:	2343      	movs	r3, #67	@ 0x43
 80238e6:	69b9      	ldr	r1, [r7, #24]
 80238e8:	f7fe fc06 	bl	80220f8 <udp_sendto_if>
      pbuf_free(p_out);
 80238ec:	69b8      	ldr	r0, [r7, #24]
 80238ee:	f7f7 fcbd 	bl	801b26c <pbuf_free>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
    }
  }

  /* remove IP address from interface (prevents routing from selecting this interface) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 80238f2:	4b0e      	ldr	r3, [pc, #56]	@ (802392c <dhcp_release_and_stop+0x134>)
 80238f4:	4a0d      	ldr	r2, [pc, #52]	@ (802392c <dhcp_release_and_stop+0x134>)
 80238f6:	490d      	ldr	r1, [pc, #52]	@ (802392c <dhcp_release_and_stop+0x134>)
 80238f8:	6878      	ldr	r0, [r7, #4]
 80238fa:	f7f6 ff6d 	bl	801a7d8 <netif_set_addr>
    autoip_stop(netif);
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */

  dhcp_set_state(dhcp, DHCP_STATE_OFF);
 80238fe:	2100      	movs	r1, #0
 8023900:	69f8      	ldr	r0, [r7, #28]
 8023902:	f000 f820 	bl	8023946 <dhcp_set_state>

  if (dhcp->pcb_allocated != 0) {
 8023906:	69fb      	ldr	r3, [r7, #28]
 8023908:	791b      	ldrb	r3, [r3, #4]
 802390a:	2b00      	cmp	r3, #0
 802390c:	d008      	beq.n	8023920 <dhcp_release_and_stop+0x128>
    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 802390e:	f7fe ff83 	bl	8022818 <dhcp_dec_pcb_refcount>
    dhcp->pcb_allocated = 0;
 8023912:	69fb      	ldr	r3, [r7, #28]
 8023914:	2200      	movs	r2, #0
 8023916:	711a      	strb	r2, [r3, #4]
 8023918:	e002      	b.n	8023920 <dhcp_release_and_stop+0x128>
    return;
 802391a:	bf00      	nop
 802391c:	e000      	b.n	8023920 <dhcp_release_and_stop+0x128>
    return;
 802391e:	bf00      	nop
  }
}
 8023920:	3720      	adds	r7, #32
 8023922:	46bd      	mov	sp, r7
 8023924:	bdb0      	pop	{r4, r5, r7, pc}
 8023926:	bf00      	nop
 8023928:	2402aff4 	.word	0x2402aff4
 802392c:	08031b58 	.word	0x08031b58

08023930 <dhcp_stop>:
 * This function calls dhcp_release_and_stop() internally.
 * @deprecated Use dhcp_release_and_stop() instead.
 */
void
dhcp_stop(struct netif *netif)
{
 8023930:	b580      	push	{r7, lr}
 8023932:	b082      	sub	sp, #8
 8023934:	af00      	add	r7, sp, #0
 8023936:	6078      	str	r0, [r7, #4]
  dhcp_release_and_stop(netif);
 8023938:	6878      	ldr	r0, [r7, #4]
 802393a:	f7ff ff5d 	bl	80237f8 <dhcp_release_and_stop>
}
 802393e:	bf00      	nop
 8023940:	3708      	adds	r7, #8
 8023942:	46bd      	mov	sp, r7
 8023944:	bd80      	pop	{r7, pc}

08023946 <dhcp_set_state>:
 *
 * If the state changed, reset the number of tries.
 */
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
 8023946:	b480      	push	{r7}
 8023948:	b083      	sub	sp, #12
 802394a:	af00      	add	r7, sp, #0
 802394c:	6078      	str	r0, [r7, #4]
 802394e:	460b      	mov	r3, r1
 8023950:	70fb      	strb	r3, [r7, #3]
  if (new_state != dhcp->state) {
 8023952:	687b      	ldr	r3, [r7, #4]
 8023954:	795b      	ldrb	r3, [r3, #5]
 8023956:	78fa      	ldrb	r2, [r7, #3]
 8023958:	429a      	cmp	r2, r3
 802395a:	d008      	beq.n	802396e <dhcp_set_state+0x28>
    dhcp->state = new_state;
 802395c:	687b      	ldr	r3, [r7, #4]
 802395e:	78fa      	ldrb	r2, [r7, #3]
 8023960:	715a      	strb	r2, [r3, #5]
    dhcp->tries = 0;
 8023962:	687b      	ldr	r3, [r7, #4]
 8023964:	2200      	movs	r2, #0
 8023966:	719a      	strb	r2, [r3, #6]
    dhcp->request_timeout = 0;
 8023968:	687b      	ldr	r3, [r7, #4]
 802396a:	2200      	movs	r2, #0
 802396c:	811a      	strh	r2, [r3, #8]
  }
}
 802396e:	bf00      	nop
 8023970:	370c      	adds	r7, #12
 8023972:	46bd      	mov	sp, r7
 8023974:	f85d 7b04 	ldr.w	r7, [sp], #4
 8023978:	4770      	bx	lr
	...

0802397c <dhcp_option>:
 * DHCP message.
 *
 */
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
 802397c:	b580      	push	{r7, lr}
 802397e:	b082      	sub	sp, #8
 8023980:	af00      	add	r7, sp, #0
 8023982:	6039      	str	r1, [r7, #0]
 8023984:	4611      	mov	r1, r2
 8023986:	461a      	mov	r2, r3
 8023988:	4603      	mov	r3, r0
 802398a:	80fb      	strh	r3, [r7, #6]
 802398c:	460b      	mov	r3, r1
 802398e:	717b      	strb	r3, [r7, #5]
 8023990:	4613      	mov	r3, r2
 8023992:	713b      	strb	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
 8023994:	88fa      	ldrh	r2, [r7, #6]
 8023996:	793b      	ldrb	r3, [r7, #4]
 8023998:	4413      	add	r3, r2
 802399a:	3302      	adds	r3, #2
 802399c:	2b44      	cmp	r3, #68	@ 0x44
 802399e:	d906      	bls.n	80239ae <dhcp_option+0x32>
 80239a0:	4b0d      	ldr	r3, [pc, #52]	@ (80239d8 <dhcp_option+0x5c>)
 80239a2:	f240 529a 	movw	r2, #1434	@ 0x59a
 80239a6:	490d      	ldr	r1, [pc, #52]	@ (80239dc <dhcp_option+0x60>)
 80239a8:	480d      	ldr	r0, [pc, #52]	@ (80239e0 <dhcp_option+0x64>)
 80239aa:	f006 fed7 	bl	802a75c <iprintf>
  options[options_out_len++] = option_type;
 80239ae:	88fb      	ldrh	r3, [r7, #6]
 80239b0:	1c5a      	adds	r2, r3, #1
 80239b2:	80fa      	strh	r2, [r7, #6]
 80239b4:	461a      	mov	r2, r3
 80239b6:	683b      	ldr	r3, [r7, #0]
 80239b8:	4413      	add	r3, r2
 80239ba:	797a      	ldrb	r2, [r7, #5]
 80239bc:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = option_len;
 80239be:	88fb      	ldrh	r3, [r7, #6]
 80239c0:	1c5a      	adds	r2, r3, #1
 80239c2:	80fa      	strh	r2, [r7, #6]
 80239c4:	461a      	mov	r2, r3
 80239c6:	683b      	ldr	r3, [r7, #0]
 80239c8:	4413      	add	r3, r2
 80239ca:	793a      	ldrb	r2, [r7, #4]
 80239cc:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 80239ce:	88fb      	ldrh	r3, [r7, #6]
}
 80239d0:	4618      	mov	r0, r3
 80239d2:	3708      	adds	r7, #8
 80239d4:	46bd      	mov	sp, r7
 80239d6:	bd80      	pop	{r7, pc}
 80239d8:	08030d38 	.word	0x08030d38
 80239dc:	08030ecc 	.word	0x08030ecc
 80239e0:	08030d98 	.word	0x08030d98

080239e4 <dhcp_option_byte>:
 * Concatenate a single byte to the outgoing DHCP message.
 *
 */
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
 80239e4:	b580      	push	{r7, lr}
 80239e6:	b082      	sub	sp, #8
 80239e8:	af00      	add	r7, sp, #0
 80239ea:	4603      	mov	r3, r0
 80239ec:	6039      	str	r1, [r7, #0]
 80239ee:	80fb      	strh	r3, [r7, #6]
 80239f0:	4613      	mov	r3, r2
 80239f2:	717b      	strb	r3, [r7, #5]
  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
 80239f4:	88fb      	ldrh	r3, [r7, #6]
 80239f6:	2b43      	cmp	r3, #67	@ 0x43
 80239f8:	d906      	bls.n	8023a08 <dhcp_option_byte+0x24>
 80239fa:	4b0a      	ldr	r3, [pc, #40]	@ (8023a24 <dhcp_option_byte+0x40>)
 80239fc:	f240 52a6 	movw	r2, #1446	@ 0x5a6
 8023a00:	4909      	ldr	r1, [pc, #36]	@ (8023a28 <dhcp_option_byte+0x44>)
 8023a02:	480a      	ldr	r0, [pc, #40]	@ (8023a2c <dhcp_option_byte+0x48>)
 8023a04:	f006 feaa 	bl	802a75c <iprintf>
  options[options_out_len++] = value;
 8023a08:	88fb      	ldrh	r3, [r7, #6]
 8023a0a:	1c5a      	adds	r2, r3, #1
 8023a0c:	80fa      	strh	r2, [r7, #6]
 8023a0e:	461a      	mov	r2, r3
 8023a10:	683b      	ldr	r3, [r7, #0]
 8023a12:	4413      	add	r3, r2
 8023a14:	797a      	ldrb	r2, [r7, #5]
 8023a16:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023a18:	88fb      	ldrh	r3, [r7, #6]
}
 8023a1a:	4618      	mov	r0, r3
 8023a1c:	3708      	adds	r7, #8
 8023a1e:	46bd      	mov	sp, r7
 8023a20:	bd80      	pop	{r7, pc}
 8023a22:	bf00      	nop
 8023a24:	08030d38 	.word	0x08030d38
 8023a28:	08030f10 	.word	0x08030f10
 8023a2c:	08030d98 	.word	0x08030d98

08023a30 <dhcp_option_short>:

static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
 8023a30:	b580      	push	{r7, lr}
 8023a32:	b082      	sub	sp, #8
 8023a34:	af00      	add	r7, sp, #0
 8023a36:	4603      	mov	r3, r0
 8023a38:	6039      	str	r1, [r7, #0]
 8023a3a:	80fb      	strh	r3, [r7, #6]
 8023a3c:	4613      	mov	r3, r2
 8023a3e:	80bb      	strh	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
 8023a40:	88fb      	ldrh	r3, [r7, #6]
 8023a42:	3302      	adds	r3, #2
 8023a44:	2b44      	cmp	r3, #68	@ 0x44
 8023a46:	d906      	bls.n	8023a56 <dhcp_option_short+0x26>
 8023a48:	4b0f      	ldr	r3, [pc, #60]	@ (8023a88 <dhcp_option_short+0x58>)
 8023a4a:	f240 52ae 	movw	r2, #1454	@ 0x5ae
 8023a4e:	490f      	ldr	r1, [pc, #60]	@ (8023a8c <dhcp_option_short+0x5c>)
 8023a50:	480f      	ldr	r0, [pc, #60]	@ (8023a90 <dhcp_option_short+0x60>)
 8023a52:	f006 fe83 	bl	802a75c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
 8023a56:	88bb      	ldrh	r3, [r7, #4]
 8023a58:	0a1b      	lsrs	r3, r3, #8
 8023a5a:	b29a      	uxth	r2, r3
 8023a5c:	88fb      	ldrh	r3, [r7, #6]
 8023a5e:	1c59      	adds	r1, r3, #1
 8023a60:	80f9      	strh	r1, [r7, #6]
 8023a62:	4619      	mov	r1, r3
 8023a64:	683b      	ldr	r3, [r7, #0]
 8023a66:	440b      	add	r3, r1
 8023a68:	b2d2      	uxtb	r2, r2
 8023a6a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t) (value & 0x00ffU);
 8023a6c:	88fb      	ldrh	r3, [r7, #6]
 8023a6e:	1c5a      	adds	r2, r3, #1
 8023a70:	80fa      	strh	r2, [r7, #6]
 8023a72:	461a      	mov	r2, r3
 8023a74:	683b      	ldr	r3, [r7, #0]
 8023a76:	4413      	add	r3, r2
 8023a78:	88ba      	ldrh	r2, [r7, #4]
 8023a7a:	b2d2      	uxtb	r2, r2
 8023a7c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023a7e:	88fb      	ldrh	r3, [r7, #6]
}
 8023a80:	4618      	mov	r0, r3
 8023a82:	3708      	adds	r7, #8
 8023a84:	46bd      	mov	sp, r7
 8023a86:	bd80      	pop	{r7, pc}
 8023a88:	08030d38 	.word	0x08030d38
 8023a8c:	08030f48 	.word	0x08030f48
 8023a90:	08030d98 	.word	0x08030d98

08023a94 <dhcp_option_long>:

static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
 8023a94:	b580      	push	{r7, lr}
 8023a96:	b084      	sub	sp, #16
 8023a98:	af00      	add	r7, sp, #0
 8023a9a:	4603      	mov	r3, r0
 8023a9c:	60b9      	str	r1, [r7, #8]
 8023a9e:	607a      	str	r2, [r7, #4]
 8023aa0:	81fb      	strh	r3, [r7, #14]
  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
 8023aa2:	89fb      	ldrh	r3, [r7, #14]
 8023aa4:	3304      	adds	r3, #4
 8023aa6:	2b44      	cmp	r3, #68	@ 0x44
 8023aa8:	d906      	bls.n	8023ab8 <dhcp_option_long+0x24>
 8023aaa:	4b19      	ldr	r3, [pc, #100]	@ (8023b10 <dhcp_option_long+0x7c>)
 8023aac:	f240 52b7 	movw	r2, #1463	@ 0x5b7
 8023ab0:	4918      	ldr	r1, [pc, #96]	@ (8023b14 <dhcp_option_long+0x80>)
 8023ab2:	4819      	ldr	r0, [pc, #100]	@ (8023b18 <dhcp_option_long+0x84>)
 8023ab4:	f006 fe52 	bl	802a75c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
 8023ab8:	687b      	ldr	r3, [r7, #4]
 8023aba:	0e1a      	lsrs	r2, r3, #24
 8023abc:	89fb      	ldrh	r3, [r7, #14]
 8023abe:	1c59      	adds	r1, r3, #1
 8023ac0:	81f9      	strh	r1, [r7, #14]
 8023ac2:	4619      	mov	r1, r3
 8023ac4:	68bb      	ldr	r3, [r7, #8]
 8023ac6:	440b      	add	r3, r1
 8023ac8:	b2d2      	uxtb	r2, r2
 8023aca:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
 8023acc:	687b      	ldr	r3, [r7, #4]
 8023ace:	0c1a      	lsrs	r2, r3, #16
 8023ad0:	89fb      	ldrh	r3, [r7, #14]
 8023ad2:	1c59      	adds	r1, r3, #1
 8023ad4:	81f9      	strh	r1, [r7, #14]
 8023ad6:	4619      	mov	r1, r3
 8023ad8:	68bb      	ldr	r3, [r7, #8]
 8023ada:	440b      	add	r3, r1
 8023adc:	b2d2      	uxtb	r2, r2
 8023ade:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
 8023ae0:	687b      	ldr	r3, [r7, #4]
 8023ae2:	0a1a      	lsrs	r2, r3, #8
 8023ae4:	89fb      	ldrh	r3, [r7, #14]
 8023ae6:	1c59      	adds	r1, r3, #1
 8023ae8:	81f9      	strh	r1, [r7, #14]
 8023aea:	4619      	mov	r1, r3
 8023aec:	68bb      	ldr	r3, [r7, #8]
 8023aee:	440b      	add	r3, r1
 8023af0:	b2d2      	uxtb	r2, r2
 8023af2:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
 8023af4:	89fb      	ldrh	r3, [r7, #14]
 8023af6:	1c5a      	adds	r2, r3, #1
 8023af8:	81fa      	strh	r2, [r7, #14]
 8023afa:	461a      	mov	r2, r3
 8023afc:	68bb      	ldr	r3, [r7, #8]
 8023afe:	4413      	add	r3, r2
 8023b00:	687a      	ldr	r2, [r7, #4]
 8023b02:	b2d2      	uxtb	r2, r2
 8023b04:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023b06:	89fb      	ldrh	r3, [r7, #14]
}
 8023b08:	4618      	mov	r0, r3
 8023b0a:	3710      	adds	r7, #16
 8023b0c:	46bd      	mov	sp, r7
 8023b0e:	bd80      	pop	{r7, pc}
 8023b10:	08030d38 	.word	0x08030d38
 8023b14:	08030f84 	.word	0x08030f84
 8023b18:	08030d98 	.word	0x08030d98

08023b1c <dhcp_parse_reply>:
 * use that further on.
 *
 */
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
 8023b1c:	b580      	push	{r7, lr}
 8023b1e:	b092      	sub	sp, #72	@ 0x48
 8023b20:	af00      	add	r7, sp, #0
 8023b22:	6078      	str	r0, [r7, #4]
 8023b24:	6039      	str	r1, [r7, #0]
  u16_t offset;
  u16_t offset_max;
  u16_t options_idx;
  u16_t options_idx_max;
  struct pbuf *q;
  int parse_file_as_options = 0;
 8023b26:	2300      	movs	r3, #0
 8023b28:	633b      	str	r3, [r7, #48]	@ 0x30
  int parse_sname_as_options = 0;
 8023b2a:	2300      	movs	r3, #0
 8023b2c:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif

  LWIP_UNUSED_ARG(dhcp);

  /* clear received options */
  dhcp_clear_all_options(dhcp);
 8023b2e:	2208      	movs	r2, #8
 8023b30:	2100      	movs	r1, #0
 8023b32:	48b8      	ldr	r0, [pc, #736]	@ (8023e14 <dhcp_parse_reply+0x2f8>)
 8023b34:	f006 ffa4 	bl	802aa80 <memset>
  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
  if (p->len < DHCP_SNAME_OFS) {
 8023b38:	687b      	ldr	r3, [r7, #4]
 8023b3a:	895b      	ldrh	r3, [r3, #10]
 8023b3c:	2b2b      	cmp	r3, #43	@ 0x2b
 8023b3e:	d802      	bhi.n	8023b46 <dhcp_parse_reply+0x2a>
    return ERR_BUF;
 8023b40:	f06f 0301 	mvn.w	r3, #1
 8023b44:	e2b8      	b.n	80240b8 <dhcp_parse_reply+0x59c>
  }
  msg_in = (struct dhcp_msg *)p->payload;
 8023b46:	687b      	ldr	r3, [r7, #4]
 8023b48:	685b      	ldr	r3, [r3, #4]
 8023b4a:	61fb      	str	r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* parse options */

  /* start with options field */
  options_idx = DHCP_OPTIONS_OFS;
 8023b4c:	23f0      	movs	r3, #240	@ 0xf0
 8023b4e:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  /* parse options to the end of the received packet */
  options_idx_max = p->tot_len;
 8023b50:	687b      	ldr	r3, [r7, #4]
 8023b52:	891b      	ldrh	r3, [r3, #8]
 8023b54:	877b      	strh	r3, [r7, #58]	@ 0x3a
again:
  q = p;
 8023b56:	687b      	ldr	r3, [r7, #4]
 8023b58:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8023b5a:	e00c      	b.n	8023b76 <dhcp_parse_reply+0x5a>
    options_idx = (u16_t)(options_idx - q->len);
 8023b5c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b5e:	895b      	ldrh	r3, [r3, #10]
 8023b60:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8023b62:	1ad3      	subs	r3, r2, r3
 8023b64:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = (u16_t)(options_idx_max - q->len);
 8023b66:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b68:	895b      	ldrh	r3, [r3, #10]
 8023b6a:	8f7a      	ldrh	r2, [r7, #58]	@ 0x3a
 8023b6c:	1ad3      	subs	r3, r2, r3
 8023b6e:	877b      	strh	r3, [r7, #58]	@ 0x3a
    q = q->next;
 8023b70:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b72:	681b      	ldr	r3, [r3, #0]
 8023b74:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8023b76:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b78:	2b00      	cmp	r3, #0
 8023b7a:	d004      	beq.n	8023b86 <dhcp_parse_reply+0x6a>
 8023b7c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b7e:	895b      	ldrh	r3, [r3, #10]
 8023b80:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8023b82:	429a      	cmp	r2, r3
 8023b84:	d2ea      	bcs.n	8023b5c <dhcp_parse_reply+0x40>
  }
  if (q == NULL) {
 8023b86:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b88:	2b00      	cmp	r3, #0
 8023b8a:	d102      	bne.n	8023b92 <dhcp_parse_reply+0x76>
    return ERR_BUF;
 8023b8c:	f06f 0301 	mvn.w	r3, #1
 8023b90:	e292      	b.n	80240b8 <dhcp_parse_reply+0x59c>
  }
  offset = options_idx;
 8023b92:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8023b94:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  offset_max = options_idx_max;
 8023b98:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8023b9a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  options = (u8_t *)q->payload;
 8023b9c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023b9e:	685b      	ldr	r3, [r3, #4]
 8023ba0:	643b      	str	r3, [r7, #64]	@ 0x40
  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8023ba2:	e247      	b.n	8024034 <dhcp_parse_reply+0x518>
    u8_t op = options[offset];
 8023ba4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023ba8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8023baa:	4413      	add	r3, r2
 8023bac:	781b      	ldrb	r3, [r3, #0]
 8023bae:	76fb      	strb	r3, [r7, #27]
    u8_t len;
    u8_t decode_len = 0;
 8023bb0:	2300      	movs	r3, #0
 8023bb2:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    int decode_idx = -1;
 8023bb6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023bba:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t val_offset = (u16_t)(offset + 2);
 8023bbc:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023bc0:	3302      	adds	r3, #2
 8023bc2:	847b      	strh	r3, [r7, #34]	@ 0x22
    if (val_offset < offset) {
 8023bc4:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8023bc6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023bca:	429a      	cmp	r2, r3
 8023bcc:	d202      	bcs.n	8023bd4 <dhcp_parse_reply+0xb8>
      /* overflow */
      return ERR_BUF;
 8023bce:	f06f 0301 	mvn.w	r3, #1
 8023bd2:	e271      	b.n	80240b8 <dhcp_parse_reply+0x59c>
    }
    /* len byte might be in the next pbuf */
    if ((offset + 1) < q->len) {
 8023bd4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023bd8:	3301      	adds	r3, #1
 8023bda:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8023bdc:	8952      	ldrh	r2, [r2, #10]
 8023bde:	4293      	cmp	r3, r2
 8023be0:	da08      	bge.n	8023bf4 <dhcp_parse_reply+0xd8>
      len = options[offset + 1];
 8023be2:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023be6:	3301      	adds	r3, #1
 8023be8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8023bea:	4413      	add	r3, r2
 8023bec:	781b      	ldrb	r3, [r3, #0]
 8023bee:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8023bf2:	e00b      	b.n	8023c0c <dhcp_parse_reply+0xf0>
    } else {
      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
 8023bf4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023bf6:	681b      	ldr	r3, [r3, #0]
 8023bf8:	2b00      	cmp	r3, #0
 8023bfa:	d004      	beq.n	8023c06 <dhcp_parse_reply+0xea>
 8023bfc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023bfe:	681b      	ldr	r3, [r3, #0]
 8023c00:	685b      	ldr	r3, [r3, #4]
 8023c02:	781b      	ldrb	r3, [r3, #0]
 8023c04:	e000      	b.n	8023c08 <dhcp_parse_reply+0xec>
 8023c06:	2300      	movs	r3, #0
 8023c08:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    }
    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
    decode_len = len;
 8023c0c:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023c10:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    switch (op) {
 8023c14:	7efb      	ldrb	r3, [r7, #27]
 8023c16:	2b3b      	cmp	r3, #59	@ 0x3b
 8023c18:	f200 812c 	bhi.w	8023e74 <dhcp_parse_reply+0x358>
 8023c1c:	a201      	add	r2, pc, #4	@ (adr r2, 8023c24 <dhcp_parse_reply+0x108>)
 8023c1e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8023c22:	bf00      	nop
 8023c24:	08023d15 	.word	0x08023d15
 8023c28:	08023d25 	.word	0x08023d25
 8023c2c:	08023e75 	.word	0x08023e75
 8023c30:	08023d47 	.word	0x08023d47
 8023c34:	08023e75 	.word	0x08023e75
 8023c38:	08023e75 	.word	0x08023e75
 8023c3c:	08023e75 	.word	0x08023e75
 8023c40:	08023e75 	.word	0x08023e75
 8023c44:	08023e75 	.word	0x08023e75
 8023c48:	08023e75 	.word	0x08023e75
 8023c4c:	08023e75 	.word	0x08023e75
 8023c50:	08023e75 	.word	0x08023e75
 8023c54:	08023e75 	.word	0x08023e75
 8023c58:	08023e75 	.word	0x08023e75
 8023c5c:	08023e75 	.word	0x08023e75
 8023c60:	08023e75 	.word	0x08023e75
 8023c64:	08023e75 	.word	0x08023e75
 8023c68:	08023e75 	.word	0x08023e75
 8023c6c:	08023e75 	.word	0x08023e75
 8023c70:	08023e75 	.word	0x08023e75
 8023c74:	08023e75 	.word	0x08023e75
 8023c78:	08023e75 	.word	0x08023e75
 8023c7c:	08023e75 	.word	0x08023e75
 8023c80:	08023e75 	.word	0x08023e75
 8023c84:	08023e75 	.word	0x08023e75
 8023c88:	08023e75 	.word	0x08023e75
 8023c8c:	08023e75 	.word	0x08023e75
 8023c90:	08023e75 	.word	0x08023e75
 8023c94:	08023e75 	.word	0x08023e75
 8023c98:	08023e75 	.word	0x08023e75
 8023c9c:	08023e75 	.word	0x08023e75
 8023ca0:	08023e75 	.word	0x08023e75
 8023ca4:	08023e75 	.word	0x08023e75
 8023ca8:	08023e75 	.word	0x08023e75
 8023cac:	08023e75 	.word	0x08023e75
 8023cb0:	08023e75 	.word	0x08023e75
 8023cb4:	08023e75 	.word	0x08023e75
 8023cb8:	08023e75 	.word	0x08023e75
 8023cbc:	08023e75 	.word	0x08023e75
 8023cc0:	08023e75 	.word	0x08023e75
 8023cc4:	08023e75 	.word	0x08023e75
 8023cc8:	08023e75 	.word	0x08023e75
 8023ccc:	08023e75 	.word	0x08023e75
 8023cd0:	08023e75 	.word	0x08023e75
 8023cd4:	08023e75 	.word	0x08023e75
 8023cd8:	08023e75 	.word	0x08023e75
 8023cdc:	08023e75 	.word	0x08023e75
 8023ce0:	08023e75 	.word	0x08023e75
 8023ce4:	08023e75 	.word	0x08023e75
 8023ce8:	08023e75 	.word	0x08023e75
 8023cec:	08023e75 	.word	0x08023e75
 8023cf0:	08023d73 	.word	0x08023d73
 8023cf4:	08023d95 	.word	0x08023d95
 8023cf8:	08023dd1 	.word	0x08023dd1
 8023cfc:	08023df3 	.word	0x08023df3
 8023d00:	08023e75 	.word	0x08023e75
 8023d04:	08023e75 	.word	0x08023e75
 8023d08:	08023e75 	.word	0x08023e75
 8023d0c:	08023e31 	.word	0x08023e31
 8023d10:	08023e53 	.word	0x08023e53
      /* case(DHCP_OPTION_END): handled above */
      case (DHCP_OPTION_PAD):
        /* special option: no len encoded */
        decode_len = len = 0;
 8023d14:	2300      	movs	r3, #0
 8023d16:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8023d1a:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023d1e:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        /* will be increased below */
        break;
 8023d22:	e0ab      	b.n	8023e7c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SUBNET_MASK):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023d24:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023d28:	2b04      	cmp	r3, #4
 8023d2a:	d009      	beq.n	8023d40 <dhcp_parse_reply+0x224>
 8023d2c:	4b3a      	ldr	r3, [pc, #232]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023d2e:	f240 622e 	movw	r2, #1582	@ 0x62e
 8023d32:	493a      	ldr	r1, [pc, #232]	@ (8023e1c <dhcp_parse_reply+0x300>)
 8023d34:	483a      	ldr	r0, [pc, #232]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023d36:	f006 fd11 	bl	802a75c <iprintf>
 8023d3a:	f06f 0305 	mvn.w	r3, #5
 8023d3e:	e1bb      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
 8023d40:	2306      	movs	r3, #6
 8023d42:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023d44:	e09a      	b.n	8023e7c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_ROUTER):
        decode_len = 4; /* only copy the first given router */
 8023d46:	2304      	movs	r3, #4
 8023d48:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
 8023d4c:	f897 202b 	ldrb.w	r2, [r7, #43]	@ 0x2b
 8023d50:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023d54:	429a      	cmp	r2, r3
 8023d56:	d209      	bcs.n	8023d6c <dhcp_parse_reply+0x250>
 8023d58:	4b2f      	ldr	r3, [pc, #188]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023d5a:	f240 6233 	movw	r2, #1587	@ 0x633
 8023d5e:	4931      	ldr	r1, [pc, #196]	@ (8023e24 <dhcp_parse_reply+0x308>)
 8023d60:	482f      	ldr	r0, [pc, #188]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023d62:	f006 fcfb 	bl	802a75c <iprintf>
 8023d66:	f06f 0305 	mvn.w	r3, #5
 8023d6a:	e1a5      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_ROUTER;
 8023d6c:	2307      	movs	r3, #7
 8023d6e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023d70:	e084      	b.n	8023e7c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
        break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
      case (DHCP_OPTION_LEASE_TIME):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023d72:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023d76:	2b04      	cmp	r3, #4
 8023d78:	d009      	beq.n	8023d8e <dhcp_parse_reply+0x272>
 8023d7a:	4b27      	ldr	r3, [pc, #156]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023d7c:	f240 6241 	movw	r2, #1601	@ 0x641
 8023d80:	4926      	ldr	r1, [pc, #152]	@ (8023e1c <dhcp_parse_reply+0x300>)
 8023d82:	4827      	ldr	r0, [pc, #156]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023d84:	f006 fcea 	bl	802a75c <iprintf>
 8023d88:	f06f 0305 	mvn.w	r3, #5
 8023d8c:	e194      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
 8023d8e:	2303      	movs	r3, #3
 8023d90:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023d92:	e073      	b.n	8023e7c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
        break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
      case (DHCP_OPTION_OVERLOAD):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8023d94:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023d98:	2b01      	cmp	r3, #1
 8023d9a:	d009      	beq.n	8023db0 <dhcp_parse_reply+0x294>
 8023d9c:	4b1e      	ldr	r3, [pc, #120]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023d9e:	f240 624f 	movw	r2, #1615	@ 0x64f
 8023da2:	4921      	ldr	r1, [pc, #132]	@ (8023e28 <dhcp_parse_reply+0x30c>)
 8023da4:	481e      	ldr	r0, [pc, #120]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023da6:	f006 fcd9 	bl	802a75c <iprintf>
 8023daa:	f06f 0305 	mvn.w	r3, #5
 8023dae:	e183      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        /* decode overload only in options, not in file/sname: invalid packet */
        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
 8023db0:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8023db2:	2bf0      	cmp	r3, #240	@ 0xf0
 8023db4:	d009      	beq.n	8023dca <dhcp_parse_reply+0x2ae>
 8023db6:	4b18      	ldr	r3, [pc, #96]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023db8:	f240 6251 	movw	r2, #1617	@ 0x651
 8023dbc:	491b      	ldr	r1, [pc, #108]	@ (8023e2c <dhcp_parse_reply+0x310>)
 8023dbe:	4818      	ldr	r0, [pc, #96]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023dc0:	f006 fccc 	bl	802a75c <iprintf>
 8023dc4:	f06f 0305 	mvn.w	r3, #5
 8023dc8:	e176      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
 8023dca:	2300      	movs	r3, #0
 8023dcc:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023dce:	e055      	b.n	8023e7c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_MESSAGE_TYPE):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8023dd0:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023dd4:	2b01      	cmp	r3, #1
 8023dd6:	d009      	beq.n	8023dec <dhcp_parse_reply+0x2d0>
 8023dd8:	4b0f      	ldr	r3, [pc, #60]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023dda:	f240 6255 	movw	r2, #1621	@ 0x655
 8023dde:	4912      	ldr	r1, [pc, #72]	@ (8023e28 <dhcp_parse_reply+0x30c>)
 8023de0:	480f      	ldr	r0, [pc, #60]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023de2:	f006 fcbb 	bl	802a75c <iprintf>
 8023de6:	f06f 0305 	mvn.w	r3, #5
 8023dea:	e165      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
 8023dec:	2301      	movs	r3, #1
 8023dee:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023df0:	e044      	b.n	8023e7c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SERVER_ID):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023df2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023df6:	2b04      	cmp	r3, #4
 8023df8:	d009      	beq.n	8023e0e <dhcp_parse_reply+0x2f2>
 8023dfa:	4b07      	ldr	r3, [pc, #28]	@ (8023e18 <dhcp_parse_reply+0x2fc>)
 8023dfc:	f240 6259 	movw	r2, #1625	@ 0x659
 8023e00:	4906      	ldr	r1, [pc, #24]	@ (8023e1c <dhcp_parse_reply+0x300>)
 8023e02:	4807      	ldr	r0, [pc, #28]	@ (8023e20 <dhcp_parse_reply+0x304>)
 8023e04:	f006 fcaa 	bl	802a75c <iprintf>
 8023e08:	f06f 0305 	mvn.w	r3, #5
 8023e0c:	e154      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
 8023e0e:	2302      	movs	r3, #2
 8023e10:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023e12:	e033      	b.n	8023e7c <dhcp_parse_reply+0x360>
 8023e14:	2402afec 	.word	0x2402afec
 8023e18:	08030d38 	.word	0x08030d38
 8023e1c:	08030fc0 	.word	0x08030fc0
 8023e20:	08030d98 	.word	0x08030d98
 8023e24:	08030fcc 	.word	0x08030fcc
 8023e28:	08030fe0 	.word	0x08030fe0
 8023e2c:	08030fec 	.word	0x08030fec
      case (DHCP_OPTION_T1):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023e30:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023e34:	2b04      	cmp	r3, #4
 8023e36:	d009      	beq.n	8023e4c <dhcp_parse_reply+0x330>
 8023e38:	4ba1      	ldr	r3, [pc, #644]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8023e3a:	f240 625d 	movw	r2, #1629	@ 0x65d
 8023e3e:	49a1      	ldr	r1, [pc, #644]	@ (80240c4 <dhcp_parse_reply+0x5a8>)
 8023e40:	48a1      	ldr	r0, [pc, #644]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 8023e42:	f006 fc8b 	bl	802a75c <iprintf>
 8023e46:	f06f 0305 	mvn.w	r3, #5
 8023e4a:	e135      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T1;
 8023e4c:	2304      	movs	r3, #4
 8023e4e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023e50:	e014      	b.n	8023e7c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_T2):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8023e52:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023e56:	2b04      	cmp	r3, #4
 8023e58:	d009      	beq.n	8023e6e <dhcp_parse_reply+0x352>
 8023e5a:	4b99      	ldr	r3, [pc, #612]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8023e5c:	f240 6261 	movw	r2, #1633	@ 0x661
 8023e60:	4998      	ldr	r1, [pc, #608]	@ (80240c4 <dhcp_parse_reply+0x5a8>)
 8023e62:	4899      	ldr	r0, [pc, #612]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 8023e64:	f006 fc7a 	bl	802a75c <iprintf>
 8023e68:	f06f 0305 	mvn.w	r3, #5
 8023e6c:	e124      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T2;
 8023e6e:	2305      	movs	r3, #5
 8023e70:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8023e72:	e003      	b.n	8023e7c <dhcp_parse_reply+0x360>
      default:
        decode_len = 0;
 8023e74:	2300      	movs	r3, #0
 8023e76:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
                                    op, len, q, val_offset);
        break;
 8023e7a:	bf00      	nop
    }
    if (op == DHCP_OPTION_PAD) {
 8023e7c:	7efb      	ldrb	r3, [r7, #27]
 8023e7e:	2b00      	cmp	r3, #0
 8023e80:	d105      	bne.n	8023e8e <dhcp_parse_reply+0x372>
      offset++;
 8023e82:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023e86:	3301      	adds	r3, #1
 8023e88:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
 8023e8c:	e0a4      	b.n	8023fd8 <dhcp_parse_reply+0x4bc>
    } else {
      if (offset + len + 2 > 0xFFFF) {
 8023e8e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023e92:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023e96:	4413      	add	r3, r2
 8023e98:	f64f 72fd 	movw	r2, #65533	@ 0xfffd
 8023e9c:	4293      	cmp	r3, r2
 8023e9e:	dd02      	ble.n	8023ea6 <dhcp_parse_reply+0x38a>
        /* overflow */
        return ERR_BUF;
 8023ea0:	f06f 0301 	mvn.w	r3, #1
 8023ea4:	e108      	b.n	80240b8 <dhcp_parse_reply+0x59c>
      }
      offset = (u16_t)(offset + len + 2);
 8023ea6:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023eaa:	b29a      	uxth	r2, r3
 8023eac:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023eb0:	4413      	add	r3, r2
 8023eb2:	b29b      	uxth	r3, r3
 8023eb4:	3302      	adds	r3, #2
 8023eb6:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      if (decode_len > 0) {
 8023eba:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023ebe:	2b00      	cmp	r3, #0
 8023ec0:	f000 808a 	beq.w	8023fd8 <dhcp_parse_reply+0x4bc>
        u32_t value = 0;
 8023ec4:	2300      	movs	r3, #0
 8023ec6:	60fb      	str	r3, [r7, #12]
        u16_t copy_len;
decode_next:
        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
 8023ec8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023eca:	2b00      	cmp	r3, #0
 8023ecc:	db02      	blt.n	8023ed4 <dhcp_parse_reply+0x3b8>
 8023ece:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023ed0:	2b07      	cmp	r3, #7
 8023ed2:	dd06      	ble.n	8023ee2 <dhcp_parse_reply+0x3c6>
 8023ed4:	4b7a      	ldr	r3, [pc, #488]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8023ed6:	f44f 62cf 	mov.w	r2, #1656	@ 0x678
 8023eda:	497c      	ldr	r1, [pc, #496]	@ (80240cc <dhcp_parse_reply+0x5b0>)
 8023edc:	487a      	ldr	r0, [pc, #488]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 8023ede:	f006 fc3d 	bl	802a75c <iprintf>
        if (!dhcp_option_given(dhcp, decode_idx)) {
 8023ee2:	4a7b      	ldr	r2, [pc, #492]	@ (80240d0 <dhcp_parse_reply+0x5b4>)
 8023ee4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023ee6:	4413      	add	r3, r2
 8023ee8:	781b      	ldrb	r3, [r3, #0]
 8023eea:	2b00      	cmp	r3, #0
 8023eec:	d174      	bne.n	8023fd8 <dhcp_parse_reply+0x4bc>
          copy_len = LWIP_MIN(decode_len, 4);
 8023eee:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023ef2:	2b04      	cmp	r3, #4
 8023ef4:	bf28      	it	cs
 8023ef6:	2304      	movcs	r3, #4
 8023ef8:	b2db      	uxtb	r3, r3
 8023efa:	833b      	strh	r3, [r7, #24]
          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
 8023efc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8023efe:	8b3a      	ldrh	r2, [r7, #24]
 8023f00:	f107 010c 	add.w	r1, r7, #12
 8023f04:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8023f06:	f7f7 fbb7 	bl	801b678 <pbuf_copy_partial>
 8023f0a:	4603      	mov	r3, r0
 8023f0c:	461a      	mov	r2, r3
 8023f0e:	8b3b      	ldrh	r3, [r7, #24]
 8023f10:	4293      	cmp	r3, r2
 8023f12:	d002      	beq.n	8023f1a <dhcp_parse_reply+0x3fe>
            return ERR_BUF;
 8023f14:	f06f 0301 	mvn.w	r3, #1
 8023f18:	e0ce      	b.n	80240b8 <dhcp_parse_reply+0x59c>
          }
          if (decode_len > 4) {
 8023f1a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023f1e:	2b04      	cmp	r3, #4
 8023f20:	d933      	bls.n	8023f8a <dhcp_parse_reply+0x46e>
            /* decode more than one u32_t */
            u16_t next_val_offset;
            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
 8023f22:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023f26:	f003 0303 	and.w	r3, r3, #3
 8023f2a:	b2db      	uxtb	r3, r3
 8023f2c:	2b00      	cmp	r3, #0
 8023f2e:	d009      	beq.n	8023f44 <dhcp_parse_reply+0x428>
 8023f30:	4b63      	ldr	r3, [pc, #396]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8023f32:	f240 6281 	movw	r2, #1665	@ 0x681
 8023f36:	4967      	ldr	r1, [pc, #412]	@ (80240d4 <dhcp_parse_reply+0x5b8>)
 8023f38:	4863      	ldr	r0, [pc, #396]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 8023f3a:	f006 fc0f 	bl	802a75c <iprintf>
 8023f3e:	f06f 0305 	mvn.w	r3, #5
 8023f42:	e0b9      	b.n	80240b8 <dhcp_parse_reply+0x59c>
            dhcp_got_option(dhcp, decode_idx);
 8023f44:	4a62      	ldr	r2, [pc, #392]	@ (80240d0 <dhcp_parse_reply+0x5b4>)
 8023f46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023f48:	4413      	add	r3, r2
 8023f4a:	2201      	movs	r2, #1
 8023f4c:	701a      	strb	r2, [r3, #0]
            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
 8023f4e:	68fb      	ldr	r3, [r7, #12]
 8023f50:	4618      	mov	r0, r3
 8023f52:	f7f5 fcbe 	bl	80198d2 <lwip_htonl>
 8023f56:	4602      	mov	r2, r0
 8023f58:	495f      	ldr	r1, [pc, #380]	@ (80240d8 <dhcp_parse_reply+0x5bc>)
 8023f5a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023f5c:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
            decode_len = (u8_t)(decode_len - 4);
 8023f60:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023f64:	3b04      	subs	r3, #4
 8023f66:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
            next_val_offset = (u16_t)(val_offset + 4);
 8023f6a:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8023f6c:	3304      	adds	r3, #4
 8023f6e:	82fb      	strh	r3, [r7, #22]
            if (next_val_offset < val_offset) {
 8023f70:	8afa      	ldrh	r2, [r7, #22]
 8023f72:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8023f74:	429a      	cmp	r2, r3
 8023f76:	d202      	bcs.n	8023f7e <dhcp_parse_reply+0x462>
              /* overflow */
              return ERR_BUF;
 8023f78:	f06f 0301 	mvn.w	r3, #1
 8023f7c:	e09c      	b.n	80240b8 <dhcp_parse_reply+0x59c>
            }
            val_offset = next_val_offset;
 8023f7e:	8afb      	ldrh	r3, [r7, #22]
 8023f80:	847b      	strh	r3, [r7, #34]	@ 0x22
            decode_idx++;
 8023f82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023f84:	3301      	adds	r3, #1
 8023f86:	627b      	str	r3, [r7, #36]	@ 0x24
            goto decode_next;
 8023f88:	e79e      	b.n	8023ec8 <dhcp_parse_reply+0x3ac>
          } else if (decode_len == 4) {
 8023f8a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023f8e:	2b04      	cmp	r3, #4
 8023f90:	d106      	bne.n	8023fa0 <dhcp_parse_reply+0x484>
            value = lwip_ntohl(value);
 8023f92:	68fb      	ldr	r3, [r7, #12]
 8023f94:	4618      	mov	r0, r3
 8023f96:	f7f5 fc9c 	bl	80198d2 <lwip_htonl>
 8023f9a:	4603      	mov	r3, r0
 8023f9c:	60fb      	str	r3, [r7, #12]
 8023f9e:	e011      	b.n	8023fc4 <dhcp_parse_reply+0x4a8>
          } else {
            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
 8023fa0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8023fa4:	2b01      	cmp	r3, #1
 8023fa6:	d009      	beq.n	8023fbc <dhcp_parse_reply+0x4a0>
 8023fa8:	4b45      	ldr	r3, [pc, #276]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8023faa:	f44f 62d2 	mov.w	r2, #1680	@ 0x690
 8023fae:	494b      	ldr	r1, [pc, #300]	@ (80240dc <dhcp_parse_reply+0x5c0>)
 8023fb0:	4845      	ldr	r0, [pc, #276]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 8023fb2:	f006 fbd3 	bl	802a75c <iprintf>
 8023fb6:	f06f 0305 	mvn.w	r3, #5
 8023fba:	e07d      	b.n	80240b8 <dhcp_parse_reply+0x59c>
            value = ((u8_t *)&value)[0];
 8023fbc:	f107 030c 	add.w	r3, r7, #12
 8023fc0:	781b      	ldrb	r3, [r3, #0]
 8023fc2:	60fb      	str	r3, [r7, #12]
          }
          dhcp_got_option(dhcp, decode_idx);
 8023fc4:	4a42      	ldr	r2, [pc, #264]	@ (80240d0 <dhcp_parse_reply+0x5b4>)
 8023fc6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023fc8:	4413      	add	r3, r2
 8023fca:	2201      	movs	r2, #1
 8023fcc:	701a      	strb	r2, [r3, #0]
          dhcp_set_option_value(dhcp, decode_idx, value);
 8023fce:	68fa      	ldr	r2, [r7, #12]
 8023fd0:	4941      	ldr	r1, [pc, #260]	@ (80240d8 <dhcp_parse_reply+0x5bc>)
 8023fd2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8023fd4:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
        }
      }
    }
    if (offset >= q->len) {
 8023fd8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023fda:	895b      	ldrh	r3, [r3, #10]
 8023fdc:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023fe0:	429a      	cmp	r2, r3
 8023fe2:	d327      	bcc.n	8024034 <dhcp_parse_reply+0x518>
      offset = (u16_t)(offset - q->len);
 8023fe4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023fe6:	895b      	ldrh	r3, [r3, #10]
 8023fe8:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8023fec:	1ad3      	subs	r3, r2, r3
 8023fee:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      offset_max = (u16_t)(offset_max - q->len);
 8023ff2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023ff4:	895b      	ldrh	r3, [r3, #10]
 8023ff6:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8023ff8:	1ad3      	subs	r3, r2, r3
 8023ffa:	87fb      	strh	r3, [r7, #62]	@ 0x3e
      if (offset < offset_max) {
 8023ffc:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8024000:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8024002:	429a      	cmp	r2, r3
 8024004:	d213      	bcs.n	802402e <dhcp_parse_reply+0x512>
        q = q->next;
 8024006:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024008:	681b      	ldr	r3, [r3, #0]
 802400a:	637b      	str	r3, [r7, #52]	@ 0x34
        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
 802400c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802400e:	2b00      	cmp	r3, #0
 8024010:	d109      	bne.n	8024026 <dhcp_parse_reply+0x50a>
 8024012:	4b2b      	ldr	r3, [pc, #172]	@ (80240c0 <dhcp_parse_reply+0x5a4>)
 8024014:	f240 629d 	movw	r2, #1693	@ 0x69d
 8024018:	4931      	ldr	r1, [pc, #196]	@ (80240e0 <dhcp_parse_reply+0x5c4>)
 802401a:	482b      	ldr	r0, [pc, #172]	@ (80240c8 <dhcp_parse_reply+0x5ac>)
 802401c:	f006 fb9e 	bl	802a75c <iprintf>
 8024020:	f06f 0305 	mvn.w	r3, #5
 8024024:	e048      	b.n	80240b8 <dhcp_parse_reply+0x59c>
        options = (u8_t *)q->payload;
 8024026:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024028:	685b      	ldr	r3, [r3, #4]
 802402a:	643b      	str	r3, [r7, #64]	@ 0x40
 802402c:	e002      	b.n	8024034 <dhcp_parse_reply+0x518>
      } else {
        /* We've run out of bytes, probably no end marker. Don't proceed. */
        return ERR_BUF;
 802402e:	f06f 0301 	mvn.w	r3, #1
 8024032:	e041      	b.n	80240b8 <dhcp_parse_reply+0x59c>
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8024034:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024036:	2b00      	cmp	r3, #0
 8024038:	d00c      	beq.n	8024054 <dhcp_parse_reply+0x538>
 802403a:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 802403e:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8024040:	429a      	cmp	r2, r3
 8024042:	d207      	bcs.n	8024054 <dhcp_parse_reply+0x538>
 8024044:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8024048:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802404a:	4413      	add	r3, r2
 802404c:	781b      	ldrb	r3, [r3, #0]
 802404e:	2bff      	cmp	r3, #255	@ 0xff
 8024050:	f47f ada8 	bne.w	8023ba4 <dhcp_parse_reply+0x88>
      }
    }
  }
  /* is this an overloaded message? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
 8024054:	4b1e      	ldr	r3, [pc, #120]	@ (80240d0 <dhcp_parse_reply+0x5b4>)
 8024056:	781b      	ldrb	r3, [r3, #0]
 8024058:	2b00      	cmp	r3, #0
 802405a:	d018      	beq.n	802408e <dhcp_parse_reply+0x572>
    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 802405c:	4b1e      	ldr	r3, [pc, #120]	@ (80240d8 <dhcp_parse_reply+0x5bc>)
 802405e:	681b      	ldr	r3, [r3, #0]
 8024060:	613b      	str	r3, [r7, #16]
    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8024062:	4b1b      	ldr	r3, [pc, #108]	@ (80240d0 <dhcp_parse_reply+0x5b4>)
 8024064:	2200      	movs	r2, #0
 8024066:	701a      	strb	r2, [r3, #0]
    if (overload == DHCP_OVERLOAD_FILE) {
 8024068:	693b      	ldr	r3, [r7, #16]
 802406a:	2b01      	cmp	r3, #1
 802406c:	d102      	bne.n	8024074 <dhcp_parse_reply+0x558>
      parse_file_as_options = 1;
 802406e:	2301      	movs	r3, #1
 8024070:	633b      	str	r3, [r7, #48]	@ 0x30
 8024072:	e00c      	b.n	802408e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME) {
 8024074:	693b      	ldr	r3, [r7, #16]
 8024076:	2b02      	cmp	r3, #2
 8024078:	d102      	bne.n	8024080 <dhcp_parse_reply+0x564>
      parse_sname_as_options = 1;
 802407a:	2301      	movs	r3, #1
 802407c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 802407e:	e006      	b.n	802408e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
 8024080:	693b      	ldr	r3, [r7, #16]
 8024082:	2b03      	cmp	r3, #3
 8024084:	d103      	bne.n	802408e <dhcp_parse_reply+0x572>
      parse_sname_as_options = 1;
 8024086:	2301      	movs	r3, #1
 8024088:	62fb      	str	r3, [r7, #44]	@ 0x2c
      parse_file_as_options = 1;
 802408a:	2301      	movs	r3, #1
 802408c:	633b      	str	r3, [r7, #48]	@ 0x30
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
    } else {
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
    }
  }
  if (parse_file_as_options) {
 802408e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024090:	2b00      	cmp	r3, #0
 8024092:	d006      	beq.n	80240a2 <dhcp_parse_reply+0x586>
    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
    parse_file_as_options = 0;
 8024094:	2300      	movs	r3, #0
 8024096:	633b      	str	r3, [r7, #48]	@ 0x30
    options_idx = DHCP_FILE_OFS;
 8024098:	236c      	movs	r3, #108	@ 0x6c
 802409a:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
 802409c:	23ec      	movs	r3, #236	@ 0xec
 802409e:	877b      	strh	r3, [r7, #58]	@ 0x3a
#if LWIP_DHCP_BOOTP_FILE
    file_overloaded = 1;
#endif
    goto again;
 80240a0:	e559      	b.n	8023b56 <dhcp_parse_reply+0x3a>
  } else if (parse_sname_as_options) {
 80240a2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80240a4:	2b00      	cmp	r3, #0
 80240a6:	d006      	beq.n	80240b6 <dhcp_parse_reply+0x59a>
    parse_sname_as_options = 0;
 80240a8:	2300      	movs	r3, #0
 80240aa:	62fb      	str	r3, [r7, #44]	@ 0x2c
    options_idx = DHCP_SNAME_OFS;
 80240ac:	232c      	movs	r3, #44	@ 0x2c
 80240ae:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
 80240b0:	236c      	movs	r3, #108	@ 0x6c
 80240b2:	877b      	strh	r3, [r7, #58]	@ 0x3a
    goto again;
 80240b4:	e54f      	b.n	8023b56 <dhcp_parse_reply+0x3a>
    }
    /* make sure the string is really NULL-terminated */
    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
  }
#endif /* LWIP_DHCP_BOOTP_FILE */ 
  return ERR_OK;
 80240b6:	2300      	movs	r3, #0
}
 80240b8:	4618      	mov	r0, r3
 80240ba:	3748      	adds	r7, #72	@ 0x48
 80240bc:	46bd      	mov	sp, r7
 80240be:	bd80      	pop	{r7, pc}
 80240c0:	08030d38 	.word	0x08030d38
 80240c4:	08030fc0 	.word	0x08030fc0
 80240c8:	08030d98 	.word	0x08030d98
 80240cc:	08031004 	.word	0x08031004
 80240d0:	2402afec 	.word	0x2402afec
 80240d4:	08031018 	.word	0x08031018
 80240d8:	2402afcc 	.word	0x2402afcc
 80240dc:	08031030 	.word	0x08031030
 80240e0:	08031044 	.word	0x08031044

080240e4 <dhcp_recv>:
/**
 * If an incoming DHCP message is in response to us, then trigger the state machine
 */
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
 80240e4:	b580      	push	{r7, lr}
 80240e6:	b08a      	sub	sp, #40	@ 0x28
 80240e8:	af00      	add	r7, sp, #0
 80240ea:	60f8      	str	r0, [r7, #12]
 80240ec:	60b9      	str	r1, [r7, #8]
 80240ee:	607a      	str	r2, [r7, #4]
 80240f0:	603b      	str	r3, [r7, #0]
  struct netif *netif = ip_current_input_netif();
 80240f2:	4b5e      	ldr	r3, [pc, #376]	@ (802426c <dhcp_recv+0x188>)
 80240f4:	685b      	ldr	r3, [r3, #4]
 80240f6:	61fb      	str	r3, [r7, #28]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80240f8:	69fb      	ldr	r3, [r7, #28]
 80240fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80240fc:	61bb      	str	r3, [r7, #24]
  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
 80240fe:	687b      	ldr	r3, [r7, #4]
 8024100:	685b      	ldr	r3, [r3, #4]
 8024102:	617b      	str	r3, [r7, #20]
  struct dhcp_msg *msg_in;

  LWIP_UNUSED_ARG(arg);

  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
 8024104:	69bb      	ldr	r3, [r7, #24]
 8024106:	2b00      	cmp	r3, #0
 8024108:	f000 809a 	beq.w	8024240 <dhcp_recv+0x15c>
 802410c:	69bb      	ldr	r3, [r7, #24]
 802410e:	791b      	ldrb	r3, [r3, #4]
 8024110:	2b00      	cmp	r3, #0
 8024112:	f000 8095 	beq.w	8024240 <dhcp_recv+0x15c>
  /* prevent warnings about unused arguments */
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(addr);
  LWIP_UNUSED_ARG(port);

  if (p->len < DHCP_MIN_REPLY_LEN) {
 8024116:	687b      	ldr	r3, [r7, #4]
 8024118:	895b      	ldrh	r3, [r3, #10]
 802411a:	2b2b      	cmp	r3, #43	@ 0x2b
 802411c:	f240 8092 	bls.w	8024244 <dhcp_recv+0x160>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
    goto free_pbuf_and_return;
  }

  if (reply_msg->op != DHCP_BOOTREPLY) {
 8024120:	697b      	ldr	r3, [r7, #20]
 8024122:	781b      	ldrb	r3, [r3, #0]
 8024124:	2b02      	cmp	r3, #2
 8024126:	f040 808f 	bne.w	8024248 <dhcp_recv+0x164>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
    goto free_pbuf_and_return;
  }
  /* iterate through hardware address and match against DHCP message */
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 802412a:	2300      	movs	r3, #0
 802412c:	74fb      	strb	r3, [r7, #19]
 802412e:	e00e      	b.n	802414e <dhcp_recv+0x6a>
    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
 8024130:	7cfb      	ldrb	r3, [r7, #19]
 8024132:	69fa      	ldr	r2, [r7, #28]
 8024134:	4413      	add	r3, r2
 8024136:	f893 202a 	ldrb.w	r2, [r3, #42]	@ 0x2a
 802413a:	7cfb      	ldrb	r3, [r7, #19]
 802413c:	6979      	ldr	r1, [r7, #20]
 802413e:	440b      	add	r3, r1
 8024140:	7f1b      	ldrb	r3, [r3, #28]
 8024142:	429a      	cmp	r2, r3
 8024144:	f040 8082 	bne.w	802424c <dhcp_recv+0x168>
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8024148:	7cfb      	ldrb	r3, [r7, #19]
 802414a:	3301      	adds	r3, #1
 802414c:	74fb      	strb	r3, [r7, #19]
 802414e:	69fb      	ldr	r3, [r7, #28]
 8024150:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024154:	7cfa      	ldrb	r2, [r7, #19]
 8024156:	429a      	cmp	r2, r3
 8024158:	d202      	bcs.n	8024160 <dhcp_recv+0x7c>
 802415a:	7cfb      	ldrb	r3, [r7, #19]
 802415c:	2b05      	cmp	r3, #5
 802415e:	d9e7      	bls.n	8024130 <dhcp_recv+0x4c>
                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
      goto free_pbuf_and_return;
    }
  }
  /* match transaction ID against what we expected */
  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
 8024160:	697b      	ldr	r3, [r7, #20]
 8024162:	685b      	ldr	r3, [r3, #4]
 8024164:	4618      	mov	r0, r3
 8024166:	f7f5 fbb4 	bl	80198d2 <lwip_htonl>
 802416a:	4602      	mov	r2, r0
 802416c:	69bb      	ldr	r3, [r7, #24]
 802416e:	681b      	ldr	r3, [r3, #0]
 8024170:	429a      	cmp	r2, r3
 8024172:	d16d      	bne.n	8024250 <dhcp_recv+0x16c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
    goto free_pbuf_and_return;
  }
  /* option fields could be unfold? */
  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
 8024174:	69b9      	ldr	r1, [r7, #24]
 8024176:	6878      	ldr	r0, [r7, #4]
 8024178:	f7ff fcd0 	bl	8023b1c <dhcp_parse_reply>
 802417c:	4603      	mov	r3, r0
 802417e:	2b00      	cmp	r3, #0
 8024180:	d168      	bne.n	8024254 <dhcp_recv+0x170>
    goto free_pbuf_and_return;
  }

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
  /* obtain pointer to DHCP message type */
  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
 8024182:	4b3b      	ldr	r3, [pc, #236]	@ (8024270 <dhcp_recv+0x18c>)
 8024184:	785b      	ldrb	r3, [r3, #1]
 8024186:	2b00      	cmp	r3, #0
 8024188:	d066      	beq.n	8024258 <dhcp_recv+0x174>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
    goto free_pbuf_and_return;
  }

  msg_in = (struct dhcp_msg *)p->payload;
 802418a:	687b      	ldr	r3, [r7, #4]
 802418c:	685b      	ldr	r3, [r3, #4]
 802418e:	627b      	str	r3, [r7, #36]	@ 0x24
  /* read DHCP message type */
  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
 8024190:	4b38      	ldr	r3, [pc, #224]	@ (8024274 <dhcp_recv+0x190>)
 8024192:	685b      	ldr	r3, [r3, #4]
 8024194:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* message type is DHCP ACK? */
  if (msg_type == DHCP_ACK) {
 8024198:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802419c:	2b05      	cmp	r3, #5
 802419e:	d12a      	bne.n	80241f6 <dhcp_recv+0x112>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
    /* in requesting state? */
    if (dhcp->state == DHCP_STATE_REQUESTING) {
 80241a0:	69bb      	ldr	r3, [r7, #24]
 80241a2:	795b      	ldrb	r3, [r3, #5]
 80241a4:	2b01      	cmp	r3, #1
 80241a6:	d112      	bne.n	80241ce <dhcp_recv+0xea>
      dhcp_handle_ack(netif, msg_in);
 80241a8:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80241aa:	69f8      	ldr	r0, [r7, #28]
 80241ac:	f7fe fe00 	bl	8022db0 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
 80241b0:	69fb      	ldr	r3, [r7, #28]
 80241b2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80241b6:	f003 0308 	and.w	r3, r3, #8
 80241ba:	2b00      	cmp	r3, #0
 80241bc:	d003      	beq.n	80241c6 <dhcp_recv+0xe2>
        /* check if the acknowledged lease address is already in use */
        dhcp_check(netif);
 80241be:	69f8      	ldr	r0, [r7, #28]
 80241c0:	f7fe fb6e 	bl	80228a0 <dhcp_check>
 80241c4:	e04b      	b.n	802425e <dhcp_recv+0x17a>
      } else {
        /* bind interface to the acknowledged lease address */
        dhcp_bind(netif);
 80241c6:	69f8      	ldr	r0, [r7, #28]
 80241c8:	f7ff f852 	bl	8023270 <dhcp_bind>
 80241cc:	e047      	b.n	802425e <dhcp_recv+0x17a>
      /* bind interface to the acknowledged lease address */
      dhcp_bind(netif);
#endif
    }
    /* already bound to the given lease address? */
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 80241ce:	69bb      	ldr	r3, [r7, #24]
 80241d0:	795b      	ldrb	r3, [r3, #5]
 80241d2:	2b03      	cmp	r3, #3
 80241d4:	d007      	beq.n	80241e6 <dhcp_recv+0x102>
 80241d6:	69bb      	ldr	r3, [r7, #24]
 80241d8:	795b      	ldrb	r3, [r3, #5]
 80241da:	2b04      	cmp	r3, #4
 80241dc:	d003      	beq.n	80241e6 <dhcp_recv+0x102>
             (dhcp->state == DHCP_STATE_RENEWING)) {
 80241de:	69bb      	ldr	r3, [r7, #24]
 80241e0:	795b      	ldrb	r3, [r3, #5]
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 80241e2:	2b05      	cmp	r3, #5
 80241e4:	d13b      	bne.n	802425e <dhcp_recv+0x17a>
      dhcp_handle_ack(netif, msg_in);
 80241e6:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80241e8:	69f8      	ldr	r0, [r7, #28]
 80241ea:	f7fe fde1 	bl	8022db0 <dhcp_handle_ack>
      dhcp_bind(netif);
 80241ee:	69f8      	ldr	r0, [r7, #28]
 80241f0:	f7ff f83e 	bl	8023270 <dhcp_bind>
 80241f4:	e033      	b.n	802425e <dhcp_recv+0x17a>
    }
  }
  /* received a DHCP_NAK in appropriate state? */
  else if ((msg_type == DHCP_NAK) &&
 80241f6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80241fa:	2b06      	cmp	r3, #6
 80241fc:	d113      	bne.n	8024226 <dhcp_recv+0x142>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 80241fe:	69bb      	ldr	r3, [r7, #24]
 8024200:	795b      	ldrb	r3, [r3, #5]
  else if ((msg_type == DHCP_NAK) &&
 8024202:	2b03      	cmp	r3, #3
 8024204:	d00b      	beq.n	802421e <dhcp_recv+0x13a>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8024206:	69bb      	ldr	r3, [r7, #24]
 8024208:	795b      	ldrb	r3, [r3, #5]
 802420a:	2b01      	cmp	r3, #1
 802420c:	d007      	beq.n	802421e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 802420e:	69bb      	ldr	r3, [r7, #24]
 8024210:	795b      	ldrb	r3, [r3, #5]
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8024212:	2b04      	cmp	r3, #4
 8024214:	d003      	beq.n	802421e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8024216:	69bb      	ldr	r3, [r7, #24]
 8024218:	795b      	ldrb	r3, [r3, #5]
 802421a:	2b05      	cmp	r3, #5
 802421c:	d103      	bne.n	8024226 <dhcp_recv+0x142>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
    dhcp_handle_nak(netif);
 802421e:	69f8      	ldr	r0, [r7, #28]
 8024220:	f7fe fb24 	bl	802286c <dhcp_handle_nak>
 8024224:	e01b      	b.n	802425e <dhcp_recv+0x17a>
  }
  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
 8024226:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802422a:	2b02      	cmp	r3, #2
 802422c:	d116      	bne.n	802425c <dhcp_recv+0x178>
 802422e:	69bb      	ldr	r3, [r7, #24]
 8024230:	795b      	ldrb	r3, [r3, #5]
 8024232:	2b06      	cmp	r3, #6
 8024234:	d112      	bne.n	802425c <dhcp_recv+0x178>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
    /* remember offered lease */
    dhcp_handle_offer(netif, msg_in);
 8024236:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8024238:	69f8      	ldr	r0, [r7, #28]
 802423a:	f7fe fb65 	bl	8022908 <dhcp_handle_offer>
 802423e:	e00e      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024240:	bf00      	nop
 8024242:	e00c      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024244:	bf00      	nop
 8024246:	e00a      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024248:	bf00      	nop
 802424a:	e008      	b.n	802425e <dhcp_recv+0x17a>
      goto free_pbuf_and_return;
 802424c:	bf00      	nop
 802424e:	e006      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024250:	bf00      	nop
 8024252:	e004      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024254:	bf00      	nop
 8024256:	e002      	b.n	802425e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024258:	bf00      	nop
 802425a:	e000      	b.n	802425e <dhcp_recv+0x17a>
  }

free_pbuf_and_return:
 802425c:	bf00      	nop
  pbuf_free(p);
 802425e:	6878      	ldr	r0, [r7, #4]
 8024260:	f7f7 f804 	bl	801b26c <pbuf_free>
}
 8024264:	bf00      	nop
 8024266:	3728      	adds	r7, #40	@ 0x28
 8024268:	46bd      	mov	sp, r7
 802426a:	bd80      	pop	{r7, pc}
 802426c:	24024418 	.word	0x24024418
 8024270:	2402afec 	.word	0x2402afec
 8024274:	2402afcc 	.word	0x2402afcc

08024278 <dhcp_create_msg>:
 * @param dhcp dhcp control struct
 * @param message_type message type of the request
 */
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
 8024278:	b580      	push	{r7, lr}
 802427a:	b088      	sub	sp, #32
 802427c:	af00      	add	r7, sp, #0
 802427e:	60f8      	str	r0, [r7, #12]
 8024280:	60b9      	str	r1, [r7, #8]
 8024282:	603b      	str	r3, [r7, #0]
 8024284:	4613      	mov	r3, r2
 8024286:	71fb      	strb	r3, [r7, #7]
  if (!xid_initialised) {
    xid = DHCP_GLOBAL_XID;
    xid_initialised = !xid_initialised;
  }
#endif
  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
 8024288:	68fb      	ldr	r3, [r7, #12]
 802428a:	2b00      	cmp	r3, #0
 802428c:	d108      	bne.n	80242a0 <dhcp_create_msg+0x28>
 802428e:	4b5f      	ldr	r3, [pc, #380]	@ (802440c <dhcp_create_msg+0x194>)
 8024290:	f240 7269 	movw	r2, #1897	@ 0x769
 8024294:	495e      	ldr	r1, [pc, #376]	@ (8024410 <dhcp_create_msg+0x198>)
 8024296:	485f      	ldr	r0, [pc, #380]	@ (8024414 <dhcp_create_msg+0x19c>)
 8024298:	f006 fa60 	bl	802a75c <iprintf>
 802429c:	2300      	movs	r3, #0
 802429e:	e0b1      	b.n	8024404 <dhcp_create_msg+0x18c>
  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
 80242a0:	68bb      	ldr	r3, [r7, #8]
 80242a2:	2b00      	cmp	r3, #0
 80242a4:	d108      	bne.n	80242b8 <dhcp_create_msg+0x40>
 80242a6:	4b59      	ldr	r3, [pc, #356]	@ (802440c <dhcp_create_msg+0x194>)
 80242a8:	f240 726a 	movw	r2, #1898	@ 0x76a
 80242ac:	495a      	ldr	r1, [pc, #360]	@ (8024418 <dhcp_create_msg+0x1a0>)
 80242ae:	4859      	ldr	r0, [pc, #356]	@ (8024414 <dhcp_create_msg+0x19c>)
 80242b0:	f006 fa54 	bl	802a75c <iprintf>
 80242b4:	2300      	movs	r3, #0
 80242b6:	e0a5      	b.n	8024404 <dhcp_create_msg+0x18c>
  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
 80242b8:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80242bc:	f44f 719a 	mov.w	r1, #308	@ 0x134
 80242c0:	2036      	movs	r0, #54	@ 0x36
 80242c2:	f7f6 fcbd 	bl	801ac40 <pbuf_alloc>
 80242c6:	61b8      	str	r0, [r7, #24]
  if (p_out == NULL) {
 80242c8:	69bb      	ldr	r3, [r7, #24]
 80242ca:	2b00      	cmp	r3, #0
 80242cc:	d101      	bne.n	80242d2 <dhcp_create_msg+0x5a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_create_msg(): could not allocate pbuf\n"));
    return NULL;
 80242ce:	2300      	movs	r3, #0
 80242d0:	e098      	b.n	8024404 <dhcp_create_msg+0x18c>
  }
  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
 80242d2:	69bb      	ldr	r3, [r7, #24]
 80242d4:	895b      	ldrh	r3, [r3, #10]
 80242d6:	f5b3 7f9a 	cmp.w	r3, #308	@ 0x134
 80242da:	d206      	bcs.n	80242ea <dhcp_create_msg+0x72>
 80242dc:	4b4b      	ldr	r3, [pc, #300]	@ (802440c <dhcp_create_msg+0x194>)
 80242de:	f240 7271 	movw	r2, #1905	@ 0x771
 80242e2:	494e      	ldr	r1, [pc, #312]	@ (802441c <dhcp_create_msg+0x1a4>)
 80242e4:	484b      	ldr	r0, [pc, #300]	@ (8024414 <dhcp_create_msg+0x19c>)
 80242e6:	f006 fa39 	bl	802a75c <iprintf>
              (p_out->len >= sizeof(struct dhcp_msg)));

  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
 80242ea:	79fb      	ldrb	r3, [r7, #7]
 80242ec:	2b03      	cmp	r3, #3
 80242ee:	d103      	bne.n	80242f8 <dhcp_create_msg+0x80>
 80242f0:	68bb      	ldr	r3, [r7, #8]
 80242f2:	795b      	ldrb	r3, [r3, #5]
 80242f4:	2b03      	cmp	r3, #3
 80242f6:	d10d      	bne.n	8024314 <dhcp_create_msg+0x9c>
    /* reuse transaction identifier in retransmissions */
    if (dhcp->tries == 0) {
 80242f8:	68bb      	ldr	r3, [r7, #8]
 80242fa:	799b      	ldrb	r3, [r3, #6]
 80242fc:	2b00      	cmp	r3, #0
 80242fe:	d105      	bne.n	802430c <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
      xid = LWIP_RAND();
 8024300:	f004 ff02 	bl	8029108 <rand>
 8024304:	4603      	mov	r3, r0
 8024306:	461a      	mov	r2, r3
 8024308:	4b45      	ldr	r3, [pc, #276]	@ (8024420 <dhcp_create_msg+0x1a8>)
 802430a:	601a      	str	r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
      xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
    }
    dhcp->xid = xid;
 802430c:	4b44      	ldr	r3, [pc, #272]	@ (8024420 <dhcp_create_msg+0x1a8>)
 802430e:	681a      	ldr	r2, [r3, #0]
 8024310:	68bb      	ldr	r3, [r7, #8]
 8024312:	601a      	str	r2, [r3, #0]
  }
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
              ("transaction id xid(%"X32_F")\n", xid));

  msg_out = (struct dhcp_msg *)p_out->payload;
 8024314:	69bb      	ldr	r3, [r7, #24]
 8024316:	685b      	ldr	r3, [r3, #4]
 8024318:	617b      	str	r3, [r7, #20]
  memset(msg_out, 0, sizeof(struct dhcp_msg));
 802431a:	f44f 729a 	mov.w	r2, #308	@ 0x134
 802431e:	2100      	movs	r1, #0
 8024320:	6978      	ldr	r0, [r7, #20]
 8024322:	f006 fbad 	bl	802aa80 <memset>

  msg_out->op = DHCP_BOOTREQUEST;
 8024326:	697b      	ldr	r3, [r7, #20]
 8024328:	2201      	movs	r2, #1
 802432a:	701a      	strb	r2, [r3, #0]
  /* @todo: make link layer independent */
  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
 802432c:	697b      	ldr	r3, [r7, #20]
 802432e:	2201      	movs	r2, #1
 8024330:	705a      	strb	r2, [r3, #1]
  msg_out->hlen = netif->hwaddr_len;
 8024332:	68fb      	ldr	r3, [r7, #12]
 8024334:	f893 2030 	ldrb.w	r2, [r3, #48]	@ 0x30
 8024338:	697b      	ldr	r3, [r7, #20]
 802433a:	709a      	strb	r2, [r3, #2]
  msg_out->xid = lwip_htonl(dhcp->xid);
 802433c:	68bb      	ldr	r3, [r7, #8]
 802433e:	681b      	ldr	r3, [r3, #0]
 8024340:	4618      	mov	r0, r3
 8024342:	f7f5 fac6 	bl	80198d2 <lwip_htonl>
 8024346:	4602      	mov	r2, r0
 8024348:	697b      	ldr	r3, [r7, #20]
 802434a:	605a      	str	r2, [r3, #4]
  /* we don't need the broadcast flag since we can receive unicast traffic
     before being fully configured! */
  /* set ciaddr to netif->ip_addr based on message_type and state */
  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
 802434c:	79fb      	ldrb	r3, [r7, #7]
 802434e:	2b08      	cmp	r3, #8
 8024350:	d010      	beq.n	8024374 <dhcp_create_msg+0xfc>
 8024352:	79fb      	ldrb	r3, [r7, #7]
 8024354:	2b04      	cmp	r3, #4
 8024356:	d00d      	beq.n	8024374 <dhcp_create_msg+0xfc>
 8024358:	79fb      	ldrb	r3, [r7, #7]
 802435a:	2b07      	cmp	r3, #7
 802435c:	d00a      	beq.n	8024374 <dhcp_create_msg+0xfc>
 802435e:	79fb      	ldrb	r3, [r7, #7]
 8024360:	2b03      	cmp	r3, #3
 8024362:	d10c      	bne.n	802437e <dhcp_create_msg+0x106>
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 8024364:	68bb      	ldr	r3, [r7, #8]
 8024366:	795b      	ldrb	r3, [r3, #5]
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
 8024368:	2b05      	cmp	r3, #5
 802436a:	d003      	beq.n	8024374 <dhcp_create_msg+0xfc>
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 802436c:	68bb      	ldr	r3, [r7, #8]
 802436e:	795b      	ldrb	r3, [r3, #5]
 8024370:	2b04      	cmp	r3, #4
 8024372:	d104      	bne.n	802437e <dhcp_create_msg+0x106>
    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
 8024374:	68fb      	ldr	r3, [r7, #12]
 8024376:	3304      	adds	r3, #4
 8024378:	681a      	ldr	r2, [r3, #0]
 802437a:	697b      	ldr	r3, [r7, #20]
 802437c:	60da      	str	r2, [r3, #12]
  }
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 802437e:	2300      	movs	r3, #0
 8024380:	83fb      	strh	r3, [r7, #30]
 8024382:	e00c      	b.n	802439e <dhcp_create_msg+0x126>
    /* copy netif hardware address (padded with zeroes through memset already) */
    msg_out->chaddr[i] = netif->hwaddr[i];
 8024384:	8bfa      	ldrh	r2, [r7, #30]
 8024386:	8bfb      	ldrh	r3, [r7, #30]
 8024388:	68f9      	ldr	r1, [r7, #12]
 802438a:	440a      	add	r2, r1
 802438c:	f892 102a 	ldrb.w	r1, [r2, #42]	@ 0x2a
 8024390:	697a      	ldr	r2, [r7, #20]
 8024392:	4413      	add	r3, r2
 8024394:	460a      	mov	r2, r1
 8024396:	771a      	strb	r2, [r3, #28]
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8024398:	8bfb      	ldrh	r3, [r7, #30]
 802439a:	3301      	adds	r3, #1
 802439c:	83fb      	strh	r3, [r7, #30]
 802439e:	8bfb      	ldrh	r3, [r7, #30]
 80243a0:	2b05      	cmp	r3, #5
 80243a2:	d9ef      	bls.n	8024384 <dhcp_create_msg+0x10c>
  }
  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
 80243a4:	697b      	ldr	r3, [r7, #20]
 80243a6:	2200      	movs	r2, #0
 80243a8:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 80243ac:	f883 20ec 	strb.w	r2, [r3, #236]	@ 0xec
 80243b0:	2200      	movs	r2, #0
 80243b2:	f062 027d 	orn	r2, r2, #125	@ 0x7d
 80243b6:	f883 20ed 	strb.w	r2, [r3, #237]	@ 0xed
 80243ba:	2200      	movs	r2, #0
 80243bc:	f042 0253 	orr.w	r2, r2, #83	@ 0x53
 80243c0:	f883 20ee 	strb.w	r2, [r3, #238]	@ 0xee
 80243c4:	2200      	movs	r2, #0
 80243c6:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 80243ca:	f883 20ef 	strb.w	r2, [r3, #239]	@ 0xef
  /* Add option MESSAGE_TYPE */
  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
 80243ce:	697b      	ldr	r3, [r7, #20]
 80243d0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80243d4:	2301      	movs	r3, #1
 80243d6:	2235      	movs	r2, #53	@ 0x35
 80243d8:	2000      	movs	r0, #0
 80243da:	f7ff facf 	bl	802397c <dhcp_option>
 80243de:	4603      	mov	r3, r0
 80243e0:	827b      	strh	r3, [r7, #18]
  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
 80243e2:	697b      	ldr	r3, [r7, #20]
 80243e4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80243e8:	79fa      	ldrb	r2, [r7, #7]
 80243ea:	8a7b      	ldrh	r3, [r7, #18]
 80243ec:	4618      	mov	r0, r3
 80243ee:	f7ff faf9 	bl	80239e4 <dhcp_option_byte>
 80243f2:	4603      	mov	r3, r0
 80243f4:	827b      	strh	r3, [r7, #18]
  if (options_out_len) {
 80243f6:	683b      	ldr	r3, [r7, #0]
 80243f8:	2b00      	cmp	r3, #0
 80243fa:	d002      	beq.n	8024402 <dhcp_create_msg+0x18a>
    *options_out_len = options_out_len_loc;
 80243fc:	683b      	ldr	r3, [r7, #0]
 80243fe:	8a7a      	ldrh	r2, [r7, #18]
 8024400:	801a      	strh	r2, [r3, #0]
  }
  return p_out;
 8024402:	69bb      	ldr	r3, [r7, #24]
}
 8024404:	4618      	mov	r0, r3
 8024406:	3720      	adds	r7, #32
 8024408:	46bd      	mov	sp, r7
 802440a:	bd80      	pop	{r7, pc}
 802440c:	08030d38 	.word	0x08030d38
 8024410:	08031058 	.word	0x08031058
 8024414:	08030d98 	.word	0x08030d98
 8024418:	08031078 	.word	0x08031078
 802441c:	08031098 	.word	0x08031098
 8024420:	2402affc 	.word	0x2402affc

08024424 <dhcp_option_trailer>:
 * Adds the END option to the DHCP message, and if
 * necessary, up to three padding bytes.
 */
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
 8024424:	b580      	push	{r7, lr}
 8024426:	b084      	sub	sp, #16
 8024428:	af00      	add	r7, sp, #0
 802442a:	4603      	mov	r3, r0
 802442c:	60b9      	str	r1, [r7, #8]
 802442e:	607a      	str	r2, [r7, #4]
 8024430:	81fb      	strh	r3, [r7, #14]
  options[options_out_len++] = DHCP_OPTION_END;
 8024432:	89fb      	ldrh	r3, [r7, #14]
 8024434:	1c5a      	adds	r2, r3, #1
 8024436:	81fa      	strh	r2, [r7, #14]
 8024438:	461a      	mov	r2, r3
 802443a:	68bb      	ldr	r3, [r7, #8]
 802443c:	4413      	add	r3, r2
 802443e:	22ff      	movs	r2, #255	@ 0xff
 8024440:	701a      	strb	r2, [r3, #0]
  /* packet is too small, or not 4 byte aligned? */
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8024442:	e007      	b.n	8024454 <dhcp_option_trailer+0x30>
         (options_out_len < DHCP_OPTIONS_LEN)) {
    /* add a fill/padding byte */
    options[options_out_len++] = 0;
 8024444:	89fb      	ldrh	r3, [r7, #14]
 8024446:	1c5a      	adds	r2, r3, #1
 8024448:	81fa      	strh	r2, [r7, #14]
 802444a:	461a      	mov	r2, r3
 802444c:	68bb      	ldr	r3, [r7, #8]
 802444e:	4413      	add	r3, r2
 8024450:	2200      	movs	r2, #0
 8024452:	701a      	strb	r2, [r3, #0]
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8024454:	89fb      	ldrh	r3, [r7, #14]
 8024456:	2b43      	cmp	r3, #67	@ 0x43
 8024458:	d904      	bls.n	8024464 <dhcp_option_trailer+0x40>
 802445a:	89fb      	ldrh	r3, [r7, #14]
 802445c:	f003 0303 	and.w	r3, r3, #3
 8024460:	2b00      	cmp	r3, #0
 8024462:	d002      	beq.n	802446a <dhcp_option_trailer+0x46>
 8024464:	89fb      	ldrh	r3, [r7, #14]
 8024466:	2b43      	cmp	r3, #67	@ 0x43
 8024468:	d9ec      	bls.n	8024444 <dhcp_option_trailer+0x20>
  }
  /* shrink the pbuf to the actual content length */
  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
 802446a:	89fb      	ldrh	r3, [r7, #14]
 802446c:	33f0      	adds	r3, #240	@ 0xf0
 802446e:	b29b      	uxth	r3, r3
 8024470:	4619      	mov	r1, r3
 8024472:	6878      	ldr	r0, [r7, #4]
 8024474:	f7f6 fd44 	bl	801af00 <pbuf_realloc>
}
 8024478:	bf00      	nop
 802447a:	3710      	adds	r7, #16
 802447c:	46bd      	mov	sp, r7
 802447e:	bd80      	pop	{r7, pc}

08024480 <dhcp_supplied_address>:
 * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
 *         0 otherwise
 */
u8_t
dhcp_supplied_address(const struct netif *netif)
{
 8024480:	b480      	push	{r7}
 8024482:	b085      	sub	sp, #20
 8024484:	af00      	add	r7, sp, #0
 8024486:	6078      	str	r0, [r7, #4]
  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
 8024488:	687b      	ldr	r3, [r7, #4]
 802448a:	2b00      	cmp	r3, #0
 802448c:	d017      	beq.n	80244be <dhcp_supplied_address+0x3e>
 802448e:	687b      	ldr	r3, [r7, #4]
 8024490:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8024492:	2b00      	cmp	r3, #0
 8024494:	d013      	beq.n	80244be <dhcp_supplied_address+0x3e>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8024496:	687b      	ldr	r3, [r7, #4]
 8024498:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802449a:	60fb      	str	r3, [r7, #12]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 802449c:	68fb      	ldr	r3, [r7, #12]
 802449e:	795b      	ldrb	r3, [r3, #5]
 80244a0:	2b0a      	cmp	r3, #10
 80244a2:	d007      	beq.n	80244b4 <dhcp_supplied_address+0x34>
 80244a4:	68fb      	ldr	r3, [r7, #12]
 80244a6:	795b      	ldrb	r3, [r3, #5]
 80244a8:	2b05      	cmp	r3, #5
 80244aa:	d003      	beq.n	80244b4 <dhcp_supplied_address+0x34>
           (dhcp->state == DHCP_STATE_REBINDING);
 80244ac:	68fb      	ldr	r3, [r7, #12]
 80244ae:	795b      	ldrb	r3, [r3, #5]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 80244b0:	2b04      	cmp	r3, #4
 80244b2:	d101      	bne.n	80244b8 <dhcp_supplied_address+0x38>
 80244b4:	2301      	movs	r3, #1
 80244b6:	e000      	b.n	80244ba <dhcp_supplied_address+0x3a>
 80244b8:	2300      	movs	r3, #0
 80244ba:	b2db      	uxtb	r3, r3
 80244bc:	e000      	b.n	80244c0 <dhcp_supplied_address+0x40>
  }
  return 0;
 80244be:	2300      	movs	r3, #0
}
 80244c0:	4618      	mov	r0, r3
 80244c2:	3714      	adds	r7, #20
 80244c4:	46bd      	mov	sp, r7
 80244c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80244ca:	4770      	bx	lr

080244cc <etharp_free_entry>:
#endif /* ARP_QUEUEING */

/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
 80244cc:	b580      	push	{r7, lr}
 80244ce:	b082      	sub	sp, #8
 80244d0:	af00      	add	r7, sp, #0
 80244d2:	6078      	str	r0, [r7, #4]
  /* remove from SNMP ARP index tree */
  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
  /* and empty packet queue */
  if (arp_table[i].q != NULL) {
 80244d4:	492b      	ldr	r1, [pc, #172]	@ (8024584 <etharp_free_entry+0xb8>)
 80244d6:	687a      	ldr	r2, [r7, #4]
 80244d8:	4613      	mov	r3, r2
 80244da:	005b      	lsls	r3, r3, #1
 80244dc:	4413      	add	r3, r2
 80244de:	00db      	lsls	r3, r3, #3
 80244e0:	440b      	add	r3, r1
 80244e2:	681b      	ldr	r3, [r3, #0]
 80244e4:	2b00      	cmp	r3, #0
 80244e6:	d013      	beq.n	8024510 <etharp_free_entry+0x44>
    /* remove all queued packets */
    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
    free_etharp_q(arp_table[i].q);
 80244e8:	4926      	ldr	r1, [pc, #152]	@ (8024584 <etharp_free_entry+0xb8>)
 80244ea:	687a      	ldr	r2, [r7, #4]
 80244ec:	4613      	mov	r3, r2
 80244ee:	005b      	lsls	r3, r3, #1
 80244f0:	4413      	add	r3, r2
 80244f2:	00db      	lsls	r3, r3, #3
 80244f4:	440b      	add	r3, r1
 80244f6:	681b      	ldr	r3, [r3, #0]
 80244f8:	4618      	mov	r0, r3
 80244fa:	f7f6 feb7 	bl	801b26c <pbuf_free>
    arp_table[i].q = NULL;
 80244fe:	4921      	ldr	r1, [pc, #132]	@ (8024584 <etharp_free_entry+0xb8>)
 8024500:	687a      	ldr	r2, [r7, #4]
 8024502:	4613      	mov	r3, r2
 8024504:	005b      	lsls	r3, r3, #1
 8024506:	4413      	add	r3, r2
 8024508:	00db      	lsls	r3, r3, #3
 802450a:	440b      	add	r3, r1
 802450c:	2200      	movs	r2, #0
 802450e:	601a      	str	r2, [r3, #0]
  }
  /* recycle entry for re-use */
  arp_table[i].state = ETHARP_STATE_EMPTY;
 8024510:	491c      	ldr	r1, [pc, #112]	@ (8024584 <etharp_free_entry+0xb8>)
 8024512:	687a      	ldr	r2, [r7, #4]
 8024514:	4613      	mov	r3, r2
 8024516:	005b      	lsls	r3, r3, #1
 8024518:	4413      	add	r3, r2
 802451a:	00db      	lsls	r3, r3, #3
 802451c:	440b      	add	r3, r1
 802451e:	3314      	adds	r3, #20
 8024520:	2200      	movs	r2, #0
 8024522:	701a      	strb	r2, [r3, #0]
#ifdef LWIP_DEBUG
  /* for debugging, clean out the complete entry */
  arp_table[i].ctime = 0;
 8024524:	4917      	ldr	r1, [pc, #92]	@ (8024584 <etharp_free_entry+0xb8>)
 8024526:	687a      	ldr	r2, [r7, #4]
 8024528:	4613      	mov	r3, r2
 802452a:	005b      	lsls	r3, r3, #1
 802452c:	4413      	add	r3, r2
 802452e:	00db      	lsls	r3, r3, #3
 8024530:	440b      	add	r3, r1
 8024532:	3312      	adds	r3, #18
 8024534:	2200      	movs	r2, #0
 8024536:	801a      	strh	r2, [r3, #0]
  arp_table[i].netif = NULL;
 8024538:	4912      	ldr	r1, [pc, #72]	@ (8024584 <etharp_free_entry+0xb8>)
 802453a:	687a      	ldr	r2, [r7, #4]
 802453c:	4613      	mov	r3, r2
 802453e:	005b      	lsls	r3, r3, #1
 8024540:	4413      	add	r3, r2
 8024542:	00db      	lsls	r3, r3, #3
 8024544:	440b      	add	r3, r1
 8024546:	3308      	adds	r3, #8
 8024548:	2200      	movs	r2, #0
 802454a:	601a      	str	r2, [r3, #0]
  ip4_addr_set_zero(&arp_table[i].ipaddr);
 802454c:	490d      	ldr	r1, [pc, #52]	@ (8024584 <etharp_free_entry+0xb8>)
 802454e:	687a      	ldr	r2, [r7, #4]
 8024550:	4613      	mov	r3, r2
 8024552:	005b      	lsls	r3, r3, #1
 8024554:	4413      	add	r3, r2
 8024556:	00db      	lsls	r3, r3, #3
 8024558:	440b      	add	r3, r1
 802455a:	3304      	adds	r3, #4
 802455c:	2200      	movs	r2, #0
 802455e:	601a      	str	r2, [r3, #0]
  arp_table[i].ethaddr = ethzero;
 8024560:	4908      	ldr	r1, [pc, #32]	@ (8024584 <etharp_free_entry+0xb8>)
 8024562:	687a      	ldr	r2, [r7, #4]
 8024564:	4613      	mov	r3, r2
 8024566:	005b      	lsls	r3, r3, #1
 8024568:	4413      	add	r3, r2
 802456a:	00db      	lsls	r3, r3, #3
 802456c:	440b      	add	r3, r1
 802456e:	3308      	adds	r3, #8
 8024570:	4a05      	ldr	r2, [pc, #20]	@ (8024588 <etharp_free_entry+0xbc>)
 8024572:	3304      	adds	r3, #4
 8024574:	6810      	ldr	r0, [r2, #0]
 8024576:	6018      	str	r0, [r3, #0]
 8024578:	8892      	ldrh	r2, [r2, #4]
 802457a:	809a      	strh	r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
 802457c:	bf00      	nop
 802457e:	3708      	adds	r7, #8
 8024580:	46bd      	mov	sp, r7
 8024582:	bd80      	pop	{r7, pc}
 8024584:	2402b000 	.word	0x2402b000
 8024588:	08031b68 	.word	0x08031b68

0802458c <etharp_tmr>:
 * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
 * in order to expire entries in the ARP table.
 */
void
etharp_tmr(void)
{
 802458c:	b580      	push	{r7, lr}
 802458e:	b082      	sub	sp, #8
 8024590:	af00      	add	r7, sp, #0
  int i;

  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
  /* remove expired entries from the ARP table */
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024592:	2300      	movs	r3, #0
 8024594:	607b      	str	r3, [r7, #4]
 8024596:	e096      	b.n	80246c6 <etharp_tmr+0x13a>
    u8_t state = arp_table[i].state;
 8024598:	494f      	ldr	r1, [pc, #316]	@ (80246d8 <etharp_tmr+0x14c>)
 802459a:	687a      	ldr	r2, [r7, #4]
 802459c:	4613      	mov	r3, r2
 802459e:	005b      	lsls	r3, r3, #1
 80245a0:	4413      	add	r3, r2
 80245a2:	00db      	lsls	r3, r3, #3
 80245a4:	440b      	add	r3, r1
 80245a6:	3314      	adds	r3, #20
 80245a8:	781b      	ldrb	r3, [r3, #0]
 80245aa:	70fb      	strb	r3, [r7, #3]
    if (state != ETHARP_STATE_EMPTY
 80245ac:	78fb      	ldrb	r3, [r7, #3]
 80245ae:	2b00      	cmp	r3, #0
 80245b0:	f000 8086 	beq.w	80246c0 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
        && (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
       ) {
      arp_table[i].ctime++;
 80245b4:	4948      	ldr	r1, [pc, #288]	@ (80246d8 <etharp_tmr+0x14c>)
 80245b6:	687a      	ldr	r2, [r7, #4]
 80245b8:	4613      	mov	r3, r2
 80245ba:	005b      	lsls	r3, r3, #1
 80245bc:	4413      	add	r3, r2
 80245be:	00db      	lsls	r3, r3, #3
 80245c0:	440b      	add	r3, r1
 80245c2:	3312      	adds	r3, #18
 80245c4:	881b      	ldrh	r3, [r3, #0]
 80245c6:	3301      	adds	r3, #1
 80245c8:	b298      	uxth	r0, r3
 80245ca:	4943      	ldr	r1, [pc, #268]	@ (80246d8 <etharp_tmr+0x14c>)
 80245cc:	687a      	ldr	r2, [r7, #4]
 80245ce:	4613      	mov	r3, r2
 80245d0:	005b      	lsls	r3, r3, #1
 80245d2:	4413      	add	r3, r2
 80245d4:	00db      	lsls	r3, r3, #3
 80245d6:	440b      	add	r3, r1
 80245d8:	3312      	adds	r3, #18
 80245da:	4602      	mov	r2, r0
 80245dc:	801a      	strh	r2, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 80245de:	493e      	ldr	r1, [pc, #248]	@ (80246d8 <etharp_tmr+0x14c>)
 80245e0:	687a      	ldr	r2, [r7, #4]
 80245e2:	4613      	mov	r3, r2
 80245e4:	005b      	lsls	r3, r3, #1
 80245e6:	4413      	add	r3, r2
 80245e8:	00db      	lsls	r3, r3, #3
 80245ea:	440b      	add	r3, r1
 80245ec:	3312      	adds	r3, #18
 80245ee:	881b      	ldrh	r3, [r3, #0]
 80245f0:	f5b3 7f96 	cmp.w	r3, #300	@ 0x12c
 80245f4:	d215      	bcs.n	8024622 <etharp_tmr+0x96>
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 80245f6:	4938      	ldr	r1, [pc, #224]	@ (80246d8 <etharp_tmr+0x14c>)
 80245f8:	687a      	ldr	r2, [r7, #4]
 80245fa:	4613      	mov	r3, r2
 80245fc:	005b      	lsls	r3, r3, #1
 80245fe:	4413      	add	r3, r2
 8024600:	00db      	lsls	r3, r3, #3
 8024602:	440b      	add	r3, r1
 8024604:	3314      	adds	r3, #20
 8024606:	781b      	ldrb	r3, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 8024608:	2b01      	cmp	r3, #1
 802460a:	d10e      	bne.n	802462a <etharp_tmr+0x9e>
           (arp_table[i].ctime >= ARP_MAXPENDING))) {
 802460c:	4932      	ldr	r1, [pc, #200]	@ (80246d8 <etharp_tmr+0x14c>)
 802460e:	687a      	ldr	r2, [r7, #4]
 8024610:	4613      	mov	r3, r2
 8024612:	005b      	lsls	r3, r3, #1
 8024614:	4413      	add	r3, r2
 8024616:	00db      	lsls	r3, r3, #3
 8024618:	440b      	add	r3, r1
 802461a:	3312      	adds	r3, #18
 802461c:	881b      	ldrh	r3, [r3, #0]
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 802461e:	2b04      	cmp	r3, #4
 8024620:	d903      	bls.n	802462a <etharp_tmr+0x9e>
        /* pending or stable entry has become old! */
        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
        /* clean up entries that have just been expired */
        etharp_free_entry(i);
 8024622:	6878      	ldr	r0, [r7, #4]
 8024624:	f7ff ff52 	bl	80244cc <etharp_free_entry>
 8024628:	e04a      	b.n	80246c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
 802462a:	492b      	ldr	r1, [pc, #172]	@ (80246d8 <etharp_tmr+0x14c>)
 802462c:	687a      	ldr	r2, [r7, #4]
 802462e:	4613      	mov	r3, r2
 8024630:	005b      	lsls	r3, r3, #1
 8024632:	4413      	add	r3, r2
 8024634:	00db      	lsls	r3, r3, #3
 8024636:	440b      	add	r3, r1
 8024638:	3314      	adds	r3, #20
 802463a:	781b      	ldrb	r3, [r3, #0]
 802463c:	2b03      	cmp	r3, #3
 802463e:	d10a      	bne.n	8024656 <etharp_tmr+0xca>
        /* Don't send more than one request every 2 seconds. */
        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
 8024640:	4925      	ldr	r1, [pc, #148]	@ (80246d8 <etharp_tmr+0x14c>)
 8024642:	687a      	ldr	r2, [r7, #4]
 8024644:	4613      	mov	r3, r2
 8024646:	005b      	lsls	r3, r3, #1
 8024648:	4413      	add	r3, r2
 802464a:	00db      	lsls	r3, r3, #3
 802464c:	440b      	add	r3, r1
 802464e:	3314      	adds	r3, #20
 8024650:	2204      	movs	r2, #4
 8024652:	701a      	strb	r2, [r3, #0]
 8024654:	e034      	b.n	80246c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
 8024656:	4920      	ldr	r1, [pc, #128]	@ (80246d8 <etharp_tmr+0x14c>)
 8024658:	687a      	ldr	r2, [r7, #4]
 802465a:	4613      	mov	r3, r2
 802465c:	005b      	lsls	r3, r3, #1
 802465e:	4413      	add	r3, r2
 8024660:	00db      	lsls	r3, r3, #3
 8024662:	440b      	add	r3, r1
 8024664:	3314      	adds	r3, #20
 8024666:	781b      	ldrb	r3, [r3, #0]
 8024668:	2b04      	cmp	r3, #4
 802466a:	d10a      	bne.n	8024682 <etharp_tmr+0xf6>
        /* Reset state to stable, so that the next transmitted packet will
           re-send an ARP request. */
        arp_table[i].state = ETHARP_STATE_STABLE;
 802466c:	491a      	ldr	r1, [pc, #104]	@ (80246d8 <etharp_tmr+0x14c>)
 802466e:	687a      	ldr	r2, [r7, #4]
 8024670:	4613      	mov	r3, r2
 8024672:	005b      	lsls	r3, r3, #1
 8024674:	4413      	add	r3, r2
 8024676:	00db      	lsls	r3, r3, #3
 8024678:	440b      	add	r3, r1
 802467a:	3314      	adds	r3, #20
 802467c:	2202      	movs	r2, #2
 802467e:	701a      	strb	r2, [r3, #0]
 8024680:	e01e      	b.n	80246c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8024682:	4915      	ldr	r1, [pc, #84]	@ (80246d8 <etharp_tmr+0x14c>)
 8024684:	687a      	ldr	r2, [r7, #4]
 8024686:	4613      	mov	r3, r2
 8024688:	005b      	lsls	r3, r3, #1
 802468a:	4413      	add	r3, r2
 802468c:	00db      	lsls	r3, r3, #3
 802468e:	440b      	add	r3, r1
 8024690:	3314      	adds	r3, #20
 8024692:	781b      	ldrb	r3, [r3, #0]
 8024694:	2b01      	cmp	r3, #1
 8024696:	d113      	bne.n	80246c0 <etharp_tmr+0x134>
        /* still pending, resend an ARP query */
        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
 8024698:	490f      	ldr	r1, [pc, #60]	@ (80246d8 <etharp_tmr+0x14c>)
 802469a:	687a      	ldr	r2, [r7, #4]
 802469c:	4613      	mov	r3, r2
 802469e:	005b      	lsls	r3, r3, #1
 80246a0:	4413      	add	r3, r2
 80246a2:	00db      	lsls	r3, r3, #3
 80246a4:	440b      	add	r3, r1
 80246a6:	3308      	adds	r3, #8
 80246a8:	6818      	ldr	r0, [r3, #0]
 80246aa:	687a      	ldr	r2, [r7, #4]
 80246ac:	4613      	mov	r3, r2
 80246ae:	005b      	lsls	r3, r3, #1
 80246b0:	4413      	add	r3, r2
 80246b2:	00db      	lsls	r3, r3, #3
 80246b4:	4a08      	ldr	r2, [pc, #32]	@ (80246d8 <etharp_tmr+0x14c>)
 80246b6:	4413      	add	r3, r2
 80246b8:	3304      	adds	r3, #4
 80246ba:	4619      	mov	r1, r3
 80246bc:	f000 fe76 	bl	80253ac <etharp_request>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80246c0:	687b      	ldr	r3, [r7, #4]
 80246c2:	3301      	adds	r3, #1
 80246c4:	607b      	str	r3, [r7, #4]
 80246c6:	687b      	ldr	r3, [r7, #4]
 80246c8:	2b09      	cmp	r3, #9
 80246ca:	f77f af65 	ble.w	8024598 <etharp_tmr+0xc>
      }
    }
  }
}
 80246ce:	bf00      	nop
 80246d0:	bf00      	nop
 80246d2:	3708      	adds	r7, #8
 80246d4:	46bd      	mov	sp, r7
 80246d6:	bd80      	pop	{r7, pc}
 80246d8:	2402b000 	.word	0x2402b000

080246dc <etharp_find_entry>:
 * @return The ARP entry index that matched or is created, ERR_MEM if no
 * entry is found or could be recycled.
 */
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
 80246dc:	b580      	push	{r7, lr}
 80246de:	b08a      	sub	sp, #40	@ 0x28
 80246e0:	af00      	add	r7, sp, #0
 80246e2:	60f8      	str	r0, [r7, #12]
 80246e4:	460b      	mov	r3, r1
 80246e6:	607a      	str	r2, [r7, #4]
 80246e8:	72fb      	strb	r3, [r7, #11]
  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
 80246ea:	230a      	movs	r3, #10
 80246ec:	843b      	strh	r3, [r7, #32]
 80246ee:	230a      	movs	r3, #10
 80246f0:	847b      	strh	r3, [r7, #34]	@ 0x22
  s16_t empty = ARP_TABLE_SIZE;
 80246f2:	230a      	movs	r3, #10
 80246f4:	84bb      	strh	r3, [r7, #36]	@ 0x24
  s16_t i = 0;
 80246f6:	2300      	movs	r3, #0
 80246f8:	84fb      	strh	r3, [r7, #38]	@ 0x26
  /* oldest entry with packets on queue */
  s16_t old_queue = ARP_TABLE_SIZE;
 80246fa:	230a      	movs	r3, #10
 80246fc:	83fb      	strh	r3, [r7, #30]
  /* its age */
  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
 80246fe:	2300      	movs	r3, #0
 8024700:	83bb      	strh	r3, [r7, #28]
 8024702:	2300      	movs	r3, #0
 8024704:	837b      	strh	r3, [r7, #26]
 8024706:	2300      	movs	r3, #0
 8024708:	833b      	strh	r3, [r7, #24]
   * 4) remember the oldest pending entry with queued packets (if any)
   * 5) search for a matching IP entry, either pending or stable
   *    until 5 matches, or all entries are searched for.
   */

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 802470a:	2300      	movs	r3, #0
 802470c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 802470e:	e0ae      	b.n	802486e <etharp_find_entry+0x192>
    u8_t state = arp_table[i].state;
 8024710:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024714:	49a6      	ldr	r1, [pc, #664]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024716:	4613      	mov	r3, r2
 8024718:	005b      	lsls	r3, r3, #1
 802471a:	4413      	add	r3, r2
 802471c:	00db      	lsls	r3, r3, #3
 802471e:	440b      	add	r3, r1
 8024720:	3314      	adds	r3, #20
 8024722:	781b      	ldrb	r3, [r3, #0]
 8024724:	75fb      	strb	r3, [r7, #23]
    /* no empty entry found yet and now we do find one? */
    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
 8024726:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 802472a:	2b0a      	cmp	r3, #10
 802472c:	d105      	bne.n	802473a <etharp_find_entry+0x5e>
 802472e:	7dfb      	ldrb	r3, [r7, #23]
 8024730:	2b00      	cmp	r3, #0
 8024732:	d102      	bne.n	802473a <etharp_find_entry+0x5e>
      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
      /* remember first empty entry */
      empty = i;
 8024734:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024736:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8024738:	e095      	b.n	8024866 <etharp_find_entry+0x18a>
    } else if (state != ETHARP_STATE_EMPTY) {
 802473a:	7dfb      	ldrb	r3, [r7, #23]
 802473c:	2b00      	cmp	r3, #0
 802473e:	f000 8092 	beq.w	8024866 <etharp_find_entry+0x18a>
      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
 8024742:	7dfb      	ldrb	r3, [r7, #23]
 8024744:	2b01      	cmp	r3, #1
 8024746:	d009      	beq.n	802475c <etharp_find_entry+0x80>
 8024748:	7dfb      	ldrb	r3, [r7, #23]
 802474a:	2b01      	cmp	r3, #1
 802474c:	d806      	bhi.n	802475c <etharp_find_entry+0x80>
 802474e:	4b99      	ldr	r3, [pc, #612]	@ (80249b4 <etharp_find_entry+0x2d8>)
 8024750:	f240 1223 	movw	r2, #291	@ 0x123
 8024754:	4998      	ldr	r1, [pc, #608]	@ (80249b8 <etharp_find_entry+0x2dc>)
 8024756:	4899      	ldr	r0, [pc, #612]	@ (80249bc <etharp_find_entry+0x2e0>)
 8024758:	f006 f800 	bl	802a75c <iprintf>
                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
      /* if given, does IP address match IP address in ARP entry? */
      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
 802475c:	68fb      	ldr	r3, [r7, #12]
 802475e:	2b00      	cmp	r3, #0
 8024760:	d020      	beq.n	80247a4 <etharp_find_entry+0xc8>
 8024762:	68fb      	ldr	r3, [r7, #12]
 8024764:	6819      	ldr	r1, [r3, #0]
 8024766:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802476a:	4891      	ldr	r0, [pc, #580]	@ (80249b0 <etharp_find_entry+0x2d4>)
 802476c:	4613      	mov	r3, r2
 802476e:	005b      	lsls	r3, r3, #1
 8024770:	4413      	add	r3, r2
 8024772:	00db      	lsls	r3, r3, #3
 8024774:	4403      	add	r3, r0
 8024776:	3304      	adds	r3, #4
 8024778:	681b      	ldr	r3, [r3, #0]
 802477a:	4299      	cmp	r1, r3
 802477c:	d112      	bne.n	80247a4 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
          && ((netif == NULL) || (netif == arp_table[i].netif))
 802477e:	687b      	ldr	r3, [r7, #4]
 8024780:	2b00      	cmp	r3, #0
 8024782:	d00c      	beq.n	802479e <etharp_find_entry+0xc2>
 8024784:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024788:	4989      	ldr	r1, [pc, #548]	@ (80249b0 <etharp_find_entry+0x2d4>)
 802478a:	4613      	mov	r3, r2
 802478c:	005b      	lsls	r3, r3, #1
 802478e:	4413      	add	r3, r2
 8024790:	00db      	lsls	r3, r3, #3
 8024792:	440b      	add	r3, r1
 8024794:	3308      	adds	r3, #8
 8024796:	681b      	ldr	r3, [r3, #0]
 8024798:	687a      	ldr	r2, [r7, #4]
 802479a:	429a      	cmp	r2, r3
 802479c:	d102      	bne.n	80247a4 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
         ) {
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
        /* found exact IP address match, simply bail out */
        return i;
 802479e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 80247a2:	e100      	b.n	80249a6 <etharp_find_entry+0x2ca>
      }
      /* pending entry? */
      if (state == ETHARP_STATE_PENDING) {
 80247a4:	7dfb      	ldrb	r3, [r7, #23]
 80247a6:	2b01      	cmp	r3, #1
 80247a8:	d140      	bne.n	802482c <etharp_find_entry+0x150>
        /* pending with queued packets? */
        if (arp_table[i].q != NULL) {
 80247aa:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80247ae:	4980      	ldr	r1, [pc, #512]	@ (80249b0 <etharp_find_entry+0x2d4>)
 80247b0:	4613      	mov	r3, r2
 80247b2:	005b      	lsls	r3, r3, #1
 80247b4:	4413      	add	r3, r2
 80247b6:	00db      	lsls	r3, r3, #3
 80247b8:	440b      	add	r3, r1
 80247ba:	681b      	ldr	r3, [r3, #0]
 80247bc:	2b00      	cmp	r3, #0
 80247be:	d01a      	beq.n	80247f6 <etharp_find_entry+0x11a>
          if (arp_table[i].ctime >= age_queue) {
 80247c0:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80247c4:	497a      	ldr	r1, [pc, #488]	@ (80249b0 <etharp_find_entry+0x2d4>)
 80247c6:	4613      	mov	r3, r2
 80247c8:	005b      	lsls	r3, r3, #1
 80247ca:	4413      	add	r3, r2
 80247cc:	00db      	lsls	r3, r3, #3
 80247ce:	440b      	add	r3, r1
 80247d0:	3312      	adds	r3, #18
 80247d2:	881b      	ldrh	r3, [r3, #0]
 80247d4:	8bba      	ldrh	r2, [r7, #28]
 80247d6:	429a      	cmp	r2, r3
 80247d8:	d845      	bhi.n	8024866 <etharp_find_entry+0x18a>
            old_queue = i;
 80247da:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 80247dc:	83fb      	strh	r3, [r7, #30]
            age_queue = arp_table[i].ctime;
 80247de:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80247e2:	4973      	ldr	r1, [pc, #460]	@ (80249b0 <etharp_find_entry+0x2d4>)
 80247e4:	4613      	mov	r3, r2
 80247e6:	005b      	lsls	r3, r3, #1
 80247e8:	4413      	add	r3, r2
 80247ea:	00db      	lsls	r3, r3, #3
 80247ec:	440b      	add	r3, r1
 80247ee:	3312      	adds	r3, #18
 80247f0:	881b      	ldrh	r3, [r3, #0]
 80247f2:	83bb      	strh	r3, [r7, #28]
 80247f4:	e037      	b.n	8024866 <etharp_find_entry+0x18a>
          }
        } else
          /* pending without queued packets? */
        {
          if (arp_table[i].ctime >= age_pending) {
 80247f6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80247fa:	496d      	ldr	r1, [pc, #436]	@ (80249b0 <etharp_find_entry+0x2d4>)
 80247fc:	4613      	mov	r3, r2
 80247fe:	005b      	lsls	r3, r3, #1
 8024800:	4413      	add	r3, r2
 8024802:	00db      	lsls	r3, r3, #3
 8024804:	440b      	add	r3, r1
 8024806:	3312      	adds	r3, #18
 8024808:	881b      	ldrh	r3, [r3, #0]
 802480a:	8b7a      	ldrh	r2, [r7, #26]
 802480c:	429a      	cmp	r2, r3
 802480e:	d82a      	bhi.n	8024866 <etharp_find_entry+0x18a>
            old_pending = i;
 8024810:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024812:	843b      	strh	r3, [r7, #32]
            age_pending = arp_table[i].ctime;
 8024814:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024818:	4965      	ldr	r1, [pc, #404]	@ (80249b0 <etharp_find_entry+0x2d4>)
 802481a:	4613      	mov	r3, r2
 802481c:	005b      	lsls	r3, r3, #1
 802481e:	4413      	add	r3, r2
 8024820:	00db      	lsls	r3, r3, #3
 8024822:	440b      	add	r3, r1
 8024824:	3312      	adds	r3, #18
 8024826:	881b      	ldrh	r3, [r3, #0]
 8024828:	837b      	strh	r3, [r7, #26]
 802482a:	e01c      	b.n	8024866 <etharp_find_entry+0x18a>
          }
        }
        /* stable entry? */
      } else if (state >= ETHARP_STATE_STABLE) {
 802482c:	7dfb      	ldrb	r3, [r7, #23]
 802482e:	2b01      	cmp	r3, #1
 8024830:	d919      	bls.n	8024866 <etharp_find_entry+0x18a>
        /* don't record old_stable for static entries since they never expire */
        if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
        {
          /* remember entry with oldest stable entry in oldest, its age in maxtime */
          if (arp_table[i].ctime >= age_stable) {
 8024832:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024836:	495e      	ldr	r1, [pc, #376]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024838:	4613      	mov	r3, r2
 802483a:	005b      	lsls	r3, r3, #1
 802483c:	4413      	add	r3, r2
 802483e:	00db      	lsls	r3, r3, #3
 8024840:	440b      	add	r3, r1
 8024842:	3312      	adds	r3, #18
 8024844:	881b      	ldrh	r3, [r3, #0]
 8024846:	8b3a      	ldrh	r2, [r7, #24]
 8024848:	429a      	cmp	r2, r3
 802484a:	d80c      	bhi.n	8024866 <etharp_find_entry+0x18a>
            old_stable = i;
 802484c:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 802484e:	847b      	strh	r3, [r7, #34]	@ 0x22
            age_stable = arp_table[i].ctime;
 8024850:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024854:	4956      	ldr	r1, [pc, #344]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024856:	4613      	mov	r3, r2
 8024858:	005b      	lsls	r3, r3, #1
 802485a:	4413      	add	r3, r2
 802485c:	00db      	lsls	r3, r3, #3
 802485e:	440b      	add	r3, r1
 8024860:	3312      	adds	r3, #18
 8024862:	881b      	ldrh	r3, [r3, #0]
 8024864:	833b      	strh	r3, [r7, #24]
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024866:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024868:	3301      	adds	r3, #1
 802486a:	b29b      	uxth	r3, r3
 802486c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 802486e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024872:	2b09      	cmp	r3, #9
 8024874:	f77f af4c 	ble.w	8024710 <etharp_find_entry+0x34>
    }
  }
  /* { we have no match } => try to create a new entry */

  /* don't create new entry, only search? */
  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
 8024878:	7afb      	ldrb	r3, [r7, #11]
 802487a:	f003 0302 	and.w	r3, r3, #2
 802487e:	2b00      	cmp	r3, #0
 8024880:	d108      	bne.n	8024894 <etharp_find_entry+0x1b8>
 8024882:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8024886:	2b0a      	cmp	r3, #10
 8024888:	d107      	bne.n	802489a <etharp_find_entry+0x1be>
      /* or no empty entry found and not allowed to recycle? */
      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
 802488a:	7afb      	ldrb	r3, [r7, #11]
 802488c:	f003 0301 	and.w	r3, r3, #1
 8024890:	2b00      	cmp	r3, #0
 8024892:	d102      	bne.n	802489a <etharp_find_entry+0x1be>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
    return (s16_t)ERR_MEM;
 8024894:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8024898:	e085      	b.n	80249a6 <etharp_find_entry+0x2ca>
   *
   * { ETHARP_FLAG_TRY_HARD is set at this point }
   */

  /* 1) empty entry available? */
  if (empty < ARP_TABLE_SIZE) {
 802489a:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 802489e:	2b09      	cmp	r3, #9
 80248a0:	dc02      	bgt.n	80248a8 <etharp_find_entry+0x1cc>
    i = empty;
 80248a2:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80248a4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80248a6:	e039      	b.n	802491c <etharp_find_entry+0x240>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
  } else {
    /* 2) found recyclable stable entry? */
    if (old_stable < ARP_TABLE_SIZE) {
 80248a8:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	@ 0x22
 80248ac:	2b09      	cmp	r3, #9
 80248ae:	dc14      	bgt.n	80248da <etharp_find_entry+0x1fe>
      /* recycle oldest stable*/
      i = old_stable;
 80248b0:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80248b2:	84fb      	strh	r3, [r7, #38]	@ 0x26
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
      /* no queued packets should exist on stable entries */
      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
 80248b4:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 80248b8:	493d      	ldr	r1, [pc, #244]	@ (80249b0 <etharp_find_entry+0x2d4>)
 80248ba:	4613      	mov	r3, r2
 80248bc:	005b      	lsls	r3, r3, #1
 80248be:	4413      	add	r3, r2
 80248c0:	00db      	lsls	r3, r3, #3
 80248c2:	440b      	add	r3, r1
 80248c4:	681b      	ldr	r3, [r3, #0]
 80248c6:	2b00      	cmp	r3, #0
 80248c8:	d018      	beq.n	80248fc <etharp_find_entry+0x220>
 80248ca:	4b3a      	ldr	r3, [pc, #232]	@ (80249b4 <etharp_find_entry+0x2d8>)
 80248cc:	f240 126d 	movw	r2, #365	@ 0x16d
 80248d0:	493b      	ldr	r1, [pc, #236]	@ (80249c0 <etharp_find_entry+0x2e4>)
 80248d2:	483a      	ldr	r0, [pc, #232]	@ (80249bc <etharp_find_entry+0x2e0>)
 80248d4:	f005 ff42 	bl	802a75c <iprintf>
 80248d8:	e010      	b.n	80248fc <etharp_find_entry+0x220>
      /* 3) found recyclable pending entry without queued packets? */
    } else if (old_pending < ARP_TABLE_SIZE) {
 80248da:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
 80248de:	2b09      	cmp	r3, #9
 80248e0:	dc02      	bgt.n	80248e8 <etharp_find_entry+0x20c>
      /* recycle oldest pending */
      i = old_pending;
 80248e2:	8c3b      	ldrh	r3, [r7, #32]
 80248e4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80248e6:	e009      	b.n	80248fc <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
      /* 4) found recyclable pending entry with queued packets? */
    } else if (old_queue < ARP_TABLE_SIZE) {
 80248e8:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
 80248ec:	2b09      	cmp	r3, #9
 80248ee:	dc02      	bgt.n	80248f6 <etharp_find_entry+0x21a>
      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
      i = old_queue;
 80248f0:	8bfb      	ldrh	r3, [r7, #30]
 80248f2:	84fb      	strh	r3, [r7, #38]	@ 0x26
 80248f4:	e002      	b.n	80248fc <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
      /* no empty or recyclable entries found */
    } else {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
      return (s16_t)ERR_MEM;
 80248f6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80248fa:	e054      	b.n	80249a6 <etharp_find_entry+0x2ca>
    }

    /* { empty or recyclable entry found } */
    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 80248fc:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024900:	2b09      	cmp	r3, #9
 8024902:	dd06      	ble.n	8024912 <etharp_find_entry+0x236>
 8024904:	4b2b      	ldr	r3, [pc, #172]	@ (80249b4 <etharp_find_entry+0x2d8>)
 8024906:	f240 127f 	movw	r2, #383	@ 0x17f
 802490a:	492e      	ldr	r1, [pc, #184]	@ (80249c4 <etharp_find_entry+0x2e8>)
 802490c:	482b      	ldr	r0, [pc, #172]	@ (80249bc <etharp_find_entry+0x2e0>)
 802490e:	f005 ff25 	bl	802a75c <iprintf>
    etharp_free_entry(i);
 8024912:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024916:	4618      	mov	r0, r3
 8024918:	f7ff fdd8 	bl	80244cc <etharp_free_entry>
  }

  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 802491c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024920:	2b09      	cmp	r3, #9
 8024922:	dd06      	ble.n	8024932 <etharp_find_entry+0x256>
 8024924:	4b23      	ldr	r3, [pc, #140]	@ (80249b4 <etharp_find_entry+0x2d8>)
 8024926:	f240 1283 	movw	r2, #387	@ 0x183
 802492a:	4926      	ldr	r1, [pc, #152]	@ (80249c4 <etharp_find_entry+0x2e8>)
 802492c:	4823      	ldr	r0, [pc, #140]	@ (80249bc <etharp_find_entry+0x2e0>)
 802492e:	f005 ff15 	bl	802a75c <iprintf>
  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
 8024932:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024936:	491e      	ldr	r1, [pc, #120]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024938:	4613      	mov	r3, r2
 802493a:	005b      	lsls	r3, r3, #1
 802493c:	4413      	add	r3, r2
 802493e:	00db      	lsls	r3, r3, #3
 8024940:	440b      	add	r3, r1
 8024942:	3314      	adds	r3, #20
 8024944:	781b      	ldrb	r3, [r3, #0]
 8024946:	2b00      	cmp	r3, #0
 8024948:	d006      	beq.n	8024958 <etharp_find_entry+0x27c>
 802494a:	4b1a      	ldr	r3, [pc, #104]	@ (80249b4 <etharp_find_entry+0x2d8>)
 802494c:	f44f 72c2 	mov.w	r2, #388	@ 0x184
 8024950:	491d      	ldr	r1, [pc, #116]	@ (80249c8 <etharp_find_entry+0x2ec>)
 8024952:	481a      	ldr	r0, [pc, #104]	@ (80249bc <etharp_find_entry+0x2e0>)
 8024954:	f005 ff02 	bl	802a75c <iprintf>
              arp_table[i].state == ETHARP_STATE_EMPTY);

  /* IP address given? */
  if (ipaddr != NULL) {
 8024958:	68fb      	ldr	r3, [r7, #12]
 802495a:	2b00      	cmp	r3, #0
 802495c:	d00b      	beq.n	8024976 <etharp_find_entry+0x29a>
    /* set IP address */
    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
 802495e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024962:	68fb      	ldr	r3, [r7, #12]
 8024964:	6819      	ldr	r1, [r3, #0]
 8024966:	4812      	ldr	r0, [pc, #72]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024968:	4613      	mov	r3, r2
 802496a:	005b      	lsls	r3, r3, #1
 802496c:	4413      	add	r3, r2
 802496e:	00db      	lsls	r3, r3, #3
 8024970:	4403      	add	r3, r0
 8024972:	3304      	adds	r3, #4
 8024974:	6019      	str	r1, [r3, #0]
  }
  arp_table[i].ctime = 0;
 8024976:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 802497a:	490d      	ldr	r1, [pc, #52]	@ (80249b0 <etharp_find_entry+0x2d4>)
 802497c:	4613      	mov	r3, r2
 802497e:	005b      	lsls	r3, r3, #1
 8024980:	4413      	add	r3, r2
 8024982:	00db      	lsls	r3, r3, #3
 8024984:	440b      	add	r3, r1
 8024986:	3312      	adds	r3, #18
 8024988:	2200      	movs	r2, #0
 802498a:	801a      	strh	r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
  arp_table[i].netif = netif;
 802498c:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024990:	4907      	ldr	r1, [pc, #28]	@ (80249b0 <etharp_find_entry+0x2d4>)
 8024992:	4613      	mov	r3, r2
 8024994:	005b      	lsls	r3, r3, #1
 8024996:	4413      	add	r3, r2
 8024998:	00db      	lsls	r3, r3, #3
 802499a:	440b      	add	r3, r1
 802499c:	3308      	adds	r3, #8
 802499e:	687a      	ldr	r2, [r7, #4]
 80249a0:	601a      	str	r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
  return (s16_t)i;
 80249a2:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
}
 80249a6:	4618      	mov	r0, r3
 80249a8:	3728      	adds	r7, #40	@ 0x28
 80249aa:	46bd      	mov	sp, r7
 80249ac:	bd80      	pop	{r7, pc}
 80249ae:	bf00      	nop
 80249b0:	2402b000 	.word	0x2402b000
 80249b4:	080310d8 	.word	0x080310d8
 80249b8:	08031110 	.word	0x08031110
 80249bc:	08031150 	.word	0x08031150
 80249c0:	08031178 	.word	0x08031178
 80249c4:	08031190 	.word	0x08031190
 80249c8:	080311a4 	.word	0x080311a4

080249cc <etharp_update_arp_entry>:
 *
 * @see pbuf_free()
 */
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
 80249cc:	b580      	push	{r7, lr}
 80249ce:	b088      	sub	sp, #32
 80249d0:	af02      	add	r7, sp, #8
 80249d2:	60f8      	str	r0, [r7, #12]
 80249d4:	60b9      	str	r1, [r7, #8]
 80249d6:	607a      	str	r2, [r7, #4]
 80249d8:	70fb      	strb	r3, [r7, #3]
  s16_t i;
  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
 80249da:	68fb      	ldr	r3, [r7, #12]
 80249dc:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80249e0:	2b06      	cmp	r3, #6
 80249e2:	d006      	beq.n	80249f2 <etharp_update_arp_entry+0x26>
 80249e4:	4b48      	ldr	r3, [pc, #288]	@ (8024b08 <etharp_update_arp_entry+0x13c>)
 80249e6:	f240 12a9 	movw	r2, #425	@ 0x1a9
 80249ea:	4948      	ldr	r1, [pc, #288]	@ (8024b0c <etharp_update_arp_entry+0x140>)
 80249ec:	4848      	ldr	r0, [pc, #288]	@ (8024b10 <etharp_update_arp_entry+0x144>)
 80249ee:	f005 feb5 	bl	802a75c <iprintf>
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
  /* non-unicast address? */
  if (ip4_addr_isany(ipaddr) ||
 80249f2:	68bb      	ldr	r3, [r7, #8]
 80249f4:	2b00      	cmp	r3, #0
 80249f6:	d012      	beq.n	8024a1e <etharp_update_arp_entry+0x52>
 80249f8:	68bb      	ldr	r3, [r7, #8]
 80249fa:	681b      	ldr	r3, [r3, #0]
 80249fc:	2b00      	cmp	r3, #0
 80249fe:	d00e      	beq.n	8024a1e <etharp_update_arp_entry+0x52>
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8024a00:	68bb      	ldr	r3, [r7, #8]
 8024a02:	681b      	ldr	r3, [r3, #0]
 8024a04:	68f9      	ldr	r1, [r7, #12]
 8024a06:	4618      	mov	r0, r3
 8024a08:	f001 f952 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8024a0c:	4603      	mov	r3, r0
  if (ip4_addr_isany(ipaddr) ||
 8024a0e:	2b00      	cmp	r3, #0
 8024a10:	d105      	bne.n	8024a1e <etharp_update_arp_entry+0x52>
      ip4_addr_ismulticast(ipaddr)) {
 8024a12:	68bb      	ldr	r3, [r7, #8]
 8024a14:	681b      	ldr	r3, [r3, #0]
 8024a16:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8024a1a:	2be0      	cmp	r3, #224	@ 0xe0
 8024a1c:	d102      	bne.n	8024a24 <etharp_update_arp_entry+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 8024a1e:	f06f 030f 	mvn.w	r3, #15
 8024a22:	e06c      	b.n	8024afe <etharp_update_arp_entry+0x132>
  }
  /* find or create ARP entry */
  i = etharp_find_entry(ipaddr, flags, netif);
 8024a24:	78fb      	ldrb	r3, [r7, #3]
 8024a26:	68fa      	ldr	r2, [r7, #12]
 8024a28:	4619      	mov	r1, r3
 8024a2a:	68b8      	ldr	r0, [r7, #8]
 8024a2c:	f7ff fe56 	bl	80246dc <etharp_find_entry>
 8024a30:	4603      	mov	r3, r0
 8024a32:	82fb      	strh	r3, [r7, #22]
  /* bail out if no entry could be found */
  if (i < 0) {
 8024a34:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
 8024a38:	2b00      	cmp	r3, #0
 8024a3a:	da02      	bge.n	8024a42 <etharp_update_arp_entry+0x76>
    return (err_t)i;
 8024a3c:	8afb      	ldrh	r3, [r7, #22]
 8024a3e:	b25b      	sxtb	r3, r3
 8024a40:	e05d      	b.n	8024afe <etharp_update_arp_entry+0x132>
    return ERR_VAL;
  } else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
  {
    /* mark it stable */
    arp_table[i].state = ETHARP_STATE_STABLE;
 8024a42:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024a46:	4933      	ldr	r1, [pc, #204]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024a48:	4613      	mov	r3, r2
 8024a4a:	005b      	lsls	r3, r3, #1
 8024a4c:	4413      	add	r3, r2
 8024a4e:	00db      	lsls	r3, r3, #3
 8024a50:	440b      	add	r3, r1
 8024a52:	3314      	adds	r3, #20
 8024a54:	2202      	movs	r2, #2
 8024a56:	701a      	strb	r2, [r3, #0]
  }

  /* record network interface */
  arp_table[i].netif = netif;
 8024a58:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024a5c:	492d      	ldr	r1, [pc, #180]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024a5e:	4613      	mov	r3, r2
 8024a60:	005b      	lsls	r3, r3, #1
 8024a62:	4413      	add	r3, r2
 8024a64:	00db      	lsls	r3, r3, #3
 8024a66:	440b      	add	r3, r1
 8024a68:	3308      	adds	r3, #8
 8024a6a:	68fa      	ldr	r2, [r7, #12]
 8024a6c:	601a      	str	r2, [r3, #0]
  /* insert in SNMP ARP index tree */
  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);

  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
  /* update address */
  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
 8024a6e:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024a72:	4613      	mov	r3, r2
 8024a74:	005b      	lsls	r3, r3, #1
 8024a76:	4413      	add	r3, r2
 8024a78:	00db      	lsls	r3, r3, #3
 8024a7a:	3308      	adds	r3, #8
 8024a7c:	4a25      	ldr	r2, [pc, #148]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024a7e:	4413      	add	r3, r2
 8024a80:	3304      	adds	r3, #4
 8024a82:	2206      	movs	r2, #6
 8024a84:	6879      	ldr	r1, [r7, #4]
 8024a86:	4618      	mov	r0, r3
 8024a88:	f006 f8f1 	bl	802ac6e <memcpy>
  /* reset time stamp */
  arp_table[i].ctime = 0;
 8024a8c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024a90:	4920      	ldr	r1, [pc, #128]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024a92:	4613      	mov	r3, r2
 8024a94:	005b      	lsls	r3, r3, #1
 8024a96:	4413      	add	r3, r2
 8024a98:	00db      	lsls	r3, r3, #3
 8024a9a:	440b      	add	r3, r1
 8024a9c:	3312      	adds	r3, #18
 8024a9e:	2200      	movs	r2, #0
 8024aa0:	801a      	strh	r2, [r3, #0]
    /* get the packet pointer */
    p = q->p;
    /* now queue entry can be freed */
    memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
  if (arp_table[i].q != NULL) {
 8024aa2:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024aa6:	491b      	ldr	r1, [pc, #108]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024aa8:	4613      	mov	r3, r2
 8024aaa:	005b      	lsls	r3, r3, #1
 8024aac:	4413      	add	r3, r2
 8024aae:	00db      	lsls	r3, r3, #3
 8024ab0:	440b      	add	r3, r1
 8024ab2:	681b      	ldr	r3, [r3, #0]
 8024ab4:	2b00      	cmp	r3, #0
 8024ab6:	d021      	beq.n	8024afc <etharp_update_arp_entry+0x130>
    struct pbuf *p = arp_table[i].q;
 8024ab8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024abc:	4915      	ldr	r1, [pc, #84]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024abe:	4613      	mov	r3, r2
 8024ac0:	005b      	lsls	r3, r3, #1
 8024ac2:	4413      	add	r3, r2
 8024ac4:	00db      	lsls	r3, r3, #3
 8024ac6:	440b      	add	r3, r1
 8024ac8:	681b      	ldr	r3, [r3, #0]
 8024aca:	613b      	str	r3, [r7, #16]
    arp_table[i].q = NULL;
 8024acc:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024ad0:	4910      	ldr	r1, [pc, #64]	@ (8024b14 <etharp_update_arp_entry+0x148>)
 8024ad2:	4613      	mov	r3, r2
 8024ad4:	005b      	lsls	r3, r3, #1
 8024ad6:	4413      	add	r3, r2
 8024ad8:	00db      	lsls	r3, r3, #3
 8024ada:	440b      	add	r3, r1
 8024adc:	2200      	movs	r2, #0
 8024ade:	601a      	str	r2, [r3, #0]
#endif /* ARP_QUEUEING */
    /* send the queued IP packet */
    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
 8024ae0:	68fb      	ldr	r3, [r7, #12]
 8024ae2:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8024ae6:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8024aea:	9300      	str	r3, [sp, #0]
 8024aec:	687b      	ldr	r3, [r7, #4]
 8024aee:	6939      	ldr	r1, [r7, #16]
 8024af0:	68f8      	ldr	r0, [r7, #12]
 8024af2:	f002 f9bb 	bl	8026e6c <ethernet_output>
    /* free the queued IP packet */
    pbuf_free(p);
 8024af6:	6938      	ldr	r0, [r7, #16]
 8024af8:	f7f6 fbb8 	bl	801b26c <pbuf_free>
  }
  return ERR_OK;
 8024afc:	2300      	movs	r3, #0
}
 8024afe:	4618      	mov	r0, r3
 8024b00:	3718      	adds	r7, #24
 8024b02:	46bd      	mov	sp, r7
 8024b04:	bd80      	pop	{r7, pc}
 8024b06:	bf00      	nop
 8024b08:	080310d8 	.word	0x080310d8
 8024b0c:	080311d0 	.word	0x080311d0
 8024b10:	08031150 	.word	0x08031150
 8024b14:	2402b000 	.word	0x2402b000

08024b18 <etharp_cleanup_netif>:
 *
 * @param netif points to a network interface
 */
void
etharp_cleanup_netif(struct netif *netif)
{
 8024b18:	b580      	push	{r7, lr}
 8024b1a:	b084      	sub	sp, #16
 8024b1c:	af00      	add	r7, sp, #0
 8024b1e:	6078      	str	r0, [r7, #4]
  int i;

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024b20:	2300      	movs	r3, #0
 8024b22:	60fb      	str	r3, [r7, #12]
 8024b24:	e01e      	b.n	8024b64 <etharp_cleanup_netif+0x4c>
    u8_t state = arp_table[i].state;
 8024b26:	4913      	ldr	r1, [pc, #76]	@ (8024b74 <etharp_cleanup_netif+0x5c>)
 8024b28:	68fa      	ldr	r2, [r7, #12]
 8024b2a:	4613      	mov	r3, r2
 8024b2c:	005b      	lsls	r3, r3, #1
 8024b2e:	4413      	add	r3, r2
 8024b30:	00db      	lsls	r3, r3, #3
 8024b32:	440b      	add	r3, r1
 8024b34:	3314      	adds	r3, #20
 8024b36:	781b      	ldrb	r3, [r3, #0]
 8024b38:	72fb      	strb	r3, [r7, #11]
    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
 8024b3a:	7afb      	ldrb	r3, [r7, #11]
 8024b3c:	2b00      	cmp	r3, #0
 8024b3e:	d00e      	beq.n	8024b5e <etharp_cleanup_netif+0x46>
 8024b40:	490c      	ldr	r1, [pc, #48]	@ (8024b74 <etharp_cleanup_netif+0x5c>)
 8024b42:	68fa      	ldr	r2, [r7, #12]
 8024b44:	4613      	mov	r3, r2
 8024b46:	005b      	lsls	r3, r3, #1
 8024b48:	4413      	add	r3, r2
 8024b4a:	00db      	lsls	r3, r3, #3
 8024b4c:	440b      	add	r3, r1
 8024b4e:	3308      	adds	r3, #8
 8024b50:	681b      	ldr	r3, [r3, #0]
 8024b52:	687a      	ldr	r2, [r7, #4]
 8024b54:	429a      	cmp	r2, r3
 8024b56:	d102      	bne.n	8024b5e <etharp_cleanup_netif+0x46>
      etharp_free_entry(i);
 8024b58:	68f8      	ldr	r0, [r7, #12]
 8024b5a:	f7ff fcb7 	bl	80244cc <etharp_free_entry>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024b5e:	68fb      	ldr	r3, [r7, #12]
 8024b60:	3301      	adds	r3, #1
 8024b62:	60fb      	str	r3, [r7, #12]
 8024b64:	68fb      	ldr	r3, [r7, #12]
 8024b66:	2b09      	cmp	r3, #9
 8024b68:	dddd      	ble.n	8024b26 <etharp_cleanup_netif+0xe>
    }
  }
}
 8024b6a:	bf00      	nop
 8024b6c:	bf00      	nop
 8024b6e:	3710      	adds	r7, #16
 8024b70:	46bd      	mov	sp, r7
 8024b72:	bd80      	pop	{r7, pc}
 8024b74:	2402b000 	.word	0x2402b000

08024b78 <etharp_input>:
 *
 * @see pbuf_free()
 */
void
etharp_input(struct pbuf *p, struct netif *netif)
{
 8024b78:	b5b0      	push	{r4, r5, r7, lr}
 8024b7a:	b08a      	sub	sp, #40	@ 0x28
 8024b7c:	af04      	add	r7, sp, #16
 8024b7e:	6078      	str	r0, [r7, #4]
 8024b80:	6039      	str	r1, [r7, #0]
  struct etharp_hdr *hdr;
  /* these are aligned properly, whereas the ARP header fields might not be */
  ip4_addr_t sipaddr, dipaddr;
  u8_t for_us;

  LWIP_ASSERT_CORE_LOCKED();
 8024b82:	f7ec f9bd 	bl	8010f00 <sys_check_core_locking>

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8024b86:	683b      	ldr	r3, [r7, #0]
 8024b88:	2b00      	cmp	r3, #0
 8024b8a:	d107      	bne.n	8024b9c <etharp_input+0x24>
 8024b8c:	4b3f      	ldr	r3, [pc, #252]	@ (8024c8c <etharp_input+0x114>)
 8024b8e:	f240 228a 	movw	r2, #650	@ 0x28a
 8024b92:	493f      	ldr	r1, [pc, #252]	@ (8024c90 <etharp_input+0x118>)
 8024b94:	483f      	ldr	r0, [pc, #252]	@ (8024c94 <etharp_input+0x11c>)
 8024b96:	f005 fde1 	bl	802a75c <iprintf>
 8024b9a:	e074      	b.n	8024c86 <etharp_input+0x10e>

  hdr = (struct etharp_hdr *)p->payload;
 8024b9c:	687b      	ldr	r3, [r7, #4]
 8024b9e:	685b      	ldr	r3, [r3, #4]
 8024ba0:	617b      	str	r3, [r7, #20]

  /* RFC 826 "Packet Reception": */
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024ba2:	697b      	ldr	r3, [r7, #20]
 8024ba4:	881b      	ldrh	r3, [r3, #0]
 8024ba6:	b29b      	uxth	r3, r3
 8024ba8:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8024bac:	d10c      	bne.n	8024bc8 <etharp_input+0x50>
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8024bae:	697b      	ldr	r3, [r7, #20]
 8024bb0:	791b      	ldrb	r3, [r3, #4]
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024bb2:	2b06      	cmp	r3, #6
 8024bb4:	d108      	bne.n	8024bc8 <etharp_input+0x50>
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024bb6:	697b      	ldr	r3, [r7, #20]
 8024bb8:	795b      	ldrb	r3, [r3, #5]
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8024bba:	2b04      	cmp	r3, #4
 8024bbc:	d104      	bne.n	8024bc8 <etharp_input+0x50>
      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
 8024bbe:	697b      	ldr	r3, [r7, #20]
 8024bc0:	885b      	ldrh	r3, [r3, #2]
 8024bc2:	b29b      	uxth	r3, r3
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024bc4:	2b08      	cmp	r3, #8
 8024bc6:	d003      	beq.n	8024bd0 <etharp_input+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
    ETHARP_STATS_INC(etharp.proterr);
    ETHARP_STATS_INC(etharp.drop);
    pbuf_free(p);
 8024bc8:	6878      	ldr	r0, [r7, #4]
 8024bca:	f7f6 fb4f 	bl	801b26c <pbuf_free>
    return;
 8024bce:	e05a      	b.n	8024c86 <etharp_input+0x10e>
  autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */

  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing (not using structure copy which breaks strict-aliasing rules). */
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
 8024bd0:	697b      	ldr	r3, [r7, #20]
 8024bd2:	330e      	adds	r3, #14
 8024bd4:	681b      	ldr	r3, [r3, #0]
 8024bd6:	60fb      	str	r3, [r7, #12]
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
 8024bd8:	697b      	ldr	r3, [r7, #20]
 8024bda:	3318      	adds	r3, #24
 8024bdc:	681b      	ldr	r3, [r3, #0]
 8024bde:	60bb      	str	r3, [r7, #8]

  /* this interface is not configured? */
  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8024be0:	683b      	ldr	r3, [r7, #0]
 8024be2:	3304      	adds	r3, #4
 8024be4:	681b      	ldr	r3, [r3, #0]
 8024be6:	2b00      	cmp	r3, #0
 8024be8:	d102      	bne.n	8024bf0 <etharp_input+0x78>
    for_us = 0;
 8024bea:	2300      	movs	r3, #0
 8024bec:	74fb      	strb	r3, [r7, #19]
 8024bee:	e009      	b.n	8024c04 <etharp_input+0x8c>
  } else {
    /* ARP packet directed to us? */
    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
 8024bf0:	68ba      	ldr	r2, [r7, #8]
 8024bf2:	683b      	ldr	r3, [r7, #0]
 8024bf4:	3304      	adds	r3, #4
 8024bf6:	681b      	ldr	r3, [r3, #0]
 8024bf8:	429a      	cmp	r2, r3
 8024bfa:	bf0c      	ite	eq
 8024bfc:	2301      	moveq	r3, #1
 8024bfe:	2300      	movne	r3, #0
 8024c00:	b2db      	uxtb	r3, r3
 8024c02:	74fb      	strb	r3, [r7, #19]
  /* ARP message directed to us?
      -> add IP address in ARP cache; assume requester wants to talk to us,
         can result in directly sending the queued packets for this host.
     ARP message not directed to us?
      ->  update the source IP address in the cache, if present */
  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
 8024c04:	697b      	ldr	r3, [r7, #20]
 8024c06:	f103 0208 	add.w	r2, r3, #8
 8024c0a:	7cfb      	ldrb	r3, [r7, #19]
 8024c0c:	2b00      	cmp	r3, #0
 8024c0e:	d001      	beq.n	8024c14 <etharp_input+0x9c>
 8024c10:	2301      	movs	r3, #1
 8024c12:	e000      	b.n	8024c16 <etharp_input+0x9e>
 8024c14:	2302      	movs	r3, #2
 8024c16:	f107 010c 	add.w	r1, r7, #12
 8024c1a:	6838      	ldr	r0, [r7, #0]
 8024c1c:	f7ff fed6 	bl	80249cc <etharp_update_arp_entry>
                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);

  /* now act on the message itself */
  switch (hdr->opcode) {
 8024c20:	697b      	ldr	r3, [r7, #20]
 8024c22:	88db      	ldrh	r3, [r3, #6]
 8024c24:	b29b      	uxth	r3, r3
 8024c26:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8024c2a:	d003      	beq.n	8024c34 <etharp_input+0xbc>
 8024c2c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 8024c30:	d01e      	beq.n	8024c70 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
      break;
    default:
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
      ETHARP_STATS_INC(etharp.err);
      break;
 8024c32:	e025      	b.n	8024c80 <etharp_input+0x108>
      if (for_us) {
 8024c34:	7cfb      	ldrb	r3, [r7, #19]
 8024c36:	2b00      	cmp	r3, #0
 8024c38:	d021      	beq.n	8024c7e <etharp_input+0x106>
                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
 8024c3a:	683b      	ldr	r3, [r7, #0]
 8024c3c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8024c40:	697b      	ldr	r3, [r7, #20]
 8024c42:	f103 0408 	add.w	r4, r3, #8
                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
 8024c46:	683b      	ldr	r3, [r7, #0]
 8024c48:	f103 052a 	add.w	r5, r3, #42	@ 0x2a
 8024c4c:	683b      	ldr	r3, [r7, #0]
 8024c4e:	3304      	adds	r3, #4
                   &hdr->shwaddr, &sipaddr,
 8024c50:	697a      	ldr	r2, [r7, #20]
 8024c52:	3208      	adds	r2, #8
        etharp_raw(netif,
 8024c54:	2102      	movs	r1, #2
 8024c56:	9103      	str	r1, [sp, #12]
 8024c58:	f107 010c 	add.w	r1, r7, #12
 8024c5c:	9102      	str	r1, [sp, #8]
 8024c5e:	9201      	str	r2, [sp, #4]
 8024c60:	9300      	str	r3, [sp, #0]
 8024c62:	462b      	mov	r3, r5
 8024c64:	4622      	mov	r2, r4
 8024c66:	4601      	mov	r1, r0
 8024c68:	6838      	ldr	r0, [r7, #0]
 8024c6a:	f000 faf1 	bl	8025250 <etharp_raw>
      break;
 8024c6e:	e006      	b.n	8024c7e <etharp_input+0x106>
      dhcp_arp_reply(netif, &sipaddr);
 8024c70:	f107 030c 	add.w	r3, r7, #12
 8024c74:	4619      	mov	r1, r3
 8024c76:	6838      	ldr	r0, [r7, #0]
 8024c78:	f7fe f9b6 	bl	8022fe8 <dhcp_arp_reply>
      break;
 8024c7c:	e000      	b.n	8024c80 <etharp_input+0x108>
      break;
 8024c7e:	bf00      	nop
  }
  /* free ARP packet */
  pbuf_free(p);
 8024c80:	6878      	ldr	r0, [r7, #4]
 8024c82:	f7f6 faf3 	bl	801b26c <pbuf_free>
}
 8024c86:	3718      	adds	r7, #24
 8024c88:	46bd      	mov	sp, r7
 8024c8a:	bdb0      	pop	{r4, r5, r7, pc}
 8024c8c:	080310d8 	.word	0x080310d8
 8024c90:	08031228 	.word	0x08031228
 8024c94:	08031150 	.word	0x08031150

08024c98 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
 * in the arp_table specified by the index 'arp_idx'.
 */
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
 8024c98:	b580      	push	{r7, lr}
 8024c9a:	b086      	sub	sp, #24
 8024c9c:	af02      	add	r7, sp, #8
 8024c9e:	60f8      	str	r0, [r7, #12]
 8024ca0:	60b9      	str	r1, [r7, #8]
 8024ca2:	4613      	mov	r3, r2
 8024ca4:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
 8024ca6:	79fa      	ldrb	r2, [r7, #7]
 8024ca8:	4944      	ldr	r1, [pc, #272]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024caa:	4613      	mov	r3, r2
 8024cac:	005b      	lsls	r3, r3, #1
 8024cae:	4413      	add	r3, r2
 8024cb0:	00db      	lsls	r3, r3, #3
 8024cb2:	440b      	add	r3, r1
 8024cb4:	3314      	adds	r3, #20
 8024cb6:	781b      	ldrb	r3, [r3, #0]
 8024cb8:	2b01      	cmp	r3, #1
 8024cba:	d806      	bhi.n	8024cca <etharp_output_to_arp_index+0x32>
 8024cbc:	4b40      	ldr	r3, [pc, #256]	@ (8024dc0 <etharp_output_to_arp_index+0x128>)
 8024cbe:	f240 22ee 	movw	r2, #750	@ 0x2ee
 8024cc2:	4940      	ldr	r1, [pc, #256]	@ (8024dc4 <etharp_output_to_arp_index+0x12c>)
 8024cc4:	4840      	ldr	r0, [pc, #256]	@ (8024dc8 <etharp_output_to_arp_index+0x130>)
 8024cc6:	f005 fd49 	bl	802a75c <iprintf>
              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
  /* if arp table entry is about to expire: re-request it,
     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
     network with ARP requests if this address is used frequently. */
  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
 8024cca:	79fa      	ldrb	r2, [r7, #7]
 8024ccc:	493b      	ldr	r1, [pc, #236]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024cce:	4613      	mov	r3, r2
 8024cd0:	005b      	lsls	r3, r3, #1
 8024cd2:	4413      	add	r3, r2
 8024cd4:	00db      	lsls	r3, r3, #3
 8024cd6:	440b      	add	r3, r1
 8024cd8:	3314      	adds	r3, #20
 8024cda:	781b      	ldrb	r3, [r3, #0]
 8024cdc:	2b02      	cmp	r3, #2
 8024cde:	d153      	bne.n	8024d88 <etharp_output_to_arp_index+0xf0>
    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
 8024ce0:	79fa      	ldrb	r2, [r7, #7]
 8024ce2:	4936      	ldr	r1, [pc, #216]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024ce4:	4613      	mov	r3, r2
 8024ce6:	005b      	lsls	r3, r3, #1
 8024ce8:	4413      	add	r3, r2
 8024cea:	00db      	lsls	r3, r3, #3
 8024cec:	440b      	add	r3, r1
 8024cee:	3312      	adds	r3, #18
 8024cf0:	881b      	ldrh	r3, [r3, #0]
 8024cf2:	f5b3 7f8e 	cmp.w	r3, #284	@ 0x11c
 8024cf6:	d919      	bls.n	8024d2c <etharp_output_to_arp_index+0x94>
      /* issue a standard request using broadcast */
      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
 8024cf8:	79fa      	ldrb	r2, [r7, #7]
 8024cfa:	4613      	mov	r3, r2
 8024cfc:	005b      	lsls	r3, r3, #1
 8024cfe:	4413      	add	r3, r2
 8024d00:	00db      	lsls	r3, r3, #3
 8024d02:	4a2e      	ldr	r2, [pc, #184]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d04:	4413      	add	r3, r2
 8024d06:	3304      	adds	r3, #4
 8024d08:	4619      	mov	r1, r3
 8024d0a:	68f8      	ldr	r0, [r7, #12]
 8024d0c:	f000 fb4e 	bl	80253ac <etharp_request>
 8024d10:	4603      	mov	r3, r0
 8024d12:	2b00      	cmp	r3, #0
 8024d14:	d138      	bne.n	8024d88 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8024d16:	79fa      	ldrb	r2, [r7, #7]
 8024d18:	4928      	ldr	r1, [pc, #160]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d1a:	4613      	mov	r3, r2
 8024d1c:	005b      	lsls	r3, r3, #1
 8024d1e:	4413      	add	r3, r2
 8024d20:	00db      	lsls	r3, r3, #3
 8024d22:	440b      	add	r3, r1
 8024d24:	3314      	adds	r3, #20
 8024d26:	2203      	movs	r2, #3
 8024d28:	701a      	strb	r2, [r3, #0]
 8024d2a:	e02d      	b.n	8024d88 <etharp_output_to_arp_index+0xf0>
      }
    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
 8024d2c:	79fa      	ldrb	r2, [r7, #7]
 8024d2e:	4923      	ldr	r1, [pc, #140]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d30:	4613      	mov	r3, r2
 8024d32:	005b      	lsls	r3, r3, #1
 8024d34:	4413      	add	r3, r2
 8024d36:	00db      	lsls	r3, r3, #3
 8024d38:	440b      	add	r3, r1
 8024d3a:	3312      	adds	r3, #18
 8024d3c:	881b      	ldrh	r3, [r3, #0]
 8024d3e:	f5b3 7f87 	cmp.w	r3, #270	@ 0x10e
 8024d42:	d321      	bcc.n	8024d88 <etharp_output_to_arp_index+0xf0>
      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
 8024d44:	79fa      	ldrb	r2, [r7, #7]
 8024d46:	4613      	mov	r3, r2
 8024d48:	005b      	lsls	r3, r3, #1
 8024d4a:	4413      	add	r3, r2
 8024d4c:	00db      	lsls	r3, r3, #3
 8024d4e:	4a1b      	ldr	r2, [pc, #108]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d50:	4413      	add	r3, r2
 8024d52:	1d19      	adds	r1, r3, #4
 8024d54:	79fa      	ldrb	r2, [r7, #7]
 8024d56:	4613      	mov	r3, r2
 8024d58:	005b      	lsls	r3, r3, #1
 8024d5a:	4413      	add	r3, r2
 8024d5c:	00db      	lsls	r3, r3, #3
 8024d5e:	3308      	adds	r3, #8
 8024d60:	4a16      	ldr	r2, [pc, #88]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d62:	4413      	add	r3, r2
 8024d64:	3304      	adds	r3, #4
 8024d66:	461a      	mov	r2, r3
 8024d68:	68f8      	ldr	r0, [r7, #12]
 8024d6a:	f000 fafd 	bl	8025368 <etharp_request_dst>
 8024d6e:	4603      	mov	r3, r0
 8024d70:	2b00      	cmp	r3, #0
 8024d72:	d109      	bne.n	8024d88 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8024d74:	79fa      	ldrb	r2, [r7, #7]
 8024d76:	4911      	ldr	r1, [pc, #68]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d78:	4613      	mov	r3, r2
 8024d7a:	005b      	lsls	r3, r3, #1
 8024d7c:	4413      	add	r3, r2
 8024d7e:	00db      	lsls	r3, r3, #3
 8024d80:	440b      	add	r3, r1
 8024d82:	3314      	adds	r3, #20
 8024d84:	2203      	movs	r2, #3
 8024d86:	701a      	strb	r2, [r3, #0]
      }
    }
  }

  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
 8024d88:	68fb      	ldr	r3, [r7, #12]
 8024d8a:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
 8024d8e:	79fa      	ldrb	r2, [r7, #7]
 8024d90:	4613      	mov	r3, r2
 8024d92:	005b      	lsls	r3, r3, #1
 8024d94:	4413      	add	r3, r2
 8024d96:	00db      	lsls	r3, r3, #3
 8024d98:	3308      	adds	r3, #8
 8024d9a:	4a08      	ldr	r2, [pc, #32]	@ (8024dbc <etharp_output_to_arp_index+0x124>)
 8024d9c:	4413      	add	r3, r2
 8024d9e:	3304      	adds	r3, #4
 8024da0:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 8024da4:	9200      	str	r2, [sp, #0]
 8024da6:	460a      	mov	r2, r1
 8024da8:	68b9      	ldr	r1, [r7, #8]
 8024daa:	68f8      	ldr	r0, [r7, #12]
 8024dac:	f002 f85e 	bl	8026e6c <ethernet_output>
 8024db0:	4603      	mov	r3, r0
}
 8024db2:	4618      	mov	r0, r3
 8024db4:	3710      	adds	r7, #16
 8024db6:	46bd      	mov	sp, r7
 8024db8:	bd80      	pop	{r7, pc}
 8024dba:	bf00      	nop
 8024dbc:	2402b000 	.word	0x2402b000
 8024dc0:	080310d8 	.word	0x080310d8
 8024dc4:	08031248 	.word	0x08031248
 8024dc8:	08031150 	.word	0x08031150

08024dcc <etharp_output>:
 * - ERR_RTE No route to destination (no gateway to external networks),
 * or the return type of either etharp_query() or ethernet_output().
 */
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
 8024dcc:	b580      	push	{r7, lr}
 8024dce:	b08a      	sub	sp, #40	@ 0x28
 8024dd0:	af02      	add	r7, sp, #8
 8024dd2:	60f8      	str	r0, [r7, #12]
 8024dd4:	60b9      	str	r1, [r7, #8]
 8024dd6:	607a      	str	r2, [r7, #4]
  const struct eth_addr *dest;
  struct eth_addr mcastaddr;
  const ip4_addr_t *dst_addr = ipaddr;
 8024dd8:	687b      	ldr	r3, [r7, #4]
 8024dda:	61bb      	str	r3, [r7, #24]

  LWIP_ASSERT_CORE_LOCKED();
 8024ddc:	f7ec f890 	bl	8010f00 <sys_check_core_locking>
  LWIP_ASSERT("netif != NULL", netif != NULL);
 8024de0:	68fb      	ldr	r3, [r7, #12]
 8024de2:	2b00      	cmp	r3, #0
 8024de4:	d106      	bne.n	8024df4 <etharp_output+0x28>
 8024de6:	4b73      	ldr	r3, [pc, #460]	@ (8024fb4 <etharp_output+0x1e8>)
 8024de8:	f240 321e 	movw	r2, #798	@ 0x31e
 8024dec:	4972      	ldr	r1, [pc, #456]	@ (8024fb8 <etharp_output+0x1ec>)
 8024dee:	4873      	ldr	r0, [pc, #460]	@ (8024fbc <etharp_output+0x1f0>)
 8024df0:	f005 fcb4 	bl	802a75c <iprintf>
  LWIP_ASSERT("q != NULL", q != NULL);
 8024df4:	68bb      	ldr	r3, [r7, #8]
 8024df6:	2b00      	cmp	r3, #0
 8024df8:	d106      	bne.n	8024e08 <etharp_output+0x3c>
 8024dfa:	4b6e      	ldr	r3, [pc, #440]	@ (8024fb4 <etharp_output+0x1e8>)
 8024dfc:	f240 321f 	movw	r2, #799	@ 0x31f
 8024e00:	496f      	ldr	r1, [pc, #444]	@ (8024fc0 <etharp_output+0x1f4>)
 8024e02:	486e      	ldr	r0, [pc, #440]	@ (8024fbc <etharp_output+0x1f0>)
 8024e04:	f005 fcaa 	bl	802a75c <iprintf>
  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
 8024e08:	687b      	ldr	r3, [r7, #4]
 8024e0a:	2b00      	cmp	r3, #0
 8024e0c:	d106      	bne.n	8024e1c <etharp_output+0x50>
 8024e0e:	4b69      	ldr	r3, [pc, #420]	@ (8024fb4 <etharp_output+0x1e8>)
 8024e10:	f44f 7248 	mov.w	r2, #800	@ 0x320
 8024e14:	496b      	ldr	r1, [pc, #428]	@ (8024fc4 <etharp_output+0x1f8>)
 8024e16:	4869      	ldr	r0, [pc, #420]	@ (8024fbc <etharp_output+0x1f0>)
 8024e18:	f005 fca0 	bl	802a75c <iprintf>

  /* Determine on destination hardware address. Broadcasts and multicasts
   * are special, other IP addresses are looked up in the ARP table. */

  /* broadcast destination IP address? */
  if (ip4_addr_isbroadcast(ipaddr, netif)) {
 8024e1c:	687b      	ldr	r3, [r7, #4]
 8024e1e:	681b      	ldr	r3, [r3, #0]
 8024e20:	68f9      	ldr	r1, [r7, #12]
 8024e22:	4618      	mov	r0, r3
 8024e24:	f000 ff44 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8024e28:	4603      	mov	r3, r0
 8024e2a:	2b00      	cmp	r3, #0
 8024e2c:	d002      	beq.n	8024e34 <etharp_output+0x68>
    /* broadcast on Ethernet also */
    dest = (const struct eth_addr *)&ethbroadcast;
 8024e2e:	4b66      	ldr	r3, [pc, #408]	@ (8024fc8 <etharp_output+0x1fc>)
 8024e30:	61fb      	str	r3, [r7, #28]
 8024e32:	e0af      	b.n	8024f94 <etharp_output+0x1c8>
    /* multicast destination IP address? */
  } else if (ip4_addr_ismulticast(ipaddr)) {
 8024e34:	687b      	ldr	r3, [r7, #4]
 8024e36:	681b      	ldr	r3, [r3, #0]
 8024e38:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8024e3c:	2be0      	cmp	r3, #224	@ 0xe0
 8024e3e:	d118      	bne.n	8024e72 <etharp_output+0xa6>
    /* Hash IP multicast address to MAC address.*/
    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
 8024e40:	2301      	movs	r3, #1
 8024e42:	743b      	strb	r3, [r7, #16]
    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
 8024e44:	2300      	movs	r3, #0
 8024e46:	747b      	strb	r3, [r7, #17]
    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
 8024e48:	235e      	movs	r3, #94	@ 0x5e
 8024e4a:	74bb      	strb	r3, [r7, #18]
    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
 8024e4c:	687b      	ldr	r3, [r7, #4]
 8024e4e:	3301      	adds	r3, #1
 8024e50:	781b      	ldrb	r3, [r3, #0]
 8024e52:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8024e56:	b2db      	uxtb	r3, r3
 8024e58:	74fb      	strb	r3, [r7, #19]
    mcastaddr.addr[4] = ip4_addr3(ipaddr);
 8024e5a:	687b      	ldr	r3, [r7, #4]
 8024e5c:	3302      	adds	r3, #2
 8024e5e:	781b      	ldrb	r3, [r3, #0]
 8024e60:	753b      	strb	r3, [r7, #20]
    mcastaddr.addr[5] = ip4_addr4(ipaddr);
 8024e62:	687b      	ldr	r3, [r7, #4]
 8024e64:	3303      	adds	r3, #3
 8024e66:	781b      	ldrb	r3, [r3, #0]
 8024e68:	757b      	strb	r3, [r7, #21]
    /* destination Ethernet address is multicast */
    dest = &mcastaddr;
 8024e6a:	f107 0310 	add.w	r3, r7, #16
 8024e6e:	61fb      	str	r3, [r7, #28]
 8024e70:	e090      	b.n	8024f94 <etharp_output+0x1c8>
    /* unicast destination IP address? */
  } else {
    netif_addr_idx_t i;
    /* outside local network? if so, this can neither be a global broadcast nor
       a subnet broadcast. */
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8024e72:	687b      	ldr	r3, [r7, #4]
 8024e74:	681a      	ldr	r2, [r3, #0]
 8024e76:	68fb      	ldr	r3, [r7, #12]
 8024e78:	3304      	adds	r3, #4
 8024e7a:	681b      	ldr	r3, [r3, #0]
 8024e7c:	405a      	eors	r2, r3
 8024e7e:	68fb      	ldr	r3, [r7, #12]
 8024e80:	3308      	adds	r3, #8
 8024e82:	681b      	ldr	r3, [r3, #0]
 8024e84:	4013      	ands	r3, r2
 8024e86:	2b00      	cmp	r3, #0
 8024e88:	d012      	beq.n	8024eb0 <etharp_output+0xe4>
        !ip4_addr_islinklocal(ipaddr)) {
 8024e8a:	687b      	ldr	r3, [r7, #4]
 8024e8c:	681b      	ldr	r3, [r3, #0]
 8024e8e:	b29b      	uxth	r3, r3
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8024e90:	f64f 62a9 	movw	r2, #65193	@ 0xfea9
 8024e94:	4293      	cmp	r3, r2
 8024e96:	d00b      	beq.n	8024eb0 <etharp_output+0xe4>
        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
        if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
        {
          /* interface has default gateway? */
          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
 8024e98:	68fb      	ldr	r3, [r7, #12]
 8024e9a:	330c      	adds	r3, #12
 8024e9c:	681b      	ldr	r3, [r3, #0]
 8024e9e:	2b00      	cmp	r3, #0
 8024ea0:	d003      	beq.n	8024eaa <etharp_output+0xde>
            /* send to hardware address of default gateway IP address */
            dst_addr = netif_ip4_gw(netif);
 8024ea2:	68fb      	ldr	r3, [r7, #12]
 8024ea4:	330c      	adds	r3, #12
 8024ea6:	61bb      	str	r3, [r7, #24]
 8024ea8:	e002      	b.n	8024eb0 <etharp_output+0xe4>
            /* no default gateway available */
          } else {
            /* no route to destination error (default gateway missing) */
            return ERR_RTE;
 8024eaa:	f06f 0303 	mvn.w	r3, #3
 8024eae:	e07d      	b.n	8024fac <etharp_output+0x1e0>
    if (netif->hints != NULL) {
      /* per-pcb cached entry was given */
      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
      if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024eb0:	4b46      	ldr	r3, [pc, #280]	@ (8024fcc <etharp_output+0x200>)
 8024eb2:	781b      	ldrb	r3, [r3, #0]
 8024eb4:	4619      	mov	r1, r3
 8024eb6:	4a46      	ldr	r2, [pc, #280]	@ (8024fd0 <etharp_output+0x204>)
 8024eb8:	460b      	mov	r3, r1
 8024eba:	005b      	lsls	r3, r3, #1
 8024ebc:	440b      	add	r3, r1
 8024ebe:	00db      	lsls	r3, r3, #3
 8024ec0:	4413      	add	r3, r2
 8024ec2:	3314      	adds	r3, #20
 8024ec4:	781b      	ldrb	r3, [r3, #0]
 8024ec6:	2b01      	cmp	r3, #1
 8024ec8:	d925      	bls.n	8024f16 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
            (arp_table[etharp_cached_entry].netif == netif) &&
 8024eca:	4b40      	ldr	r3, [pc, #256]	@ (8024fcc <etharp_output+0x200>)
 8024ecc:	781b      	ldrb	r3, [r3, #0]
 8024ece:	4619      	mov	r1, r3
 8024ed0:	4a3f      	ldr	r2, [pc, #252]	@ (8024fd0 <etharp_output+0x204>)
 8024ed2:	460b      	mov	r3, r1
 8024ed4:	005b      	lsls	r3, r3, #1
 8024ed6:	440b      	add	r3, r1
 8024ed8:	00db      	lsls	r3, r3, #3
 8024eda:	4413      	add	r3, r2
 8024edc:	3308      	adds	r3, #8
 8024ede:	681b      	ldr	r3, [r3, #0]
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 8024ee0:	68fa      	ldr	r2, [r7, #12]
 8024ee2:	429a      	cmp	r2, r3
 8024ee4:	d117      	bne.n	8024f16 <etharp_output+0x14a>
#endif
            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
 8024ee6:	69bb      	ldr	r3, [r7, #24]
 8024ee8:	681a      	ldr	r2, [r3, #0]
 8024eea:	4b38      	ldr	r3, [pc, #224]	@ (8024fcc <etharp_output+0x200>)
 8024eec:	781b      	ldrb	r3, [r3, #0]
 8024eee:	4618      	mov	r0, r3
 8024ef0:	4937      	ldr	r1, [pc, #220]	@ (8024fd0 <etharp_output+0x204>)
 8024ef2:	4603      	mov	r3, r0
 8024ef4:	005b      	lsls	r3, r3, #1
 8024ef6:	4403      	add	r3, r0
 8024ef8:	00db      	lsls	r3, r3, #3
 8024efa:	440b      	add	r3, r1
 8024efc:	3304      	adds	r3, #4
 8024efe:	681b      	ldr	r3, [r3, #0]
            (arp_table[etharp_cached_entry].netif == netif) &&
 8024f00:	429a      	cmp	r2, r3
 8024f02:	d108      	bne.n	8024f16 <etharp_output+0x14a>
          /* the per-pcb-cached entry is stable and the right one! */
          ETHARP_STATS_INC(etharp.cachehit);
          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
 8024f04:	4b31      	ldr	r3, [pc, #196]	@ (8024fcc <etharp_output+0x200>)
 8024f06:	781b      	ldrb	r3, [r3, #0]
 8024f08:	461a      	mov	r2, r3
 8024f0a:	68b9      	ldr	r1, [r7, #8]
 8024f0c:	68f8      	ldr	r0, [r7, #12]
 8024f0e:	f7ff fec3 	bl	8024c98 <etharp_output_to_arp_index>
 8024f12:	4603      	mov	r3, r0
 8024f14:	e04a      	b.n	8024fac <etharp_output+0x1e0>
    }
#endif /* LWIP_NETIF_HWADDRHINT */

    /* find stable entry: do this here since this is a critical path for
       throughput and etharp_find_entry() is kind of slow */
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8024f16:	2300      	movs	r3, #0
 8024f18:	75fb      	strb	r3, [r7, #23]
 8024f1a:	e031      	b.n	8024f80 <etharp_output+0x1b4>
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 8024f1c:	7dfa      	ldrb	r2, [r7, #23]
 8024f1e:	492c      	ldr	r1, [pc, #176]	@ (8024fd0 <etharp_output+0x204>)
 8024f20:	4613      	mov	r3, r2
 8024f22:	005b      	lsls	r3, r3, #1
 8024f24:	4413      	add	r3, r2
 8024f26:	00db      	lsls	r3, r3, #3
 8024f28:	440b      	add	r3, r1
 8024f2a:	3314      	adds	r3, #20
 8024f2c:	781b      	ldrb	r3, [r3, #0]
 8024f2e:	2b01      	cmp	r3, #1
 8024f30:	d923      	bls.n	8024f7a <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
          (arp_table[i].netif == netif) &&
 8024f32:	7dfa      	ldrb	r2, [r7, #23]
 8024f34:	4926      	ldr	r1, [pc, #152]	@ (8024fd0 <etharp_output+0x204>)
 8024f36:	4613      	mov	r3, r2
 8024f38:	005b      	lsls	r3, r3, #1
 8024f3a:	4413      	add	r3, r2
 8024f3c:	00db      	lsls	r3, r3, #3
 8024f3e:	440b      	add	r3, r1
 8024f40:	3308      	adds	r3, #8
 8024f42:	681b      	ldr	r3, [r3, #0]
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 8024f44:	68fa      	ldr	r2, [r7, #12]
 8024f46:	429a      	cmp	r2, r3
 8024f48:	d117      	bne.n	8024f7a <etharp_output+0x1ae>
#endif
          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
 8024f4a:	69bb      	ldr	r3, [r7, #24]
 8024f4c:	6819      	ldr	r1, [r3, #0]
 8024f4e:	7dfa      	ldrb	r2, [r7, #23]
 8024f50:	481f      	ldr	r0, [pc, #124]	@ (8024fd0 <etharp_output+0x204>)
 8024f52:	4613      	mov	r3, r2
 8024f54:	005b      	lsls	r3, r3, #1
 8024f56:	4413      	add	r3, r2
 8024f58:	00db      	lsls	r3, r3, #3
 8024f5a:	4403      	add	r3, r0
 8024f5c:	3304      	adds	r3, #4
 8024f5e:	681b      	ldr	r3, [r3, #0]
          (arp_table[i].netif == netif) &&
 8024f60:	4299      	cmp	r1, r3
 8024f62:	d10a      	bne.n	8024f7a <etharp_output+0x1ae>
        /* found an existing, stable entry */
        ETHARP_SET_ADDRHINT(netif, i);
 8024f64:	4a19      	ldr	r2, [pc, #100]	@ (8024fcc <etharp_output+0x200>)
 8024f66:	7dfb      	ldrb	r3, [r7, #23]
 8024f68:	7013      	strb	r3, [r2, #0]
        return etharp_output_to_arp_index(netif, q, i);
 8024f6a:	7dfb      	ldrb	r3, [r7, #23]
 8024f6c:	461a      	mov	r2, r3
 8024f6e:	68b9      	ldr	r1, [r7, #8]
 8024f70:	68f8      	ldr	r0, [r7, #12]
 8024f72:	f7ff fe91 	bl	8024c98 <etharp_output_to_arp_index>
 8024f76:	4603      	mov	r3, r0
 8024f78:	e018      	b.n	8024fac <etharp_output+0x1e0>
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8024f7a:	7dfb      	ldrb	r3, [r7, #23]
 8024f7c:	3301      	adds	r3, #1
 8024f7e:	75fb      	strb	r3, [r7, #23]
 8024f80:	7dfb      	ldrb	r3, [r7, #23]
 8024f82:	2b09      	cmp	r3, #9
 8024f84:	d9ca      	bls.n	8024f1c <etharp_output+0x150>
      }
    }
    /* no stable entry found, use the (slower) query function:
       queue on destination Ethernet address belonging to ipaddr */
    return etharp_query(netif, dst_addr, q);
 8024f86:	68ba      	ldr	r2, [r7, #8]
 8024f88:	69b9      	ldr	r1, [r7, #24]
 8024f8a:	68f8      	ldr	r0, [r7, #12]
 8024f8c:	f000 f822 	bl	8024fd4 <etharp_query>
 8024f90:	4603      	mov	r3, r0
 8024f92:	e00b      	b.n	8024fac <etharp_output+0x1e0>
  }

  /* continuation for multicast/broadcast destinations */
  /* obtain source Ethernet address of the given interface */
  /* send packet directly on the link */
  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
 8024f94:	68fb      	ldr	r3, [r7, #12]
 8024f96:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8024f9a:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8024f9e:	9300      	str	r3, [sp, #0]
 8024fa0:	69fb      	ldr	r3, [r7, #28]
 8024fa2:	68b9      	ldr	r1, [r7, #8]
 8024fa4:	68f8      	ldr	r0, [r7, #12]
 8024fa6:	f001 ff61 	bl	8026e6c <ethernet_output>
 8024faa:	4603      	mov	r3, r0
}
 8024fac:	4618      	mov	r0, r3
 8024fae:	3720      	adds	r7, #32
 8024fb0:	46bd      	mov	sp, r7
 8024fb2:	bd80      	pop	{r7, pc}
 8024fb4:	080310d8 	.word	0x080310d8
 8024fb8:	08031228 	.word	0x08031228
 8024fbc:	08031150 	.word	0x08031150
 8024fc0:	08031278 	.word	0x08031278
 8024fc4:	08031218 	.word	0x08031218
 8024fc8:	08031b60 	.word	0x08031b60
 8024fcc:	2402b0f0 	.word	0x2402b0f0
 8024fd0:	2402b000 	.word	0x2402b000

08024fd4 <etharp_query>:
 * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
 *
 */
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
 8024fd4:	b580      	push	{r7, lr}
 8024fd6:	b08c      	sub	sp, #48	@ 0x30
 8024fd8:	af02      	add	r7, sp, #8
 8024fda:	60f8      	str	r0, [r7, #12]
 8024fdc:	60b9      	str	r1, [r7, #8]
 8024fde:	607a      	str	r2, [r7, #4]
  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
 8024fe0:	68fb      	ldr	r3, [r7, #12]
 8024fe2:	332a      	adds	r3, #42	@ 0x2a
 8024fe4:	617b      	str	r3, [r7, #20]
  err_t result = ERR_MEM;
 8024fe6:	23ff      	movs	r3, #255	@ 0xff
 8024fe8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  int is_new_entry = 0;
 8024fec:	2300      	movs	r3, #0
 8024fee:	623b      	str	r3, [r7, #32]
  s16_t i_err;
  netif_addr_idx_t i;

  /* non-unicast address? */
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 8024ff0:	68bb      	ldr	r3, [r7, #8]
 8024ff2:	681b      	ldr	r3, [r3, #0]
 8024ff4:	68f9      	ldr	r1, [r7, #12]
 8024ff6:	4618      	mov	r0, r3
 8024ff8:	f000 fe5a 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8024ffc:	4603      	mov	r3, r0
 8024ffe:	2b00      	cmp	r3, #0
 8025000:	d10c      	bne.n	802501c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8025002:	68bb      	ldr	r3, [r7, #8]
 8025004:	681b      	ldr	r3, [r3, #0]
 8025006:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 802500a:	2be0      	cmp	r3, #224	@ 0xe0
 802500c:	d006      	beq.n	802501c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 802500e:	68bb      	ldr	r3, [r7, #8]
 8025010:	2b00      	cmp	r3, #0
 8025012:	d003      	beq.n	802501c <etharp_query+0x48>
      ip4_addr_isany(ipaddr)) {
 8025014:	68bb      	ldr	r3, [r7, #8]
 8025016:	681b      	ldr	r3, [r3, #0]
 8025018:	2b00      	cmp	r3, #0
 802501a:	d102      	bne.n	8025022 <etharp_query+0x4e>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 802501c:	f06f 030f 	mvn.w	r3, #15
 8025020:	e101      	b.n	8025226 <etharp_query+0x252>
  }

  /* find entry in ARP cache, ask to create entry if queueing packet */
  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
 8025022:	68fa      	ldr	r2, [r7, #12]
 8025024:	2101      	movs	r1, #1
 8025026:	68b8      	ldr	r0, [r7, #8]
 8025028:	f7ff fb58 	bl	80246dc <etharp_find_entry>
 802502c:	4603      	mov	r3, r0
 802502e:	827b      	strh	r3, [r7, #18]

  /* could not find or create entry? */
  if (i_err < 0) {
 8025030:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
 8025034:	2b00      	cmp	r3, #0
 8025036:	da02      	bge.n	802503e <etharp_query+0x6a>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
    if (q) {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
      ETHARP_STATS_INC(etharp.memerr);
    }
    return (err_t)i_err;
 8025038:	8a7b      	ldrh	r3, [r7, #18]
 802503a:	b25b      	sxtb	r3, r3
 802503c:	e0f3      	b.n	8025226 <etharp_query+0x252>
  }
  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
 802503e:	8a7b      	ldrh	r3, [r7, #18]
 8025040:	2b7e      	cmp	r3, #126	@ 0x7e
 8025042:	d906      	bls.n	8025052 <etharp_query+0x7e>
 8025044:	4b7a      	ldr	r3, [pc, #488]	@ (8025230 <etharp_query+0x25c>)
 8025046:	f240 32c1 	movw	r2, #961	@ 0x3c1
 802504a:	497a      	ldr	r1, [pc, #488]	@ (8025234 <etharp_query+0x260>)
 802504c:	487a      	ldr	r0, [pc, #488]	@ (8025238 <etharp_query+0x264>)
 802504e:	f005 fb85 	bl	802a75c <iprintf>
  i = (netif_addr_idx_t)i_err;
 8025052:	8a7b      	ldrh	r3, [r7, #18]
 8025054:	747b      	strb	r3, [r7, #17]

  /* mark a fresh entry as pending (we just sent a request) */
  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
 8025056:	7c7a      	ldrb	r2, [r7, #17]
 8025058:	4978      	ldr	r1, [pc, #480]	@ (802523c <etharp_query+0x268>)
 802505a:	4613      	mov	r3, r2
 802505c:	005b      	lsls	r3, r3, #1
 802505e:	4413      	add	r3, r2
 8025060:	00db      	lsls	r3, r3, #3
 8025062:	440b      	add	r3, r1
 8025064:	3314      	adds	r3, #20
 8025066:	781b      	ldrb	r3, [r3, #0]
 8025068:	2b00      	cmp	r3, #0
 802506a:	d115      	bne.n	8025098 <etharp_query+0xc4>
    is_new_entry = 1;
 802506c:	2301      	movs	r3, #1
 802506e:	623b      	str	r3, [r7, #32]
    arp_table[i].state = ETHARP_STATE_PENDING;
 8025070:	7c7a      	ldrb	r2, [r7, #17]
 8025072:	4972      	ldr	r1, [pc, #456]	@ (802523c <etharp_query+0x268>)
 8025074:	4613      	mov	r3, r2
 8025076:	005b      	lsls	r3, r3, #1
 8025078:	4413      	add	r3, r2
 802507a:	00db      	lsls	r3, r3, #3
 802507c:	440b      	add	r3, r1
 802507e:	3314      	adds	r3, #20
 8025080:	2201      	movs	r2, #1
 8025082:	701a      	strb	r2, [r3, #0]
    /* record network interface for re-sending arp request in etharp_tmr */
    arp_table[i].netif = netif;
 8025084:	7c7a      	ldrb	r2, [r7, #17]
 8025086:	496d      	ldr	r1, [pc, #436]	@ (802523c <etharp_query+0x268>)
 8025088:	4613      	mov	r3, r2
 802508a:	005b      	lsls	r3, r3, #1
 802508c:	4413      	add	r3, r2
 802508e:	00db      	lsls	r3, r3, #3
 8025090:	440b      	add	r3, r1
 8025092:	3308      	adds	r3, #8
 8025094:	68fa      	ldr	r2, [r7, #12]
 8025096:	601a      	str	r2, [r3, #0]
  }

  /* { i is either a STABLE or (new or existing) PENDING entry } */
  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
 8025098:	7c7a      	ldrb	r2, [r7, #17]
 802509a:	4968      	ldr	r1, [pc, #416]	@ (802523c <etharp_query+0x268>)
 802509c:	4613      	mov	r3, r2
 802509e:	005b      	lsls	r3, r3, #1
 80250a0:	4413      	add	r3, r2
 80250a2:	00db      	lsls	r3, r3, #3
 80250a4:	440b      	add	r3, r1
 80250a6:	3314      	adds	r3, #20
 80250a8:	781b      	ldrb	r3, [r3, #0]
 80250aa:	2b01      	cmp	r3, #1
 80250ac:	d011      	beq.n	80250d2 <etharp_query+0xfe>
 80250ae:	7c7a      	ldrb	r2, [r7, #17]
 80250b0:	4962      	ldr	r1, [pc, #392]	@ (802523c <etharp_query+0x268>)
 80250b2:	4613      	mov	r3, r2
 80250b4:	005b      	lsls	r3, r3, #1
 80250b6:	4413      	add	r3, r2
 80250b8:	00db      	lsls	r3, r3, #3
 80250ba:	440b      	add	r3, r1
 80250bc:	3314      	adds	r3, #20
 80250be:	781b      	ldrb	r3, [r3, #0]
 80250c0:	2b01      	cmp	r3, #1
 80250c2:	d806      	bhi.n	80250d2 <etharp_query+0xfe>
 80250c4:	4b5a      	ldr	r3, [pc, #360]	@ (8025230 <etharp_query+0x25c>)
 80250c6:	f240 32cd 	movw	r2, #973	@ 0x3cd
 80250ca:	495d      	ldr	r1, [pc, #372]	@ (8025240 <etharp_query+0x26c>)
 80250cc:	485a      	ldr	r0, [pc, #360]	@ (8025238 <etharp_query+0x264>)
 80250ce:	f005 fb45 	bl	802a75c <iprintf>
              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
               (arp_table[i].state >= ETHARP_STATE_STABLE)));

  /* do we have a new entry? or an implicit query request? */
  if (is_new_entry || (q == NULL)) {
 80250d2:	6a3b      	ldr	r3, [r7, #32]
 80250d4:	2b00      	cmp	r3, #0
 80250d6:	d102      	bne.n	80250de <etharp_query+0x10a>
 80250d8:	687b      	ldr	r3, [r7, #4]
 80250da:	2b00      	cmp	r3, #0
 80250dc:	d10c      	bne.n	80250f8 <etharp_query+0x124>
    /* try to resolve it; send out ARP request */
    result = etharp_request(netif, ipaddr);
 80250de:	68b9      	ldr	r1, [r7, #8]
 80250e0:	68f8      	ldr	r0, [r7, #12]
 80250e2:	f000 f963 	bl	80253ac <etharp_request>
 80250e6:	4603      	mov	r3, r0
 80250e8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      /* ARP request couldn't be sent */
      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
         since this failure could be temporary, and the next packet calling
         etharp_query again could lead to sending the queued packets. */
    }
    if (q == NULL) {
 80250ec:	687b      	ldr	r3, [r7, #4]
 80250ee:	2b00      	cmp	r3, #0
 80250f0:	d102      	bne.n	80250f8 <etharp_query+0x124>
      return result;
 80250f2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80250f6:	e096      	b.n	8025226 <etharp_query+0x252>
    }
  }

  /* packet given? */
  LWIP_ASSERT("q != NULL", q != NULL);
 80250f8:	687b      	ldr	r3, [r7, #4]
 80250fa:	2b00      	cmp	r3, #0
 80250fc:	d106      	bne.n	802510c <etharp_query+0x138>
 80250fe:	4b4c      	ldr	r3, [pc, #304]	@ (8025230 <etharp_query+0x25c>)
 8025100:	f240 32e1 	movw	r2, #993	@ 0x3e1
 8025104:	494f      	ldr	r1, [pc, #316]	@ (8025244 <etharp_query+0x270>)
 8025106:	484c      	ldr	r0, [pc, #304]	@ (8025238 <etharp_query+0x264>)
 8025108:	f005 fb28 	bl	802a75c <iprintf>
  /* stable entry? */
  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
 802510c:	7c7a      	ldrb	r2, [r7, #17]
 802510e:	494b      	ldr	r1, [pc, #300]	@ (802523c <etharp_query+0x268>)
 8025110:	4613      	mov	r3, r2
 8025112:	005b      	lsls	r3, r3, #1
 8025114:	4413      	add	r3, r2
 8025116:	00db      	lsls	r3, r3, #3
 8025118:	440b      	add	r3, r1
 802511a:	3314      	adds	r3, #20
 802511c:	781b      	ldrb	r3, [r3, #0]
 802511e:	2b01      	cmp	r3, #1
 8025120:	d917      	bls.n	8025152 <etharp_query+0x17e>
    /* we have a valid IP->Ethernet address mapping */
    ETHARP_SET_ADDRHINT(netif, i);
 8025122:	4a49      	ldr	r2, [pc, #292]	@ (8025248 <etharp_query+0x274>)
 8025124:	7c7b      	ldrb	r3, [r7, #17]
 8025126:	7013      	strb	r3, [r2, #0]
    /* send the packet */
    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
 8025128:	7c7a      	ldrb	r2, [r7, #17]
 802512a:	4613      	mov	r3, r2
 802512c:	005b      	lsls	r3, r3, #1
 802512e:	4413      	add	r3, r2
 8025130:	00db      	lsls	r3, r3, #3
 8025132:	3308      	adds	r3, #8
 8025134:	4a41      	ldr	r2, [pc, #260]	@ (802523c <etharp_query+0x268>)
 8025136:	4413      	add	r3, r2
 8025138:	3304      	adds	r3, #4
 802513a:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 802513e:	9200      	str	r2, [sp, #0]
 8025140:	697a      	ldr	r2, [r7, #20]
 8025142:	6879      	ldr	r1, [r7, #4]
 8025144:	68f8      	ldr	r0, [r7, #12]
 8025146:	f001 fe91 	bl	8026e6c <ethernet_output>
 802514a:	4603      	mov	r3, r0
 802514c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025150:	e067      	b.n	8025222 <etharp_query+0x24e>
    /* pending entry? (either just created or already pending */
  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8025152:	7c7a      	ldrb	r2, [r7, #17]
 8025154:	4939      	ldr	r1, [pc, #228]	@ (802523c <etharp_query+0x268>)
 8025156:	4613      	mov	r3, r2
 8025158:	005b      	lsls	r3, r3, #1
 802515a:	4413      	add	r3, r2
 802515c:	00db      	lsls	r3, r3, #3
 802515e:	440b      	add	r3, r1
 8025160:	3314      	adds	r3, #20
 8025162:	781b      	ldrb	r3, [r3, #0]
 8025164:	2b01      	cmp	r3, #1
 8025166:	d15c      	bne.n	8025222 <etharp_query+0x24e>
    /* entry is still pending, queue the given packet 'q' */
    struct pbuf *p;
    int copy_needed = 0;
 8025168:	2300      	movs	r3, #0
 802516a:	61bb      	str	r3, [r7, #24]
    /* IF q includes a pbuf that must be copied, copy the whole chain into a
     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
    p = q;
 802516c:	687b      	ldr	r3, [r7, #4]
 802516e:	61fb      	str	r3, [r7, #28]
    while (p) {
 8025170:	e01c      	b.n	80251ac <etharp_query+0x1d8>
      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
 8025172:	69fb      	ldr	r3, [r7, #28]
 8025174:	895a      	ldrh	r2, [r3, #10]
 8025176:	69fb      	ldr	r3, [r7, #28]
 8025178:	891b      	ldrh	r3, [r3, #8]
 802517a:	429a      	cmp	r2, r3
 802517c:	d10a      	bne.n	8025194 <etharp_query+0x1c0>
 802517e:	69fb      	ldr	r3, [r7, #28]
 8025180:	681b      	ldr	r3, [r3, #0]
 8025182:	2b00      	cmp	r3, #0
 8025184:	d006      	beq.n	8025194 <etharp_query+0x1c0>
 8025186:	4b2a      	ldr	r3, [pc, #168]	@ (8025230 <etharp_query+0x25c>)
 8025188:	f240 32f1 	movw	r2, #1009	@ 0x3f1
 802518c:	492f      	ldr	r1, [pc, #188]	@ (802524c <etharp_query+0x278>)
 802518e:	482a      	ldr	r0, [pc, #168]	@ (8025238 <etharp_query+0x264>)
 8025190:	f005 fae4 	bl	802a75c <iprintf>
      if (PBUF_NEEDS_COPY(p)) {
 8025194:	69fb      	ldr	r3, [r7, #28]
 8025196:	7b1b      	ldrb	r3, [r3, #12]
 8025198:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 802519c:	2b00      	cmp	r3, #0
 802519e:	d002      	beq.n	80251a6 <etharp_query+0x1d2>
        copy_needed = 1;
 80251a0:	2301      	movs	r3, #1
 80251a2:	61bb      	str	r3, [r7, #24]
        break;
 80251a4:	e005      	b.n	80251b2 <etharp_query+0x1de>
      }
      p = p->next;
 80251a6:	69fb      	ldr	r3, [r7, #28]
 80251a8:	681b      	ldr	r3, [r3, #0]
 80251aa:	61fb      	str	r3, [r7, #28]
    while (p) {
 80251ac:	69fb      	ldr	r3, [r7, #28]
 80251ae:	2b00      	cmp	r3, #0
 80251b0:	d1df      	bne.n	8025172 <etharp_query+0x19e>
    }
    if (copy_needed) {
 80251b2:	69bb      	ldr	r3, [r7, #24]
 80251b4:	2b00      	cmp	r3, #0
 80251b6:	d007      	beq.n	80251c8 <etharp_query+0x1f4>
      /* copy the whole packet into new pbufs */
      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
 80251b8:	687a      	ldr	r2, [r7, #4]
 80251ba:	f44f 7120 	mov.w	r1, #640	@ 0x280
 80251be:	200e      	movs	r0, #14
 80251c0:	f7f6 facc 	bl	801b75c <pbuf_clone>
 80251c4:	61f8      	str	r0, [r7, #28]
 80251c6:	e004      	b.n	80251d2 <etharp_query+0x1fe>
    } else {
      /* referencing the old pbuf is enough */
      p = q;
 80251c8:	687b      	ldr	r3, [r7, #4]
 80251ca:	61fb      	str	r3, [r7, #28]
      pbuf_ref(p);
 80251cc:	69f8      	ldr	r0, [r7, #28]
 80251ce:	f7f6 f8f3 	bl	801b3b8 <pbuf_ref>
    }
    /* packet could be taken over? */
    if (p != NULL) {
 80251d2:	69fb      	ldr	r3, [r7, #28]
 80251d4:	2b00      	cmp	r3, #0
 80251d6:	d021      	beq.n	802521c <etharp_query+0x248>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
        result = ERR_MEM;
      }
#else /* ARP_QUEUEING */
      /* always queue one packet per ARP request only, freeing a previously queued packet */
      if (arp_table[i].q != NULL) {
 80251d8:	7c7a      	ldrb	r2, [r7, #17]
 80251da:	4918      	ldr	r1, [pc, #96]	@ (802523c <etharp_query+0x268>)
 80251dc:	4613      	mov	r3, r2
 80251de:	005b      	lsls	r3, r3, #1
 80251e0:	4413      	add	r3, r2
 80251e2:	00db      	lsls	r3, r3, #3
 80251e4:	440b      	add	r3, r1
 80251e6:	681b      	ldr	r3, [r3, #0]
 80251e8:	2b00      	cmp	r3, #0
 80251ea:	d00a      	beq.n	8025202 <etharp_query+0x22e>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
        pbuf_free(arp_table[i].q);
 80251ec:	7c7a      	ldrb	r2, [r7, #17]
 80251ee:	4913      	ldr	r1, [pc, #76]	@ (802523c <etharp_query+0x268>)
 80251f0:	4613      	mov	r3, r2
 80251f2:	005b      	lsls	r3, r3, #1
 80251f4:	4413      	add	r3, r2
 80251f6:	00db      	lsls	r3, r3, #3
 80251f8:	440b      	add	r3, r1
 80251fa:	681b      	ldr	r3, [r3, #0]
 80251fc:	4618      	mov	r0, r3
 80251fe:	f7f6 f835 	bl	801b26c <pbuf_free>
      }
      arp_table[i].q = p;
 8025202:	7c7a      	ldrb	r2, [r7, #17]
 8025204:	490d      	ldr	r1, [pc, #52]	@ (802523c <etharp_query+0x268>)
 8025206:	4613      	mov	r3, r2
 8025208:	005b      	lsls	r3, r3, #1
 802520a:	4413      	add	r3, r2
 802520c:	00db      	lsls	r3, r3, #3
 802520e:	440b      	add	r3, r1
 8025210:	69fa      	ldr	r2, [r7, #28]
 8025212:	601a      	str	r2, [r3, #0]
      result = ERR_OK;
 8025214:	2300      	movs	r3, #0
 8025216:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 802521a:	e002      	b.n	8025222 <etharp_query+0x24e>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
    } else {
      ETHARP_STATS_INC(etharp.memerr);
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
      result = ERR_MEM;
 802521c:	23ff      	movs	r3, #255	@ 0xff
 802521e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }
  }
  return result;
 8025222:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
}
 8025226:	4618      	mov	r0, r3
 8025228:	3728      	adds	r7, #40	@ 0x28
 802522a:	46bd      	mov	sp, r7
 802522c:	bd80      	pop	{r7, pc}
 802522e:	bf00      	nop
 8025230:	080310d8 	.word	0x080310d8
 8025234:	08031284 	.word	0x08031284
 8025238:	08031150 	.word	0x08031150
 802523c:	2402b000 	.word	0x2402b000
 8025240:	08031294 	.word	0x08031294
 8025244:	08031278 	.word	0x08031278
 8025248:	2402b0f0 	.word	0x2402b0f0
 802524c:	080312bc 	.word	0x080312bc

08025250 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
           const struct eth_addr *ethdst_addr,
           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
           const u16_t opcode)
{
 8025250:	b580      	push	{r7, lr}
 8025252:	b08a      	sub	sp, #40	@ 0x28
 8025254:	af02      	add	r7, sp, #8
 8025256:	60f8      	str	r0, [r7, #12]
 8025258:	60b9      	str	r1, [r7, #8]
 802525a:	607a      	str	r2, [r7, #4]
 802525c:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  err_t result = ERR_OK;
 802525e:	2300      	movs	r3, #0
 8025260:	77fb      	strb	r3, [r7, #31]
  struct etharp_hdr *hdr;

  LWIP_ASSERT("netif != NULL", netif != NULL);
 8025262:	68fb      	ldr	r3, [r7, #12]
 8025264:	2b00      	cmp	r3, #0
 8025266:	d106      	bne.n	8025276 <etharp_raw+0x26>
 8025268:	4b3a      	ldr	r3, [pc, #232]	@ (8025354 <etharp_raw+0x104>)
 802526a:	f240 4257 	movw	r2, #1111	@ 0x457
 802526e:	493a      	ldr	r1, [pc, #232]	@ (8025358 <etharp_raw+0x108>)
 8025270:	483a      	ldr	r0, [pc, #232]	@ (802535c <etharp_raw+0x10c>)
 8025272:	f005 fa73 	bl	802a75c <iprintf>

  /* allocate a pbuf for the outgoing ARP request packet */
  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
 8025276:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802527a:	211c      	movs	r1, #28
 802527c:	200e      	movs	r0, #14
 802527e:	f7f5 fcdf 	bl	801ac40 <pbuf_alloc>
 8025282:	61b8      	str	r0, [r7, #24]
  /* could allocate a pbuf for an ARP request? */
  if (p == NULL) {
 8025284:	69bb      	ldr	r3, [r7, #24]
 8025286:	2b00      	cmp	r3, #0
 8025288:	d102      	bne.n	8025290 <etharp_raw+0x40>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
    ETHARP_STATS_INC(etharp.memerr);
    return ERR_MEM;
 802528a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802528e:	e05d      	b.n	802534c <etharp_raw+0xfc>
  }
  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
 8025290:	69bb      	ldr	r3, [r7, #24]
 8025292:	895b      	ldrh	r3, [r3, #10]
 8025294:	2b1b      	cmp	r3, #27
 8025296:	d806      	bhi.n	80252a6 <etharp_raw+0x56>
 8025298:	4b2e      	ldr	r3, [pc, #184]	@ (8025354 <etharp_raw+0x104>)
 802529a:	f240 4262 	movw	r2, #1122	@ 0x462
 802529e:	4930      	ldr	r1, [pc, #192]	@ (8025360 <etharp_raw+0x110>)
 80252a0:	482e      	ldr	r0, [pc, #184]	@ (802535c <etharp_raw+0x10c>)
 80252a2:	f005 fa5b 	bl	802a75c <iprintf>
              (p->len >= SIZEOF_ETHARP_HDR));

  hdr = (struct etharp_hdr *)p->payload;
 80252a6:	69bb      	ldr	r3, [r7, #24]
 80252a8:	685b      	ldr	r3, [r3, #4]
 80252aa:	617b      	str	r3, [r7, #20]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
  hdr->opcode = lwip_htons(opcode);
 80252ac:	8ebb      	ldrh	r3, [r7, #52]	@ 0x34
 80252ae:	4618      	mov	r0, r3
 80252b0:	f7f4 fafa 	bl	80198a8 <lwip_htons>
 80252b4:	4603      	mov	r3, r0
 80252b6:	461a      	mov	r2, r3
 80252b8:	697b      	ldr	r3, [r7, #20]
 80252ba:	80da      	strh	r2, [r3, #6]

  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
 80252bc:	68fb      	ldr	r3, [r7, #12]
 80252be:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80252c2:	2b06      	cmp	r3, #6
 80252c4:	d006      	beq.n	80252d4 <etharp_raw+0x84>
 80252c6:	4b23      	ldr	r3, [pc, #140]	@ (8025354 <etharp_raw+0x104>)
 80252c8:	f240 4269 	movw	r2, #1129	@ 0x469
 80252cc:	4925      	ldr	r1, [pc, #148]	@ (8025364 <etharp_raw+0x114>)
 80252ce:	4823      	ldr	r0, [pc, #140]	@ (802535c <etharp_raw+0x10c>)
 80252d0:	f005 fa44 	bl	802a75c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));

  /* Write the ARP MAC-Addresses */
  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
 80252d4:	697b      	ldr	r3, [r7, #20]
 80252d6:	3308      	adds	r3, #8
 80252d8:	2206      	movs	r2, #6
 80252da:	6839      	ldr	r1, [r7, #0]
 80252dc:	4618      	mov	r0, r3
 80252de:	f005 fcc6 	bl	802ac6e <memcpy>
  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
 80252e2:	697b      	ldr	r3, [r7, #20]
 80252e4:	3312      	adds	r3, #18
 80252e6:	2206      	movs	r2, #6
 80252e8:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 80252ea:	4618      	mov	r0, r3
 80252ec:	f005 fcbf 	bl	802ac6e <memcpy>
  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing. */
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
 80252f0:	697b      	ldr	r3, [r7, #20]
 80252f2:	330e      	adds	r3, #14
 80252f4:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80252f6:	6812      	ldr	r2, [r2, #0]
 80252f8:	601a      	str	r2, [r3, #0]
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
 80252fa:	697b      	ldr	r3, [r7, #20]
 80252fc:	3318      	adds	r3, #24
 80252fe:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025300:	6812      	ldr	r2, [r2, #0]
 8025302:	601a      	str	r2, [r3, #0]

  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
 8025304:	697b      	ldr	r3, [r7, #20]
 8025306:	2200      	movs	r2, #0
 8025308:	701a      	strb	r2, [r3, #0]
 802530a:	2200      	movs	r2, #0
 802530c:	f042 0201 	orr.w	r2, r2, #1
 8025310:	705a      	strb	r2, [r3, #1]
  hdr->proto = PP_HTONS(ETHTYPE_IP);
 8025312:	697b      	ldr	r3, [r7, #20]
 8025314:	2200      	movs	r2, #0
 8025316:	f042 0208 	orr.w	r2, r2, #8
 802531a:	709a      	strb	r2, [r3, #2]
 802531c:	2200      	movs	r2, #0
 802531e:	70da      	strb	r2, [r3, #3]
  /* set hwlen and protolen */
  hdr->hwlen = ETH_HWADDR_LEN;
 8025320:	697b      	ldr	r3, [r7, #20]
 8025322:	2206      	movs	r2, #6
 8025324:	711a      	strb	r2, [r3, #4]
  hdr->protolen = sizeof(ip4_addr_t);
 8025326:	697b      	ldr	r3, [r7, #20]
 8025328:	2204      	movs	r2, #4
 802532a:	715a      	strb	r2, [r3, #5]
  if (ip4_addr_islinklocal(ipsrc_addr)) {
    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
  } else
#endif /* LWIP_AUTOIP */
  {
    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
 802532c:	f640 0306 	movw	r3, #2054	@ 0x806
 8025330:	9300      	str	r3, [sp, #0]
 8025332:	687b      	ldr	r3, [r7, #4]
 8025334:	68ba      	ldr	r2, [r7, #8]
 8025336:	69b9      	ldr	r1, [r7, #24]
 8025338:	68f8      	ldr	r0, [r7, #12]
 802533a:	f001 fd97 	bl	8026e6c <ethernet_output>
  }

  ETHARP_STATS_INC(etharp.xmit);
  /* free ARP query packet */
  pbuf_free(p);
 802533e:	69b8      	ldr	r0, [r7, #24]
 8025340:	f7f5 ff94 	bl	801b26c <pbuf_free>
  p = NULL;
 8025344:	2300      	movs	r3, #0
 8025346:	61bb      	str	r3, [r7, #24]
  /* could not allocate pbuf for ARP request */

  return result;
 8025348:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 802534c:	4618      	mov	r0, r3
 802534e:	3720      	adds	r7, #32
 8025350:	46bd      	mov	sp, r7
 8025352:	bd80      	pop	{r7, pc}
 8025354:	080310d8 	.word	0x080310d8
 8025358:	08031228 	.word	0x08031228
 802535c:	08031150 	.word	0x08031150
 8025360:	080312d8 	.word	0x080312d8
 8025364:	0803130c 	.word	0x0803130c

08025368 <etharp_request_dst>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
 8025368:	b580      	push	{r7, lr}
 802536a:	b088      	sub	sp, #32
 802536c:	af04      	add	r7, sp, #16
 802536e:	60f8      	str	r0, [r7, #12]
 8025370:	60b9      	str	r1, [r7, #8]
 8025372:	607a      	str	r2, [r7, #4]
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8025374:	68fb      	ldr	r3, [r7, #12]
 8025376:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
 802537a:	68fb      	ldr	r3, [r7, #12]
 802537c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8025380:	68fb      	ldr	r3, [r7, #12]
 8025382:	3304      	adds	r3, #4
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8025384:	2201      	movs	r2, #1
 8025386:	9203      	str	r2, [sp, #12]
 8025388:	68ba      	ldr	r2, [r7, #8]
 802538a:	9202      	str	r2, [sp, #8]
 802538c:	4a06      	ldr	r2, [pc, #24]	@ (80253a8 <etharp_request_dst+0x40>)
 802538e:	9201      	str	r2, [sp, #4]
 8025390:	9300      	str	r3, [sp, #0]
 8025392:	4603      	mov	r3, r0
 8025394:	687a      	ldr	r2, [r7, #4]
 8025396:	68f8      	ldr	r0, [r7, #12]
 8025398:	f7ff ff5a 	bl	8025250 <etharp_raw>
 802539c:	4603      	mov	r3, r0
                    ipaddr, ARP_REQUEST);
}
 802539e:	4618      	mov	r0, r3
 80253a0:	3710      	adds	r7, #16
 80253a2:	46bd      	mov	sp, r7
 80253a4:	bd80      	pop	{r7, pc}
 80253a6:	bf00      	nop
 80253a8:	08031b68 	.word	0x08031b68

080253ac <etharp_request>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
 80253ac:	b580      	push	{r7, lr}
 80253ae:	b082      	sub	sp, #8
 80253b0:	af00      	add	r7, sp, #0
 80253b2:	6078      	str	r0, [r7, #4]
 80253b4:	6039      	str	r1, [r7, #0]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
 80253b6:	4a05      	ldr	r2, [pc, #20]	@ (80253cc <etharp_request+0x20>)
 80253b8:	6839      	ldr	r1, [r7, #0]
 80253ba:	6878      	ldr	r0, [r7, #4]
 80253bc:	f7ff ffd4 	bl	8025368 <etharp_request_dst>
 80253c0:	4603      	mov	r3, r0
}
 80253c2:	4618      	mov	r0, r3
 80253c4:	3708      	adds	r7, #8
 80253c6:	46bd      	mov	sp, r7
 80253c8:	bd80      	pop	{r7, pc}
 80253ca:	bf00      	nop
 80253cc:	08031b60 	.word	0x08031b60

080253d0 <icmp_input>:
 * @param p the icmp echo request packet, p->payload pointing to the icmp header
 * @param inp the netif on which this packet was received
 */
void
icmp_input(struct pbuf *p, struct netif *inp)
{
 80253d0:	b580      	push	{r7, lr}
 80253d2:	b08e      	sub	sp, #56	@ 0x38
 80253d4:	af04      	add	r7, sp, #16
 80253d6:	6078      	str	r0, [r7, #4]
 80253d8:	6039      	str	r1, [r7, #0]
  const ip4_addr_t *src;

  ICMP_STATS_INC(icmp.recv);
  MIB2_STATS_INC(mib2.icmpinmsgs);

  iphdr_in = ip4_current_header();
 80253da:	4b89      	ldr	r3, [pc, #548]	@ (8025600 <icmp_input+0x230>)
 80253dc:	689b      	ldr	r3, [r3, #8]
 80253de:	627b      	str	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(iphdr_in);
 80253e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80253e2:	781b      	ldrb	r3, [r3, #0]
 80253e4:	f003 030f 	and.w	r3, r3, #15
 80253e8:	b2db      	uxtb	r3, r3
 80253ea:	009b      	lsls	r3, r3, #2
 80253ec:	b2db      	uxtb	r3, r3
 80253ee:	847b      	strh	r3, [r7, #34]	@ 0x22
  if (hlen < IP_HLEN) {
 80253f0:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80253f2:	2b13      	cmp	r3, #19
 80253f4:	f240 80ed 	bls.w	80255d2 <icmp_input+0x202>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
    goto lenerr;
  }
  if (p->len < sizeof(u16_t) * 2) {
 80253f8:	687b      	ldr	r3, [r7, #4]
 80253fa:	895b      	ldrh	r3, [r3, #10]
 80253fc:	2b03      	cmp	r3, #3
 80253fe:	f240 80ea 	bls.w	80255d6 <icmp_input+0x206>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
    goto lenerr;
  }

  type = *((u8_t *)p->payload);
 8025402:	687b      	ldr	r3, [r7, #4]
 8025404:	685b      	ldr	r3, [r3, #4]
 8025406:	781b      	ldrb	r3, [r3, #0]
 8025408:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
#ifdef LWIP_DEBUG
  code = *(((u8_t *)p->payload) + 1);
 802540c:	687b      	ldr	r3, [r7, #4]
 802540e:	685b      	ldr	r3, [r3, #4]
 8025410:	785b      	ldrb	r3, [r3, #1]
 8025412:	f887 3020 	strb.w	r3, [r7, #32]
  /* if debug is enabled but debug statement below is somehow disabled: */
  LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
  switch (type) {
 8025416:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 802541a:	2b00      	cmp	r3, #0
 802541c:	f000 80d2 	beq.w	80255c4 <icmp_input+0x1f4>
 8025420:	2b08      	cmp	r3, #8
 8025422:	f040 80d2 	bne.w	80255ca <icmp_input+0x1fa>
         (as obviously, an echo request has been sent, too). */
      MIB2_STATS_INC(mib2.icmpinechoreps);
      break;
    case ICMP_ECHO:
      MIB2_STATS_INC(mib2.icmpinechos);
      src = ip4_current_dest_addr();
 8025426:	4b77      	ldr	r3, [pc, #476]	@ (8025604 <icmp_input+0x234>)
 8025428:	61fb      	str	r3, [r7, #28]
      /* multicast destination address? */
      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 802542a:	4b75      	ldr	r3, [pc, #468]	@ (8025600 <icmp_input+0x230>)
 802542c:	695b      	ldr	r3, [r3, #20]
 802542e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8025432:	2be0      	cmp	r3, #224	@ 0xe0
 8025434:	f000 80d6 	beq.w	80255e4 <icmp_input+0x214>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
        goto icmperr;
#endif /* LWIP_MULTICAST_PING */
      }
      /* broadcast destination address? */
      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
 8025438:	4b71      	ldr	r3, [pc, #452]	@ (8025600 <icmp_input+0x230>)
 802543a:	695b      	ldr	r3, [r3, #20]
 802543c:	4a70      	ldr	r2, [pc, #448]	@ (8025600 <icmp_input+0x230>)
 802543e:	6812      	ldr	r2, [r2, #0]
 8025440:	4611      	mov	r1, r2
 8025442:	4618      	mov	r0, r3
 8025444:	f000 fc34 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8025448:	4603      	mov	r3, r0
 802544a:	2b00      	cmp	r3, #0
 802544c:	f040 80cc 	bne.w	80255e8 <icmp_input+0x218>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
        goto icmperr;
#endif /* LWIP_BROADCAST_PING */
      }
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
 8025450:	687b      	ldr	r3, [r7, #4]
 8025452:	891b      	ldrh	r3, [r3, #8]
 8025454:	2b07      	cmp	r3, #7
 8025456:	f240 80c0 	bls.w	80255da <icmp_input+0x20a>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
        goto lenerr;
      }
#if CHECKSUM_CHECK_ICMP
      IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
        if (inet_chksum_pbuf(p) != 0) {
 802545a:	6878      	ldr	r0, [r7, #4]
 802545c:	f7f4 fac1 	bl	80199e2 <inet_chksum_pbuf>
 8025460:	4603      	mov	r3, r0
 8025462:	2b00      	cmp	r3, #0
 8025464:	d003      	beq.n	802546e <icmp_input+0x9e>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
          pbuf_free(p);
 8025466:	6878      	ldr	r0, [r7, #4]
 8025468:	f7f5 ff00 	bl	801b26c <pbuf_free>
          ICMP_STATS_INC(icmp.chkerr);
          MIB2_STATS_INC(mib2.icmpinerrors);
          return;
 802546c:	e0c5      	b.n	80255fa <icmp_input+0x22a>
        }
      }
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 802546e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025470:	330e      	adds	r3, #14
 8025472:	4619      	mov	r1, r3
 8025474:	6878      	ldr	r0, [r7, #4]
 8025476:	f7f5 fe31 	bl	801b0dc <pbuf_add_header>
 802547a:	4603      	mov	r3, r0
 802547c:	2b00      	cmp	r3, #0
 802547e:	d04b      	beq.n	8025518 <icmp_input+0x148>
        /* p is not big enough to contain link headers
         * allocate a new one and copy p into it
         */
        struct pbuf *r;
        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
 8025480:	687b      	ldr	r3, [r7, #4]
 8025482:	891a      	ldrh	r2, [r3, #8]
 8025484:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025486:	4413      	add	r3, r2
 8025488:	837b      	strh	r3, [r7, #26]
        if (alloc_len < p->tot_len) {
 802548a:	687b      	ldr	r3, [r7, #4]
 802548c:	891b      	ldrh	r3, [r3, #8]
 802548e:	8b7a      	ldrh	r2, [r7, #26]
 8025490:	429a      	cmp	r2, r3
 8025492:	f0c0 80ab 	bcc.w	80255ec <icmp_input+0x21c>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
          goto icmperr;
        }
        /* allocate new packet buffer with space for link headers */
        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
 8025496:	8b7b      	ldrh	r3, [r7, #26]
 8025498:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802549c:	4619      	mov	r1, r3
 802549e:	200e      	movs	r0, #14
 80254a0:	f7f5 fbce 	bl	801ac40 <pbuf_alloc>
 80254a4:	6178      	str	r0, [r7, #20]
        if (r == NULL) {
 80254a6:	697b      	ldr	r3, [r7, #20]
 80254a8:	2b00      	cmp	r3, #0
 80254aa:	f000 80a1 	beq.w	80255f0 <icmp_input+0x220>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
          goto icmperr;
        }
        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
 80254ae:	697b      	ldr	r3, [r7, #20]
 80254b0:	895b      	ldrh	r3, [r3, #10]
 80254b2:	461a      	mov	r2, r3
 80254b4:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80254b6:	3308      	adds	r3, #8
 80254b8:	429a      	cmp	r2, r3
 80254ba:	d203      	bcs.n	80254c4 <icmp_input+0xf4>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
          pbuf_free(r);
 80254bc:	6978      	ldr	r0, [r7, #20]
 80254be:	f7f5 fed5 	bl	801b26c <pbuf_free>
          goto icmperr;
 80254c2:	e096      	b.n	80255f2 <icmp_input+0x222>
        }
        /* copy the ip header */
        MEMCPY(r->payload, iphdr_in, hlen);
 80254c4:	697b      	ldr	r3, [r7, #20]
 80254c6:	685b      	ldr	r3, [r3, #4]
 80254c8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80254ca:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80254cc:	4618      	mov	r0, r3
 80254ce:	f005 fbce 	bl	802ac6e <memcpy>
        /* switch r->payload back to icmp header (cannot fail) */
        if (pbuf_remove_header(r, hlen)) {
 80254d2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80254d4:	4619      	mov	r1, r3
 80254d6:	6978      	ldr	r0, [r7, #20]
 80254d8:	f7f5 fe10 	bl	801b0fc <pbuf_remove_header>
 80254dc:	4603      	mov	r3, r0
 80254de:	2b00      	cmp	r3, #0
 80254e0:	d009      	beq.n	80254f6 <icmp_input+0x126>
          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
 80254e2:	4b49      	ldr	r3, [pc, #292]	@ (8025608 <icmp_input+0x238>)
 80254e4:	22b6      	movs	r2, #182	@ 0xb6
 80254e6:	4949      	ldr	r1, [pc, #292]	@ (802560c <icmp_input+0x23c>)
 80254e8:	4849      	ldr	r0, [pc, #292]	@ (8025610 <icmp_input+0x240>)
 80254ea:	f005 f937 	bl	802a75c <iprintf>
          pbuf_free(r);
 80254ee:	6978      	ldr	r0, [r7, #20]
 80254f0:	f7f5 febc 	bl	801b26c <pbuf_free>
          goto icmperr;
 80254f4:	e07d      	b.n	80255f2 <icmp_input+0x222>
        }
        /* copy the rest of the packet without ip header */
        if (pbuf_copy(r, p) != ERR_OK) {
 80254f6:	6879      	ldr	r1, [r7, #4]
 80254f8:	6978      	ldr	r0, [r7, #20]
 80254fa:	f7f5 ffeb 	bl	801b4d4 <pbuf_copy>
 80254fe:	4603      	mov	r3, r0
 8025500:	2b00      	cmp	r3, #0
 8025502:	d003      	beq.n	802550c <icmp_input+0x13c>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
          pbuf_free(r);
 8025504:	6978      	ldr	r0, [r7, #20]
 8025506:	f7f5 feb1 	bl	801b26c <pbuf_free>
          goto icmperr;
 802550a:	e072      	b.n	80255f2 <icmp_input+0x222>
        }
        /* free the original p */
        pbuf_free(p);
 802550c:	6878      	ldr	r0, [r7, #4]
 802550e:	f7f5 fead 	bl	801b26c <pbuf_free>
        /* we now have an identical copy of p that has room for link headers */
        p = r;
 8025512:	697b      	ldr	r3, [r7, #20]
 8025514:	607b      	str	r3, [r7, #4]
 8025516:	e00f      	b.n	8025538 <icmp_input+0x168>
      } else {
        /* restore p->payload to point to icmp header (cannot fail) */
        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 8025518:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802551a:	330e      	adds	r3, #14
 802551c:	4619      	mov	r1, r3
 802551e:	6878      	ldr	r0, [r7, #4]
 8025520:	f7f5 fdec 	bl	801b0fc <pbuf_remove_header>
 8025524:	4603      	mov	r3, r0
 8025526:	2b00      	cmp	r3, #0
 8025528:	d006      	beq.n	8025538 <icmp_input+0x168>
          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
 802552a:	4b37      	ldr	r3, [pc, #220]	@ (8025608 <icmp_input+0x238>)
 802552c:	22c7      	movs	r2, #199	@ 0xc7
 802552e:	4939      	ldr	r1, [pc, #228]	@ (8025614 <icmp_input+0x244>)
 8025530:	4837      	ldr	r0, [pc, #220]	@ (8025610 <icmp_input+0x240>)
 8025532:	f005 f913 	bl	802a75c <iprintf>
          goto icmperr;
 8025536:	e05c      	b.n	80255f2 <icmp_input+0x222>
      }
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
      /* At this point, all checks are OK. */
      /* We generate an answer by switching the dest and src ip addresses,
       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
      iecho = (struct icmp_echo_hdr *)p->payload;
 8025538:	687b      	ldr	r3, [r7, #4]
 802553a:	685b      	ldr	r3, [r3, #4]
 802553c:	613b      	str	r3, [r7, #16]
      if (pbuf_add_header(p, hlen)) {
 802553e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025540:	4619      	mov	r1, r3
 8025542:	6878      	ldr	r0, [r7, #4]
 8025544:	f7f5 fdca 	bl	801b0dc <pbuf_add_header>
 8025548:	4603      	mov	r3, r0
 802554a:	2b00      	cmp	r3, #0
 802554c:	d13c      	bne.n	80255c8 <icmp_input+0x1f8>
        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
      } else {
        err_t ret;
        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
 802554e:	687b      	ldr	r3, [r7, #4]
 8025550:	685b      	ldr	r3, [r3, #4]
 8025552:	60fb      	str	r3, [r7, #12]
        ip4_addr_copy(iphdr->src, *src);
 8025554:	69fb      	ldr	r3, [r7, #28]
 8025556:	681a      	ldr	r2, [r3, #0]
 8025558:	68fb      	ldr	r3, [r7, #12]
 802555a:	60da      	str	r2, [r3, #12]
        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
 802555c:	4b28      	ldr	r3, [pc, #160]	@ (8025600 <icmp_input+0x230>)
 802555e:	691a      	ldr	r2, [r3, #16]
 8025560:	68fb      	ldr	r3, [r7, #12]
 8025562:	611a      	str	r2, [r3, #16]
        ICMPH_TYPE_SET(iecho, ICMP_ER);
 8025564:	693b      	ldr	r3, [r7, #16]
 8025566:	2200      	movs	r2, #0
 8025568:	701a      	strb	r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
        IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
          /* adjust the checksum */
          if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
 802556a:	693b      	ldr	r3, [r7, #16]
 802556c:	885b      	ldrh	r3, [r3, #2]
 802556e:	b29b      	uxth	r3, r3
 8025570:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8025574:	4293      	cmp	r3, r2
 8025576:	d907      	bls.n	8025588 <icmp_input+0x1b8>
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
 8025578:	693b      	ldr	r3, [r7, #16]
 802557a:	885b      	ldrh	r3, [r3, #2]
 802557c:	b29b      	uxth	r3, r3
 802557e:	3309      	adds	r3, #9
 8025580:	b29a      	uxth	r2, r3
 8025582:	693b      	ldr	r3, [r7, #16]
 8025584:	805a      	strh	r2, [r3, #2]
 8025586:	e006      	b.n	8025596 <icmp_input+0x1c6>
          } else {
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
 8025588:	693b      	ldr	r3, [r7, #16]
 802558a:	885b      	ldrh	r3, [r3, #2]
 802558c:	b29b      	uxth	r3, r3
 802558e:	3308      	adds	r3, #8
 8025590:	b29a      	uxth	r2, r3
 8025592:	693b      	ldr	r3, [r7, #16]
 8025594:	805a      	strh	r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
        iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */

        /* Set the correct TTL and recalculate the header checksum. */
        IPH_TTL_SET(iphdr, ICMP_TTL);
 8025596:	68fb      	ldr	r3, [r7, #12]
 8025598:	22ff      	movs	r2, #255	@ 0xff
 802559a:	721a      	strb	r2, [r3, #8]
        IPH_CHKSUM_SET(iphdr, 0);
 802559c:	68fb      	ldr	r3, [r7, #12]
 802559e:	2200      	movs	r2, #0
 80255a0:	729a      	strb	r2, [r3, #10]
 80255a2:	2200      	movs	r2, #0
 80255a4:	72da      	strb	r2, [r3, #11]
        MIB2_STATS_INC(mib2.icmpoutmsgs);
        /* increase number of echo replies attempted to send */
        MIB2_STATS_INC(mib2.icmpoutechoreps);

        /* send an ICMP packet */
        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
 80255a6:	683b      	ldr	r3, [r7, #0]
 80255a8:	9302      	str	r3, [sp, #8]
 80255aa:	2301      	movs	r3, #1
 80255ac:	9301      	str	r3, [sp, #4]
 80255ae:	2300      	movs	r3, #0
 80255b0:	9300      	str	r3, [sp, #0]
 80255b2:	23ff      	movs	r3, #255	@ 0xff
 80255b4:	2200      	movs	r2, #0
 80255b6:	69f9      	ldr	r1, [r7, #28]
 80255b8:	6878      	ldr	r0, [r7, #4]
 80255ba:	f000 fa9f 	bl	8025afc <ip4_output_if>
 80255be:	4603      	mov	r3, r0
 80255c0:	72fb      	strb	r3, [r7, #11]
                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
        if (ret != ERR_OK) {
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
        }
      }
      break;
 80255c2:	e001      	b.n	80255c8 <icmp_input+0x1f8>
      break;
 80255c4:	bf00      	nop
 80255c6:	e000      	b.n	80255ca <icmp_input+0x1fa>
      break;
 80255c8:	bf00      	nop
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
                               (s16_t)type, (s16_t)code));
      ICMP_STATS_INC(icmp.proterr);
      ICMP_STATS_INC(icmp.drop);
  }
  pbuf_free(p);
 80255ca:	6878      	ldr	r0, [r7, #4]
 80255cc:	f7f5 fe4e 	bl	801b26c <pbuf_free>
  return;
 80255d0:	e013      	b.n	80255fa <icmp_input+0x22a>
    goto lenerr;
 80255d2:	bf00      	nop
 80255d4:	e002      	b.n	80255dc <icmp_input+0x20c>
    goto lenerr;
 80255d6:	bf00      	nop
 80255d8:	e000      	b.n	80255dc <icmp_input+0x20c>
        goto lenerr;
 80255da:	bf00      	nop
lenerr:
  pbuf_free(p);
 80255dc:	6878      	ldr	r0, [r7, #4]
 80255de:	f7f5 fe45 	bl	801b26c <pbuf_free>
  ICMP_STATS_INC(icmp.lenerr);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 80255e2:	e00a      	b.n	80255fa <icmp_input+0x22a>
        goto icmperr;
 80255e4:	bf00      	nop
 80255e6:	e004      	b.n	80255f2 <icmp_input+0x222>
        goto icmperr;
 80255e8:	bf00      	nop
 80255ea:	e002      	b.n	80255f2 <icmp_input+0x222>
          goto icmperr;
 80255ec:	bf00      	nop
 80255ee:	e000      	b.n	80255f2 <icmp_input+0x222>
          goto icmperr;
 80255f0:	bf00      	nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
  pbuf_free(p);
 80255f2:	6878      	ldr	r0, [r7, #4]
 80255f4:	f7f5 fe3a 	bl	801b26c <pbuf_free>
  ICMP_STATS_INC(icmp.err);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 80255f8:	bf00      	nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
 80255fa:	3728      	adds	r7, #40	@ 0x28
 80255fc:	46bd      	mov	sp, r7
 80255fe:	bd80      	pop	{r7, pc}
 8025600:	24024418 	.word	0x24024418
 8025604:	2402442c 	.word	0x2402442c
 8025608:	08031350 	.word	0x08031350
 802560c:	08031388 	.word	0x08031388
 8025610:	080313c0 	.word	0x080313c0
 8025614:	080313e8 	.word	0x080313e8

08025618 <icmp_dest_unreach>:
 *          p->payload pointing to the IP header
 * @param t type of the 'unreachable' packet
 */
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
 8025618:	b580      	push	{r7, lr}
 802561a:	b082      	sub	sp, #8
 802561c:	af00      	add	r7, sp, #0
 802561e:	6078      	str	r0, [r7, #4]
 8025620:	460b      	mov	r3, r1
 8025622:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
  icmp_send_response(p, ICMP_DUR, t);
 8025624:	78fb      	ldrb	r3, [r7, #3]
 8025626:	461a      	mov	r2, r3
 8025628:	2103      	movs	r1, #3
 802562a:	6878      	ldr	r0, [r7, #4]
 802562c:	f000 f814 	bl	8025658 <icmp_send_response>
}
 8025630:	bf00      	nop
 8025632:	3708      	adds	r7, #8
 8025634:	46bd      	mov	sp, r7
 8025636:	bd80      	pop	{r7, pc}

08025638 <icmp_time_exceeded>:
 *          p->payload pointing to the IP header
 * @param t type of the 'time exceeded' packet
 */
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
 8025638:	b580      	push	{r7, lr}
 802563a:	b082      	sub	sp, #8
 802563c:	af00      	add	r7, sp, #0
 802563e:	6078      	str	r0, [r7, #4]
 8025640:	460b      	mov	r3, r1
 8025642:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpouttimeexcds);
  icmp_send_response(p, ICMP_TE, t);
 8025644:	78fb      	ldrb	r3, [r7, #3]
 8025646:	461a      	mov	r2, r3
 8025648:	210b      	movs	r1, #11
 802564a:	6878      	ldr	r0, [r7, #4]
 802564c:	f000 f804 	bl	8025658 <icmp_send_response>
}
 8025650:	bf00      	nop
 8025652:	3708      	adds	r7, #8
 8025654:	46bd      	mov	sp, r7
 8025656:	bd80      	pop	{r7, pc}

08025658 <icmp_send_response>:
 * @param type Type of the ICMP header
 * @param code Code of the ICMP header
 */
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
 8025658:	b580      	push	{r7, lr}
 802565a:	b08c      	sub	sp, #48	@ 0x30
 802565c:	af04      	add	r7, sp, #16
 802565e:	6078      	str	r0, [r7, #4]
 8025660:	460b      	mov	r3, r1
 8025662:	70fb      	strb	r3, [r7, #3]
 8025664:	4613      	mov	r3, r2
 8025666:	70bb      	strb	r3, [r7, #2]

  /* increase number of messages attempted to send */
  MIB2_STATS_INC(mib2.icmpoutmsgs);

  /* ICMP header + IP header + 8 bytes of data */
  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
 8025668:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802566c:	2124      	movs	r1, #36	@ 0x24
 802566e:	2022      	movs	r0, #34	@ 0x22
 8025670:	f7f5 fae6 	bl	801ac40 <pbuf_alloc>
 8025674:	61b8      	str	r0, [r7, #24]
                 PBUF_RAM);
  if (q == NULL) {
 8025676:	69bb      	ldr	r3, [r7, #24]
 8025678:	2b00      	cmp	r3, #0
 802567a:	d056      	beq.n	802572a <icmp_send_response+0xd2>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
    MIB2_STATS_INC(mib2.icmpouterrors);
    return;
  }
  LWIP_ASSERT("check that first pbuf can hold icmp message",
 802567c:	69bb      	ldr	r3, [r7, #24]
 802567e:	895b      	ldrh	r3, [r3, #10]
 8025680:	2b23      	cmp	r3, #35	@ 0x23
 8025682:	d806      	bhi.n	8025692 <icmp_send_response+0x3a>
 8025684:	4b2b      	ldr	r3, [pc, #172]	@ (8025734 <icmp_send_response+0xdc>)
 8025686:	f44f 72b4 	mov.w	r2, #360	@ 0x168
 802568a:	492b      	ldr	r1, [pc, #172]	@ (8025738 <icmp_send_response+0xe0>)
 802568c:	482b      	ldr	r0, [pc, #172]	@ (802573c <icmp_send_response+0xe4>)
 802568e:	f005 f865 	bl	802a75c <iprintf>
              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));

  iphdr = (struct ip_hdr *)p->payload;
 8025692:	687b      	ldr	r3, [r7, #4]
 8025694:	685b      	ldr	r3, [r3, #4]
 8025696:	617b      	str	r3, [r7, #20]
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));

  icmphdr = (struct icmp_echo_hdr *)q->payload;
 8025698:	69bb      	ldr	r3, [r7, #24]
 802569a:	685b      	ldr	r3, [r3, #4]
 802569c:	613b      	str	r3, [r7, #16]
  icmphdr->type = type;
 802569e:	693b      	ldr	r3, [r7, #16]
 80256a0:	78fa      	ldrb	r2, [r7, #3]
 80256a2:	701a      	strb	r2, [r3, #0]
  icmphdr->code = code;
 80256a4:	693b      	ldr	r3, [r7, #16]
 80256a6:	78ba      	ldrb	r2, [r7, #2]
 80256a8:	705a      	strb	r2, [r3, #1]
  icmphdr->id = 0;
 80256aa:	693b      	ldr	r3, [r7, #16]
 80256ac:	2200      	movs	r2, #0
 80256ae:	711a      	strb	r2, [r3, #4]
 80256b0:	2200      	movs	r2, #0
 80256b2:	715a      	strb	r2, [r3, #5]
  icmphdr->seqno = 0;
 80256b4:	693b      	ldr	r3, [r7, #16]
 80256b6:	2200      	movs	r2, #0
 80256b8:	719a      	strb	r2, [r3, #6]
 80256ba:	2200      	movs	r2, #0
 80256bc:	71da      	strb	r2, [r3, #7]

  /* copy fields from original packet */
  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
 80256be:	69bb      	ldr	r3, [r7, #24]
 80256c0:	685b      	ldr	r3, [r3, #4]
 80256c2:	f103 0008 	add.w	r0, r3, #8
 80256c6:	687b      	ldr	r3, [r7, #4]
 80256c8:	685b      	ldr	r3, [r3, #4]
 80256ca:	221c      	movs	r2, #28
 80256cc:	4619      	mov	r1, r3
 80256ce:	f005 face 	bl	802ac6e <memcpy>
          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);

  ip4_addr_copy(iphdr_src, iphdr->src);
 80256d2:	697b      	ldr	r3, [r7, #20]
 80256d4:	68db      	ldr	r3, [r3, #12]
 80256d6:	60fb      	str	r3, [r7, #12]
    ip4_addr_t iphdr_dst;
    ip4_addr_copy(iphdr_dst, iphdr->dest);
    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
  }
#else
  netif = ip4_route(&iphdr_src);
 80256d8:	f107 030c 	add.w	r3, r7, #12
 80256dc:	4618      	mov	r0, r3
 80256de:	f000 f82f 	bl	8025740 <ip4_route>
 80256e2:	61f8      	str	r0, [r7, #28]
#endif
  if (netif != NULL) {
 80256e4:	69fb      	ldr	r3, [r7, #28]
 80256e6:	2b00      	cmp	r3, #0
 80256e8:	d01b      	beq.n	8025722 <icmp_send_response+0xca>
    /* calculate checksum */
    icmphdr->chksum = 0;
 80256ea:	693b      	ldr	r3, [r7, #16]
 80256ec:	2200      	movs	r2, #0
 80256ee:	709a      	strb	r2, [r3, #2]
 80256f0:	2200      	movs	r2, #0
 80256f2:	70da      	strb	r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
      icmphdr->chksum = inet_chksum(icmphdr, q->len);
 80256f4:	69bb      	ldr	r3, [r7, #24]
 80256f6:	895b      	ldrh	r3, [r3, #10]
 80256f8:	4619      	mov	r1, r3
 80256fa:	6938      	ldr	r0, [r7, #16]
 80256fc:	f7f4 f95f 	bl	80199be <inet_chksum>
 8025700:	4603      	mov	r3, r0
 8025702:	461a      	mov	r2, r3
 8025704:	693b      	ldr	r3, [r7, #16]
 8025706:	805a      	strh	r2, [r3, #2]
    }
#endif
    ICMP_STATS_INC(icmp.xmit);
    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
 8025708:	f107 020c 	add.w	r2, r7, #12
 802570c:	69fb      	ldr	r3, [r7, #28]
 802570e:	9302      	str	r3, [sp, #8]
 8025710:	2301      	movs	r3, #1
 8025712:	9301      	str	r3, [sp, #4]
 8025714:	2300      	movs	r3, #0
 8025716:	9300      	str	r3, [sp, #0]
 8025718:	23ff      	movs	r3, #255	@ 0xff
 802571a:	2100      	movs	r1, #0
 802571c:	69b8      	ldr	r0, [r7, #24]
 802571e:	f000 f9ed 	bl	8025afc <ip4_output_if>
  }
  pbuf_free(q);
 8025722:	69b8      	ldr	r0, [r7, #24]
 8025724:	f7f5 fda2 	bl	801b26c <pbuf_free>
 8025728:	e000      	b.n	802572c <icmp_send_response+0xd4>
    return;
 802572a:	bf00      	nop
}
 802572c:	3720      	adds	r7, #32
 802572e:	46bd      	mov	sp, r7
 8025730:	bd80      	pop	{r7, pc}
 8025732:	bf00      	nop
 8025734:	08031350 	.word	0x08031350
 8025738:	0803141c 	.word	0x0803141c
 802573c:	080313c0 	.word	0x080313c0

08025740 <ip4_route>:
 * @param dest the destination IP address for which to find the route
 * @return the netif on which to send to reach dest
 */
struct netif *
ip4_route(const ip4_addr_t *dest)
{
 8025740:	b580      	push	{r7, lr}
 8025742:	b084      	sub	sp, #16
 8025744:	af00      	add	r7, sp, #0
 8025746:	6078      	str	r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 8025748:	f7eb fbda 	bl	8010f00 <sys_check_core_locking>

  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
  LWIP_UNUSED_ARG(dest);

  /* iterate through netifs */
  NETIF_FOREACH(netif) {
 802574c:	4b32      	ldr	r3, [pc, #200]	@ (8025818 <ip4_route+0xd8>)
 802574e:	681b      	ldr	r3, [r3, #0]
 8025750:	60fb      	str	r3, [r7, #12]
 8025752:	e036      	b.n	80257c2 <ip4_route+0x82>
    /* is the netif up, does it have a link and a valid address? */
    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8025754:	68fb      	ldr	r3, [r7, #12]
 8025756:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802575a:	f003 0301 	and.w	r3, r3, #1
 802575e:	b2db      	uxtb	r3, r3
 8025760:	2b00      	cmp	r3, #0
 8025762:	d02b      	beq.n	80257bc <ip4_route+0x7c>
 8025764:	68fb      	ldr	r3, [r7, #12]
 8025766:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802576a:	089b      	lsrs	r3, r3, #2
 802576c:	f003 0301 	and.w	r3, r3, #1
 8025770:	b2db      	uxtb	r3, r3
 8025772:	2b00      	cmp	r3, #0
 8025774:	d022      	beq.n	80257bc <ip4_route+0x7c>
 8025776:	68fb      	ldr	r3, [r7, #12]
 8025778:	3304      	adds	r3, #4
 802577a:	681b      	ldr	r3, [r3, #0]
 802577c:	2b00      	cmp	r3, #0
 802577e:	d01d      	beq.n	80257bc <ip4_route+0x7c>
      /* network mask matches? */
      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
 8025780:	687b      	ldr	r3, [r7, #4]
 8025782:	681a      	ldr	r2, [r3, #0]
 8025784:	68fb      	ldr	r3, [r7, #12]
 8025786:	3304      	adds	r3, #4
 8025788:	681b      	ldr	r3, [r3, #0]
 802578a:	405a      	eors	r2, r3
 802578c:	68fb      	ldr	r3, [r7, #12]
 802578e:	3308      	adds	r3, #8
 8025790:	681b      	ldr	r3, [r3, #0]
 8025792:	4013      	ands	r3, r2
 8025794:	2b00      	cmp	r3, #0
 8025796:	d101      	bne.n	802579c <ip4_route+0x5c>
        /* return netif on which to forward IP packet */
        return netif;
 8025798:	68fb      	ldr	r3, [r7, #12]
 802579a:	e038      	b.n	802580e <ip4_route+0xce>
      }
      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
 802579c:	68fb      	ldr	r3, [r7, #12]
 802579e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80257a2:	f003 0302 	and.w	r3, r3, #2
 80257a6:	2b00      	cmp	r3, #0
 80257a8:	d108      	bne.n	80257bc <ip4_route+0x7c>
 80257aa:	687b      	ldr	r3, [r7, #4]
 80257ac:	681a      	ldr	r2, [r3, #0]
 80257ae:	68fb      	ldr	r3, [r7, #12]
 80257b0:	330c      	adds	r3, #12
 80257b2:	681b      	ldr	r3, [r3, #0]
 80257b4:	429a      	cmp	r2, r3
 80257b6:	d101      	bne.n	80257bc <ip4_route+0x7c>
        /* return netif on which to forward IP packet */
        return netif;
 80257b8:	68fb      	ldr	r3, [r7, #12]
 80257ba:	e028      	b.n	802580e <ip4_route+0xce>
  NETIF_FOREACH(netif) {
 80257bc:	68fb      	ldr	r3, [r7, #12]
 80257be:	681b      	ldr	r3, [r3, #0]
 80257c0:	60fb      	str	r3, [r7, #12]
 80257c2:	68fb      	ldr	r3, [r7, #12]
 80257c4:	2b00      	cmp	r3, #0
 80257c6:	d1c5      	bne.n	8025754 <ip4_route+0x14>
    return netif;
  }
#endif
#endif /* !LWIP_SINGLE_NETIF */

  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 80257c8:	4b14      	ldr	r3, [pc, #80]	@ (802581c <ip4_route+0xdc>)
 80257ca:	681b      	ldr	r3, [r3, #0]
 80257cc:	2b00      	cmp	r3, #0
 80257ce:	d01a      	beq.n	8025806 <ip4_route+0xc6>
 80257d0:	4b12      	ldr	r3, [pc, #72]	@ (802581c <ip4_route+0xdc>)
 80257d2:	681b      	ldr	r3, [r3, #0]
 80257d4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80257d8:	f003 0301 	and.w	r3, r3, #1
 80257dc:	2b00      	cmp	r3, #0
 80257de:	d012      	beq.n	8025806 <ip4_route+0xc6>
 80257e0:	4b0e      	ldr	r3, [pc, #56]	@ (802581c <ip4_route+0xdc>)
 80257e2:	681b      	ldr	r3, [r3, #0]
 80257e4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80257e8:	f003 0304 	and.w	r3, r3, #4
 80257ec:	2b00      	cmp	r3, #0
 80257ee:	d00a      	beq.n	8025806 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 80257f0:	4b0a      	ldr	r3, [pc, #40]	@ (802581c <ip4_route+0xdc>)
 80257f2:	681b      	ldr	r3, [r3, #0]
 80257f4:	3304      	adds	r3, #4
 80257f6:	681b      	ldr	r3, [r3, #0]
  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 80257f8:	2b00      	cmp	r3, #0
 80257fa:	d004      	beq.n	8025806 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 80257fc:	687b      	ldr	r3, [r7, #4]
 80257fe:	681b      	ldr	r3, [r3, #0]
 8025800:	b2db      	uxtb	r3, r3
 8025802:	2b7f      	cmp	r3, #127	@ 0x7f
 8025804:	d101      	bne.n	802580a <ip4_route+0xca>
       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
    IP_STATS_INC(ip.rterr);
    MIB2_STATS_INC(mib2.ipoutnoroutes);
    return NULL;
 8025806:	2300      	movs	r3, #0
 8025808:	e001      	b.n	802580e <ip4_route+0xce>
  }

  return netif_default;
 802580a:	4b04      	ldr	r3, [pc, #16]	@ (802581c <ip4_route+0xdc>)
 802580c:	681b      	ldr	r3, [r3, #0]
}
 802580e:	4618      	mov	r0, r3
 8025810:	3710      	adds	r7, #16
 8025812:	46bd      	mov	sp, r7
 8025814:	bd80      	pop	{r7, pc}
 8025816:	bf00      	nop
 8025818:	2402af5c 	.word	0x2402af5c
 802581c:	2402af60 	.word	0x2402af60

08025820 <ip4_input_accept>:
#endif /* IP_FORWARD */

/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
 8025820:	b580      	push	{r7, lr}
 8025822:	b082      	sub	sp, #8
 8025824:	af00      	add	r7, sp, #0
 8025826:	6078      	str	r0, [r7, #4]
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));

  /* interface is up and configured? */
  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
 8025828:	687b      	ldr	r3, [r7, #4]
 802582a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802582e:	f003 0301 	and.w	r3, r3, #1
 8025832:	b2db      	uxtb	r3, r3
 8025834:	2b00      	cmp	r3, #0
 8025836:	d016      	beq.n	8025866 <ip4_input_accept+0x46>
 8025838:	687b      	ldr	r3, [r7, #4]
 802583a:	3304      	adds	r3, #4
 802583c:	681b      	ldr	r3, [r3, #0]
 802583e:	2b00      	cmp	r3, #0
 8025840:	d011      	beq.n	8025866 <ip4_input_accept+0x46>
    /* unicast to this interface address? */
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 8025842:	4b0b      	ldr	r3, [pc, #44]	@ (8025870 <ip4_input_accept+0x50>)
 8025844:	695a      	ldr	r2, [r3, #20]
 8025846:	687b      	ldr	r3, [r7, #4]
 8025848:	3304      	adds	r3, #4
 802584a:	681b      	ldr	r3, [r3, #0]
 802584c:	429a      	cmp	r2, r3
 802584e:	d008      	beq.n	8025862 <ip4_input_accept+0x42>
        /* or broadcast on this interface network address? */
        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
 8025850:	4b07      	ldr	r3, [pc, #28]	@ (8025870 <ip4_input_accept+0x50>)
 8025852:	695b      	ldr	r3, [r3, #20]
 8025854:	6879      	ldr	r1, [r7, #4]
 8025856:	4618      	mov	r0, r3
 8025858:	f000 fa2a 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 802585c:	4603      	mov	r3, r0
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 802585e:	2b00      	cmp	r3, #0
 8025860:	d001      	beq.n	8025866 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
       ) {
      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
                             netif->name[0], netif->name[1]));
      /* accept on this netif */
      return 1;
 8025862:	2301      	movs	r3, #1
 8025864:	e000      	b.n	8025868 <ip4_input_accept+0x48>
      /* accept on this netif */
      return 1;
    }
#endif /* LWIP_AUTOIP */
  }
  return 0;
 8025866:	2300      	movs	r3, #0
}
 8025868:	4618      	mov	r0, r3
 802586a:	3708      	adds	r7, #8
 802586c:	46bd      	mov	sp, r7
 802586e:	bd80      	pop	{r7, pc}
 8025870:	24024418 	.word	0x24024418

08025874 <ip4_input>:
 * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
 *         processed, but currently always returns ERR_OK)
 */
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
 8025874:	b580      	push	{r7, lr}
 8025876:	b088      	sub	sp, #32
 8025878:	af00      	add	r7, sp, #0
 802587a:	6078      	str	r0, [r7, #4]
 802587c:	6039      	str	r1, [r7, #0]
  const struct ip_hdr *iphdr;
  struct netif *netif;
  u16_t iphdr_hlen;
  u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
  int check_ip_src = 1;
 802587e:	2301      	movs	r3, #1
 8025880:	617b      	str	r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
  raw_input_state_t raw_status;
#endif /* LWIP_RAW */

  LWIP_ASSERT_CORE_LOCKED();
 8025882:	f7eb fb3d 	bl	8010f00 <sys_check_core_locking>

  IP_STATS_INC(ip.recv);
  MIB2_STATS_INC(mib2.ipinreceives);

  /* identify the IP header */
  iphdr = (struct ip_hdr *)p->payload;
 8025886:	687b      	ldr	r3, [r7, #4]
 8025888:	685b      	ldr	r3, [r3, #4]
 802588a:	613b      	str	r3, [r7, #16]
  if (IPH_V(iphdr) != 4) {
 802588c:	693b      	ldr	r3, [r7, #16]
 802588e:	781b      	ldrb	r3, [r3, #0]
 8025890:	091b      	lsrs	r3, r3, #4
 8025892:	b2db      	uxtb	r3, r3
 8025894:	2b04      	cmp	r3, #4
 8025896:	d004      	beq.n	80258a2 <ip4_input+0x2e>
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
    ip4_debug_print(p);
    pbuf_free(p);
 8025898:	6878      	ldr	r0, [r7, #4]
 802589a:	f7f5 fce7 	bl	801b26c <pbuf_free>
    IP_STATS_INC(ip.err);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipinhdrerrors);
    return ERR_OK;
 802589e:	2300      	movs	r3, #0
 80258a0:	e123      	b.n	8025aea <ip4_input+0x276>
    return ERR_OK;
  }
#endif

  /* obtain IP header length in bytes */
  iphdr_hlen = IPH_HL_BYTES(iphdr);
 80258a2:	693b      	ldr	r3, [r7, #16]
 80258a4:	781b      	ldrb	r3, [r3, #0]
 80258a6:	f003 030f 	and.w	r3, r3, #15
 80258aa:	b2db      	uxtb	r3, r3
 80258ac:	009b      	lsls	r3, r3, #2
 80258ae:	b2db      	uxtb	r3, r3
 80258b0:	81fb      	strh	r3, [r7, #14]
  /* obtain ip length in bytes */
  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
 80258b2:	693b      	ldr	r3, [r7, #16]
 80258b4:	885b      	ldrh	r3, [r3, #2]
 80258b6:	b29b      	uxth	r3, r3
 80258b8:	4618      	mov	r0, r3
 80258ba:	f7f3 fff5 	bl	80198a8 <lwip_htons>
 80258be:	4603      	mov	r3, r0
 80258c0:	837b      	strh	r3, [r7, #26]

  /* Trim pbuf. This is especially required for packets < 60 bytes. */
  if (iphdr_len < p->tot_len) {
 80258c2:	687b      	ldr	r3, [r7, #4]
 80258c4:	891b      	ldrh	r3, [r3, #8]
 80258c6:	8b7a      	ldrh	r2, [r7, #26]
 80258c8:	429a      	cmp	r2, r3
 80258ca:	d204      	bcs.n	80258d6 <ip4_input+0x62>
    pbuf_realloc(p, iphdr_len);
 80258cc:	8b7b      	ldrh	r3, [r7, #26]
 80258ce:	4619      	mov	r1, r3
 80258d0:	6878      	ldr	r0, [r7, #4]
 80258d2:	f7f5 fb15 	bl	801af00 <pbuf_realloc>
  }

  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
 80258d6:	687b      	ldr	r3, [r7, #4]
 80258d8:	895b      	ldrh	r3, [r3, #10]
 80258da:	89fa      	ldrh	r2, [r7, #14]
 80258dc:	429a      	cmp	r2, r3
 80258de:	d807      	bhi.n	80258f0 <ip4_input+0x7c>
 80258e0:	687b      	ldr	r3, [r7, #4]
 80258e2:	891b      	ldrh	r3, [r3, #8]
 80258e4:	8b7a      	ldrh	r2, [r7, #26]
 80258e6:	429a      	cmp	r2, r3
 80258e8:	d802      	bhi.n	80258f0 <ip4_input+0x7c>
 80258ea:	89fb      	ldrh	r3, [r7, #14]
 80258ec:	2b13      	cmp	r3, #19
 80258ee:	d804      	bhi.n	80258fa <ip4_input+0x86>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
                   iphdr_len, p->tot_len));
    }
    /* free (drop) packet pbufs */
    pbuf_free(p);
 80258f0:	6878      	ldr	r0, [r7, #4]
 80258f2:	f7f5 fcbb 	bl	801b26c <pbuf_free>
    IP_STATS_INC(ip.lenerr);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipindiscards);
    return ERR_OK;
 80258f6:	2300      	movs	r3, #0
 80258f8:	e0f7      	b.n	8025aea <ip4_input+0x276>
    }
  }
#endif

  /* copy IP addresses to aligned ip_addr_t */
  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
 80258fa:	693b      	ldr	r3, [r7, #16]
 80258fc:	691b      	ldr	r3, [r3, #16]
 80258fe:	4a7d      	ldr	r2, [pc, #500]	@ (8025af4 <ip4_input+0x280>)
 8025900:	6153      	str	r3, [r2, #20]
  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
 8025902:	693b      	ldr	r3, [r7, #16]
 8025904:	68db      	ldr	r3, [r3, #12]
 8025906:	4a7b      	ldr	r2, [pc, #492]	@ (8025af4 <ip4_input+0x280>)
 8025908:	6113      	str	r3, [r2, #16]

  /* match packet against an interface, i.e. is this packet for us? */
  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 802590a:	4b7a      	ldr	r3, [pc, #488]	@ (8025af4 <ip4_input+0x280>)
 802590c:	695b      	ldr	r3, [r3, #20]
 802590e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8025912:	2be0      	cmp	r3, #224	@ 0xe0
 8025914:	d112      	bne.n	802593c <ip4_input+0xc8>
      netif = inp;
    } else {
      netif = NULL;
    }
#else /* LWIP_IGMP */
    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
 8025916:	683b      	ldr	r3, [r7, #0]
 8025918:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802591c:	f003 0301 	and.w	r3, r3, #1
 8025920:	b2db      	uxtb	r3, r3
 8025922:	2b00      	cmp	r3, #0
 8025924:	d007      	beq.n	8025936 <ip4_input+0xc2>
 8025926:	683b      	ldr	r3, [r7, #0]
 8025928:	3304      	adds	r3, #4
 802592a:	681b      	ldr	r3, [r3, #0]
 802592c:	2b00      	cmp	r3, #0
 802592e:	d002      	beq.n	8025936 <ip4_input+0xc2>
      netif = inp;
 8025930:	683b      	ldr	r3, [r7, #0]
 8025932:	61fb      	str	r3, [r7, #28]
 8025934:	e02a      	b.n	802598c <ip4_input+0x118>
    } else {
      netif = NULL;
 8025936:	2300      	movs	r3, #0
 8025938:	61fb      	str	r3, [r7, #28]
 802593a:	e027      	b.n	802598c <ip4_input+0x118>
    }
#endif /* LWIP_IGMP */
  } else {
    /* start trying with inp. if that's not acceptable, start walking the
       list of configured netifs. */
    if (ip4_input_accept(inp)) {
 802593c:	6838      	ldr	r0, [r7, #0]
 802593e:	f7ff ff6f 	bl	8025820 <ip4_input_accept>
 8025942:	4603      	mov	r3, r0
 8025944:	2b00      	cmp	r3, #0
 8025946:	d002      	beq.n	802594e <ip4_input+0xda>
      netif = inp;
 8025948:	683b      	ldr	r3, [r7, #0]
 802594a:	61fb      	str	r3, [r7, #28]
 802594c:	e01e      	b.n	802598c <ip4_input+0x118>
    } else {
      netif = NULL;
 802594e:	2300      	movs	r3, #0
 8025950:	61fb      	str	r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
      /* Packets sent to the loopback address must not be accepted on an
       * interface that does not have the loopback address assigned to it,
       * unless a non-loopback interface is used for loopback traffic. */
      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
 8025952:	4b68      	ldr	r3, [pc, #416]	@ (8025af4 <ip4_input+0x280>)
 8025954:	695b      	ldr	r3, [r3, #20]
 8025956:	b2db      	uxtb	r3, r3
 8025958:	2b7f      	cmp	r3, #127	@ 0x7f
 802595a:	d017      	beq.n	802598c <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
      {
#if !LWIP_SINGLE_NETIF
        NETIF_FOREACH(netif) {
 802595c:	4b66      	ldr	r3, [pc, #408]	@ (8025af8 <ip4_input+0x284>)
 802595e:	681b      	ldr	r3, [r3, #0]
 8025960:	61fb      	str	r3, [r7, #28]
 8025962:	e00e      	b.n	8025982 <ip4_input+0x10e>
          if (netif == inp) {
 8025964:	69fa      	ldr	r2, [r7, #28]
 8025966:	683b      	ldr	r3, [r7, #0]
 8025968:	429a      	cmp	r2, r3
 802596a:	d006      	beq.n	802597a <ip4_input+0x106>
            /* we checked that before already */
            continue;
          }
          if (ip4_input_accept(netif)) {
 802596c:	69f8      	ldr	r0, [r7, #28]
 802596e:	f7ff ff57 	bl	8025820 <ip4_input_accept>
 8025972:	4603      	mov	r3, r0
 8025974:	2b00      	cmp	r3, #0
 8025976:	d108      	bne.n	802598a <ip4_input+0x116>
 8025978:	e000      	b.n	802597c <ip4_input+0x108>
            continue;
 802597a:	bf00      	nop
        NETIF_FOREACH(netif) {
 802597c:	69fb      	ldr	r3, [r7, #28]
 802597e:	681b      	ldr	r3, [r3, #0]
 8025980:	61fb      	str	r3, [r7, #28]
 8025982:	69fb      	ldr	r3, [r7, #28]
 8025984:	2b00      	cmp	r3, #0
 8025986:	d1ed      	bne.n	8025964 <ip4_input+0xf0>
 8025988:	e000      	b.n	802598c <ip4_input+0x118>
            break;
 802598a:	bf00      	nop
   * If you want to accept private broadcast communication while a netif is down,
   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
   *
   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
   */
  if (netif == NULL) {
 802598c:	69fb      	ldr	r3, [r7, #28]
 802598e:	2b00      	cmp	r3, #0
 8025990:	d111      	bne.n	80259b6 <ip4_input+0x142>
    /* remote port is DHCP server? */
    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
 8025992:	693b      	ldr	r3, [r7, #16]
 8025994:	7a5b      	ldrb	r3, [r3, #9]
 8025996:	2b11      	cmp	r3, #17
 8025998:	d10d      	bne.n	80259b6 <ip4_input+0x142>
      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
 802599a:	89fb      	ldrh	r3, [r7, #14]
 802599c:	693a      	ldr	r2, [r7, #16]
 802599e:	4413      	add	r3, r2
 80259a0:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
                                              lwip_ntohs(udphdr->dest)));
      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
 80259a2:	68bb      	ldr	r3, [r7, #8]
 80259a4:	885b      	ldrh	r3, [r3, #2]
 80259a6:	b29b      	uxth	r3, r3
 80259a8:	f5b3 4f88 	cmp.w	r3, #17408	@ 0x4400
 80259ac:	d103      	bne.n	80259b6 <ip4_input+0x142>
        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
        netif = inp;
 80259ae:	683b      	ldr	r3, [r7, #0]
 80259b0:	61fb      	str	r3, [r7, #28]
        check_ip_src = 0;
 80259b2:	2300      	movs	r3, #0
 80259b4:	617b      	str	r3, [r7, #20]
  }
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */

  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
  if (check_ip_src
 80259b6:	697b      	ldr	r3, [r7, #20]
 80259b8:	2b00      	cmp	r3, #0
 80259ba:	d017      	beq.n	80259ec <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
      && !ip4_addr_isany_val(*ip4_current_src_addr())
 80259bc:	4b4d      	ldr	r3, [pc, #308]	@ (8025af4 <ip4_input+0x280>)
 80259be:	691b      	ldr	r3, [r3, #16]
 80259c0:	2b00      	cmp	r3, #0
 80259c2:	d013      	beq.n	80259ec <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
     )
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
  {
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 80259c4:	4b4b      	ldr	r3, [pc, #300]	@ (8025af4 <ip4_input+0x280>)
 80259c6:	691b      	ldr	r3, [r3, #16]
 80259c8:	6839      	ldr	r1, [r7, #0]
 80259ca:	4618      	mov	r0, r3
 80259cc:	f000 f970 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 80259d0:	4603      	mov	r3, r0
 80259d2:	2b00      	cmp	r3, #0
 80259d4:	d105      	bne.n	80259e2 <ip4_input+0x16e>
        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
 80259d6:	4b47      	ldr	r3, [pc, #284]	@ (8025af4 <ip4_input+0x280>)
 80259d8:	691b      	ldr	r3, [r3, #16]
 80259da:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 80259de:	2be0      	cmp	r3, #224	@ 0xe0
 80259e0:	d104      	bne.n	80259ec <ip4_input+0x178>
      /* packet source is not valid */
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
      /* free (drop) packet pbufs */
      pbuf_free(p);
 80259e2:	6878      	ldr	r0, [r7, #4]
 80259e4:	f7f5 fc42 	bl	801b26c <pbuf_free>
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
      return ERR_OK;
 80259e8:	2300      	movs	r3, #0
 80259ea:	e07e      	b.n	8025aea <ip4_input+0x276>
    }
  }

  /* packet not for us? */
  if (netif == NULL) {
 80259ec:	69fb      	ldr	r3, [r7, #28]
 80259ee:	2b00      	cmp	r3, #0
 80259f0:	d104      	bne.n	80259fc <ip4_input+0x188>
    {
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
    }
    pbuf_free(p);
 80259f2:	6878      	ldr	r0, [r7, #4]
 80259f4:	f7f5 fc3a 	bl	801b26c <pbuf_free>
    return ERR_OK;
 80259f8:	2300      	movs	r3, #0
 80259fa:	e076      	b.n	8025aea <ip4_input+0x276>
  }
  /* packet consists of multiple fragments? */
  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
 80259fc:	693b      	ldr	r3, [r7, #16]
 80259fe:	88db      	ldrh	r3, [r3, #6]
 8025a00:	b29b      	uxth	r3, r3
 8025a02:	461a      	mov	r2, r3
 8025a04:	f64f 733f 	movw	r3, #65343	@ 0xff3f
 8025a08:	4013      	ands	r3, r2
 8025a0a:	2b00      	cmp	r3, #0
 8025a0c:	d00b      	beq.n	8025a26 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
    /* reassemble the packet*/
    p = ip4_reass(p);
 8025a0e:	6878      	ldr	r0, [r7, #4]
 8025a10:	f000 fe62 	bl	80266d8 <ip4_reass>
 8025a14:	6078      	str	r0, [r7, #4]
    /* packet not fully reassembled yet? */
    if (p == NULL) {
 8025a16:	687b      	ldr	r3, [r7, #4]
 8025a18:	2b00      	cmp	r3, #0
 8025a1a:	d101      	bne.n	8025a20 <ip4_input+0x1ac>
      return ERR_OK;
 8025a1c:	2300      	movs	r3, #0
 8025a1e:	e064      	b.n	8025aea <ip4_input+0x276>
    }
    iphdr = (const struct ip_hdr *)p->payload;
 8025a20:	687b      	ldr	r3, [r7, #4]
 8025a22:	685b      	ldr	r3, [r3, #4]
 8025a24:	613b      	str	r3, [r7, #16]
  /* send to upper layers */
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
  ip4_debug_print(p);
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));

  ip_data.current_netif = netif;
 8025a26:	4a33      	ldr	r2, [pc, #204]	@ (8025af4 <ip4_input+0x280>)
 8025a28:	69fb      	ldr	r3, [r7, #28]
 8025a2a:	6013      	str	r3, [r2, #0]
  ip_data.current_input_netif = inp;
 8025a2c:	4a31      	ldr	r2, [pc, #196]	@ (8025af4 <ip4_input+0x280>)
 8025a2e:	683b      	ldr	r3, [r7, #0]
 8025a30:	6053      	str	r3, [r2, #4]
  ip_data.current_ip4_header = iphdr;
 8025a32:	4a30      	ldr	r2, [pc, #192]	@ (8025af4 <ip4_input+0x280>)
 8025a34:	693b      	ldr	r3, [r7, #16]
 8025a36:	6093      	str	r3, [r2, #8]
  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
 8025a38:	693b      	ldr	r3, [r7, #16]
 8025a3a:	781b      	ldrb	r3, [r3, #0]
 8025a3c:	f003 030f 	and.w	r3, r3, #15
 8025a40:	b2db      	uxtb	r3, r3
 8025a42:	009b      	lsls	r3, r3, #2
 8025a44:	b2db      	uxtb	r3, r3
 8025a46:	461a      	mov	r2, r3
 8025a48:	4b2a      	ldr	r3, [pc, #168]	@ (8025af4 <ip4_input+0x280>)
 8025a4a:	819a      	strh	r2, [r3, #12]
  /* raw input did not eat the packet? */
  raw_status = raw_input(p, inp);
  if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
  {
    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
 8025a4c:	89fb      	ldrh	r3, [r7, #14]
 8025a4e:	4619      	mov	r1, r3
 8025a50:	6878      	ldr	r0, [r7, #4]
 8025a52:	f7f5 fb53 	bl	801b0fc <pbuf_remove_header>

    switch (IPH_PROTO(iphdr)) {
 8025a56:	693b      	ldr	r3, [r7, #16]
 8025a58:	7a5b      	ldrb	r3, [r3, #9]
 8025a5a:	2b11      	cmp	r3, #17
 8025a5c:	d006      	beq.n	8025a6c <ip4_input+0x1f8>
 8025a5e:	2b11      	cmp	r3, #17
 8025a60:	dc13      	bgt.n	8025a8a <ip4_input+0x216>
 8025a62:	2b01      	cmp	r3, #1
 8025a64:	d00c      	beq.n	8025a80 <ip4_input+0x20c>
 8025a66:	2b06      	cmp	r3, #6
 8025a68:	d005      	beq.n	8025a76 <ip4_input+0x202>
 8025a6a:	e00e      	b.n	8025a8a <ip4_input+0x216>
      case IP_PROTO_UDP:
#if LWIP_UDPLITE
      case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
        MIB2_STATS_INC(mib2.ipindelivers);
        udp_input(p, inp);
 8025a6c:	6839      	ldr	r1, [r7, #0]
 8025a6e:	6878      	ldr	r0, [r7, #4]
 8025a70:	f7fc f99c 	bl	8021dac <udp_input>
        break;
 8025a74:	e026      	b.n	8025ac4 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case IP_PROTO_TCP:
        MIB2_STATS_INC(mib2.ipindelivers);
        tcp_input(p, inp);
 8025a76:	6839      	ldr	r1, [r7, #0]
 8025a78:	6878      	ldr	r0, [r7, #4]
 8025a7a:	f7f7 fcdd 	bl	801d438 <tcp_input>
        break;
 8025a7e:	e021      	b.n	8025ac4 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
      case IP_PROTO_ICMP:
        MIB2_STATS_INC(mib2.ipindelivers);
        icmp_input(p, inp);
 8025a80:	6839      	ldr	r1, [r7, #0]
 8025a82:	6878      	ldr	r0, [r7, #4]
 8025a84:	f7ff fca4 	bl	80253d0 <icmp_input>
        break;
 8025a88:	e01c      	b.n	8025ac4 <ip4_input+0x250>
        } else
#endif /* LWIP_RAW */
        {
#if LWIP_ICMP
          /* send ICMP destination protocol unreachable unless is was a broadcast */
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8025a8a:	4b1a      	ldr	r3, [pc, #104]	@ (8025af4 <ip4_input+0x280>)
 8025a8c:	695b      	ldr	r3, [r3, #20]
 8025a8e:	69f9      	ldr	r1, [r7, #28]
 8025a90:	4618      	mov	r0, r3
 8025a92:	f000 f90d 	bl	8025cb0 <ip4_addr_isbroadcast_u32>
 8025a96:	4603      	mov	r3, r0
 8025a98:	2b00      	cmp	r3, #0
 8025a9a:	d10f      	bne.n	8025abc <ip4_input+0x248>
              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8025a9c:	4b15      	ldr	r3, [pc, #84]	@ (8025af4 <ip4_input+0x280>)
 8025a9e:	695b      	ldr	r3, [r3, #20]
 8025aa0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8025aa4:	2be0      	cmp	r3, #224	@ 0xe0
 8025aa6:	d009      	beq.n	8025abc <ip4_input+0x248>
            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
 8025aa8:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8025aac:	4619      	mov	r1, r3
 8025aae:	6878      	ldr	r0, [r7, #4]
 8025ab0:	f7f5 fb97 	bl	801b1e2 <pbuf_header_force>
            icmp_dest_unreach(p, ICMP_DUR_PROTO);
 8025ab4:	2102      	movs	r1, #2
 8025ab6:	6878      	ldr	r0, [r7, #4]
 8025ab8:	f7ff fdae 	bl	8025618 <icmp_dest_unreach>

          IP_STATS_INC(ip.proterr);
          IP_STATS_INC(ip.drop);
          MIB2_STATS_INC(mib2.ipinunknownprotos);
        }
        pbuf_free(p);
 8025abc:	6878      	ldr	r0, [r7, #4]
 8025abe:	f7f5 fbd5 	bl	801b26c <pbuf_free>
        break;
 8025ac2:	bf00      	nop
    }
  }

  /* @todo: this is not really necessary... */
  ip_data.current_netif = NULL;
 8025ac4:	4b0b      	ldr	r3, [pc, #44]	@ (8025af4 <ip4_input+0x280>)
 8025ac6:	2200      	movs	r2, #0
 8025ac8:	601a      	str	r2, [r3, #0]
  ip_data.current_input_netif = NULL;
 8025aca:	4b0a      	ldr	r3, [pc, #40]	@ (8025af4 <ip4_input+0x280>)
 8025acc:	2200      	movs	r2, #0
 8025ace:	605a      	str	r2, [r3, #4]
  ip_data.current_ip4_header = NULL;
 8025ad0:	4b08      	ldr	r3, [pc, #32]	@ (8025af4 <ip4_input+0x280>)
 8025ad2:	2200      	movs	r2, #0
 8025ad4:	609a      	str	r2, [r3, #8]
  ip_data.current_ip_header_tot_len = 0;
 8025ad6:	4b07      	ldr	r3, [pc, #28]	@ (8025af4 <ip4_input+0x280>)
 8025ad8:	2200      	movs	r2, #0
 8025ada:	819a      	strh	r2, [r3, #12]
  ip4_addr_set_any(ip4_current_src_addr());
 8025adc:	4b05      	ldr	r3, [pc, #20]	@ (8025af4 <ip4_input+0x280>)
 8025ade:	2200      	movs	r2, #0
 8025ae0:	611a      	str	r2, [r3, #16]
  ip4_addr_set_any(ip4_current_dest_addr());
 8025ae2:	4b04      	ldr	r3, [pc, #16]	@ (8025af4 <ip4_input+0x280>)
 8025ae4:	2200      	movs	r2, #0
 8025ae6:	615a      	str	r2, [r3, #20]

  return ERR_OK;
 8025ae8:	2300      	movs	r3, #0
}
 8025aea:	4618      	mov	r0, r3
 8025aec:	3720      	adds	r7, #32
 8025aee:	46bd      	mov	sp, r7
 8025af0:	bd80      	pop	{r7, pc}
 8025af2:	bf00      	nop
 8025af4:	24024418 	.word	0x24024418
 8025af8:	2402af5c 	.word	0x2402af5c

08025afc <ip4_output_if>:
 */
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
              u8_t ttl, u8_t tos,
              u8_t proto, struct netif *netif)
{
 8025afc:	b580      	push	{r7, lr}
 8025afe:	b08a      	sub	sp, #40	@ 0x28
 8025b00:	af04      	add	r7, sp, #16
 8025b02:	60f8      	str	r0, [r7, #12]
 8025b04:	60b9      	str	r1, [r7, #8]
 8025b06:	607a      	str	r2, [r7, #4]
 8025b08:	70fb      	strb	r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
                  u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
  const ip4_addr_t *src_used = src;
 8025b0a:	68bb      	ldr	r3, [r7, #8]
 8025b0c:	617b      	str	r3, [r7, #20]
  if (dest != LWIP_IP_HDRINCL) {
 8025b0e:	687b      	ldr	r3, [r7, #4]
 8025b10:	2b00      	cmp	r3, #0
 8025b12:	d009      	beq.n	8025b28 <ip4_output_if+0x2c>
    if (ip4_addr_isany(src)) {
 8025b14:	68bb      	ldr	r3, [r7, #8]
 8025b16:	2b00      	cmp	r3, #0
 8025b18:	d003      	beq.n	8025b22 <ip4_output_if+0x26>
 8025b1a:	68bb      	ldr	r3, [r7, #8]
 8025b1c:	681b      	ldr	r3, [r3, #0]
 8025b1e:	2b00      	cmp	r3, #0
 8025b20:	d102      	bne.n	8025b28 <ip4_output_if+0x2c>
      src_used = netif_ip4_addr(netif);
 8025b22:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025b24:	3304      	adds	r3, #4
 8025b26:	617b      	str	r3, [r7, #20]

#if IP_OPTIONS_SEND
  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
                               ip_options, optlen);
#else /* IP_OPTIONS_SEND */
  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
 8025b28:	78fa      	ldrb	r2, [r7, #3]
 8025b2a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025b2c:	9302      	str	r3, [sp, #8]
 8025b2e:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 8025b32:	9301      	str	r3, [sp, #4]
 8025b34:	f897 3020 	ldrb.w	r3, [r7, #32]
 8025b38:	9300      	str	r3, [sp, #0]
 8025b3a:	4613      	mov	r3, r2
 8025b3c:	687a      	ldr	r2, [r7, #4]
 8025b3e:	6979      	ldr	r1, [r7, #20]
 8025b40:	68f8      	ldr	r0, [r7, #12]
 8025b42:	f000 f805 	bl	8025b50 <ip4_output_if_src>
 8025b46:	4603      	mov	r3, r0
#endif /* IP_OPTIONS_SEND */
}
 8025b48:	4618      	mov	r0, r3
 8025b4a:	3718      	adds	r7, #24
 8025b4c:	46bd      	mov	sp, r7
 8025b4e:	bd80      	pop	{r7, pc}

08025b50 <ip4_output_if_src>:
 */
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos,
                  u8_t proto, struct netif *netif)
{
 8025b50:	b580      	push	{r7, lr}
 8025b52:	b088      	sub	sp, #32
 8025b54:	af00      	add	r7, sp, #0
 8025b56:	60f8      	str	r0, [r7, #12]
 8025b58:	60b9      	str	r1, [r7, #8]
 8025b5a:	607a      	str	r2, [r7, #4]
 8025b5c:	70fb      	strb	r3, [r7, #3]
  ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
  u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */

  LWIP_ASSERT_CORE_LOCKED();
 8025b5e:	f7eb f9cf 	bl	8010f00 <sys_check_core_locking>
  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
 8025b62:	68fb      	ldr	r3, [r7, #12]
 8025b64:	7b9b      	ldrb	r3, [r3, #14]
 8025b66:	2b01      	cmp	r3, #1
 8025b68:	d006      	beq.n	8025b78 <ip4_output_if_src+0x28>
 8025b6a:	4b4b      	ldr	r3, [pc, #300]	@ (8025c98 <ip4_output_if_src+0x148>)
 8025b6c:	f44f 7255 	mov.w	r2, #852	@ 0x354
 8025b70:	494a      	ldr	r1, [pc, #296]	@ (8025c9c <ip4_output_if_src+0x14c>)
 8025b72:	484b      	ldr	r0, [pc, #300]	@ (8025ca0 <ip4_output_if_src+0x150>)
 8025b74:	f004 fdf2 	bl	802a75c <iprintf>

  MIB2_STATS_INC(mib2.ipoutrequests);

  /* Should the IP header be generated or is it already included in p? */
  if (dest != LWIP_IP_HDRINCL) {
 8025b78:	687b      	ldr	r3, [r7, #4]
 8025b7a:	2b00      	cmp	r3, #0
 8025b7c:	d060      	beq.n	8025c40 <ip4_output_if_src+0xf0>
    u16_t ip_hlen = IP_HLEN;
 8025b7e:	2314      	movs	r3, #20
 8025b80:	837b      	strh	r3, [r7, #26]
      }
#endif /* CHECKSUM_GEN_IP_INLINE */
    }
#endif /* IP_OPTIONS_SEND */
    /* generate IP header */
    if (pbuf_add_header(p, IP_HLEN)) {
 8025b82:	2114      	movs	r1, #20
 8025b84:	68f8      	ldr	r0, [r7, #12]
 8025b86:	f7f5 faa9 	bl	801b0dc <pbuf_add_header>
 8025b8a:	4603      	mov	r3, r0
 8025b8c:	2b00      	cmp	r3, #0
 8025b8e:	d002      	beq.n	8025b96 <ip4_output_if_src+0x46>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));

      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8025b90:	f06f 0301 	mvn.w	r3, #1
 8025b94:	e07c      	b.n	8025c90 <ip4_output_if_src+0x140>
    }

    iphdr = (struct ip_hdr *)p->payload;
 8025b96:	68fb      	ldr	r3, [r7, #12]
 8025b98:	685b      	ldr	r3, [r3, #4]
 8025b9a:	61fb      	str	r3, [r7, #28]
    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
 8025b9c:	68fb      	ldr	r3, [r7, #12]
 8025b9e:	895b      	ldrh	r3, [r3, #10]
 8025ba0:	2b13      	cmp	r3, #19
 8025ba2:	d806      	bhi.n	8025bb2 <ip4_output_if_src+0x62>
 8025ba4:	4b3c      	ldr	r3, [pc, #240]	@ (8025c98 <ip4_output_if_src+0x148>)
 8025ba6:	f44f 7262 	mov.w	r2, #904	@ 0x388
 8025baa:	493e      	ldr	r1, [pc, #248]	@ (8025ca4 <ip4_output_if_src+0x154>)
 8025bac:	483c      	ldr	r0, [pc, #240]	@ (8025ca0 <ip4_output_if_src+0x150>)
 8025bae:	f004 fdd5 	bl	802a75c <iprintf>
                (p->len >= sizeof(struct ip_hdr)));

    IPH_TTL_SET(iphdr, ttl);
 8025bb2:	69fb      	ldr	r3, [r7, #28]
 8025bb4:	78fa      	ldrb	r2, [r7, #3]
 8025bb6:	721a      	strb	r2, [r3, #8]
    IPH_PROTO_SET(iphdr, proto);
 8025bb8:	69fb      	ldr	r3, [r7, #28]
 8025bba:	f897 202c 	ldrb.w	r2, [r7, #44]	@ 0x2c
 8025bbe:	725a      	strb	r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */

    /* dest cannot be NULL here */
    ip4_addr_copy(iphdr->dest, *dest);
 8025bc0:	687b      	ldr	r3, [r7, #4]
 8025bc2:	681a      	ldr	r2, [r3, #0]
 8025bc4:	69fb      	ldr	r3, [r7, #28]
 8025bc6:	611a      	str	r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */

    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
 8025bc8:	8b7b      	ldrh	r3, [r7, #26]
 8025bca:	089b      	lsrs	r3, r3, #2
 8025bcc:	b29b      	uxth	r3, r3
 8025bce:	b2db      	uxtb	r3, r3
 8025bd0:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8025bd4:	b2da      	uxtb	r2, r3
 8025bd6:	69fb      	ldr	r3, [r7, #28]
 8025bd8:	701a      	strb	r2, [r3, #0]
    IPH_TOS_SET(iphdr, tos);
 8025bda:	69fb      	ldr	r3, [r7, #28]
 8025bdc:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 8025be0:	705a      	strb	r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
 8025be2:	68fb      	ldr	r3, [r7, #12]
 8025be4:	891b      	ldrh	r3, [r3, #8]
 8025be6:	4618      	mov	r0, r3
 8025be8:	f7f3 fe5e 	bl	80198a8 <lwip_htons>
 8025bec:	4603      	mov	r3, r0
 8025bee:	461a      	mov	r2, r3
 8025bf0:	69fb      	ldr	r3, [r7, #28]
 8025bf2:	805a      	strh	r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_OFFSET_SET(iphdr, 0);
 8025bf4:	69fb      	ldr	r3, [r7, #28]
 8025bf6:	2200      	movs	r2, #0
 8025bf8:	719a      	strb	r2, [r3, #6]
 8025bfa:	2200      	movs	r2, #0
 8025bfc:	71da      	strb	r2, [r3, #7]
    IPH_ID_SET(iphdr, lwip_htons(ip_id));
 8025bfe:	4b2a      	ldr	r3, [pc, #168]	@ (8025ca8 <ip4_output_if_src+0x158>)
 8025c00:	881b      	ldrh	r3, [r3, #0]
 8025c02:	4618      	mov	r0, r3
 8025c04:	f7f3 fe50 	bl	80198a8 <lwip_htons>
 8025c08:	4603      	mov	r3, r0
 8025c0a:	461a      	mov	r2, r3
 8025c0c:	69fb      	ldr	r3, [r7, #28]
 8025c0e:	809a      	strh	r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
    ++ip_id;
 8025c10:	4b25      	ldr	r3, [pc, #148]	@ (8025ca8 <ip4_output_if_src+0x158>)
 8025c12:	881b      	ldrh	r3, [r3, #0]
 8025c14:	3301      	adds	r3, #1
 8025c16:	b29a      	uxth	r2, r3
 8025c18:	4b23      	ldr	r3, [pc, #140]	@ (8025ca8 <ip4_output_if_src+0x158>)
 8025c1a:	801a      	strh	r2, [r3, #0]

    if (src == NULL) {
 8025c1c:	68bb      	ldr	r3, [r7, #8]
 8025c1e:	2b00      	cmp	r3, #0
 8025c20:	d104      	bne.n	8025c2c <ip4_output_if_src+0xdc>
      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
 8025c22:	4b22      	ldr	r3, [pc, #136]	@ (8025cac <ip4_output_if_src+0x15c>)
 8025c24:	681a      	ldr	r2, [r3, #0]
 8025c26:	69fb      	ldr	r3, [r7, #28]
 8025c28:	60da      	str	r2, [r3, #12]
 8025c2a:	e003      	b.n	8025c34 <ip4_output_if_src+0xe4>
    } else {
      /* src cannot be NULL here */
      ip4_addr_copy(iphdr->src, *src);
 8025c2c:	68bb      	ldr	r3, [r7, #8]
 8025c2e:	681a      	ldr	r2, [r3, #0]
 8025c30:	69fb      	ldr	r3, [r7, #28]
 8025c32:	60da      	str	r2, [r3, #12]
    else {
      IPH_CHKSUM_SET(iphdr, 0);
    }
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
    IPH_CHKSUM_SET(iphdr, 0);
 8025c34:	69fb      	ldr	r3, [r7, #28]
 8025c36:	2200      	movs	r2, #0
 8025c38:	729a      	strb	r2, [r3, #10]
 8025c3a:	2200      	movs	r2, #0
 8025c3c:	72da      	strb	r2, [r3, #11]
 8025c3e:	e00f      	b.n	8025c60 <ip4_output_if_src+0x110>
    }
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
  } else {
    /* IP header already included in p */
    if (p->len < IP_HLEN) {
 8025c40:	68fb      	ldr	r3, [r7, #12]
 8025c42:	895b      	ldrh	r3, [r3, #10]
 8025c44:	2b13      	cmp	r3, #19
 8025c46:	d802      	bhi.n	8025c4e <ip4_output_if_src+0xfe>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8025c48:	f06f 0301 	mvn.w	r3, #1
 8025c4c:	e020      	b.n	8025c90 <ip4_output_if_src+0x140>
    }
    iphdr = (struct ip_hdr *)p->payload;
 8025c4e:	68fb      	ldr	r3, [r7, #12]
 8025c50:	685b      	ldr	r3, [r3, #4]
 8025c52:	61fb      	str	r3, [r7, #28]
    ip4_addr_copy(dest_addr, iphdr->dest);
 8025c54:	69fb      	ldr	r3, [r7, #28]
 8025c56:	691b      	ldr	r3, [r3, #16]
 8025c58:	617b      	str	r3, [r7, #20]
    dest = &dest_addr;
 8025c5a:	f107 0314 	add.w	r3, r7, #20
 8025c5e:	607b      	str	r3, [r7, #4]
  }
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
  /* don't fragment if interface has mtu set to 0 [loopif] */
  if (netif->mtu && (p->tot_len > netif->mtu)) {
 8025c60:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025c62:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025c64:	2b00      	cmp	r3, #0
 8025c66:	d00c      	beq.n	8025c82 <ip4_output_if_src+0x132>
 8025c68:	68fb      	ldr	r3, [r7, #12]
 8025c6a:	891a      	ldrh	r2, [r3, #8]
 8025c6c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025c6e:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025c70:	429a      	cmp	r2, r3
 8025c72:	d906      	bls.n	8025c82 <ip4_output_if_src+0x132>
    return ip4_frag(p, netif, dest);
 8025c74:	687a      	ldr	r2, [r7, #4]
 8025c76:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8025c78:	68f8      	ldr	r0, [r7, #12]
 8025c7a:	f000 ff21 	bl	8026ac0 <ip4_frag>
 8025c7e:	4603      	mov	r3, r0
 8025c80:	e006      	b.n	8025c90 <ip4_output_if_src+0x140>
  }
#endif /* IP_FRAG */

  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
  return netif->output(netif, p, dest);
 8025c82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025c84:	695b      	ldr	r3, [r3, #20]
 8025c86:	687a      	ldr	r2, [r7, #4]
 8025c88:	68f9      	ldr	r1, [r7, #12]
 8025c8a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025c8c:	4798      	blx	r3
 8025c8e:	4603      	mov	r3, r0
}
 8025c90:	4618      	mov	r0, r3
 8025c92:	3720      	adds	r7, #32
 8025c94:	46bd      	mov	sp, r7
 8025c96:	bd80      	pop	{r7, pc}
 8025c98:	08031448 	.word	0x08031448
 8025c9c:	0803147c 	.word	0x0803147c
 8025ca0:	08031488 	.word	0x08031488
 8025ca4:	080314b0 	.word	0x080314b0
 8025ca8:	2402b0f2 	.word	0x2402b0f2
 8025cac:	08031b58 	.word	0x08031b58

08025cb0 <ip4_addr_isbroadcast_u32>:
 * @param netif the network interface against which the address is checked
 * @return returns non-zero if the address is a broadcast address
 */
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
 8025cb0:	b480      	push	{r7}
 8025cb2:	b085      	sub	sp, #20
 8025cb4:	af00      	add	r7, sp, #0
 8025cb6:	6078      	str	r0, [r7, #4]
 8025cb8:	6039      	str	r1, [r7, #0]
  ip4_addr_t ipaddr;
  ip4_addr_set_u32(&ipaddr, addr);
 8025cba:	687b      	ldr	r3, [r7, #4]
 8025cbc:	60fb      	str	r3, [r7, #12]

  /* all ones (broadcast) or all zeroes (old skool broadcast) */
  if ((~addr == IPADDR_ANY) ||
 8025cbe:	687b      	ldr	r3, [r7, #4]
 8025cc0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8025cc4:	d002      	beq.n	8025ccc <ip4_addr_isbroadcast_u32+0x1c>
 8025cc6:	687b      	ldr	r3, [r7, #4]
 8025cc8:	2b00      	cmp	r3, #0
 8025cca:	d101      	bne.n	8025cd0 <ip4_addr_isbroadcast_u32+0x20>
      (addr == IPADDR_ANY)) {
    return 1;
 8025ccc:	2301      	movs	r3, #1
 8025cce:	e02a      	b.n	8025d26 <ip4_addr_isbroadcast_u32+0x76>
    /* no broadcast support on this network interface? */
  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
 8025cd0:	683b      	ldr	r3, [r7, #0]
 8025cd2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025cd6:	f003 0302 	and.w	r3, r3, #2
 8025cda:	2b00      	cmp	r3, #0
 8025cdc:	d101      	bne.n	8025ce2 <ip4_addr_isbroadcast_u32+0x32>
    /* the given address cannot be a broadcast address
     * nor can we check against any broadcast addresses */
    return 0;
 8025cde:	2300      	movs	r3, #0
 8025ce0:	e021      	b.n	8025d26 <ip4_addr_isbroadcast_u32+0x76>
    /* address matches network interface address exactly? => no broadcast */
  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
 8025ce2:	683b      	ldr	r3, [r7, #0]
 8025ce4:	3304      	adds	r3, #4
 8025ce6:	681b      	ldr	r3, [r3, #0]
 8025ce8:	687a      	ldr	r2, [r7, #4]
 8025cea:	429a      	cmp	r2, r3
 8025cec:	d101      	bne.n	8025cf2 <ip4_addr_isbroadcast_u32+0x42>
    return 0;
 8025cee:	2300      	movs	r3, #0
 8025cf0:	e019      	b.n	8025d26 <ip4_addr_isbroadcast_u32+0x76>
    /*  on the same (sub) network... */
  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
 8025cf2:	68fa      	ldr	r2, [r7, #12]
 8025cf4:	683b      	ldr	r3, [r7, #0]
 8025cf6:	3304      	adds	r3, #4
 8025cf8:	681b      	ldr	r3, [r3, #0]
 8025cfa:	405a      	eors	r2, r3
 8025cfc:	683b      	ldr	r3, [r7, #0]
 8025cfe:	3308      	adds	r3, #8
 8025d00:	681b      	ldr	r3, [r3, #0]
 8025d02:	4013      	ands	r3, r2
 8025d04:	2b00      	cmp	r3, #0
 8025d06:	d10d      	bne.n	8025d24 <ip4_addr_isbroadcast_u32+0x74>
             /* ...and host identifier bits are all ones? =>... */
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8025d08:	683b      	ldr	r3, [r7, #0]
 8025d0a:	3308      	adds	r3, #8
 8025d0c:	681b      	ldr	r3, [r3, #0]
 8025d0e:	43da      	mvns	r2, r3
 8025d10:	687b      	ldr	r3, [r7, #4]
 8025d12:	401a      	ands	r2, r3
                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
 8025d14:	683b      	ldr	r3, [r7, #0]
 8025d16:	3308      	adds	r3, #8
 8025d18:	681b      	ldr	r3, [r3, #0]
 8025d1a:	43db      	mvns	r3, r3
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8025d1c:	429a      	cmp	r2, r3
 8025d1e:	d101      	bne.n	8025d24 <ip4_addr_isbroadcast_u32+0x74>
    /* => network broadcast address */
    return 1;
 8025d20:	2301      	movs	r3, #1
 8025d22:	e000      	b.n	8025d26 <ip4_addr_isbroadcast_u32+0x76>
  } else {
    return 0;
 8025d24:	2300      	movs	r3, #0
  }
}
 8025d26:	4618      	mov	r0, r3
 8025d28:	3714      	adds	r7, #20
 8025d2a:	46bd      	mov	sp, r7
 8025d2c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8025d30:	4770      	bx	lr

08025d32 <ipaddr_addr>:
 * @param cp IP address in ascii representation (e.g. "127.0.0.1")
 * @return ip address in network order
 */
u32_t
ipaddr_addr(const char *cp)
{
 8025d32:	b580      	push	{r7, lr}
 8025d34:	b084      	sub	sp, #16
 8025d36:	af00      	add	r7, sp, #0
 8025d38:	6078      	str	r0, [r7, #4]
  ip4_addr_t val;

  if (ip4addr_aton(cp, &val)) {
 8025d3a:	f107 030c 	add.w	r3, r7, #12
 8025d3e:	4619      	mov	r1, r3
 8025d40:	6878      	ldr	r0, [r7, #4]
 8025d42:	f000 f80b 	bl	8025d5c <ip4addr_aton>
 8025d46:	4603      	mov	r3, r0
 8025d48:	2b00      	cmp	r3, #0
 8025d4a:	d001      	beq.n	8025d50 <ipaddr_addr+0x1e>
    return ip4_addr_get_u32(&val);
 8025d4c:	68fb      	ldr	r3, [r7, #12]
 8025d4e:	e001      	b.n	8025d54 <ipaddr_addr+0x22>
  }
  return (IPADDR_NONE);
 8025d50:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8025d54:	4618      	mov	r0, r3
 8025d56:	3710      	adds	r7, #16
 8025d58:	46bd      	mov	sp, r7
 8025d5a:	bd80      	pop	{r7, pc}

08025d5c <ip4addr_aton>:
 * @param addr pointer to which to save the ip address in network order
 * @return 1 if cp could be converted to addr, 0 on failure
 */
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
 8025d5c:	b580      	push	{r7, lr}
 8025d5e:	b08a      	sub	sp, #40	@ 0x28
 8025d60:	af00      	add	r7, sp, #0
 8025d62:	6078      	str	r0, [r7, #4]
 8025d64:	6039      	str	r1, [r7, #0]
  u32_t val;
  u8_t base;
  char c;
  u32_t parts[4];
  u32_t *pp = parts;
 8025d66:	f107 030c 	add.w	r3, r7, #12
 8025d6a:	61fb      	str	r3, [r7, #28]

  c = *cp;
 8025d6c:	687b      	ldr	r3, [r7, #4]
 8025d6e:	781b      	ldrb	r3, [r3, #0]
 8025d70:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    /*
     * Collect number up to ``.''.
     * Values are specified as for C:
     * 0x=hex, 0=octal, 1-9=decimal.
     */
    if (!lwip_isdigit(c)) {
 8025d74:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025d78:	3301      	adds	r3, #1
 8025d7a:	4a89      	ldr	r2, [pc, #548]	@ (8025fa0 <ip4addr_aton+0x244>)
 8025d7c:	4413      	add	r3, r2
 8025d7e:	781b      	ldrb	r3, [r3, #0]
 8025d80:	f003 0304 	and.w	r3, r3, #4
 8025d84:	2b00      	cmp	r3, #0
 8025d86:	d101      	bne.n	8025d8c <ip4addr_aton+0x30>
      return 0;
 8025d88:	2300      	movs	r3, #0
 8025d8a:	e105      	b.n	8025f98 <ip4addr_aton+0x23c>
    }
    val = 0;
 8025d8c:	2300      	movs	r3, #0
 8025d8e:	627b      	str	r3, [r7, #36]	@ 0x24
    base = 10;
 8025d90:	230a      	movs	r3, #10
 8025d92:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    if (c == '0') {
 8025d96:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025d9a:	2b30      	cmp	r3, #48	@ 0x30
 8025d9c:	d11c      	bne.n	8025dd8 <ip4addr_aton+0x7c>
      c = *++cp;
 8025d9e:	687b      	ldr	r3, [r7, #4]
 8025da0:	3301      	adds	r3, #1
 8025da2:	607b      	str	r3, [r7, #4]
 8025da4:	687b      	ldr	r3, [r7, #4]
 8025da6:	781b      	ldrb	r3, [r3, #0]
 8025da8:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (c == 'x' || c == 'X') {
 8025dac:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025db0:	2b78      	cmp	r3, #120	@ 0x78
 8025db2:	d003      	beq.n	8025dbc <ip4addr_aton+0x60>
 8025db4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025db8:	2b58      	cmp	r3, #88	@ 0x58
 8025dba:	d10a      	bne.n	8025dd2 <ip4addr_aton+0x76>
        base = 16;
 8025dbc:	2310      	movs	r3, #16
 8025dbe:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        c = *++cp;
 8025dc2:	687b      	ldr	r3, [r7, #4]
 8025dc4:	3301      	adds	r3, #1
 8025dc6:	607b      	str	r3, [r7, #4]
 8025dc8:	687b      	ldr	r3, [r7, #4]
 8025dca:	781b      	ldrb	r3, [r3, #0]
 8025dcc:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8025dd0:	e002      	b.n	8025dd8 <ip4addr_aton+0x7c>
      } else {
        base = 8;
 8025dd2:	2308      	movs	r3, #8
 8025dd4:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
      }
    }
    for (;;) {
      if (lwip_isdigit(c)) {
 8025dd8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025ddc:	3301      	adds	r3, #1
 8025dde:	4a70      	ldr	r2, [pc, #448]	@ (8025fa0 <ip4addr_aton+0x244>)
 8025de0:	4413      	add	r3, r2
 8025de2:	781b      	ldrb	r3, [r3, #0]
 8025de4:	f003 0304 	and.w	r3, r3, #4
 8025de8:	2b00      	cmp	r3, #0
 8025dea:	d011      	beq.n	8025e10 <ip4addr_aton+0xb4>
        val = (val * base) + (u32_t)(c - '0');
 8025dec:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025df0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025df2:	fb03 f202 	mul.w	r2, r3, r2
 8025df6:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025dfa:	4413      	add	r3, r2
 8025dfc:	3b30      	subs	r3, #48	@ 0x30
 8025dfe:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8025e00:	687b      	ldr	r3, [r7, #4]
 8025e02:	3301      	adds	r3, #1
 8025e04:	607b      	str	r3, [r7, #4]
 8025e06:	687b      	ldr	r3, [r7, #4]
 8025e08:	781b      	ldrb	r3, [r3, #0]
 8025e0a:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8025e0e:	e7e3      	b.n	8025dd8 <ip4addr_aton+0x7c>
      } else if (base == 16 && lwip_isxdigit(c)) {
 8025e10:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8025e14:	2b10      	cmp	r3, #16
 8025e16:	d127      	bne.n	8025e68 <ip4addr_aton+0x10c>
 8025e18:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025e1c:	3301      	adds	r3, #1
 8025e1e:	4a60      	ldr	r2, [pc, #384]	@ (8025fa0 <ip4addr_aton+0x244>)
 8025e20:	4413      	add	r3, r2
 8025e22:	781b      	ldrb	r3, [r3, #0]
 8025e24:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8025e28:	2b00      	cmp	r3, #0
 8025e2a:	d01d      	beq.n	8025e68 <ip4addr_aton+0x10c>
        val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
 8025e2c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025e2e:	011b      	lsls	r3, r3, #4
 8025e30:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8025e34:	f102 010a 	add.w	r1, r2, #10
 8025e38:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8025e3c:	3201      	adds	r2, #1
 8025e3e:	4858      	ldr	r0, [pc, #352]	@ (8025fa0 <ip4addr_aton+0x244>)
 8025e40:	4402      	add	r2, r0
 8025e42:	7812      	ldrb	r2, [r2, #0]
 8025e44:	f002 0203 	and.w	r2, r2, #3
 8025e48:	2a02      	cmp	r2, #2
 8025e4a:	d101      	bne.n	8025e50 <ip4addr_aton+0xf4>
 8025e4c:	2261      	movs	r2, #97	@ 0x61
 8025e4e:	e000      	b.n	8025e52 <ip4addr_aton+0xf6>
 8025e50:	2241      	movs	r2, #65	@ 0x41
 8025e52:	1a8a      	subs	r2, r1, r2
 8025e54:	4313      	orrs	r3, r2
 8025e56:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8025e58:	687b      	ldr	r3, [r7, #4]
 8025e5a:	3301      	adds	r3, #1
 8025e5c:	607b      	str	r3, [r7, #4]
 8025e5e:	687b      	ldr	r3, [r7, #4]
 8025e60:	781b      	ldrb	r3, [r3, #0]
 8025e62:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (lwip_isdigit(c)) {
 8025e66:	e7b7      	b.n	8025dd8 <ip4addr_aton+0x7c>
      } else {
        break;
      }
    }
    if (c == '.') {
 8025e68:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025e6c:	2b2e      	cmp	r3, #46	@ 0x2e
 8025e6e:	d114      	bne.n	8025e9a <ip4addr_aton+0x13e>
       * Internet format:
       *  a.b.c.d
       *  a.b.c   (with c treated as 16 bits)
       *  a.b (with b treated as 24 bits)
       */
      if (pp >= parts + 3) {
 8025e70:	f107 030c 	add.w	r3, r7, #12
 8025e74:	330c      	adds	r3, #12
 8025e76:	69fa      	ldr	r2, [r7, #28]
 8025e78:	429a      	cmp	r2, r3
 8025e7a:	d301      	bcc.n	8025e80 <ip4addr_aton+0x124>
        return 0;
 8025e7c:	2300      	movs	r3, #0
 8025e7e:	e08b      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      *pp++ = val;
 8025e80:	69fb      	ldr	r3, [r7, #28]
 8025e82:	1d1a      	adds	r2, r3, #4
 8025e84:	61fa      	str	r2, [r7, #28]
 8025e86:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025e88:	601a      	str	r2, [r3, #0]
      c = *++cp;
 8025e8a:	687b      	ldr	r3, [r7, #4]
 8025e8c:	3301      	adds	r3, #1
 8025e8e:	607b      	str	r3, [r7, #4]
 8025e90:	687b      	ldr	r3, [r7, #4]
 8025e92:	781b      	ldrb	r3, [r3, #0]
 8025e94:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    if (!lwip_isdigit(c)) {
 8025e98:	e76c      	b.n	8025d74 <ip4addr_aton+0x18>
    } else {
      break;
 8025e9a:	bf00      	nop
    }
  }
  /*
   * Check for trailing characters.
   */
  if (c != '\0' && !lwip_isspace(c)) {
 8025e9c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025ea0:	2b00      	cmp	r3, #0
 8025ea2:	d00b      	beq.n	8025ebc <ip4addr_aton+0x160>
 8025ea4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8025ea8:	3301      	adds	r3, #1
 8025eaa:	4a3d      	ldr	r2, [pc, #244]	@ (8025fa0 <ip4addr_aton+0x244>)
 8025eac:	4413      	add	r3, r2
 8025eae:	781b      	ldrb	r3, [r3, #0]
 8025eb0:	f003 0308 	and.w	r3, r3, #8
 8025eb4:	2b00      	cmp	r3, #0
 8025eb6:	d101      	bne.n	8025ebc <ip4addr_aton+0x160>
    return 0;
 8025eb8:	2300      	movs	r3, #0
 8025eba:	e06d      	b.n	8025f98 <ip4addr_aton+0x23c>
  }
  /*
   * Concoct the address according to
   * the number of parts specified.
   */
  switch (pp - parts + 1) {
 8025ebc:	f107 030c 	add.w	r3, r7, #12
 8025ec0:	69fa      	ldr	r2, [r7, #28]
 8025ec2:	1ad3      	subs	r3, r2, r3
 8025ec4:	109b      	asrs	r3, r3, #2
 8025ec6:	3301      	adds	r3, #1
 8025ec8:	2b04      	cmp	r3, #4
 8025eca:	d853      	bhi.n	8025f74 <ip4addr_aton+0x218>
 8025ecc:	a201      	add	r2, pc, #4	@ (adr r2, 8025ed4 <ip4addr_aton+0x178>)
 8025ece:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8025ed2:	bf00      	nop
 8025ed4:	08025ee9 	.word	0x08025ee9
 8025ed8:	08025f83 	.word	0x08025f83
 8025edc:	08025eed 	.word	0x08025eed
 8025ee0:	08025f0f 	.word	0x08025f0f
 8025ee4:	08025f3d 	.word	0x08025f3d

    case 0:
      return 0;       /* initial nondigit */
 8025ee8:	2300      	movs	r3, #0
 8025eea:	e055      	b.n	8025f98 <ip4addr_aton+0x23c>

    case 1:             /* a -- 32 bits */
      break;

    case 2:             /* a.b -- 8.24 bits */
      if (val > 0xffffffUL) {
 8025eec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025eee:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 8025ef2:	d301      	bcc.n	8025ef8 <ip4addr_aton+0x19c>
        return 0;
 8025ef4:	2300      	movs	r3, #0
 8025ef6:	e04f      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      if (parts[0] > 0xff) {
 8025ef8:	68fb      	ldr	r3, [r7, #12]
 8025efa:	2bff      	cmp	r3, #255	@ 0xff
 8025efc:	d901      	bls.n	8025f02 <ip4addr_aton+0x1a6>
        return 0;
 8025efe:	2300      	movs	r3, #0
 8025f00:	e04a      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      val |= parts[0] << 24;
 8025f02:	68fb      	ldr	r3, [r7, #12]
 8025f04:	061b      	lsls	r3, r3, #24
 8025f06:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025f08:	4313      	orrs	r3, r2
 8025f0a:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8025f0c:	e03a      	b.n	8025f84 <ip4addr_aton+0x228>

    case 3:             /* a.b.c -- 8.8.16 bits */
      if (val > 0xffff) {
 8025f0e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025f10:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8025f14:	d301      	bcc.n	8025f1a <ip4addr_aton+0x1be>
        return 0;
 8025f16:	2300      	movs	r3, #0
 8025f18:	e03e      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
 8025f1a:	68fb      	ldr	r3, [r7, #12]
 8025f1c:	2bff      	cmp	r3, #255	@ 0xff
 8025f1e:	d802      	bhi.n	8025f26 <ip4addr_aton+0x1ca>
 8025f20:	693b      	ldr	r3, [r7, #16]
 8025f22:	2bff      	cmp	r3, #255	@ 0xff
 8025f24:	d901      	bls.n	8025f2a <ip4addr_aton+0x1ce>
        return 0;
 8025f26:	2300      	movs	r3, #0
 8025f28:	e036      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16);
 8025f2a:	68fb      	ldr	r3, [r7, #12]
 8025f2c:	061a      	lsls	r2, r3, #24
 8025f2e:	693b      	ldr	r3, [r7, #16]
 8025f30:	041b      	lsls	r3, r3, #16
 8025f32:	4313      	orrs	r3, r2
 8025f34:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025f36:	4313      	orrs	r3, r2
 8025f38:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8025f3a:	e023      	b.n	8025f84 <ip4addr_aton+0x228>

    case 4:             /* a.b.c.d -- 8.8.8.8 bits */
      if (val > 0xff) {
 8025f3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8025f3e:	2bff      	cmp	r3, #255	@ 0xff
 8025f40:	d901      	bls.n	8025f46 <ip4addr_aton+0x1ea>
        return 0;
 8025f42:	2300      	movs	r3, #0
 8025f44:	e028      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
 8025f46:	68fb      	ldr	r3, [r7, #12]
 8025f48:	2bff      	cmp	r3, #255	@ 0xff
 8025f4a:	d805      	bhi.n	8025f58 <ip4addr_aton+0x1fc>
 8025f4c:	693b      	ldr	r3, [r7, #16]
 8025f4e:	2bff      	cmp	r3, #255	@ 0xff
 8025f50:	d802      	bhi.n	8025f58 <ip4addr_aton+0x1fc>
 8025f52:	697b      	ldr	r3, [r7, #20]
 8025f54:	2bff      	cmp	r3, #255	@ 0xff
 8025f56:	d901      	bls.n	8025f5c <ip4addr_aton+0x200>
        return 0;
 8025f58:	2300      	movs	r3, #0
 8025f5a:	e01d      	b.n	8025f98 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
 8025f5c:	68fb      	ldr	r3, [r7, #12]
 8025f5e:	061a      	lsls	r2, r3, #24
 8025f60:	693b      	ldr	r3, [r7, #16]
 8025f62:	041b      	lsls	r3, r3, #16
 8025f64:	431a      	orrs	r2, r3
 8025f66:	697b      	ldr	r3, [r7, #20]
 8025f68:	021b      	lsls	r3, r3, #8
 8025f6a:	4313      	orrs	r3, r2
 8025f6c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8025f6e:	4313      	orrs	r3, r2
 8025f70:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8025f72:	e007      	b.n	8025f84 <ip4addr_aton+0x228>
    default:
      LWIP_ASSERT("unhandled", 0);
 8025f74:	4b0b      	ldr	r3, [pc, #44]	@ (8025fa4 <ip4addr_aton+0x248>)
 8025f76:	22f9      	movs	r2, #249	@ 0xf9
 8025f78:	490b      	ldr	r1, [pc, #44]	@ (8025fa8 <ip4addr_aton+0x24c>)
 8025f7a:	480c      	ldr	r0, [pc, #48]	@ (8025fac <ip4addr_aton+0x250>)
 8025f7c:	f004 fbee 	bl	802a75c <iprintf>
      break;
 8025f80:	e000      	b.n	8025f84 <ip4addr_aton+0x228>
      break;
 8025f82:	bf00      	nop
  }
  if (addr) {
 8025f84:	683b      	ldr	r3, [r7, #0]
 8025f86:	2b00      	cmp	r3, #0
 8025f88:	d005      	beq.n	8025f96 <ip4addr_aton+0x23a>
    ip4_addr_set_u32(addr, lwip_htonl(val));
 8025f8a:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8025f8c:	f7f3 fca1 	bl	80198d2 <lwip_htonl>
 8025f90:	4602      	mov	r2, r0
 8025f92:	683b      	ldr	r3, [r7, #0]
 8025f94:	601a      	str	r2, [r3, #0]
  }
  return 1;
 8025f96:	2301      	movs	r3, #1
}
 8025f98:	4618      	mov	r0, r3
 8025f9a:	3728      	adds	r7, #40	@ 0x28
 8025f9c:	46bd      	mov	sp, r7
 8025f9e:	bd80      	pop	{r7, pc}
 8025fa0:	08031c30 	.word	0x08031c30
 8025fa4:	080314e0 	.word	0x080314e0
 8025fa8:	0803151c 	.word	0x0803151c
 8025fac:	08031528 	.word	0x08031528

08025fb0 <ip4addr_ntoa>:
 * @return pointer to a global static (!) buffer that holds the ASCII
 *         representation of addr
 */
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
 8025fb0:	b580      	push	{r7, lr}
 8025fb2:	b082      	sub	sp, #8
 8025fb4:	af00      	add	r7, sp, #0
 8025fb6:	6078      	str	r0, [r7, #4]
  static char str[IP4ADDR_STRLEN_MAX];
  return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
 8025fb8:	2210      	movs	r2, #16
 8025fba:	4904      	ldr	r1, [pc, #16]	@ (8025fcc <ip4addr_ntoa+0x1c>)
 8025fbc:	6878      	ldr	r0, [r7, #4]
 8025fbe:	f000 f807 	bl	8025fd0 <ip4addr_ntoa_r>
 8025fc2:	4603      	mov	r3, r0
}
 8025fc4:	4618      	mov	r0, r3
 8025fc6:	3708      	adds	r7, #8
 8025fc8:	46bd      	mov	sp, r7
 8025fca:	bd80      	pop	{r7, pc}
 8025fcc:	2402b0f4 	.word	0x2402b0f4

08025fd0 <ip4addr_ntoa_r>:
 * @return either pointer to buf which now holds the ASCII
 *         representation of addr or NULL if buf was too small
 */
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
 8025fd0:	b480      	push	{r7}
 8025fd2:	b08d      	sub	sp, #52	@ 0x34
 8025fd4:	af00      	add	r7, sp, #0
 8025fd6:	60f8      	str	r0, [r7, #12]
 8025fd8:	60b9      	str	r1, [r7, #8]
 8025fda:	607a      	str	r2, [r7, #4]
  char *rp;
  u8_t *ap;
  u8_t rem;
  u8_t n;
  u8_t i;
  int len = 0;
 8025fdc:	2300      	movs	r3, #0
 8025fde:	623b      	str	r3, [r7, #32]

  s_addr = ip4_addr_get_u32(addr);
 8025fe0:	68fb      	ldr	r3, [r7, #12]
 8025fe2:	681b      	ldr	r3, [r3, #0]
 8025fe4:	61bb      	str	r3, [r7, #24]

  rp = buf;
 8025fe6:	68bb      	ldr	r3, [r7, #8]
 8025fe8:	62fb      	str	r3, [r7, #44]	@ 0x2c
  ap = (u8_t *)&s_addr;
 8025fea:	f107 0318 	add.w	r3, r7, #24
 8025fee:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 8025ff0:	2300      	movs	r3, #0
 8025ff2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025ff6:	e058      	b.n	80260aa <ip4addr_ntoa_r+0xda>
    i = 0;
 8025ff8:	2300      	movs	r3, #0
 8025ffa:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    do {
      rem = *ap % (u8_t)10;
 8025ffe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026000:	781a      	ldrb	r2, [r3, #0]
 8026002:	4b32      	ldr	r3, [pc, #200]	@ (80260cc <ip4addr_ntoa_r+0xfc>)
 8026004:	fba3 1302 	umull	r1, r3, r3, r2
 8026008:	08d9      	lsrs	r1, r3, #3
 802600a:	460b      	mov	r3, r1
 802600c:	009b      	lsls	r3, r3, #2
 802600e:	440b      	add	r3, r1
 8026010:	005b      	lsls	r3, r3, #1
 8026012:	1ad3      	subs	r3, r2, r3
 8026014:	77fb      	strb	r3, [r7, #31]
      *ap /= (u8_t)10;
 8026016:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026018:	781b      	ldrb	r3, [r3, #0]
 802601a:	4a2c      	ldr	r2, [pc, #176]	@ (80260cc <ip4addr_ntoa_r+0xfc>)
 802601c:	fba2 2303 	umull	r2, r3, r2, r3
 8026020:	08db      	lsrs	r3, r3, #3
 8026022:	b2da      	uxtb	r2, r3
 8026024:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026026:	701a      	strb	r2, [r3, #0]
      inv[i++] = (char)('0' + rem);
 8026028:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802602c:	1c5a      	adds	r2, r3, #1
 802602e:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8026032:	4619      	mov	r1, r3
 8026034:	7ffb      	ldrb	r3, [r7, #31]
 8026036:	3330      	adds	r3, #48	@ 0x30
 8026038:	b2da      	uxtb	r2, r3
 802603a:	f101 0330 	add.w	r3, r1, #48	@ 0x30
 802603e:	443b      	add	r3, r7
 8026040:	f803 2c1c 	strb.w	r2, [r3, #-28]
    } while (*ap);
 8026044:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026046:	781b      	ldrb	r3, [r3, #0]
 8026048:	2b00      	cmp	r3, #0
 802604a:	d1d8      	bne.n	8025ffe <ip4addr_ntoa_r+0x2e>
    while (i--) {
 802604c:	e011      	b.n	8026072 <ip4addr_ntoa_r+0xa2>
      if (len++ >= buflen) {
 802604e:	6a3b      	ldr	r3, [r7, #32]
 8026050:	1c5a      	adds	r2, r3, #1
 8026052:	623a      	str	r2, [r7, #32]
 8026054:	687a      	ldr	r2, [r7, #4]
 8026056:	429a      	cmp	r2, r3
 8026058:	dc01      	bgt.n	802605e <ip4addr_ntoa_r+0x8e>
        return NULL;
 802605a:	2300      	movs	r3, #0
 802605c:	e030      	b.n	80260c0 <ip4addr_ntoa_r+0xf0>
      }
      *rp++ = inv[i];
 802605e:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8026062:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026064:	1c59      	adds	r1, r3, #1
 8026066:	62f9      	str	r1, [r7, #44]	@ 0x2c
 8026068:	3230      	adds	r2, #48	@ 0x30
 802606a:	443a      	add	r2, r7
 802606c:	f812 2c1c 	ldrb.w	r2, [r2, #-28]
 8026070:	701a      	strb	r2, [r3, #0]
    while (i--) {
 8026072:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8026076:	1e5a      	subs	r2, r3, #1
 8026078:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 802607c:	2b00      	cmp	r3, #0
 802607e:	d1e6      	bne.n	802604e <ip4addr_ntoa_r+0x7e>
    }
    if (len++ >= buflen) {
 8026080:	6a3b      	ldr	r3, [r7, #32]
 8026082:	1c5a      	adds	r2, r3, #1
 8026084:	623a      	str	r2, [r7, #32]
 8026086:	687a      	ldr	r2, [r7, #4]
 8026088:	429a      	cmp	r2, r3
 802608a:	dc01      	bgt.n	8026090 <ip4addr_ntoa_r+0xc0>
      return NULL;
 802608c:	2300      	movs	r3, #0
 802608e:	e017      	b.n	80260c0 <ip4addr_ntoa_r+0xf0>
    }
    *rp++ = '.';
 8026090:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026092:	1c5a      	adds	r2, r3, #1
 8026094:	62fa      	str	r2, [r7, #44]	@ 0x2c
 8026096:	222e      	movs	r2, #46	@ 0x2e
 8026098:	701a      	strb	r2, [r3, #0]
    ap++;
 802609a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802609c:	3301      	adds	r3, #1
 802609e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 80260a0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80260a4:	3301      	adds	r3, #1
 80260a6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 80260aa:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80260ae:	2b03      	cmp	r3, #3
 80260b0:	d9a2      	bls.n	8025ff8 <ip4addr_ntoa_r+0x28>
  }
  *--rp = 0;
 80260b2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80260b4:	3b01      	subs	r3, #1
 80260b6:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80260b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80260ba:	2200      	movs	r2, #0
 80260bc:	701a      	strb	r2, [r3, #0]
  return buf;
 80260be:	68bb      	ldr	r3, [r7, #8]
}
 80260c0:	4618      	mov	r0, r3
 80260c2:	3734      	adds	r7, #52	@ 0x34
 80260c4:	46bd      	mov	sp, r7
 80260c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80260ca:	4770      	bx	lr
 80260cc:	cccccccd 	.word	0xcccccccd

080260d0 <ip_reass_tmr>:
 *
 * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
 */
void
ip_reass_tmr(void)
{
 80260d0:	b580      	push	{r7, lr}
 80260d2:	b084      	sub	sp, #16
 80260d4:	af00      	add	r7, sp, #0
  struct ip_reassdata *r, *prev = NULL;
 80260d6:	2300      	movs	r3, #0
 80260d8:	60bb      	str	r3, [r7, #8]

  r = reassdatagrams;
 80260da:	4b12      	ldr	r3, [pc, #72]	@ (8026124 <ip_reass_tmr+0x54>)
 80260dc:	681b      	ldr	r3, [r3, #0]
 80260de:	60fb      	str	r3, [r7, #12]
  while (r != NULL) {
 80260e0:	e018      	b.n	8026114 <ip_reass_tmr+0x44>
    /* Decrement the timer. Once it reaches 0,
     * clean up the incomplete fragment assembly */
    if (r->timer > 0) {
 80260e2:	68fb      	ldr	r3, [r7, #12]
 80260e4:	7fdb      	ldrb	r3, [r3, #31]
 80260e6:	2b00      	cmp	r3, #0
 80260e8:	d00b      	beq.n	8026102 <ip_reass_tmr+0x32>
      r->timer--;
 80260ea:	68fb      	ldr	r3, [r7, #12]
 80260ec:	7fdb      	ldrb	r3, [r3, #31]
 80260ee:	3b01      	subs	r3, #1
 80260f0:	b2da      	uxtb	r2, r3
 80260f2:	68fb      	ldr	r3, [r7, #12]
 80260f4:	77da      	strb	r2, [r3, #31]
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
      prev = r;
 80260f6:	68fb      	ldr	r3, [r7, #12]
 80260f8:	60bb      	str	r3, [r7, #8]
      r = r->next;
 80260fa:	68fb      	ldr	r3, [r7, #12]
 80260fc:	681b      	ldr	r3, [r3, #0]
 80260fe:	60fb      	str	r3, [r7, #12]
 8026100:	e008      	b.n	8026114 <ip_reass_tmr+0x44>
    } else {
      /* reassembly timed out */
      struct ip_reassdata *tmp;
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
      tmp = r;
 8026102:	68fb      	ldr	r3, [r7, #12]
 8026104:	607b      	str	r3, [r7, #4]
      /* get the next pointer before freeing */
      r = r->next;
 8026106:	68fb      	ldr	r3, [r7, #12]
 8026108:	681b      	ldr	r3, [r3, #0]
 802610a:	60fb      	str	r3, [r7, #12]
      /* free the helper struct and all enqueued pbufs */
      ip_reass_free_complete_datagram(tmp, prev);
 802610c:	68b9      	ldr	r1, [r7, #8]
 802610e:	6878      	ldr	r0, [r7, #4]
 8026110:	f000 f80a 	bl	8026128 <ip_reass_free_complete_datagram>
  while (r != NULL) {
 8026114:	68fb      	ldr	r3, [r7, #12]
 8026116:	2b00      	cmp	r3, #0
 8026118:	d1e3      	bne.n	80260e2 <ip_reass_tmr+0x12>
    }
  }
}
 802611a:	bf00      	nop
 802611c:	bf00      	nop
 802611e:	3710      	adds	r7, #16
 8026120:	46bd      	mov	sp, r7
 8026122:	bd80      	pop	{r7, pc}
 8026124:	2402b104 	.word	0x2402b104

08026128 <ip_reass_free_complete_datagram>:
 * @param prev the previous datagram in the linked list
 * @return the number of pbufs freed
 */
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8026128:	b580      	push	{r7, lr}
 802612a:	b088      	sub	sp, #32
 802612c:	af00      	add	r7, sp, #0
 802612e:	6078      	str	r0, [r7, #4]
 8026130:	6039      	str	r1, [r7, #0]
  u16_t pbufs_freed = 0;
 8026132:	2300      	movs	r3, #0
 8026134:	83fb      	strh	r3, [r7, #30]
  u16_t clen;
  struct pbuf *p;
  struct ip_reass_helper *iprh;

  LWIP_ASSERT("prev != ipr", prev != ipr);
 8026136:	683a      	ldr	r2, [r7, #0]
 8026138:	687b      	ldr	r3, [r7, #4]
 802613a:	429a      	cmp	r2, r3
 802613c:	d105      	bne.n	802614a <ip_reass_free_complete_datagram+0x22>
 802613e:	4b45      	ldr	r3, [pc, #276]	@ (8026254 <ip_reass_free_complete_datagram+0x12c>)
 8026140:	22ab      	movs	r2, #171	@ 0xab
 8026142:	4945      	ldr	r1, [pc, #276]	@ (8026258 <ip_reass_free_complete_datagram+0x130>)
 8026144:	4845      	ldr	r0, [pc, #276]	@ (802625c <ip_reass_free_complete_datagram+0x134>)
 8026146:	f004 fb09 	bl	802a75c <iprintf>
  if (prev != NULL) {
 802614a:	683b      	ldr	r3, [r7, #0]
 802614c:	2b00      	cmp	r3, #0
 802614e:	d00a      	beq.n	8026166 <ip_reass_free_complete_datagram+0x3e>
    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
 8026150:	683b      	ldr	r3, [r7, #0]
 8026152:	681b      	ldr	r3, [r3, #0]
 8026154:	687a      	ldr	r2, [r7, #4]
 8026156:	429a      	cmp	r2, r3
 8026158:	d005      	beq.n	8026166 <ip_reass_free_complete_datagram+0x3e>
 802615a:	4b3e      	ldr	r3, [pc, #248]	@ (8026254 <ip_reass_free_complete_datagram+0x12c>)
 802615c:	22ad      	movs	r2, #173	@ 0xad
 802615e:	4940      	ldr	r1, [pc, #256]	@ (8026260 <ip_reass_free_complete_datagram+0x138>)
 8026160:	483e      	ldr	r0, [pc, #248]	@ (802625c <ip_reass_free_complete_datagram+0x134>)
 8026162:	f004 fafb 	bl	802a75c <iprintf>
  }

  MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
  iprh = (struct ip_reass_helper *)ipr->p->payload;
 8026166:	687b      	ldr	r3, [r7, #4]
 8026168:	685b      	ldr	r3, [r3, #4]
 802616a:	685b      	ldr	r3, [r3, #4]
 802616c:	617b      	str	r3, [r7, #20]
  if (iprh->start == 0) {
 802616e:	697b      	ldr	r3, [r7, #20]
 8026170:	889b      	ldrh	r3, [r3, #4]
 8026172:	b29b      	uxth	r3, r3
 8026174:	2b00      	cmp	r3, #0
 8026176:	d12a      	bne.n	80261ce <ip_reass_free_complete_datagram+0xa6>
    /* The first fragment was received, send ICMP time exceeded. */
    /* First, de-queue the first pbuf from r->p. */
    p = ipr->p;
 8026178:	687b      	ldr	r3, [r7, #4]
 802617a:	685b      	ldr	r3, [r3, #4]
 802617c:	61bb      	str	r3, [r7, #24]
    ipr->p = iprh->next_pbuf;
 802617e:	697b      	ldr	r3, [r7, #20]
 8026180:	681a      	ldr	r2, [r3, #0]
 8026182:	687b      	ldr	r3, [r7, #4]
 8026184:	605a      	str	r2, [r3, #4]
    /* Then, copy the original header into it. */
    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
 8026186:	69bb      	ldr	r3, [r7, #24]
 8026188:	6858      	ldr	r0, [r3, #4]
 802618a:	687b      	ldr	r3, [r7, #4]
 802618c:	3308      	adds	r3, #8
 802618e:	2214      	movs	r2, #20
 8026190:	4619      	mov	r1, r3
 8026192:	f004 fd6c 	bl	802ac6e <memcpy>
    icmp_time_exceeded(p, ICMP_TE_FRAG);
 8026196:	2101      	movs	r1, #1
 8026198:	69b8      	ldr	r0, [r7, #24]
 802619a:	f7ff fa4d 	bl	8025638 <icmp_time_exceeded>
    clen = pbuf_clen(p);
 802619e:	69b8      	ldr	r0, [r7, #24]
 80261a0:	f7f5 f8f2 	bl	801b388 <pbuf_clen>
 80261a4:	4603      	mov	r3, r0
 80261a6:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 80261a8:	8bfa      	ldrh	r2, [r7, #30]
 80261aa:	8a7b      	ldrh	r3, [r7, #18]
 80261ac:	4413      	add	r3, r2
 80261ae:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80261b2:	db05      	blt.n	80261c0 <ip_reass_free_complete_datagram+0x98>
 80261b4:	4b27      	ldr	r3, [pc, #156]	@ (8026254 <ip_reass_free_complete_datagram+0x12c>)
 80261b6:	22bc      	movs	r2, #188	@ 0xbc
 80261b8:	492a      	ldr	r1, [pc, #168]	@ (8026264 <ip_reass_free_complete_datagram+0x13c>)
 80261ba:	4828      	ldr	r0, [pc, #160]	@ (802625c <ip_reass_free_complete_datagram+0x134>)
 80261bc:	f004 face 	bl	802a75c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 80261c0:	8bfa      	ldrh	r2, [r7, #30]
 80261c2:	8a7b      	ldrh	r3, [r7, #18]
 80261c4:	4413      	add	r3, r2
 80261c6:	83fb      	strh	r3, [r7, #30]
    pbuf_free(p);
 80261c8:	69b8      	ldr	r0, [r7, #24]
 80261ca:	f7f5 f84f 	bl	801b26c <pbuf_free>
  }
#endif /* LWIP_ICMP */

  /* First, free all received pbufs.  The individual pbufs need to be released
     separately as they have not yet been chained */
  p = ipr->p;
 80261ce:	687b      	ldr	r3, [r7, #4]
 80261d0:	685b      	ldr	r3, [r3, #4]
 80261d2:	61bb      	str	r3, [r7, #24]
  while (p != NULL) {
 80261d4:	e01f      	b.n	8026216 <ip_reass_free_complete_datagram+0xee>
    struct pbuf *pcur;
    iprh = (struct ip_reass_helper *)p->payload;
 80261d6:	69bb      	ldr	r3, [r7, #24]
 80261d8:	685b      	ldr	r3, [r3, #4]
 80261da:	617b      	str	r3, [r7, #20]
    pcur = p;
 80261dc:	69bb      	ldr	r3, [r7, #24]
 80261de:	60fb      	str	r3, [r7, #12]
    /* get the next pointer before freeing */
    p = iprh->next_pbuf;
 80261e0:	697b      	ldr	r3, [r7, #20]
 80261e2:	681b      	ldr	r3, [r3, #0]
 80261e4:	61bb      	str	r3, [r7, #24]
    clen = pbuf_clen(pcur);
 80261e6:	68f8      	ldr	r0, [r7, #12]
 80261e8:	f7f5 f8ce 	bl	801b388 <pbuf_clen>
 80261ec:	4603      	mov	r3, r0
 80261ee:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 80261f0:	8bfa      	ldrh	r2, [r7, #30]
 80261f2:	8a7b      	ldrh	r3, [r7, #18]
 80261f4:	4413      	add	r3, r2
 80261f6:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80261fa:	db05      	blt.n	8026208 <ip_reass_free_complete_datagram+0xe0>
 80261fc:	4b15      	ldr	r3, [pc, #84]	@ (8026254 <ip_reass_free_complete_datagram+0x12c>)
 80261fe:	22cc      	movs	r2, #204	@ 0xcc
 8026200:	4918      	ldr	r1, [pc, #96]	@ (8026264 <ip_reass_free_complete_datagram+0x13c>)
 8026202:	4816      	ldr	r0, [pc, #88]	@ (802625c <ip_reass_free_complete_datagram+0x134>)
 8026204:	f004 faaa 	bl	802a75c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8026208:	8bfa      	ldrh	r2, [r7, #30]
 802620a:	8a7b      	ldrh	r3, [r7, #18]
 802620c:	4413      	add	r3, r2
 802620e:	83fb      	strh	r3, [r7, #30]
    pbuf_free(pcur);
 8026210:	68f8      	ldr	r0, [r7, #12]
 8026212:	f7f5 f82b 	bl	801b26c <pbuf_free>
  while (p != NULL) {
 8026216:	69bb      	ldr	r3, [r7, #24]
 8026218:	2b00      	cmp	r3, #0
 802621a:	d1dc      	bne.n	80261d6 <ip_reass_free_complete_datagram+0xae>
  }
  /* Then, unchain the struct ip_reassdata from the list and free it. */
  ip_reass_dequeue_datagram(ipr, prev);
 802621c:	6839      	ldr	r1, [r7, #0]
 802621e:	6878      	ldr	r0, [r7, #4]
 8026220:	f000 f8c2 	bl	80263a8 <ip_reass_dequeue_datagram>
  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
 8026224:	4b10      	ldr	r3, [pc, #64]	@ (8026268 <ip_reass_free_complete_datagram+0x140>)
 8026226:	881b      	ldrh	r3, [r3, #0]
 8026228:	8bfa      	ldrh	r2, [r7, #30]
 802622a:	429a      	cmp	r2, r3
 802622c:	d905      	bls.n	802623a <ip_reass_free_complete_datagram+0x112>
 802622e:	4b09      	ldr	r3, [pc, #36]	@ (8026254 <ip_reass_free_complete_datagram+0x12c>)
 8026230:	22d2      	movs	r2, #210	@ 0xd2
 8026232:	490e      	ldr	r1, [pc, #56]	@ (802626c <ip_reass_free_complete_datagram+0x144>)
 8026234:	4809      	ldr	r0, [pc, #36]	@ (802625c <ip_reass_free_complete_datagram+0x134>)
 8026236:	f004 fa91 	bl	802a75c <iprintf>
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
 802623a:	4b0b      	ldr	r3, [pc, #44]	@ (8026268 <ip_reass_free_complete_datagram+0x140>)
 802623c:	881a      	ldrh	r2, [r3, #0]
 802623e:	8bfb      	ldrh	r3, [r7, #30]
 8026240:	1ad3      	subs	r3, r2, r3
 8026242:	b29a      	uxth	r2, r3
 8026244:	4b08      	ldr	r3, [pc, #32]	@ (8026268 <ip_reass_free_complete_datagram+0x140>)
 8026246:	801a      	strh	r2, [r3, #0]

  return pbufs_freed;
 8026248:	8bfb      	ldrh	r3, [r7, #30]
}
 802624a:	4618      	mov	r0, r3
 802624c:	3720      	adds	r7, #32
 802624e:	46bd      	mov	sp, r7
 8026250:	bd80      	pop	{r7, pc}
 8026252:	bf00      	nop
 8026254:	08031550 	.word	0x08031550
 8026258:	0803158c 	.word	0x0803158c
 802625c:	08031598 	.word	0x08031598
 8026260:	080315c0 	.word	0x080315c0
 8026264:	080315d4 	.word	0x080315d4
 8026268:	2402b108 	.word	0x2402b108
 802626c:	080315f4 	.word	0x080315f4

08026270 <ip_reass_remove_oldest_datagram>:
 *        (used for freeing other datagrams if not enough space)
 * @return the number of pbufs freed
 */
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
 8026270:	b580      	push	{r7, lr}
 8026272:	b08a      	sub	sp, #40	@ 0x28
 8026274:	af00      	add	r7, sp, #0
 8026276:	6078      	str	r0, [r7, #4]
 8026278:	6039      	str	r1, [r7, #0]
  /* @todo Can't we simply remove the last datagram in the
   *       linked list behind reassdatagrams?
   */
  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
  int pbufs_freed = 0, pbufs_freed_current;
 802627a:	2300      	movs	r3, #0
 802627c:	617b      	str	r3, [r7, #20]
  int other_datagrams;

  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
   * but don't free the datagram that 'fraghdr' belongs to! */
  do {
    oldest = NULL;
 802627e:	2300      	movs	r3, #0
 8026280:	623b      	str	r3, [r7, #32]
    prev = NULL;
 8026282:	2300      	movs	r3, #0
 8026284:	61fb      	str	r3, [r7, #28]
    oldest_prev = NULL;
 8026286:	2300      	movs	r3, #0
 8026288:	61bb      	str	r3, [r7, #24]
    other_datagrams = 0;
 802628a:	2300      	movs	r3, #0
 802628c:	613b      	str	r3, [r7, #16]
    r = reassdatagrams;
 802628e:	4b28      	ldr	r3, [pc, #160]	@ (8026330 <ip_reass_remove_oldest_datagram+0xc0>)
 8026290:	681b      	ldr	r3, [r3, #0]
 8026292:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8026294:	e030      	b.n	80262f8 <ip_reass_remove_oldest_datagram+0x88>
      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
 8026296:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026298:	695a      	ldr	r2, [r3, #20]
 802629a:	687b      	ldr	r3, [r7, #4]
 802629c:	68db      	ldr	r3, [r3, #12]
 802629e:	429a      	cmp	r2, r3
 80262a0:	d10c      	bne.n	80262bc <ip_reass_remove_oldest_datagram+0x4c>
 80262a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262a4:	699a      	ldr	r2, [r3, #24]
 80262a6:	687b      	ldr	r3, [r7, #4]
 80262a8:	691b      	ldr	r3, [r3, #16]
 80262aa:	429a      	cmp	r2, r3
 80262ac:	d106      	bne.n	80262bc <ip_reass_remove_oldest_datagram+0x4c>
 80262ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262b0:	899a      	ldrh	r2, [r3, #12]
 80262b2:	687b      	ldr	r3, [r7, #4]
 80262b4:	889b      	ldrh	r3, [r3, #4]
 80262b6:	b29b      	uxth	r3, r3
 80262b8:	429a      	cmp	r2, r3
 80262ba:	d014      	beq.n	80262e6 <ip_reass_remove_oldest_datagram+0x76>
        /* Not the same datagram as fraghdr */
        other_datagrams++;
 80262bc:	693b      	ldr	r3, [r7, #16]
 80262be:	3301      	adds	r3, #1
 80262c0:	613b      	str	r3, [r7, #16]
        if (oldest == NULL) {
 80262c2:	6a3b      	ldr	r3, [r7, #32]
 80262c4:	2b00      	cmp	r3, #0
 80262c6:	d104      	bne.n	80262d2 <ip_reass_remove_oldest_datagram+0x62>
          oldest = r;
 80262c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262ca:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 80262cc:	69fb      	ldr	r3, [r7, #28]
 80262ce:	61bb      	str	r3, [r7, #24]
 80262d0:	e009      	b.n	80262e6 <ip_reass_remove_oldest_datagram+0x76>
        } else if (r->timer <= oldest->timer) {
 80262d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262d4:	7fda      	ldrb	r2, [r3, #31]
 80262d6:	6a3b      	ldr	r3, [r7, #32]
 80262d8:	7fdb      	ldrb	r3, [r3, #31]
 80262da:	429a      	cmp	r2, r3
 80262dc:	d803      	bhi.n	80262e6 <ip_reass_remove_oldest_datagram+0x76>
          /* older than the previous oldest */
          oldest = r;
 80262de:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262e0:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 80262e2:	69fb      	ldr	r3, [r7, #28]
 80262e4:	61bb      	str	r3, [r7, #24]
        }
      }
      if (r->next != NULL) {
 80262e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262e8:	681b      	ldr	r3, [r3, #0]
 80262ea:	2b00      	cmp	r3, #0
 80262ec:	d001      	beq.n	80262f2 <ip_reass_remove_oldest_datagram+0x82>
        prev = r;
 80262ee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262f0:	61fb      	str	r3, [r7, #28]
      }
      r = r->next;
 80262f2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262f4:	681b      	ldr	r3, [r3, #0]
 80262f6:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 80262f8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80262fa:	2b00      	cmp	r3, #0
 80262fc:	d1cb      	bne.n	8026296 <ip_reass_remove_oldest_datagram+0x26>
    }
    if (oldest != NULL) {
 80262fe:	6a3b      	ldr	r3, [r7, #32]
 8026300:	2b00      	cmp	r3, #0
 8026302:	d008      	beq.n	8026316 <ip_reass_remove_oldest_datagram+0xa6>
      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
 8026304:	69b9      	ldr	r1, [r7, #24]
 8026306:	6a38      	ldr	r0, [r7, #32]
 8026308:	f7ff ff0e 	bl	8026128 <ip_reass_free_complete_datagram>
 802630c:	60f8      	str	r0, [r7, #12]
      pbufs_freed += pbufs_freed_current;
 802630e:	697a      	ldr	r2, [r7, #20]
 8026310:	68fb      	ldr	r3, [r7, #12]
 8026312:	4413      	add	r3, r2
 8026314:	617b      	str	r3, [r7, #20]
    }
  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
 8026316:	697a      	ldr	r2, [r7, #20]
 8026318:	683b      	ldr	r3, [r7, #0]
 802631a:	429a      	cmp	r2, r3
 802631c:	da02      	bge.n	8026324 <ip_reass_remove_oldest_datagram+0xb4>
 802631e:	693b      	ldr	r3, [r7, #16]
 8026320:	2b01      	cmp	r3, #1
 8026322:	dcac      	bgt.n	802627e <ip_reass_remove_oldest_datagram+0xe>
  return pbufs_freed;
 8026324:	697b      	ldr	r3, [r7, #20]
}
 8026326:	4618      	mov	r0, r3
 8026328:	3728      	adds	r7, #40	@ 0x28
 802632a:	46bd      	mov	sp, r7
 802632c:	bd80      	pop	{r7, pc}
 802632e:	bf00      	nop
 8026330:	2402b104 	.word	0x2402b104

08026334 <ip_reass_enqueue_new_datagram>:
 * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
 * @return A pointer to the queue location into which the fragment was enqueued
 */
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
 8026334:	b580      	push	{r7, lr}
 8026336:	b084      	sub	sp, #16
 8026338:	af00      	add	r7, sp, #0
 802633a:	6078      	str	r0, [r7, #4]
 802633c:	6039      	str	r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
  LWIP_UNUSED_ARG(clen);
#endif

  /* No matching previous fragment found, allocate a new reassdata struct */
  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 802633e:	2004      	movs	r0, #4
 8026340:	f7f4 f830 	bl	801a3a4 <memp_malloc>
 8026344:	60f8      	str	r0, [r7, #12]
  if (ipr == NULL) {
 8026346:	68fb      	ldr	r3, [r7, #12]
 8026348:	2b00      	cmp	r3, #0
 802634a:	d110      	bne.n	802636e <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
 802634c:	6839      	ldr	r1, [r7, #0]
 802634e:	6878      	ldr	r0, [r7, #4]
 8026350:	f7ff ff8e 	bl	8026270 <ip_reass_remove_oldest_datagram>
 8026354:	4602      	mov	r2, r0
 8026356:	683b      	ldr	r3, [r7, #0]
 8026358:	4293      	cmp	r3, r2
 802635a:	dc03      	bgt.n	8026364 <ip_reass_enqueue_new_datagram+0x30>
      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 802635c:	2004      	movs	r0, #4
 802635e:	f7f4 f821 	bl	801a3a4 <memp_malloc>
 8026362:	60f8      	str	r0, [r7, #12]
    }
    if (ipr == NULL)
 8026364:	68fb      	ldr	r3, [r7, #12]
 8026366:	2b00      	cmp	r3, #0
 8026368:	d101      	bne.n	802636e <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
    {
      IPFRAG_STATS_INC(ip_frag.memerr);
      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
      return NULL;
 802636a:	2300      	movs	r3, #0
 802636c:	e016      	b.n	802639c <ip_reass_enqueue_new_datagram+0x68>
    }
  }
  memset(ipr, 0, sizeof(struct ip_reassdata));
 802636e:	2220      	movs	r2, #32
 8026370:	2100      	movs	r1, #0
 8026372:	68f8      	ldr	r0, [r7, #12]
 8026374:	f004 fb84 	bl	802aa80 <memset>
  ipr->timer = IP_REASS_MAXAGE;
 8026378:	68fb      	ldr	r3, [r7, #12]
 802637a:	220f      	movs	r2, #15
 802637c:	77da      	strb	r2, [r3, #31]

  /* enqueue the new structure to the front of the list */
  ipr->next = reassdatagrams;
 802637e:	4b09      	ldr	r3, [pc, #36]	@ (80263a4 <ip_reass_enqueue_new_datagram+0x70>)
 8026380:	681a      	ldr	r2, [r3, #0]
 8026382:	68fb      	ldr	r3, [r7, #12]
 8026384:	601a      	str	r2, [r3, #0]
  reassdatagrams = ipr;
 8026386:	4a07      	ldr	r2, [pc, #28]	@ (80263a4 <ip_reass_enqueue_new_datagram+0x70>)
 8026388:	68fb      	ldr	r3, [r7, #12]
 802638a:	6013      	str	r3, [r2, #0]
  /* copy the ip header for later tests and input */
  /* @todo: no ip options supported? */
  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
 802638c:	68fb      	ldr	r3, [r7, #12]
 802638e:	3308      	adds	r3, #8
 8026390:	2214      	movs	r2, #20
 8026392:	6879      	ldr	r1, [r7, #4]
 8026394:	4618      	mov	r0, r3
 8026396:	f004 fc6a 	bl	802ac6e <memcpy>
  return ipr;
 802639a:	68fb      	ldr	r3, [r7, #12]
}
 802639c:	4618      	mov	r0, r3
 802639e:	3710      	adds	r7, #16
 80263a0:	46bd      	mov	sp, r7
 80263a2:	bd80      	pop	{r7, pc}
 80263a4:	2402b104 	.word	0x2402b104

080263a8 <ip_reass_dequeue_datagram>:
 * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
 * @param ipr points to the queue entry to dequeue
 */
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 80263a8:	b580      	push	{r7, lr}
 80263aa:	b082      	sub	sp, #8
 80263ac:	af00      	add	r7, sp, #0
 80263ae:	6078      	str	r0, [r7, #4]
 80263b0:	6039      	str	r1, [r7, #0]
  /* dequeue the reass struct  */
  if (reassdatagrams == ipr) {
 80263b2:	4b10      	ldr	r3, [pc, #64]	@ (80263f4 <ip_reass_dequeue_datagram+0x4c>)
 80263b4:	681b      	ldr	r3, [r3, #0]
 80263b6:	687a      	ldr	r2, [r7, #4]
 80263b8:	429a      	cmp	r2, r3
 80263ba:	d104      	bne.n	80263c6 <ip_reass_dequeue_datagram+0x1e>
    /* it was the first in the list */
    reassdatagrams = ipr->next;
 80263bc:	687b      	ldr	r3, [r7, #4]
 80263be:	681b      	ldr	r3, [r3, #0]
 80263c0:	4a0c      	ldr	r2, [pc, #48]	@ (80263f4 <ip_reass_dequeue_datagram+0x4c>)
 80263c2:	6013      	str	r3, [r2, #0]
 80263c4:	e00d      	b.n	80263e2 <ip_reass_dequeue_datagram+0x3a>
  } else {
    /* it wasn't the first, so it must have a valid 'prev' */
    LWIP_ASSERT("sanity check linked list", prev != NULL);
 80263c6:	683b      	ldr	r3, [r7, #0]
 80263c8:	2b00      	cmp	r3, #0
 80263ca:	d106      	bne.n	80263da <ip_reass_dequeue_datagram+0x32>
 80263cc:	4b0a      	ldr	r3, [pc, #40]	@ (80263f8 <ip_reass_dequeue_datagram+0x50>)
 80263ce:	f240 1245 	movw	r2, #325	@ 0x145
 80263d2:	490a      	ldr	r1, [pc, #40]	@ (80263fc <ip_reass_dequeue_datagram+0x54>)
 80263d4:	480a      	ldr	r0, [pc, #40]	@ (8026400 <ip_reass_dequeue_datagram+0x58>)
 80263d6:	f004 f9c1 	bl	802a75c <iprintf>
    prev->next = ipr->next;
 80263da:	687b      	ldr	r3, [r7, #4]
 80263dc:	681a      	ldr	r2, [r3, #0]
 80263de:	683b      	ldr	r3, [r7, #0]
 80263e0:	601a      	str	r2, [r3, #0]
  }

  /* now we can free the ip_reassdata struct */
  memp_free(MEMP_REASSDATA, ipr);
 80263e2:	6879      	ldr	r1, [r7, #4]
 80263e4:	2004      	movs	r0, #4
 80263e6:	f7f4 f853 	bl	801a490 <memp_free>
}
 80263ea:	bf00      	nop
 80263ec:	3708      	adds	r7, #8
 80263ee:	46bd      	mov	sp, r7
 80263f0:	bd80      	pop	{r7, pc}
 80263f2:	bf00      	nop
 80263f4:	2402b104 	.word	0x2402b104
 80263f8:	08031550 	.word	0x08031550
 80263fc:	08031618 	.word	0x08031618
 8026400:	08031598 	.word	0x08031598

08026404 <ip_reass_chain_frag_into_datagram_and_validate>:
 * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
 * @return see IP_REASS_VALIDATE_* defines
 */
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
 8026404:	b580      	push	{r7, lr}
 8026406:	b08c      	sub	sp, #48	@ 0x30
 8026408:	af00      	add	r7, sp, #0
 802640a:	60f8      	str	r0, [r7, #12]
 802640c:	60b9      	str	r1, [r7, #8]
 802640e:	607a      	str	r2, [r7, #4]
  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
 8026410:	2300      	movs	r3, #0
 8026412:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf *q;
  u16_t offset, len;
  u8_t hlen;
  struct ip_hdr *fraghdr;
  int valid = 1;
 8026414:	2301      	movs	r3, #1
 8026416:	623b      	str	r3, [r7, #32]

  /* Extract length and fragment offset from current fragment */
  fraghdr = (struct ip_hdr *)new_p->payload;
 8026418:	68bb      	ldr	r3, [r7, #8]
 802641a:	685b      	ldr	r3, [r3, #4]
 802641c:	61fb      	str	r3, [r7, #28]
  len = lwip_ntohs(IPH_LEN(fraghdr));
 802641e:	69fb      	ldr	r3, [r7, #28]
 8026420:	885b      	ldrh	r3, [r3, #2]
 8026422:	b29b      	uxth	r3, r3
 8026424:	4618      	mov	r0, r3
 8026426:	f7f3 fa3f 	bl	80198a8 <lwip_htons>
 802642a:	4603      	mov	r3, r0
 802642c:	837b      	strh	r3, [r7, #26]
  hlen = IPH_HL_BYTES(fraghdr);
 802642e:	69fb      	ldr	r3, [r7, #28]
 8026430:	781b      	ldrb	r3, [r3, #0]
 8026432:	f003 030f 	and.w	r3, r3, #15
 8026436:	b2db      	uxtb	r3, r3
 8026438:	009b      	lsls	r3, r3, #2
 802643a:	767b      	strb	r3, [r7, #25]
  if (hlen > len) {
 802643c:	7e7b      	ldrb	r3, [r7, #25]
 802643e:	b29b      	uxth	r3, r3
 8026440:	8b7a      	ldrh	r2, [r7, #26]
 8026442:	429a      	cmp	r2, r3
 8026444:	d202      	bcs.n	802644c <ip_reass_chain_frag_into_datagram_and_validate+0x48>
    /* invalid datagram */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026446:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802644a:	e135      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  len = (u16_t)(len - hlen);
 802644c:	7e7b      	ldrb	r3, [r7, #25]
 802644e:	b29b      	uxth	r3, r3
 8026450:	8b7a      	ldrh	r2, [r7, #26]
 8026452:	1ad3      	subs	r3, r2, r3
 8026454:	837b      	strh	r3, [r7, #26]
  offset = IPH_OFFSET_BYTES(fraghdr);
 8026456:	69fb      	ldr	r3, [r7, #28]
 8026458:	88db      	ldrh	r3, [r3, #6]
 802645a:	b29b      	uxth	r3, r3
 802645c:	4618      	mov	r0, r3
 802645e:	f7f3 fa23 	bl	80198a8 <lwip_htons>
 8026462:	4603      	mov	r3, r0
 8026464:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026468:	b29b      	uxth	r3, r3
 802646a:	00db      	lsls	r3, r3, #3
 802646c:	82fb      	strh	r3, [r7, #22]
  /* overwrite the fragment's ip header from the pbuf with our helper struct,
   * and setup the embedded helper structure. */
  /* make sure the struct ip_reass_helper fits into the IP header */
  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
              sizeof(struct ip_reass_helper) <= IP_HLEN);
  iprh = (struct ip_reass_helper *)new_p->payload;
 802646e:	68bb      	ldr	r3, [r7, #8]
 8026470:	685b      	ldr	r3, [r3, #4]
 8026472:	62fb      	str	r3, [r7, #44]	@ 0x2c
  iprh->next_pbuf = NULL;
 8026474:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026476:	2200      	movs	r2, #0
 8026478:	701a      	strb	r2, [r3, #0]
 802647a:	2200      	movs	r2, #0
 802647c:	705a      	strb	r2, [r3, #1]
 802647e:	2200      	movs	r2, #0
 8026480:	709a      	strb	r2, [r3, #2]
 8026482:	2200      	movs	r2, #0
 8026484:	70da      	strb	r2, [r3, #3]
  iprh->start = offset;
 8026486:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026488:	8afa      	ldrh	r2, [r7, #22]
 802648a:	809a      	strh	r2, [r3, #4]
  iprh->end = (u16_t)(offset + len);
 802648c:	8afa      	ldrh	r2, [r7, #22]
 802648e:	8b7b      	ldrh	r3, [r7, #26]
 8026490:	4413      	add	r3, r2
 8026492:	b29a      	uxth	r2, r3
 8026494:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026496:	80da      	strh	r2, [r3, #6]
  if (iprh->end < offset) {
 8026498:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802649a:	88db      	ldrh	r3, [r3, #6]
 802649c:	b29b      	uxth	r3, r3
 802649e:	8afa      	ldrh	r2, [r7, #22]
 80264a0:	429a      	cmp	r2, r3
 80264a2:	d902      	bls.n	80264aa <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
    /* u16_t overflow, cannot handle this */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 80264a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80264a8:	e106      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }

  /* Iterate through until we either get to the end of the list (append),
   * or we find one with a larger offset (insert). */
  for (q = ipr->p; q != NULL;) {
 80264aa:	68fb      	ldr	r3, [r7, #12]
 80264ac:	685b      	ldr	r3, [r3, #4]
 80264ae:	627b      	str	r3, [r7, #36]	@ 0x24
 80264b0:	e068      	b.n	8026584 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
    iprh_tmp = (struct ip_reass_helper *)q->payload;
 80264b2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80264b4:	685b      	ldr	r3, [r3, #4]
 80264b6:	613b      	str	r3, [r7, #16]
    if (iprh->start < iprh_tmp->start) {
 80264b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80264ba:	889b      	ldrh	r3, [r3, #4]
 80264bc:	b29a      	uxth	r2, r3
 80264be:	693b      	ldr	r3, [r7, #16]
 80264c0:	889b      	ldrh	r3, [r3, #4]
 80264c2:	b29b      	uxth	r3, r3
 80264c4:	429a      	cmp	r2, r3
 80264c6:	d235      	bcs.n	8026534 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
      /* the new pbuf should be inserted before this */
      iprh->next_pbuf = q;
 80264c8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80264ca:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80264cc:	601a      	str	r2, [r3, #0]
      if (iprh_prev != NULL) {
 80264ce:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80264d0:	2b00      	cmp	r3, #0
 80264d2:	d020      	beq.n	8026516 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
        /* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
 80264d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80264d6:	889b      	ldrh	r3, [r3, #4]
 80264d8:	b29a      	uxth	r2, r3
 80264da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80264dc:	88db      	ldrh	r3, [r3, #6]
 80264de:	b29b      	uxth	r3, r3
 80264e0:	429a      	cmp	r2, r3
 80264e2:	d307      	bcc.n	80264f4 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
 80264e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80264e6:	88db      	ldrh	r3, [r3, #6]
 80264e8:	b29a      	uxth	r2, r3
 80264ea:	693b      	ldr	r3, [r7, #16]
 80264ec:	889b      	ldrh	r3, [r3, #4]
 80264ee:	b29b      	uxth	r3, r3
 80264f0:	429a      	cmp	r2, r3
 80264f2:	d902      	bls.n	80264fa <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
          /* fragment overlaps with previous or following, throw away */
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 80264f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80264f8:	e0de      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        iprh_prev->next_pbuf = new_p;
 80264fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80264fc:	68ba      	ldr	r2, [r7, #8]
 80264fe:	601a      	str	r2, [r3, #0]
        if (iprh_prev->end != iprh->start) {
 8026500:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026502:	88db      	ldrh	r3, [r3, #6]
 8026504:	b29a      	uxth	r2, r3
 8026506:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026508:	889b      	ldrh	r3, [r3, #4]
 802650a:	b29b      	uxth	r3, r3
 802650c:	429a      	cmp	r2, r3
 802650e:	d03d      	beq.n	802658c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8026510:	2300      	movs	r3, #0
 8026512:	623b      	str	r3, [r7, #32]
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        /* fragment with the lowest offset */
        ipr->p = new_p;
      }
      break;
 8026514:	e03a      	b.n	802658c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
        if (iprh->end > iprh_tmp->start) {
 8026516:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026518:	88db      	ldrh	r3, [r3, #6]
 802651a:	b29a      	uxth	r2, r3
 802651c:	693b      	ldr	r3, [r7, #16]
 802651e:	889b      	ldrh	r3, [r3, #4]
 8026520:	b29b      	uxth	r3, r3
 8026522:	429a      	cmp	r2, r3
 8026524:	d902      	bls.n	802652c <ip_reass_chain_frag_into_datagram_and_validate+0x128>
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026526:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802652a:	e0c5      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        ipr->p = new_p;
 802652c:	68fb      	ldr	r3, [r7, #12]
 802652e:	68ba      	ldr	r2, [r7, #8]
 8026530:	605a      	str	r2, [r3, #4]
      break;
 8026532:	e02b      	b.n	802658c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
    } else if (iprh->start == iprh_tmp->start) {
 8026534:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026536:	889b      	ldrh	r3, [r3, #4]
 8026538:	b29a      	uxth	r2, r3
 802653a:	693b      	ldr	r3, [r7, #16]
 802653c:	889b      	ldrh	r3, [r3, #4]
 802653e:	b29b      	uxth	r3, r3
 8026540:	429a      	cmp	r2, r3
 8026542:	d102      	bne.n	802654a <ip_reass_chain_frag_into_datagram_and_validate+0x146>
      /* received the same datagram twice: no need to keep the datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026544:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026548:	e0b6      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
    } else if (iprh->start < iprh_tmp->end) {
 802654a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802654c:	889b      	ldrh	r3, [r3, #4]
 802654e:	b29a      	uxth	r2, r3
 8026550:	693b      	ldr	r3, [r7, #16]
 8026552:	88db      	ldrh	r3, [r3, #6]
 8026554:	b29b      	uxth	r3, r3
 8026556:	429a      	cmp	r2, r3
 8026558:	d202      	bcs.n	8026560 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
      /* overlap: no need to keep the new datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 802655a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802655e:	e0ab      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
    } else {
      /* Check if the fragments received so far have no holes. */
      if (iprh_prev != NULL) {
 8026560:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026562:	2b00      	cmp	r3, #0
 8026564:	d009      	beq.n	802657a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
        if (iprh_prev->end != iprh_tmp->start) {
 8026566:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026568:	88db      	ldrh	r3, [r3, #6]
 802656a:	b29a      	uxth	r2, r3
 802656c:	693b      	ldr	r3, [r7, #16]
 802656e:	889b      	ldrh	r3, [r3, #4]
 8026570:	b29b      	uxth	r3, r3
 8026572:	429a      	cmp	r2, r3
 8026574:	d001      	beq.n	802657a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8026576:	2300      	movs	r3, #0
 8026578:	623b      	str	r3, [r7, #32]
        }
      }
    }
    q = iprh_tmp->next_pbuf;
 802657a:	693b      	ldr	r3, [r7, #16]
 802657c:	681b      	ldr	r3, [r3, #0]
 802657e:	627b      	str	r3, [r7, #36]	@ 0x24
    iprh_prev = iprh_tmp;
 8026580:	693b      	ldr	r3, [r7, #16]
 8026582:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (q = ipr->p; q != NULL;) {
 8026584:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026586:	2b00      	cmp	r3, #0
 8026588:	d193      	bne.n	80264b2 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
 802658a:	e000      	b.n	802658e <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
      break;
 802658c:	bf00      	nop
  }

  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
  if (q == NULL) {
 802658e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026590:	2b00      	cmp	r3, #0
 8026592:	d12d      	bne.n	80265f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
    if (iprh_prev != NULL) {
 8026594:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026596:	2b00      	cmp	r3, #0
 8026598:	d01c      	beq.n	80265d4 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
      /* this is (for now), the fragment with the highest offset:
       * chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
 802659a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802659c:	88db      	ldrh	r3, [r3, #6]
 802659e:	b29a      	uxth	r2, r3
 80265a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80265a2:	889b      	ldrh	r3, [r3, #4]
 80265a4:	b29b      	uxth	r3, r3
 80265a6:	429a      	cmp	r2, r3
 80265a8:	d906      	bls.n	80265b8 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
 80265aa:	4b45      	ldr	r3, [pc, #276]	@ (80266c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80265ac:	f44f 72db 	mov.w	r2, #438	@ 0x1b6
 80265b0:	4944      	ldr	r1, [pc, #272]	@ (80266c4 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
 80265b2:	4845      	ldr	r0, [pc, #276]	@ (80266c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80265b4:	f004 f8d2 	bl	802a75c <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
      iprh_prev->next_pbuf = new_p;
 80265b8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80265ba:	68ba      	ldr	r2, [r7, #8]
 80265bc:	601a      	str	r2, [r3, #0]
      if (iprh_prev->end != iprh->start) {
 80265be:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80265c0:	88db      	ldrh	r3, [r3, #6]
 80265c2:	b29a      	uxth	r2, r3
 80265c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80265c6:	889b      	ldrh	r3, [r3, #4]
 80265c8:	b29b      	uxth	r3, r3
 80265ca:	429a      	cmp	r2, r3
 80265cc:	d010      	beq.n	80265f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
        valid = 0;
 80265ce:	2300      	movs	r3, #0
 80265d0:	623b      	str	r3, [r7, #32]
 80265d2:	e00d      	b.n	80265f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
      }
    } else {
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
 80265d4:	68fb      	ldr	r3, [r7, #12]
 80265d6:	685b      	ldr	r3, [r3, #4]
 80265d8:	2b00      	cmp	r3, #0
 80265da:	d006      	beq.n	80265ea <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
 80265dc:	4b38      	ldr	r3, [pc, #224]	@ (80266c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80265de:	f44f 72df 	mov.w	r2, #446	@ 0x1be
 80265e2:	493a      	ldr	r1, [pc, #232]	@ (80266cc <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
 80265e4:	4838      	ldr	r0, [pc, #224]	@ (80266c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80265e6:	f004 f8b9 	bl	802a75c <iprintf>
                  ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
      /* this is the first fragment we ever received for this ip datagram */
      ipr->p = new_p;
 80265ea:	68fb      	ldr	r3, [r7, #12]
 80265ec:	68ba      	ldr	r2, [r7, #8]
 80265ee:	605a      	str	r2, [r3, #4]
    }
  }

  /* At this point, the validation part begins: */
  /* If we already received the last fragment */
  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
 80265f0:	687b      	ldr	r3, [r7, #4]
 80265f2:	2b00      	cmp	r3, #0
 80265f4:	d105      	bne.n	8026602 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
 80265f6:	68fb      	ldr	r3, [r7, #12]
 80265f8:	7f9b      	ldrb	r3, [r3, #30]
 80265fa:	f003 0301 	and.w	r3, r3, #1
 80265fe:	2b00      	cmp	r3, #0
 8026600:	d059      	beq.n	80266b6 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
    /* and had no holes so far */
    if (valid) {
 8026602:	6a3b      	ldr	r3, [r7, #32]
 8026604:	2b00      	cmp	r3, #0
 8026606:	d04f      	beq.n	80266a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      /* then check if the rest of the fragments is here */
      /* Check if the queue starts with the first datagram */
      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
 8026608:	68fb      	ldr	r3, [r7, #12]
 802660a:	685b      	ldr	r3, [r3, #4]
 802660c:	2b00      	cmp	r3, #0
 802660e:	d006      	beq.n	802661e <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
 8026610:	68fb      	ldr	r3, [r7, #12]
 8026612:	685b      	ldr	r3, [r3, #4]
 8026614:	685b      	ldr	r3, [r3, #4]
 8026616:	889b      	ldrh	r3, [r3, #4]
 8026618:	b29b      	uxth	r3, r3
 802661a:	2b00      	cmp	r3, #0
 802661c:	d002      	beq.n	8026624 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
        valid = 0;
 802661e:	2300      	movs	r3, #0
 8026620:	623b      	str	r3, [r7, #32]
 8026622:	e041      	b.n	80266a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      } else {
        /* and check that there are no holes after this datagram */
        iprh_prev = iprh;
 8026624:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026626:	62bb      	str	r3, [r7, #40]	@ 0x28
        q = iprh->next_pbuf;
 8026628:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802662a:	681b      	ldr	r3, [r3, #0]
 802662c:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 802662e:	e012      	b.n	8026656 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
          iprh = (struct ip_reass_helper *)q->payload;
 8026630:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026632:	685b      	ldr	r3, [r3, #4]
 8026634:	62fb      	str	r3, [r7, #44]	@ 0x2c
          if (iprh_prev->end != iprh->start) {
 8026636:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026638:	88db      	ldrh	r3, [r3, #6]
 802663a:	b29a      	uxth	r2, r3
 802663c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802663e:	889b      	ldrh	r3, [r3, #4]
 8026640:	b29b      	uxth	r3, r3
 8026642:	429a      	cmp	r2, r3
 8026644:	d002      	beq.n	802664c <ip_reass_chain_frag_into_datagram_and_validate+0x248>
            valid = 0;
 8026646:	2300      	movs	r3, #0
 8026648:	623b      	str	r3, [r7, #32]
            break;
 802664a:	e007      	b.n	802665c <ip_reass_chain_frag_into_datagram_and_validate+0x258>
          }
          iprh_prev = iprh;
 802664c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802664e:	62bb      	str	r3, [r7, #40]	@ 0x28
          q = iprh->next_pbuf;
 8026650:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026652:	681b      	ldr	r3, [r3, #0]
 8026654:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 8026656:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026658:	2b00      	cmp	r3, #0
 802665a:	d1e9      	bne.n	8026630 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
        }
        /* if still valid, all fragments are received
         * (because to the MF==0 already arrived */
        if (valid) {
 802665c:	6a3b      	ldr	r3, [r7, #32]
 802665e:	2b00      	cmp	r3, #0
 8026660:	d022      	beq.n	80266a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
          LWIP_ASSERT("sanity check", ipr->p != NULL);
 8026662:	68fb      	ldr	r3, [r7, #12]
 8026664:	685b      	ldr	r3, [r3, #4]
 8026666:	2b00      	cmp	r3, #0
 8026668:	d106      	bne.n	8026678 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
 802666a:	4b15      	ldr	r3, [pc, #84]	@ (80266c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802666c:	f240 12df 	movw	r2, #479	@ 0x1df
 8026670:	4917      	ldr	r1, [pc, #92]	@ (80266d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 8026672:	4815      	ldr	r0, [pc, #84]	@ (80266c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8026674:	f004 f872 	bl	802a75c <iprintf>
          LWIP_ASSERT("sanity check",
 8026678:	68fb      	ldr	r3, [r7, #12]
 802667a:	685b      	ldr	r3, [r3, #4]
 802667c:	685b      	ldr	r3, [r3, #4]
 802667e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8026680:	429a      	cmp	r2, r3
 8026682:	d106      	bne.n	8026692 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
 8026684:	4b0e      	ldr	r3, [pc, #56]	@ (80266c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 8026686:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 802668a:	4911      	ldr	r1, [pc, #68]	@ (80266d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 802668c:	480e      	ldr	r0, [pc, #56]	@ (80266c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 802668e:	f004 f865 	bl	802a75c <iprintf>
                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
 8026692:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026694:	681b      	ldr	r3, [r3, #0]
 8026696:	2b00      	cmp	r3, #0
 8026698:	d006      	beq.n	80266a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
 802669a:	4b09      	ldr	r3, [pc, #36]	@ (80266c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802669c:	f44f 72f1 	mov.w	r2, #482	@ 0x1e2
 80266a0:	490c      	ldr	r1, [pc, #48]	@ (80266d4 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
 80266a2:	4809      	ldr	r0, [pc, #36]	@ (80266c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80266a4:	f004 f85a 	bl	802a75c <iprintf>
      }
    }
    /* If valid is 0 here, there are some fragments missing in the middle
     * (since MF == 0 has already arrived). Such datagrams simply time out if
     * no more fragments are received... */
    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
 80266a8:	6a3b      	ldr	r3, [r7, #32]
 80266aa:	2b00      	cmp	r3, #0
 80266ac:	bf14      	ite	ne
 80266ae:	2301      	movne	r3, #1
 80266b0:	2300      	moveq	r3, #0
 80266b2:	b2db      	uxtb	r3, r3
 80266b4:	e000      	b.n	80266b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  /* If we come here, not all fragments were received, yet! */
  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
 80266b6:	2300      	movs	r3, #0
}
 80266b8:	4618      	mov	r0, r3
 80266ba:	3730      	adds	r7, #48	@ 0x30
 80266bc:	46bd      	mov	sp, r7
 80266be:	bd80      	pop	{r7, pc}
 80266c0:	08031550 	.word	0x08031550
 80266c4:	08031634 	.word	0x08031634
 80266c8:	08031598 	.word	0x08031598
 80266cc:	08031654 	.word	0x08031654
 80266d0:	0803168c 	.word	0x0803168c
 80266d4:	0803169c 	.word	0x0803169c

080266d8 <ip4_reass>:
 * @param p points to a pbuf chain of the fragment
 * @return NULL if reassembly is incomplete, ? otherwise
 */
struct pbuf *
ip4_reass(struct pbuf *p)
{
 80266d8:	b580      	push	{r7, lr}
 80266da:	b08e      	sub	sp, #56	@ 0x38
 80266dc:	af00      	add	r7, sp, #0
 80266de:	6078      	str	r0, [r7, #4]
  int is_last;

  IPFRAG_STATS_INC(ip_frag.recv);
  MIB2_STATS_INC(mib2.ipreasmreqds);

  fraghdr = (struct ip_hdr *)p->payload;
 80266e0:	687b      	ldr	r3, [r7, #4]
 80266e2:	685b      	ldr	r3, [r3, #4]
 80266e4:	62bb      	str	r3, [r7, #40]	@ 0x28

  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
 80266e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80266e8:	781b      	ldrb	r3, [r3, #0]
 80266ea:	f003 030f 	and.w	r3, r3, #15
 80266ee:	b2db      	uxtb	r3, r3
 80266f0:	009b      	lsls	r3, r3, #2
 80266f2:	b2db      	uxtb	r3, r3
 80266f4:	2b14      	cmp	r3, #20
 80266f6:	f040 8171 	bne.w	80269dc <ip4_reass+0x304>
    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
    IPFRAG_STATS_INC(ip_frag.err);
    goto nullreturn;
  }

  offset = IPH_OFFSET_BYTES(fraghdr);
 80266fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80266fc:	88db      	ldrh	r3, [r3, #6]
 80266fe:	b29b      	uxth	r3, r3
 8026700:	4618      	mov	r0, r3
 8026702:	f7f3 f8d1 	bl	80198a8 <lwip_htons>
 8026706:	4603      	mov	r3, r0
 8026708:	f3c3 030c 	ubfx	r3, r3, #0, #13
 802670c:	b29b      	uxth	r3, r3
 802670e:	00db      	lsls	r3, r3, #3
 8026710:	84fb      	strh	r3, [r7, #38]	@ 0x26
  len = lwip_ntohs(IPH_LEN(fraghdr));
 8026712:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026714:	885b      	ldrh	r3, [r3, #2]
 8026716:	b29b      	uxth	r3, r3
 8026718:	4618      	mov	r0, r3
 802671a:	f7f3 f8c5 	bl	80198a8 <lwip_htons>
 802671e:	4603      	mov	r3, r0
 8026720:	84bb      	strh	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(fraghdr);
 8026722:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026724:	781b      	ldrb	r3, [r3, #0]
 8026726:	f003 030f 	and.w	r3, r3, #15
 802672a:	b2db      	uxtb	r3, r3
 802672c:	009b      	lsls	r3, r3, #2
 802672e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  if (hlen > len) {
 8026732:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026736:	b29b      	uxth	r3, r3
 8026738:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 802673a:	429a      	cmp	r2, r3
 802673c:	f0c0 8150 	bcc.w	80269e0 <ip4_reass+0x308>
    /* invalid datagram */
    goto nullreturn;
  }
  len = (u16_t)(len - hlen);
 8026740:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026744:	b29b      	uxth	r3, r3
 8026746:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8026748:	1ad3      	subs	r3, r2, r3
 802674a:	84bb      	strh	r3, [r7, #36]	@ 0x24

  /* Check if we are allowed to enqueue more datagrams. */
  clen = pbuf_clen(p);
 802674c:	6878      	ldr	r0, [r7, #4]
 802674e:	f7f4 fe1b 	bl	801b388 <pbuf_clen>
 8026752:	4603      	mov	r3, r0
 8026754:	843b      	strh	r3, [r7, #32]
  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
 8026756:	4b8c      	ldr	r3, [pc, #560]	@ (8026988 <ip4_reass+0x2b0>)
 8026758:	881b      	ldrh	r3, [r3, #0]
 802675a:	461a      	mov	r2, r3
 802675c:	8c3b      	ldrh	r3, [r7, #32]
 802675e:	4413      	add	r3, r2
 8026760:	2b0a      	cmp	r3, #10
 8026762:	dd10      	ble.n	8026786 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8026764:	8c3b      	ldrh	r3, [r7, #32]
 8026766:	4619      	mov	r1, r3
 8026768:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 802676a:	f7ff fd81 	bl	8026270 <ip_reass_remove_oldest_datagram>
 802676e:	4603      	mov	r3, r0
 8026770:	2b00      	cmp	r3, #0
 8026772:	f000 8137 	beq.w	80269e4 <ip4_reass+0x30c>
        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
 8026776:	4b84      	ldr	r3, [pc, #528]	@ (8026988 <ip4_reass+0x2b0>)
 8026778:	881b      	ldrh	r3, [r3, #0]
 802677a:	461a      	mov	r2, r3
 802677c:	8c3b      	ldrh	r3, [r7, #32]
 802677e:	4413      	add	r3, r2
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8026780:	2b0a      	cmp	r3, #10
 8026782:	f300 812f 	bgt.w	80269e4 <ip4_reass+0x30c>
    }
  }

  /* Look for the datagram the fragment belongs to in the current datagram queue,
   * remembering the previous in the queue for later dequeueing. */
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8026786:	4b81      	ldr	r3, [pc, #516]	@ (802698c <ip4_reass+0x2b4>)
 8026788:	681b      	ldr	r3, [r3, #0]
 802678a:	633b      	str	r3, [r7, #48]	@ 0x30
 802678c:	e015      	b.n	80267ba <ip4_reass+0xe2>
    /* Check if the incoming fragment matches the one currently present
       in the reassembly buffer. If so, we proceed with copying the
       fragment into the buffer. */
    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
 802678e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026790:	695a      	ldr	r2, [r3, #20]
 8026792:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026794:	68db      	ldr	r3, [r3, #12]
 8026796:	429a      	cmp	r2, r3
 8026798:	d10c      	bne.n	80267b4 <ip4_reass+0xdc>
 802679a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802679c:	699a      	ldr	r2, [r3, #24]
 802679e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267a0:	691b      	ldr	r3, [r3, #16]
 80267a2:	429a      	cmp	r2, r3
 80267a4:	d106      	bne.n	80267b4 <ip4_reass+0xdc>
 80267a6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267a8:	899a      	ldrh	r2, [r3, #12]
 80267aa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267ac:	889b      	ldrh	r3, [r3, #4]
 80267ae:	b29b      	uxth	r3, r3
 80267b0:	429a      	cmp	r2, r3
 80267b2:	d006      	beq.n	80267c2 <ip4_reass+0xea>
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 80267b4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267b6:	681b      	ldr	r3, [r3, #0]
 80267b8:	633b      	str	r3, [r7, #48]	@ 0x30
 80267ba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267bc:	2b00      	cmp	r3, #0
 80267be:	d1e6      	bne.n	802678e <ip4_reass+0xb6>
 80267c0:	e000      	b.n	80267c4 <ip4_reass+0xec>
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
                                   lwip_ntohs(IPH_ID(fraghdr))));
      IPFRAG_STATS_INC(ip_frag.cachehit);
      break;
 80267c2:	bf00      	nop
    }
  }

  if (ipr == NULL) {
 80267c4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267c6:	2b00      	cmp	r3, #0
 80267c8:	d109      	bne.n	80267de <ip4_reass+0x106>
    /* Enqueue a new datagram into the datagram queue */
    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
 80267ca:	8c3b      	ldrh	r3, [r7, #32]
 80267cc:	4619      	mov	r1, r3
 80267ce:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80267d0:	f7ff fdb0 	bl	8026334 <ip_reass_enqueue_new_datagram>
 80267d4:	6338      	str	r0, [r7, #48]	@ 0x30
    /* Bail if unable to enqueue */
    if (ipr == NULL) {
 80267d6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267d8:	2b00      	cmp	r3, #0
 80267da:	d11c      	bne.n	8026816 <ip4_reass+0x13e>
      goto nullreturn;
 80267dc:	e105      	b.n	80269ea <ip4_reass+0x312>
    }
  } else {
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 80267de:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267e0:	88db      	ldrh	r3, [r3, #6]
 80267e2:	b29b      	uxth	r3, r3
 80267e4:	4618      	mov	r0, r3
 80267e6:	f7f3 f85f 	bl	80198a8 <lwip_htons>
 80267ea:	4603      	mov	r3, r0
 80267ec:	f3c3 030c 	ubfx	r3, r3, #0, #13
 80267f0:	2b00      	cmp	r3, #0
 80267f2:	d110      	bne.n	8026816 <ip4_reass+0x13e>
        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
 80267f4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80267f6:	89db      	ldrh	r3, [r3, #14]
 80267f8:	4618      	mov	r0, r3
 80267fa:	f7f3 f855 	bl	80198a8 <lwip_htons>
 80267fe:	4603      	mov	r3, r0
 8026800:	f3c3 030c 	ubfx	r3, r3, #0, #13
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8026804:	2b00      	cmp	r3, #0
 8026806:	d006      	beq.n	8026816 <ip4_reass+0x13e>
      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
       * -> copy fraghdr into ipr->iphdr since we want to have the header
       * of the first fragment (for ICMP time exceeded and later, for copying
       * all options, if supported)*/
      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
 8026808:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802680a:	3308      	adds	r3, #8
 802680c:	2214      	movs	r2, #20
 802680e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 8026810:	4618      	mov	r0, r3
 8026812:	f004 fa2c 	bl	802ac6e <memcpy>

  /* At this point, we have either created a new entry or pointing
   * to an existing one */

  /* check for 'no more fragments', and update queue entry*/
  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
 8026816:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026818:	88db      	ldrh	r3, [r3, #6]
 802681a:	b29b      	uxth	r3, r3
 802681c:	f003 0320 	and.w	r3, r3, #32
 8026820:	2b00      	cmp	r3, #0
 8026822:	bf0c      	ite	eq
 8026824:	2301      	moveq	r3, #1
 8026826:	2300      	movne	r3, #0
 8026828:	b2db      	uxtb	r3, r3
 802682a:	61fb      	str	r3, [r7, #28]
  if (is_last) {
 802682c:	69fb      	ldr	r3, [r7, #28]
 802682e:	2b00      	cmp	r3, #0
 8026830:	d00e      	beq.n	8026850 <ip4_reass+0x178>
    u16_t datagram_len = (u16_t)(offset + len);
 8026832:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8026834:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8026836:	4413      	add	r3, r2
 8026838:	837b      	strh	r3, [r7, #26]
    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
 802683a:	8b7a      	ldrh	r2, [r7, #26]
 802683c:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 802683e:	429a      	cmp	r2, r3
 8026840:	f0c0 80a0 	bcc.w	8026984 <ip4_reass+0x2ac>
 8026844:	8b7b      	ldrh	r3, [r7, #26]
 8026846:	f64f 72eb 	movw	r2, #65515	@ 0xffeb
 802684a:	4293      	cmp	r3, r2
 802684c:	f200 809a 	bhi.w	8026984 <ip4_reass+0x2ac>
      goto nullreturn_ipr;
    }
  }
  /* find the right place to insert this pbuf */
  /* @todo: trim pbufs if fragments are overlapping */
  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
 8026850:	69fa      	ldr	r2, [r7, #28]
 8026852:	6879      	ldr	r1, [r7, #4]
 8026854:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026856:	f7ff fdd5 	bl	8026404 <ip_reass_chain_frag_into_datagram_and_validate>
 802685a:	6178      	str	r0, [r7, #20]
  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
 802685c:	697b      	ldr	r3, [r7, #20]
 802685e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026862:	f000 809b 	beq.w	802699c <ip4_reass+0x2c4>
  /* if we come here, the pbuf has been enqueued */

  /* Track the current number of pbufs current 'in-flight', in order to limit
     the number of fragments that may be enqueued at any one time
     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
 8026866:	4b48      	ldr	r3, [pc, #288]	@ (8026988 <ip4_reass+0x2b0>)
 8026868:	881a      	ldrh	r2, [r3, #0]
 802686a:	8c3b      	ldrh	r3, [r7, #32]
 802686c:	4413      	add	r3, r2
 802686e:	b29a      	uxth	r2, r3
 8026870:	4b45      	ldr	r3, [pc, #276]	@ (8026988 <ip4_reass+0x2b0>)
 8026872:	801a      	strh	r2, [r3, #0]
  if (is_last) {
 8026874:	69fb      	ldr	r3, [r7, #28]
 8026876:	2b00      	cmp	r3, #0
 8026878:	d00d      	beq.n	8026896 <ip4_reass+0x1be>
    u16_t datagram_len = (u16_t)(offset + len);
 802687a:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 802687c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 802687e:	4413      	add	r3, r2
 8026880:	827b      	strh	r3, [r7, #18]
    ipr->datagram_len = datagram_len;
 8026882:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026884:	8a7a      	ldrh	r2, [r7, #18]
 8026886:	839a      	strh	r2, [r3, #28]
    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
 8026888:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802688a:	7f9b      	ldrb	r3, [r3, #30]
 802688c:	f043 0301 	orr.w	r3, r3, #1
 8026890:	b2da      	uxtb	r2, r3
 8026892:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026894:	779a      	strb	r2, [r3, #30]
    LWIP_DEBUGF(IP_REASS_DEBUG,
                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
                 ipr->datagram_len));
  }

  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
 8026896:	697b      	ldr	r3, [r7, #20]
 8026898:	2b01      	cmp	r3, #1
 802689a:	d171      	bne.n	8026980 <ip4_reass+0x2a8>
    struct ip_reassdata *ipr_prev;
    /* the totally last fragment (flag more fragments = 0) was received at least
     * once AND all fragments are received */
    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
 802689c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802689e:	8b9b      	ldrh	r3, [r3, #28]
 80268a0:	3314      	adds	r3, #20
 80268a2:	823b      	strh	r3, [r7, #16]

    /* save the second pbuf before copying the header over the pointer */
    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
 80268a4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80268a6:	685b      	ldr	r3, [r3, #4]
 80268a8:	685b      	ldr	r3, [r3, #4]
 80268aa:	681b      	ldr	r3, [r3, #0]
 80268ac:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* copy the original ip header back to the first pbuf */
    fraghdr = (struct ip_hdr *)(ipr->p->payload);
 80268ae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80268b0:	685b      	ldr	r3, [r3, #4]
 80268b2:	685b      	ldr	r3, [r3, #4]
 80268b4:	62bb      	str	r3, [r7, #40]	@ 0x28
    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
 80268b6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80268b8:	3308      	adds	r3, #8
 80268ba:	2214      	movs	r2, #20
 80268bc:	4619      	mov	r1, r3
 80268be:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 80268c0:	f004 f9d5 	bl	802ac6e <memcpy>
    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
 80268c4:	8a3b      	ldrh	r3, [r7, #16]
 80268c6:	4618      	mov	r0, r3
 80268c8:	f7f2 ffee 	bl	80198a8 <lwip_htons>
 80268cc:	4603      	mov	r3, r0
 80268ce:	461a      	mov	r2, r3
 80268d0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80268d2:	805a      	strh	r2, [r3, #2]
    IPH_OFFSET_SET(fraghdr, 0);
 80268d4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80268d6:	2200      	movs	r2, #0
 80268d8:	719a      	strb	r2, [r3, #6]
 80268da:	2200      	movs	r2, #0
 80268dc:	71da      	strb	r2, [r3, #7]
    IPH_CHKSUM_SET(fraghdr, 0);
 80268de:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80268e0:	2200      	movs	r2, #0
 80268e2:	729a      	strb	r2, [r3, #10]
 80268e4:	2200      	movs	r2, #0
 80268e6:	72da      	strb	r2, [r3, #11]
    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
    }
#endif /* CHECKSUM_GEN_IP */

    p = ipr->p;
 80268e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80268ea:	685b      	ldr	r3, [r3, #4]
 80268ec:	607b      	str	r3, [r7, #4]

    /* chain together the pbufs contained within the reass_data list. */
    while (r != NULL) {
 80268ee:	e00d      	b.n	802690c <ip4_reass+0x234>
      iprh = (struct ip_reass_helper *)r->payload;
 80268f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80268f2:	685b      	ldr	r3, [r3, #4]
 80268f4:	60fb      	str	r3, [r7, #12]

      /* hide the ip header for every succeeding fragment */
      pbuf_remove_header(r, IP_HLEN);
 80268f6:	2114      	movs	r1, #20
 80268f8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80268fa:	f7f4 fbff 	bl	801b0fc <pbuf_remove_header>
      pbuf_cat(p, r);
 80268fe:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8026900:	6878      	ldr	r0, [r7, #4]
 8026902:	f7f4 fd81 	bl	801b408 <pbuf_cat>
      r = iprh->next_pbuf;
 8026906:	68fb      	ldr	r3, [r7, #12]
 8026908:	681b      	ldr	r3, [r3, #0]
 802690a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    while (r != NULL) {
 802690c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802690e:	2b00      	cmp	r3, #0
 8026910:	d1ee      	bne.n	80268f0 <ip4_reass+0x218>
    }

    /* find the previous entry in the linked list */
    if (ipr == reassdatagrams) {
 8026912:	4b1e      	ldr	r3, [pc, #120]	@ (802698c <ip4_reass+0x2b4>)
 8026914:	681b      	ldr	r3, [r3, #0]
 8026916:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026918:	429a      	cmp	r2, r3
 802691a:	d102      	bne.n	8026922 <ip4_reass+0x24a>
      ipr_prev = NULL;
 802691c:	2300      	movs	r3, #0
 802691e:	637b      	str	r3, [r7, #52]	@ 0x34
 8026920:	e010      	b.n	8026944 <ip4_reass+0x26c>
    } else {
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026922:	4b1a      	ldr	r3, [pc, #104]	@ (802698c <ip4_reass+0x2b4>)
 8026924:	681b      	ldr	r3, [r3, #0]
 8026926:	637b      	str	r3, [r7, #52]	@ 0x34
 8026928:	e007      	b.n	802693a <ip4_reass+0x262>
        if (ipr_prev->next == ipr) {
 802692a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802692c:	681b      	ldr	r3, [r3, #0]
 802692e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026930:	429a      	cmp	r2, r3
 8026932:	d006      	beq.n	8026942 <ip4_reass+0x26a>
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026934:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026936:	681b      	ldr	r3, [r3, #0]
 8026938:	637b      	str	r3, [r7, #52]	@ 0x34
 802693a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802693c:	2b00      	cmp	r3, #0
 802693e:	d1f4      	bne.n	802692a <ip4_reass+0x252>
 8026940:	e000      	b.n	8026944 <ip4_reass+0x26c>
          break;
 8026942:	bf00      	nop
        }
      }
    }

    /* release the sources allocate for the fragment queue entry */
    ip_reass_dequeue_datagram(ipr, ipr_prev);
 8026944:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026946:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026948:	f7ff fd2e 	bl	80263a8 <ip_reass_dequeue_datagram>

    /* and adjust the number of pbufs currently queued for reassembly. */
    clen = pbuf_clen(p);
 802694c:	6878      	ldr	r0, [r7, #4]
 802694e:	f7f4 fd1b 	bl	801b388 <pbuf_clen>
 8026952:	4603      	mov	r3, r0
 8026954:	843b      	strh	r3, [r7, #32]
    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
 8026956:	4b0c      	ldr	r3, [pc, #48]	@ (8026988 <ip4_reass+0x2b0>)
 8026958:	881b      	ldrh	r3, [r3, #0]
 802695a:	8c3a      	ldrh	r2, [r7, #32]
 802695c:	429a      	cmp	r2, r3
 802695e:	d906      	bls.n	802696e <ip4_reass+0x296>
 8026960:	4b0b      	ldr	r3, [pc, #44]	@ (8026990 <ip4_reass+0x2b8>)
 8026962:	f240 229b 	movw	r2, #667	@ 0x29b
 8026966:	490b      	ldr	r1, [pc, #44]	@ (8026994 <ip4_reass+0x2bc>)
 8026968:	480b      	ldr	r0, [pc, #44]	@ (8026998 <ip4_reass+0x2c0>)
 802696a:	f003 fef7 	bl	802a75c <iprintf>
    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
 802696e:	4b06      	ldr	r3, [pc, #24]	@ (8026988 <ip4_reass+0x2b0>)
 8026970:	881a      	ldrh	r2, [r3, #0]
 8026972:	8c3b      	ldrh	r3, [r7, #32]
 8026974:	1ad3      	subs	r3, r2, r3
 8026976:	b29a      	uxth	r2, r3
 8026978:	4b03      	ldr	r3, [pc, #12]	@ (8026988 <ip4_reass+0x2b0>)
 802697a:	801a      	strh	r2, [r3, #0]

    MIB2_STATS_INC(mib2.ipreasmoks);

    /* Return the pbuf chain */
    return p;
 802697c:	687b      	ldr	r3, [r7, #4]
 802697e:	e038      	b.n	80269f2 <ip4_reass+0x31a>
  }
  /* the datagram is not (yet?) reassembled completely */
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
  return NULL;
 8026980:	2300      	movs	r3, #0
 8026982:	e036      	b.n	80269f2 <ip4_reass+0x31a>
      goto nullreturn_ipr;
 8026984:	bf00      	nop
 8026986:	e00a      	b.n	802699e <ip4_reass+0x2c6>
 8026988:	2402b108 	.word	0x2402b108
 802698c:	2402b104 	.word	0x2402b104
 8026990:	08031550 	.word	0x08031550
 8026994:	080316c0 	.word	0x080316c0
 8026998:	08031598 	.word	0x08031598
    goto nullreturn_ipr;
 802699c:	bf00      	nop

nullreturn_ipr:
  LWIP_ASSERT("ipr != NULL", ipr != NULL);
 802699e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80269a0:	2b00      	cmp	r3, #0
 80269a2:	d106      	bne.n	80269b2 <ip4_reass+0x2da>
 80269a4:	4b15      	ldr	r3, [pc, #84]	@ (80269fc <ip4_reass+0x324>)
 80269a6:	f44f 722a 	mov.w	r2, #680	@ 0x2a8
 80269aa:	4915      	ldr	r1, [pc, #84]	@ (8026a00 <ip4_reass+0x328>)
 80269ac:	4815      	ldr	r0, [pc, #84]	@ (8026a04 <ip4_reass+0x32c>)
 80269ae:	f003 fed5 	bl	802a75c <iprintf>
  if (ipr->p == NULL) {
 80269b2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80269b4:	685b      	ldr	r3, [r3, #4]
 80269b6:	2b00      	cmp	r3, #0
 80269b8:	d116      	bne.n	80269e8 <ip4_reass+0x310>
    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
 80269ba:	4b13      	ldr	r3, [pc, #76]	@ (8026a08 <ip4_reass+0x330>)
 80269bc:	681b      	ldr	r3, [r3, #0]
 80269be:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80269c0:	429a      	cmp	r2, r3
 80269c2:	d006      	beq.n	80269d2 <ip4_reass+0x2fa>
 80269c4:	4b0d      	ldr	r3, [pc, #52]	@ (80269fc <ip4_reass+0x324>)
 80269c6:	f240 22ab 	movw	r2, #683	@ 0x2ab
 80269ca:	4910      	ldr	r1, [pc, #64]	@ (8026a0c <ip4_reass+0x334>)
 80269cc:	480d      	ldr	r0, [pc, #52]	@ (8026a04 <ip4_reass+0x32c>)
 80269ce:	f003 fec5 	bl	802a75c <iprintf>
    ip_reass_dequeue_datagram(ipr, NULL);
 80269d2:	2100      	movs	r1, #0
 80269d4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80269d6:	f7ff fce7 	bl	80263a8 <ip_reass_dequeue_datagram>
 80269da:	e006      	b.n	80269ea <ip4_reass+0x312>
    goto nullreturn;
 80269dc:	bf00      	nop
 80269de:	e004      	b.n	80269ea <ip4_reass+0x312>
    goto nullreturn;
 80269e0:	bf00      	nop
 80269e2:	e002      	b.n	80269ea <ip4_reass+0x312>
      goto nullreturn;
 80269e4:	bf00      	nop
 80269e6:	e000      	b.n	80269ea <ip4_reass+0x312>
  }

nullreturn:
 80269e8:	bf00      	nop
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
  IPFRAG_STATS_INC(ip_frag.drop);
  pbuf_free(p);
 80269ea:	6878      	ldr	r0, [r7, #4]
 80269ec:	f7f4 fc3e 	bl	801b26c <pbuf_free>
  return NULL;
 80269f0:	2300      	movs	r3, #0
}
 80269f2:	4618      	mov	r0, r3
 80269f4:	3738      	adds	r7, #56	@ 0x38
 80269f6:	46bd      	mov	sp, r7
 80269f8:	bd80      	pop	{r7, pc}
 80269fa:	bf00      	nop
 80269fc:	08031550 	.word	0x08031550
 8026a00:	080316dc 	.word	0x080316dc
 8026a04:	08031598 	.word	0x08031598
 8026a08:	2402b104 	.word	0x2402b104
 8026a0c:	080316e8 	.word	0x080316e8

08026a10 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
 8026a10:	b580      	push	{r7, lr}
 8026a12:	af00      	add	r7, sp, #0
  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
 8026a14:	2005      	movs	r0, #5
 8026a16:	f7f3 fcc5 	bl	801a3a4 <memp_malloc>
 8026a1a:	4603      	mov	r3, r0
}
 8026a1c:	4618      	mov	r0, r3
 8026a1e:	bd80      	pop	{r7, pc}

08026a20 <ip_frag_free_pbuf_custom_ref>:

/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
 8026a20:	b580      	push	{r7, lr}
 8026a22:	b082      	sub	sp, #8
 8026a24:	af00      	add	r7, sp, #0
 8026a26:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("p != NULL", p != NULL);
 8026a28:	687b      	ldr	r3, [r7, #4]
 8026a2a:	2b00      	cmp	r3, #0
 8026a2c:	d106      	bne.n	8026a3c <ip_frag_free_pbuf_custom_ref+0x1c>
 8026a2e:	4b07      	ldr	r3, [pc, #28]	@ (8026a4c <ip_frag_free_pbuf_custom_ref+0x2c>)
 8026a30:	f44f 7231 	mov.w	r2, #708	@ 0x2c4
 8026a34:	4906      	ldr	r1, [pc, #24]	@ (8026a50 <ip_frag_free_pbuf_custom_ref+0x30>)
 8026a36:	4807      	ldr	r0, [pc, #28]	@ (8026a54 <ip_frag_free_pbuf_custom_ref+0x34>)
 8026a38:	f003 fe90 	bl	802a75c <iprintf>
  memp_free(MEMP_FRAG_PBUF, p);
 8026a3c:	6879      	ldr	r1, [r7, #4]
 8026a3e:	2005      	movs	r0, #5
 8026a40:	f7f3 fd26 	bl	801a490 <memp_free>
}
 8026a44:	bf00      	nop
 8026a46:	3708      	adds	r7, #8
 8026a48:	46bd      	mov	sp, r7
 8026a4a:	bd80      	pop	{r7, pc}
 8026a4c:	08031550 	.word	0x08031550
 8026a50:	08031708 	.word	0x08031708
 8026a54:	08031598 	.word	0x08031598

08026a58 <ipfrag_free_pbuf_custom>:

/** Free-callback function to free a 'struct pbuf_custom_ref', called by
 * pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
 8026a58:	b580      	push	{r7, lr}
 8026a5a:	b084      	sub	sp, #16
 8026a5c:	af00      	add	r7, sp, #0
 8026a5e:	6078      	str	r0, [r7, #4]
  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
 8026a60:	687b      	ldr	r3, [r7, #4]
 8026a62:	60fb      	str	r3, [r7, #12]
  LWIP_ASSERT("pcr != NULL", pcr != NULL);
 8026a64:	68fb      	ldr	r3, [r7, #12]
 8026a66:	2b00      	cmp	r3, #0
 8026a68:	d106      	bne.n	8026a78 <ipfrag_free_pbuf_custom+0x20>
 8026a6a:	4b11      	ldr	r3, [pc, #68]	@ (8026ab0 <ipfrag_free_pbuf_custom+0x58>)
 8026a6c:	f240 22ce 	movw	r2, #718	@ 0x2ce
 8026a70:	4910      	ldr	r1, [pc, #64]	@ (8026ab4 <ipfrag_free_pbuf_custom+0x5c>)
 8026a72:	4811      	ldr	r0, [pc, #68]	@ (8026ab8 <ipfrag_free_pbuf_custom+0x60>)
 8026a74:	f003 fe72 	bl	802a75c <iprintf>
  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
 8026a78:	68fa      	ldr	r2, [r7, #12]
 8026a7a:	687b      	ldr	r3, [r7, #4]
 8026a7c:	429a      	cmp	r2, r3
 8026a7e:	d006      	beq.n	8026a8e <ipfrag_free_pbuf_custom+0x36>
 8026a80:	4b0b      	ldr	r3, [pc, #44]	@ (8026ab0 <ipfrag_free_pbuf_custom+0x58>)
 8026a82:	f240 22cf 	movw	r2, #719	@ 0x2cf
 8026a86:	490d      	ldr	r1, [pc, #52]	@ (8026abc <ipfrag_free_pbuf_custom+0x64>)
 8026a88:	480b      	ldr	r0, [pc, #44]	@ (8026ab8 <ipfrag_free_pbuf_custom+0x60>)
 8026a8a:	f003 fe67 	bl	802a75c <iprintf>
  if (pcr->original != NULL) {
 8026a8e:	68fb      	ldr	r3, [r7, #12]
 8026a90:	695b      	ldr	r3, [r3, #20]
 8026a92:	2b00      	cmp	r3, #0
 8026a94:	d004      	beq.n	8026aa0 <ipfrag_free_pbuf_custom+0x48>
    pbuf_free(pcr->original);
 8026a96:	68fb      	ldr	r3, [r7, #12]
 8026a98:	695b      	ldr	r3, [r3, #20]
 8026a9a:	4618      	mov	r0, r3
 8026a9c:	f7f4 fbe6 	bl	801b26c <pbuf_free>
  }
  ip_frag_free_pbuf_custom_ref(pcr);
 8026aa0:	68f8      	ldr	r0, [r7, #12]
 8026aa2:	f7ff ffbd 	bl	8026a20 <ip_frag_free_pbuf_custom_ref>
}
 8026aa6:	bf00      	nop
 8026aa8:	3710      	adds	r7, #16
 8026aaa:	46bd      	mov	sp, r7
 8026aac:	bd80      	pop	{r7, pc}
 8026aae:	bf00      	nop
 8026ab0:	08031550 	.word	0x08031550
 8026ab4:	08031714 	.word	0x08031714
 8026ab8:	08031598 	.word	0x08031598
 8026abc:	08031720 	.word	0x08031720

08026ac0 <ip4_frag>:
 *
 * @return ERR_OK if sent successfully, err_t otherwise
 */
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
 8026ac0:	b580      	push	{r7, lr}
 8026ac2:	b094      	sub	sp, #80	@ 0x50
 8026ac4:	af02      	add	r7, sp, #8
 8026ac6:	60f8      	str	r0, [r7, #12]
 8026ac8:	60b9      	str	r1, [r7, #8]
 8026aca:	607a      	str	r2, [r7, #4]
  struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
  struct pbuf *newpbuf;
  u16_t newpbuflen = 0;
 8026acc:	2300      	movs	r3, #0
 8026ace:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  u16_t left_to_copy;
#endif
  struct ip_hdr *original_iphdr;
  struct ip_hdr *iphdr;
  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
 8026ad2:	68bb      	ldr	r3, [r7, #8]
 8026ad4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8026ad6:	3b14      	subs	r3, #20
 8026ad8:	2b00      	cmp	r3, #0
 8026ada:	da00      	bge.n	8026ade <ip4_frag+0x1e>
 8026adc:	3307      	adds	r3, #7
 8026ade:	10db      	asrs	r3, r3, #3
 8026ae0:	877b      	strh	r3, [r7, #58]	@ 0x3a
  u16_t left, fragsize;
  u16_t ofo;
  int last;
  u16_t poff = IP_HLEN;
 8026ae2:	2314      	movs	r3, #20
 8026ae4:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  u16_t tmp;
  int mf_set;

  original_iphdr = (struct ip_hdr *)p->payload;
 8026ae6:	68fb      	ldr	r3, [r7, #12]
 8026ae8:	685b      	ldr	r3, [r3, #4]
 8026aea:	637b      	str	r3, [r7, #52]	@ 0x34
  iphdr = original_iphdr;
 8026aec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026aee:	633b      	str	r3, [r7, #48]	@ 0x30
  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
 8026af0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026af2:	781b      	ldrb	r3, [r3, #0]
 8026af4:	f003 030f 	and.w	r3, r3, #15
 8026af8:	b2db      	uxtb	r3, r3
 8026afa:	009b      	lsls	r3, r3, #2
 8026afc:	b2db      	uxtb	r3, r3
 8026afe:	2b14      	cmp	r3, #20
 8026b00:	d002      	beq.n	8026b08 <ip4_frag+0x48>
    /* ip4_frag() does not support IP options */
    return ERR_VAL;
 8026b02:	f06f 0305 	mvn.w	r3, #5
 8026b06:	e110      	b.n	8026d2a <ip4_frag+0x26a>
  }
  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
 8026b08:	68fb      	ldr	r3, [r7, #12]
 8026b0a:	895b      	ldrh	r3, [r3, #10]
 8026b0c:	2b13      	cmp	r3, #19
 8026b0e:	d809      	bhi.n	8026b24 <ip4_frag+0x64>
 8026b10:	4b88      	ldr	r3, [pc, #544]	@ (8026d34 <ip4_frag+0x274>)
 8026b12:	f44f 723f 	mov.w	r2, #764	@ 0x2fc
 8026b16:	4988      	ldr	r1, [pc, #544]	@ (8026d38 <ip4_frag+0x278>)
 8026b18:	4888      	ldr	r0, [pc, #544]	@ (8026d3c <ip4_frag+0x27c>)
 8026b1a:	f003 fe1f 	bl	802a75c <iprintf>
 8026b1e:	f06f 0305 	mvn.w	r3, #5
 8026b22:	e102      	b.n	8026d2a <ip4_frag+0x26a>

  /* Save original offset */
  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
 8026b24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b26:	88db      	ldrh	r3, [r3, #6]
 8026b28:	b29b      	uxth	r3, r3
 8026b2a:	4618      	mov	r0, r3
 8026b2c:	f7f2 febc 	bl	80198a8 <lwip_htons>
 8026b30:	4603      	mov	r3, r0
 8026b32:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  ofo = tmp & IP_OFFMASK;
 8026b34:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026b36:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026b3a:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  /* already fragmented? if so, the last fragment we create must have MF, too */
  mf_set = tmp & IP_MF;
 8026b3e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026b40:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8026b44:	62fb      	str	r3, [r7, #44]	@ 0x2c

  left = (u16_t)(p->tot_len - IP_HLEN);
 8026b46:	68fb      	ldr	r3, [r7, #12]
 8026b48:	891b      	ldrh	r3, [r3, #8]
 8026b4a:	3b14      	subs	r3, #20
 8026b4c:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42

  while (left) {
 8026b50:	e0e1      	b.n	8026d16 <ip4_frag+0x256>
    /* Fill this fragment */
    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
 8026b52:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8026b54:	00db      	lsls	r3, r3, #3
 8026b56:	b29b      	uxth	r3, r3
 8026b58:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8026b5c:	4293      	cmp	r3, r2
 8026b5e:	bf28      	it	cs
 8026b60:	4613      	movcs	r3, r2
 8026b62:	857b      	strh	r3, [r7, #42]	@ 0x2a
    /* When not using a static buffer, create a chain of pbufs.
     * The first will be a PBUF_RAM holding the link and IP header.
     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
     * but limited to the size of an mtu.
     */
    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
 8026b64:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8026b68:	2114      	movs	r1, #20
 8026b6a:	200e      	movs	r0, #14
 8026b6c:	f7f4 f868 	bl	801ac40 <pbuf_alloc>
 8026b70:	6278      	str	r0, [r7, #36]	@ 0x24
    if (rambuf == NULL) {
 8026b72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026b74:	2b00      	cmp	r3, #0
 8026b76:	f000 80d5 	beq.w	8026d24 <ip4_frag+0x264>
      goto memerr;
    }
    LWIP_ASSERT("this needs a pbuf in one piece!",
 8026b7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026b7c:	895b      	ldrh	r3, [r3, #10]
 8026b7e:	2b13      	cmp	r3, #19
 8026b80:	d806      	bhi.n	8026b90 <ip4_frag+0xd0>
 8026b82:	4b6c      	ldr	r3, [pc, #432]	@ (8026d34 <ip4_frag+0x274>)
 8026b84:	f44f 7249 	mov.w	r2, #804	@ 0x324
 8026b88:	496d      	ldr	r1, [pc, #436]	@ (8026d40 <ip4_frag+0x280>)
 8026b8a:	486c      	ldr	r0, [pc, #432]	@ (8026d3c <ip4_frag+0x27c>)
 8026b8c:	f003 fde6 	bl	802a75c <iprintf>
                (rambuf->len >= (IP_HLEN)));
    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
 8026b90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026b92:	685b      	ldr	r3, [r3, #4]
 8026b94:	2214      	movs	r2, #20
 8026b96:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026b98:	4618      	mov	r0, r3
 8026b9a:	f004 f868 	bl	802ac6e <memcpy>
    iphdr = (struct ip_hdr *)rambuf->payload;
 8026b9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026ba0:	685b      	ldr	r3, [r3, #4]
 8026ba2:	633b      	str	r3, [r7, #48]	@ 0x30

    left_to_copy = fragsize;
 8026ba4:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026ba6:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
    while (left_to_copy) {
 8026baa:	e064      	b.n	8026c76 <ip4_frag+0x1b6>
      struct pbuf_custom_ref *pcr;
      u16_t plen = (u16_t)(p->len - poff);
 8026bac:	68fb      	ldr	r3, [r7, #12]
 8026bae:	895a      	ldrh	r2, [r3, #10]
 8026bb0:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8026bb2:	1ad3      	subs	r3, r2, r3
 8026bb4:	83fb      	strh	r3, [r7, #30]
      LWIP_ASSERT("p->len >= poff", p->len >= poff);
 8026bb6:	68fb      	ldr	r3, [r7, #12]
 8026bb8:	895b      	ldrh	r3, [r3, #10]
 8026bba:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8026bbc:	429a      	cmp	r2, r3
 8026bbe:	d906      	bls.n	8026bce <ip4_frag+0x10e>
 8026bc0:	4b5c      	ldr	r3, [pc, #368]	@ (8026d34 <ip4_frag+0x274>)
 8026bc2:	f240 322d 	movw	r2, #813	@ 0x32d
 8026bc6:	495f      	ldr	r1, [pc, #380]	@ (8026d44 <ip4_frag+0x284>)
 8026bc8:	485c      	ldr	r0, [pc, #368]	@ (8026d3c <ip4_frag+0x27c>)
 8026bca:	f003 fdc7 	bl	802a75c <iprintf>
      newpbuflen = LWIP_MIN(left_to_copy, plen);
 8026bce:	8bfa      	ldrh	r2, [r7, #30]
 8026bd0:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026bd4:	4293      	cmp	r3, r2
 8026bd6:	bf28      	it	cs
 8026bd8:	4613      	movcs	r3, r2
 8026bda:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      /* Is this pbuf already empty? */
      if (!newpbuflen) {
 8026bde:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026be2:	2b00      	cmp	r3, #0
 8026be4:	d105      	bne.n	8026bf2 <ip4_frag+0x132>
        poff = 0;
 8026be6:	2300      	movs	r3, #0
 8026be8:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8026bea:	68fb      	ldr	r3, [r7, #12]
 8026bec:	681b      	ldr	r3, [r3, #0]
 8026bee:	60fb      	str	r3, [r7, #12]
        continue;
 8026bf0:	e041      	b.n	8026c76 <ip4_frag+0x1b6>
      }
      pcr = ip_frag_alloc_pbuf_custom_ref();
 8026bf2:	f7ff ff0d 	bl	8026a10 <ip_frag_alloc_pbuf_custom_ref>
 8026bf6:	61b8      	str	r0, [r7, #24]
      if (pcr == NULL) {
 8026bf8:	69bb      	ldr	r3, [r7, #24]
 8026bfa:	2b00      	cmp	r3, #0
 8026bfc:	d103      	bne.n	8026c06 <ip4_frag+0x146>
        pbuf_free(rambuf);
 8026bfe:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026c00:	f7f4 fb34 	bl	801b26c <pbuf_free>
        goto memerr;
 8026c04:	e08f      	b.n	8026d26 <ip4_frag+0x266>
      }
      /* Mirror this pbuf, although we might not need all of it. */
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8026c06:	69b8      	ldr	r0, [r7, #24]
                                    (u8_t *)p->payload + poff, newpbuflen);
 8026c08:	68fb      	ldr	r3, [r7, #12]
 8026c0a:	685a      	ldr	r2, [r3, #4]
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8026c0c:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8026c0e:	4413      	add	r3, r2
 8026c10:	f8b7 1046 	ldrh.w	r1, [r7, #70]	@ 0x46
 8026c14:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8026c18:	9201      	str	r2, [sp, #4]
 8026c1a:	9300      	str	r3, [sp, #0]
 8026c1c:	4603      	mov	r3, r0
 8026c1e:	2241      	movs	r2, #65	@ 0x41
 8026c20:	2000      	movs	r0, #0
 8026c22:	f7f4 f939 	bl	801ae98 <pbuf_alloced_custom>
 8026c26:	6178      	str	r0, [r7, #20]
      if (newpbuf == NULL) {
 8026c28:	697b      	ldr	r3, [r7, #20]
 8026c2a:	2b00      	cmp	r3, #0
 8026c2c:	d106      	bne.n	8026c3c <ip4_frag+0x17c>
        ip_frag_free_pbuf_custom_ref(pcr);
 8026c2e:	69b8      	ldr	r0, [r7, #24]
 8026c30:	f7ff fef6 	bl	8026a20 <ip_frag_free_pbuf_custom_ref>
        pbuf_free(rambuf);
 8026c34:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026c36:	f7f4 fb19 	bl	801b26c <pbuf_free>
        goto memerr;
 8026c3a:	e074      	b.n	8026d26 <ip4_frag+0x266>
      }
      pbuf_ref(p);
 8026c3c:	68f8      	ldr	r0, [r7, #12]
 8026c3e:	f7f4 fbbb 	bl	801b3b8 <pbuf_ref>
      pcr->original = p;
 8026c42:	69bb      	ldr	r3, [r7, #24]
 8026c44:	68fa      	ldr	r2, [r7, #12]
 8026c46:	615a      	str	r2, [r3, #20]
      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
 8026c48:	69bb      	ldr	r3, [r7, #24]
 8026c4a:	4a3f      	ldr	r2, [pc, #252]	@ (8026d48 <ip4_frag+0x288>)
 8026c4c:	611a      	str	r2, [r3, #16]

      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
       * so that it is removed when pbuf_dechain is later called on rambuf.
       */
      pbuf_cat(rambuf, newpbuf);
 8026c4e:	6979      	ldr	r1, [r7, #20]
 8026c50:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026c52:	f7f4 fbd9 	bl	801b408 <pbuf_cat>
      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
 8026c56:	f8b7 2044 	ldrh.w	r2, [r7, #68]	@ 0x44
 8026c5a:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026c5e:	1ad3      	subs	r3, r2, r3
 8026c60:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
      if (left_to_copy) {
 8026c64:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026c68:	2b00      	cmp	r3, #0
 8026c6a:	d004      	beq.n	8026c76 <ip4_frag+0x1b6>
        poff = 0;
 8026c6c:	2300      	movs	r3, #0
 8026c6e:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8026c70:	68fb      	ldr	r3, [r7, #12]
 8026c72:	681b      	ldr	r3, [r3, #0]
 8026c74:	60fb      	str	r3, [r7, #12]
    while (left_to_copy) {
 8026c76:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026c7a:	2b00      	cmp	r3, #0
 8026c7c:	d196      	bne.n	8026bac <ip4_frag+0xec>
      }
    }
    poff = (u16_t)(poff + newpbuflen);
 8026c7e:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8026c80:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026c84:	4413      	add	r3, r2
 8026c86:	87fb      	strh	r3, [r7, #62]	@ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

    /* Correct header */
    last = (left <= netif->mtu - IP_HLEN);
 8026c88:	68bb      	ldr	r3, [r7, #8]
 8026c8a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8026c8c:	f1a3 0213 	sub.w	r2, r3, #19
 8026c90:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8026c94:	429a      	cmp	r2, r3
 8026c96:	bfcc      	ite	gt
 8026c98:	2301      	movgt	r3, #1
 8026c9a:	2300      	movle	r3, #0
 8026c9c:	b2db      	uxtb	r3, r3
 8026c9e:	623b      	str	r3, [r7, #32]

    /* Set new offset and MF flag */
    tmp = (IP_OFFMASK & (ofo));
 8026ca0:	f8b7 3040 	ldrh.w	r3, [r7, #64]	@ 0x40
 8026ca4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026ca8:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    if (!last || mf_set) {
 8026caa:	6a3b      	ldr	r3, [r7, #32]
 8026cac:	2b00      	cmp	r3, #0
 8026cae:	d002      	beq.n	8026cb6 <ip4_frag+0x1f6>
 8026cb0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026cb2:	2b00      	cmp	r3, #0
 8026cb4:	d003      	beq.n	8026cbe <ip4_frag+0x1fe>
      /* the last fragment has MF set if the input frame had it */
      tmp = tmp | IP_MF;
 8026cb6:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026cb8:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
 8026cbc:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    }
    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
 8026cbe:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026cc0:	4618      	mov	r0, r3
 8026cc2:	f7f2 fdf1 	bl	80198a8 <lwip_htons>
 8026cc6:	4603      	mov	r3, r0
 8026cc8:	461a      	mov	r2, r3
 8026cca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ccc:	80da      	strh	r2, [r3, #6]
    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
 8026cce:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026cd0:	3314      	adds	r3, #20
 8026cd2:	b29b      	uxth	r3, r3
 8026cd4:	4618      	mov	r0, r3
 8026cd6:	f7f2 fde7 	bl	80198a8 <lwip_htons>
 8026cda:	4603      	mov	r3, r0
 8026cdc:	461a      	mov	r2, r3
 8026cde:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ce0:	805a      	strh	r2, [r3, #2]
    IPH_CHKSUM_SET(iphdr, 0);
 8026ce2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ce4:	2200      	movs	r2, #0
 8026ce6:	729a      	strb	r2, [r3, #10]
 8026ce8:	2200      	movs	r2, #0
 8026cea:	72da      	strb	r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */

    /* No need for separate header pbuf - we allowed room for it in rambuf
     * when allocated.
     */
    netif->output(netif, rambuf, dest);
 8026cec:	68bb      	ldr	r3, [r7, #8]
 8026cee:	695b      	ldr	r3, [r3, #20]
 8026cf0:	687a      	ldr	r2, [r7, #4]
 8026cf2:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8026cf4:	68b8      	ldr	r0, [r7, #8]
 8026cf6:	4798      	blx	r3
     * recreate it next time round the loop. If we're lucky the hardware
     * will have already sent the packet, the free will really free, and
     * there will be zero memory penalty.
     */

    pbuf_free(rambuf);
 8026cf8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026cfa:	f7f4 fab7 	bl	801b26c <pbuf_free>
    left = (u16_t)(left - fragsize);
 8026cfe:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8026d02:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026d04:	1ad3      	subs	r3, r2, r3
 8026d06:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
    ofo = (u16_t)(ofo + nfb);
 8026d0a:	f8b7 2040 	ldrh.w	r2, [r7, #64]	@ 0x40
 8026d0e:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8026d10:	4413      	add	r3, r2
 8026d12:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  while (left) {
 8026d16:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8026d1a:	2b00      	cmp	r3, #0
 8026d1c:	f47f af19 	bne.w	8026b52 <ip4_frag+0x92>
  }
  MIB2_STATS_INC(mib2.ipfragoks);
  return ERR_OK;
 8026d20:	2300      	movs	r3, #0
 8026d22:	e002      	b.n	8026d2a <ip4_frag+0x26a>
      goto memerr;
 8026d24:	bf00      	nop
memerr:
  MIB2_STATS_INC(mib2.ipfragfails);
  return ERR_MEM;
 8026d26:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8026d2a:	4618      	mov	r0, r3
 8026d2c:	3748      	adds	r7, #72	@ 0x48
 8026d2e:	46bd      	mov	sp, r7
 8026d30:	bd80      	pop	{r7, pc}
 8026d32:	bf00      	nop
 8026d34:	08031550 	.word	0x08031550
 8026d38:	0803172c 	.word	0x0803172c
 8026d3c:	08031598 	.word	0x08031598
 8026d40:	08031748 	.word	0x08031748
 8026d44:	08031768 	.word	0x08031768
 8026d48:	08026a59 	.word	0x08026a59

08026d4c <ethernet_input>:
 * @see ETHARP_SUPPORT_VLAN
 * @see LWIP_HOOK_VLAN_CHECK
 */
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
 8026d4c:	b580      	push	{r7, lr}
 8026d4e:	b086      	sub	sp, #24
 8026d50:	af00      	add	r7, sp, #0
 8026d52:	6078      	str	r0, [r7, #4]
 8026d54:	6039      	str	r1, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
 8026d56:	230e      	movs	r3, #14
 8026d58:	82fb      	strh	r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */

  LWIP_ASSERT_CORE_LOCKED();
 8026d5a:	f7ea f8d1 	bl	8010f00 <sys_check_core_locking>

  if (p->len <= SIZEOF_ETH_HDR) {
 8026d5e:	687b      	ldr	r3, [r7, #4]
 8026d60:	895b      	ldrh	r3, [r3, #10]
 8026d62:	2b0e      	cmp	r3, #14
 8026d64:	d96e      	bls.n	8026e44 <ethernet_input+0xf8>
    ETHARP_STATS_INC(etharp.drop);
    MIB2_STATS_NETIF_INC(netif, ifinerrors);
    goto free_and_return;
  }

  if (p->if_idx == NETIF_NO_INDEX) {
 8026d66:	687b      	ldr	r3, [r7, #4]
 8026d68:	7bdb      	ldrb	r3, [r3, #15]
 8026d6a:	2b00      	cmp	r3, #0
 8026d6c:	d106      	bne.n	8026d7c <ethernet_input+0x30>
    p->if_idx = netif_get_index(netif);
 8026d6e:	683b      	ldr	r3, [r7, #0]
 8026d70:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8026d74:	3301      	adds	r3, #1
 8026d76:	b2da      	uxtb	r2, r3
 8026d78:	687b      	ldr	r3, [r7, #4]
 8026d7a:	73da      	strb	r2, [r3, #15]
  }

  /* points to packet payload, which starts with an Ethernet header */
  ethhdr = (struct eth_hdr *)p->payload;
 8026d7c:	687b      	ldr	r3, [r7, #4]
 8026d7e:	685b      	ldr	r3, [r3, #4]
 8026d80:	613b      	str	r3, [r7, #16]
               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
               lwip_htons(ethhdr->type)));

  type = ethhdr->type;
 8026d82:	693b      	ldr	r3, [r7, #16]
 8026d84:	7b1a      	ldrb	r2, [r3, #12]
 8026d86:	7b5b      	ldrb	r3, [r3, #13]
 8026d88:	021b      	lsls	r3, r3, #8
 8026d8a:	4313      	orrs	r3, r2
 8026d8c:	81fb      	strh	r3, [r7, #14]

#if LWIP_ARP_FILTER_NETIF
  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/

  if (ethhdr->dest.addr[0] & 1) {
 8026d8e:	693b      	ldr	r3, [r7, #16]
 8026d90:	781b      	ldrb	r3, [r3, #0]
 8026d92:	f003 0301 	and.w	r3, r3, #1
 8026d96:	2b00      	cmp	r3, #0
 8026d98:	d023      	beq.n	8026de2 <ethernet_input+0x96>
    /* this might be a multicast or broadcast packet */
    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
 8026d9a:	693b      	ldr	r3, [r7, #16]
 8026d9c:	781b      	ldrb	r3, [r3, #0]
 8026d9e:	2b01      	cmp	r3, #1
 8026da0:	d10f      	bne.n	8026dc2 <ethernet_input+0x76>
#if LWIP_IPV4
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8026da2:	693b      	ldr	r3, [r7, #16]
 8026da4:	785b      	ldrb	r3, [r3, #1]
 8026da6:	2b00      	cmp	r3, #0
 8026da8:	d11b      	bne.n	8026de2 <ethernet_input+0x96>
          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
 8026daa:	693b      	ldr	r3, [r7, #16]
 8026dac:	789b      	ldrb	r3, [r3, #2]
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 8026dae:	2b5e      	cmp	r3, #94	@ 0x5e
 8026db0:	d117      	bne.n	8026de2 <ethernet_input+0x96>
        /* mark the pbuf as link-layer multicast */
        p->flags |= PBUF_FLAG_LLMCAST;
 8026db2:	687b      	ldr	r3, [r7, #4]
 8026db4:	7b5b      	ldrb	r3, [r3, #13]
 8026db6:	f043 0310 	orr.w	r3, r3, #16
 8026dba:	b2da      	uxtb	r2, r3
 8026dbc:	687b      	ldr	r3, [r7, #4]
 8026dbe:	735a      	strb	r2, [r3, #13]
 8026dc0:	e00f      	b.n	8026de2 <ethernet_input+0x96>
             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
      /* mark the pbuf as link-layer multicast */
      p->flags |= PBUF_FLAG_LLMCAST;
    }
#endif /* LWIP_IPV6 */
    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
 8026dc2:	693b      	ldr	r3, [r7, #16]
 8026dc4:	2206      	movs	r2, #6
 8026dc6:	4928      	ldr	r1, [pc, #160]	@ (8026e68 <ethernet_input+0x11c>)
 8026dc8:	4618      	mov	r0, r3
 8026dca:	f003 fe2f 	bl	802aa2c <memcmp>
 8026dce:	4603      	mov	r3, r0
 8026dd0:	2b00      	cmp	r3, #0
 8026dd2:	d106      	bne.n	8026de2 <ethernet_input+0x96>
      /* mark the pbuf as link-layer broadcast */
      p->flags |= PBUF_FLAG_LLBCAST;
 8026dd4:	687b      	ldr	r3, [r7, #4]
 8026dd6:	7b5b      	ldrb	r3, [r3, #13]
 8026dd8:	f043 0308 	orr.w	r3, r3, #8
 8026ddc:	b2da      	uxtb	r2, r3
 8026dde:	687b      	ldr	r3, [r7, #4]
 8026de0:	735a      	strb	r2, [r3, #13]
    }
  }

  switch (type) {
 8026de2:	89fb      	ldrh	r3, [r7, #14]
 8026de4:	2b08      	cmp	r3, #8
 8026de6:	d003      	beq.n	8026df0 <ethernet_input+0xa4>
 8026de8:	f5b3 6fc1 	cmp.w	r3, #1544	@ 0x608
 8026dec:	d014      	beq.n	8026e18 <ethernet_input+0xcc>
      }
#endif
      ETHARP_STATS_INC(etharp.proterr);
      ETHARP_STATS_INC(etharp.drop);
      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
      goto free_and_return;
 8026dee:	e032      	b.n	8026e56 <ethernet_input+0x10a>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026df0:	683b      	ldr	r3, [r7, #0]
 8026df2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8026df6:	f003 0308 	and.w	r3, r3, #8
 8026dfa:	2b00      	cmp	r3, #0
 8026dfc:	d024      	beq.n	8026e48 <ethernet_input+0xfc>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8026dfe:	8afb      	ldrh	r3, [r7, #22]
 8026e00:	4619      	mov	r1, r3
 8026e02:	6878      	ldr	r0, [r7, #4]
 8026e04:	f7f4 f97a 	bl	801b0fc <pbuf_remove_header>
 8026e08:	4603      	mov	r3, r0
 8026e0a:	2b00      	cmp	r3, #0
 8026e0c:	d11e      	bne.n	8026e4c <ethernet_input+0x100>
        ip4_input(p, netif);
 8026e0e:	6839      	ldr	r1, [r7, #0]
 8026e10:	6878      	ldr	r0, [r7, #4]
 8026e12:	f7fe fd2f 	bl	8025874 <ip4_input>
      break;
 8026e16:	e013      	b.n	8026e40 <ethernet_input+0xf4>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8026e18:	683b      	ldr	r3, [r7, #0]
 8026e1a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8026e1e:	f003 0308 	and.w	r3, r3, #8
 8026e22:	2b00      	cmp	r3, #0
 8026e24:	d014      	beq.n	8026e50 <ethernet_input+0x104>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8026e26:	8afb      	ldrh	r3, [r7, #22]
 8026e28:	4619      	mov	r1, r3
 8026e2a:	6878      	ldr	r0, [r7, #4]
 8026e2c:	f7f4 f966 	bl	801b0fc <pbuf_remove_header>
 8026e30:	4603      	mov	r3, r0
 8026e32:	2b00      	cmp	r3, #0
 8026e34:	d10e      	bne.n	8026e54 <ethernet_input+0x108>
        etharp_input(p, netif);
 8026e36:	6839      	ldr	r1, [r7, #0]
 8026e38:	6878      	ldr	r0, [r7, #4]
 8026e3a:	f7fd fe9d 	bl	8024b78 <etharp_input>
      break;
 8026e3e:	bf00      	nop
  }

  /* This means the pbuf is freed or consumed,
     so the caller doesn't have to free it again */
  return ERR_OK;
 8026e40:	2300      	movs	r3, #0
 8026e42:	e00c      	b.n	8026e5e <ethernet_input+0x112>
    goto free_and_return;
 8026e44:	bf00      	nop
 8026e46:	e006      	b.n	8026e56 <ethernet_input+0x10a>
        goto free_and_return;
 8026e48:	bf00      	nop
 8026e4a:	e004      	b.n	8026e56 <ethernet_input+0x10a>
        goto free_and_return;
 8026e4c:	bf00      	nop
 8026e4e:	e002      	b.n	8026e56 <ethernet_input+0x10a>
        goto free_and_return;
 8026e50:	bf00      	nop
 8026e52:	e000      	b.n	8026e56 <ethernet_input+0x10a>
        goto free_and_return;
 8026e54:	bf00      	nop

free_and_return:
  pbuf_free(p);
 8026e56:	6878      	ldr	r0, [r7, #4]
 8026e58:	f7f4 fa08 	bl	801b26c <pbuf_free>
  return ERR_OK;
 8026e5c:	2300      	movs	r3, #0
}
 8026e5e:	4618      	mov	r0, r3
 8026e60:	3718      	adds	r7, #24
 8026e62:	46bd      	mov	sp, r7
 8026e64:	bd80      	pop	{r7, pc}
 8026e66:	bf00      	nop
 8026e68:	08031b60 	.word	0x08031b60

08026e6c <ethernet_output>:
 * @return ERR_OK if the packet was sent, any other err_t on failure
 */
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
                const struct eth_addr * src, const struct eth_addr * dst,
                u16_t eth_type) {
 8026e6c:	b580      	push	{r7, lr}
 8026e6e:	b086      	sub	sp, #24
 8026e70:	af00      	add	r7, sp, #0
 8026e72:	60f8      	str	r0, [r7, #12]
 8026e74:	60b9      	str	r1, [r7, #8]
 8026e76:	607a      	str	r2, [r7, #4]
 8026e78:	603b      	str	r3, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t eth_type_be = lwip_htons(eth_type);
 8026e7a:	8c3b      	ldrh	r3, [r7, #32]
 8026e7c:	4618      	mov	r0, r3
 8026e7e:	f7f2 fd13 	bl	80198a8 <lwip_htons>
 8026e82:	4603      	mov	r3, r0
 8026e84:	82fb      	strh	r3, [r7, #22]

    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
  } else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
  {
    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
 8026e86:	210e      	movs	r1, #14
 8026e88:	68b8      	ldr	r0, [r7, #8]
 8026e8a:	f7f4 f927 	bl	801b0dc <pbuf_add_header>
 8026e8e:	4603      	mov	r3, r0
 8026e90:	2b00      	cmp	r3, #0
 8026e92:	d127      	bne.n	8026ee4 <ethernet_output+0x78>
      goto pbuf_header_failed;
    }
  }

  LWIP_ASSERT_CORE_LOCKED();
 8026e94:	f7ea f834 	bl	8010f00 <sys_check_core_locking>

  ethhdr = (struct eth_hdr *)p->payload;
 8026e98:	68bb      	ldr	r3, [r7, #8]
 8026e9a:	685b      	ldr	r3, [r3, #4]
 8026e9c:	613b      	str	r3, [r7, #16]
  ethhdr->type = eth_type_be;
 8026e9e:	693b      	ldr	r3, [r7, #16]
 8026ea0:	8afa      	ldrh	r2, [r7, #22]
 8026ea2:	819a      	strh	r2, [r3, #12]
  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
 8026ea4:	693b      	ldr	r3, [r7, #16]
 8026ea6:	2206      	movs	r2, #6
 8026ea8:	6839      	ldr	r1, [r7, #0]
 8026eaa:	4618      	mov	r0, r3
 8026eac:	f003 fedf 	bl	802ac6e <memcpy>
  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
 8026eb0:	693b      	ldr	r3, [r7, #16]
 8026eb2:	3306      	adds	r3, #6
 8026eb4:	2206      	movs	r2, #6
 8026eb6:	6879      	ldr	r1, [r7, #4]
 8026eb8:	4618      	mov	r0, r3
 8026eba:	f003 fed8 	bl	802ac6e <memcpy>

  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
 8026ebe:	68fb      	ldr	r3, [r7, #12]
 8026ec0:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8026ec4:	2b06      	cmp	r3, #6
 8026ec6:	d006      	beq.n	8026ed6 <ethernet_output+0x6a>
 8026ec8:	4b0a      	ldr	r3, [pc, #40]	@ (8026ef4 <ethernet_output+0x88>)
 8026eca:	f44f 7299 	mov.w	r2, #306	@ 0x132
 8026ece:	490a      	ldr	r1, [pc, #40]	@ (8026ef8 <ethernet_output+0x8c>)
 8026ed0:	480a      	ldr	r0, [pc, #40]	@ (8026efc <ethernet_output+0x90>)
 8026ed2:	f003 fc43 	bl	802a75c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
              ("ethernet_output: sending packet %p\n", (void *)p));

  /* send the packet */
  return netif->linkoutput(netif, p);
 8026ed6:	68fb      	ldr	r3, [r7, #12]
 8026ed8:	699b      	ldr	r3, [r3, #24]
 8026eda:	68b9      	ldr	r1, [r7, #8]
 8026edc:	68f8      	ldr	r0, [r7, #12]
 8026ede:	4798      	blx	r3
 8026ee0:	4603      	mov	r3, r0
 8026ee2:	e002      	b.n	8026eea <ethernet_output+0x7e>
      goto pbuf_header_failed;
 8026ee4:	bf00      	nop

pbuf_header_failed:
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
              ("ethernet_output: could not allocate room for header.\n"));
  LINK_STATS_INC(link.lenerr);
  return ERR_BUF;
 8026ee6:	f06f 0301 	mvn.w	r3, #1
}
 8026eea:	4618      	mov	r0, r3
 8026eec:	3718      	adds	r7, #24
 8026eee:	46bd      	mov	sp, r7
 8026ef0:	bd80      	pop	{r7, pc}
 8026ef2:	bf00      	nop
 8026ef4:	08031778 	.word	0x08031778
 8026ef8:	080317b0 	.word	0x080317b0
 8026efc:	080317e4 	.word	0x080317e4

08026f00 <sys_mbox_new>:
#endif

/*-----------------------------------------------------------------------------------*/
//  Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
 8026f00:	b580      	push	{r7, lr}
 8026f02:	b082      	sub	sp, #8
 8026f04:	af00      	add	r7, sp, #0
 8026f06:	6078      	str	r0, [r7, #4]
 8026f08:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  osMessageQDef(QUEUE, size, void *);
  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
  *mbox = osMessageQueueNew(size, sizeof(void *), NULL);
 8026f0a:	683b      	ldr	r3, [r7, #0]
 8026f0c:	2200      	movs	r2, #0
 8026f0e:	2104      	movs	r1, #4
 8026f10:	4618      	mov	r0, r3
 8026f12:	f7ea fd81 	bl	8011a18 <osMessageQueueNew>
 8026f16:	4602      	mov	r2, r0
 8026f18:	687b      	ldr	r3, [r7, #4]
 8026f1a:	601a      	str	r2, [r3, #0]
  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
  {
    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
  }
#endif /* SYS_STATS */
  if(*mbox == NULL)
 8026f1c:	687b      	ldr	r3, [r7, #4]
 8026f1e:	681b      	ldr	r3, [r3, #0]
 8026f20:	2b00      	cmp	r3, #0
 8026f22:	d102      	bne.n	8026f2a <sys_mbox_new+0x2a>
    return ERR_MEM;
 8026f24:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026f28:	e000      	b.n	8026f2c <sys_mbox_new+0x2c>

  return ERR_OK;
 8026f2a:	2300      	movs	r3, #0
}
 8026f2c:	4618      	mov	r0, r3
 8026f2e:	3708      	adds	r7, #8
 8026f30:	46bd      	mov	sp, r7
 8026f32:	bd80      	pop	{r7, pc}

08026f34 <sys_mbox_free>:
  Deallocates a mailbox. If there are messages still present in the
  mailbox when the mailbox is deallocated, it is an indication of a
  programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
 8026f34:	b580      	push	{r7, lr}
 8026f36:	b082      	sub	sp, #8
 8026f38:	af00      	add	r7, sp, #0
 8026f3a:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  if(osMessageWaiting(*mbox))
#else
  if(osMessageQueueGetCount(*mbox))
 8026f3c:	687b      	ldr	r3, [r7, #4]
 8026f3e:	681b      	ldr	r3, [r3, #0]
 8026f40:	4618      	mov	r0, r3
 8026f42:	f7ea fe9b 	bl	8011c7c <osMessageQueueGetCount>

  }
#if (osCMSIS < 0x20000U)
  osMessageDelete(*mbox);
#else
  osMessageQueueDelete(*mbox);
 8026f46:	687b      	ldr	r3, [r7, #4]
 8026f48:	681b      	ldr	r3, [r3, #0]
 8026f4a:	4618      	mov	r0, r3
 8026f4c:	f7ea feb6 	bl	8011cbc <osMessageQueueDelete>
#endif
#if SYS_STATS
  --lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
 8026f50:	bf00      	nop
 8026f52:	3708      	adds	r7, #8
 8026f54:	46bd      	mov	sp, r7
 8026f56:	bd80      	pop	{r7, pc}

08026f58 <sys_mbox_trypost>:


/*-----------------------------------------------------------------------------------*/
//   Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
 8026f58:	b580      	push	{r7, lr}
 8026f5a:	b084      	sub	sp, #16
 8026f5c:	af00      	add	r7, sp, #0
 8026f5e:	6078      	str	r0, [r7, #4]
 8026f60:	6039      	str	r1, [r7, #0]
  err_t result;
#if (osCMSIS < 0x20000U)
  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
 8026f62:	687b      	ldr	r3, [r7, #4]
 8026f64:	6818      	ldr	r0, [r3, #0]
 8026f66:	4639      	mov	r1, r7
 8026f68:	2300      	movs	r3, #0
 8026f6a:	2200      	movs	r2, #0
 8026f6c:	f7ea fdc8 	bl	8011b00 <osMessageQueuePut>
 8026f70:	4603      	mov	r3, r0
 8026f72:	2b00      	cmp	r3, #0
 8026f74:	d102      	bne.n	8026f7c <sys_mbox_trypost+0x24>
#endif
  {
    result = ERR_OK;
 8026f76:	2300      	movs	r3, #0
 8026f78:	73fb      	strb	r3, [r7, #15]
 8026f7a:	e001      	b.n	8026f80 <sys_mbox_trypost+0x28>
  }
  else
  {
    // could not post, queue must be full
    result = ERR_MEM;
 8026f7c:	23ff      	movs	r3, #255	@ 0xff
 8026f7e:	73fb      	strb	r3, [r7, #15]
#if SYS_STATS
    lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
  }

  return result;
 8026f80:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8026f84:	4618      	mov	r0, r3
 8026f86:	3710      	adds	r7, #16
 8026f88:	46bd      	mov	sp, r7
 8026f8a:	bd80      	pop	{r7, pc}

08026f8c <sys_arch_mbox_fetch>:

  Note that a function with a similar name, sys_mbox_fetch(), is
  implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
 8026f8c:	b580      	push	{r7, lr}
 8026f8e:	b086      	sub	sp, #24
 8026f90:	af00      	add	r7, sp, #0
 8026f92:	60f8      	str	r0, [r7, #12]
 8026f94:	60b9      	str	r1, [r7, #8]
 8026f96:	607a      	str	r2, [r7, #4]
#if (osCMSIS < 0x20000U)
  osEvent event;
  uint32_t starttime = osKernelSysTick();
#else
  osStatus_t status;
  uint32_t starttime = osKernelGetTickCount();
 8026f98:	f7ea f928 	bl	80111ec <osKernelGetTickCount>
 8026f9c:	6178      	str	r0, [r7, #20]
#endif
  if(timeout != 0)
 8026f9e:	687b      	ldr	r3, [r7, #4]
 8026fa0:	2b00      	cmp	r3, #0
 8026fa2:	d013      	beq.n	8026fcc <sys_arch_mbox_fetch+0x40>
    {
      *msg = (void *)event.value.v;
      return (osKernelSysTick() - starttime);
    }
#else
    status = osMessageQueueGet(*mbox, msg, 0, timeout);
 8026fa4:	68fb      	ldr	r3, [r7, #12]
 8026fa6:	6818      	ldr	r0, [r3, #0]
 8026fa8:	687b      	ldr	r3, [r7, #4]
 8026faa:	2200      	movs	r2, #0
 8026fac:	68b9      	ldr	r1, [r7, #8]
 8026fae:	f7ea fe07 	bl	8011bc0 <osMessageQueueGet>
 8026fb2:	6138      	str	r0, [r7, #16]
    if (status == osOK)
 8026fb4:	693b      	ldr	r3, [r7, #16]
 8026fb6:	2b00      	cmp	r3, #0
 8026fb8:	d105      	bne.n	8026fc6 <sys_arch_mbox_fetch+0x3a>
    {
      return (osKernelGetTickCount() - starttime);
 8026fba:	f7ea f917 	bl	80111ec <osKernelGetTickCount>
 8026fbe:	4602      	mov	r2, r0
 8026fc0:	697b      	ldr	r3, [r7, #20]
 8026fc2:	1ad3      	subs	r3, r2, r3
 8026fc4:	e00f      	b.n	8026fe6 <sys_arch_mbox_fetch+0x5a>
    }
#endif
    else
    {
      return SYS_ARCH_TIMEOUT;
 8026fc6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026fca:	e00c      	b.n	8026fe6 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
    event = osMessageGet (*mbox, osWaitForever);
    *msg = (void *)event.value.v;
    return (osKernelSysTick() - starttime);
#else
    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
 8026fcc:	68fb      	ldr	r3, [r7, #12]
 8026fce:	6818      	ldr	r0, [r3, #0]
 8026fd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026fd4:	2200      	movs	r2, #0
 8026fd6:	68b9      	ldr	r1, [r7, #8]
 8026fd8:	f7ea fdf2 	bl	8011bc0 <osMessageQueueGet>
    return (osKernelGetTickCount() - starttime);
 8026fdc:	f7ea f906 	bl	80111ec <osKernelGetTickCount>
 8026fe0:	4602      	mov	r2, r0
 8026fe2:	697b      	ldr	r3, [r7, #20]
 8026fe4:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 8026fe6:	4618      	mov	r0, r3
 8026fe8:	3718      	adds	r7, #24
 8026fea:	46bd      	mov	sp, r7
 8026fec:	bd80      	pop	{r7, pc}

08026fee <sys_arch_mbox_tryfetch>:
/*
  Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
  return with SYS_MBOX_EMPTY.  On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
 8026fee:	b580      	push	{r7, lr}
 8026ff0:	b082      	sub	sp, #8
 8026ff2:	af00      	add	r7, sp, #0
 8026ff4:	6078      	str	r0, [r7, #4]
 8026ff6:	6039      	str	r1, [r7, #0]

  if(event.status == osEventMessage)
  {
    *msg = (void *)event.value.v;
#else
  if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
 8026ff8:	687b      	ldr	r3, [r7, #4]
 8026ffa:	6818      	ldr	r0, [r3, #0]
 8026ffc:	2300      	movs	r3, #0
 8026ffe:	2200      	movs	r2, #0
 8027000:	6839      	ldr	r1, [r7, #0]
 8027002:	f7ea fddd 	bl	8011bc0 <osMessageQueueGet>
 8027006:	4603      	mov	r3, r0
 8027008:	2b00      	cmp	r3, #0
 802700a:	d101      	bne.n	8027010 <sys_arch_mbox_tryfetch+0x22>
  {
#endif
    return ERR_OK;
 802700c:	2300      	movs	r3, #0
 802700e:	e001      	b.n	8027014 <sys_arch_mbox_tryfetch+0x26>
  }
  else
  {
    return SYS_MBOX_EMPTY;
 8027010:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
  }
}
 8027014:	4618      	mov	r0, r3
 8027016:	3708      	adds	r7, #8
 8027018:	46bd      	mov	sp, r7
 802701a:	bd80      	pop	{r7, pc}

0802701c <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
 802701c:	b480      	push	{r7}
 802701e:	b083      	sub	sp, #12
 8027020:	af00      	add	r7, sp, #0
 8027022:	6078      	str	r0, [r7, #4]
  if (*mbox == SYS_MBOX_NULL)
 8027024:	687b      	ldr	r3, [r7, #4]
 8027026:	681b      	ldr	r3, [r3, #0]
 8027028:	2b00      	cmp	r3, #0
 802702a:	d101      	bne.n	8027030 <sys_mbox_valid+0x14>
    return 0;
 802702c:	2300      	movs	r3, #0
 802702e:	e000      	b.n	8027032 <sys_mbox_valid+0x16>
  else
    return 1;
 8027030:	2301      	movs	r3, #1
}
 8027032:	4618      	mov	r0, r3
 8027034:	370c      	adds	r7, #12
 8027036:	46bd      	mov	sp, r7
 8027038:	f85d 7b04 	ldr.w	r7, [sp], #4
 802703c:	4770      	bx	lr

0802703e <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
 802703e:	b480      	push	{r7}
 8027040:	b083      	sub	sp, #12
 8027042:	af00      	add	r7, sp, #0
 8027044:	6078      	str	r0, [r7, #4]
  *mbox = SYS_MBOX_NULL;
 8027046:	687b      	ldr	r3, [r7, #4]
 8027048:	2200      	movs	r2, #0
 802704a:	601a      	str	r2, [r3, #0]
}
 802704c:	bf00      	nop
 802704e:	370c      	adds	r7, #12
 8027050:	46bd      	mov	sp, r7
 8027052:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027056:	4770      	bx	lr

08027058 <sys_sem_new>:

/*-----------------------------------------------------------------------------------*/
//  Creates a new semaphore. The "count" argument specifies
//  the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
 8027058:	b580      	push	{r7, lr}
 802705a:	b082      	sub	sp, #8
 802705c:	af00      	add	r7, sp, #0
 802705e:	6078      	str	r0, [r7, #4]
 8027060:	460b      	mov	r3, r1
 8027062:	70fb      	strb	r3, [r7, #3]
#if (osCMSIS < 0x20000U)
  osSemaphoreDef(SEM);
  *sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
  *sem = osSemaphoreNew(UINT16_MAX, count, NULL);
 8027064:	78fb      	ldrb	r3, [r7, #3]
 8027066:	2200      	movs	r2, #0
 8027068:	4619      	mov	r1, r3
 802706a:	f64f 70ff 	movw	r0, #65535	@ 0xffff
 802706e:	f7ea fb90 	bl	8011792 <osSemaphoreNew>
 8027072:	4602      	mov	r2, r0
 8027074:	687b      	ldr	r3, [r7, #4]
 8027076:	601a      	str	r2, [r3, #0]
#endif

  if(*sem == NULL)
 8027078:	687b      	ldr	r3, [r7, #4]
 802707a:	681b      	ldr	r3, [r3, #0]
 802707c:	2b00      	cmp	r3, #0
 802707e:	d102      	bne.n	8027086 <sys_sem_new+0x2e>
  {
#if SYS_STATS
    ++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8027080:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027084:	e009      	b.n	802709a <sys_sem_new+0x42>
  }

  if(count == 0)	// Means it can't be taken
 8027086:	78fb      	ldrb	r3, [r7, #3]
 8027088:	2b00      	cmp	r3, #0
 802708a:	d105      	bne.n	8027098 <sys_sem_new+0x40>
  {
#if (osCMSIS < 0x20000U)
    osSemaphoreWait(*sem, 0);
#else
    osSemaphoreAcquire(*sem, 0);
 802708c:	687b      	ldr	r3, [r7, #4]
 802708e:	681b      	ldr	r3, [r3, #0]
 8027090:	2100      	movs	r1, #0
 8027092:	4618      	mov	r0, r3
 8027094:	f7ea fc06 	bl	80118a4 <osSemaphoreAcquire>
  if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
    lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
  }
#endif /* SYS_STATS */

  return ERR_OK;
 8027098:	2300      	movs	r3, #0
}
 802709a:	4618      	mov	r0, r3
 802709c:	3708      	adds	r7, #8
 802709e:	46bd      	mov	sp, r7
 80270a0:	bd80      	pop	{r7, pc}

080270a2 <sys_arch_sem_wait>:

  Notice that lwIP implements a function with a similar name,
  sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
 80270a2:	b580      	push	{r7, lr}
 80270a4:	b084      	sub	sp, #16
 80270a6:	af00      	add	r7, sp, #0
 80270a8:	6078      	str	r0, [r7, #4]
 80270aa:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  uint32_t starttime = osKernelSysTick();
#else
  uint32_t starttime = osKernelGetTickCount();
 80270ac:	f7ea f89e 	bl	80111ec <osKernelGetTickCount>
 80270b0:	60f8      	str	r0, [r7, #12]
#endif
  if(timeout != 0)
 80270b2:	683b      	ldr	r3, [r7, #0]
 80270b4:	2b00      	cmp	r3, #0
 80270b6:	d011      	beq.n	80270dc <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
    if(osSemaphoreWait (*sem, timeout) == osOK)
    {
      return (osKernelSysTick() - starttime);
#else
    if(osSemaphoreAcquire(*sem, timeout) == osOK)
 80270b8:	687b      	ldr	r3, [r7, #4]
 80270ba:	681b      	ldr	r3, [r3, #0]
 80270bc:	6839      	ldr	r1, [r7, #0]
 80270be:	4618      	mov	r0, r3
 80270c0:	f7ea fbf0 	bl	80118a4 <osSemaphoreAcquire>
 80270c4:	4603      	mov	r3, r0
 80270c6:	2b00      	cmp	r3, #0
 80270c8:	d105      	bne.n	80270d6 <sys_arch_sem_wait+0x34>
    {
        return (osKernelGetTickCount() - starttime);
 80270ca:	f7ea f88f 	bl	80111ec <osKernelGetTickCount>
 80270ce:	4602      	mov	r2, r0
 80270d0:	68fb      	ldr	r3, [r7, #12]
 80270d2:	1ad3      	subs	r3, r2, r3
 80270d4:	e012      	b.n	80270fc <sys_arch_sem_wait+0x5a>
#endif
    }
    else
    {
      return SYS_ARCH_TIMEOUT;
 80270d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80270da:	e00f      	b.n	80270fc <sys_arch_sem_wait+0x5a>
  {
#if (osCMSIS < 0x20000U)
    while(osSemaphoreWait (*sem, osWaitForever) != osOK);
    return (osKernelSysTick() - starttime);
#else
    while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
 80270dc:	bf00      	nop
 80270de:	687b      	ldr	r3, [r7, #4]
 80270e0:	681b      	ldr	r3, [r3, #0]
 80270e2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80270e6:	4618      	mov	r0, r3
 80270e8:	f7ea fbdc 	bl	80118a4 <osSemaphoreAcquire>
 80270ec:	4603      	mov	r3, r0
 80270ee:	2b00      	cmp	r3, #0
 80270f0:	d1f5      	bne.n	80270de <sys_arch_sem_wait+0x3c>
    return (osKernelGetTickCount() - starttime);
 80270f2:	f7ea f87b 	bl	80111ec <osKernelGetTickCount>
 80270f6:	4602      	mov	r2, r0
 80270f8:	68fb      	ldr	r3, [r7, #12]
 80270fa:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 80270fc:	4618      	mov	r0, r3
 80270fe:	3710      	adds	r7, #16
 8027100:	46bd      	mov	sp, r7
 8027102:	bd80      	pop	{r7, pc}

08027104 <sys_sem_signal>:

/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
 8027104:	b580      	push	{r7, lr}
 8027106:	b082      	sub	sp, #8
 8027108:	af00      	add	r7, sp, #0
 802710a:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(*sem);
 802710c:	687b      	ldr	r3, [r7, #4]
 802710e:	681b      	ldr	r3, [r3, #0]
 8027110:	4618      	mov	r0, r3
 8027112:	f7ea fc19 	bl	8011948 <osSemaphoreRelease>
}
 8027116:	bf00      	nop
 8027118:	3708      	adds	r7, #8
 802711a:	46bd      	mov	sp, r7
 802711c:	bd80      	pop	{r7, pc}

0802711e <sys_sem_free>:

/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
 802711e:	b580      	push	{r7, lr}
 8027120:	b082      	sub	sp, #8
 8027122:	af00      	add	r7, sp, #0
 8027124:	6078      	str	r0, [r7, #4]
#if SYS_STATS
  --lwip_stats.sys.sem.used;
#endif /* SYS_STATS */

  osSemaphoreDelete(*sem);
 8027126:	687b      	ldr	r3, [r7, #4]
 8027128:	681b      	ldr	r3, [r3, #0]
 802712a:	4618      	mov	r0, r3
 802712c:	f7ea fc50 	bl	80119d0 <osSemaphoreDelete>
}
 8027130:	bf00      	nop
 8027132:	3708      	adds	r7, #8
 8027134:	46bd      	mov	sp, r7
 8027136:	bd80      	pop	{r7, pc}

08027138 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
 8027138:	b480      	push	{r7}
 802713a:	b083      	sub	sp, #12
 802713c:	af00      	add	r7, sp, #0
 802713e:	6078      	str	r0, [r7, #4]
  if (*sem == SYS_SEM_NULL)
 8027140:	687b      	ldr	r3, [r7, #4]
 8027142:	681b      	ldr	r3, [r3, #0]
 8027144:	2b00      	cmp	r3, #0
 8027146:	d101      	bne.n	802714c <sys_sem_valid+0x14>
    return 0;
 8027148:	2300      	movs	r3, #0
 802714a:	e000      	b.n	802714e <sys_sem_valid+0x16>
  else
    return 1;
 802714c:	2301      	movs	r3, #1
}
 802714e:	4618      	mov	r0, r3
 8027150:	370c      	adds	r7, #12
 8027152:	46bd      	mov	sp, r7
 8027154:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027158:	4770      	bx	lr

0802715a <sys_sem_set_invalid>:

/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
 802715a:	b480      	push	{r7}
 802715c:	b083      	sub	sp, #12
 802715e:	af00      	add	r7, sp, #0
 8027160:	6078      	str	r0, [r7, #4]
  *sem = SYS_SEM_NULL;
 8027162:	687b      	ldr	r3, [r7, #4]
 8027164:	2200      	movs	r2, #0
 8027166:	601a      	str	r2, [r3, #0]
}
 8027168:	bf00      	nop
 802716a:	370c      	adds	r7, #12
 802716c:	46bd      	mov	sp, r7
 802716e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027172:	4770      	bx	lr

08027174 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
 8027174:	b580      	push	{r7, lr}
 8027176:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
  lwip_sys_mutex = osMutexNew(NULL);
 8027178:	2000      	movs	r0, #0
 802717a:	f7ea f9fc 	bl	8011576 <osMutexNew>
 802717e:	4603      	mov	r3, r0
 8027180:	4a01      	ldr	r2, [pc, #4]	@ (8027188 <sys_init+0x14>)
 8027182:	6013      	str	r3, [r2, #0]
#endif
}
 8027184:	bf00      	nop
 8027186:	bd80      	pop	{r7, pc}
 8027188:	2402b10c 	.word	0x2402b10c

0802718c <sys_mutex_new>:
                                      /* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
 802718c:	b580      	push	{r7, lr}
 802718e:	b082      	sub	sp, #8
 8027190:	af00      	add	r7, sp, #0
 8027192:	6078      	str	r0, [r7, #4]

#if (osCMSIS < 0x20000U)
  osMutexDef(MUTEX);
  *mutex = osMutexCreate(osMutex(MUTEX));
#else
  *mutex = osMutexNew(NULL);
 8027194:	2000      	movs	r0, #0
 8027196:	f7ea f9ee 	bl	8011576 <osMutexNew>
 802719a:	4602      	mov	r2, r0
 802719c:	687b      	ldr	r3, [r7, #4]
 802719e:	601a      	str	r2, [r3, #0]
#endif

  if(*mutex == NULL)
 80271a0:	687b      	ldr	r3, [r7, #4]
 80271a2:	681b      	ldr	r3, [r3, #0]
 80271a4:	2b00      	cmp	r3, #0
 80271a6:	d102      	bne.n	80271ae <sys_mutex_new+0x22>
  {
#if SYS_STATS
    ++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 80271a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80271ac:	e000      	b.n	80271b0 <sys_mutex_new+0x24>
  ++lwip_stats.sys.mutex.used;
  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
  }
#endif /* SYS_STATS */
  return ERR_OK;
 80271ae:	2300      	movs	r3, #0
}
 80271b0:	4618      	mov	r0, r3
 80271b2:	3708      	adds	r7, #8
 80271b4:	46bd      	mov	sp, r7
 80271b6:	bd80      	pop	{r7, pc}

080271b8 <sys_mutex_lock>:
  osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
 80271b8:	b580      	push	{r7, lr}
 80271ba:	b082      	sub	sp, #8
 80271bc:	af00      	add	r7, sp, #0
 80271be:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  osMutexWait(*mutex, osWaitForever);
#else
  osMutexAcquire(*mutex, osWaitForever);
 80271c0:	687b      	ldr	r3, [r7, #4]
 80271c2:	681b      	ldr	r3, [r3, #0]
 80271c4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80271c8:	4618      	mov	r0, r3
 80271ca:	f7ea fa5a 	bl	8011682 <osMutexAcquire>
#endif
}
 80271ce:	bf00      	nop
 80271d0:	3708      	adds	r7, #8
 80271d2:	46bd      	mov	sp, r7
 80271d4:	bd80      	pop	{r7, pc}

080271d6 <sys_mutex_unlock>:

/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
 80271d6:	b580      	push	{r7, lr}
 80271d8:	b082      	sub	sp, #8
 80271da:	af00      	add	r7, sp, #0
 80271dc:	6078      	str	r0, [r7, #4]
  osMutexRelease(*mutex);
 80271de:	687b      	ldr	r3, [r7, #4]
 80271e0:	681b      	ldr	r3, [r3, #0]
 80271e2:	4618      	mov	r0, r3
 80271e4:	f7ea fa98 	bl	8011718 <osMutexRelease>
}
 80271e8:	bf00      	nop
 80271ea:	3708      	adds	r7, #8
 80271ec:	46bd      	mov	sp, r7
 80271ee:	bd80      	pop	{r7, pc}

080271f0 <sys_thread_new>:
  function "thread()". The "arg" argument will be passed as an argument to the
  thread() function. The id of the new thread is returned. Both the id and
  the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
 80271f0:	b580      	push	{r7, lr}
 80271f2:	b08e      	sub	sp, #56	@ 0x38
 80271f4:	af00      	add	r7, sp, #0
 80271f6:	60f8      	str	r0, [r7, #12]
 80271f8:	60b9      	str	r1, [r7, #8]
 80271fa:	607a      	str	r2, [r7, #4]
 80271fc:	603b      	str	r3, [r7, #0]
#if (osCMSIS < 0x20000U)
  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
  return osThreadCreate(&os_thread_def, arg);
#else
  const osThreadAttr_t attributes = {
 80271fe:	f107 0314 	add.w	r3, r7, #20
 8027202:	2224      	movs	r2, #36	@ 0x24
 8027204:	2100      	movs	r1, #0
 8027206:	4618      	mov	r0, r3
 8027208:	f003 fc3a 	bl	802aa80 <memset>
 802720c:	68fb      	ldr	r3, [r7, #12]
 802720e:	617b      	str	r3, [r7, #20]
 8027210:	683b      	ldr	r3, [r7, #0]
 8027212:	62bb      	str	r3, [r7, #40]	@ 0x28
 8027214:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8027216:	62fb      	str	r3, [r7, #44]	@ 0x2c
                        .name = name,
                        .stack_size = stacksize,
                        .priority = (osPriority_t)prio,
                      };
  return osThreadNew(thread, arg, &attributes);
 8027218:	f107 0314 	add.w	r3, r7, #20
 802721c:	461a      	mov	r2, r3
 802721e:	6879      	ldr	r1, [r7, #4]
 8027220:	68b8      	ldr	r0, [r7, #8]
 8027222:	f7e9 fff8 	bl	8011216 <osThreadNew>
 8027226:	4603      	mov	r3, r0
#endif
}
 8027228:	4618      	mov	r0, r3
 802722a:	3738      	adds	r7, #56	@ 0x38
 802722c:	46bd      	mov	sp, r7
 802722e:	bd80      	pop	{r7, pc}

08027230 <sys_arch_protect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
sys_prot_t sys_arch_protect(void)
{
 8027230:	b580      	push	{r7, lr}
 8027232:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  osMutexWait(lwip_sys_mutex, osWaitForever);
#else
  osMutexAcquire(lwip_sys_mutex, osWaitForever);
 8027234:	4b04      	ldr	r3, [pc, #16]	@ (8027248 <sys_arch_protect+0x18>)
 8027236:	681b      	ldr	r3, [r3, #0]
 8027238:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802723c:	4618      	mov	r0, r3
 802723e:	f7ea fa20 	bl	8011682 <osMutexAcquire>
#endif
  return (sys_prot_t)1;
 8027242:	2301      	movs	r3, #1
}
 8027244:	4618      	mov	r0, r3
 8027246:	bd80      	pop	{r7, pc}
 8027248:	2402b10c 	.word	0x2402b10c

0802724c <sys_arch_unprotect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
 802724c:	b580      	push	{r7, lr}
 802724e:	b082      	sub	sp, #8
 8027250:	af00      	add	r7, sp, #0
 8027252:	6078      	str	r0, [r7, #4]
  ( void ) pval;
  osMutexRelease(lwip_sys_mutex);
 8027254:	4b04      	ldr	r3, [pc, #16]	@ (8027268 <sys_arch_unprotect+0x1c>)
 8027256:	681b      	ldr	r3, [r3, #0]
 8027258:	4618      	mov	r0, r3
 802725a:	f7ea fa5d 	bl	8011718 <osMutexRelease>
}
 802725e:	bf00      	nop
 8027260:	3708      	adds	r7, #8
 8027262:	46bd      	mov	sp, r7
 8027264:	bd80      	pop	{r7, pc}
 8027266:	bf00      	nop
 8027268:	2402b10c 	.word	0x2402b10c

0802726c <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"

osMutexId_t mqttMutex;

static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
 802726c:	b480      	push	{r7}
 802726e:	b085      	sub	sp, #20
 8027270:	af00      	add	r7, sp, #0
 8027272:	60f8      	str	r0, [r7, #12]
 8027274:	60b9      	str	r1, [r7, #8]
 8027276:	607a      	str	r2, [r7, #4]
    md->topicName = aTopicName;
 8027278:	68fb      	ldr	r3, [r7, #12]
 802727a:	68ba      	ldr	r2, [r7, #8]
 802727c:	605a      	str	r2, [r3, #4]
    md->message = aMessage;
 802727e:	68fb      	ldr	r3, [r7, #12]
 8027280:	687a      	ldr	r2, [r7, #4]
 8027282:	601a      	str	r2, [r3, #0]
}
 8027284:	bf00      	nop
 8027286:	3714      	adds	r7, #20
 8027288:	46bd      	mov	sp, r7
 802728a:	f85d 7b04 	ldr.w	r7, [sp], #4
 802728e:	4770      	bx	lr

08027290 <getNextPacketId>:


static int getNextPacketId(MQTTClient *c) {
 8027290:	b480      	push	{r7}
 8027292:	b083      	sub	sp, #12
 8027294:	af00      	add	r7, sp, #0
 8027296:	6078      	str	r0, [r7, #4]
    return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
 8027298:	687b      	ldr	r3, [r7, #4]
 802729a:	681b      	ldr	r3, [r3, #0]
 802729c:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 80272a0:	4293      	cmp	r3, r2
 80272a2:	d003      	beq.n	80272ac <getNextPacketId+0x1c>
 80272a4:	687b      	ldr	r3, [r7, #4]
 80272a6:	681b      	ldr	r3, [r3, #0]
 80272a8:	3301      	adds	r3, #1
 80272aa:	e000      	b.n	80272ae <getNextPacketId+0x1e>
 80272ac:	2301      	movs	r3, #1
 80272ae:	687a      	ldr	r2, [r7, #4]
 80272b0:	6013      	str	r3, [r2, #0]
 80272b2:	687b      	ldr	r3, [r7, #4]
 80272b4:	681b      	ldr	r3, [r3, #0]
}
 80272b6:	4618      	mov	r0, r3
 80272b8:	370c      	adds	r7, #12
 80272ba:	46bd      	mov	sp, r7
 80272bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80272c0:	4770      	bx	lr

080272c2 <sendPacket>:


static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
 80272c2:	b5f0      	push	{r4, r5, r6, r7, lr}
 80272c4:	b087      	sub	sp, #28
 80272c6:	af00      	add	r7, sp, #0
 80272c8:	60f8      	str	r0, [r7, #12]
 80272ca:	60b9      	str	r1, [r7, #8]
 80272cc:	607a      	str	r2, [r7, #4]
    int rc = FAILURE,
 80272ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80272d2:	617b      	str	r3, [r7, #20]
        sent = 0;
 80272d4:	2300      	movs	r3, #0
 80272d6:	613b      	str	r3, [r7, #16]

    while (sent < length && !TimerIsExpired(timer))
 80272d8:	e018      	b.n	802730c <sendPacket+0x4a>
    {
        rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
 80272da:	68fb      	ldr	r3, [r7, #12]
 80272dc:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80272de:	689c      	ldr	r4, [r3, #8]
 80272e0:	68fb      	ldr	r3, [r7, #12]
 80272e2:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 80272e4:	68fb      	ldr	r3, [r7, #12]
 80272e6:	691a      	ldr	r2, [r3, #16]
 80272e8:	693b      	ldr	r3, [r7, #16]
 80272ea:	18d6      	adds	r6, r2, r3
 80272ec:	6878      	ldr	r0, [r7, #4]
 80272ee:	f000 fed3 	bl	8028098 <TimerLeftMS>
 80272f2:	4603      	mov	r3, r0
 80272f4:	68ba      	ldr	r2, [r7, #8]
 80272f6:	4631      	mov	r1, r6
 80272f8:	4628      	mov	r0, r5
 80272fa:	47a0      	blx	r4
 80272fc:	6178      	str	r0, [r7, #20]
        if (rc < 0)  // there was an error writing the data
 80272fe:	697b      	ldr	r3, [r7, #20]
 8027300:	2b00      	cmp	r3, #0
 8027302:	db0e      	blt.n	8027322 <sendPacket+0x60>
            break;
        sent += rc;
 8027304:	693a      	ldr	r2, [r7, #16]
 8027306:	697b      	ldr	r3, [r7, #20]
 8027308:	4413      	add	r3, r2
 802730a:	613b      	str	r3, [r7, #16]
    while (sent < length && !TimerIsExpired(timer))
 802730c:	693a      	ldr	r2, [r7, #16]
 802730e:	68bb      	ldr	r3, [r7, #8]
 8027310:	429a      	cmp	r2, r3
 8027312:	da07      	bge.n	8027324 <sendPacket+0x62>
 8027314:	6878      	ldr	r0, [r7, #4]
 8027316:	f000 fe7d 	bl	8028014 <TimerIsExpired>
 802731a:	4603      	mov	r3, r0
 802731c:	2b00      	cmp	r3, #0
 802731e:	d0dc      	beq.n	80272da <sendPacket+0x18>
 8027320:	e000      	b.n	8027324 <sendPacket+0x62>
            break;
 8027322:	bf00      	nop
    }
    if (sent == length)
 8027324:	693a      	ldr	r2, [r7, #16]
 8027326:	68bb      	ldr	r3, [r7, #8]
 8027328:	429a      	cmp	r2, r3
 802732a:	d10b      	bne.n	8027344 <sendPacket+0x82>
    {
        TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
 802732c:	68fb      	ldr	r3, [r7, #12]
 802732e:	f103 0258 	add.w	r2, r3, #88	@ 0x58
 8027332:	68fb      	ldr	r3, [r7, #12]
 8027334:	699b      	ldr	r3, [r3, #24]
 8027336:	4619      	mov	r1, r3
 8027338:	4610      	mov	r0, r2
 802733a:	f000 fe95 	bl	8028068 <TimerCountdown>
        rc = MQTT_SUCCESS;
 802733e:	2300      	movs	r3, #0
 8027340:	617b      	str	r3, [r7, #20]
 8027342:	e002      	b.n	802734a <sendPacket+0x88>
    }
    else
        rc = FAILURE;
 8027344:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027348:	617b      	str	r3, [r7, #20]
    return rc;
 802734a:	697b      	ldr	r3, [r7, #20]
}
 802734c:	4618      	mov	r0, r3
 802734e:	371c      	adds	r7, #28
 8027350:	46bd      	mov	sp, r7
 8027352:	bdf0      	pop	{r4, r5, r6, r7, pc}

08027354 <MQTTClientInit>:


void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
		unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
 8027354:	b580      	push	{r7, lr}
 8027356:	b086      	sub	sp, #24
 8027358:	af00      	add	r7, sp, #0
 802735a:	60f8      	str	r0, [r7, #12]
 802735c:	60b9      	str	r1, [r7, #8]
 802735e:	607a      	str	r2, [r7, #4]
 8027360:	603b      	str	r3, [r7, #0]
    int i;
    c->ipstack = network;
 8027362:	68fb      	ldr	r3, [r7, #12]
 8027364:	68ba      	ldr	r2, [r7, #8]
 8027366:	655a      	str	r2, [r3, #84]	@ 0x54

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027368:	2300      	movs	r3, #0
 802736a:	617b      	str	r3, [r7, #20]
 802736c:	e008      	b.n	8027380 <MQTTClientInit+0x2c>
        c->messageHandlers[i].topicFilter = 0;
 802736e:	68fb      	ldr	r3, [r7, #12]
 8027370:	697a      	ldr	r2, [r7, #20]
 8027372:	3205      	adds	r2, #5
 8027374:	2100      	movs	r1, #0
 8027376:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802737a:	697b      	ldr	r3, [r7, #20]
 802737c:	3301      	adds	r3, #1
 802737e:	617b      	str	r3, [r7, #20]
 8027380:	697b      	ldr	r3, [r7, #20]
 8027382:	2b04      	cmp	r3, #4
 8027384:	ddf3      	ble.n	802736e <MQTTClientInit+0x1a>
    c->command_timeout_ms = command_timeout_ms;
 8027386:	68fb      	ldr	r3, [r7, #12]
 8027388:	687a      	ldr	r2, [r7, #4]
 802738a:	605a      	str	r2, [r3, #4]
    c->buf = sendbuf;
 802738c:	68fb      	ldr	r3, [r7, #12]
 802738e:	683a      	ldr	r2, [r7, #0]
 8027390:	611a      	str	r2, [r3, #16]
    c->buf_size = sendbuf_size;
 8027392:	68fb      	ldr	r3, [r7, #12]
 8027394:	6a3a      	ldr	r2, [r7, #32]
 8027396:	609a      	str	r2, [r3, #8]
    c->readbuf = readbuf;
 8027398:	68fb      	ldr	r3, [r7, #12]
 802739a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802739c:	615a      	str	r2, [r3, #20]
    c->readbuf_size = readbuf_size;
 802739e:	68fb      	ldr	r3, [r7, #12]
 80273a0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80273a2:	60da      	str	r2, [r3, #12]
    c->isconnected = 0;
 80273a4:	68fb      	ldr	r3, [r7, #12]
 80273a6:	2200      	movs	r2, #0
 80273a8:	621a      	str	r2, [r3, #32]
    c->cleansession = 0;
 80273aa:	68fb      	ldr	r3, [r7, #12]
 80273ac:	2200      	movs	r2, #0
 80273ae:	625a      	str	r2, [r3, #36]	@ 0x24
    c->ping_outstanding = 0;
 80273b0:	68fb      	ldr	r3, [r7, #12]
 80273b2:	2200      	movs	r2, #0
 80273b4:	771a      	strb	r2, [r3, #28]
    c->defaultMessageHandler = NULL;
 80273b6:	68fb      	ldr	r3, [r7, #12]
 80273b8:	2200      	movs	r2, #0
 80273ba:	651a      	str	r2, [r3, #80]	@ 0x50
	  c->next_packetid = 1;
 80273bc:	68fb      	ldr	r3, [r7, #12]
 80273be:	2201      	movs	r2, #1
 80273c0:	601a      	str	r2, [r3, #0]
    TimerInit(&c->last_sent);
 80273c2:	68fb      	ldr	r3, [r7, #12]
 80273c4:	3358      	adds	r3, #88	@ 0x58
 80273c6:	4618      	mov	r0, r3
 80273c8:	f000 fe7c 	bl	80280c4 <TimerInit>
    TimerInit(&c->last_received);
 80273cc:	68fb      	ldr	r3, [r7, #12]
 80273ce:	3360      	adds	r3, #96	@ 0x60
 80273d0:	4618      	mov	r0, r3
 80273d2:	f000 fe77 	bl	80280c4 <TimerInit>
#if defined(MQTT_TASK)
	  MutexInit(&c->mutex);
#endif
	  if(mqttMutex == NULL)
 80273d6:	4b07      	ldr	r3, [pc, #28]	@ (80273f4 <MQTTClientInit+0xa0>)
 80273d8:	681b      	ldr	r3, [r3, #0]
 80273da:	2b00      	cmp	r3, #0
 80273dc:	d105      	bne.n	80273ea <MQTTClientInit+0x96>
	  {
//		  osMutexDef(mqttMutex);
//		  mqttMutex = osMutexNew(NULL);
		  c->mutex = osMutexNew(NULL);
 80273de:	2000      	movs	r0, #0
 80273e0:	f7ea f8c9 	bl	8011576 <osMutexNew>
 80273e4:	4602      	mov	r2, r0
 80273e6:	68fb      	ldr	r3, [r7, #12]
 80273e8:	669a      	str	r2, [r3, #104]	@ 0x68

	  }
}
 80273ea:	bf00      	nop
 80273ec:	3718      	adds	r7, #24
 80273ee:	46bd      	mov	sp, r7
 80273f0:	bd80      	pop	{r7, pc}
 80273f2:	bf00      	nop
 80273f4:	2402b110 	.word	0x2402b110

080273f8 <decodePacket>:


static int decodePacket(MQTTClient* c, int* value, int timeout)
{
 80273f8:	b590      	push	{r4, r7, lr}
 80273fa:	b08b      	sub	sp, #44	@ 0x2c
 80273fc:	af00      	add	r7, sp, #0
 80273fe:	60f8      	str	r0, [r7, #12]
 8027400:	60b9      	str	r1, [r7, #8]
 8027402:	607a      	str	r2, [r7, #4]
    unsigned char i;
    int multiplier = 1;
 8027404:	2301      	movs	r3, #1
 8027406:	627b      	str	r3, [r7, #36]	@ 0x24
    int len = 0;
 8027408:	2300      	movs	r3, #0
 802740a:	623b      	str	r3, [r7, #32]
    const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
 802740c:	2304      	movs	r3, #4
 802740e:	61fb      	str	r3, [r7, #28]

    *value = 0;
 8027410:	68bb      	ldr	r3, [r7, #8]
 8027412:	2200      	movs	r2, #0
 8027414:	601a      	str	r2, [r3, #0]
    do
    {
        int rc = MQTTPACKET_READ_ERROR;
 8027416:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802741a:	61bb      	str	r3, [r7, #24]

        if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 802741c:	6a3b      	ldr	r3, [r7, #32]
 802741e:	3301      	adds	r3, #1
 8027420:	623b      	str	r3, [r7, #32]
 8027422:	6a3a      	ldr	r2, [r7, #32]
 8027424:	69fb      	ldr	r3, [r7, #28]
 8027426:	429a      	cmp	r2, r3
 8027428:	dd03      	ble.n	8027432 <decodePacket+0x3a>
        {
            rc = MQTTPACKET_READ_ERROR; /* bad data */
 802742a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802742e:	61bb      	str	r3, [r7, #24]
            goto exit;
 8027430:	e021      	b.n	8027476 <decodePacket+0x7e>
        }
        rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
 8027432:	68fb      	ldr	r3, [r7, #12]
 8027434:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027436:	685c      	ldr	r4, [r3, #4]
 8027438:	68fb      	ldr	r3, [r7, #12]
 802743a:	6d58      	ldr	r0, [r3, #84]	@ 0x54
 802743c:	f107 0117 	add.w	r1, r7, #23
 8027440:	687b      	ldr	r3, [r7, #4]
 8027442:	2201      	movs	r2, #1
 8027444:	47a0      	blx	r4
 8027446:	61b8      	str	r0, [r7, #24]
        if (rc != 1)
 8027448:	69bb      	ldr	r3, [r7, #24]
 802744a:	2b01      	cmp	r3, #1
 802744c:	d112      	bne.n	8027474 <decodePacket+0x7c>
            goto exit;
        *value += (i & 127) * multiplier;
 802744e:	68bb      	ldr	r3, [r7, #8]
 8027450:	681a      	ldr	r2, [r3, #0]
 8027452:	7dfb      	ldrb	r3, [r7, #23]
 8027454:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8027458:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802745a:	fb01 f303 	mul.w	r3, r1, r3
 802745e:	441a      	add	r2, r3
 8027460:	68bb      	ldr	r3, [r7, #8]
 8027462:	601a      	str	r2, [r3, #0]
        multiplier *= 128;
 8027464:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8027466:	01db      	lsls	r3, r3, #7
 8027468:	627b      	str	r3, [r7, #36]	@ 0x24
    } while ((i & 128) != 0);
 802746a:	7dfb      	ldrb	r3, [r7, #23]
 802746c:	b25b      	sxtb	r3, r3
 802746e:	2b00      	cmp	r3, #0
 8027470:	dbd1      	blt.n	8027416 <decodePacket+0x1e>
exit:
 8027472:	e000      	b.n	8027476 <decodePacket+0x7e>
            goto exit;
 8027474:	bf00      	nop
    return len;
 8027476:	6a3b      	ldr	r3, [r7, #32]
}
 8027478:	4618      	mov	r0, r3
 802747a:	372c      	adds	r7, #44	@ 0x2c
 802747c:	46bd      	mov	sp, r7
 802747e:	bd90      	pop	{r4, r7, pc}

08027480 <readPacket>:


static int readPacket(MQTTClient* c, Timer* timer)
{
 8027480:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027482:	b089      	sub	sp, #36	@ 0x24
 8027484:	af00      	add	r7, sp, #0
 8027486:	60f8      	str	r0, [r7, #12]
 8027488:	60b9      	str	r1, [r7, #8]
    MQTTHeader header = {0};
 802748a:	2300      	movs	r3, #0
 802748c:	617b      	str	r3, [r7, #20]
    int len = 0;
 802748e:	2300      	movs	r3, #0
 8027490:	61bb      	str	r3, [r7, #24]
    int rem_len = 0;
 8027492:	2300      	movs	r3, #0
 8027494:	613b      	str	r3, [r7, #16]

    /* 1. read the header byte.  This has the packet type in it */
    int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
 8027496:	68fb      	ldr	r3, [r7, #12]
 8027498:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802749a:	685c      	ldr	r4, [r3, #4]
 802749c:	68fb      	ldr	r3, [r7, #12]
 802749e:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 80274a0:	68fb      	ldr	r3, [r7, #12]
 80274a2:	695e      	ldr	r6, [r3, #20]
 80274a4:	68b8      	ldr	r0, [r7, #8]
 80274a6:	f000 fdf7 	bl	8028098 <TimerLeftMS>
 80274aa:	4603      	mov	r3, r0
 80274ac:	2201      	movs	r2, #1
 80274ae:	4631      	mov	r1, r6
 80274b0:	4628      	mov	r0, r5
 80274b2:	47a0      	blx	r4
 80274b4:	61f8      	str	r0, [r7, #28]
    if (rc != 1)
 80274b6:	69fb      	ldr	r3, [r7, #28]
 80274b8:	2b01      	cmp	r3, #1
 80274ba:	d15d      	bne.n	8027578 <readPacket+0xf8>
        goto exit;

    len = 1;
 80274bc:	2301      	movs	r3, #1
 80274be:	61bb      	str	r3, [r7, #24]
    /* 2. read the remaining length.  This is variable in itself */
    decodePacket(c, &rem_len, TimerLeftMS(timer));
 80274c0:	68b8      	ldr	r0, [r7, #8]
 80274c2:	f000 fde9 	bl	8028098 <TimerLeftMS>
 80274c6:	4602      	mov	r2, r0
 80274c8:	f107 0310 	add.w	r3, r7, #16
 80274cc:	4619      	mov	r1, r3
 80274ce:	68f8      	ldr	r0, [r7, #12]
 80274d0:	f7ff ff92 	bl	80273f8 <decodePacket>
    len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
 80274d4:	68fb      	ldr	r3, [r7, #12]
 80274d6:	695b      	ldr	r3, [r3, #20]
 80274d8:	3301      	adds	r3, #1
 80274da:	693a      	ldr	r2, [r7, #16]
 80274dc:	4611      	mov	r1, r2
 80274de:	4618      	mov	r0, r3
 80274e0:	f001 f959 	bl	8028796 <MQTTPacket_encode>
 80274e4:	4602      	mov	r2, r0
 80274e6:	69bb      	ldr	r3, [r7, #24]
 80274e8:	4413      	add	r3, r2
 80274ea:	61bb      	str	r3, [r7, #24]

    if (rem_len > (c->readbuf_size - len))
 80274ec:	68fb      	ldr	r3, [r7, #12]
 80274ee:	68da      	ldr	r2, [r3, #12]
 80274f0:	69bb      	ldr	r3, [r7, #24]
 80274f2:	1ad3      	subs	r3, r2, r3
 80274f4:	693a      	ldr	r2, [r7, #16]
 80274f6:	4293      	cmp	r3, r2
 80274f8:	d203      	bcs.n	8027502 <readPacket+0x82>
    {
        rc = BUFFER_OVERFLOW;
 80274fa:	f06f 0301 	mvn.w	r3, #1
 80274fe:	61fb      	str	r3, [r7, #28]
        goto exit;
 8027500:	e03d      	b.n	802757e <readPacket+0xfe>
    }

    /* 3. read the rest of the buffer using a callback to supply the rest of the data */
    if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
 8027502:	693b      	ldr	r3, [r7, #16]
 8027504:	2b00      	cmp	r3, #0
 8027506:	dd20      	ble.n	802754a <readPacket+0xca>
 8027508:	68fb      	ldr	r3, [r7, #12]
 802750a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802750c:	685c      	ldr	r4, [r3, #4]
 802750e:	68fb      	ldr	r3, [r7, #12]
 8027510:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8027512:	68fb      	ldr	r3, [r7, #12]
 8027514:	695a      	ldr	r2, [r3, #20]
 8027516:	69bb      	ldr	r3, [r7, #24]
 8027518:	18d6      	adds	r6, r2, r3
 802751a:	693b      	ldr	r3, [r7, #16]
 802751c:	607b      	str	r3, [r7, #4]
 802751e:	68b8      	ldr	r0, [r7, #8]
 8027520:	f000 fdba 	bl	8028098 <TimerLeftMS>
 8027524:	4603      	mov	r3, r0
 8027526:	687a      	ldr	r2, [r7, #4]
 8027528:	4631      	mov	r1, r6
 802752a:	4628      	mov	r0, r5
 802752c:	47a0      	blx	r4
 802752e:	4602      	mov	r2, r0
 8027530:	693b      	ldr	r3, [r7, #16]
 8027532:	429a      	cmp	r2, r3
 8027534:	bf14      	ite	ne
 8027536:	2301      	movne	r3, #1
 8027538:	2300      	moveq	r3, #0
 802753a:	b2db      	uxtb	r3, r3
 802753c:	61fb      	str	r3, [r7, #28]
 802753e:	69fb      	ldr	r3, [r7, #28]
 8027540:	2b00      	cmp	r3, #0
 8027542:	d002      	beq.n	802754a <readPacket+0xca>
        rc = 0;
 8027544:	2300      	movs	r3, #0
 8027546:	61fb      	str	r3, [r7, #28]
        goto exit;
 8027548:	e019      	b.n	802757e <readPacket+0xfe>
    }

    header.byte = c->readbuf[0];
 802754a:	68fb      	ldr	r3, [r7, #12]
 802754c:	695b      	ldr	r3, [r3, #20]
 802754e:	781b      	ldrb	r3, [r3, #0]
 8027550:	753b      	strb	r3, [r7, #20]
    rc = header.bits.type;
 8027552:	7d3b      	ldrb	r3, [r7, #20]
 8027554:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8027558:	b2db      	uxtb	r3, r3
 802755a:	61fb      	str	r3, [r7, #28]
    if (c->keepAliveInterval > 0)
 802755c:	68fb      	ldr	r3, [r7, #12]
 802755e:	699b      	ldr	r3, [r3, #24]
 8027560:	2b00      	cmp	r3, #0
 8027562:	d00b      	beq.n	802757c <readPacket+0xfc>
        TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
 8027564:	68fb      	ldr	r3, [r7, #12]
 8027566:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 802756a:	68fb      	ldr	r3, [r7, #12]
 802756c:	699b      	ldr	r3, [r3, #24]
 802756e:	4619      	mov	r1, r3
 8027570:	4610      	mov	r0, r2
 8027572:	f000 fd79 	bl	8028068 <TimerCountdown>
 8027576:	e002      	b.n	802757e <readPacket+0xfe>
        goto exit;
 8027578:	bf00      	nop
 802757a:	e000      	b.n	802757e <readPacket+0xfe>
exit:
 802757c:	bf00      	nop
    return rc;
 802757e:	69fb      	ldr	r3, [r7, #28]
}
 8027580:	4618      	mov	r0, r3
 8027582:	3724      	adds	r7, #36	@ 0x24
 8027584:	46bd      	mov	sp, r7
 8027586:	bdf0      	pop	{r4, r5, r6, r7, pc}

08027588 <isTopicMatched>:

// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
 8027588:	b480      	push	{r7}
 802758a:	b087      	sub	sp, #28
 802758c:	af00      	add	r7, sp, #0
 802758e:	6078      	str	r0, [r7, #4]
 8027590:	6039      	str	r1, [r7, #0]
    char* curf = topicFilter;
 8027592:	687b      	ldr	r3, [r7, #4]
 8027594:	617b      	str	r3, [r7, #20]
    char* curn = topicName->lenstring.data;
 8027596:	683b      	ldr	r3, [r7, #0]
 8027598:	689b      	ldr	r3, [r3, #8]
 802759a:	613b      	str	r3, [r7, #16]
    char* curn_end = curn + topicName->lenstring.len;
 802759c:	683b      	ldr	r3, [r7, #0]
 802759e:	685b      	ldr	r3, [r3, #4]
 80275a0:	461a      	mov	r2, r3
 80275a2:	693b      	ldr	r3, [r7, #16]
 80275a4:	4413      	add	r3, r2
 80275a6:	60bb      	str	r3, [r7, #8]

    while (*curf && curn < curn_end)
 80275a8:	e039      	b.n	802761e <isTopicMatched+0x96>
    {
        if (*curn == '/' && *curf != '/')
 80275aa:	693b      	ldr	r3, [r7, #16]
 80275ac:	781b      	ldrb	r3, [r3, #0]
 80275ae:	2b2f      	cmp	r3, #47	@ 0x2f
 80275b0:	d103      	bne.n	80275ba <isTopicMatched+0x32>
 80275b2:	697b      	ldr	r3, [r7, #20]
 80275b4:	781b      	ldrb	r3, [r3, #0]
 80275b6:	2b2f      	cmp	r3, #47	@ 0x2f
 80275b8:	d13a      	bne.n	8027630 <isTopicMatched+0xa8>
            break;
        if (*curf != '+' && *curf != '#' && *curf != *curn)
 80275ba:	697b      	ldr	r3, [r7, #20]
 80275bc:	781b      	ldrb	r3, [r3, #0]
 80275be:	2b2b      	cmp	r3, #43	@ 0x2b
 80275c0:	d009      	beq.n	80275d6 <isTopicMatched+0x4e>
 80275c2:	697b      	ldr	r3, [r7, #20]
 80275c4:	781b      	ldrb	r3, [r3, #0]
 80275c6:	2b23      	cmp	r3, #35	@ 0x23
 80275c8:	d005      	beq.n	80275d6 <isTopicMatched+0x4e>
 80275ca:	697b      	ldr	r3, [r7, #20]
 80275cc:	781a      	ldrb	r2, [r3, #0]
 80275ce:	693b      	ldr	r3, [r7, #16]
 80275d0:	781b      	ldrb	r3, [r3, #0]
 80275d2:	429a      	cmp	r2, r3
 80275d4:	d12e      	bne.n	8027634 <isTopicMatched+0xac>
            break;
        if (*curf == '+')
 80275d6:	697b      	ldr	r3, [r7, #20]
 80275d8:	781b      	ldrb	r3, [r3, #0]
 80275da:	2b2b      	cmp	r3, #43	@ 0x2b
 80275dc:	d112      	bne.n	8027604 <isTopicMatched+0x7c>
        {   // skip until we meet the next separator, or end of string
            char* nextpos = curn + 1;
 80275de:	693b      	ldr	r3, [r7, #16]
 80275e0:	3301      	adds	r3, #1
 80275e2:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 80275e4:	e005      	b.n	80275f2 <isTopicMatched+0x6a>
                nextpos = ++curn + 1;
 80275e6:	693b      	ldr	r3, [r7, #16]
 80275e8:	3301      	adds	r3, #1
 80275ea:	613b      	str	r3, [r7, #16]
 80275ec:	693b      	ldr	r3, [r7, #16]
 80275ee:	3301      	adds	r3, #1
 80275f0:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 80275f2:	68fa      	ldr	r2, [r7, #12]
 80275f4:	68bb      	ldr	r3, [r7, #8]
 80275f6:	429a      	cmp	r2, r3
 80275f8:	d20b      	bcs.n	8027612 <isTopicMatched+0x8a>
 80275fa:	68fb      	ldr	r3, [r7, #12]
 80275fc:	781b      	ldrb	r3, [r3, #0]
 80275fe:	2b2f      	cmp	r3, #47	@ 0x2f
 8027600:	d1f1      	bne.n	80275e6 <isTopicMatched+0x5e>
 8027602:	e006      	b.n	8027612 <isTopicMatched+0x8a>
        }
        else if (*curf == '#')
 8027604:	697b      	ldr	r3, [r7, #20]
 8027606:	781b      	ldrb	r3, [r3, #0]
 8027608:	2b23      	cmp	r3, #35	@ 0x23
 802760a:	d102      	bne.n	8027612 <isTopicMatched+0x8a>
            curn = curn_end - 1;    // skip until end of string
 802760c:	68bb      	ldr	r3, [r7, #8]
 802760e:	3b01      	subs	r3, #1
 8027610:	613b      	str	r3, [r7, #16]
        curf++;
 8027612:	697b      	ldr	r3, [r7, #20]
 8027614:	3301      	adds	r3, #1
 8027616:	617b      	str	r3, [r7, #20]
        curn++;
 8027618:	693b      	ldr	r3, [r7, #16]
 802761a:	3301      	adds	r3, #1
 802761c:	613b      	str	r3, [r7, #16]
    while (*curf && curn < curn_end)
 802761e:	697b      	ldr	r3, [r7, #20]
 8027620:	781b      	ldrb	r3, [r3, #0]
 8027622:	2b00      	cmp	r3, #0
 8027624:	d007      	beq.n	8027636 <isTopicMatched+0xae>
 8027626:	693a      	ldr	r2, [r7, #16]
 8027628:	68bb      	ldr	r3, [r7, #8]
 802762a:	429a      	cmp	r2, r3
 802762c:	d3bd      	bcc.n	80275aa <isTopicMatched+0x22>
 802762e:	e002      	b.n	8027636 <isTopicMatched+0xae>
            break;
 8027630:	bf00      	nop
 8027632:	e000      	b.n	8027636 <isTopicMatched+0xae>
            break;
 8027634:	bf00      	nop
    };

    return (curn == curn_end) && (*curf == '\0');
 8027636:	693a      	ldr	r2, [r7, #16]
 8027638:	68bb      	ldr	r3, [r7, #8]
 802763a:	429a      	cmp	r2, r3
 802763c:	d105      	bne.n	802764a <isTopicMatched+0xc2>
 802763e:	697b      	ldr	r3, [r7, #20]
 8027640:	781b      	ldrb	r3, [r3, #0]
 8027642:	2b00      	cmp	r3, #0
 8027644:	d101      	bne.n	802764a <isTopicMatched+0xc2>
 8027646:	2301      	movs	r3, #1
 8027648:	e000      	b.n	802764c <isTopicMatched+0xc4>
 802764a:	2300      	movs	r3, #0
 802764c:	b2db      	uxtb	r3, r3
}
 802764e:	4618      	mov	r0, r3
 8027650:	371c      	adds	r7, #28
 8027652:	46bd      	mov	sp, r7
 8027654:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027658:	4770      	bx	lr

0802765a <deliverMessage>:


int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
 802765a:	b580      	push	{r7, lr}
 802765c:	b08a      	sub	sp, #40	@ 0x28
 802765e:	af00      	add	r7, sp, #0
 8027660:	60f8      	str	r0, [r7, #12]
 8027662:	60b9      	str	r1, [r7, #8]
 8027664:	607a      	str	r2, [r7, #4]
    int i;
    int rc = FAILURE;
 8027666:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802766a:	623b      	str	r3, [r7, #32]

    // we have to find the right message handler - indexed by topic
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802766c:	2300      	movs	r3, #0
 802766e:	627b      	str	r3, [r7, #36]	@ 0x24
 8027670:	e03c      	b.n	80276ec <deliverMessage+0x92>
    {
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 8027672:	68fb      	ldr	r3, [r7, #12]
 8027674:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027676:	3205      	adds	r2, #5
 8027678:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802767c:	2b00      	cmp	r3, #0
 802767e:	d032      	beq.n	80276e6 <deliverMessage+0x8c>
 8027680:	68fb      	ldr	r3, [r7, #12]
 8027682:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027684:	3205      	adds	r2, #5
 8027686:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802768a:	4619      	mov	r1, r3
 802768c:	68b8      	ldr	r0, [r7, #8]
 802768e:	f001 fa51 	bl	8028b34 <MQTTPacket_equals>
 8027692:	4603      	mov	r3, r0
 8027694:	2b00      	cmp	r3, #0
 8027696:	d10b      	bne.n	80276b0 <deliverMessage+0x56>
                isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
 8027698:	68fb      	ldr	r3, [r7, #12]
 802769a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802769c:	3205      	adds	r2, #5
 802769e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80276a2:	68b9      	ldr	r1, [r7, #8]
 80276a4:	4618      	mov	r0, r3
 80276a6:	f7ff ff6f 	bl	8027588 <isTopicMatched>
 80276aa:	4603      	mov	r3, r0
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 80276ac:	2b00      	cmp	r3, #0
 80276ae:	d01a      	beq.n	80276e6 <deliverMessage+0x8c>
        {
            if (c->messageHandlers[i].fp != NULL)
 80276b0:	68fa      	ldr	r2, [r7, #12]
 80276b2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80276b4:	3305      	adds	r3, #5
 80276b6:	00db      	lsls	r3, r3, #3
 80276b8:	4413      	add	r3, r2
 80276ba:	685b      	ldr	r3, [r3, #4]
 80276bc:	2b00      	cmp	r3, #0
 80276be:	d012      	beq.n	80276e6 <deliverMessage+0x8c>
            {
                MessageData md;
                NewMessageData(&md, topicName, message);
 80276c0:	f107 0318 	add.w	r3, r7, #24
 80276c4:	687a      	ldr	r2, [r7, #4]
 80276c6:	68b9      	ldr	r1, [r7, #8]
 80276c8:	4618      	mov	r0, r3
 80276ca:	f7ff fdcf 	bl	802726c <NewMessageData>
                c->messageHandlers[i].fp(&md);
 80276ce:	68fa      	ldr	r2, [r7, #12]
 80276d0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80276d2:	3305      	adds	r3, #5
 80276d4:	00db      	lsls	r3, r3, #3
 80276d6:	4413      	add	r3, r2
 80276d8:	685b      	ldr	r3, [r3, #4]
 80276da:	f107 0218 	add.w	r2, r7, #24
 80276de:	4610      	mov	r0, r2
 80276e0:	4798      	blx	r3
                rc = MQTT_SUCCESS;
 80276e2:	2300      	movs	r3, #0
 80276e4:	623b      	str	r3, [r7, #32]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80276e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80276e8:	3301      	adds	r3, #1
 80276ea:	627b      	str	r3, [r7, #36]	@ 0x24
 80276ec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80276ee:	2b04      	cmp	r3, #4
 80276f0:	ddbf      	ble.n	8027672 <deliverMessage+0x18>
            }
        }
    }

    if (rc == FAILURE && c->defaultMessageHandler != NULL)
 80276f2:	6a3b      	ldr	r3, [r7, #32]
 80276f4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80276f8:	d112      	bne.n	8027720 <deliverMessage+0xc6>
 80276fa:	68fb      	ldr	r3, [r7, #12]
 80276fc:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80276fe:	2b00      	cmp	r3, #0
 8027700:	d00e      	beq.n	8027720 <deliverMessage+0xc6>
    {
        MessageData md;
        NewMessageData(&md, topicName, message);
 8027702:	f107 0310 	add.w	r3, r7, #16
 8027706:	687a      	ldr	r2, [r7, #4]
 8027708:	68b9      	ldr	r1, [r7, #8]
 802770a:	4618      	mov	r0, r3
 802770c:	f7ff fdae 	bl	802726c <NewMessageData>
        c->defaultMessageHandler(&md);
 8027710:	68fb      	ldr	r3, [r7, #12]
 8027712:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8027714:	f107 0210 	add.w	r2, r7, #16
 8027718:	4610      	mov	r0, r2
 802771a:	4798      	blx	r3
        rc = MQTT_SUCCESS;
 802771c:	2300      	movs	r3, #0
 802771e:	623b      	str	r3, [r7, #32]
    }

    return rc;
 8027720:	6a3b      	ldr	r3, [r7, #32]
}
 8027722:	4618      	mov	r0, r3
 8027724:	3728      	adds	r7, #40	@ 0x28
 8027726:	46bd      	mov	sp, r7
 8027728:	bd80      	pop	{r7, pc}

0802772a <keepalive>:


int keepalive(MQTTClient* c)
{
 802772a:	b580      	push	{r7, lr}
 802772c:	b086      	sub	sp, #24
 802772e:	af00      	add	r7, sp, #0
 8027730:	6078      	str	r0, [r7, #4]
    int rc = MQTT_SUCCESS;
 8027732:	2300      	movs	r3, #0
 8027734:	617b      	str	r3, [r7, #20]

    if (c->keepAliveInterval == 0)
 8027736:	687b      	ldr	r3, [r7, #4]
 8027738:	699b      	ldr	r3, [r3, #24]
 802773a:	2b00      	cmp	r3, #0
 802773c:	d03e      	beq.n	80277bc <keepalive+0x92>
        goto exit;

    if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
 802773e:	687b      	ldr	r3, [r7, #4]
 8027740:	3358      	adds	r3, #88	@ 0x58
 8027742:	4618      	mov	r0, r3
 8027744:	f000 fc66 	bl	8028014 <TimerIsExpired>
 8027748:	4603      	mov	r3, r0
 802774a:	2b00      	cmp	r3, #0
 802774c:	d107      	bne.n	802775e <keepalive+0x34>
 802774e:	687b      	ldr	r3, [r7, #4]
 8027750:	3360      	adds	r3, #96	@ 0x60
 8027752:	4618      	mov	r0, r3
 8027754:	f000 fc5e 	bl	8028014 <TimerIsExpired>
 8027758:	4603      	mov	r3, r0
 802775a:	2b00      	cmp	r3, #0
 802775c:	d030      	beq.n	80277c0 <keepalive+0x96>
    {
        if (c->ping_outstanding)
 802775e:	687b      	ldr	r3, [r7, #4]
 8027760:	7f1b      	ldrb	r3, [r3, #28]
 8027762:	2b00      	cmp	r3, #0
 8027764:	d003      	beq.n	802776e <keepalive+0x44>
            rc = FAILURE; /* PINGRESP not received in keepalive interval */
 8027766:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802776a:	617b      	str	r3, [r7, #20]
 802776c:	e029      	b.n	80277c2 <keepalive+0x98>
        else
        {
            Timer timer;
            TimerInit(&timer);
 802776e:	f107 0308 	add.w	r3, r7, #8
 8027772:	4618      	mov	r0, r3
 8027774:	f000 fca6 	bl	80280c4 <TimerInit>
            TimerCountdownMS(&timer, 1000);
 8027778:	f107 0308 	add.w	r3, r7, #8
 802777c:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8027780:	4618      	mov	r0, r3
 8027782:	f000 fc5d 	bl	8028040 <TimerCountdownMS>
            int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
 8027786:	687b      	ldr	r3, [r7, #4]
 8027788:	691a      	ldr	r2, [r3, #16]
 802778a:	687b      	ldr	r3, [r7, #4]
 802778c:	689b      	ldr	r3, [r3, #8]
 802778e:	4619      	mov	r1, r3
 8027790:	4610      	mov	r0, r2
 8027792:	f000 ff34 	bl	80285fe <MQTTSerialize_pingreq>
 8027796:	6138      	str	r0, [r7, #16]
            if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
 8027798:	693b      	ldr	r3, [r7, #16]
 802779a:	2b00      	cmp	r3, #0
 802779c:	dd11      	ble.n	80277c2 <keepalive+0x98>
 802779e:	f107 0308 	add.w	r3, r7, #8
 80277a2:	461a      	mov	r2, r3
 80277a4:	6939      	ldr	r1, [r7, #16]
 80277a6:	6878      	ldr	r0, [r7, #4]
 80277a8:	f7ff fd8b 	bl	80272c2 <sendPacket>
 80277ac:	6178      	str	r0, [r7, #20]
 80277ae:	697b      	ldr	r3, [r7, #20]
 80277b0:	2b00      	cmp	r3, #0
 80277b2:	d106      	bne.n	80277c2 <keepalive+0x98>
                c->ping_outstanding = 1;
 80277b4:	687b      	ldr	r3, [r7, #4]
 80277b6:	2201      	movs	r2, #1
 80277b8:	771a      	strb	r2, [r3, #28]
 80277ba:	e002      	b.n	80277c2 <keepalive+0x98>
        goto exit;
 80277bc:	bf00      	nop
 80277be:	e000      	b.n	80277c2 <keepalive+0x98>
        }
    }

exit:
 80277c0:	bf00      	nop
    return rc;
 80277c2:	697b      	ldr	r3, [r7, #20]
}
 80277c4:	4618      	mov	r0, r3
 80277c6:	3718      	adds	r7, #24
 80277c8:	46bd      	mov	sp, r7
 80277ca:	bd80      	pop	{r7, pc}

080277cc <MQTTCleanSession>:


void MQTTCleanSession(MQTTClient* c)
{
 80277cc:	b480      	push	{r7}
 80277ce:	b085      	sub	sp, #20
 80277d0:	af00      	add	r7, sp, #0
 80277d2:	6078      	str	r0, [r7, #4]
    int i = 0;
 80277d4:	2300      	movs	r3, #0
 80277d6:	60fb      	str	r3, [r7, #12]

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80277d8:	2300      	movs	r3, #0
 80277da:	60fb      	str	r3, [r7, #12]
 80277dc:	e008      	b.n	80277f0 <MQTTCleanSession+0x24>
        c->messageHandlers[i].topicFilter = NULL;
 80277de:	687b      	ldr	r3, [r7, #4]
 80277e0:	68fa      	ldr	r2, [r7, #12]
 80277e2:	3205      	adds	r2, #5
 80277e4:	2100      	movs	r1, #0
 80277e6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80277ea:	68fb      	ldr	r3, [r7, #12]
 80277ec:	3301      	adds	r3, #1
 80277ee:	60fb      	str	r3, [r7, #12]
 80277f0:	68fb      	ldr	r3, [r7, #12]
 80277f2:	2b04      	cmp	r3, #4
 80277f4:	ddf3      	ble.n	80277de <MQTTCleanSession+0x12>
}
 80277f6:	bf00      	nop
 80277f8:	bf00      	nop
 80277fa:	3714      	adds	r7, #20
 80277fc:	46bd      	mov	sp, r7
 80277fe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027802:	4770      	bx	lr

08027804 <MQTTCloseSession>:


void MQTTCloseSession(MQTTClient* c)
{
 8027804:	b580      	push	{r7, lr}
 8027806:	b082      	sub	sp, #8
 8027808:	af00      	add	r7, sp, #0
 802780a:	6078      	str	r0, [r7, #4]
    c->ping_outstanding = 0;
 802780c:	687b      	ldr	r3, [r7, #4]
 802780e:	2200      	movs	r2, #0
 8027810:	771a      	strb	r2, [r3, #28]
    c->isconnected = 0;
 8027812:	687b      	ldr	r3, [r7, #4]
 8027814:	2200      	movs	r2, #0
 8027816:	621a      	str	r2, [r3, #32]
    if (c->cleansession)
 8027818:	687b      	ldr	r3, [r7, #4]
 802781a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802781c:	2b00      	cmp	r3, #0
 802781e:	d002      	beq.n	8027826 <MQTTCloseSession+0x22>
        MQTTCleanSession(c);
 8027820:	6878      	ldr	r0, [r7, #4]
 8027822:	f7ff ffd3 	bl	80277cc <MQTTCleanSession>
}
 8027826:	bf00      	nop
 8027828:	3708      	adds	r7, #8
 802782a:	46bd      	mov	sp, r7
 802782c:	bd80      	pop	{r7, pc}
	...

08027830 <cycle>:


int cycle(MQTTClient* c, Timer* timer)
{
 8027830:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027832:	b095      	sub	sp, #84	@ 0x54
 8027834:	af06      	add	r7, sp, #24
 8027836:	6078      	str	r0, [r7, #4]
 8027838:	6039      	str	r1, [r7, #0]
    int len = 0,
 802783a:	2300      	movs	r3, #0
 802783c:	637b      	str	r3, [r7, #52]	@ 0x34
        rc = MQTT_SUCCESS;
 802783e:	2300      	movs	r3, #0
 8027840:	633b      	str	r3, [r7, #48]	@ 0x30

    int packet_type = readPacket(c, timer);     /* read the socket, see what work is due */
 8027842:	6839      	ldr	r1, [r7, #0]
 8027844:	6878      	ldr	r0, [r7, #4]
 8027846:	f7ff fe1b 	bl	8027480 <readPacket>
 802784a:	62f8      	str	r0, [r7, #44]	@ 0x2c

    switch (packet_type)
 802784c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802784e:	2b0d      	cmp	r3, #13
 8027850:	d81e      	bhi.n	8027890 <cycle+0x60>
 8027852:	a201      	add	r2, pc, #4	@ (adr r2, 8027858 <cycle+0x28>)
 8027854:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8027858:	080279e7 	.word	0x080279e7
 802785c:	08027891 	.word	0x08027891
 8027860:	080279e7 	.word	0x080279e7
 8027864:	08027897 	.word	0x08027897
 8027868:	080279e7 	.word	0x080279e7
 802786c:	08027963 	.word	0x08027963
 8027870:	08027963 	.word	0x08027963
 8027874:	080279e7 	.word	0x080279e7
 8027878:	08027891 	.word	0x08027891
 802787c:	080279e7 	.word	0x080279e7
 8027880:	08027891 	.word	0x08027891
 8027884:	080279e7 	.word	0x080279e7
 8027888:	08027891 	.word	0x08027891
 802788c:	080279df 	.word	0x080279df
    {
        default:
            /* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
            rc = packet_type;
 8027890:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027892:	633b      	str	r3, [r7, #48]	@ 0x30
            goto exit;
 8027894:	e0b9      	b.n	8027a0a <cycle+0x1da>
        case PUBLISH:
        {
            MQTTString topicName;
            MQTTMessage msg;
            int intQoS;
            msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
 8027896:	2300      	movs	r3, #0
 8027898:	61fb      	str	r3, [r7, #28]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 802789a:	687b      	ldr	r3, [r7, #4]
 802789c:	695b      	ldr	r3, [r3, #20]
               (unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
 802789e:	687a      	ldr	r2, [r7, #4]
 80278a0:	68d2      	ldr	r2, [r2, #12]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 80278a2:	4616      	mov	r6, r2
 80278a4:	f107 0210 	add.w	r2, r7, #16
 80278a8:	1d15      	adds	r5, r2, #4
 80278aa:	f107 0210 	add.w	r2, r7, #16
 80278ae:	1c54      	adds	r4, r2, #1
 80278b0:	f107 010c 	add.w	r1, r7, #12
 80278b4:	f107 0210 	add.w	r2, r7, #16
 80278b8:	1c90      	adds	r0, r2, #2
 80278ba:	9604      	str	r6, [sp, #16]
 80278bc:	9303      	str	r3, [sp, #12]
 80278be:	f107 0310 	add.w	r3, r7, #16
 80278c2:	330c      	adds	r3, #12
 80278c4:	9302      	str	r3, [sp, #8]
 80278c6:	f107 0310 	add.w	r3, r7, #16
 80278ca:	3308      	adds	r3, #8
 80278cc:	9301      	str	r3, [sp, #4]
 80278ce:	f107 0320 	add.w	r3, r7, #32
 80278d2:	9300      	str	r3, [sp, #0]
 80278d4:	462b      	mov	r3, r5
 80278d6:	4622      	mov	r2, r4
 80278d8:	f000 fea0 	bl	802861c <MQTTDeserialize_publish>
 80278dc:	4603      	mov	r3, r0
 80278de:	2b01      	cmp	r3, #1
 80278e0:	f040 8090 	bne.w	8027a04 <cycle+0x1d4>
                goto exit;
            msg.qos = (enum QoS)intQoS;
 80278e4:	68fb      	ldr	r3, [r7, #12]
 80278e6:	b2db      	uxtb	r3, r3
 80278e8:	743b      	strb	r3, [r7, #16]
            deliverMessage(c, &topicName, &msg);
 80278ea:	f107 0210 	add.w	r2, r7, #16
 80278ee:	f107 0320 	add.w	r3, r7, #32
 80278f2:	4619      	mov	r1, r3
 80278f4:	6878      	ldr	r0, [r7, #4]
 80278f6:	f7ff feb0 	bl	802765a <deliverMessage>
            if (msg.qos != QOS0)
 80278fa:	7c3b      	ldrb	r3, [r7, #16]
 80278fc:	2b00      	cmp	r3, #0
 80278fe:	d074      	beq.n	80279ea <cycle+0x1ba>
            {
                if (msg.qos == QOS1)
 8027900:	7c3b      	ldrb	r3, [r7, #16]
 8027902:	2b01      	cmp	r3, #1
 8027904:	d10c      	bne.n	8027920 <cycle+0xf0>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
 8027906:	687b      	ldr	r3, [r7, #4]
 8027908:	6918      	ldr	r0, [r3, #16]
 802790a:	687b      	ldr	r3, [r7, #4]
 802790c:	689b      	ldr	r3, [r3, #8]
 802790e:	4619      	mov	r1, r3
 8027910:	8abb      	ldrh	r3, [r7, #20]
 8027912:	9300      	str	r3, [sp, #0]
 8027914:	2300      	movs	r3, #0
 8027916:	2204      	movs	r2, #4
 8027918:	f001 f9d9 	bl	8028cce <MQTTSerialize_ack>
 802791c:	6378      	str	r0, [r7, #52]	@ 0x34
 802791e:	e00e      	b.n	802793e <cycle+0x10e>
                else if (msg.qos == QOS2)
 8027920:	7c3b      	ldrb	r3, [r7, #16]
 8027922:	2b02      	cmp	r3, #2
 8027924:	d10b      	bne.n	802793e <cycle+0x10e>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
 8027926:	687b      	ldr	r3, [r7, #4]
 8027928:	6918      	ldr	r0, [r3, #16]
 802792a:	687b      	ldr	r3, [r7, #4]
 802792c:	689b      	ldr	r3, [r3, #8]
 802792e:	4619      	mov	r1, r3
 8027930:	8abb      	ldrh	r3, [r7, #20]
 8027932:	9300      	str	r3, [sp, #0]
 8027934:	2300      	movs	r3, #0
 8027936:	2205      	movs	r2, #5
 8027938:	f001 f9c9 	bl	8028cce <MQTTSerialize_ack>
 802793c:	6378      	str	r0, [r7, #52]	@ 0x34
                if (len <= 0)
 802793e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027940:	2b00      	cmp	r3, #0
 8027942:	dc03      	bgt.n	802794c <cycle+0x11c>
                    rc = FAILURE;
 8027944:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027948:	633b      	str	r3, [r7, #48]	@ 0x30
 802794a:	e005      	b.n	8027958 <cycle+0x128>
                else
                    rc = sendPacket(c, len, timer);
 802794c:	683a      	ldr	r2, [r7, #0]
 802794e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8027950:	6878      	ldr	r0, [r7, #4]
 8027952:	f7ff fcb6 	bl	80272c2 <sendPacket>
 8027956:	6338      	str	r0, [r7, #48]	@ 0x30
                if (rc == FAILURE)
 8027958:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802795a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802795e:	d144      	bne.n	80279ea <cycle+0x1ba>
                    goto exit; // there was a problem
 8027960:	e053      	b.n	8027a0a <cycle+0x1da>
        case PUBREC:
        case PUBREL:
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027962:	687b      	ldr	r3, [r7, #4]
 8027964:	695c      	ldr	r4, [r3, #20]
 8027966:	687b      	ldr	r3, [r7, #4]
 8027968:	68db      	ldr	r3, [r3, #12]
 802796a:	f107 020a 	add.w	r2, r7, #10
 802796e:	f107 0109 	add.w	r1, r7, #9
 8027972:	f107 0008 	add.w	r0, r7, #8
 8027976:	9300      	str	r3, [sp, #0]
 8027978:	4623      	mov	r3, r4
 802797a:	f000 fec1 	bl	8028700 <MQTTDeserialize_ack>
 802797e:	4603      	mov	r3, r0
 8027980:	2b01      	cmp	r3, #1
 8027982:	d003      	beq.n	802798c <cycle+0x15c>
                rc = FAILURE;
 8027984:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027988:	633b      	str	r3, [r7, #48]	@ 0x30
 802798a:	e023      	b.n	80279d4 <cycle+0x1a4>
            else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
 802798c:	687b      	ldr	r3, [r7, #4]
 802798e:	6918      	ldr	r0, [r3, #16]
 8027990:	687b      	ldr	r3, [r7, #4]
 8027992:	689b      	ldr	r3, [r3, #8]
 8027994:	4619      	mov	r1, r3
 8027996:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027998:	2b05      	cmp	r3, #5
 802799a:	d101      	bne.n	80279a0 <cycle+0x170>
 802799c:	2206      	movs	r2, #6
 802799e:	e000      	b.n	80279a2 <cycle+0x172>
 80279a0:	2207      	movs	r2, #7
 80279a2:	897b      	ldrh	r3, [r7, #10]
 80279a4:	9300      	str	r3, [sp, #0]
 80279a6:	2300      	movs	r3, #0
 80279a8:	f001 f991 	bl	8028cce <MQTTSerialize_ack>
 80279ac:	6378      	str	r0, [r7, #52]	@ 0x34
 80279ae:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80279b0:	2b00      	cmp	r3, #0
 80279b2:	dc03      	bgt.n	80279bc <cycle+0x18c>
                (packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
                rc = FAILURE;
 80279b4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80279b8:	633b      	str	r3, [r7, #48]	@ 0x30
 80279ba:	e00b      	b.n	80279d4 <cycle+0x1a4>
            else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
 80279bc:	683a      	ldr	r2, [r7, #0]
 80279be:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80279c0:	6878      	ldr	r0, [r7, #4]
 80279c2:	f7ff fc7e 	bl	80272c2 <sendPacket>
 80279c6:	6338      	str	r0, [r7, #48]	@ 0x30
 80279c8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80279ca:	2b00      	cmp	r3, #0
 80279cc:	d002      	beq.n	80279d4 <cycle+0x1a4>
                rc = FAILURE; // there was a problem
 80279ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80279d2:	633b      	str	r3, [r7, #48]	@ 0x30
            if (rc == FAILURE)
 80279d4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80279d6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80279da:	d108      	bne.n	80279ee <cycle+0x1be>
                goto exit; // there was a problem
 80279dc:	e015      	b.n	8027a0a <cycle+0x1da>
        }

        case PUBCOMP:
            break;
        case PINGRESP:
            c->ping_outstanding = 0;
 80279de:	687b      	ldr	r3, [r7, #4]
 80279e0:	2200      	movs	r2, #0
 80279e2:	771a      	strb	r2, [r3, #28]
            break;
 80279e4:	e004      	b.n	80279f0 <cycle+0x1c0>
            break;
 80279e6:	bf00      	nop
 80279e8:	e002      	b.n	80279f0 <cycle+0x1c0>
            break;
 80279ea:	bf00      	nop
 80279ec:	e000      	b.n	80279f0 <cycle+0x1c0>
            break;
 80279ee:	bf00      	nop
    }

    if (keepalive(c) != MQTT_SUCCESS) {
 80279f0:	6878      	ldr	r0, [r7, #4]
 80279f2:	f7ff fe9a 	bl	802772a <keepalive>
 80279f6:	4603      	mov	r3, r0
 80279f8:	2b00      	cmp	r3, #0
 80279fa:	d005      	beq.n	8027a08 <cycle+0x1d8>
        //check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
        rc = FAILURE;
 80279fc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a00:	633b      	str	r3, [r7, #48]	@ 0x30
 8027a02:	e002      	b.n	8027a0a <cycle+0x1da>
                goto exit;
 8027a04:	bf00      	nop
 8027a06:	e000      	b.n	8027a0a <cycle+0x1da>
    }

exit:
 8027a08:	bf00      	nop
    if (rc == MQTT_SUCCESS)
 8027a0a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027a0c:	2b00      	cmp	r3, #0
 8027a0e:	d102      	bne.n	8027a16 <cycle+0x1e6>
        rc = packet_type;
 8027a10:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027a12:	633b      	str	r3, [r7, #48]	@ 0x30
 8027a14:	e006      	b.n	8027a24 <cycle+0x1f4>
    else if (c->isconnected)
 8027a16:	687b      	ldr	r3, [r7, #4]
 8027a18:	6a1b      	ldr	r3, [r3, #32]
 8027a1a:	2b00      	cmp	r3, #0
 8027a1c:	d002      	beq.n	8027a24 <cycle+0x1f4>
        MQTTCloseSession(c);
 8027a1e:	6878      	ldr	r0, [r7, #4]
 8027a20:	f7ff fef0 	bl	8027804 <MQTTCloseSession>
    return rc;
 8027a24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
}
 8027a26:	4618      	mov	r0, r3
 8027a28:	373c      	adds	r7, #60	@ 0x3c
 8027a2a:	46bd      	mov	sp, r7
 8027a2c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8027a2e:	bf00      	nop

08027a30 <MQTTYield>:


int MQTTYield(MQTTClient* c, int timeout_ms)
{
 8027a30:	b580      	push	{r7, lr}
 8027a32:	b086      	sub	sp, #24
 8027a34:	af00      	add	r7, sp, #0
 8027a36:	6078      	str	r0, [r7, #4]
 8027a38:	6039      	str	r1, [r7, #0]
    int rc = MQTT_SUCCESS;
 8027a3a:	2300      	movs	r3, #0
 8027a3c:	617b      	str	r3, [r7, #20]
    Timer timer;

    TimerInit(&timer);
 8027a3e:	f107 030c 	add.w	r3, r7, #12
 8027a42:	4618      	mov	r0, r3
 8027a44:	f000 fb3e 	bl	80280c4 <TimerInit>
    TimerCountdownMS(&timer, timeout_ms);
 8027a48:	683a      	ldr	r2, [r7, #0]
 8027a4a:	f107 030c 	add.w	r3, r7, #12
 8027a4e:	4611      	mov	r1, r2
 8027a50:	4618      	mov	r0, r3
 8027a52:	f000 faf5 	bl	8028040 <TimerCountdownMS>

	  do
    {
        if (cycle(c, &timer) < 0)
 8027a56:	f107 030c 	add.w	r3, r7, #12
 8027a5a:	4619      	mov	r1, r3
 8027a5c:	6878      	ldr	r0, [r7, #4]
 8027a5e:	f7ff fee7 	bl	8027830 <cycle>
 8027a62:	4603      	mov	r3, r0
 8027a64:	2b00      	cmp	r3, #0
 8027a66:	da03      	bge.n	8027a70 <MQTTYield+0x40>
        {
            rc = FAILURE;
 8027a68:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a6c:	617b      	str	r3, [r7, #20]
            break;
 8027a6e:	e007      	b.n	8027a80 <MQTTYield+0x50>
        }
  	} while (!TimerIsExpired(&timer));
 8027a70:	f107 030c 	add.w	r3, r7, #12
 8027a74:	4618      	mov	r0, r3
 8027a76:	f000 facd 	bl	8028014 <TimerIsExpired>
 8027a7a:	4603      	mov	r3, r0
 8027a7c:	2b00      	cmp	r3, #0
 8027a7e:	d0ea      	beq.n	8027a56 <MQTTYield+0x26>

    return rc;
 8027a80:	697b      	ldr	r3, [r7, #20]
}
 8027a82:	4618      	mov	r0, r3
 8027a84:	3718      	adds	r7, #24
 8027a86:	46bd      	mov	sp, r7
 8027a88:	bd80      	pop	{r7, pc}

08027a8a <waitfor>:
}
#endif


int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
 8027a8a:	b580      	push	{r7, lr}
 8027a8c:	b086      	sub	sp, #24
 8027a8e:	af00      	add	r7, sp, #0
 8027a90:	60f8      	str	r0, [r7, #12]
 8027a92:	60b9      	str	r1, [r7, #8]
 8027a94:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8027a96:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a9a:	617b      	str	r3, [r7, #20]

    do
    {
        if (TimerIsExpired(timer))
 8027a9c:	6878      	ldr	r0, [r7, #4]
 8027a9e:	f000 fab9 	bl	8028014 <TimerIsExpired>
 8027aa2:	4603      	mov	r3, r0
 8027aa4:	2b00      	cmp	r3, #0
 8027aa6:	d10c      	bne.n	8027ac2 <waitfor+0x38>
            break; // we timed out
        rc = cycle(c, timer);
 8027aa8:	6879      	ldr	r1, [r7, #4]
 8027aaa:	68f8      	ldr	r0, [r7, #12]
 8027aac:	f7ff fec0 	bl	8027830 <cycle>
 8027ab0:	6178      	str	r0, [r7, #20]
    }
    while (rc != packet_type && rc >= 0);
 8027ab2:	697a      	ldr	r2, [r7, #20]
 8027ab4:	68bb      	ldr	r3, [r7, #8]
 8027ab6:	429a      	cmp	r2, r3
 8027ab8:	d004      	beq.n	8027ac4 <waitfor+0x3a>
 8027aba:	697b      	ldr	r3, [r7, #20]
 8027abc:	2b00      	cmp	r3, #0
 8027abe:	daed      	bge.n	8027a9c <waitfor+0x12>
 8027ac0:	e000      	b.n	8027ac4 <waitfor+0x3a>
            break; // we timed out
 8027ac2:	bf00      	nop

    return rc;
 8027ac4:	697b      	ldr	r3, [r7, #20]
}
 8027ac6:	4618      	mov	r0, r3
 8027ac8:	3718      	adds	r7, #24
 8027aca:	46bd      	mov	sp, r7
 8027acc:	bd80      	pop	{r7, pc}
	...

08027ad0 <MQTTConnectWithResults>:




int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
 8027ad0:	b580      	push	{r7, lr}
 8027ad2:	b09e      	sub	sp, #120	@ 0x78
 8027ad4:	af00      	add	r7, sp, #0
 8027ad6:	60f8      	str	r0, [r7, #12]
 8027ad8:	60b9      	str	r1, [r7, #8]
 8027ada:	607a      	str	r2, [r7, #4]
    Timer connect_timer;
    int rc = FAILURE;
 8027adc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027ae0:	677b      	str	r3, [r7, #116]	@ 0x74
    MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
 8027ae2:	4a49      	ldr	r2, [pc, #292]	@ (8027c08 <MQTTConnectWithResults+0x138>)
 8027ae4:	f107 0310 	add.w	r3, r7, #16
 8027ae8:	4611      	mov	r1, r2
 8027aea:	2258      	movs	r2, #88	@ 0x58
 8027aec:	4618      	mov	r0, r3
 8027aee:	f003 f8be 	bl	802ac6e <memcpy>
    int len = 0;
 8027af2:	2300      	movs	r3, #0
 8027af4:	673b      	str	r3, [r7, #112]	@ 0x70

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027af6:	68fb      	ldr	r3, [r7, #12]
 8027af8:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027afa:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8027afe:	4618      	mov	r0, r3
 8027b00:	f7e9 fdbf 	bl	8011682 <osMutexAcquire>
	  if (c->isconnected) /* don't send connect packet again if we are already connected */
 8027b04:	68fb      	ldr	r3, [r7, #12]
 8027b06:	6a1b      	ldr	r3, [r3, #32]
 8027b08:	2b00      	cmp	r3, #0
 8027b0a:	d164      	bne.n	8027bd6 <MQTTConnectWithResults+0x106>
		  goto exit;

    TimerInit(&connect_timer);
 8027b0c:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027b10:	4618      	mov	r0, r3
 8027b12:	f000 fad7 	bl	80280c4 <TimerInit>
    TimerCountdownMS(&connect_timer, c->command_timeout_ms);
 8027b16:	68fb      	ldr	r3, [r7, #12]
 8027b18:	685a      	ldr	r2, [r3, #4]
 8027b1a:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027b1e:	4611      	mov	r1, r2
 8027b20:	4618      	mov	r0, r3
 8027b22:	f000 fa8d 	bl	8028040 <TimerCountdownMS>

    if (options == 0)
 8027b26:	68bb      	ldr	r3, [r7, #8]
 8027b28:	2b00      	cmp	r3, #0
 8027b2a:	d102      	bne.n	8027b32 <MQTTConnectWithResults+0x62>
        options = &default_options; /* set default options if none were supplied */
 8027b2c:	f107 0310 	add.w	r3, r7, #16
 8027b30:	60bb      	str	r3, [r7, #8]

    c->keepAliveInterval = options->keepAliveInterval;
 8027b32:	68bb      	ldr	r3, [r7, #8]
 8027b34:	8b1b      	ldrh	r3, [r3, #24]
 8027b36:	461a      	mov	r2, r3
 8027b38:	68fb      	ldr	r3, [r7, #12]
 8027b3a:	619a      	str	r2, [r3, #24]
    c->cleansession = options->cleansession;
 8027b3c:	68bb      	ldr	r3, [r7, #8]
 8027b3e:	7e9b      	ldrb	r3, [r3, #26]
 8027b40:	461a      	mov	r2, r3
 8027b42:	68fb      	ldr	r3, [r7, #12]
 8027b44:	625a      	str	r2, [r3, #36]	@ 0x24
    TimerCountdown(&c->last_received, c->keepAliveInterval);
 8027b46:	68fb      	ldr	r3, [r7, #12]
 8027b48:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 8027b4c:	68fb      	ldr	r3, [r7, #12]
 8027b4e:	699b      	ldr	r3, [r3, #24]
 8027b50:	4619      	mov	r1, r3
 8027b52:	4610      	mov	r0, r2
 8027b54:	f000 fa88 	bl	8028068 <TimerCountdown>
    if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
 8027b58:	68fb      	ldr	r3, [r7, #12]
 8027b5a:	6918      	ldr	r0, [r3, #16]
 8027b5c:	68fb      	ldr	r3, [r7, #12]
 8027b5e:	689b      	ldr	r3, [r3, #8]
 8027b60:	68ba      	ldr	r2, [r7, #8]
 8027b62:	4619      	mov	r1, r3
 8027b64:	f000 fbd2 	bl	802830c <MQTTSerialize_connect>
 8027b68:	6738      	str	r0, [r7, #112]	@ 0x70
 8027b6a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 8027b6c:	2b00      	cmp	r3, #0
 8027b6e:	dd34      	ble.n	8027bda <MQTTConnectWithResults+0x10a>
        goto exit;
    if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS)  // send the connect packet
 8027b70:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027b74:	461a      	mov	r2, r3
 8027b76:	6f39      	ldr	r1, [r7, #112]	@ 0x70
 8027b78:	68f8      	ldr	r0, [r7, #12]
 8027b7a:	f7ff fba2 	bl	80272c2 <sendPacket>
 8027b7e:	6778      	str	r0, [r7, #116]	@ 0x74
 8027b80:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8027b82:	2b00      	cmp	r3, #0
 8027b84:	d12b      	bne.n	8027bde <MQTTConnectWithResults+0x10e>
        goto exit; // there was a problem

    // this will be a blocking call, wait for the connack
    if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
 8027b86:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027b8a:	461a      	mov	r2, r3
 8027b8c:	2102      	movs	r1, #2
 8027b8e:	68f8      	ldr	r0, [r7, #12]
 8027b90:	f7ff ff7b 	bl	8027a8a <waitfor>
 8027b94:	4603      	mov	r3, r0
 8027b96:	2b02      	cmp	r3, #2
 8027b98:	d119      	bne.n	8027bce <MQTTConnectWithResults+0xfe>
    {
        data->rc = 0;
 8027b9a:	687b      	ldr	r3, [r7, #4]
 8027b9c:	2200      	movs	r2, #0
 8027b9e:	701a      	strb	r2, [r3, #0]
        data->sessionPresent = 0;
 8027ba0:	687b      	ldr	r3, [r7, #4]
 8027ba2:	2200      	movs	r2, #0
 8027ba4:	705a      	strb	r2, [r3, #1]
        if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
 8027ba6:	687b      	ldr	r3, [r7, #4]
 8027ba8:	1c58      	adds	r0, r3, #1
 8027baa:	6879      	ldr	r1, [r7, #4]
 8027bac:	68fb      	ldr	r3, [r7, #12]
 8027bae:	695a      	ldr	r2, [r3, #20]
 8027bb0:	68fb      	ldr	r3, [r7, #12]
 8027bb2:	68db      	ldr	r3, [r3, #12]
 8027bb4:	f000 fc96 	bl	80284e4 <MQTTDeserialize_connack>
 8027bb8:	4603      	mov	r3, r0
 8027bba:	2b01      	cmp	r3, #1
 8027bbc:	d103      	bne.n	8027bc6 <MQTTConnectWithResults+0xf6>
            rc = data->rc;
 8027bbe:	687b      	ldr	r3, [r7, #4]
 8027bc0:	781b      	ldrb	r3, [r3, #0]
 8027bc2:	677b      	str	r3, [r7, #116]	@ 0x74
 8027bc4:	e00c      	b.n	8027be0 <MQTTConnectWithResults+0x110>
//        	rc = MQTT_SUCCESS;
        else
            rc = FAILURE;
 8027bc6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027bca:	677b      	str	r3, [r7, #116]	@ 0x74
 8027bcc:	e008      	b.n	8027be0 <MQTTConnectWithResults+0x110>
    }
    else
        rc = FAILURE;
 8027bce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027bd2:	677b      	str	r3, [r7, #116]	@ 0x74
 8027bd4:	e004      	b.n	8027be0 <MQTTConnectWithResults+0x110>
		  goto exit;
 8027bd6:	bf00      	nop
 8027bd8:	e002      	b.n	8027be0 <MQTTConnectWithResults+0x110>
        goto exit;
 8027bda:	bf00      	nop
 8027bdc:	e000      	b.n	8027be0 <MQTTConnectWithResults+0x110>
        goto exit; // there was a problem
 8027bde:	bf00      	nop

exit:
    if (rc == MQTT_SUCCESS)
 8027be0:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8027be2:	2b00      	cmp	r3, #0
 8027be4:	d105      	bne.n	8027bf2 <MQTTConnectWithResults+0x122>
    {
        c->isconnected = 1;
 8027be6:	68fb      	ldr	r3, [r7, #12]
 8027be8:	2201      	movs	r2, #1
 8027bea:	621a      	str	r2, [r3, #32]
        c->ping_outstanding = 0;
 8027bec:	68fb      	ldr	r3, [r7, #12]
 8027bee:	2200      	movs	r2, #0
 8027bf0:	771a      	strb	r2, [r3, #28]

#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8027bf2:	68fb      	ldr	r3, [r7, #12]
 8027bf4:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027bf6:	4618      	mov	r0, r3
 8027bf8:	f7e9 fd8e 	bl	8011718 <osMutexRelease>
    return rc;
 8027bfc:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
}
 8027bfe:	4618      	mov	r0, r3
 8027c00:	3778      	adds	r7, #120	@ 0x78
 8027c02:	46bd      	mov	sp, r7
 8027c04:	bd80      	pop	{r7, pc}
 8027c06:	bf00      	nop
 8027c08:	0803180c 	.word	0x0803180c

08027c0c <MQTTConnect>:


int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
 8027c0c:	b580      	push	{r7, lr}
 8027c0e:	b084      	sub	sp, #16
 8027c10:	af00      	add	r7, sp, #0
 8027c12:	6078      	str	r0, [r7, #4]
 8027c14:	6039      	str	r1, [r7, #0]
    MQTTConnackData data;
    return MQTTConnectWithResults(c, options, &data);
 8027c16:	f107 030c 	add.w	r3, r7, #12
 8027c1a:	461a      	mov	r2, r3
 8027c1c:	6839      	ldr	r1, [r7, #0]
 8027c1e:	6878      	ldr	r0, [r7, #4]
 8027c20:	f7ff ff56 	bl	8027ad0 <MQTTConnectWithResults>
 8027c24:	4603      	mov	r3, r0
}
 8027c26:	4618      	mov	r0, r3
 8027c28:	3710      	adds	r7, #16
 8027c2a:	46bd      	mov	sp, r7
 8027c2c:	bd80      	pop	{r7, pc}

08027c2e <MQTTSetMessageHandler>:


int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
 8027c2e:	b580      	push	{r7, lr}
 8027c30:	b086      	sub	sp, #24
 8027c32:	af00      	add	r7, sp, #0
 8027c34:	60f8      	str	r0, [r7, #12]
 8027c36:	60b9      	str	r1, [r7, #8]
 8027c38:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8027c3a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c3e:	617b      	str	r3, [r7, #20]
    int i = -1;
 8027c40:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c44:	613b      	str	r3, [r7, #16]

    /* first check for an existing matching slot */
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027c46:	2300      	movs	r3, #0
 8027c48:	613b      	str	r3, [r7, #16]
 8027c4a:	e028      	b.n	8027c9e <MQTTSetMessageHandler+0x70>
    {
        if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
 8027c4c:	68fb      	ldr	r3, [r7, #12]
 8027c4e:	693a      	ldr	r2, [r7, #16]
 8027c50:	3205      	adds	r2, #5
 8027c52:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027c56:	2b00      	cmp	r3, #0
 8027c58:	d01e      	beq.n	8027c98 <MQTTSetMessageHandler+0x6a>
 8027c5a:	68fb      	ldr	r3, [r7, #12]
 8027c5c:	693a      	ldr	r2, [r7, #16]
 8027c5e:	3205      	adds	r2, #5
 8027c60:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027c64:	68b9      	ldr	r1, [r7, #8]
 8027c66:	4618      	mov	r0, r3
 8027c68:	f7d8 fb3a 	bl	80002e0 <strcmp>
 8027c6c:	4603      	mov	r3, r0
 8027c6e:	2b00      	cmp	r3, #0
 8027c70:	d112      	bne.n	8027c98 <MQTTSetMessageHandler+0x6a>
        {
            if (messageHandler == NULL) /* remove existing */
 8027c72:	687b      	ldr	r3, [r7, #4]
 8027c74:	2b00      	cmp	r3, #0
 8027c76:	d10c      	bne.n	8027c92 <MQTTSetMessageHandler+0x64>
            {
                c->messageHandlers[i].topicFilter = NULL;
 8027c78:	68fb      	ldr	r3, [r7, #12]
 8027c7a:	693a      	ldr	r2, [r7, #16]
 8027c7c:	3205      	adds	r2, #5
 8027c7e:	2100      	movs	r1, #0
 8027c80:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
                c->messageHandlers[i].fp = NULL;
 8027c84:	68fa      	ldr	r2, [r7, #12]
 8027c86:	693b      	ldr	r3, [r7, #16]
 8027c88:	3305      	adds	r3, #5
 8027c8a:	00db      	lsls	r3, r3, #3
 8027c8c:	4413      	add	r3, r2
 8027c8e:	2200      	movs	r2, #0
 8027c90:	605a      	str	r2, [r3, #4]
            }
            rc = MQTT_SUCCESS; /* return i when adding new subscription */
 8027c92:	2300      	movs	r3, #0
 8027c94:	617b      	str	r3, [r7, #20]
            break;
 8027c96:	e005      	b.n	8027ca4 <MQTTSetMessageHandler+0x76>
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027c98:	693b      	ldr	r3, [r7, #16]
 8027c9a:	3301      	adds	r3, #1
 8027c9c:	613b      	str	r3, [r7, #16]
 8027c9e:	693b      	ldr	r3, [r7, #16]
 8027ca0:	2b04      	cmp	r3, #4
 8027ca2:	ddd3      	ble.n	8027c4c <MQTTSetMessageHandler+0x1e>
        }
    }
    /* if no existing, look for empty slot (unless we are removing) */
    if (messageHandler != NULL) {
 8027ca4:	687b      	ldr	r3, [r7, #4]
 8027ca6:	2b00      	cmp	r3, #0
 8027ca8:	d026      	beq.n	8027cf8 <MQTTSetMessageHandler+0xca>
        if (rc == FAILURE)
 8027caa:	697b      	ldr	r3, [r7, #20]
 8027cac:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027cb0:	d112      	bne.n	8027cd8 <MQTTSetMessageHandler+0xaa>
        {
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027cb2:	2300      	movs	r3, #0
 8027cb4:	613b      	str	r3, [r7, #16]
 8027cb6:	e00c      	b.n	8027cd2 <MQTTSetMessageHandler+0xa4>
            {
                if (c->messageHandlers[i].topicFilter == NULL)
 8027cb8:	68fb      	ldr	r3, [r7, #12]
 8027cba:	693a      	ldr	r2, [r7, #16]
 8027cbc:	3205      	adds	r2, #5
 8027cbe:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027cc2:	2b00      	cmp	r3, #0
 8027cc4:	d102      	bne.n	8027ccc <MQTTSetMessageHandler+0x9e>
                {
                    rc = MQTT_SUCCESS;
 8027cc6:	2300      	movs	r3, #0
 8027cc8:	617b      	str	r3, [r7, #20]
                    break;
 8027cca:	e005      	b.n	8027cd8 <MQTTSetMessageHandler+0xaa>
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027ccc:	693b      	ldr	r3, [r7, #16]
 8027cce:	3301      	adds	r3, #1
 8027cd0:	613b      	str	r3, [r7, #16]
 8027cd2:	693b      	ldr	r3, [r7, #16]
 8027cd4:	2b04      	cmp	r3, #4
 8027cd6:	ddef      	ble.n	8027cb8 <MQTTSetMessageHandler+0x8a>
                }
            }
        }
        if (i < MAX_MESSAGE_HANDLERS)
 8027cd8:	693b      	ldr	r3, [r7, #16]
 8027cda:	2b04      	cmp	r3, #4
 8027cdc:	dc0c      	bgt.n	8027cf8 <MQTTSetMessageHandler+0xca>
        {
            c->messageHandlers[i].topicFilter = topicFilter;
 8027cde:	68fb      	ldr	r3, [r7, #12]
 8027ce0:	693a      	ldr	r2, [r7, #16]
 8027ce2:	3205      	adds	r2, #5
 8027ce4:	68b9      	ldr	r1, [r7, #8]
 8027ce6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
            c->messageHandlers[i].fp = messageHandler;
 8027cea:	68fa      	ldr	r2, [r7, #12]
 8027cec:	693b      	ldr	r3, [r7, #16]
 8027cee:	3305      	adds	r3, #5
 8027cf0:	00db      	lsls	r3, r3, #3
 8027cf2:	4413      	add	r3, r2
 8027cf4:	687a      	ldr	r2, [r7, #4]
 8027cf6:	605a      	str	r2, [r3, #4]
        }
    }
    return rc;
 8027cf8:	697b      	ldr	r3, [r7, #20]
}
 8027cfa:	4618      	mov	r0, r3
 8027cfc:	3718      	adds	r7, #24
 8027cfe:	46bd      	mov	sp, r7
 8027d00:	bd80      	pop	{r7, pc}

08027d02 <MQTTSubscribeWithResults>:


int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler, MQTTSubackData* data)
{
 8027d02:	b5b0      	push	{r4, r5, r7, lr}
 8027d04:	b094      	sub	sp, #80	@ 0x50
 8027d06:	af04      	add	r7, sp, #16
 8027d08:	60f8      	str	r0, [r7, #12]
 8027d0a:	60b9      	str	r1, [r7, #8]
 8027d0c:	603b      	str	r3, [r7, #0]
 8027d0e:	4613      	mov	r3, r2
 8027d10:	71fb      	strb	r3, [r7, #7]
    int rc = FAILURE;
 8027d12:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027d16:	63fb      	str	r3, [r7, #60]	@ 0x3c
    Timer timer;
    int len = 0;
 8027d18:	2300      	movs	r3, #0
 8027d1a:	63bb      	str	r3, [r7, #56]	@ 0x38
    MQTTString topic = MQTTString_initializer;
 8027d1c:	2300      	movs	r3, #0
 8027d1e:	627b      	str	r3, [r7, #36]	@ 0x24
 8027d20:	2300      	movs	r3, #0
 8027d22:	62bb      	str	r3, [r7, #40]	@ 0x28
 8027d24:	2300      	movs	r3, #0
 8027d26:	62fb      	str	r3, [r7, #44]	@ 0x2c
    topic.cstring = (char *)topicFilter;
 8027d28:	68bb      	ldr	r3, [r7, #8]
 8027d2a:	627b      	str	r3, [r7, #36]	@ 0x24

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027d2c:	68fb      	ldr	r3, [r7, #12]
 8027d2e:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027d30:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8027d34:	4618      	mov	r0, r3
 8027d36:	f7e9 fca4 	bl	8011682 <osMutexAcquire>
	  if (!c->isconnected)
 8027d3a:	68fb      	ldr	r3, [r7, #12]
 8027d3c:	6a1b      	ldr	r3, [r3, #32]
 8027d3e:	2b00      	cmp	r3, #0
 8027d40:	d069      	beq.n	8027e16 <MQTTSubscribeWithResults+0x114>
		    goto exit;

    TimerInit(&timer);
 8027d42:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027d46:	4618      	mov	r0, r3
 8027d48:	f000 f9bc 	bl	80280c4 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8027d4c:	68fb      	ldr	r3, [r7, #12]
 8027d4e:	685a      	ldr	r2, [r3, #4]
 8027d50:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027d54:	4611      	mov	r1, r2
 8027d56:	4618      	mov	r0, r3
 8027d58:	f000 f972 	bl	8028040 <TimerCountdownMS>
    int _qos[1] = {(int)qos};
 8027d5c:	79fb      	ldrb	r3, [r7, #7]
 8027d5e:	623b      	str	r3, [r7, #32]
    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
 8027d60:	68fb      	ldr	r3, [r7, #12]
 8027d62:	691c      	ldr	r4, [r3, #16]
 8027d64:	68fb      	ldr	r3, [r7, #12]
 8027d66:	689b      	ldr	r3, [r3, #8]
 8027d68:	461d      	mov	r5, r3
 8027d6a:	68f8      	ldr	r0, [r7, #12]
 8027d6c:	f7ff fa90 	bl	8027290 <getNextPacketId>
 8027d70:	4603      	mov	r3, r0
 8027d72:	b29a      	uxth	r2, r3
 8027d74:	f107 0320 	add.w	r3, r7, #32
 8027d78:	9302      	str	r3, [sp, #8]
 8027d7a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8027d7e:	9301      	str	r3, [sp, #4]
 8027d80:	2301      	movs	r3, #1
 8027d82:	9300      	str	r3, [sp, #0]
 8027d84:	4613      	mov	r3, r2
 8027d86:	2200      	movs	r2, #0
 8027d88:	4629      	mov	r1, r5
 8027d8a:	4620      	mov	r0, r4
 8027d8c:	f001 f81b 	bl	8028dc6 <MQTTSerialize_subscribe>
 8027d90:	63b8      	str	r0, [r7, #56]	@ 0x38
//    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
    if (len <= 0)
 8027d92:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8027d94:	2b00      	cmp	r3, #0
 8027d96:	dd40      	ble.n	8027e1a <MQTTSubscribeWithResults+0x118>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8027d98:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027d9c:	461a      	mov	r2, r3
 8027d9e:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 8027da0:	68f8      	ldr	r0, [r7, #12]
 8027da2:	f7ff fa8e 	bl	80272c2 <sendPacket>
 8027da6:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8027da8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8027daa:	2b00      	cmp	r3, #0
 8027dac:	d137      	bne.n	8027e1e <MQTTSubscribeWithResults+0x11c>
        goto exit;             // there was a problem

    if (waitfor(c, SUBACK, &timer) == SUBACK)      // wait for suback
 8027dae:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8027db2:	461a      	mov	r2, r3
 8027db4:	2109      	movs	r1, #9
 8027db6:	68f8      	ldr	r0, [r7, #12]
 8027db8:	f7ff fe67 	bl	8027a8a <waitfor>
 8027dbc:	4603      	mov	r3, r0
 8027dbe:	2b09      	cmp	r3, #9
 8027dc0:	d125      	bne.n	8027e0e <MQTTSubscribeWithResults+0x10c>
    {
        int count = 0;
 8027dc2:	2300      	movs	r3, #0
 8027dc4:	61fb      	str	r3, [r7, #28]
        unsigned short mypacketid;
        data->grantedQoS = QOS0;
 8027dc6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8027dc8:	2200      	movs	r2, #0
 8027dca:	701a      	strb	r2, [r3, #0]
        int _grantedQoS[1] = {(int)&data->grantedQoS};
 8027dcc:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8027dce:	617b      	str	r3, [r7, #20]
//        if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
        if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
 8027dd0:	68fb      	ldr	r3, [r7, #12]
 8027dd2:	695b      	ldr	r3, [r3, #20]
 8027dd4:	68fa      	ldr	r2, [r7, #12]
 8027dd6:	68d2      	ldr	r2, [r2, #12]
 8027dd8:	4614      	mov	r4, r2
 8027dda:	f107 0114 	add.w	r1, r7, #20
 8027dde:	f107 021c 	add.w	r2, r7, #28
 8027de2:	f107 001a 	add.w	r0, r7, #26
 8027de6:	9401      	str	r4, [sp, #4]
 8027de8:	9300      	str	r3, [sp, #0]
 8027dea:	460b      	mov	r3, r1
 8027dec:	2101      	movs	r1, #1
 8027dee:	f001 f866 	bl	8028ebe <MQTTDeserialize_suback>
 8027df2:	4603      	mov	r3, r0
 8027df4:	2b01      	cmp	r3, #1
 8027df6:	d113      	bne.n	8027e20 <MQTTSubscribeWithResults+0x11e>
        {
            if (data->grantedQoS != 0x80)
 8027df8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8027dfa:	781b      	ldrb	r3, [r3, #0]
 8027dfc:	2b80      	cmp	r3, #128	@ 0x80
 8027dfe:	d00f      	beq.n	8027e20 <MQTTSubscribeWithResults+0x11e>
                rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
 8027e00:	683a      	ldr	r2, [r7, #0]
 8027e02:	68b9      	ldr	r1, [r7, #8]
 8027e04:	68f8      	ldr	r0, [r7, #12]
 8027e06:	f7ff ff12 	bl	8027c2e <MQTTSetMessageHandler>
 8027e0a:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8027e0c:	e008      	b.n	8027e20 <MQTTSubscribeWithResults+0x11e>
        }
    }
    else
        rc = FAILURE;
 8027e0e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027e12:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8027e14:	e004      	b.n	8027e20 <MQTTSubscribeWithResults+0x11e>
		    goto exit;
 8027e16:	bf00      	nop
 8027e18:	e002      	b.n	8027e20 <MQTTSubscribeWithResults+0x11e>
        goto exit;
 8027e1a:	bf00      	nop
 8027e1c:	e000      	b.n	8027e20 <MQTTSubscribeWithResults+0x11e>
        goto exit;             // there was a problem
 8027e1e:	bf00      	nop

exit:
    if (rc == FAILURE)
 8027e20:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8027e22:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027e26:	d102      	bne.n	8027e2e <MQTTSubscribeWithResults+0x12c>
        MQTTCloseSession(c);
 8027e28:	68f8      	ldr	r0, [r7, #12]
 8027e2a:	f7ff fceb 	bl	8027804 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8027e2e:	68fb      	ldr	r3, [r7, #12]
 8027e30:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027e32:	4618      	mov	r0, r3
 8027e34:	f7e9 fc70 	bl	8011718 <osMutexRelease>
    return rc;
 8027e38:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 8027e3a:	4618      	mov	r0, r3
 8027e3c:	3740      	adds	r7, #64	@ 0x40
 8027e3e:	46bd      	mov	sp, r7
 8027e40:	bdb0      	pop	{r4, r5, r7, pc}

08027e42 <MQTTSubscribe>:


int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler)
{
 8027e42:	b580      	push	{r7, lr}
 8027e44:	b088      	sub	sp, #32
 8027e46:	af02      	add	r7, sp, #8
 8027e48:	60f8      	str	r0, [r7, #12]
 8027e4a:	60b9      	str	r1, [r7, #8]
 8027e4c:	603b      	str	r3, [r7, #0]
 8027e4e:	4613      	mov	r3, r2
 8027e50:	71fb      	strb	r3, [r7, #7]
    MQTTSubackData data;
    return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
 8027e52:	79fa      	ldrb	r2, [r7, #7]
 8027e54:	f107 0314 	add.w	r3, r7, #20
 8027e58:	9300      	str	r3, [sp, #0]
 8027e5a:	683b      	ldr	r3, [r7, #0]
 8027e5c:	68b9      	ldr	r1, [r7, #8]
 8027e5e:	68f8      	ldr	r0, [r7, #12]
 8027e60:	f7ff ff4f 	bl	8027d02 <MQTTSubscribeWithResults>
 8027e64:	4603      	mov	r3, r0
}
 8027e66:	4618      	mov	r0, r3
 8027e68:	3718      	adds	r7, #24
 8027e6a:	46bd      	mov	sp, r7
 8027e6c:	bd80      	pop	{r7, pc}

08027e6e <MQTTPublish>:
    return rc;
}


int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
 8027e6e:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027e70:	b097      	sub	sp, #92	@ 0x5c
 8027e72:	af08      	add	r7, sp, #32
 8027e74:	60f8      	str	r0, [r7, #12]
 8027e76:	60b9      	str	r1, [r7, #8]
 8027e78:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8027e7a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027e7e:	637b      	str	r3, [r7, #52]	@ 0x34
    Timer timer;
    MQTTString topic = MQTTString_initializer;
 8027e80:	2300      	movs	r3, #0
 8027e82:	61fb      	str	r3, [r7, #28]
 8027e84:	2300      	movs	r3, #0
 8027e86:	623b      	str	r3, [r7, #32]
 8027e88:	2300      	movs	r3, #0
 8027e8a:	627b      	str	r3, [r7, #36]	@ 0x24
    topic.cstring = (char *)topicName;
 8027e8c:	68bb      	ldr	r3, [r7, #8]
 8027e8e:	61fb      	str	r3, [r7, #28]
    int len = 0;
 8027e90:	2300      	movs	r3, #0
 8027e92:	633b      	str	r3, [r7, #48]	@ 0x30

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027e94:	68fb      	ldr	r3, [r7, #12]
 8027e96:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027e98:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8027e9c:	4618      	mov	r0, r3
 8027e9e:	f7e9 fbf0 	bl	8011682 <osMutexAcquire>
	  if (!c->isconnected)
 8027ea2:	68fb      	ldr	r3, [r7, #12]
 8027ea4:	6a1b      	ldr	r3, [r3, #32]
 8027ea6:	2b00      	cmp	r3, #0
 8027ea8:	f000 809b 	beq.w	8027fe2 <MQTTPublish+0x174>
		    goto exit;

    TimerInit(&timer);
 8027eac:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027eb0:	4618      	mov	r0, r3
 8027eb2:	f000 f907 	bl	80280c4 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 8027eb6:	68fb      	ldr	r3, [r7, #12]
 8027eb8:	685a      	ldr	r2, [r3, #4]
 8027eba:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027ebe:	4611      	mov	r1, r2
 8027ec0:	4618      	mov	r0, r3
 8027ec2:	f000 f8bd 	bl	8028040 <TimerCountdownMS>

    if (message->qos == QOS1 || message->qos == QOS2)
 8027ec6:	687b      	ldr	r3, [r7, #4]
 8027ec8:	781b      	ldrb	r3, [r3, #0]
 8027eca:	2b01      	cmp	r3, #1
 8027ecc:	d003      	beq.n	8027ed6 <MQTTPublish+0x68>
 8027ece:	687b      	ldr	r3, [r7, #4]
 8027ed0:	781b      	ldrb	r3, [r3, #0]
 8027ed2:	2b02      	cmp	r3, #2
 8027ed4:	d106      	bne.n	8027ee4 <MQTTPublish+0x76>
        message->id = getNextPacketId(c);
 8027ed6:	68f8      	ldr	r0, [r7, #12]
 8027ed8:	f7ff f9da 	bl	8027290 <getNextPacketId>
 8027edc:	4603      	mov	r3, r0
 8027ede:	b29a      	uxth	r2, r3
 8027ee0:	687b      	ldr	r3, [r7, #4]
 8027ee2:	809a      	strh	r2, [r3, #4]

    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027ee4:	68fb      	ldr	r3, [r7, #12]
 8027ee6:	691b      	ldr	r3, [r3, #16]
 8027ee8:	603b      	str	r3, [r7, #0]
 8027eea:	68fb      	ldr	r3, [r7, #12]
 8027eec:	689b      	ldr	r3, [r3, #8]
 8027eee:	469c      	mov	ip, r3
 8027ef0:	687b      	ldr	r3, [r7, #4]
 8027ef2:	781b      	ldrb	r3, [r3, #0]
 8027ef4:	469e      	mov	lr, r3
 8027ef6:	687b      	ldr	r3, [r7, #4]
 8027ef8:	785d      	ldrb	r5, [r3, #1]
 8027efa:	687b      	ldr	r3, [r7, #4]
 8027efc:	889e      	ldrh	r6, [r3, #4]
              topic, (unsigned char*)message->payload, message->payloadlen);
 8027efe:	687b      	ldr	r3, [r7, #4]
 8027f00:	689b      	ldr	r3, [r3, #8]
 8027f02:	687a      	ldr	r2, [r7, #4]
 8027f04:	68d2      	ldr	r2, [r2, #12]
    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8027f06:	9206      	str	r2, [sp, #24]
 8027f08:	9305      	str	r3, [sp, #20]
 8027f0a:	ac02      	add	r4, sp, #8
 8027f0c:	f107 031c 	add.w	r3, r7, #28
 8027f10:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8027f14:	e884 0007 	stmia.w	r4, {r0, r1, r2}
 8027f18:	9601      	str	r6, [sp, #4]
 8027f1a:	9500      	str	r5, [sp, #0]
 8027f1c:	4673      	mov	r3, lr
 8027f1e:	2200      	movs	r2, #0
 8027f20:	4661      	mov	r1, ip
 8027f22:	6838      	ldr	r0, [r7, #0]
 8027f24:	f000 fe5d 	bl	8028be2 <MQTTSerialize_publish>
 8027f28:	6338      	str	r0, [r7, #48]	@ 0x30
    if (len <= 0)
 8027f2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027f2c:	2b00      	cmp	r3, #0
 8027f2e:	dd5a      	ble.n	8027fe6 <MQTTPublish+0x178>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8027f30:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027f34:	461a      	mov	r2, r3
 8027f36:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8027f38:	68f8      	ldr	r0, [r7, #12]
 8027f3a:	f7ff f9c2 	bl	80272c2 <sendPacket>
 8027f3e:	6378      	str	r0, [r7, #52]	@ 0x34
 8027f40:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027f42:	2b00      	cmp	r3, #0
 8027f44:	d151      	bne.n	8027fea <MQTTPublish+0x17c>
        goto exit; // there was a problem

    if (message->qos == QOS1)
 8027f46:	687b      	ldr	r3, [r7, #4]
 8027f48:	781b      	ldrb	r3, [r3, #0]
 8027f4a:	2b01      	cmp	r3, #1
 8027f4c:	d122      	bne.n	8027f94 <MQTTPublish+0x126>
    {
        if (waitfor(c, PUBACK, &timer) == PUBACK)
 8027f4e:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027f52:	461a      	mov	r2, r3
 8027f54:	2104      	movs	r1, #4
 8027f56:	68f8      	ldr	r0, [r7, #12]
 8027f58:	f7ff fd97 	bl	8027a8a <waitfor>
 8027f5c:	4603      	mov	r3, r0
 8027f5e:	2b04      	cmp	r3, #4
 8027f60:	d114      	bne.n	8027f8c <MQTTPublish+0x11e>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027f62:	68fb      	ldr	r3, [r7, #12]
 8027f64:	695c      	ldr	r4, [r3, #20]
 8027f66:	68fb      	ldr	r3, [r7, #12]
 8027f68:	68db      	ldr	r3, [r3, #12]
 8027f6a:	f107 021a 	add.w	r2, r7, #26
 8027f6e:	f107 0119 	add.w	r1, r7, #25
 8027f72:	f107 0018 	add.w	r0, r7, #24
 8027f76:	9300      	str	r3, [sp, #0]
 8027f78:	4623      	mov	r3, r4
 8027f7a:	f000 fbc1 	bl	8028700 <MQTTDeserialize_ack>
 8027f7e:	4603      	mov	r3, r0
 8027f80:	2b01      	cmp	r3, #1
 8027f82:	d035      	beq.n	8027ff0 <MQTTPublish+0x182>
                rc = FAILURE;
 8027f84:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027f88:	637b      	str	r3, [r7, #52]	@ 0x34
 8027f8a:	e031      	b.n	8027ff0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 8027f8c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027f90:	637b      	str	r3, [r7, #52]	@ 0x34
 8027f92:	e02d      	b.n	8027ff0 <MQTTPublish+0x182>
    }
    else if (message->qos == QOS2)
 8027f94:	687b      	ldr	r3, [r7, #4]
 8027f96:	781b      	ldrb	r3, [r3, #0]
 8027f98:	2b02      	cmp	r3, #2
 8027f9a:	d128      	bne.n	8027fee <MQTTPublish+0x180>
    {
        if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
 8027f9c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8027fa0:	461a      	mov	r2, r3
 8027fa2:	2107      	movs	r1, #7
 8027fa4:	68f8      	ldr	r0, [r7, #12]
 8027fa6:	f7ff fd70 	bl	8027a8a <waitfor>
 8027faa:	4603      	mov	r3, r0
 8027fac:	2b07      	cmp	r3, #7
 8027fae:	d114      	bne.n	8027fda <MQTTPublish+0x16c>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027fb0:	68fb      	ldr	r3, [r7, #12]
 8027fb2:	695c      	ldr	r4, [r3, #20]
 8027fb4:	68fb      	ldr	r3, [r7, #12]
 8027fb6:	68db      	ldr	r3, [r3, #12]
 8027fb8:	f107 0216 	add.w	r2, r7, #22
 8027fbc:	f107 0115 	add.w	r1, r7, #21
 8027fc0:	f107 0014 	add.w	r0, r7, #20
 8027fc4:	9300      	str	r3, [sp, #0]
 8027fc6:	4623      	mov	r3, r4
 8027fc8:	f000 fb9a 	bl	8028700 <MQTTDeserialize_ack>
 8027fcc:	4603      	mov	r3, r0
 8027fce:	2b01      	cmp	r3, #1
 8027fd0:	d00e      	beq.n	8027ff0 <MQTTPublish+0x182>
                rc = FAILURE;
 8027fd2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027fd6:	637b      	str	r3, [r7, #52]	@ 0x34
 8027fd8:	e00a      	b.n	8027ff0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 8027fda:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027fde:	637b      	str	r3, [r7, #52]	@ 0x34
 8027fe0:	e006      	b.n	8027ff0 <MQTTPublish+0x182>
		    goto exit;
 8027fe2:	bf00      	nop
 8027fe4:	e004      	b.n	8027ff0 <MQTTPublish+0x182>
        goto exit;
 8027fe6:	bf00      	nop
 8027fe8:	e002      	b.n	8027ff0 <MQTTPublish+0x182>
        goto exit; // there was a problem
 8027fea:	bf00      	nop
 8027fec:	e000      	b.n	8027ff0 <MQTTPublish+0x182>
    }

exit:
 8027fee:	bf00      	nop
    if (rc == FAILURE)
 8027ff0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027ff2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027ff6:	d102      	bne.n	8027ffe <MQTTPublish+0x190>
        MQTTCloseSession(c);
 8027ff8:	68f8      	ldr	r0, [r7, #12]
 8027ffa:	f7ff fc03 	bl	8027804 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	  osMutexRelease(mqttMutex);
	  osMutexRelease(c->mutex);
 8027ffe:	68fb      	ldr	r3, [r7, #12]
 8028000:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8028002:	4618      	mov	r0, r3
 8028004:	f7e9 fb88 	bl	8011718 <osMutexRelease>
    return rc;
 8028008:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 802800a:	4618      	mov	r0, r3
 802800c:	373c      	adds	r7, #60	@ 0x3c
 802800e:	46bd      	mov	sp, r7
 8028010:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08028014 <TimerIsExpired>:
#define SERVER_IP4	34

uint32_t MilliTimer;

//Timer functions
char TimerIsExpired(Timer *timer) {
 8028014:	b480      	push	{r7}
 8028016:	b085      	sub	sp, #20
 8028018:	af00      	add	r7, sp, #0
 802801a:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 802801c:	687b      	ldr	r3, [r7, #4]
 802801e:	685a      	ldr	r2, [r3, #4]
 8028020:	4b06      	ldr	r3, [pc, #24]	@ (802803c <TimerIsExpired+0x28>)
 8028022:	681b      	ldr	r3, [r3, #0]
 8028024:	1ad3      	subs	r3, r2, r3
 8028026:	60fb      	str	r3, [r7, #12]
	return (left < 0);
 8028028:	68fb      	ldr	r3, [r7, #12]
 802802a:	0fdb      	lsrs	r3, r3, #31
 802802c:	b2db      	uxtb	r3, r3
}
 802802e:	4618      	mov	r0, r3
 8028030:	3714      	adds	r7, #20
 8028032:	46bd      	mov	sp, r7
 8028034:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028038:	4770      	bx	lr
 802803a:	bf00      	nop
 802803c:	2402b114 	.word	0x2402b114

08028040 <TimerCountdownMS>:

void TimerCountdownMS(Timer *timer, unsigned int timeout) {
 8028040:	b480      	push	{r7}
 8028042:	b083      	sub	sp, #12
 8028044:	af00      	add	r7, sp, #0
 8028046:	6078      	str	r0, [r7, #4]
 8028048:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + timeout;
 802804a:	4b06      	ldr	r3, [pc, #24]	@ (8028064 <TimerCountdownMS+0x24>)
 802804c:	681a      	ldr	r2, [r3, #0]
 802804e:	683b      	ldr	r3, [r7, #0]
 8028050:	441a      	add	r2, r3
 8028052:	687b      	ldr	r3, [r7, #4]
 8028054:	605a      	str	r2, [r3, #4]
}
 8028056:	bf00      	nop
 8028058:	370c      	adds	r7, #12
 802805a:	46bd      	mov	sp, r7
 802805c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028060:	4770      	bx	lr
 8028062:	bf00      	nop
 8028064:	2402b114 	.word	0x2402b114

08028068 <TimerCountdown>:

void TimerCountdown(Timer *timer, unsigned int timeout) {
 8028068:	b480      	push	{r7}
 802806a:	b083      	sub	sp, #12
 802806c:	af00      	add	r7, sp, #0
 802806e:	6078      	str	r0, [r7, #4]
 8028070:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + (timeout * 1000);
 8028072:	683b      	ldr	r3, [r7, #0]
 8028074:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8028078:	fb03 f202 	mul.w	r2, r3, r2
 802807c:	4b05      	ldr	r3, [pc, #20]	@ (8028094 <TimerCountdown+0x2c>)
 802807e:	681b      	ldr	r3, [r3, #0]
 8028080:	441a      	add	r2, r3
 8028082:	687b      	ldr	r3, [r7, #4]
 8028084:	605a      	str	r2, [r3, #4]
}
 8028086:	bf00      	nop
 8028088:	370c      	adds	r7, #12
 802808a:	46bd      	mov	sp, r7
 802808c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028090:	4770      	bx	lr
 8028092:	bf00      	nop
 8028094:	2402b114 	.word	0x2402b114

08028098 <TimerLeftMS>:

int TimerLeftMS(Timer *timer) {
 8028098:	b480      	push	{r7}
 802809a:	b085      	sub	sp, #20
 802809c:	af00      	add	r7, sp, #0
 802809e:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 80280a0:	687b      	ldr	r3, [r7, #4]
 80280a2:	685a      	ldr	r2, [r3, #4]
 80280a4:	4b06      	ldr	r3, [pc, #24]	@ (80280c0 <TimerLeftMS+0x28>)
 80280a6:	681b      	ldr	r3, [r3, #0]
 80280a8:	1ad3      	subs	r3, r2, r3
 80280aa:	60fb      	str	r3, [r7, #12]
	return (left < 0) ? 0 : left;
 80280ac:	68fb      	ldr	r3, [r7, #12]
 80280ae:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
}
 80280b2:	4618      	mov	r0, r3
 80280b4:	3714      	adds	r7, #20
 80280b6:	46bd      	mov	sp, r7
 80280b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80280bc:	4770      	bx	lr
 80280be:	bf00      	nop
 80280c0:	2402b114 	.word	0x2402b114

080280c4 <TimerInit>:

void TimerInit(Timer *timer) {
 80280c4:	b480      	push	{r7}
 80280c6:	b083      	sub	sp, #12
 80280c8:	af00      	add	r7, sp, #0
 80280ca:	6078      	str	r0, [r7, #4]
	timer->end_time = 0;
 80280cc:	687b      	ldr	r3, [r7, #4]
 80280ce:	2200      	movs	r2, #0
 80280d0:	605a      	str	r2, [r3, #4]
}
 80280d2:	bf00      	nop
 80280d4:	370c      	adds	r7, #12
 80280d6:	46bd      	mov	sp, r7
 80280d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80280dc:	4770      	bx	lr
	...

080280e0 <NewNetwork>:

#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
 80280e0:	b480      	push	{r7}
 80280e2:	b083      	sub	sp, #12
 80280e4:	af00      	add	r7, sp, #0
 80280e6:	6078      	str	r0, [r7, #4]
	n->socket = 0; //clear
 80280e8:	687b      	ldr	r3, [r7, #4]
 80280ea:	2200      	movs	r2, #0
 80280ec:	601a      	str	r2, [r3, #0]
	n->mqttread = net_read; //receive function
 80280ee:	687b      	ldr	r3, [r7, #4]
 80280f0:	4a06      	ldr	r2, [pc, #24]	@ (802810c <NewNetwork+0x2c>)
 80280f2:	605a      	str	r2, [r3, #4]
	n->mqttwrite = net_write; //send function
 80280f4:	687b      	ldr	r3, [r7, #4]
 80280f6:	4a06      	ldr	r2, [pc, #24]	@ (8028110 <NewNetwork+0x30>)
 80280f8:	609a      	str	r2, [r3, #8]
	n->disconnect = net_disconnect; //disconnection function
 80280fa:	687b      	ldr	r3, [r7, #4]
 80280fc:	4a05      	ldr	r2, [pc, #20]	@ (8028114 <NewNetwork+0x34>)
 80280fe:	60da      	str	r2, [r3, #12]
}
 8028100:	bf00      	nop
 8028102:	370c      	adds	r7, #12
 8028104:	46bd      	mov	sp, r7
 8028106:	f85d 7b04 	ldr.w	r7, [sp], #4
 802810a:	4770      	bx	lr
 802810c:	080281b5 	.word	0x080281b5
 8028110:	08028205 	.word	0x08028205
 8028114:	0802822b 	.word	0x0802822b

08028118 <ConnectNetwork>:

int ConnectNetwork(Network *n, char *ip, int port) {
 8028118:	b580      	push	{r7, lr}
 802811a:	b088      	sub	sp, #32
 802811c:	af00      	add	r7, sp, #0
 802811e:	60f8      	str	r0, [r7, #12]
 8028120:	60b9      	str	r1, [r7, #8]
 8028122:	607a      	str	r2, [r7, #4]
	struct sockaddr_in server_addr;

	if(n->socket)
 8028124:	68fb      	ldr	r3, [r7, #12]
 8028126:	681b      	ldr	r3, [r3, #0]
 8028128:	2b00      	cmp	r3, #0
 802812a:	d004      	beq.n	8028136 <ConnectNetwork+0x1e>
	{
		close(n->socket);
 802812c:	68fb      	ldr	r3, [r7, #12]
 802812e:	681b      	ldr	r3, [r3, #0]
 8028130:	4618      	mov	r0, r3
 8028132:	f7f0 fa65 	bl	8018600 <lwip_close>
	}

	n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
 8028136:	2200      	movs	r2, #0
 8028138:	2101      	movs	r1, #1
 802813a:	2002      	movs	r0, #2
 802813c:	f7f0 ff72 	bl	8019024 <lwip_socket>
 8028140:	4602      	mov	r2, r0
 8028142:	68fb      	ldr	r3, [r7, #12]
 8028144:	601a      	str	r2, [r3, #0]
	if(n->socket < 0)
 8028146:	68fb      	ldr	r3, [r7, #12]
 8028148:	681b      	ldr	r3, [r3, #0]
 802814a:	2b00      	cmp	r3, #0
 802814c:	da05      	bge.n	802815a <ConnectNetwork+0x42>
	{
		n->socket = 0;
 802814e:	68fb      	ldr	r3, [r7, #12]
 8028150:	2200      	movs	r2, #0
 8028152:	601a      	str	r2, [r3, #0]
		return -1;
 8028154:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028158:	e028      	b.n	80281ac <ConnectNetwork+0x94>
	}

	memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
 802815a:	f107 0310 	add.w	r3, r7, #16
 802815e:	2210      	movs	r2, #16
 8028160:	2100      	movs	r1, #0
 8028162:	4618      	mov	r0, r3
 8028164:	f002 fc8c 	bl	802aa80 <memset>
	server_addr.sin_family = AF_INET;
 8028168:	2302      	movs	r3, #2
 802816a:	747b      	strb	r3, [r7, #17]
	server_addr.sin_addr.s_addr = inet_addr(ip);
 802816c:	68b8      	ldr	r0, [r7, #8]
 802816e:	f7fd fde0 	bl	8025d32 <ipaddr_addr>
 8028172:	4603      	mov	r3, r0
 8028174:	617b      	str	r3, [r7, #20]
	server_addr.sin_port = htons(port);
 8028176:	687b      	ldr	r3, [r7, #4]
 8028178:	b29b      	uxth	r3, r3
 802817a:	4618      	mov	r0, r3
 802817c:	f7f1 fb94 	bl	80198a8 <lwip_htons>
 8028180:	4603      	mov	r3, r0
 8028182:	827b      	strh	r3, [r7, #18]

	if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
 8028184:	68fb      	ldr	r3, [r7, #12]
 8028186:	681b      	ldr	r3, [r3, #0]
 8028188:	f107 0110 	add.w	r1, r7, #16
 802818c:	2210      	movs	r2, #16
 802818e:	4618      	mov	r0, r3
 8028190:	f7f0 fa8c 	bl	80186ac <lwip_connect>
 8028194:	4603      	mov	r3, r0
 8028196:	2b00      	cmp	r3, #0
 8028198:	da07      	bge.n	80281aa <ConnectNetwork+0x92>
	{
		close(n->socket);
 802819a:	68fb      	ldr	r3, [r7, #12]
 802819c:	681b      	ldr	r3, [r3, #0]
 802819e:	4618      	mov	r0, r3
 80281a0:	f7f0 fa2e 	bl	8018600 <lwip_close>
		return -1;
 80281a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80281a8:	e000      	b.n	80281ac <ConnectNetwork+0x94>
	}
	return 0;
 80281aa:	2300      	movs	r3, #0
}
 80281ac:	4618      	mov	r0, r3
 80281ae:	3720      	adds	r7, #32
 80281b0:	46bd      	mov	sp, r7
 80281b2:	bd80      	pop	{r7, pc}

080281b4 <net_read>:

int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 80281b4:	b580      	push	{r7, lr}
 80281b6:	b086      	sub	sp, #24
 80281b8:	af00      	add	r7, sp, #0
 80281ba:	60f8      	str	r0, [r7, #12]
 80281bc:	60b9      	str	r1, [r7, #8]
 80281be:	607a      	str	r2, [r7, #4]
 80281c0:	603b      	str	r3, [r7, #0]
	int available;

	/* !!! LWIP_SO_RCVBUF must be enabled !!! */
	if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
 80281c2:	68fb      	ldr	r3, [r7, #12]
 80281c4:	681b      	ldr	r3, [r3, #0]
 80281c6:	f107 0214 	add.w	r2, r7, #20
 80281ca:	490d      	ldr	r1, [pc, #52]	@ (8028200 <net_read+0x4c>)
 80281cc:	4618      	mov	r0, r3
 80281ce:	f7f1 f917 	bl	8019400 <lwip_ioctl>
 80281d2:	4603      	mov	r3, r0
 80281d4:	2b00      	cmp	r3, #0
 80281d6:	da02      	bge.n	80281de <net_read+0x2a>
 80281d8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80281dc:	e00c      	b.n	80281f8 <net_read+0x44>

	if(available > 0)
 80281de:	697b      	ldr	r3, [r7, #20]
 80281e0:	2b00      	cmp	r3, #0
 80281e2:	dd08      	ble.n	80281f6 <net_read+0x42>
	{
		return recv(n->socket, buffer, len, 0);
 80281e4:	68fb      	ldr	r3, [r7, #12]
 80281e6:	6818      	ldr	r0, [r3, #0]
 80281e8:	687a      	ldr	r2, [r7, #4]
 80281ea:	2300      	movs	r3, #0
 80281ec:	68b9      	ldr	r1, [r7, #8]
 80281ee:	f7f0 fdf3 	bl	8018dd8 <lwip_recv>
 80281f2:	4603      	mov	r3, r0
 80281f4:	e000      	b.n	80281f8 <net_read+0x44>
	}

	return 0;
 80281f6:	2300      	movs	r3, #0
}
 80281f8:	4618      	mov	r0, r3
 80281fa:	3718      	adds	r7, #24
 80281fc:	46bd      	mov	sp, r7
 80281fe:	bd80      	pop	{r7, pc}
 8028200:	4004667f 	.word	0x4004667f

08028204 <net_write>:

int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8028204:	b580      	push	{r7, lr}
 8028206:	b084      	sub	sp, #16
 8028208:	af00      	add	r7, sp, #0
 802820a:	60f8      	str	r0, [r7, #12]
 802820c:	60b9      	str	r1, [r7, #8]
 802820e:	607a      	str	r2, [r7, #4]
 8028210:	603b      	str	r3, [r7, #0]
	return send(n->socket, buffer, len, 0);
 8028212:	68fb      	ldr	r3, [r7, #12]
 8028214:	6818      	ldr	r0, [r3, #0]
 8028216:	687a      	ldr	r2, [r7, #4]
 8028218:	2300      	movs	r3, #0
 802821a:	68b9      	ldr	r1, [r7, #8]
 802821c:	f7f0 fdf2 	bl	8018e04 <lwip_send>
 8028220:	4603      	mov	r3, r0
}
 8028222:	4618      	mov	r0, r3
 8028224:	3710      	adds	r7, #16
 8028226:	46bd      	mov	sp, r7
 8028228:	bd80      	pop	{r7, pc}

0802822a <net_disconnect>:

void net_disconnect(Network *n) {
 802822a:	b580      	push	{r7, lr}
 802822c:	b082      	sub	sp, #8
 802822e:	af00      	add	r7, sp, #0
 8028230:	6078      	str	r0, [r7, #4]
	close(n->socket);
 8028232:	687b      	ldr	r3, [r7, #4]
 8028234:	681b      	ldr	r3, [r3, #0]
 8028236:	4618      	mov	r0, r3
 8028238:	f7f0 f9e2 	bl	8018600 <lwip_close>
	n->socket = 0;
 802823c:	687b      	ldr	r3, [r7, #4]
 802823e:	2200      	movs	r2, #0
 8028240:	601a      	str	r2, [r3, #0]
}
 8028242:	bf00      	nop
 8028244:	3708      	adds	r7, #8
 8028246:	46bd      	mov	sp, r7
 8028248:	bd80      	pop	{r7, pc}

0802824a <MQTTSerialize_connectLength>:
  * Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
  * @param options the options to be used to build the connect packet
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
 802824a:	b590      	push	{r4, r7, lr}
 802824c:	b085      	sub	sp, #20
 802824e:	af00      	add	r7, sp, #0
 8028250:	6078      	str	r0, [r7, #4]
	int len = 0;
 8028252:	2300      	movs	r3, #0
 8028254:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;

	if (options->MQTTVersion == 3)
 8028256:	687b      	ldr	r3, [r7, #4]
 8028258:	7a1b      	ldrb	r3, [r3, #8]
 802825a:	2b03      	cmp	r3, #3
 802825c:	d102      	bne.n	8028264 <MQTTSerialize_connectLength+0x1a>
		len = 12; /* variable depending on MQTT or MQIsdp */
 802825e:	230c      	movs	r3, #12
 8028260:	60fb      	str	r3, [r7, #12]
 8028262:	e005      	b.n	8028270 <MQTTSerialize_connectLength+0x26>
	else if (options->MQTTVersion == 4)
 8028264:	687b      	ldr	r3, [r7, #4]
 8028266:	7a1b      	ldrb	r3, [r3, #8]
 8028268:	2b04      	cmp	r3, #4
 802826a:	d101      	bne.n	8028270 <MQTTSerialize_connectLength+0x26>
		len = 10;
 802826c:	230a      	movs	r3, #10
 802826e:	60fb      	str	r3, [r7, #12]

	len += MQTTstrlen(options->clientID)+2;
 8028270:	687b      	ldr	r3, [r7, #4]
 8028272:	330c      	adds	r3, #12
 8028274:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028278:	f000 fc43 	bl	8028b02 <MQTTstrlen>
 802827c:	4603      	mov	r3, r0
 802827e:	3302      	adds	r3, #2
 8028280:	68fa      	ldr	r2, [r7, #12]
 8028282:	4413      	add	r3, r2
 8028284:	60fb      	str	r3, [r7, #12]
	if (options->willFlag)
 8028286:	687b      	ldr	r3, [r7, #4]
 8028288:	7edb      	ldrb	r3, [r3, #27]
 802828a:	2b00      	cmp	r3, #0
 802828c:	d013      	beq.n	80282b6 <MQTTSerialize_connectLength+0x6c>
		len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
 802828e:	687b      	ldr	r3, [r7, #4]
 8028290:	3324      	adds	r3, #36	@ 0x24
 8028292:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028296:	f000 fc34 	bl	8028b02 <MQTTstrlen>
 802829a:	4603      	mov	r3, r0
 802829c:	1c9c      	adds	r4, r3, #2
 802829e:	687b      	ldr	r3, [r7, #4]
 80282a0:	3330      	adds	r3, #48	@ 0x30
 80282a2:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80282a6:	f000 fc2c 	bl	8028b02 <MQTTstrlen>
 80282aa:	4603      	mov	r3, r0
 80282ac:	4423      	add	r3, r4
 80282ae:	3302      	adds	r3, #2
 80282b0:	68fa      	ldr	r2, [r7, #12]
 80282b2:	4413      	add	r3, r2
 80282b4:	60fb      	str	r3, [r7, #12]
	if (options->username.cstring || options->username.lenstring.data)
 80282b6:	687b      	ldr	r3, [r7, #4]
 80282b8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80282ba:	2b00      	cmp	r3, #0
 80282bc:	d103      	bne.n	80282c6 <MQTTSerialize_connectLength+0x7c>
 80282be:	687b      	ldr	r3, [r7, #4]
 80282c0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80282c2:	2b00      	cmp	r3, #0
 80282c4:	d00a      	beq.n	80282dc <MQTTSerialize_connectLength+0x92>
		len += MQTTstrlen(options->username)+2;
 80282c6:	687b      	ldr	r3, [r7, #4]
 80282c8:	3340      	adds	r3, #64	@ 0x40
 80282ca:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80282ce:	f000 fc18 	bl	8028b02 <MQTTstrlen>
 80282d2:	4603      	mov	r3, r0
 80282d4:	3302      	adds	r3, #2
 80282d6:	68fa      	ldr	r2, [r7, #12]
 80282d8:	4413      	add	r3, r2
 80282da:	60fb      	str	r3, [r7, #12]
	if (options->password.cstring || options->password.lenstring.data)
 80282dc:	687b      	ldr	r3, [r7, #4]
 80282de:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80282e0:	2b00      	cmp	r3, #0
 80282e2:	d103      	bne.n	80282ec <MQTTSerialize_connectLength+0xa2>
 80282e4:	687b      	ldr	r3, [r7, #4]
 80282e6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80282e8:	2b00      	cmp	r3, #0
 80282ea:	d00a      	beq.n	8028302 <MQTTSerialize_connectLength+0xb8>
		len += MQTTstrlen(options->password)+2;
 80282ec:	687b      	ldr	r3, [r7, #4]
 80282ee:	334c      	adds	r3, #76	@ 0x4c
 80282f0:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80282f4:	f000 fc05 	bl	8028b02 <MQTTstrlen>
 80282f8:	4603      	mov	r3, r0
 80282fa:	3302      	adds	r3, #2
 80282fc:	68fa      	ldr	r2, [r7, #12]
 80282fe:	4413      	add	r3, r2
 8028300:	60fb      	str	r3, [r7, #12]

	FUNC_EXIT_RC(len);
	return len;
 8028302:	68fb      	ldr	r3, [r7, #12]
}
 8028304:	4618      	mov	r0, r3
 8028306:	3714      	adds	r7, #20
 8028308:	46bd      	mov	sp, r7
 802830a:	bd90      	pop	{r4, r7, pc}

0802830c <MQTTSerialize_connect>:
  * @param len the length in bytes of the supplied buffer
  * @param options the options to be used to build the connect packet
  * @return serialized length, or error if 0
  */
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
 802830c:	b580      	push	{r7, lr}
 802830e:	b08a      	sub	sp, #40	@ 0x28
 8028310:	af00      	add	r7, sp, #0
 8028312:	60f8      	str	r0, [r7, #12]
 8028314:	60b9      	str	r1, [r7, #8]
 8028316:	607a      	str	r2, [r7, #4]
	unsigned char *ptr = buf;
 8028318:	68fb      	ldr	r3, [r7, #12]
 802831a:	61fb      	str	r3, [r7, #28]
	MQTTHeader header = {0};
 802831c:	2300      	movs	r3, #0
 802831e:	61bb      	str	r3, [r7, #24]
	MQTTConnectFlags flags = {0};
 8028320:	2300      	movs	r3, #0
 8028322:	617b      	str	r3, [r7, #20]
	int len = 0;
 8028324:	2300      	movs	r3, #0
 8028326:	623b      	str	r3, [r7, #32]
	int rc = -1;
 8028328:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802832c:	627b      	str	r3, [r7, #36]	@ 0x24

	FUNC_ENTRY;
	if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
 802832e:	6878      	ldr	r0, [r7, #4]
 8028330:	f7ff ff8b 	bl	802824a <MQTTSerialize_connectLength>
 8028334:	6238      	str	r0, [r7, #32]
 8028336:	6a38      	ldr	r0, [r7, #32]
 8028338:	f000 fa98 	bl	802886c <MQTTPacket_len>
 802833c:	4602      	mov	r2, r0
 802833e:	68bb      	ldr	r3, [r7, #8]
 8028340:	4293      	cmp	r3, r2
 8028342:	da03      	bge.n	802834c <MQTTSerialize_connect+0x40>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028344:	f06f 0301 	mvn.w	r3, #1
 8028348:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 802834a:	e0c2      	b.n	80284d2 <MQTTSerialize_connect+0x1c6>
	}

	header.byte = 0;
 802834c:	2300      	movs	r3, #0
 802834e:	763b      	strb	r3, [r7, #24]
	header.bits.type = CONNECT;
 8028350:	7e3b      	ldrb	r3, [r7, #24]
 8028352:	2201      	movs	r2, #1
 8028354:	f362 1307 	bfi	r3, r2, #4, #4
 8028358:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802835a:	7e3a      	ldrb	r2, [r7, #24]
 802835c:	f107 031c 	add.w	r3, r7, #28
 8028360:	4611      	mov	r1, r2
 8028362:	4618      	mov	r0, r3
 8028364:	f000 fb11 	bl	802898a <writeChar>

	ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
 8028368:	69fb      	ldr	r3, [r7, #28]
 802836a:	6a39      	ldr	r1, [r7, #32]
 802836c:	4618      	mov	r0, r3
 802836e:	f000 fa12 	bl	8028796 <MQTTPacket_encode>
 8028372:	4602      	mov	r2, r0
 8028374:	69fb      	ldr	r3, [r7, #28]
 8028376:	4413      	add	r3, r2
 8028378:	61fb      	str	r3, [r7, #28]

	if (options->MQTTVersion == 4)
 802837a:	687b      	ldr	r3, [r7, #4]
 802837c:	7a1b      	ldrb	r3, [r3, #8]
 802837e:	2b04      	cmp	r3, #4
 8028380:	d10c      	bne.n	802839c <MQTTSerialize_connect+0x90>
	{
		writeCString(&ptr, "MQTT");
 8028382:	f107 031c 	add.w	r3, r7, #28
 8028386:	4955      	ldr	r1, [pc, #340]	@ (80284dc <MQTTSerialize_connect+0x1d0>)
 8028388:	4618      	mov	r0, r3
 802838a:	f000 fb3c 	bl	8028a06 <writeCString>
		writeChar(&ptr, (char) 4);
 802838e:	f107 031c 	add.w	r3, r7, #28
 8028392:	2104      	movs	r1, #4
 8028394:	4618      	mov	r0, r3
 8028396:	f000 faf8 	bl	802898a <writeChar>
 802839a:	e00b      	b.n	80283b4 <MQTTSerialize_connect+0xa8>
	}
	else
	{
		writeCString(&ptr, "MQIsdp");
 802839c:	f107 031c 	add.w	r3, r7, #28
 80283a0:	494f      	ldr	r1, [pc, #316]	@ (80284e0 <MQTTSerialize_connect+0x1d4>)
 80283a2:	4618      	mov	r0, r3
 80283a4:	f000 fb2f 	bl	8028a06 <writeCString>
		writeChar(&ptr, (char) 3);
 80283a8:	f107 031c 	add.w	r3, r7, #28
 80283ac:	2103      	movs	r1, #3
 80283ae:	4618      	mov	r0, r3
 80283b0:	f000 faeb 	bl	802898a <writeChar>
	}

	flags.all = 0;
 80283b4:	2300      	movs	r3, #0
 80283b6:	753b      	strb	r3, [r7, #20]
	flags.bits.cleansession = options->cleansession;
 80283b8:	687b      	ldr	r3, [r7, #4]
 80283ba:	7e9b      	ldrb	r3, [r3, #26]
 80283bc:	f003 0301 	and.w	r3, r3, #1
 80283c0:	b2da      	uxtb	r2, r3
 80283c2:	7d3b      	ldrb	r3, [r7, #20]
 80283c4:	f362 0341 	bfi	r3, r2, #1, #1
 80283c8:	753b      	strb	r3, [r7, #20]
	flags.bits.will = (options->willFlag) ? 1 : 0;
 80283ca:	687b      	ldr	r3, [r7, #4]
 80283cc:	7edb      	ldrb	r3, [r3, #27]
 80283ce:	2b00      	cmp	r3, #0
 80283d0:	bf14      	ite	ne
 80283d2:	2301      	movne	r3, #1
 80283d4:	2300      	moveq	r3, #0
 80283d6:	b2da      	uxtb	r2, r3
 80283d8:	7d3b      	ldrb	r3, [r7, #20]
 80283da:	f362 0382 	bfi	r3, r2, #2, #1
 80283de:	753b      	strb	r3, [r7, #20]
	if (flags.bits.will)
 80283e0:	7d3b      	ldrb	r3, [r7, #20]
 80283e2:	f003 0304 	and.w	r3, r3, #4
 80283e6:	b2db      	uxtb	r3, r3
 80283e8:	2b00      	cmp	r3, #0
 80283ea:	d013      	beq.n	8028414 <MQTTSerialize_connect+0x108>
	{
		flags.bits.willQoS = options->will.qos;
 80283ec:	687b      	ldr	r3, [r7, #4]
 80283ee:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 80283f2:	f003 0303 	and.w	r3, r3, #3
 80283f6:	b2da      	uxtb	r2, r3
 80283f8:	7d3b      	ldrb	r3, [r7, #20]
 80283fa:	f362 03c4 	bfi	r3, r2, #3, #2
 80283fe:	753b      	strb	r3, [r7, #20]
		flags.bits.willRetain = options->will.retained;
 8028400:	687b      	ldr	r3, [r7, #4]
 8028402:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
 8028406:	f003 0301 	and.w	r3, r3, #1
 802840a:	b2da      	uxtb	r2, r3
 802840c:	7d3b      	ldrb	r3, [r7, #20]
 802840e:	f362 1345 	bfi	r3, r2, #5, #1
 8028412:	753b      	strb	r3, [r7, #20]
	}

	if (options->username.cstring || options->username.lenstring.data)
 8028414:	687b      	ldr	r3, [r7, #4]
 8028416:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8028418:	2b00      	cmp	r3, #0
 802841a:	d103      	bne.n	8028424 <MQTTSerialize_connect+0x118>
 802841c:	687b      	ldr	r3, [r7, #4]
 802841e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8028420:	2b00      	cmp	r3, #0
 8028422:	d003      	beq.n	802842c <MQTTSerialize_connect+0x120>
		flags.bits.username = 1;
 8028424:	7d3b      	ldrb	r3, [r7, #20]
 8028426:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802842a:	753b      	strb	r3, [r7, #20]
	if (options->password.cstring || options->password.lenstring.data)
 802842c:	687b      	ldr	r3, [r7, #4]
 802842e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8028430:	2b00      	cmp	r3, #0
 8028432:	d103      	bne.n	802843c <MQTTSerialize_connect+0x130>
 8028434:	687b      	ldr	r3, [r7, #4]
 8028436:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8028438:	2b00      	cmp	r3, #0
 802843a:	d003      	beq.n	8028444 <MQTTSerialize_connect+0x138>
		flags.bits.password = 1;
 802843c:	7d3b      	ldrb	r3, [r7, #20]
 802843e:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8028442:	753b      	strb	r3, [r7, #20]

	writeChar(&ptr, flags.all);
 8028444:	7d3a      	ldrb	r2, [r7, #20]
 8028446:	f107 031c 	add.w	r3, r7, #28
 802844a:	4611      	mov	r1, r2
 802844c:	4618      	mov	r0, r3
 802844e:	f000 fa9c 	bl	802898a <writeChar>
	writeInt(&ptr, options->keepAliveInterval);
 8028452:	687b      	ldr	r3, [r7, #4]
 8028454:	8b1b      	ldrh	r3, [r3, #24]
 8028456:	461a      	mov	r2, r3
 8028458:	f107 031c 	add.w	r3, r7, #28
 802845c:	4611      	mov	r1, r2
 802845e:	4618      	mov	r0, r3
 8028460:	f000 faa8 	bl	80289b4 <writeInt>
	writeMQTTString(&ptr, options->clientID);
 8028464:	687b      	ldr	r3, [r7, #4]
 8028466:	f107 001c 	add.w	r0, r7, #28
 802846a:	330c      	adds	r3, #12
 802846c:	cb0e      	ldmia	r3, {r1, r2, r3}
 802846e:	f000 fae9 	bl	8028a44 <writeMQTTString>
	if (options->willFlag)
 8028472:	687b      	ldr	r3, [r7, #4]
 8028474:	7edb      	ldrb	r3, [r3, #27]
 8028476:	2b00      	cmp	r3, #0
 8028478:	d00d      	beq.n	8028496 <MQTTSerialize_connect+0x18a>
	{
		writeMQTTString(&ptr, options->will.topicName);
 802847a:	687b      	ldr	r3, [r7, #4]
 802847c:	f107 001c 	add.w	r0, r7, #28
 8028480:	3324      	adds	r3, #36	@ 0x24
 8028482:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028484:	f000 fade 	bl	8028a44 <writeMQTTString>
		writeMQTTString(&ptr, options->will.message);
 8028488:	687b      	ldr	r3, [r7, #4]
 802848a:	f107 001c 	add.w	r0, r7, #28
 802848e:	3330      	adds	r3, #48	@ 0x30
 8028490:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028492:	f000 fad7 	bl	8028a44 <writeMQTTString>
	}
	if (flags.bits.username)
 8028496:	7d3b      	ldrb	r3, [r7, #20]
 8028498:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
 802849c:	b2db      	uxtb	r3, r3
 802849e:	2b00      	cmp	r3, #0
 80284a0:	d006      	beq.n	80284b0 <MQTTSerialize_connect+0x1a4>
		writeMQTTString(&ptr, options->username);
 80284a2:	687b      	ldr	r3, [r7, #4]
 80284a4:	f107 001c 	add.w	r0, r7, #28
 80284a8:	3340      	adds	r3, #64	@ 0x40
 80284aa:	cb0e      	ldmia	r3, {r1, r2, r3}
 80284ac:	f000 faca 	bl	8028a44 <writeMQTTString>
	if (flags.bits.password)
 80284b0:	7d3b      	ldrb	r3, [r7, #20]
 80284b2:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80284b6:	b2db      	uxtb	r3, r3
 80284b8:	2b00      	cmp	r3, #0
 80284ba:	d006      	beq.n	80284ca <MQTTSerialize_connect+0x1be>
		writeMQTTString(&ptr, options->password);
 80284bc:	687b      	ldr	r3, [r7, #4]
 80284be:	f107 001c 	add.w	r0, r7, #28
 80284c2:	334c      	adds	r3, #76	@ 0x4c
 80284c4:	cb0e      	ldmia	r3, {r1, r2, r3}
 80284c6:	f000 fabd 	bl	8028a44 <writeMQTTString>

	rc = ptr - buf;
 80284ca:	69fa      	ldr	r2, [r7, #28]
 80284cc:	68fb      	ldr	r3, [r7, #12]
 80284ce:	1ad3      	subs	r3, r2, r3
 80284d0:	627b      	str	r3, [r7, #36]	@ 0x24

	exit: FUNC_EXIT_RC(rc);
	return rc;
 80284d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80284d4:	4618      	mov	r0, r3
 80284d6:	3728      	adds	r7, #40	@ 0x28
 80284d8:	46bd      	mov	sp, r7
 80284da:	bd80      	pop	{r7, pc}
 80284dc:	08031864 	.word	0x08031864
 80284e0:	0803186c 	.word	0x0803186c

080284e4 <MQTTDeserialize_connack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param len the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
 80284e4:	b580      	push	{r7, lr}
 80284e6:	b08a      	sub	sp, #40	@ 0x28
 80284e8:	af00      	add	r7, sp, #0
 80284ea:	60f8      	str	r0, [r7, #12]
 80284ec:	60b9      	str	r1, [r7, #8]
 80284ee:	607a      	str	r2, [r7, #4]
 80284f0:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80284f2:	2300      	movs	r3, #0
 80284f4:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80284f6:	687b      	ldr	r3, [r7, #4]
 80284f8:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80284fa:	2300      	movs	r3, #0
 80284fc:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80284fe:	2300      	movs	r3, #0
 8028500:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;
	MQTTConnackFlags flags = {0};
 8028502:	2300      	movs	r3, #0
 8028504:	613b      	str	r3, [r7, #16]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8028506:	f107 0318 	add.w	r3, r7, #24
 802850a:	4618      	mov	r0, r3
 802850c:	f000 fa29 	bl	8028962 <readChar>
 8028510:	4603      	mov	r3, r0
 8028512:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != CONNACK)
 8028514:	7f3b      	ldrb	r3, [r7, #28]
 8028516:	f023 030f 	bic.w	r3, r3, #15
 802851a:	b2db      	uxtb	r3, r3
 802851c:	2b20      	cmp	r3, #32
 802851e:	d12e      	bne.n	802857e <MQTTDeserialize_connack+0x9a>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028520:	69bb      	ldr	r3, [r7, #24]
 8028522:	f107 0214 	add.w	r2, r7, #20
 8028526:	4611      	mov	r1, r2
 8028528:	4618      	mov	r0, r3
 802852a:	f000 f9e9 	bl	8028900 <MQTTPacket_decodeBuf>
 802852e:	6278      	str	r0, [r7, #36]	@ 0x24
 8028530:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028532:	69bb      	ldr	r3, [r7, #24]
 8028534:	4413      	add	r3, r2
 8028536:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8028538:	69bb      	ldr	r3, [r7, #24]
 802853a:	697a      	ldr	r2, [r7, #20]
 802853c:	4413      	add	r3, r2
 802853e:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8028540:	69bb      	ldr	r3, [r7, #24]
 8028542:	6a3a      	ldr	r2, [r7, #32]
 8028544:	1ad3      	subs	r3, r2, r3
 8028546:	2b01      	cmp	r3, #1
 8028548:	dd1b      	ble.n	8028582 <MQTTDeserialize_connack+0x9e>
		goto exit;

	flags.all = readChar(&curdata);
 802854a:	f107 0318 	add.w	r3, r7, #24
 802854e:	4618      	mov	r0, r3
 8028550:	f000 fa07 	bl	8028962 <readChar>
 8028554:	4603      	mov	r3, r0
 8028556:	743b      	strb	r3, [r7, #16]
	*sessionPresent = flags.bits.sessionpresent;
 8028558:	7c3b      	ldrb	r3, [r7, #16]
 802855a:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802855e:	b2db      	uxtb	r3, r3
 8028560:	461a      	mov	r2, r3
 8028562:	68fb      	ldr	r3, [r7, #12]
 8028564:	701a      	strb	r2, [r3, #0]
	*connack_rc = readChar(&curdata);
 8028566:	f107 0318 	add.w	r3, r7, #24
 802856a:	4618      	mov	r0, r3
 802856c:	f000 f9f9 	bl	8028962 <readChar>
 8028570:	4603      	mov	r3, r0
 8028572:	461a      	mov	r2, r3
 8028574:	68bb      	ldr	r3, [r7, #8]
 8028576:	701a      	strb	r2, [r3, #0]

	rc = 1;
 8028578:	2301      	movs	r3, #1
 802857a:	627b      	str	r3, [r7, #36]	@ 0x24
 802857c:	e002      	b.n	8028584 <MQTTDeserialize_connack+0xa0>
		goto exit;
 802857e:	bf00      	nop
 8028580:	e000      	b.n	8028584 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8028582:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028584:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028586:	4618      	mov	r0, r3
 8028588:	3728      	adds	r7, #40	@ 0x28
 802858a:	46bd      	mov	sp, r7
 802858c:	bd80      	pop	{r7, pc}

0802858e <MQTTSerialize_zero>:
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @param packettype the message type
  * @return serialized length, or error if 0
  */
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
 802858e:	b580      	push	{r7, lr}
 8028590:	b088      	sub	sp, #32
 8028592:	af00      	add	r7, sp, #0
 8028594:	60f8      	str	r0, [r7, #12]
 8028596:	60b9      	str	r1, [r7, #8]
 8028598:	4613      	mov	r3, r2
 802859a:	71fb      	strb	r3, [r7, #7]
	MQTTHeader header = {0};
 802859c:	2300      	movs	r3, #0
 802859e:	61bb      	str	r3, [r7, #24]
	int rc = -1;
 80285a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80285a4:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 80285a6:	68fb      	ldr	r3, [r7, #12]
 80285a8:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 2)
 80285aa:	68bb      	ldr	r3, [r7, #8]
 80285ac:	2b01      	cmp	r3, #1
 80285ae:	dc03      	bgt.n	80285b8 <MQTTSerialize_zero+0x2a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 80285b0:	f06f 0301 	mvn.w	r3, #1
 80285b4:	61fb      	str	r3, [r7, #28]
		goto exit;
 80285b6:	e01d      	b.n	80285f4 <MQTTSerialize_zero+0x66>
	}
	header.byte = 0;
 80285b8:	2300      	movs	r3, #0
 80285ba:	763b      	strb	r3, [r7, #24]
	header.bits.type = packettype;
 80285bc:	79fb      	ldrb	r3, [r7, #7]
 80285be:	f003 030f 	and.w	r3, r3, #15
 80285c2:	b2da      	uxtb	r2, r3
 80285c4:	7e3b      	ldrb	r3, [r7, #24]
 80285c6:	f362 1307 	bfi	r3, r2, #4, #4
 80285ca:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 80285cc:	7e3a      	ldrb	r2, [r7, #24]
 80285ce:	f107 0314 	add.w	r3, r7, #20
 80285d2:	4611      	mov	r1, r2
 80285d4:	4618      	mov	r0, r3
 80285d6:	f000 f9d8 	bl	802898a <writeChar>

	ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
 80285da:	697b      	ldr	r3, [r7, #20]
 80285dc:	2100      	movs	r1, #0
 80285de:	4618      	mov	r0, r3
 80285e0:	f000 f8d9 	bl	8028796 <MQTTPacket_encode>
 80285e4:	4602      	mov	r2, r0
 80285e6:	697b      	ldr	r3, [r7, #20]
 80285e8:	4413      	add	r3, r2
 80285ea:	617b      	str	r3, [r7, #20]
	rc = ptr - buf;
 80285ec:	697a      	ldr	r2, [r7, #20]
 80285ee:	68fb      	ldr	r3, [r7, #12]
 80285f0:	1ad3      	subs	r3, r2, r3
 80285f2:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80285f4:	69fb      	ldr	r3, [r7, #28]
}
 80285f6:	4618      	mov	r0, r3
 80285f8:	3720      	adds	r7, #32
 80285fa:	46bd      	mov	sp, r7
 80285fc:	bd80      	pop	{r7, pc}

080285fe <MQTTSerialize_pingreq>:
  * @param buf the buffer into which the packet will be serialized
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @return serialized length, or error if 0
  */
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
 80285fe:	b580      	push	{r7, lr}
 8028600:	b082      	sub	sp, #8
 8028602:	af00      	add	r7, sp, #0
 8028604:	6078      	str	r0, [r7, #4]
 8028606:	6039      	str	r1, [r7, #0]
	return MQTTSerialize_zero(buf, buflen, PINGREQ);
 8028608:	220c      	movs	r2, #12
 802860a:	6839      	ldr	r1, [r7, #0]
 802860c:	6878      	ldr	r0, [r7, #4]
 802860e:	f7ff ffbe 	bl	802858e <MQTTSerialize_zero>
 8028612:	4603      	mov	r3, r0
}
 8028614:	4618      	mov	r0, r3
 8028616:	3708      	adds	r7, #8
 8028618:	46bd      	mov	sp, r7
 802861a:	bd80      	pop	{r7, pc}

0802861c <MQTTDeserialize_publish>:
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success
  */
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
		unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
 802861c:	b580      	push	{r7, lr}
 802861e:	b08a      	sub	sp, #40	@ 0x28
 8028620:	af00      	add	r7, sp, #0
 8028622:	60f8      	str	r0, [r7, #12]
 8028624:	60b9      	str	r1, [r7, #8]
 8028626:	607a      	str	r2, [r7, #4]
 8028628:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802862a:	2300      	movs	r3, #0
 802862c:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 802862e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8028630:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028632:	2300      	movs	r3, #0
 8028634:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028636:	2300      	movs	r3, #0
 8028638:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen = 0;
 802863a:	2300      	movs	r3, #0
 802863c:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802863e:	f107 0318 	add.w	r3, r7, #24
 8028642:	4618      	mov	r0, r3
 8028644:	f000 f98d 	bl	8028962 <readChar>
 8028648:	4603      	mov	r3, r0
 802864a:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != PUBLISH)
 802864c:	7f3b      	ldrb	r3, [r7, #28]
 802864e:	f023 030f 	bic.w	r3, r3, #15
 8028652:	b2db      	uxtb	r3, r3
 8028654:	2b30      	cmp	r3, #48	@ 0x30
 8028656:	d14b      	bne.n	80286f0 <MQTTDeserialize_publish+0xd4>
		goto exit;
	*dup = header.bits.dup;
 8028658:	7f3b      	ldrb	r3, [r7, #28]
 802865a:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 802865e:	b2db      	uxtb	r3, r3
 8028660:	461a      	mov	r2, r3
 8028662:	68fb      	ldr	r3, [r7, #12]
 8028664:	701a      	strb	r2, [r3, #0]
	*qos = header.bits.qos;
 8028666:	7f3b      	ldrb	r3, [r7, #28]
 8028668:	f3c3 0341 	ubfx	r3, r3, #1, #2
 802866c:	b2db      	uxtb	r3, r3
 802866e:	461a      	mov	r2, r3
 8028670:	68bb      	ldr	r3, [r7, #8]
 8028672:	601a      	str	r2, [r3, #0]
	*retained = header.bits.retain;
 8028674:	7f3b      	ldrb	r3, [r7, #28]
 8028676:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802867a:	b2db      	uxtb	r3, r3
 802867c:	461a      	mov	r2, r3
 802867e:	687b      	ldr	r3, [r7, #4]
 8028680:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028682:	69bb      	ldr	r3, [r7, #24]
 8028684:	f107 0214 	add.w	r2, r7, #20
 8028688:	4611      	mov	r1, r2
 802868a:	4618      	mov	r0, r3
 802868c:	f000 f938 	bl	8028900 <MQTTPacket_decodeBuf>
 8028690:	6278      	str	r0, [r7, #36]	@ 0x24
 8028692:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028694:	69bb      	ldr	r3, [r7, #24]
 8028696:	4413      	add	r3, r2
 8028698:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802869a:	69bb      	ldr	r3, [r7, #24]
 802869c:	697a      	ldr	r2, [r7, #20]
 802869e:	4413      	add	r3, r2
 80286a0:	623b      	str	r3, [r7, #32]

	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 80286a2:	f107 0318 	add.w	r3, r7, #24
 80286a6:	6a3a      	ldr	r2, [r7, #32]
 80286a8:	4619      	mov	r1, r3
 80286aa:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80286ac:	f000 f9f8 	bl	8028aa0 <readMQTTLenString>
 80286b0:	4603      	mov	r3, r0
 80286b2:	2b00      	cmp	r3, #0
 80286b4:	d01e      	beq.n	80286f4 <MQTTDeserialize_publish+0xd8>
		enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
 80286b6:	69bb      	ldr	r3, [r7, #24]
 80286b8:	6a3a      	ldr	r2, [r7, #32]
 80286ba:	1ad3      	subs	r3, r2, r3
	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 80286bc:	2b00      	cmp	r3, #0
 80286be:	db19      	blt.n	80286f4 <MQTTDeserialize_publish+0xd8>
		goto exit;

	if (*qos > 0)
 80286c0:	68bb      	ldr	r3, [r7, #8]
 80286c2:	681b      	ldr	r3, [r3, #0]
 80286c4:	2b00      	cmp	r3, #0
 80286c6:	dd08      	ble.n	80286da <MQTTDeserialize_publish+0xbe>
		*packetid = readInt(&curdata);
 80286c8:	f107 0318 	add.w	r3, r7, #24
 80286cc:	4618      	mov	r0, r3
 80286ce:	f000 f92d 	bl	802892c <readInt>
 80286d2:	4603      	mov	r3, r0
 80286d4:	b29a      	uxth	r2, r3
 80286d6:	683b      	ldr	r3, [r7, #0]
 80286d8:	801a      	strh	r2, [r3, #0]

	*payloadlen = enddata - curdata;
 80286da:	69bb      	ldr	r3, [r7, #24]
 80286dc:	6a3a      	ldr	r2, [r7, #32]
 80286de:	1ad2      	subs	r2, r2, r3
 80286e0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80286e2:	601a      	str	r2, [r3, #0]
	*payload = curdata;
 80286e4:	69ba      	ldr	r2, [r7, #24]
 80286e6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80286e8:	601a      	str	r2, [r3, #0]
	rc = 1;
 80286ea:	2301      	movs	r3, #1
 80286ec:	627b      	str	r3, [r7, #36]	@ 0x24
 80286ee:	e002      	b.n	80286f6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80286f0:	bf00      	nop
 80286f2:	e000      	b.n	80286f6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80286f4:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80286f6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80286f8:	4618      	mov	r0, r3
 80286fa:	3728      	adds	r7, #40	@ 0x28
 80286fc:	46bd      	mov	sp, r7
 80286fe:	bd80      	pop	{r7, pc}

08028700 <MQTTDeserialize_ack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
 8028700:	b580      	push	{r7, lr}
 8028702:	b08a      	sub	sp, #40	@ 0x28
 8028704:	af00      	add	r7, sp, #0
 8028706:	60f8      	str	r0, [r7, #12]
 8028708:	60b9      	str	r1, [r7, #8]
 802870a:	607a      	str	r2, [r7, #4]
 802870c:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802870e:	2300      	movs	r3, #0
 8028710:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028712:	683b      	ldr	r3, [r7, #0]
 8028714:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028716:	2300      	movs	r3, #0
 8028718:	623b      	str	r3, [r7, #32]
	int rc = 0;
 802871a:	2300      	movs	r3, #0
 802871c:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802871e:	f107 0318 	add.w	r3, r7, #24
 8028722:	4618      	mov	r0, r3
 8028724:	f000 f91d 	bl	8028962 <readChar>
 8028728:	4603      	mov	r3, r0
 802872a:	773b      	strb	r3, [r7, #28]
	*dup = header.bits.dup;
 802872c:	7f3b      	ldrb	r3, [r7, #28]
 802872e:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 8028732:	b2db      	uxtb	r3, r3
 8028734:	461a      	mov	r2, r3
 8028736:	68bb      	ldr	r3, [r7, #8]
 8028738:	701a      	strb	r2, [r3, #0]
	*packettype = header.bits.type;
 802873a:	7f3b      	ldrb	r3, [r7, #28]
 802873c:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8028740:	b2db      	uxtb	r3, r3
 8028742:	461a      	mov	r2, r3
 8028744:	68fb      	ldr	r3, [r7, #12]
 8028746:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028748:	69bb      	ldr	r3, [r7, #24]
 802874a:	f107 0214 	add.w	r2, r7, #20
 802874e:	4611      	mov	r1, r2
 8028750:	4618      	mov	r0, r3
 8028752:	f000 f8d5 	bl	8028900 <MQTTPacket_decodeBuf>
 8028756:	6278      	str	r0, [r7, #36]	@ 0x24
 8028758:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802875a:	69bb      	ldr	r3, [r7, #24]
 802875c:	4413      	add	r3, r2
 802875e:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8028760:	69bb      	ldr	r3, [r7, #24]
 8028762:	697a      	ldr	r2, [r7, #20]
 8028764:	4413      	add	r3, r2
 8028766:	623b      	str	r3, [r7, #32]

	if (enddata - curdata < 2)
 8028768:	69bb      	ldr	r3, [r7, #24]
 802876a:	6a3a      	ldr	r2, [r7, #32]
 802876c:	1ad3      	subs	r3, r2, r3
 802876e:	2b01      	cmp	r3, #1
 8028770:	dd0b      	ble.n	802878a <MQTTDeserialize_ack+0x8a>
		goto exit;
	*packetid = readInt(&curdata);
 8028772:	f107 0318 	add.w	r3, r7, #24
 8028776:	4618      	mov	r0, r3
 8028778:	f000 f8d8 	bl	802892c <readInt>
 802877c:	4603      	mov	r3, r0
 802877e:	b29a      	uxth	r2, r3
 8028780:	687b      	ldr	r3, [r7, #4]
 8028782:	801a      	strh	r2, [r3, #0]

	rc = 1;
 8028784:	2301      	movs	r3, #1
 8028786:	627b      	str	r3, [r7, #36]	@ 0x24
 8028788:	e000      	b.n	802878c <MQTTDeserialize_ack+0x8c>
		goto exit;
 802878a:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 802878c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 802878e:	4618      	mov	r0, r3
 8028790:	3728      	adds	r7, #40	@ 0x28
 8028792:	46bd      	mov	sp, r7
 8028794:	bd80      	pop	{r7, pc}

08028796 <MQTTPacket_encode>:
 * @param buf the buffer into which the encoded data is written
 * @param length the length to be encoded
 * @return the number of bytes written to buffer
 */
int MQTTPacket_encode(unsigned char* buf, int length)
{
 8028796:	b480      	push	{r7}
 8028798:	b085      	sub	sp, #20
 802879a:	af00      	add	r7, sp, #0
 802879c:	6078      	str	r0, [r7, #4]
 802879e:	6039      	str	r1, [r7, #0]
	int rc = 0;
 80287a0:	2300      	movs	r3, #0
 80287a2:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;
	do
	{
		char d = length % 128;
 80287a4:	683b      	ldr	r3, [r7, #0]
 80287a6:	425a      	negs	r2, r3
 80287a8:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80287ac:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 80287b0:	bf58      	it	pl
 80287b2:	4253      	negpl	r3, r2
 80287b4:	72fb      	strb	r3, [r7, #11]
		length /= 128;
 80287b6:	683b      	ldr	r3, [r7, #0]
 80287b8:	2b00      	cmp	r3, #0
 80287ba:	da00      	bge.n	80287be <MQTTPacket_encode+0x28>
 80287bc:	337f      	adds	r3, #127	@ 0x7f
 80287be:	11db      	asrs	r3, r3, #7
 80287c0:	603b      	str	r3, [r7, #0]
		/* if there are more digits to encode, set the top bit of this digit */
		if (length > 0)
 80287c2:	683b      	ldr	r3, [r7, #0]
 80287c4:	2b00      	cmp	r3, #0
 80287c6:	dd03      	ble.n	80287d0 <MQTTPacket_encode+0x3a>
			d |= 0x80;
 80287c8:	7afb      	ldrb	r3, [r7, #11]
 80287ca:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 80287ce:	72fb      	strb	r3, [r7, #11]
		buf[rc++] = d;
 80287d0:	68fb      	ldr	r3, [r7, #12]
 80287d2:	1c5a      	adds	r2, r3, #1
 80287d4:	60fa      	str	r2, [r7, #12]
 80287d6:	461a      	mov	r2, r3
 80287d8:	687b      	ldr	r3, [r7, #4]
 80287da:	4413      	add	r3, r2
 80287dc:	7afa      	ldrb	r2, [r7, #11]
 80287de:	701a      	strb	r2, [r3, #0]
	} while (length > 0);
 80287e0:	683b      	ldr	r3, [r7, #0]
 80287e2:	2b00      	cmp	r3, #0
 80287e4:	dcde      	bgt.n	80287a4 <MQTTPacket_encode+0xe>
	FUNC_EXIT_RC(rc);
	return rc;
 80287e6:	68fb      	ldr	r3, [r7, #12]
}
 80287e8:	4618      	mov	r0, r3
 80287ea:	3714      	adds	r7, #20
 80287ec:	46bd      	mov	sp, r7
 80287ee:	f85d 7b04 	ldr.w	r7, [sp], #4
 80287f2:	4770      	bx	lr

080287f4 <MQTTPacket_decode>:
 * @param getcharfn pointer to function to read the next character from the data source
 * @param value the decoded length returned
 * @return the number of bytes read from the socket
 */
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
 80287f4:	b580      	push	{r7, lr}
 80287f6:	b086      	sub	sp, #24
 80287f8:	af00      	add	r7, sp, #0
 80287fa:	6078      	str	r0, [r7, #4]
 80287fc:	6039      	str	r1, [r7, #0]
	unsigned char c;
	int multiplier = 1;
 80287fe:	2301      	movs	r3, #1
 8028800:	617b      	str	r3, [r7, #20]
	int len = 0;
 8028802:	2300      	movs	r3, #0
 8028804:	613b      	str	r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4

	FUNC_ENTRY;
	*value = 0;
 8028806:	683b      	ldr	r3, [r7, #0]
 8028808:	2200      	movs	r2, #0
 802880a:	601a      	str	r2, [r3, #0]
	do
	{
		int rc = MQTTPACKET_READ_ERROR;
 802880c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028810:	60fb      	str	r3, [r7, #12]

		if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 8028812:	693b      	ldr	r3, [r7, #16]
 8028814:	3301      	adds	r3, #1
 8028816:	613b      	str	r3, [r7, #16]
 8028818:	693b      	ldr	r3, [r7, #16]
 802881a:	2b04      	cmp	r3, #4
 802881c:	dd03      	ble.n	8028826 <MQTTPacket_decode+0x32>
		{
			rc = MQTTPACKET_READ_ERROR;	/* bad data */
 802881e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028822:	60fb      	str	r3, [r7, #12]
			goto exit;
 8028824:	e01d      	b.n	8028862 <MQTTPacket_decode+0x6e>
		}
		rc = (*getcharfn)(&c, 1);
 8028826:	f107 020b 	add.w	r2, r7, #11
 802882a:	687b      	ldr	r3, [r7, #4]
 802882c:	2101      	movs	r1, #1
 802882e:	4610      	mov	r0, r2
 8028830:	4798      	blx	r3
 8028832:	60f8      	str	r0, [r7, #12]
		if (rc != 1)
 8028834:	68fb      	ldr	r3, [r7, #12]
 8028836:	2b01      	cmp	r3, #1
 8028838:	d112      	bne.n	8028860 <MQTTPacket_decode+0x6c>
			goto exit;
		*value += (c & 127) * multiplier;
 802883a:	683b      	ldr	r3, [r7, #0]
 802883c:	681a      	ldr	r2, [r3, #0]
 802883e:	7afb      	ldrb	r3, [r7, #11]
 8028840:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8028844:	6979      	ldr	r1, [r7, #20]
 8028846:	fb01 f303 	mul.w	r3, r1, r3
 802884a:	441a      	add	r2, r3
 802884c:	683b      	ldr	r3, [r7, #0]
 802884e:	601a      	str	r2, [r3, #0]
		multiplier *= 128;
 8028850:	697b      	ldr	r3, [r7, #20]
 8028852:	01db      	lsls	r3, r3, #7
 8028854:	617b      	str	r3, [r7, #20]
	} while ((c & 128) != 0);
 8028856:	7afb      	ldrb	r3, [r7, #11]
 8028858:	b25b      	sxtb	r3, r3
 802885a:	2b00      	cmp	r3, #0
 802885c:	dbd6      	blt.n	802880c <MQTTPacket_decode+0x18>
exit:
 802885e:	e000      	b.n	8028862 <MQTTPacket_decode+0x6e>
			goto exit;
 8028860:	bf00      	nop
	FUNC_EXIT_RC(len);
	return len;
 8028862:	693b      	ldr	r3, [r7, #16]
}
 8028864:	4618      	mov	r0, r3
 8028866:	3718      	adds	r7, #24
 8028868:	46bd      	mov	sp, r7
 802886a:	bd80      	pop	{r7, pc}

0802886c <MQTTPacket_len>:


int MQTTPacket_len(int rem_len)
{
 802886c:	b480      	push	{r7}
 802886e:	b083      	sub	sp, #12
 8028870:	af00      	add	r7, sp, #0
 8028872:	6078      	str	r0, [r7, #4]
	rem_len += 1; /* header byte */
 8028874:	687b      	ldr	r3, [r7, #4]
 8028876:	3301      	adds	r3, #1
 8028878:	607b      	str	r3, [r7, #4]

	/* now remaining_length field */
	if (rem_len < 128)
 802887a:	687b      	ldr	r3, [r7, #4]
 802887c:	2b7f      	cmp	r3, #127	@ 0x7f
 802887e:	dc03      	bgt.n	8028888 <MQTTPacket_len+0x1c>
		rem_len += 1;
 8028880:	687b      	ldr	r3, [r7, #4]
 8028882:	3301      	adds	r3, #1
 8028884:	607b      	str	r3, [r7, #4]
 8028886:	e012      	b.n	80288ae <MQTTPacket_len+0x42>
	else if (rem_len < 16384)
 8028888:	687b      	ldr	r3, [r7, #4]
 802888a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 802888e:	da03      	bge.n	8028898 <MQTTPacket_len+0x2c>
		rem_len += 2;
 8028890:	687b      	ldr	r3, [r7, #4]
 8028892:	3302      	adds	r3, #2
 8028894:	607b      	str	r3, [r7, #4]
 8028896:	e00a      	b.n	80288ae <MQTTPacket_len+0x42>
	else if (rem_len < 2097151)
 8028898:	687b      	ldr	r3, [r7, #4]
 802889a:	4a08      	ldr	r2, [pc, #32]	@ (80288bc <MQTTPacket_len+0x50>)
 802889c:	4293      	cmp	r3, r2
 802889e:	dc03      	bgt.n	80288a8 <MQTTPacket_len+0x3c>
		rem_len += 3;
 80288a0:	687b      	ldr	r3, [r7, #4]
 80288a2:	3303      	adds	r3, #3
 80288a4:	607b      	str	r3, [r7, #4]
 80288a6:	e002      	b.n	80288ae <MQTTPacket_len+0x42>
	else
		rem_len += 4;
 80288a8:	687b      	ldr	r3, [r7, #4]
 80288aa:	3304      	adds	r3, #4
 80288ac:	607b      	str	r3, [r7, #4]
	return rem_len;
 80288ae:	687b      	ldr	r3, [r7, #4]
}
 80288b0:	4618      	mov	r0, r3
 80288b2:	370c      	adds	r7, #12
 80288b4:	46bd      	mov	sp, r7
 80288b6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80288ba:	4770      	bx	lr
 80288bc:	001ffffe 	.word	0x001ffffe

080288c0 <bufchar>:


static unsigned char* bufptr;

int bufchar(unsigned char* c, int count)
{
 80288c0:	b480      	push	{r7}
 80288c2:	b085      	sub	sp, #20
 80288c4:	af00      	add	r7, sp, #0
 80288c6:	6078      	str	r0, [r7, #4]
 80288c8:	6039      	str	r1, [r7, #0]
	int i;

	for (i = 0; i < count; ++i)
 80288ca:	2300      	movs	r3, #0
 80288cc:	60fb      	str	r3, [r7, #12]
 80288ce:	e00a      	b.n	80288e6 <bufchar+0x26>
		*c = *bufptr++;
 80288d0:	4b0a      	ldr	r3, [pc, #40]	@ (80288fc <bufchar+0x3c>)
 80288d2:	681b      	ldr	r3, [r3, #0]
 80288d4:	1c5a      	adds	r2, r3, #1
 80288d6:	4909      	ldr	r1, [pc, #36]	@ (80288fc <bufchar+0x3c>)
 80288d8:	600a      	str	r2, [r1, #0]
 80288da:	781a      	ldrb	r2, [r3, #0]
 80288dc:	687b      	ldr	r3, [r7, #4]
 80288de:	701a      	strb	r2, [r3, #0]
	for (i = 0; i < count; ++i)
 80288e0:	68fb      	ldr	r3, [r7, #12]
 80288e2:	3301      	adds	r3, #1
 80288e4:	60fb      	str	r3, [r7, #12]
 80288e6:	68fa      	ldr	r2, [r7, #12]
 80288e8:	683b      	ldr	r3, [r7, #0]
 80288ea:	429a      	cmp	r2, r3
 80288ec:	dbf0      	blt.n	80288d0 <bufchar+0x10>
	return count;
 80288ee:	683b      	ldr	r3, [r7, #0]
}
 80288f0:	4618      	mov	r0, r3
 80288f2:	3714      	adds	r7, #20
 80288f4:	46bd      	mov	sp, r7
 80288f6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80288fa:	4770      	bx	lr
 80288fc:	2402b118 	.word	0x2402b118

08028900 <MQTTPacket_decodeBuf>:


int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
 8028900:	b580      	push	{r7, lr}
 8028902:	b082      	sub	sp, #8
 8028904:	af00      	add	r7, sp, #0
 8028906:	6078      	str	r0, [r7, #4]
 8028908:	6039      	str	r1, [r7, #0]
	bufptr = buf;
 802890a:	4a06      	ldr	r2, [pc, #24]	@ (8028924 <MQTTPacket_decodeBuf+0x24>)
 802890c:	687b      	ldr	r3, [r7, #4]
 802890e:	6013      	str	r3, [r2, #0]
	return MQTTPacket_decode(bufchar, value);
 8028910:	6839      	ldr	r1, [r7, #0]
 8028912:	4805      	ldr	r0, [pc, #20]	@ (8028928 <MQTTPacket_decodeBuf+0x28>)
 8028914:	f7ff ff6e 	bl	80287f4 <MQTTPacket_decode>
 8028918:	4603      	mov	r3, r0
}
 802891a:	4618      	mov	r0, r3
 802891c:	3708      	adds	r7, #8
 802891e:	46bd      	mov	sp, r7
 8028920:	bd80      	pop	{r7, pc}
 8028922:	bf00      	nop
 8028924:	2402b118 	.word	0x2402b118
 8028928:	080288c1 	.word	0x080288c1

0802892c <readInt>:
 * Calculates an integer from two bytes read from the input buffer
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the integer value calculated
 */
int readInt(unsigned char** pptr)
{
 802892c:	b480      	push	{r7}
 802892e:	b085      	sub	sp, #20
 8028930:	af00      	add	r7, sp, #0
 8028932:	6078      	str	r0, [r7, #4]
	unsigned char* ptr = *pptr;
 8028934:	687b      	ldr	r3, [r7, #4]
 8028936:	681b      	ldr	r3, [r3, #0]
 8028938:	60fb      	str	r3, [r7, #12]
	int len = 256*(*ptr) + (*(ptr+1));
 802893a:	68fb      	ldr	r3, [r7, #12]
 802893c:	781b      	ldrb	r3, [r3, #0]
 802893e:	021b      	lsls	r3, r3, #8
 8028940:	68fa      	ldr	r2, [r7, #12]
 8028942:	3201      	adds	r2, #1
 8028944:	7812      	ldrb	r2, [r2, #0]
 8028946:	4413      	add	r3, r2
 8028948:	60bb      	str	r3, [r7, #8]
	*pptr += 2;
 802894a:	687b      	ldr	r3, [r7, #4]
 802894c:	681b      	ldr	r3, [r3, #0]
 802894e:	1c9a      	adds	r2, r3, #2
 8028950:	687b      	ldr	r3, [r7, #4]
 8028952:	601a      	str	r2, [r3, #0]
	return len;
 8028954:	68bb      	ldr	r3, [r7, #8]
}
 8028956:	4618      	mov	r0, r3
 8028958:	3714      	adds	r7, #20
 802895a:	46bd      	mov	sp, r7
 802895c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028960:	4770      	bx	lr

08028962 <readChar>:
 * Reads one character from the input buffer.
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the character read
 */
char readChar(unsigned char** pptr)
{
 8028962:	b480      	push	{r7}
 8028964:	b085      	sub	sp, #20
 8028966:	af00      	add	r7, sp, #0
 8028968:	6078      	str	r0, [r7, #4]
	char c = **pptr;
 802896a:	687b      	ldr	r3, [r7, #4]
 802896c:	681b      	ldr	r3, [r3, #0]
 802896e:	781b      	ldrb	r3, [r3, #0]
 8028970:	73fb      	strb	r3, [r7, #15]
	(*pptr)++;
 8028972:	687b      	ldr	r3, [r7, #4]
 8028974:	681b      	ldr	r3, [r3, #0]
 8028976:	1c5a      	adds	r2, r3, #1
 8028978:	687b      	ldr	r3, [r7, #4]
 802897a:	601a      	str	r2, [r3, #0]
	return c;
 802897c:	7bfb      	ldrb	r3, [r7, #15]
}
 802897e:	4618      	mov	r0, r3
 8028980:	3714      	adds	r7, #20
 8028982:	46bd      	mov	sp, r7
 8028984:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028988:	4770      	bx	lr

0802898a <writeChar>:
 * Writes one character to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param c the character to write
 */
void writeChar(unsigned char** pptr, char c)
{
 802898a:	b480      	push	{r7}
 802898c:	b083      	sub	sp, #12
 802898e:	af00      	add	r7, sp, #0
 8028990:	6078      	str	r0, [r7, #4]
 8028992:	460b      	mov	r3, r1
 8028994:	70fb      	strb	r3, [r7, #3]
	**pptr = c;
 8028996:	687b      	ldr	r3, [r7, #4]
 8028998:	681b      	ldr	r3, [r3, #0]
 802899a:	78fa      	ldrb	r2, [r7, #3]
 802899c:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 802899e:	687b      	ldr	r3, [r7, #4]
 80289a0:	681b      	ldr	r3, [r3, #0]
 80289a2:	1c5a      	adds	r2, r3, #1
 80289a4:	687b      	ldr	r3, [r7, #4]
 80289a6:	601a      	str	r2, [r3, #0]
}
 80289a8:	bf00      	nop
 80289aa:	370c      	adds	r7, #12
 80289ac:	46bd      	mov	sp, r7
 80289ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80289b2:	4770      	bx	lr

080289b4 <writeInt>:
 * Writes an integer as 2 bytes to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param anInt the integer to write
 */
void writeInt(unsigned char** pptr, int anInt)
{
 80289b4:	b480      	push	{r7}
 80289b6:	b083      	sub	sp, #12
 80289b8:	af00      	add	r7, sp, #0
 80289ba:	6078      	str	r0, [r7, #4]
 80289bc:	6039      	str	r1, [r7, #0]
	**pptr = (unsigned char)(anInt / 256);
 80289be:	683b      	ldr	r3, [r7, #0]
 80289c0:	2b00      	cmp	r3, #0
 80289c2:	da00      	bge.n	80289c6 <writeInt+0x12>
 80289c4:	33ff      	adds	r3, #255	@ 0xff
 80289c6:	121b      	asrs	r3, r3, #8
 80289c8:	461a      	mov	r2, r3
 80289ca:	687b      	ldr	r3, [r7, #4]
 80289cc:	681b      	ldr	r3, [r3, #0]
 80289ce:	b2d2      	uxtb	r2, r2
 80289d0:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 80289d2:	687b      	ldr	r3, [r7, #4]
 80289d4:	681b      	ldr	r3, [r3, #0]
 80289d6:	1c5a      	adds	r2, r3, #1
 80289d8:	687b      	ldr	r3, [r7, #4]
 80289da:	601a      	str	r2, [r3, #0]
	**pptr = (unsigned char)(anInt % 256);
 80289dc:	683b      	ldr	r3, [r7, #0]
 80289de:	425a      	negs	r2, r3
 80289e0:	b2db      	uxtb	r3, r3
 80289e2:	b2d2      	uxtb	r2, r2
 80289e4:	bf58      	it	pl
 80289e6:	4253      	negpl	r3, r2
 80289e8:	687a      	ldr	r2, [r7, #4]
 80289ea:	6812      	ldr	r2, [r2, #0]
 80289ec:	b2db      	uxtb	r3, r3
 80289ee:	7013      	strb	r3, [r2, #0]
	(*pptr)++;
 80289f0:	687b      	ldr	r3, [r7, #4]
 80289f2:	681b      	ldr	r3, [r3, #0]
 80289f4:	1c5a      	adds	r2, r3, #1
 80289f6:	687b      	ldr	r3, [r7, #4]
 80289f8:	601a      	str	r2, [r3, #0]
}
 80289fa:	bf00      	nop
 80289fc:	370c      	adds	r7, #12
 80289fe:	46bd      	mov	sp, r7
 8028a00:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028a04:	4770      	bx	lr

08028a06 <writeCString>:
 * Writes a "UTF" string to an output buffer.  Converts C string to length-delimited.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param string the C string to write
 */
void writeCString(unsigned char** pptr, const char* string)
{
 8028a06:	b580      	push	{r7, lr}
 8028a08:	b084      	sub	sp, #16
 8028a0a:	af00      	add	r7, sp, #0
 8028a0c:	6078      	str	r0, [r7, #4]
 8028a0e:	6039      	str	r1, [r7, #0]
	int len = strlen(string);
 8028a10:	6838      	ldr	r0, [r7, #0]
 8028a12:	f7d7 fcc5 	bl	80003a0 <strlen>
 8028a16:	4603      	mov	r3, r0
 8028a18:	60fb      	str	r3, [r7, #12]
	writeInt(pptr, len);
 8028a1a:	68f9      	ldr	r1, [r7, #12]
 8028a1c:	6878      	ldr	r0, [r7, #4]
 8028a1e:	f7ff ffc9 	bl	80289b4 <writeInt>
	memcpy(*pptr, string, len);
 8028a22:	687b      	ldr	r3, [r7, #4]
 8028a24:	681b      	ldr	r3, [r3, #0]
 8028a26:	68fa      	ldr	r2, [r7, #12]
 8028a28:	6839      	ldr	r1, [r7, #0]
 8028a2a:	4618      	mov	r0, r3
 8028a2c:	f002 f91f 	bl	802ac6e <memcpy>
	*pptr += len;
 8028a30:	687b      	ldr	r3, [r7, #4]
 8028a32:	681a      	ldr	r2, [r3, #0]
 8028a34:	68fb      	ldr	r3, [r7, #12]
 8028a36:	441a      	add	r2, r3
 8028a38:	687b      	ldr	r3, [r7, #4]
 8028a3a:	601a      	str	r2, [r3, #0]
}
 8028a3c:	bf00      	nop
 8028a3e:	3710      	adds	r7, #16
 8028a40:	46bd      	mov	sp, r7
 8028a42:	bd80      	pop	{r7, pc}

08028a44 <writeMQTTString>:
	return len;
}


void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
 8028a44:	b580      	push	{r7, lr}
 8028a46:	b084      	sub	sp, #16
 8028a48:	af00      	add	r7, sp, #0
 8028a4a:	60f8      	str	r0, [r7, #12]
 8028a4c:	4638      	mov	r0, r7
 8028a4e:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	if (mqttstring.lenstring.len > 0)
 8028a52:	687b      	ldr	r3, [r7, #4]
 8028a54:	2b00      	cmp	r3, #0
 8028a56:	dd12      	ble.n	8028a7e <writeMQTTString+0x3a>
	{
		writeInt(pptr, mqttstring.lenstring.len);
 8028a58:	687b      	ldr	r3, [r7, #4]
 8028a5a:	4619      	mov	r1, r3
 8028a5c:	68f8      	ldr	r0, [r7, #12]
 8028a5e:	f7ff ffa9 	bl	80289b4 <writeInt>
		memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
 8028a62:	68fb      	ldr	r3, [r7, #12]
 8028a64:	681b      	ldr	r3, [r3, #0]
 8028a66:	68b9      	ldr	r1, [r7, #8]
 8028a68:	687a      	ldr	r2, [r7, #4]
 8028a6a:	4618      	mov	r0, r3
 8028a6c:	f002 f8ff 	bl	802ac6e <memcpy>
		*pptr += mqttstring.lenstring.len;
 8028a70:	68fb      	ldr	r3, [r7, #12]
 8028a72:	681b      	ldr	r3, [r3, #0]
 8028a74:	687a      	ldr	r2, [r7, #4]
 8028a76:	441a      	add	r2, r3
 8028a78:	68fb      	ldr	r3, [r7, #12]
 8028a7a:	601a      	str	r2, [r3, #0]
	}
	else if (mqttstring.cstring)
		writeCString(pptr, mqttstring.cstring);
	else
		writeInt(pptr, 0);
}
 8028a7c:	e00c      	b.n	8028a98 <writeMQTTString+0x54>
	else if (mqttstring.cstring)
 8028a7e:	683b      	ldr	r3, [r7, #0]
 8028a80:	2b00      	cmp	r3, #0
 8028a82:	d005      	beq.n	8028a90 <writeMQTTString+0x4c>
		writeCString(pptr, mqttstring.cstring);
 8028a84:	683b      	ldr	r3, [r7, #0]
 8028a86:	4619      	mov	r1, r3
 8028a88:	68f8      	ldr	r0, [r7, #12]
 8028a8a:	f7ff ffbc 	bl	8028a06 <writeCString>
}
 8028a8e:	e003      	b.n	8028a98 <writeMQTTString+0x54>
		writeInt(pptr, 0);
 8028a90:	2100      	movs	r1, #0
 8028a92:	68f8      	ldr	r0, [r7, #12]
 8028a94:	f7ff ff8e 	bl	80289b4 <writeInt>
}
 8028a98:	bf00      	nop
 8028a9a:	3710      	adds	r7, #16
 8028a9c:	46bd      	mov	sp, r7
 8028a9e:	bd80      	pop	{r7, pc}

08028aa0 <readMQTTLenString>:
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param enddata pointer to the end of the data: do not read beyond
 * @return 1 if successful, 0 if not
 */
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
 8028aa0:	b580      	push	{r7, lr}
 8028aa2:	b086      	sub	sp, #24
 8028aa4:	af00      	add	r7, sp, #0
 8028aa6:	60f8      	str	r0, [r7, #12]
 8028aa8:	60b9      	str	r1, [r7, #8]
 8028aaa:	607a      	str	r2, [r7, #4]
	int rc = 0;
 8028aac:	2300      	movs	r3, #0
 8028aae:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	/* the first two bytes are the length of the string */
	if (enddata - (*pptr) > 1) /* enough length to read the integer? */
 8028ab0:	68bb      	ldr	r3, [r7, #8]
 8028ab2:	681b      	ldr	r3, [r3, #0]
 8028ab4:	687a      	ldr	r2, [r7, #4]
 8028ab6:	1ad3      	subs	r3, r2, r3
 8028ab8:	2b01      	cmp	r3, #1
 8028aba:	dd1a      	ble.n	8028af2 <readMQTTLenString+0x52>
	{
		mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
 8028abc:	68b8      	ldr	r0, [r7, #8]
 8028abe:	f7ff ff35 	bl	802892c <readInt>
 8028ac2:	4602      	mov	r2, r0
 8028ac4:	68fb      	ldr	r3, [r7, #12]
 8028ac6:	605a      	str	r2, [r3, #4]
		if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
 8028ac8:	68bb      	ldr	r3, [r7, #8]
 8028aca:	681b      	ldr	r3, [r3, #0]
 8028acc:	68fa      	ldr	r2, [r7, #12]
 8028ace:	6852      	ldr	r2, [r2, #4]
 8028ad0:	4413      	add	r3, r2
 8028ad2:	687a      	ldr	r2, [r7, #4]
 8028ad4:	429a      	cmp	r2, r3
 8028ad6:	d30c      	bcc.n	8028af2 <readMQTTLenString+0x52>
		{
			mqttstring->lenstring.data = (char*)*pptr;
 8028ad8:	68bb      	ldr	r3, [r7, #8]
 8028ada:	681a      	ldr	r2, [r3, #0]
 8028adc:	68fb      	ldr	r3, [r7, #12]
 8028ade:	609a      	str	r2, [r3, #8]
			*pptr += mqttstring->lenstring.len;
 8028ae0:	68bb      	ldr	r3, [r7, #8]
 8028ae2:	681b      	ldr	r3, [r3, #0]
 8028ae4:	68fa      	ldr	r2, [r7, #12]
 8028ae6:	6852      	ldr	r2, [r2, #4]
 8028ae8:	441a      	add	r2, r3
 8028aea:	68bb      	ldr	r3, [r7, #8]
 8028aec:	601a      	str	r2, [r3, #0]
			rc = 1;
 8028aee:	2301      	movs	r3, #1
 8028af0:	617b      	str	r3, [r7, #20]
		}
	}
	mqttstring->cstring = NULL;
 8028af2:	68fb      	ldr	r3, [r7, #12]
 8028af4:	2200      	movs	r2, #0
 8028af6:	601a      	str	r2, [r3, #0]
	FUNC_EXIT_RC(rc);
	return rc;
 8028af8:	697b      	ldr	r3, [r7, #20]
}
 8028afa:	4618      	mov	r0, r3
 8028afc:	3718      	adds	r7, #24
 8028afe:	46bd      	mov	sp, r7
 8028b00:	bd80      	pop	{r7, pc}

08028b02 <MQTTstrlen>:
 * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
 * @param mqttstring the string to return the length of
 * @return the length of the string
 */
int MQTTstrlen(MQTTString mqttstring)
{
 8028b02:	b580      	push	{r7, lr}
 8028b04:	b086      	sub	sp, #24
 8028b06:	af00      	add	r7, sp, #0
 8028b08:	1d3b      	adds	r3, r7, #4
 8028b0a:	e883 0007 	stmia.w	r3, {r0, r1, r2}
	int rc = 0;
 8028b0e:	2300      	movs	r3, #0
 8028b10:	617b      	str	r3, [r7, #20]

	if (mqttstring.cstring)
 8028b12:	687b      	ldr	r3, [r7, #4]
 8028b14:	2b00      	cmp	r3, #0
 8028b16:	d006      	beq.n	8028b26 <MQTTstrlen+0x24>
		rc = strlen(mqttstring.cstring);
 8028b18:	687b      	ldr	r3, [r7, #4]
 8028b1a:	4618      	mov	r0, r3
 8028b1c:	f7d7 fc40 	bl	80003a0 <strlen>
 8028b20:	4603      	mov	r3, r0
 8028b22:	617b      	str	r3, [r7, #20]
 8028b24:	e001      	b.n	8028b2a <MQTTstrlen+0x28>
	else
		rc = mqttstring.lenstring.len;
 8028b26:	68bb      	ldr	r3, [r7, #8]
 8028b28:	617b      	str	r3, [r7, #20]
	return rc;
 8028b2a:	697b      	ldr	r3, [r7, #20]
}
 8028b2c:	4618      	mov	r0, r3
 8028b2e:	3718      	adds	r7, #24
 8028b30:	46bd      	mov	sp, r7
 8028b32:	bd80      	pop	{r7, pc}

08028b34 <MQTTPacket_equals>:
 * @param a the MQTTString to compare
 * @param bptr the C string to compare
 * @return boolean - equal or not
 */
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
 8028b34:	b580      	push	{r7, lr}
 8028b36:	b086      	sub	sp, #24
 8028b38:	af00      	add	r7, sp, #0
 8028b3a:	6078      	str	r0, [r7, #4]
 8028b3c:	6039      	str	r1, [r7, #0]
	int alen = 0,
 8028b3e:	2300      	movs	r3, #0
 8028b40:	617b      	str	r3, [r7, #20]
		blen = 0;
 8028b42:	2300      	movs	r3, #0
 8028b44:	60fb      	str	r3, [r7, #12]
	char *aptr;
	
	if (a->cstring)
 8028b46:	687b      	ldr	r3, [r7, #4]
 8028b48:	681b      	ldr	r3, [r3, #0]
 8028b4a:	2b00      	cmp	r3, #0
 8028b4c:	d00a      	beq.n	8028b64 <MQTTPacket_equals+0x30>
	{
		aptr = a->cstring;
 8028b4e:	687b      	ldr	r3, [r7, #4]
 8028b50:	681b      	ldr	r3, [r3, #0]
 8028b52:	613b      	str	r3, [r7, #16]
		alen = strlen(a->cstring);
 8028b54:	687b      	ldr	r3, [r7, #4]
 8028b56:	681b      	ldr	r3, [r3, #0]
 8028b58:	4618      	mov	r0, r3
 8028b5a:	f7d7 fc21 	bl	80003a0 <strlen>
 8028b5e:	4603      	mov	r3, r0
 8028b60:	617b      	str	r3, [r7, #20]
 8028b62:	e005      	b.n	8028b70 <MQTTPacket_equals+0x3c>
	}
	else
	{
		aptr = a->lenstring.data;
 8028b64:	687b      	ldr	r3, [r7, #4]
 8028b66:	689b      	ldr	r3, [r3, #8]
 8028b68:	613b      	str	r3, [r7, #16]
		alen = a->lenstring.len;
 8028b6a:	687b      	ldr	r3, [r7, #4]
 8028b6c:	685b      	ldr	r3, [r3, #4]
 8028b6e:	617b      	str	r3, [r7, #20]
	}
	blen = strlen(bptr);
 8028b70:	6838      	ldr	r0, [r7, #0]
 8028b72:	f7d7 fc15 	bl	80003a0 <strlen>
 8028b76:	4603      	mov	r3, r0
 8028b78:	60fb      	str	r3, [r7, #12]
	
	return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
 8028b7a:	697a      	ldr	r2, [r7, #20]
 8028b7c:	68fb      	ldr	r3, [r7, #12]
 8028b7e:	429a      	cmp	r2, r3
 8028b80:	d10a      	bne.n	8028b98 <MQTTPacket_equals+0x64>
 8028b82:	697b      	ldr	r3, [r7, #20]
 8028b84:	461a      	mov	r2, r3
 8028b86:	6839      	ldr	r1, [r7, #0]
 8028b88:	6938      	ldr	r0, [r7, #16]
 8028b8a:	f001 ff81 	bl	802aa90 <strncmp>
 8028b8e:	4603      	mov	r3, r0
 8028b90:	2b00      	cmp	r3, #0
 8028b92:	d101      	bne.n	8028b98 <MQTTPacket_equals+0x64>
 8028b94:	2301      	movs	r3, #1
 8028b96:	e000      	b.n	8028b9a <MQTTPacket_equals+0x66>
 8028b98:	2300      	movs	r3, #0
}
 8028b9a:	4618      	mov	r0, r3
 8028b9c:	3718      	adds	r7, #24
 8028b9e:	46bd      	mov	sp, r7
 8028ba0:	bd80      	pop	{r7, pc}

08028ba2 <MQTTSerialize_publishLength>:
  * @param topicName the topic name to be used in the publish  
  * @param payloadlen the length of the payload to be sent
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
 8028ba2:	b580      	push	{r7, lr}
 8028ba4:	b086      	sub	sp, #24
 8028ba6:	af00      	add	r7, sp, #0
 8028ba8:	60f8      	str	r0, [r7, #12]
 8028baa:	4638      	mov	r0, r7
 8028bac:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	int len = 0;
 8028bb0:	2300      	movs	r3, #0
 8028bb2:	617b      	str	r3, [r7, #20]

	len += 2 + MQTTstrlen(topicName) + payloadlen;
 8028bb4:	463b      	mov	r3, r7
 8028bb6:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028bba:	f7ff ffa2 	bl	8028b02 <MQTTstrlen>
 8028bbe:	4603      	mov	r3, r0
 8028bc0:	1c9a      	adds	r2, r3, #2
 8028bc2:	6a3b      	ldr	r3, [r7, #32]
 8028bc4:	4413      	add	r3, r2
 8028bc6:	697a      	ldr	r2, [r7, #20]
 8028bc8:	4413      	add	r3, r2
 8028bca:	617b      	str	r3, [r7, #20]
	if (qos > 0)
 8028bcc:	68fb      	ldr	r3, [r7, #12]
 8028bce:	2b00      	cmp	r3, #0
 8028bd0:	dd02      	ble.n	8028bd8 <MQTTSerialize_publishLength+0x36>
		len += 2; /* packetid */
 8028bd2:	697b      	ldr	r3, [r7, #20]
 8028bd4:	3302      	adds	r3, #2
 8028bd6:	617b      	str	r3, [r7, #20]
	return len;
 8028bd8:	697b      	ldr	r3, [r7, #20]
}
 8028bda:	4618      	mov	r0, r3
 8028bdc:	3718      	adds	r7, #24
 8028bde:	46bd      	mov	sp, r7
 8028be0:	bd80      	pop	{r7, pc}

08028be2 <MQTTSerialize_publish>:
  * @param payloadlen integer - the length of the MQTT payload
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
		MQTTString topicName, unsigned char* payload, int payloadlen)
{
 8028be2:	b580      	push	{r7, lr}
 8028be4:	b08a      	sub	sp, #40	@ 0x28
 8028be6:	af02      	add	r7, sp, #8
 8028be8:	60f8      	str	r0, [r7, #12]
 8028bea:	60b9      	str	r1, [r7, #8]
 8028bec:	603b      	str	r3, [r7, #0]
 8028bee:	4613      	mov	r3, r2
 8028bf0:	71fb      	strb	r3, [r7, #7]
	unsigned char *ptr = buf;
 8028bf2:	68fb      	ldr	r3, [r7, #12]
 8028bf4:	617b      	str	r3, [r7, #20]
	MQTTHeader header = {0};
 8028bf6:	2300      	movs	r3, #0
 8028bf8:	613b      	str	r3, [r7, #16]
	int rem_len = 0;
 8028bfa:	2300      	movs	r3, #0
 8028bfc:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8028bfe:	2300      	movs	r3, #0
 8028c00:	61fb      	str	r3, [r7, #28]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
 8028c02:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028c04:	9300      	str	r3, [sp, #0]
 8028c06:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028c0a:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028c0c:	6838      	ldr	r0, [r7, #0]
 8028c0e:	f7ff ffc8 	bl	8028ba2 <MQTTSerialize_publishLength>
 8028c12:	61b8      	str	r0, [r7, #24]
 8028c14:	69b8      	ldr	r0, [r7, #24]
 8028c16:	f7ff fe29 	bl	802886c <MQTTPacket_len>
 8028c1a:	4602      	mov	r2, r0
 8028c1c:	68bb      	ldr	r3, [r7, #8]
 8028c1e:	4293      	cmp	r3, r2
 8028c20:	da03      	bge.n	8028c2a <MQTTSerialize_publish+0x48>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028c22:	f06f 0301 	mvn.w	r3, #1
 8028c26:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028c28:	e04c      	b.n	8028cc4 <MQTTSerialize_publish+0xe2>
	}

	header.bits.type = PUBLISH;
 8028c2a:	7c3b      	ldrb	r3, [r7, #16]
 8028c2c:	2203      	movs	r2, #3
 8028c2e:	f362 1307 	bfi	r3, r2, #4, #4
 8028c32:	743b      	strb	r3, [r7, #16]
	header.bits.dup = dup;
 8028c34:	79fb      	ldrb	r3, [r7, #7]
 8028c36:	f003 0301 	and.w	r3, r3, #1
 8028c3a:	b2da      	uxtb	r2, r3
 8028c3c:	7c3b      	ldrb	r3, [r7, #16]
 8028c3e:	f362 03c3 	bfi	r3, r2, #3, #1
 8028c42:	743b      	strb	r3, [r7, #16]
	header.bits.qos = qos;
 8028c44:	683b      	ldr	r3, [r7, #0]
 8028c46:	f003 0303 	and.w	r3, r3, #3
 8028c4a:	b2da      	uxtb	r2, r3
 8028c4c:	7c3b      	ldrb	r3, [r7, #16]
 8028c4e:	f362 0342 	bfi	r3, r2, #1, #2
 8028c52:	743b      	strb	r3, [r7, #16]
	header.bits.retain = retained;
 8028c54:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 8028c58:	f003 0301 	and.w	r3, r3, #1
 8028c5c:	b2da      	uxtb	r2, r3
 8028c5e:	7c3b      	ldrb	r3, [r7, #16]
 8028c60:	f362 0300 	bfi	r3, r2, #0, #1
 8028c64:	743b      	strb	r3, [r7, #16]
	writeChar(&ptr, header.byte); /* write header */
 8028c66:	7c3a      	ldrb	r2, [r7, #16]
 8028c68:	f107 0314 	add.w	r3, r7, #20
 8028c6c:	4611      	mov	r1, r2
 8028c6e:	4618      	mov	r0, r3
 8028c70:	f7ff fe8b 	bl	802898a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8028c74:	697b      	ldr	r3, [r7, #20]
 8028c76:	69b9      	ldr	r1, [r7, #24]
 8028c78:	4618      	mov	r0, r3
 8028c7a:	f7ff fd8c 	bl	8028796 <MQTTPacket_encode>
 8028c7e:	4602      	mov	r2, r0
 8028c80:	697b      	ldr	r3, [r7, #20]
 8028c82:	4413      	add	r3, r2
 8028c84:	617b      	str	r3, [r7, #20]

	writeMQTTString(&ptr, topicName);
 8028c86:	f107 0014 	add.w	r0, r7, #20
 8028c8a:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028c8e:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028c90:	f7ff fed8 	bl	8028a44 <writeMQTTString>

	if (qos > 0)
 8028c94:	683b      	ldr	r3, [r7, #0]
 8028c96:	2b00      	cmp	r3, #0
 8028c98:	dd06      	ble.n	8028ca8 <MQTTSerialize_publish+0xc6>
		writeInt(&ptr, packetid);
 8028c9a:	8dba      	ldrh	r2, [r7, #44]	@ 0x2c
 8028c9c:	f107 0314 	add.w	r3, r7, #20
 8028ca0:	4611      	mov	r1, r2
 8028ca2:	4618      	mov	r0, r3
 8028ca4:	f7ff fe86 	bl	80289b4 <writeInt>

	memcpy(ptr, payload, payloadlen);
 8028ca8:	697b      	ldr	r3, [r7, #20]
 8028caa:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8028cac:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 8028cae:	4618      	mov	r0, r3
 8028cb0:	f001 ffdd 	bl	802ac6e <memcpy>
	ptr += payloadlen;
 8028cb4:	697a      	ldr	r2, [r7, #20]
 8028cb6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028cb8:	4413      	add	r3, r2
 8028cba:	617b      	str	r3, [r7, #20]

	rc = ptr - buf;
 8028cbc:	697a      	ldr	r2, [r7, #20]
 8028cbe:	68fb      	ldr	r3, [r7, #12]
 8028cc0:	1ad3      	subs	r3, r2, r3
 8028cc2:	61fb      	str	r3, [r7, #28]

exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028cc4:	69fb      	ldr	r3, [r7, #28]
}
 8028cc6:	4618      	mov	r0, r3
 8028cc8:	3720      	adds	r7, #32
 8028cca:	46bd      	mov	sp, r7
 8028ccc:	bd80      	pop	{r7, pc}

08028cce <MQTTSerialize_ack>:
  * @param dup the MQTT dup flag
  * @param packetid the MQTT packet identifier
  * @return serialized length, or error if 0
  */
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
 8028cce:	b580      	push	{r7, lr}
 8028cd0:	b088      	sub	sp, #32
 8028cd2:	af00      	add	r7, sp, #0
 8028cd4:	60f8      	str	r0, [r7, #12]
 8028cd6:	60b9      	str	r1, [r7, #8]
 8028cd8:	4611      	mov	r1, r2
 8028cda:	461a      	mov	r2, r3
 8028cdc:	460b      	mov	r3, r1
 8028cde:	71fb      	strb	r3, [r7, #7]
 8028ce0:	4613      	mov	r3, r2
 8028ce2:	71bb      	strb	r3, [r7, #6]
	MQTTHeader header = {0};
 8028ce4:	2300      	movs	r3, #0
 8028ce6:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8028ce8:	2300      	movs	r3, #0
 8028cea:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8028cec:	68fb      	ldr	r3, [r7, #12]
 8028cee:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 4)
 8028cf0:	68bb      	ldr	r3, [r7, #8]
 8028cf2:	2b03      	cmp	r3, #3
 8028cf4:	dc03      	bgt.n	8028cfe <MQTTSerialize_ack+0x30>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028cf6:	f06f 0301 	mvn.w	r3, #1
 8028cfa:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028cfc:	e037      	b.n	8028d6e <MQTTSerialize_ack+0xa0>
	}
	header.bits.type = packettype;
 8028cfe:	79fb      	ldrb	r3, [r7, #7]
 8028d00:	f003 030f 	and.w	r3, r3, #15
 8028d04:	b2da      	uxtb	r2, r3
 8028d06:	7e3b      	ldrb	r3, [r7, #24]
 8028d08:	f362 1307 	bfi	r3, r2, #4, #4
 8028d0c:	763b      	strb	r3, [r7, #24]
	header.bits.dup = dup;
 8028d0e:	79bb      	ldrb	r3, [r7, #6]
 8028d10:	f003 0301 	and.w	r3, r3, #1
 8028d14:	b2da      	uxtb	r2, r3
 8028d16:	7e3b      	ldrb	r3, [r7, #24]
 8028d18:	f362 03c3 	bfi	r3, r2, #3, #1
 8028d1c:	763b      	strb	r3, [r7, #24]
	header.bits.qos = (packettype == PUBREL) ? 1 : 0;
 8028d1e:	79fb      	ldrb	r3, [r7, #7]
 8028d20:	2b06      	cmp	r3, #6
 8028d22:	bf0c      	ite	eq
 8028d24:	2301      	moveq	r3, #1
 8028d26:	2300      	movne	r3, #0
 8028d28:	b2db      	uxtb	r3, r3
 8028d2a:	f003 0303 	and.w	r3, r3, #3
 8028d2e:	b2da      	uxtb	r2, r3
 8028d30:	7e3b      	ldrb	r3, [r7, #24]
 8028d32:	f362 0342 	bfi	r3, r2, #1, #2
 8028d36:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8028d38:	7e3a      	ldrb	r2, [r7, #24]
 8028d3a:	f107 0314 	add.w	r3, r7, #20
 8028d3e:	4611      	mov	r1, r2
 8028d40:	4618      	mov	r0, r3
 8028d42:	f7ff fe22 	bl	802898a <writeChar>

	ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
 8028d46:	697b      	ldr	r3, [r7, #20]
 8028d48:	2102      	movs	r1, #2
 8028d4a:	4618      	mov	r0, r3
 8028d4c:	f7ff fd23 	bl	8028796 <MQTTPacket_encode>
 8028d50:	4602      	mov	r2, r0
 8028d52:	697b      	ldr	r3, [r7, #20]
 8028d54:	4413      	add	r3, r2
 8028d56:	617b      	str	r3, [r7, #20]
	writeInt(&ptr, packetid);
 8028d58:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 8028d5a:	f107 0314 	add.w	r3, r7, #20
 8028d5e:	4611      	mov	r1, r2
 8028d60:	4618      	mov	r0, r3
 8028d62:	f7ff fe27 	bl	80289b4 <writeInt>
	rc = ptr - buf;
 8028d66:	697a      	ldr	r2, [r7, #20]
 8028d68:	68fb      	ldr	r3, [r7, #12]
 8028d6a:	1ad3      	subs	r3, r2, r3
 8028d6c:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028d6e:	69fb      	ldr	r3, [r7, #28]
}
 8028d70:	4618      	mov	r0, r3
 8028d72:	3720      	adds	r7, #32
 8028d74:	46bd      	mov	sp, r7
 8028d76:	bd80      	pop	{r7, pc}

08028d78 <MQTTSerialize_subscribeLength>:
  * @param count the number of topic filter strings in topicFilters
  * @param topicFilters the array of topic filter strings to be used in the publish
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
 8028d78:	b580      	push	{r7, lr}
 8028d7a:	b084      	sub	sp, #16
 8028d7c:	af00      	add	r7, sp, #0
 8028d7e:	6078      	str	r0, [r7, #4]
 8028d80:	6039      	str	r1, [r7, #0]
	int i;
	int len = 2; /* packetid */
 8028d82:	2302      	movs	r3, #2
 8028d84:	60bb      	str	r3, [r7, #8]

	for (i = 0; i < count; ++i)
 8028d86:	2300      	movs	r3, #0
 8028d88:	60fb      	str	r3, [r7, #12]
 8028d8a:	e013      	b.n	8028db4 <MQTTSerialize_subscribeLength+0x3c>
		len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
 8028d8c:	68fa      	ldr	r2, [r7, #12]
 8028d8e:	4613      	mov	r3, r2
 8028d90:	005b      	lsls	r3, r3, #1
 8028d92:	4413      	add	r3, r2
 8028d94:	009b      	lsls	r3, r3, #2
 8028d96:	461a      	mov	r2, r3
 8028d98:	683b      	ldr	r3, [r7, #0]
 8028d9a:	4413      	add	r3, r2
 8028d9c:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028da0:	f7ff feaf 	bl	8028b02 <MQTTstrlen>
 8028da4:	4603      	mov	r3, r0
 8028da6:	3303      	adds	r3, #3
 8028da8:	68ba      	ldr	r2, [r7, #8]
 8028daa:	4413      	add	r3, r2
 8028dac:	60bb      	str	r3, [r7, #8]
	for (i = 0; i < count; ++i)
 8028dae:	68fb      	ldr	r3, [r7, #12]
 8028db0:	3301      	adds	r3, #1
 8028db2:	60fb      	str	r3, [r7, #12]
 8028db4:	68fa      	ldr	r2, [r7, #12]
 8028db6:	687b      	ldr	r3, [r7, #4]
 8028db8:	429a      	cmp	r2, r3
 8028dba:	dbe7      	blt.n	8028d8c <MQTTSerialize_subscribeLength+0x14>
	return len;
 8028dbc:	68bb      	ldr	r3, [r7, #8]
}
 8028dbe:	4618      	mov	r0, r3
 8028dc0:	3710      	adds	r7, #16
 8028dc2:	46bd      	mov	sp, r7
 8028dc4:	bd80      	pop	{r7, pc}

08028dc6 <MQTTSerialize_subscribe>:
  * @param requestedQoSs - array of requested QoS
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
		MQTTString topicFilters[], int requestedQoSs[])
{
 8028dc6:	b580      	push	{r7, lr}
 8028dc8:	b08a      	sub	sp, #40	@ 0x28
 8028dca:	af00      	add	r7, sp, #0
 8028dcc:	60f8      	str	r0, [r7, #12]
 8028dce:	60b9      	str	r1, [r7, #8]
 8028dd0:	4611      	mov	r1, r2
 8028dd2:	461a      	mov	r2, r3
 8028dd4:	460b      	mov	r3, r1
 8028dd6:	71fb      	strb	r3, [r7, #7]
 8028dd8:	4613      	mov	r3, r2
 8028dda:	80bb      	strh	r3, [r7, #4]
	unsigned char *ptr = buf;
 8028ddc:	68fb      	ldr	r3, [r7, #12]
 8028dde:	61bb      	str	r3, [r7, #24]
	MQTTHeader header = {0};
 8028de0:	2300      	movs	r3, #0
 8028de2:	617b      	str	r3, [r7, #20]
	int rem_len = 0;
 8028de4:	2300      	movs	r3, #0
 8028de6:	61fb      	str	r3, [r7, #28]
	int rc = 0;
 8028de8:	2300      	movs	r3, #0
 8028dea:	627b      	str	r3, [r7, #36]	@ 0x24
	int i = 0;
 8028dec:	2300      	movs	r3, #0
 8028dee:	623b      	str	r3, [r7, #32]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
 8028df0:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8028df2:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8028df4:	f7ff ffc0 	bl	8028d78 <MQTTSerialize_subscribeLength>
 8028df8:	61f8      	str	r0, [r7, #28]
 8028dfa:	69f8      	ldr	r0, [r7, #28]
 8028dfc:	f7ff fd36 	bl	802886c <MQTTPacket_len>
 8028e00:	4602      	mov	r2, r0
 8028e02:	68bb      	ldr	r3, [r7, #8]
 8028e04:	4293      	cmp	r3, r2
 8028e06:	da03      	bge.n	8028e10 <MQTTSerialize_subscribe+0x4a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028e08:	f06f 0301 	mvn.w	r3, #1
 8028e0c:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 8028e0e:	e051      	b.n	8028eb4 <MQTTSerialize_subscribe+0xee>
	}

	header.byte = 0;
 8028e10:	2300      	movs	r3, #0
 8028e12:	753b      	strb	r3, [r7, #20]
	header.bits.type = SUBSCRIBE;
 8028e14:	7d3b      	ldrb	r3, [r7, #20]
 8028e16:	2208      	movs	r2, #8
 8028e18:	f362 1307 	bfi	r3, r2, #4, #4
 8028e1c:	753b      	strb	r3, [r7, #20]
	header.bits.dup = dup;
 8028e1e:	79fb      	ldrb	r3, [r7, #7]
 8028e20:	f003 0301 	and.w	r3, r3, #1
 8028e24:	b2da      	uxtb	r2, r3
 8028e26:	7d3b      	ldrb	r3, [r7, #20]
 8028e28:	f362 03c3 	bfi	r3, r2, #3, #1
 8028e2c:	753b      	strb	r3, [r7, #20]
	header.bits.qos = 1;
 8028e2e:	7d3b      	ldrb	r3, [r7, #20]
 8028e30:	2201      	movs	r2, #1
 8028e32:	f362 0342 	bfi	r3, r2, #1, #2
 8028e36:	753b      	strb	r3, [r7, #20]
	writeChar(&ptr, header.byte); /* write header */
 8028e38:	7d3a      	ldrb	r2, [r7, #20]
 8028e3a:	f107 0318 	add.w	r3, r7, #24
 8028e3e:	4611      	mov	r1, r2
 8028e40:	4618      	mov	r0, r3
 8028e42:	f7ff fda2 	bl	802898a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8028e46:	69bb      	ldr	r3, [r7, #24]
 8028e48:	69f9      	ldr	r1, [r7, #28]
 8028e4a:	4618      	mov	r0, r3
 8028e4c:	f7ff fca3 	bl	8028796 <MQTTPacket_encode>
 8028e50:	4602      	mov	r2, r0
 8028e52:	69bb      	ldr	r3, [r7, #24]
 8028e54:	4413      	add	r3, r2
 8028e56:	61bb      	str	r3, [r7, #24]

	writeInt(&ptr, packetid);
 8028e58:	88ba      	ldrh	r2, [r7, #4]
 8028e5a:	f107 0318 	add.w	r3, r7, #24
 8028e5e:	4611      	mov	r1, r2
 8028e60:	4618      	mov	r0, r3
 8028e62:	f7ff fda7 	bl	80289b4 <writeInt>

	for (i = 0; i < count; ++i)
 8028e66:	2300      	movs	r3, #0
 8028e68:	623b      	str	r3, [r7, #32]
 8028e6a:	e01b      	b.n	8028ea4 <MQTTSerialize_subscribe+0xde>
	{
		writeMQTTString(&ptr, topicFilters[i]);
 8028e6c:	6a3a      	ldr	r2, [r7, #32]
 8028e6e:	4613      	mov	r3, r2
 8028e70:	005b      	lsls	r3, r3, #1
 8028e72:	4413      	add	r3, r2
 8028e74:	009b      	lsls	r3, r3, #2
 8028e76:	461a      	mov	r2, r3
 8028e78:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8028e7a:	4413      	add	r3, r2
 8028e7c:	f107 0018 	add.w	r0, r7, #24
 8028e80:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028e82:	f7ff fddf 	bl	8028a44 <writeMQTTString>
		writeChar(&ptr, requestedQoSs[i]);
 8028e86:	6a3b      	ldr	r3, [r7, #32]
 8028e88:	009b      	lsls	r3, r3, #2
 8028e8a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 8028e8c:	4413      	add	r3, r2
 8028e8e:	681b      	ldr	r3, [r3, #0]
 8028e90:	b2da      	uxtb	r2, r3
 8028e92:	f107 0318 	add.w	r3, r7, #24
 8028e96:	4611      	mov	r1, r2
 8028e98:	4618      	mov	r0, r3
 8028e9a:	f7ff fd76 	bl	802898a <writeChar>
	for (i = 0; i < count; ++i)
 8028e9e:	6a3b      	ldr	r3, [r7, #32]
 8028ea0:	3301      	adds	r3, #1
 8028ea2:	623b      	str	r3, [r7, #32]
 8028ea4:	6a3a      	ldr	r2, [r7, #32]
 8028ea6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028ea8:	429a      	cmp	r2, r3
 8028eaa:	dbdf      	blt.n	8028e6c <MQTTSerialize_subscribe+0xa6>
	}

	rc = ptr - buf;
 8028eac:	69ba      	ldr	r2, [r7, #24]
 8028eae:	68fb      	ldr	r3, [r7, #12]
 8028eb0:	1ad3      	subs	r3, r2, r3
 8028eb2:	627b      	str	r3, [r7, #36]	@ 0x24
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028eb4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028eb6:	4618      	mov	r0, r3
 8028eb8:	3728      	adds	r7, #40	@ 0x28
 8028eba:	46bd      	mov	sp, r7
 8028ebc:	bd80      	pop	{r7, pc}

08028ebe <MQTTDeserialize_suback>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
 8028ebe:	b580      	push	{r7, lr}
 8028ec0:	b08a      	sub	sp, #40	@ 0x28
 8028ec2:	af00      	add	r7, sp, #0
 8028ec4:	60f8      	str	r0, [r7, #12]
 8028ec6:	60b9      	str	r1, [r7, #8]
 8028ec8:	607a      	str	r2, [r7, #4]
 8028eca:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 8028ecc:	2300      	movs	r3, #0
 8028ece:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028ed0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8028ed2:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028ed4:	2300      	movs	r3, #0
 8028ed6:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028ed8:	2300      	movs	r3, #0
 8028eda:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8028edc:	f107 0318 	add.w	r3, r7, #24
 8028ee0:	4618      	mov	r0, r3
 8028ee2:	f7ff fd3e 	bl	8028962 <readChar>
 8028ee6:	4603      	mov	r3, r0
 8028ee8:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != SUBACK)
 8028eea:	7f3b      	ldrb	r3, [r7, #28]
 8028eec:	f023 030f 	bic.w	r3, r3, #15
 8028ef0:	b2db      	uxtb	r3, r3
 8028ef2:	2b90      	cmp	r3, #144	@ 0x90
 8028ef4:	d142      	bne.n	8028f7c <MQTTDeserialize_suback+0xbe>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028ef6:	69bb      	ldr	r3, [r7, #24]
 8028ef8:	f107 0214 	add.w	r2, r7, #20
 8028efc:	4611      	mov	r1, r2
 8028efe:	4618      	mov	r0, r3
 8028f00:	f7ff fcfe 	bl	8028900 <MQTTPacket_decodeBuf>
 8028f04:	6278      	str	r0, [r7, #36]	@ 0x24
 8028f06:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028f08:	69bb      	ldr	r3, [r7, #24]
 8028f0a:	4413      	add	r3, r2
 8028f0c:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8028f0e:	69bb      	ldr	r3, [r7, #24]
 8028f10:	697a      	ldr	r2, [r7, #20]
 8028f12:	4413      	add	r3, r2
 8028f14:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8028f16:	69bb      	ldr	r3, [r7, #24]
 8028f18:	6a3a      	ldr	r2, [r7, #32]
 8028f1a:	1ad3      	subs	r3, r2, r3
 8028f1c:	2b01      	cmp	r3, #1
 8028f1e:	dd2f      	ble.n	8028f80 <MQTTDeserialize_suback+0xc2>
		goto exit;

	*packetid = readInt(&curdata);
 8028f20:	f107 0318 	add.w	r3, r7, #24
 8028f24:	4618      	mov	r0, r3
 8028f26:	f7ff fd01 	bl	802892c <readInt>
 8028f2a:	4603      	mov	r3, r0
 8028f2c:	b29a      	uxth	r2, r3
 8028f2e:	68fb      	ldr	r3, [r7, #12]
 8028f30:	801a      	strh	r2, [r3, #0]

	*count = 0;
 8028f32:	687b      	ldr	r3, [r7, #4]
 8028f34:	2200      	movs	r2, #0
 8028f36:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8028f38:	e019      	b.n	8028f6e <MQTTDeserialize_suback+0xb0>
	{
		if (*count > maxcount)
 8028f3a:	687b      	ldr	r3, [r7, #4]
 8028f3c:	681b      	ldr	r3, [r3, #0]
 8028f3e:	68ba      	ldr	r2, [r7, #8]
 8028f40:	429a      	cmp	r2, r3
 8028f42:	da03      	bge.n	8028f4c <MQTTDeserialize_suback+0x8e>
		{
			rc = -1;
 8028f44:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028f48:	627b      	str	r3, [r7, #36]	@ 0x24
			goto exit;
 8028f4a:	e01a      	b.n	8028f82 <MQTTDeserialize_suback+0xc4>
		}
		grantedQoSs[(*count)++] = readChar(&curdata);
 8028f4c:	f107 0318 	add.w	r3, r7, #24
 8028f50:	4618      	mov	r0, r3
 8028f52:	f7ff fd06 	bl	8028962 <readChar>
 8028f56:	4603      	mov	r3, r0
 8028f58:	4618      	mov	r0, r3
 8028f5a:	687b      	ldr	r3, [r7, #4]
 8028f5c:	681b      	ldr	r3, [r3, #0]
 8028f5e:	1c59      	adds	r1, r3, #1
 8028f60:	687a      	ldr	r2, [r7, #4]
 8028f62:	6011      	str	r1, [r2, #0]
 8028f64:	009b      	lsls	r3, r3, #2
 8028f66:	683a      	ldr	r2, [r7, #0]
 8028f68:	4413      	add	r3, r2
 8028f6a:	4602      	mov	r2, r0
 8028f6c:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8028f6e:	69bb      	ldr	r3, [r7, #24]
 8028f70:	6a3a      	ldr	r2, [r7, #32]
 8028f72:	429a      	cmp	r2, r3
 8028f74:	d8e1      	bhi.n	8028f3a <MQTTDeserialize_suback+0x7c>
	}

	rc = 1;
 8028f76:	2301      	movs	r3, #1
 8028f78:	627b      	str	r3, [r7, #36]	@ 0x24
 8028f7a:	e002      	b.n	8028f82 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8028f7c:	bf00      	nop
 8028f7e:	e000      	b.n	8028f82 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8028f80:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028f82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028f84:	4618      	mov	r0, r3
 8028f86:	3728      	adds	r7, #40	@ 0x28
 8028f88:	46bd      	mov	sp, r7
 8028f8a:	bd80      	pop	{r7, pc}

08028f8c <malloc>:
 8028f8c:	4b02      	ldr	r3, [pc, #8]	@ (8028f98 <malloc+0xc>)
 8028f8e:	4601      	mov	r1, r0
 8028f90:	6818      	ldr	r0, [r3, #0]
 8028f92:	f000 b82d 	b.w	8028ff0 <_malloc_r>
 8028f96:	bf00      	nop
 8028f98:	240001d4 	.word	0x240001d4

08028f9c <free>:
 8028f9c:	4b02      	ldr	r3, [pc, #8]	@ (8028fa8 <free+0xc>)
 8028f9e:	4601      	mov	r1, r0
 8028fa0:	6818      	ldr	r0, [r3, #0]
 8028fa2:	f002 bc7b 	b.w	802b89c <_free_r>
 8028fa6:	bf00      	nop
 8028fa8:	240001d4 	.word	0x240001d4

08028fac <sbrk_aligned>:
 8028fac:	b570      	push	{r4, r5, r6, lr}
 8028fae:	4e0f      	ldr	r6, [pc, #60]	@ (8028fec <sbrk_aligned+0x40>)
 8028fb0:	460c      	mov	r4, r1
 8028fb2:	6831      	ldr	r1, [r6, #0]
 8028fb4:	4605      	mov	r5, r0
 8028fb6:	b911      	cbnz	r1, 8028fbe <sbrk_aligned+0x12>
 8028fb8:	f001 fe0a 	bl	802abd0 <_sbrk_r>
 8028fbc:	6030      	str	r0, [r6, #0]
 8028fbe:	4621      	mov	r1, r4
 8028fc0:	4628      	mov	r0, r5
 8028fc2:	f001 fe05 	bl	802abd0 <_sbrk_r>
 8028fc6:	1c43      	adds	r3, r0, #1
 8028fc8:	d103      	bne.n	8028fd2 <sbrk_aligned+0x26>
 8028fca:	f04f 34ff 	mov.w	r4, #4294967295	@ 0xffffffff
 8028fce:	4620      	mov	r0, r4
 8028fd0:	bd70      	pop	{r4, r5, r6, pc}
 8028fd2:	1cc4      	adds	r4, r0, #3
 8028fd4:	f024 0403 	bic.w	r4, r4, #3
 8028fd8:	42a0      	cmp	r0, r4
 8028fda:	d0f8      	beq.n	8028fce <sbrk_aligned+0x22>
 8028fdc:	1a21      	subs	r1, r4, r0
 8028fde:	4628      	mov	r0, r5
 8028fe0:	f001 fdf6 	bl	802abd0 <_sbrk_r>
 8028fe4:	3001      	adds	r0, #1
 8028fe6:	d1f2      	bne.n	8028fce <sbrk_aligned+0x22>
 8028fe8:	e7ef      	b.n	8028fca <sbrk_aligned+0x1e>
 8028fea:	bf00      	nop
 8028fec:	2402b11c 	.word	0x2402b11c

08028ff0 <_malloc_r>:
 8028ff0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 8028ff4:	1ccd      	adds	r5, r1, #3
 8028ff6:	f025 0503 	bic.w	r5, r5, #3
 8028ffa:	3508      	adds	r5, #8
 8028ffc:	2d0c      	cmp	r5, #12
 8028ffe:	bf38      	it	cc
 8029000:	250c      	movcc	r5, #12
 8029002:	2d00      	cmp	r5, #0
 8029004:	4606      	mov	r6, r0
 8029006:	db01      	blt.n	802900c <_malloc_r+0x1c>
 8029008:	42a9      	cmp	r1, r5
 802900a:	d904      	bls.n	8029016 <_malloc_r+0x26>
 802900c:	230c      	movs	r3, #12
 802900e:	6033      	str	r3, [r6, #0]
 8029010:	2000      	movs	r0, #0
 8029012:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8029016:	f8df 80d4 	ldr.w	r8, [pc, #212]	@ 80290ec <_malloc_r+0xfc>
 802901a:	f000 f869 	bl	80290f0 <__malloc_lock>
 802901e:	f8d8 3000 	ldr.w	r3, [r8]
 8029022:	461c      	mov	r4, r3
 8029024:	bb44      	cbnz	r4, 8029078 <_malloc_r+0x88>
 8029026:	4629      	mov	r1, r5
 8029028:	4630      	mov	r0, r6
 802902a:	f7ff ffbf 	bl	8028fac <sbrk_aligned>
 802902e:	1c43      	adds	r3, r0, #1
 8029030:	4604      	mov	r4, r0
 8029032:	d158      	bne.n	80290e6 <_malloc_r+0xf6>
 8029034:	f8d8 4000 	ldr.w	r4, [r8]
 8029038:	4627      	mov	r7, r4
 802903a:	2f00      	cmp	r7, #0
 802903c:	d143      	bne.n	80290c6 <_malloc_r+0xd6>
 802903e:	2c00      	cmp	r4, #0
 8029040:	d04b      	beq.n	80290da <_malloc_r+0xea>
 8029042:	6823      	ldr	r3, [r4, #0]
 8029044:	4639      	mov	r1, r7
 8029046:	4630      	mov	r0, r6
 8029048:	eb04 0903 	add.w	r9, r4, r3
 802904c:	f001 fdc0 	bl	802abd0 <_sbrk_r>
 8029050:	4581      	cmp	r9, r0
 8029052:	d142      	bne.n	80290da <_malloc_r+0xea>
 8029054:	6821      	ldr	r1, [r4, #0]
 8029056:	1a6d      	subs	r5, r5, r1
 8029058:	4629      	mov	r1, r5
 802905a:	4630      	mov	r0, r6
 802905c:	f7ff ffa6 	bl	8028fac <sbrk_aligned>
 8029060:	3001      	adds	r0, #1
 8029062:	d03a      	beq.n	80290da <_malloc_r+0xea>
 8029064:	6823      	ldr	r3, [r4, #0]
 8029066:	442b      	add	r3, r5
 8029068:	6023      	str	r3, [r4, #0]
 802906a:	f8d8 3000 	ldr.w	r3, [r8]
 802906e:	685a      	ldr	r2, [r3, #4]
 8029070:	bb62      	cbnz	r2, 80290cc <_malloc_r+0xdc>
 8029072:	f8c8 7000 	str.w	r7, [r8]
 8029076:	e00f      	b.n	8029098 <_malloc_r+0xa8>
 8029078:	6822      	ldr	r2, [r4, #0]
 802907a:	1b52      	subs	r2, r2, r5
 802907c:	d420      	bmi.n	80290c0 <_malloc_r+0xd0>
 802907e:	2a0b      	cmp	r2, #11
 8029080:	d917      	bls.n	80290b2 <_malloc_r+0xc2>
 8029082:	1961      	adds	r1, r4, r5
 8029084:	42a3      	cmp	r3, r4
 8029086:	6025      	str	r5, [r4, #0]
 8029088:	bf18      	it	ne
 802908a:	6059      	strne	r1, [r3, #4]
 802908c:	6863      	ldr	r3, [r4, #4]
 802908e:	bf08      	it	eq
 8029090:	f8c8 1000 	streq.w	r1, [r8]
 8029094:	5162      	str	r2, [r4, r5]
 8029096:	604b      	str	r3, [r1, #4]
 8029098:	4630      	mov	r0, r6
 802909a:	f000 f82f 	bl	80290fc <__malloc_unlock>
 802909e:	f104 000b 	add.w	r0, r4, #11
 80290a2:	1d23      	adds	r3, r4, #4
 80290a4:	f020 0007 	bic.w	r0, r0, #7
 80290a8:	1ac2      	subs	r2, r0, r3
 80290aa:	bf1c      	itt	ne
 80290ac:	1a1b      	subne	r3, r3, r0
 80290ae:	50a3      	strne	r3, [r4, r2]
 80290b0:	e7af      	b.n	8029012 <_malloc_r+0x22>
 80290b2:	6862      	ldr	r2, [r4, #4]
 80290b4:	42a3      	cmp	r3, r4
 80290b6:	bf0c      	ite	eq
 80290b8:	f8c8 2000 	streq.w	r2, [r8]
 80290bc:	605a      	strne	r2, [r3, #4]
 80290be:	e7eb      	b.n	8029098 <_malloc_r+0xa8>
 80290c0:	4623      	mov	r3, r4
 80290c2:	6864      	ldr	r4, [r4, #4]
 80290c4:	e7ae      	b.n	8029024 <_malloc_r+0x34>
 80290c6:	463c      	mov	r4, r7
 80290c8:	687f      	ldr	r7, [r7, #4]
 80290ca:	e7b6      	b.n	802903a <_malloc_r+0x4a>
 80290cc:	461a      	mov	r2, r3
 80290ce:	685b      	ldr	r3, [r3, #4]
 80290d0:	42a3      	cmp	r3, r4
 80290d2:	d1fb      	bne.n	80290cc <_malloc_r+0xdc>
 80290d4:	2300      	movs	r3, #0
 80290d6:	6053      	str	r3, [r2, #4]
 80290d8:	e7de      	b.n	8029098 <_malloc_r+0xa8>
 80290da:	230c      	movs	r3, #12
 80290dc:	6033      	str	r3, [r6, #0]
 80290de:	4630      	mov	r0, r6
 80290e0:	f000 f80c 	bl	80290fc <__malloc_unlock>
 80290e4:	e794      	b.n	8029010 <_malloc_r+0x20>
 80290e6:	6005      	str	r5, [r0, #0]
 80290e8:	e7d6      	b.n	8029098 <_malloc_r+0xa8>
 80290ea:	bf00      	nop
 80290ec:	2402b120 	.word	0x2402b120

080290f0 <__malloc_lock>:
 80290f0:	4801      	ldr	r0, [pc, #4]	@ (80290f8 <__malloc_lock+0x8>)
 80290f2:	f001 bdba 	b.w	802ac6a <__retarget_lock_acquire_recursive>
 80290f6:	bf00      	nop
 80290f8:	2402b264 	.word	0x2402b264

080290fc <__malloc_unlock>:
 80290fc:	4801      	ldr	r0, [pc, #4]	@ (8029104 <__malloc_unlock+0x8>)
 80290fe:	f001 bdb5 	b.w	802ac6c <__retarget_lock_release_recursive>
 8029102:	bf00      	nop
 8029104:	2402b264 	.word	0x2402b264

08029108 <rand>:
 8029108:	4b16      	ldr	r3, [pc, #88]	@ (8029164 <rand+0x5c>)
 802910a:	b510      	push	{r4, lr}
 802910c:	681c      	ldr	r4, [r3, #0]
 802910e:	6b23      	ldr	r3, [r4, #48]	@ 0x30
 8029110:	b9b3      	cbnz	r3, 8029140 <rand+0x38>
 8029112:	2018      	movs	r0, #24
 8029114:	f7ff ff3a 	bl	8028f8c <malloc>
 8029118:	4602      	mov	r2, r0
 802911a:	6320      	str	r0, [r4, #48]	@ 0x30
 802911c:	b920      	cbnz	r0, 8029128 <rand+0x20>
 802911e:	4b12      	ldr	r3, [pc, #72]	@ (8029168 <rand+0x60>)
 8029120:	4812      	ldr	r0, [pc, #72]	@ (802916c <rand+0x64>)
 8029122:	2152      	movs	r1, #82	@ 0x52
 8029124:	f001 fdbc 	bl	802aca0 <__assert_func>
 8029128:	4911      	ldr	r1, [pc, #68]	@ (8029170 <rand+0x68>)
 802912a:	4b12      	ldr	r3, [pc, #72]	@ (8029174 <rand+0x6c>)
 802912c:	e9c0 1300 	strd	r1, r3, [r0]
 8029130:	4b11      	ldr	r3, [pc, #68]	@ (8029178 <rand+0x70>)
 8029132:	6083      	str	r3, [r0, #8]
 8029134:	230b      	movs	r3, #11
 8029136:	8183      	strh	r3, [r0, #12]
 8029138:	2100      	movs	r1, #0
 802913a:	2001      	movs	r0, #1
 802913c:	e9c2 0104 	strd	r0, r1, [r2, #16]
 8029140:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 8029142:	480e      	ldr	r0, [pc, #56]	@ (802917c <rand+0x74>)
 8029144:	690b      	ldr	r3, [r1, #16]
 8029146:	694c      	ldr	r4, [r1, #20]
 8029148:	4a0d      	ldr	r2, [pc, #52]	@ (8029180 <rand+0x78>)
 802914a:	4358      	muls	r0, r3
 802914c:	fb02 0004 	mla	r0, r2, r4, r0
 8029150:	fba3 3202 	umull	r3, r2, r3, r2
 8029154:	3301      	adds	r3, #1
 8029156:	eb40 0002 	adc.w	r0, r0, r2
 802915a:	e9c1 3004 	strd	r3, r0, [r1, #16]
 802915e:	f020 4000 	bic.w	r0, r0, #2147483648	@ 0x80000000
 8029162:	bd10      	pop	{r4, pc}
 8029164:	240001d4 	.word	0x240001d4
 8029168:	08031b6e 	.word	0x08031b6e
 802916c:	08031b85 	.word	0x08031b85
 8029170:	abcd330e 	.word	0xabcd330e
 8029174:	e66d1234 	.word	0xe66d1234
 8029178:	0005deec 	.word	0x0005deec
 802917c:	5851f42d 	.word	0x5851f42d
 8029180:	4c957f2d 	.word	0x4c957f2d

08029184 <realloc>:
 8029184:	4b02      	ldr	r3, [pc, #8]	@ (8029190 <realloc+0xc>)
 8029186:	460a      	mov	r2, r1
 8029188:	4601      	mov	r1, r0
 802918a:	6818      	ldr	r0, [r3, #0]
 802918c:	f000 b802 	b.w	8029194 <_realloc_r>
 8029190:	240001d4 	.word	0x240001d4

08029194 <_realloc_r>:
 8029194:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8029198:	4680      	mov	r8, r0
 802919a:	4615      	mov	r5, r2
 802919c:	460c      	mov	r4, r1
 802919e:	b921      	cbnz	r1, 80291aa <_realloc_r+0x16>
 80291a0:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 80291a4:	4611      	mov	r1, r2
 80291a6:	f7ff bf23 	b.w	8028ff0 <_malloc_r>
 80291aa:	b92a      	cbnz	r2, 80291b8 <_realloc_r+0x24>
 80291ac:	f002 fb76 	bl	802b89c <_free_r>
 80291b0:	2400      	movs	r4, #0
 80291b2:	4620      	mov	r0, r4
 80291b4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80291b8:	f003 fbb5 	bl	802c926 <_malloc_usable_size_r>
 80291bc:	4285      	cmp	r5, r0
 80291be:	4606      	mov	r6, r0
 80291c0:	d802      	bhi.n	80291c8 <_realloc_r+0x34>
 80291c2:	ebb5 0f50 	cmp.w	r5, r0, lsr #1
 80291c6:	d8f4      	bhi.n	80291b2 <_realloc_r+0x1e>
 80291c8:	4629      	mov	r1, r5
 80291ca:	4640      	mov	r0, r8
 80291cc:	f7ff ff10 	bl	8028ff0 <_malloc_r>
 80291d0:	4607      	mov	r7, r0
 80291d2:	2800      	cmp	r0, #0
 80291d4:	d0ec      	beq.n	80291b0 <_realloc_r+0x1c>
 80291d6:	42b5      	cmp	r5, r6
 80291d8:	462a      	mov	r2, r5
 80291da:	4621      	mov	r1, r4
 80291dc:	bf28      	it	cs
 80291de:	4632      	movcs	r2, r6
 80291e0:	f001 fd45 	bl	802ac6e <memcpy>
 80291e4:	4621      	mov	r1, r4
 80291e6:	4640      	mov	r0, r8
 80291e8:	f002 fb58 	bl	802b89c <_free_r>
 80291ec:	463c      	mov	r4, r7
 80291ee:	e7e0      	b.n	80291b2 <_realloc_r+0x1e>

080291f0 <sulp>:
 80291f0:	b570      	push	{r4, r5, r6, lr}
 80291f2:	4604      	mov	r4, r0
 80291f4:	460d      	mov	r5, r1
 80291f6:	4616      	mov	r6, r2
 80291f8:	ec45 4b10 	vmov	d0, r4, r5
 80291fc:	f003 fa58 	bl	802c6b0 <__ulp>
 8029200:	b17e      	cbz	r6, 8029222 <sulp+0x32>
 8029202:	f3c5 530a 	ubfx	r3, r5, #20, #11
 8029206:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 802920a:	2b00      	cmp	r3, #0
 802920c:	dd09      	ble.n	8029222 <sulp+0x32>
 802920e:	051b      	lsls	r3, r3, #20
 8029210:	f103 517f 	add.w	r1, r3, #1069547520	@ 0x3fc00000
 8029214:	2000      	movs	r0, #0
 8029216:	f501 1140 	add.w	r1, r1, #3145728	@ 0x300000
 802921a:	ec41 0b17 	vmov	d7, r0, r1
 802921e:	ee20 0b07 	vmul.f64	d0, d0, d7
 8029222:	bd70      	pop	{r4, r5, r6, pc}
 8029224:	0000      	movs	r0, r0
	...

08029228 <_strtod_l>:
 8029228:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802922c:	ed2d 8b0a 	vpush	{d8-d12}
 8029230:	b097      	sub	sp, #92	@ 0x5c
 8029232:	4688      	mov	r8, r1
 8029234:	920e      	str	r2, [sp, #56]	@ 0x38
 8029236:	2200      	movs	r2, #0
 8029238:	9212      	str	r2, [sp, #72]	@ 0x48
 802923a:	9005      	str	r0, [sp, #20]
 802923c:	f04f 0a00 	mov.w	sl, #0
 8029240:	f04f 0b00 	mov.w	fp, #0
 8029244:	460a      	mov	r2, r1
 8029246:	9211      	str	r2, [sp, #68]	@ 0x44
 8029248:	7811      	ldrb	r1, [r2, #0]
 802924a:	292b      	cmp	r1, #43	@ 0x2b
 802924c:	d04c      	beq.n	80292e8 <_strtod_l+0xc0>
 802924e:	d839      	bhi.n	80292c4 <_strtod_l+0x9c>
 8029250:	290d      	cmp	r1, #13
 8029252:	d833      	bhi.n	80292bc <_strtod_l+0x94>
 8029254:	2908      	cmp	r1, #8
 8029256:	d833      	bhi.n	80292c0 <_strtod_l+0x98>
 8029258:	2900      	cmp	r1, #0
 802925a:	d03c      	beq.n	80292d6 <_strtod_l+0xae>
 802925c:	2200      	movs	r2, #0
 802925e:	9208      	str	r2, [sp, #32]
 8029260:	9d11      	ldr	r5, [sp, #68]	@ 0x44
 8029262:	782a      	ldrb	r2, [r5, #0]
 8029264:	2a30      	cmp	r2, #48	@ 0x30
 8029266:	f040 80b5 	bne.w	80293d4 <_strtod_l+0x1ac>
 802926a:	786a      	ldrb	r2, [r5, #1]
 802926c:	f002 02df 	and.w	r2, r2, #223	@ 0xdf
 8029270:	2a58      	cmp	r2, #88	@ 0x58
 8029272:	d170      	bne.n	8029356 <_strtod_l+0x12e>
 8029274:	9302      	str	r3, [sp, #8]
 8029276:	9b08      	ldr	r3, [sp, #32]
 8029278:	9301      	str	r3, [sp, #4]
 802927a:	ab12      	add	r3, sp, #72	@ 0x48
 802927c:	9300      	str	r3, [sp, #0]
 802927e:	4a8b      	ldr	r2, [pc, #556]	@ (80294ac <_strtod_l+0x284>)
 8029280:	9805      	ldr	r0, [sp, #20]
 8029282:	ab13      	add	r3, sp, #76	@ 0x4c
 8029284:	a911      	add	r1, sp, #68	@ 0x44
 8029286:	f002 fbbb 	bl	802ba00 <__gethex>
 802928a:	f010 060f 	ands.w	r6, r0, #15
 802928e:	4604      	mov	r4, r0
 8029290:	d005      	beq.n	802929e <_strtod_l+0x76>
 8029292:	2e06      	cmp	r6, #6
 8029294:	d12a      	bne.n	80292ec <_strtod_l+0xc4>
 8029296:	3501      	adds	r5, #1
 8029298:	2300      	movs	r3, #0
 802929a:	9511      	str	r5, [sp, #68]	@ 0x44
 802929c:	9308      	str	r3, [sp, #32]
 802929e:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 80292a0:	2b00      	cmp	r3, #0
 80292a2:	f040 852f 	bne.w	8029d04 <_strtod_l+0xadc>
 80292a6:	9b08      	ldr	r3, [sp, #32]
 80292a8:	ec4b ab10 	vmov	d0, sl, fp
 80292ac:	b1cb      	cbz	r3, 80292e2 <_strtod_l+0xba>
 80292ae:	eeb1 0b40 	vneg.f64	d0, d0
 80292b2:	b017      	add	sp, #92	@ 0x5c
 80292b4:	ecbd 8b0a 	vpop	{d8-d12}
 80292b8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80292bc:	2920      	cmp	r1, #32
 80292be:	d1cd      	bne.n	802925c <_strtod_l+0x34>
 80292c0:	3201      	adds	r2, #1
 80292c2:	e7c0      	b.n	8029246 <_strtod_l+0x1e>
 80292c4:	292d      	cmp	r1, #45	@ 0x2d
 80292c6:	d1c9      	bne.n	802925c <_strtod_l+0x34>
 80292c8:	2101      	movs	r1, #1
 80292ca:	9108      	str	r1, [sp, #32]
 80292cc:	1c51      	adds	r1, r2, #1
 80292ce:	9111      	str	r1, [sp, #68]	@ 0x44
 80292d0:	7852      	ldrb	r2, [r2, #1]
 80292d2:	2a00      	cmp	r2, #0
 80292d4:	d1c4      	bne.n	8029260 <_strtod_l+0x38>
 80292d6:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 80292d8:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 80292dc:	2b00      	cmp	r3, #0
 80292de:	f040 850f 	bne.w	8029d00 <_strtod_l+0xad8>
 80292e2:	ec4b ab10 	vmov	d0, sl, fp
 80292e6:	e7e4      	b.n	80292b2 <_strtod_l+0x8a>
 80292e8:	2100      	movs	r1, #0
 80292ea:	e7ee      	b.n	80292ca <_strtod_l+0xa2>
 80292ec:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 80292ee:	b13a      	cbz	r2, 8029300 <_strtod_l+0xd8>
 80292f0:	2135      	movs	r1, #53	@ 0x35
 80292f2:	a814      	add	r0, sp, #80	@ 0x50
 80292f4:	f003 fad3 	bl	802c89e <__copybits>
 80292f8:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80292fa:	9805      	ldr	r0, [sp, #20]
 80292fc:	f002 fea4 	bl	802c048 <_Bfree>
 8029300:	1e73      	subs	r3, r6, #1
 8029302:	9a13      	ldr	r2, [sp, #76]	@ 0x4c
 8029304:	2b04      	cmp	r3, #4
 8029306:	d806      	bhi.n	8029316 <_strtod_l+0xee>
 8029308:	e8df f003 	tbb	[pc, r3]
 802930c:	201d0314 	.word	0x201d0314
 8029310:	14          	.byte	0x14
 8029311:	00          	.byte	0x00
 8029312:	e9dd ab14 	ldrd	sl, fp, [sp, #80]	@ 0x50
 8029316:	05e3      	lsls	r3, r4, #23
 8029318:	bf48      	it	mi
 802931a:	f04b 4b00 	orrmi.w	fp, fp, #2147483648	@ 0x80000000
 802931e:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029322:	0d1b      	lsrs	r3, r3, #20
 8029324:	051b      	lsls	r3, r3, #20
 8029326:	2b00      	cmp	r3, #0
 8029328:	d1b9      	bne.n	802929e <_strtod_l+0x76>
 802932a:	f001 fc73 	bl	802ac14 <__errno>
 802932e:	2322      	movs	r3, #34	@ 0x22
 8029330:	6003      	str	r3, [r0, #0]
 8029332:	e7b4      	b.n	802929e <_strtod_l+0x76>
 8029334:	e9dd a314 	ldrd	sl, r3, [sp, #80]	@ 0x50
 8029338:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802933c:	f423 1380 	bic.w	r3, r3, #1048576	@ 0x100000
 8029340:	ea43 5b02 	orr.w	fp, r3, r2, lsl #20
 8029344:	e7e7      	b.n	8029316 <_strtod_l+0xee>
 8029346:	f8df b16c 	ldr.w	fp, [pc, #364]	@ 80294b4 <_strtod_l+0x28c>
 802934a:	e7e4      	b.n	8029316 <_strtod_l+0xee>
 802934c:	f06f 4b00 	mvn.w	fp, #2147483648	@ 0x80000000
 8029350:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029354:	e7df      	b.n	8029316 <_strtod_l+0xee>
 8029356:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029358:	1c5a      	adds	r2, r3, #1
 802935a:	9211      	str	r2, [sp, #68]	@ 0x44
 802935c:	785b      	ldrb	r3, [r3, #1]
 802935e:	2b30      	cmp	r3, #48	@ 0x30
 8029360:	d0f9      	beq.n	8029356 <_strtod_l+0x12e>
 8029362:	2b00      	cmp	r3, #0
 8029364:	d09b      	beq.n	802929e <_strtod_l+0x76>
 8029366:	2301      	movs	r3, #1
 8029368:	2600      	movs	r6, #0
 802936a:	9307      	str	r3, [sp, #28]
 802936c:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802936e:	930a      	str	r3, [sp, #40]	@ 0x28
 8029370:	46b1      	mov	r9, r6
 8029372:	4635      	mov	r5, r6
 8029374:	220a      	movs	r2, #10
 8029376:	9811      	ldr	r0, [sp, #68]	@ 0x44
 8029378:	7804      	ldrb	r4, [r0, #0]
 802937a:	f1a4 0330 	sub.w	r3, r4, #48	@ 0x30
 802937e:	b2d9      	uxtb	r1, r3
 8029380:	2909      	cmp	r1, #9
 8029382:	d929      	bls.n	80293d8 <_strtod_l+0x1b0>
 8029384:	494a      	ldr	r1, [pc, #296]	@ (80294b0 <_strtod_l+0x288>)
 8029386:	2201      	movs	r2, #1
 8029388:	f001 fb82 	bl	802aa90 <strncmp>
 802938c:	b378      	cbz	r0, 80293ee <_strtod_l+0x1c6>
 802938e:	2000      	movs	r0, #0
 8029390:	4622      	mov	r2, r4
 8029392:	462b      	mov	r3, r5
 8029394:	4607      	mov	r7, r0
 8029396:	9006      	str	r0, [sp, #24]
 8029398:	2a65      	cmp	r2, #101	@ 0x65
 802939a:	d001      	beq.n	80293a0 <_strtod_l+0x178>
 802939c:	2a45      	cmp	r2, #69	@ 0x45
 802939e:	d117      	bne.n	80293d0 <_strtod_l+0x1a8>
 80293a0:	b91b      	cbnz	r3, 80293aa <_strtod_l+0x182>
 80293a2:	9b07      	ldr	r3, [sp, #28]
 80293a4:	4303      	orrs	r3, r0
 80293a6:	d096      	beq.n	80292d6 <_strtod_l+0xae>
 80293a8:	2300      	movs	r3, #0
 80293aa:	f8dd 8044 	ldr.w	r8, [sp, #68]	@ 0x44
 80293ae:	f108 0201 	add.w	r2, r8, #1
 80293b2:	9211      	str	r2, [sp, #68]	@ 0x44
 80293b4:	f898 2001 	ldrb.w	r2, [r8, #1]
 80293b8:	2a2b      	cmp	r2, #43	@ 0x2b
 80293ba:	d06b      	beq.n	8029494 <_strtod_l+0x26c>
 80293bc:	2a2d      	cmp	r2, #45	@ 0x2d
 80293be:	d071      	beq.n	80294a4 <_strtod_l+0x27c>
 80293c0:	f04f 0e00 	mov.w	lr, #0
 80293c4:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 80293c8:	2c09      	cmp	r4, #9
 80293ca:	d979      	bls.n	80294c0 <_strtod_l+0x298>
 80293cc:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 80293d0:	2400      	movs	r4, #0
 80293d2:	e094      	b.n	80294fe <_strtod_l+0x2d6>
 80293d4:	2300      	movs	r3, #0
 80293d6:	e7c7      	b.n	8029368 <_strtod_l+0x140>
 80293d8:	2d08      	cmp	r5, #8
 80293da:	f100 0001 	add.w	r0, r0, #1
 80293de:	bfd4      	ite	le
 80293e0:	fb02 3909 	mlale	r9, r2, r9, r3
 80293e4:	fb02 3606 	mlagt	r6, r2, r6, r3
 80293e8:	3501      	adds	r5, #1
 80293ea:	9011      	str	r0, [sp, #68]	@ 0x44
 80293ec:	e7c3      	b.n	8029376 <_strtod_l+0x14e>
 80293ee:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80293f0:	1c5a      	adds	r2, r3, #1
 80293f2:	9211      	str	r2, [sp, #68]	@ 0x44
 80293f4:	785a      	ldrb	r2, [r3, #1]
 80293f6:	b375      	cbz	r5, 8029456 <_strtod_l+0x22e>
 80293f8:	4607      	mov	r7, r0
 80293fa:	462b      	mov	r3, r5
 80293fc:	f1a2 0130 	sub.w	r1, r2, #48	@ 0x30
 8029400:	2909      	cmp	r1, #9
 8029402:	d913      	bls.n	802942c <_strtod_l+0x204>
 8029404:	2101      	movs	r1, #1
 8029406:	9106      	str	r1, [sp, #24]
 8029408:	e7c6      	b.n	8029398 <_strtod_l+0x170>
 802940a:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802940c:	1c5a      	adds	r2, r3, #1
 802940e:	9211      	str	r2, [sp, #68]	@ 0x44
 8029410:	785a      	ldrb	r2, [r3, #1]
 8029412:	3001      	adds	r0, #1
 8029414:	2a30      	cmp	r2, #48	@ 0x30
 8029416:	d0f8      	beq.n	802940a <_strtod_l+0x1e2>
 8029418:	f1a2 0331 	sub.w	r3, r2, #49	@ 0x31
 802941c:	2b08      	cmp	r3, #8
 802941e:	f200 8476 	bhi.w	8029d0e <_strtod_l+0xae6>
 8029422:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029424:	930a      	str	r3, [sp, #40]	@ 0x28
 8029426:	4607      	mov	r7, r0
 8029428:	2000      	movs	r0, #0
 802942a:	4603      	mov	r3, r0
 802942c:	3a30      	subs	r2, #48	@ 0x30
 802942e:	f100 0101 	add.w	r1, r0, #1
 8029432:	d023      	beq.n	802947c <_strtod_l+0x254>
 8029434:	440f      	add	r7, r1
 8029436:	eb00 0c03 	add.w	ip, r0, r3
 802943a:	4619      	mov	r1, r3
 802943c:	240a      	movs	r4, #10
 802943e:	4561      	cmp	r1, ip
 8029440:	d10b      	bne.n	802945a <_strtod_l+0x232>
 8029442:	1c5c      	adds	r4, r3, #1
 8029444:	4403      	add	r3, r0
 8029446:	2b08      	cmp	r3, #8
 8029448:	4404      	add	r4, r0
 802944a:	dc11      	bgt.n	8029470 <_strtod_l+0x248>
 802944c:	230a      	movs	r3, #10
 802944e:	fb03 2909 	mla	r9, r3, r9, r2
 8029452:	2100      	movs	r1, #0
 8029454:	e013      	b.n	802947e <_strtod_l+0x256>
 8029456:	4628      	mov	r0, r5
 8029458:	e7dc      	b.n	8029414 <_strtod_l+0x1ec>
 802945a:	2908      	cmp	r1, #8
 802945c:	f101 0101 	add.w	r1, r1, #1
 8029460:	dc02      	bgt.n	8029468 <_strtod_l+0x240>
 8029462:	fb04 f909 	mul.w	r9, r4, r9
 8029466:	e7ea      	b.n	802943e <_strtod_l+0x216>
 8029468:	2910      	cmp	r1, #16
 802946a:	bfd8      	it	le
 802946c:	4366      	mulle	r6, r4
 802946e:	e7e6      	b.n	802943e <_strtod_l+0x216>
 8029470:	2b0f      	cmp	r3, #15
 8029472:	dcee      	bgt.n	8029452 <_strtod_l+0x22a>
 8029474:	230a      	movs	r3, #10
 8029476:	fb03 2606 	mla	r6, r3, r6, r2
 802947a:	e7ea      	b.n	8029452 <_strtod_l+0x22a>
 802947c:	461c      	mov	r4, r3
 802947e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029480:	1c5a      	adds	r2, r3, #1
 8029482:	9211      	str	r2, [sp, #68]	@ 0x44
 8029484:	785a      	ldrb	r2, [r3, #1]
 8029486:	4608      	mov	r0, r1
 8029488:	4623      	mov	r3, r4
 802948a:	e7b7      	b.n	80293fc <_strtod_l+0x1d4>
 802948c:	2301      	movs	r3, #1
 802948e:	2700      	movs	r7, #0
 8029490:	9306      	str	r3, [sp, #24]
 8029492:	e786      	b.n	80293a2 <_strtod_l+0x17a>
 8029494:	f04f 0e00 	mov.w	lr, #0
 8029498:	f108 0202 	add.w	r2, r8, #2
 802949c:	9211      	str	r2, [sp, #68]	@ 0x44
 802949e:	f898 2002 	ldrb.w	r2, [r8, #2]
 80294a2:	e78f      	b.n	80293c4 <_strtod_l+0x19c>
 80294a4:	f04f 0e01 	mov.w	lr, #1
 80294a8:	e7f6      	b.n	8029498 <_strtod_l+0x270>
 80294aa:	bf00      	nop
 80294ac:	08031bf4 	.word	0x08031bf4
 80294b0:	08031bdd 	.word	0x08031bdd
 80294b4:	7ff00000 	.word	0x7ff00000
 80294b8:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80294ba:	1c54      	adds	r4, r2, #1
 80294bc:	9411      	str	r4, [sp, #68]	@ 0x44
 80294be:	7852      	ldrb	r2, [r2, #1]
 80294c0:	2a30      	cmp	r2, #48	@ 0x30
 80294c2:	d0f9      	beq.n	80294b8 <_strtod_l+0x290>
 80294c4:	f1a2 0431 	sub.w	r4, r2, #49	@ 0x31
 80294c8:	2c08      	cmp	r4, #8
 80294ca:	d881      	bhi.n	80293d0 <_strtod_l+0x1a8>
 80294cc:	f1a2 0c30 	sub.w	ip, r2, #48	@ 0x30
 80294d0:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80294d2:	9209      	str	r2, [sp, #36]	@ 0x24
 80294d4:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80294d6:	1c51      	adds	r1, r2, #1
 80294d8:	9111      	str	r1, [sp, #68]	@ 0x44
 80294da:	7852      	ldrb	r2, [r2, #1]
 80294dc:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 80294e0:	2c09      	cmp	r4, #9
 80294e2:	d938      	bls.n	8029556 <_strtod_l+0x32e>
 80294e4:	9c09      	ldr	r4, [sp, #36]	@ 0x24
 80294e6:	1b0c      	subs	r4, r1, r4
 80294e8:	2c08      	cmp	r4, #8
 80294ea:	f644 641f 	movw	r4, #19999	@ 0x4e1f
 80294ee:	dc02      	bgt.n	80294f6 <_strtod_l+0x2ce>
 80294f0:	4564      	cmp	r4, ip
 80294f2:	bfa8      	it	ge
 80294f4:	4664      	movge	r4, ip
 80294f6:	f1be 0f00 	cmp.w	lr, #0
 80294fa:	d000      	beq.n	80294fe <_strtod_l+0x2d6>
 80294fc:	4264      	negs	r4, r4
 80294fe:	2b00      	cmp	r3, #0
 8029500:	d14e      	bne.n	80295a0 <_strtod_l+0x378>
 8029502:	9b07      	ldr	r3, [sp, #28]
 8029504:	4318      	orrs	r0, r3
 8029506:	f47f aeca 	bne.w	802929e <_strtod_l+0x76>
 802950a:	9b06      	ldr	r3, [sp, #24]
 802950c:	2b00      	cmp	r3, #0
 802950e:	f47f aee2 	bne.w	80292d6 <_strtod_l+0xae>
 8029512:	2a69      	cmp	r2, #105	@ 0x69
 8029514:	d027      	beq.n	8029566 <_strtod_l+0x33e>
 8029516:	dc24      	bgt.n	8029562 <_strtod_l+0x33a>
 8029518:	2a49      	cmp	r2, #73	@ 0x49
 802951a:	d024      	beq.n	8029566 <_strtod_l+0x33e>
 802951c:	2a4e      	cmp	r2, #78	@ 0x4e
 802951e:	f47f aeda 	bne.w	80292d6 <_strtod_l+0xae>
 8029522:	4997      	ldr	r1, [pc, #604]	@ (8029780 <_strtod_l+0x558>)
 8029524:	a811      	add	r0, sp, #68	@ 0x44
 8029526:	f002 fc8d 	bl	802be44 <__match>
 802952a:	2800      	cmp	r0, #0
 802952c:	f43f aed3 	beq.w	80292d6 <_strtod_l+0xae>
 8029530:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029532:	781b      	ldrb	r3, [r3, #0]
 8029534:	2b28      	cmp	r3, #40	@ 0x28
 8029536:	d12d      	bne.n	8029594 <_strtod_l+0x36c>
 8029538:	4992      	ldr	r1, [pc, #584]	@ (8029784 <_strtod_l+0x55c>)
 802953a:	aa14      	add	r2, sp, #80	@ 0x50
 802953c:	a811      	add	r0, sp, #68	@ 0x44
 802953e:	f002 fc95 	bl	802be6c <__hexnan>
 8029542:	2805      	cmp	r0, #5
 8029544:	d126      	bne.n	8029594 <_strtod_l+0x36c>
 8029546:	9b15      	ldr	r3, [sp, #84]	@ 0x54
 8029548:	f8dd a050 	ldr.w	sl, [sp, #80]	@ 0x50
 802954c:	f043 4bff 	orr.w	fp, r3, #2139095040	@ 0x7f800000
 8029550:	f44b 0be0 	orr.w	fp, fp, #7340032	@ 0x700000
 8029554:	e6a3      	b.n	802929e <_strtod_l+0x76>
 8029556:	240a      	movs	r4, #10
 8029558:	fb04 2c0c 	mla	ip, r4, ip, r2
 802955c:	f1ac 0c30 	sub.w	ip, ip, #48	@ 0x30
 8029560:	e7b8      	b.n	80294d4 <_strtod_l+0x2ac>
 8029562:	2a6e      	cmp	r2, #110	@ 0x6e
 8029564:	e7db      	b.n	802951e <_strtod_l+0x2f6>
 8029566:	4988      	ldr	r1, [pc, #544]	@ (8029788 <_strtod_l+0x560>)
 8029568:	a811      	add	r0, sp, #68	@ 0x44
 802956a:	f002 fc6b 	bl	802be44 <__match>
 802956e:	2800      	cmp	r0, #0
 8029570:	f43f aeb1 	beq.w	80292d6 <_strtod_l+0xae>
 8029574:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029576:	4985      	ldr	r1, [pc, #532]	@ (802978c <_strtod_l+0x564>)
 8029578:	3b01      	subs	r3, #1
 802957a:	a811      	add	r0, sp, #68	@ 0x44
 802957c:	9311      	str	r3, [sp, #68]	@ 0x44
 802957e:	f002 fc61 	bl	802be44 <__match>
 8029582:	b910      	cbnz	r0, 802958a <_strtod_l+0x362>
 8029584:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029586:	3301      	adds	r3, #1
 8029588:	9311      	str	r3, [sp, #68]	@ 0x44
 802958a:	f8df b214 	ldr.w	fp, [pc, #532]	@ 80297a0 <_strtod_l+0x578>
 802958e:	f04f 0a00 	mov.w	sl, #0
 8029592:	e684      	b.n	802929e <_strtod_l+0x76>
 8029594:	487e      	ldr	r0, [pc, #504]	@ (8029790 <_strtod_l+0x568>)
 8029596:	f001 fb7b 	bl	802ac90 <nan>
 802959a:	ec5b ab10 	vmov	sl, fp, d0
 802959e:	e67e      	b.n	802929e <_strtod_l+0x76>
 80295a0:	ee07 9a90 	vmov	s15, r9
 80295a4:	1be2      	subs	r2, r4, r7
 80295a6:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 80295aa:	2d00      	cmp	r5, #0
 80295ac:	bf08      	it	eq
 80295ae:	461d      	moveq	r5, r3
 80295b0:	2b10      	cmp	r3, #16
 80295b2:	9209      	str	r2, [sp, #36]	@ 0x24
 80295b4:	461a      	mov	r2, r3
 80295b6:	bfa8      	it	ge
 80295b8:	2210      	movge	r2, #16
 80295ba:	2b09      	cmp	r3, #9
 80295bc:	ec5b ab17 	vmov	sl, fp, d7
 80295c0:	dc15      	bgt.n	80295ee <_strtod_l+0x3c6>
 80295c2:	1be1      	subs	r1, r4, r7
 80295c4:	2900      	cmp	r1, #0
 80295c6:	f43f ae6a 	beq.w	802929e <_strtod_l+0x76>
 80295ca:	eba4 0107 	sub.w	r1, r4, r7
 80295ce:	dd72      	ble.n	80296b6 <_strtod_l+0x48e>
 80295d0:	2916      	cmp	r1, #22
 80295d2:	dc59      	bgt.n	8029688 <_strtod_l+0x460>
 80295d4:	4b6f      	ldr	r3, [pc, #444]	@ (8029794 <_strtod_l+0x56c>)
 80295d6:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 80295d8:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 80295dc:	ed93 7b00 	vldr	d7, [r3]
 80295e0:	ec4b ab16 	vmov	d6, sl, fp
 80295e4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80295e8:	ec5b ab17 	vmov	sl, fp, d7
 80295ec:	e657      	b.n	802929e <_strtod_l+0x76>
 80295ee:	4969      	ldr	r1, [pc, #420]	@ (8029794 <_strtod_l+0x56c>)
 80295f0:	eb01 01c2 	add.w	r1, r1, r2, lsl #3
 80295f4:	ed11 5b12 	vldr	d5, [r1, #-72]	@ 0xffffffb8
 80295f8:	ee06 6a90 	vmov	s13, r6
 80295fc:	2b0f      	cmp	r3, #15
 80295fe:	eeb8 6b66 	vcvt.f64.u32	d6, s13
 8029602:	eea7 6b05 	vfma.f64	d6, d7, d5
 8029606:	ec5b ab16 	vmov	sl, fp, d6
 802960a:	ddda      	ble.n	80295c2 <_strtod_l+0x39a>
 802960c:	1a9a      	subs	r2, r3, r2
 802960e:	1be1      	subs	r1, r4, r7
 8029610:	440a      	add	r2, r1
 8029612:	2a00      	cmp	r2, #0
 8029614:	f340 8094 	ble.w	8029740 <_strtod_l+0x518>
 8029618:	f012 000f 	ands.w	r0, r2, #15
 802961c:	d00a      	beq.n	8029634 <_strtod_l+0x40c>
 802961e:	495d      	ldr	r1, [pc, #372]	@ (8029794 <_strtod_l+0x56c>)
 8029620:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8029624:	ed91 7b00 	vldr	d7, [r1]
 8029628:	ec4b ab16 	vmov	d6, sl, fp
 802962c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029630:	ec5b ab17 	vmov	sl, fp, d7
 8029634:	f032 020f 	bics.w	r2, r2, #15
 8029638:	d073      	beq.n	8029722 <_strtod_l+0x4fa>
 802963a:	f5b2 7f9a 	cmp.w	r2, #308	@ 0x134
 802963e:	dd47      	ble.n	80296d0 <_strtod_l+0x4a8>
 8029640:	2400      	movs	r4, #0
 8029642:	4625      	mov	r5, r4
 8029644:	9407      	str	r4, [sp, #28]
 8029646:	4626      	mov	r6, r4
 8029648:	9a05      	ldr	r2, [sp, #20]
 802964a:	f8df b154 	ldr.w	fp, [pc, #340]	@ 80297a0 <_strtod_l+0x578>
 802964e:	2322      	movs	r3, #34	@ 0x22
 8029650:	6013      	str	r3, [r2, #0]
 8029652:	f04f 0a00 	mov.w	sl, #0
 8029656:	9b07      	ldr	r3, [sp, #28]
 8029658:	2b00      	cmp	r3, #0
 802965a:	f43f ae20 	beq.w	802929e <_strtod_l+0x76>
 802965e:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029660:	9805      	ldr	r0, [sp, #20]
 8029662:	f002 fcf1 	bl	802c048 <_Bfree>
 8029666:	9805      	ldr	r0, [sp, #20]
 8029668:	4631      	mov	r1, r6
 802966a:	f002 fced 	bl	802c048 <_Bfree>
 802966e:	9805      	ldr	r0, [sp, #20]
 8029670:	4629      	mov	r1, r5
 8029672:	f002 fce9 	bl	802c048 <_Bfree>
 8029676:	9907      	ldr	r1, [sp, #28]
 8029678:	9805      	ldr	r0, [sp, #20]
 802967a:	f002 fce5 	bl	802c048 <_Bfree>
 802967e:	9805      	ldr	r0, [sp, #20]
 8029680:	4621      	mov	r1, r4
 8029682:	f002 fce1 	bl	802c048 <_Bfree>
 8029686:	e60a      	b.n	802929e <_strtod_l+0x76>
 8029688:	f1c3 0125 	rsb	r1, r3, #37	@ 0x25
 802968c:	1be0      	subs	r0, r4, r7
 802968e:	4281      	cmp	r1, r0
 8029690:	dbbc      	blt.n	802960c <_strtod_l+0x3e4>
 8029692:	4a40      	ldr	r2, [pc, #256]	@ (8029794 <_strtod_l+0x56c>)
 8029694:	f1c3 030f 	rsb	r3, r3, #15
 8029698:	eb02 01c3 	add.w	r1, r2, r3, lsl #3
 802969c:	ed91 7b00 	vldr	d7, [r1]
 80296a0:	9909      	ldr	r1, [sp, #36]	@ 0x24
 80296a2:	ec4b ab16 	vmov	d6, sl, fp
 80296a6:	1acb      	subs	r3, r1, r3
 80296a8:	eb02 02c3 	add.w	r2, r2, r3, lsl #3
 80296ac:	ee27 7b06 	vmul.f64	d7, d7, d6
 80296b0:	ed92 6b00 	vldr	d6, [r2]
 80296b4:	e796      	b.n	80295e4 <_strtod_l+0x3bc>
 80296b6:	3116      	adds	r1, #22
 80296b8:	dba8      	blt.n	802960c <_strtod_l+0x3e4>
 80296ba:	4b36      	ldr	r3, [pc, #216]	@ (8029794 <_strtod_l+0x56c>)
 80296bc:	1b3c      	subs	r4, r7, r4
 80296be:	eb03 04c4 	add.w	r4, r3, r4, lsl #3
 80296c2:	ed94 7b00 	vldr	d7, [r4]
 80296c6:	ec4b ab16 	vmov	d6, sl, fp
 80296ca:	ee86 7b07 	vdiv.f64	d7, d6, d7
 80296ce:	e78b      	b.n	80295e8 <_strtod_l+0x3c0>
 80296d0:	2000      	movs	r0, #0
 80296d2:	ec4b ab17 	vmov	d7, sl, fp
 80296d6:	4e30      	ldr	r6, [pc, #192]	@ (8029798 <_strtod_l+0x570>)
 80296d8:	1112      	asrs	r2, r2, #4
 80296da:	4601      	mov	r1, r0
 80296dc:	2a01      	cmp	r2, #1
 80296de:	dc23      	bgt.n	8029728 <_strtod_l+0x500>
 80296e0:	b108      	cbz	r0, 80296e6 <_strtod_l+0x4be>
 80296e2:	ec5b ab17 	vmov	sl, fp, d7
 80296e6:	4a2c      	ldr	r2, [pc, #176]	@ (8029798 <_strtod_l+0x570>)
 80296e8:	482c      	ldr	r0, [pc, #176]	@ (802979c <_strtod_l+0x574>)
 80296ea:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 80296ee:	ed92 7b00 	vldr	d7, [r2]
 80296f2:	f1ab 7b54 	sub.w	fp, fp, #55574528	@ 0x3500000
 80296f6:	ec4b ab16 	vmov	d6, sl, fp
 80296fa:	4a29      	ldr	r2, [pc, #164]	@ (80297a0 <_strtod_l+0x578>)
 80296fc:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029700:	ee17 1a90 	vmov	r1, s15
 8029704:	400a      	ands	r2, r1
 8029706:	4282      	cmp	r2, r0
 8029708:	ec5b ab17 	vmov	sl, fp, d7
 802970c:	d898      	bhi.n	8029640 <_strtod_l+0x418>
 802970e:	f5a0 1080 	sub.w	r0, r0, #1048576	@ 0x100000
 8029712:	4282      	cmp	r2, r0
 8029714:	bf86      	itte	hi
 8029716:	f8df b08c 	ldrhi.w	fp, [pc, #140]	@ 80297a4 <_strtod_l+0x57c>
 802971a:	f04f 3aff 	movhi.w	sl, #4294967295	@ 0xffffffff
 802971e:	f101 7b54 	addls.w	fp, r1, #55574528	@ 0x3500000
 8029722:	2200      	movs	r2, #0
 8029724:	9206      	str	r2, [sp, #24]
 8029726:	e076      	b.n	8029816 <_strtod_l+0x5ee>
 8029728:	f012 0f01 	tst.w	r2, #1
 802972c:	d004      	beq.n	8029738 <_strtod_l+0x510>
 802972e:	ed96 6b00 	vldr	d6, [r6]
 8029732:	2001      	movs	r0, #1
 8029734:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029738:	3101      	adds	r1, #1
 802973a:	1052      	asrs	r2, r2, #1
 802973c:	3608      	adds	r6, #8
 802973e:	e7cd      	b.n	80296dc <_strtod_l+0x4b4>
 8029740:	d0ef      	beq.n	8029722 <_strtod_l+0x4fa>
 8029742:	4252      	negs	r2, r2
 8029744:	f012 000f 	ands.w	r0, r2, #15
 8029748:	d00a      	beq.n	8029760 <_strtod_l+0x538>
 802974a:	4912      	ldr	r1, [pc, #72]	@ (8029794 <_strtod_l+0x56c>)
 802974c:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8029750:	ed91 7b00 	vldr	d7, [r1]
 8029754:	ec4b ab16 	vmov	d6, sl, fp
 8029758:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802975c:	ec5b ab17 	vmov	sl, fp, d7
 8029760:	1112      	asrs	r2, r2, #4
 8029762:	d0de      	beq.n	8029722 <_strtod_l+0x4fa>
 8029764:	2a1f      	cmp	r2, #31
 8029766:	dd1f      	ble.n	80297a8 <_strtod_l+0x580>
 8029768:	2400      	movs	r4, #0
 802976a:	4625      	mov	r5, r4
 802976c:	9407      	str	r4, [sp, #28]
 802976e:	4626      	mov	r6, r4
 8029770:	9a05      	ldr	r2, [sp, #20]
 8029772:	2322      	movs	r3, #34	@ 0x22
 8029774:	f04f 0a00 	mov.w	sl, #0
 8029778:	f04f 0b00 	mov.w	fp, #0
 802977c:	6013      	str	r3, [r2, #0]
 802977e:	e76a      	b.n	8029656 <_strtod_l+0x42e>
 8029780:	08031d3e 	.word	0x08031d3e
 8029784:	08031be0 	.word	0x08031be0
 8029788:	08031d36 	.word	0x08031d36
 802978c:	08031dac 	.word	0x08031dac
 8029790:	08031da8 	.word	0x08031da8
 8029794:	08031f10 	.word	0x08031f10
 8029798:	08031ee8 	.word	0x08031ee8
 802979c:	7ca00000 	.word	0x7ca00000
 80297a0:	7ff00000 	.word	0x7ff00000
 80297a4:	7fefffff 	.word	0x7fefffff
 80297a8:	f012 0110 	ands.w	r1, r2, #16
 80297ac:	bf18      	it	ne
 80297ae:	216a      	movne	r1, #106	@ 0x6a
 80297b0:	9106      	str	r1, [sp, #24]
 80297b2:	ec4b ab17 	vmov	d7, sl, fp
 80297b6:	49b0      	ldr	r1, [pc, #704]	@ (8029a78 <_strtod_l+0x850>)
 80297b8:	2000      	movs	r0, #0
 80297ba:	07d6      	lsls	r6, r2, #31
 80297bc:	d504      	bpl.n	80297c8 <_strtod_l+0x5a0>
 80297be:	ed91 6b00 	vldr	d6, [r1]
 80297c2:	2001      	movs	r0, #1
 80297c4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80297c8:	1052      	asrs	r2, r2, #1
 80297ca:	f101 0108 	add.w	r1, r1, #8
 80297ce:	d1f4      	bne.n	80297ba <_strtod_l+0x592>
 80297d0:	b108      	cbz	r0, 80297d6 <_strtod_l+0x5ae>
 80297d2:	ec5b ab17 	vmov	sl, fp, d7
 80297d6:	9a06      	ldr	r2, [sp, #24]
 80297d8:	b1b2      	cbz	r2, 8029808 <_strtod_l+0x5e0>
 80297da:	f3cb 510a 	ubfx	r1, fp, #20, #11
 80297de:	f1c1 026b 	rsb	r2, r1, #107	@ 0x6b
 80297e2:	2a00      	cmp	r2, #0
 80297e4:	4658      	mov	r0, fp
 80297e6:	dd0f      	ble.n	8029808 <_strtod_l+0x5e0>
 80297e8:	2a1f      	cmp	r2, #31
 80297ea:	dd55      	ble.n	8029898 <_strtod_l+0x670>
 80297ec:	2a34      	cmp	r2, #52	@ 0x34
 80297ee:	bfde      	ittt	le
 80297f0:	f04f 32ff 	movle.w	r2, #4294967295	@ 0xffffffff
 80297f4:	f1c1 014b 	rsble	r1, r1, #75	@ 0x4b
 80297f8:	408a      	lslle	r2, r1
 80297fa:	f04f 0a00 	mov.w	sl, #0
 80297fe:	bfcc      	ite	gt
 8029800:	f04f 7b5c 	movgt.w	fp, #57671680	@ 0x3700000
 8029804:	ea02 0b00 	andle.w	fp, r2, r0
 8029808:	ec4b ab17 	vmov	d7, sl, fp
 802980c:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8029810:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029814:	d0a8      	beq.n	8029768 <_strtod_l+0x540>
 8029816:	990a      	ldr	r1, [sp, #40]	@ 0x28
 8029818:	9805      	ldr	r0, [sp, #20]
 802981a:	f8cd 9000 	str.w	r9, [sp]
 802981e:	462a      	mov	r2, r5
 8029820:	f002 fc7a 	bl	802c118 <__s2b>
 8029824:	9007      	str	r0, [sp, #28]
 8029826:	2800      	cmp	r0, #0
 8029828:	f43f af0a 	beq.w	8029640 <_strtod_l+0x418>
 802982c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802982e:	1b3f      	subs	r7, r7, r4
 8029830:	2b00      	cmp	r3, #0
 8029832:	bfb4      	ite	lt
 8029834:	463b      	movlt	r3, r7
 8029836:	2300      	movge	r3, #0
 8029838:	930a      	str	r3, [sp, #40]	@ 0x28
 802983a:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802983c:	ed9f bb8a 	vldr	d11, [pc, #552]	@ 8029a68 <_strtod_l+0x840>
 8029840:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
 8029844:	2400      	movs	r4, #0
 8029846:	930d      	str	r3, [sp, #52]	@ 0x34
 8029848:	4625      	mov	r5, r4
 802984a:	9b07      	ldr	r3, [sp, #28]
 802984c:	9805      	ldr	r0, [sp, #20]
 802984e:	6859      	ldr	r1, [r3, #4]
 8029850:	f002 fbba 	bl	802bfc8 <_Balloc>
 8029854:	4606      	mov	r6, r0
 8029856:	2800      	cmp	r0, #0
 8029858:	f43f aef6 	beq.w	8029648 <_strtod_l+0x420>
 802985c:	9b07      	ldr	r3, [sp, #28]
 802985e:	691a      	ldr	r2, [r3, #16]
 8029860:	ec4b ab19 	vmov	d9, sl, fp
 8029864:	3202      	adds	r2, #2
 8029866:	f103 010c 	add.w	r1, r3, #12
 802986a:	0092      	lsls	r2, r2, #2
 802986c:	300c      	adds	r0, #12
 802986e:	f001 f9fe 	bl	802ac6e <memcpy>
 8029872:	eeb0 0b49 	vmov.f64	d0, d9
 8029876:	9805      	ldr	r0, [sp, #20]
 8029878:	aa14      	add	r2, sp, #80	@ 0x50
 802987a:	a913      	add	r1, sp, #76	@ 0x4c
 802987c:	f002 ff88 	bl	802c790 <__d2b>
 8029880:	9012      	str	r0, [sp, #72]	@ 0x48
 8029882:	2800      	cmp	r0, #0
 8029884:	f43f aee0 	beq.w	8029648 <_strtod_l+0x420>
 8029888:	9805      	ldr	r0, [sp, #20]
 802988a:	2101      	movs	r1, #1
 802988c:	f002 fcda 	bl	802c244 <__i2b>
 8029890:	4605      	mov	r5, r0
 8029892:	b940      	cbnz	r0, 80298a6 <_strtod_l+0x67e>
 8029894:	2500      	movs	r5, #0
 8029896:	e6d7      	b.n	8029648 <_strtod_l+0x420>
 8029898:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802989c:	fa01 f202 	lsl.w	r2, r1, r2
 80298a0:	ea02 0a0a 	and.w	sl, r2, sl
 80298a4:	e7b0      	b.n	8029808 <_strtod_l+0x5e0>
 80298a6:	9f13      	ldr	r7, [sp, #76]	@ 0x4c
 80298a8:	9a14      	ldr	r2, [sp, #80]	@ 0x50
 80298aa:	2f00      	cmp	r7, #0
 80298ac:	bfab      	itete	ge
 80298ae:	9b0a      	ldrge	r3, [sp, #40]	@ 0x28
 80298b0:	9b0d      	ldrlt	r3, [sp, #52]	@ 0x34
 80298b2:	f8dd 8034 	ldrge.w	r8, [sp, #52]	@ 0x34
 80298b6:	f8dd 9028 	ldrlt.w	r9, [sp, #40]	@ 0x28
 80298ba:	bfac      	ite	ge
 80298bc:	eb07 0903 	addge.w	r9, r7, r3
 80298c0:	eba3 0807 	sublt.w	r8, r3, r7
 80298c4:	9b06      	ldr	r3, [sp, #24]
 80298c6:	1aff      	subs	r7, r7, r3
 80298c8:	4417      	add	r7, r2
 80298ca:	f1c2 0336 	rsb	r3, r2, #54	@ 0x36
 80298ce:	4a6b      	ldr	r2, [pc, #428]	@ (8029a7c <_strtod_l+0x854>)
 80298d0:	3f01      	subs	r7, #1
 80298d2:	4297      	cmp	r7, r2
 80298d4:	da51      	bge.n	802997a <_strtod_l+0x752>
 80298d6:	1bd1      	subs	r1, r2, r7
 80298d8:	291f      	cmp	r1, #31
 80298da:	eba3 0301 	sub.w	r3, r3, r1
 80298de:	f04f 0201 	mov.w	r2, #1
 80298e2:	dc3e      	bgt.n	8029962 <_strtod_l+0x73a>
 80298e4:	408a      	lsls	r2, r1
 80298e6:	920c      	str	r2, [sp, #48]	@ 0x30
 80298e8:	2200      	movs	r2, #0
 80298ea:	920b      	str	r2, [sp, #44]	@ 0x2c
 80298ec:	eb09 0703 	add.w	r7, r9, r3
 80298f0:	4498      	add	r8, r3
 80298f2:	9b06      	ldr	r3, [sp, #24]
 80298f4:	45b9      	cmp	r9, r7
 80298f6:	4498      	add	r8, r3
 80298f8:	464b      	mov	r3, r9
 80298fa:	bfa8      	it	ge
 80298fc:	463b      	movge	r3, r7
 80298fe:	4543      	cmp	r3, r8
 8029900:	bfa8      	it	ge
 8029902:	4643      	movge	r3, r8
 8029904:	2b00      	cmp	r3, #0
 8029906:	bfc2      	ittt	gt
 8029908:	1aff      	subgt	r7, r7, r3
 802990a:	eba8 0803 	subgt.w	r8, r8, r3
 802990e:	eba9 0903 	subgt.w	r9, r9, r3
 8029912:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8029914:	2b00      	cmp	r3, #0
 8029916:	dd16      	ble.n	8029946 <_strtod_l+0x71e>
 8029918:	4629      	mov	r1, r5
 802991a:	9805      	ldr	r0, [sp, #20]
 802991c:	461a      	mov	r2, r3
 802991e:	f002 fd51 	bl	802c3c4 <__pow5mult>
 8029922:	4605      	mov	r5, r0
 8029924:	2800      	cmp	r0, #0
 8029926:	d0b5      	beq.n	8029894 <_strtod_l+0x66c>
 8029928:	4601      	mov	r1, r0
 802992a:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 802992c:	9805      	ldr	r0, [sp, #20]
 802992e:	f002 fc9f 	bl	802c270 <__multiply>
 8029932:	900f      	str	r0, [sp, #60]	@ 0x3c
 8029934:	2800      	cmp	r0, #0
 8029936:	f43f ae87 	beq.w	8029648 <_strtod_l+0x420>
 802993a:	9912      	ldr	r1, [sp, #72]	@ 0x48
 802993c:	9805      	ldr	r0, [sp, #20]
 802993e:	f002 fb83 	bl	802c048 <_Bfree>
 8029942:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 8029944:	9312      	str	r3, [sp, #72]	@ 0x48
 8029946:	2f00      	cmp	r7, #0
 8029948:	dc1b      	bgt.n	8029982 <_strtod_l+0x75a>
 802994a:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802994c:	2b00      	cmp	r3, #0
 802994e:	dd21      	ble.n	8029994 <_strtod_l+0x76c>
 8029950:	4631      	mov	r1, r6
 8029952:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8029954:	9805      	ldr	r0, [sp, #20]
 8029956:	f002 fd35 	bl	802c3c4 <__pow5mult>
 802995a:	4606      	mov	r6, r0
 802995c:	b9d0      	cbnz	r0, 8029994 <_strtod_l+0x76c>
 802995e:	2600      	movs	r6, #0
 8029960:	e672      	b.n	8029648 <_strtod_l+0x420>
 8029962:	f1c7 477f 	rsb	r7, r7, #4278190080	@ 0xff000000
 8029966:	f507 077f 	add.w	r7, r7, #16711680	@ 0xff0000
 802996a:	f507 477b 	add.w	r7, r7, #64256	@ 0xfb00
 802996e:	37e2      	adds	r7, #226	@ 0xe2
 8029970:	fa02 f107 	lsl.w	r1, r2, r7
 8029974:	910b      	str	r1, [sp, #44]	@ 0x2c
 8029976:	920c      	str	r2, [sp, #48]	@ 0x30
 8029978:	e7b8      	b.n	80298ec <_strtod_l+0x6c4>
 802997a:	2200      	movs	r2, #0
 802997c:	920b      	str	r2, [sp, #44]	@ 0x2c
 802997e:	2201      	movs	r2, #1
 8029980:	e7f9      	b.n	8029976 <_strtod_l+0x74e>
 8029982:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029984:	9805      	ldr	r0, [sp, #20]
 8029986:	463a      	mov	r2, r7
 8029988:	f002 fd76 	bl	802c478 <__lshift>
 802998c:	9012      	str	r0, [sp, #72]	@ 0x48
 802998e:	2800      	cmp	r0, #0
 8029990:	d1db      	bne.n	802994a <_strtod_l+0x722>
 8029992:	e659      	b.n	8029648 <_strtod_l+0x420>
 8029994:	f1b8 0f00 	cmp.w	r8, #0
 8029998:	dd07      	ble.n	80299aa <_strtod_l+0x782>
 802999a:	4631      	mov	r1, r6
 802999c:	9805      	ldr	r0, [sp, #20]
 802999e:	4642      	mov	r2, r8
 80299a0:	f002 fd6a 	bl	802c478 <__lshift>
 80299a4:	4606      	mov	r6, r0
 80299a6:	2800      	cmp	r0, #0
 80299a8:	d0d9      	beq.n	802995e <_strtod_l+0x736>
 80299aa:	f1b9 0f00 	cmp.w	r9, #0
 80299ae:	dd08      	ble.n	80299c2 <_strtod_l+0x79a>
 80299b0:	4629      	mov	r1, r5
 80299b2:	9805      	ldr	r0, [sp, #20]
 80299b4:	464a      	mov	r2, r9
 80299b6:	f002 fd5f 	bl	802c478 <__lshift>
 80299ba:	4605      	mov	r5, r0
 80299bc:	2800      	cmp	r0, #0
 80299be:	f43f ae43 	beq.w	8029648 <_strtod_l+0x420>
 80299c2:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80299c4:	9805      	ldr	r0, [sp, #20]
 80299c6:	4632      	mov	r2, r6
 80299c8:	f002 fdde 	bl	802c588 <__mdiff>
 80299cc:	4604      	mov	r4, r0
 80299ce:	2800      	cmp	r0, #0
 80299d0:	f43f ae3a 	beq.w	8029648 <_strtod_l+0x420>
 80299d4:	2300      	movs	r3, #0
 80299d6:	f8d0 800c 	ldr.w	r8, [r0, #12]
 80299da:	60c3      	str	r3, [r0, #12]
 80299dc:	4629      	mov	r1, r5
 80299de:	f002 fdb7 	bl	802c550 <__mcmp>
 80299e2:	2800      	cmp	r0, #0
 80299e4:	da4e      	bge.n	8029a84 <_strtod_l+0x85c>
 80299e6:	ea58 080a 	orrs.w	r8, r8, sl
 80299ea:	d174      	bne.n	8029ad6 <_strtod_l+0x8ae>
 80299ec:	f3cb 0313 	ubfx	r3, fp, #0, #20
 80299f0:	2b00      	cmp	r3, #0
 80299f2:	d170      	bne.n	8029ad6 <_strtod_l+0x8ae>
 80299f4:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 80299f8:	0d1b      	lsrs	r3, r3, #20
 80299fa:	051b      	lsls	r3, r3, #20
 80299fc:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029a00:	d969      	bls.n	8029ad6 <_strtod_l+0x8ae>
 8029a02:	6963      	ldr	r3, [r4, #20]
 8029a04:	b913      	cbnz	r3, 8029a0c <_strtod_l+0x7e4>
 8029a06:	6923      	ldr	r3, [r4, #16]
 8029a08:	2b01      	cmp	r3, #1
 8029a0a:	dd64      	ble.n	8029ad6 <_strtod_l+0x8ae>
 8029a0c:	4621      	mov	r1, r4
 8029a0e:	2201      	movs	r2, #1
 8029a10:	9805      	ldr	r0, [sp, #20]
 8029a12:	f002 fd31 	bl	802c478 <__lshift>
 8029a16:	4629      	mov	r1, r5
 8029a18:	4604      	mov	r4, r0
 8029a1a:	f002 fd99 	bl	802c550 <__mcmp>
 8029a1e:	2800      	cmp	r0, #0
 8029a20:	dd59      	ble.n	8029ad6 <_strtod_l+0x8ae>
 8029a22:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029a26:	9a06      	ldr	r2, [sp, #24]
 8029a28:	0d1b      	lsrs	r3, r3, #20
 8029a2a:	051b      	lsls	r3, r3, #20
 8029a2c:	2a00      	cmp	r2, #0
 8029a2e:	d070      	beq.n	8029b12 <_strtod_l+0x8ea>
 8029a30:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029a34:	d86d      	bhi.n	8029b12 <_strtod_l+0x8ea>
 8029a36:	f1b3 7f5c 	cmp.w	r3, #57671680	@ 0x3700000
 8029a3a:	f67f ae99 	bls.w	8029770 <_strtod_l+0x548>
 8029a3e:	ed9f 7b0c 	vldr	d7, [pc, #48]	@ 8029a70 <_strtod_l+0x848>
 8029a42:	ec4b ab16 	vmov	d6, sl, fp
 8029a46:	4b0e      	ldr	r3, [pc, #56]	@ (8029a80 <_strtod_l+0x858>)
 8029a48:	ee26 7b07 	vmul.f64	d7, d6, d7
 8029a4c:	ee17 2a90 	vmov	r2, s15
 8029a50:	4013      	ands	r3, r2
 8029a52:	ec5b ab17 	vmov	sl, fp, d7
 8029a56:	2b00      	cmp	r3, #0
 8029a58:	f47f ae01 	bne.w	802965e <_strtod_l+0x436>
 8029a5c:	9a05      	ldr	r2, [sp, #20]
 8029a5e:	2322      	movs	r3, #34	@ 0x22
 8029a60:	6013      	str	r3, [r2, #0]
 8029a62:	e5fc      	b.n	802965e <_strtod_l+0x436>
 8029a64:	f3af 8000 	nop.w
 8029a68:	ffc00000 	.word	0xffc00000
 8029a6c:	41dfffff 	.word	0x41dfffff
 8029a70:	00000000 	.word	0x00000000
 8029a74:	39500000 	.word	0x39500000
 8029a78:	08031c08 	.word	0x08031c08
 8029a7c:	fffffc02 	.word	0xfffffc02
 8029a80:	7ff00000 	.word	0x7ff00000
 8029a84:	46d9      	mov	r9, fp
 8029a86:	d15d      	bne.n	8029b44 <_strtod_l+0x91c>
 8029a88:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029a8c:	f1b8 0f00 	cmp.w	r8, #0
 8029a90:	d02a      	beq.n	8029ae8 <_strtod_l+0x8c0>
 8029a92:	4aab      	ldr	r2, [pc, #684]	@ (8029d40 <_strtod_l+0xb18>)
 8029a94:	4293      	cmp	r3, r2
 8029a96:	d12a      	bne.n	8029aee <_strtod_l+0x8c6>
 8029a98:	9b06      	ldr	r3, [sp, #24]
 8029a9a:	4652      	mov	r2, sl
 8029a9c:	b1fb      	cbz	r3, 8029ade <_strtod_l+0x8b6>
 8029a9e:	4ba9      	ldr	r3, [pc, #676]	@ (8029d44 <_strtod_l+0xb1c>)
 8029aa0:	ea0b 0303 	and.w	r3, fp, r3
 8029aa4:	f1b3 6fd4 	cmp.w	r3, #111149056	@ 0x6a00000
 8029aa8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8029aac:	d81a      	bhi.n	8029ae4 <_strtod_l+0x8bc>
 8029aae:	0d1b      	lsrs	r3, r3, #20
 8029ab0:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8029ab4:	fa01 f303 	lsl.w	r3, r1, r3
 8029ab8:	429a      	cmp	r2, r3
 8029aba:	d118      	bne.n	8029aee <_strtod_l+0x8c6>
 8029abc:	4ba2      	ldr	r3, [pc, #648]	@ (8029d48 <_strtod_l+0xb20>)
 8029abe:	4599      	cmp	r9, r3
 8029ac0:	d102      	bne.n	8029ac8 <_strtod_l+0x8a0>
 8029ac2:	3201      	adds	r2, #1
 8029ac4:	f43f adc0 	beq.w	8029648 <_strtod_l+0x420>
 8029ac8:	4b9e      	ldr	r3, [pc, #632]	@ (8029d44 <_strtod_l+0xb1c>)
 8029aca:	ea09 0303 	and.w	r3, r9, r3
 8029ace:	f503 1b80 	add.w	fp, r3, #1048576	@ 0x100000
 8029ad2:	f04f 0a00 	mov.w	sl, #0
 8029ad6:	9b06      	ldr	r3, [sp, #24]
 8029ad8:	2b00      	cmp	r3, #0
 8029ada:	d1b0      	bne.n	8029a3e <_strtod_l+0x816>
 8029adc:	e5bf      	b.n	802965e <_strtod_l+0x436>
 8029ade:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8029ae2:	e7e9      	b.n	8029ab8 <_strtod_l+0x890>
 8029ae4:	460b      	mov	r3, r1
 8029ae6:	e7e7      	b.n	8029ab8 <_strtod_l+0x890>
 8029ae8:	ea53 030a 	orrs.w	r3, r3, sl
 8029aec:	d099      	beq.n	8029a22 <_strtod_l+0x7fa>
 8029aee:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8029af0:	b1c3      	cbz	r3, 8029b24 <_strtod_l+0x8fc>
 8029af2:	ea13 0f09 	tst.w	r3, r9
 8029af6:	d0ee      	beq.n	8029ad6 <_strtod_l+0x8ae>
 8029af8:	9a06      	ldr	r2, [sp, #24]
 8029afa:	4650      	mov	r0, sl
 8029afc:	4659      	mov	r1, fp
 8029afe:	f1b8 0f00 	cmp.w	r8, #0
 8029b02:	d013      	beq.n	8029b2c <_strtod_l+0x904>
 8029b04:	f7ff fb74 	bl	80291f0 <sulp>
 8029b08:	ee39 7b00 	vadd.f64	d7, d9, d0
 8029b0c:	ec5b ab17 	vmov	sl, fp, d7
 8029b10:	e7e1      	b.n	8029ad6 <_strtod_l+0x8ae>
 8029b12:	f5a3 1380 	sub.w	r3, r3, #1048576	@ 0x100000
 8029b16:	ea6f 5b13 	mvn.w	fp, r3, lsr #20
 8029b1a:	ea6f 5b0b 	mvn.w	fp, fp, lsl #20
 8029b1e:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029b22:	e7d8      	b.n	8029ad6 <_strtod_l+0x8ae>
 8029b24:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 8029b26:	ea13 0f0a 	tst.w	r3, sl
 8029b2a:	e7e4      	b.n	8029af6 <_strtod_l+0x8ce>
 8029b2c:	f7ff fb60 	bl	80291f0 <sulp>
 8029b30:	ee39 0b40 	vsub.f64	d0, d9, d0
 8029b34:	eeb5 0b40 	vcmp.f64	d0, #0.0
 8029b38:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029b3c:	ec5b ab10 	vmov	sl, fp, d0
 8029b40:	d1c9      	bne.n	8029ad6 <_strtod_l+0x8ae>
 8029b42:	e615      	b.n	8029770 <_strtod_l+0x548>
 8029b44:	4629      	mov	r1, r5
 8029b46:	4620      	mov	r0, r4
 8029b48:	f002 fe7a 	bl	802c840 <__ratio>
 8029b4c:	eeb0 7b00 	vmov.f64	d7, #0	@ 0x40000000  2.0
 8029b50:	eeb4 0bc7 	vcmpe.f64	d0, d7
 8029b54:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029b58:	d85d      	bhi.n	8029c16 <_strtod_l+0x9ee>
 8029b5a:	f1b8 0f00 	cmp.w	r8, #0
 8029b5e:	d164      	bne.n	8029c2a <_strtod_l+0xa02>
 8029b60:	f1ba 0f00 	cmp.w	sl, #0
 8029b64:	d14b      	bne.n	8029bfe <_strtod_l+0x9d6>
 8029b66:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029b6a:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8029b6e:	2b00      	cmp	r3, #0
 8029b70:	d160      	bne.n	8029c34 <_strtod_l+0xa0c>
 8029b72:	eeb4 0bc8 	vcmpe.f64	d0, d8
 8029b76:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8029b7a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029b7e:	d401      	bmi.n	8029b84 <_strtod_l+0x95c>
 8029b80:	ee20 8b08 	vmul.f64	d8, d0, d8
 8029b84:	eeb1 ab48 	vneg.f64	d10, d8
 8029b88:	486e      	ldr	r0, [pc, #440]	@ (8029d44 <_strtod_l+0xb1c>)
 8029b8a:	4970      	ldr	r1, [pc, #448]	@ (8029d4c <_strtod_l+0xb24>)
 8029b8c:	ea09 0700 	and.w	r7, r9, r0
 8029b90:	428f      	cmp	r7, r1
 8029b92:	ec53 2b1a 	vmov	r2, r3, d10
 8029b96:	d17d      	bne.n	8029c94 <_strtod_l+0xa6c>
 8029b98:	f1a9 7b54 	sub.w	fp, r9, #55574528	@ 0x3500000
 8029b9c:	ec4b ab1c 	vmov	d12, sl, fp
 8029ba0:	eeb0 0b4c 	vmov.f64	d0, d12
 8029ba4:	f002 fd84 	bl	802c6b0 <__ulp>
 8029ba8:	4866      	ldr	r0, [pc, #408]	@ (8029d44 <_strtod_l+0xb1c>)
 8029baa:	eea0 cb0a 	vfma.f64	d12, d0, d10
 8029bae:	ee1c 3a90 	vmov	r3, s25
 8029bb2:	4a67      	ldr	r2, [pc, #412]	@ (8029d50 <_strtod_l+0xb28>)
 8029bb4:	ea03 0100 	and.w	r1, r3, r0
 8029bb8:	4291      	cmp	r1, r2
 8029bba:	ec5b ab1c 	vmov	sl, fp, d12
 8029bbe:	d93c      	bls.n	8029c3a <_strtod_l+0xa12>
 8029bc0:	ee19 2a90 	vmov	r2, s19
 8029bc4:	4b60      	ldr	r3, [pc, #384]	@ (8029d48 <_strtod_l+0xb20>)
 8029bc6:	429a      	cmp	r2, r3
 8029bc8:	d104      	bne.n	8029bd4 <_strtod_l+0x9ac>
 8029bca:	ee19 3a10 	vmov	r3, s18
 8029bce:	3301      	adds	r3, #1
 8029bd0:	f43f ad3a 	beq.w	8029648 <_strtod_l+0x420>
 8029bd4:	f8df b170 	ldr.w	fp, [pc, #368]	@ 8029d48 <_strtod_l+0xb20>
 8029bd8:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029bdc:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029bde:	9805      	ldr	r0, [sp, #20]
 8029be0:	f002 fa32 	bl	802c048 <_Bfree>
 8029be4:	9805      	ldr	r0, [sp, #20]
 8029be6:	4631      	mov	r1, r6
 8029be8:	f002 fa2e 	bl	802c048 <_Bfree>
 8029bec:	9805      	ldr	r0, [sp, #20]
 8029bee:	4629      	mov	r1, r5
 8029bf0:	f002 fa2a 	bl	802c048 <_Bfree>
 8029bf4:	9805      	ldr	r0, [sp, #20]
 8029bf6:	4621      	mov	r1, r4
 8029bf8:	f002 fa26 	bl	802c048 <_Bfree>
 8029bfc:	e625      	b.n	802984a <_strtod_l+0x622>
 8029bfe:	f1ba 0f01 	cmp.w	sl, #1
 8029c02:	d103      	bne.n	8029c0c <_strtod_l+0x9e4>
 8029c04:	f1bb 0f00 	cmp.w	fp, #0
 8029c08:	f43f adb2 	beq.w	8029770 <_strtod_l+0x548>
 8029c0c:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029c10:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8029c14:	e7b8      	b.n	8029b88 <_strtod_l+0x960>
 8029c16:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8029c1a:	ee20 8b08 	vmul.f64	d8, d0, d8
 8029c1e:	f1b8 0f00 	cmp.w	r8, #0
 8029c22:	d0af      	beq.n	8029b84 <_strtod_l+0x95c>
 8029c24:	eeb0 ab48 	vmov.f64	d10, d8
 8029c28:	e7ae      	b.n	8029b88 <_strtod_l+0x960>
 8029c2a:	eeb7 ab00 	vmov.f64	d10, #112	@ 0x3f800000  1.0
 8029c2e:	eeb0 8b4a 	vmov.f64	d8, d10
 8029c32:	e7a9      	b.n	8029b88 <_strtod_l+0x960>
 8029c34:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029c38:	e7a6      	b.n	8029b88 <_strtod_l+0x960>
 8029c3a:	f103 7b54 	add.w	fp, r3, #55574528	@ 0x3500000
 8029c3e:	9b06      	ldr	r3, [sp, #24]
 8029c40:	46d9      	mov	r9, fp
 8029c42:	2b00      	cmp	r3, #0
 8029c44:	d1ca      	bne.n	8029bdc <_strtod_l+0x9b4>
 8029c46:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029c4a:	0d1b      	lsrs	r3, r3, #20
 8029c4c:	051b      	lsls	r3, r3, #20
 8029c4e:	429f      	cmp	r7, r3
 8029c50:	d1c4      	bne.n	8029bdc <_strtod_l+0x9b4>
 8029c52:	ec51 0b18 	vmov	r0, r1, d8
 8029c56:	f7d6 fd7f 	bl	8000758 <__aeabi_d2lz>
 8029c5a:	f7d6 fd37 	bl	80006cc <__aeabi_l2d>
 8029c5e:	f3cb 0913 	ubfx	r9, fp, #0, #20
 8029c62:	ec41 0b17 	vmov	d7, r0, r1
 8029c66:	ea49 090a 	orr.w	r9, r9, sl
 8029c6a:	ea59 0908 	orrs.w	r9, r9, r8
 8029c6e:	ee38 8b47 	vsub.f64	d8, d8, d7
 8029c72:	d03c      	beq.n	8029cee <_strtod_l+0xac6>
 8029c74:	ed9f 7b2c 	vldr	d7, [pc, #176]	@ 8029d28 <_strtod_l+0xb00>
 8029c78:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029c7c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029c80:	f53f aced 	bmi.w	802965e <_strtod_l+0x436>
 8029c84:	ed9f 7b2a 	vldr	d7, [pc, #168]	@ 8029d30 <_strtod_l+0xb08>
 8029c88:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029c8c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029c90:	dda4      	ble.n	8029bdc <_strtod_l+0x9b4>
 8029c92:	e4e4      	b.n	802965e <_strtod_l+0x436>
 8029c94:	9906      	ldr	r1, [sp, #24]
 8029c96:	b1e1      	cbz	r1, 8029cd2 <_strtod_l+0xaaa>
 8029c98:	f1b7 6fd4 	cmp.w	r7, #111149056	@ 0x6a00000
 8029c9c:	d819      	bhi.n	8029cd2 <_strtod_l+0xaaa>
 8029c9e:	eeb4 8bcb 	vcmpe.f64	d8, d11
 8029ca2:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029ca6:	d811      	bhi.n	8029ccc <_strtod_l+0xaa4>
 8029ca8:	eebc 8bc8 	vcvt.u32.f64	s16, d8
 8029cac:	ee18 3a10 	vmov	r3, s16
 8029cb0:	2b01      	cmp	r3, #1
 8029cb2:	bf38      	it	cc
 8029cb4:	2301      	movcc	r3, #1
 8029cb6:	ee08 3a10 	vmov	s16, r3
 8029cba:	eeb8 8b48 	vcvt.f64.u32	d8, s16
 8029cbe:	f1b8 0f00 	cmp.w	r8, #0
 8029cc2:	d111      	bne.n	8029ce8 <_strtod_l+0xac0>
 8029cc4:	eeb1 7b48 	vneg.f64	d7, d8
 8029cc8:	ec53 2b17 	vmov	r2, r3, d7
 8029ccc:	f103 61d6 	add.w	r1, r3, #112197632	@ 0x6b00000
 8029cd0:	1bcb      	subs	r3, r1, r7
 8029cd2:	eeb0 0b49 	vmov.f64	d0, d9
 8029cd6:	ec43 2b1a 	vmov	d10, r2, r3
 8029cda:	f002 fce9 	bl	802c6b0 <__ulp>
 8029cde:	eeaa 9b00 	vfma.f64	d9, d10, d0
 8029ce2:	ec5b ab19 	vmov	sl, fp, d9
 8029ce6:	e7aa      	b.n	8029c3e <_strtod_l+0xa16>
 8029ce8:	eeb0 7b48 	vmov.f64	d7, d8
 8029cec:	e7ec      	b.n	8029cc8 <_strtod_l+0xaa0>
 8029cee:	ed9f 7b12 	vldr	d7, [pc, #72]	@ 8029d38 <_strtod_l+0xb10>
 8029cf2:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029cf6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029cfa:	f57f af6f 	bpl.w	8029bdc <_strtod_l+0x9b4>
 8029cfe:	e4ae      	b.n	802965e <_strtod_l+0x436>
 8029d00:	2300      	movs	r3, #0
 8029d02:	9308      	str	r3, [sp, #32]
 8029d04:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8029d06:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029d08:	6013      	str	r3, [r2, #0]
 8029d0a:	f7ff bacc 	b.w	80292a6 <_strtod_l+0x7e>
 8029d0e:	2a65      	cmp	r2, #101	@ 0x65
 8029d10:	f43f abbc 	beq.w	802948c <_strtod_l+0x264>
 8029d14:	2a45      	cmp	r2, #69	@ 0x45
 8029d16:	f43f abb9 	beq.w	802948c <_strtod_l+0x264>
 8029d1a:	2301      	movs	r3, #1
 8029d1c:	9306      	str	r3, [sp, #24]
 8029d1e:	f7ff bbf0 	b.w	8029502 <_strtod_l+0x2da>
 8029d22:	bf00      	nop
 8029d24:	f3af 8000 	nop.w
 8029d28:	94a03595 	.word	0x94a03595
 8029d2c:	3fdfffff 	.word	0x3fdfffff
 8029d30:	35afe535 	.word	0x35afe535
 8029d34:	3fe00000 	.word	0x3fe00000
 8029d38:	94a03595 	.word	0x94a03595
 8029d3c:	3fcfffff 	.word	0x3fcfffff
 8029d40:	000fffff 	.word	0x000fffff
 8029d44:	7ff00000 	.word	0x7ff00000
 8029d48:	7fefffff 	.word	0x7fefffff
 8029d4c:	7fe00000 	.word	0x7fe00000
 8029d50:	7c9fffff 	.word	0x7c9fffff

08029d54 <strtod>:
 8029d54:	460a      	mov	r2, r1
 8029d56:	4601      	mov	r1, r0
 8029d58:	4802      	ldr	r0, [pc, #8]	@ (8029d64 <strtod+0x10>)
 8029d5a:	4b03      	ldr	r3, [pc, #12]	@ (8029d68 <strtod+0x14>)
 8029d5c:	6800      	ldr	r0, [r0, #0]
 8029d5e:	f7ff ba63 	b.w	8029228 <_strtod_l>
 8029d62:	bf00      	nop
 8029d64:	240001d4 	.word	0x240001d4
 8029d68:	24000068 	.word	0x24000068

08029d6c <__cvt>:
 8029d6c:	b5f0      	push	{r4, r5, r6, r7, lr}
 8029d6e:	ed2d 8b02 	vpush	{d8}
 8029d72:	eeb0 8b40 	vmov.f64	d8, d0
 8029d76:	b085      	sub	sp, #20
 8029d78:	4617      	mov	r7, r2
 8029d7a:	9d0d      	ldr	r5, [sp, #52]	@ 0x34
 8029d7c:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 8029d7e:	ee18 2a90 	vmov	r2, s17
 8029d82:	f025 0520 	bic.w	r5, r5, #32
 8029d86:	2a00      	cmp	r2, #0
 8029d88:	bfb6      	itet	lt
 8029d8a:	222d      	movlt	r2, #45	@ 0x2d
 8029d8c:	2200      	movge	r2, #0
 8029d8e:	eeb1 8b40 	vneglt.f64	d8, d0
 8029d92:	2d46      	cmp	r5, #70	@ 0x46
 8029d94:	460c      	mov	r4, r1
 8029d96:	701a      	strb	r2, [r3, #0]
 8029d98:	d004      	beq.n	8029da4 <__cvt+0x38>
 8029d9a:	2d45      	cmp	r5, #69	@ 0x45
 8029d9c:	d100      	bne.n	8029da0 <__cvt+0x34>
 8029d9e:	3401      	adds	r4, #1
 8029da0:	2102      	movs	r1, #2
 8029da2:	e000      	b.n	8029da6 <__cvt+0x3a>
 8029da4:	2103      	movs	r1, #3
 8029da6:	ab03      	add	r3, sp, #12
 8029da8:	9301      	str	r3, [sp, #4]
 8029daa:	ab02      	add	r3, sp, #8
 8029dac:	9300      	str	r3, [sp, #0]
 8029dae:	4622      	mov	r2, r4
 8029db0:	4633      	mov	r3, r6
 8029db2:	eeb0 0b48 	vmov.f64	d0, d8
 8029db6:	f001 f81b 	bl	802adf0 <_dtoa_r>
 8029dba:	2d47      	cmp	r5, #71	@ 0x47
 8029dbc:	d114      	bne.n	8029de8 <__cvt+0x7c>
 8029dbe:	07fb      	lsls	r3, r7, #31
 8029dc0:	d50a      	bpl.n	8029dd8 <__cvt+0x6c>
 8029dc2:	1902      	adds	r2, r0, r4
 8029dc4:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8029dc8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029dcc:	bf08      	it	eq
 8029dce:	9203      	streq	r2, [sp, #12]
 8029dd0:	2130      	movs	r1, #48	@ 0x30
 8029dd2:	9b03      	ldr	r3, [sp, #12]
 8029dd4:	4293      	cmp	r3, r2
 8029dd6:	d319      	bcc.n	8029e0c <__cvt+0xa0>
 8029dd8:	9b03      	ldr	r3, [sp, #12]
 8029dda:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 8029ddc:	1a1b      	subs	r3, r3, r0
 8029dde:	6013      	str	r3, [r2, #0]
 8029de0:	b005      	add	sp, #20
 8029de2:	ecbd 8b02 	vpop	{d8}
 8029de6:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8029de8:	2d46      	cmp	r5, #70	@ 0x46
 8029dea:	eb00 0204 	add.w	r2, r0, r4
 8029dee:	d1e9      	bne.n	8029dc4 <__cvt+0x58>
 8029df0:	7803      	ldrb	r3, [r0, #0]
 8029df2:	2b30      	cmp	r3, #48	@ 0x30
 8029df4:	d107      	bne.n	8029e06 <__cvt+0x9a>
 8029df6:	eeb5 8b40 	vcmp.f64	d8, #0.0
 8029dfa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029dfe:	bf1c      	itt	ne
 8029e00:	f1c4 0401 	rsbne	r4, r4, #1
 8029e04:	6034      	strne	r4, [r6, #0]
 8029e06:	6833      	ldr	r3, [r6, #0]
 8029e08:	441a      	add	r2, r3
 8029e0a:	e7db      	b.n	8029dc4 <__cvt+0x58>
 8029e0c:	1c5c      	adds	r4, r3, #1
 8029e0e:	9403      	str	r4, [sp, #12]
 8029e10:	7019      	strb	r1, [r3, #0]
 8029e12:	e7de      	b.n	8029dd2 <__cvt+0x66>

08029e14 <__exponent>:
 8029e14:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 8029e16:	2900      	cmp	r1, #0
 8029e18:	bfba      	itte	lt
 8029e1a:	4249      	neglt	r1, r1
 8029e1c:	232d      	movlt	r3, #45	@ 0x2d
 8029e1e:	232b      	movge	r3, #43	@ 0x2b
 8029e20:	2909      	cmp	r1, #9
 8029e22:	7002      	strb	r2, [r0, #0]
 8029e24:	7043      	strb	r3, [r0, #1]
 8029e26:	dd29      	ble.n	8029e7c <__exponent+0x68>
 8029e28:	f10d 0307 	add.w	r3, sp, #7
 8029e2c:	461d      	mov	r5, r3
 8029e2e:	270a      	movs	r7, #10
 8029e30:	461a      	mov	r2, r3
 8029e32:	fbb1 f6f7 	udiv	r6, r1, r7
 8029e36:	fb07 1416 	mls	r4, r7, r6, r1
 8029e3a:	3430      	adds	r4, #48	@ 0x30
 8029e3c:	f802 4c01 	strb.w	r4, [r2, #-1]
 8029e40:	460c      	mov	r4, r1
 8029e42:	2c63      	cmp	r4, #99	@ 0x63
 8029e44:	f103 33ff 	add.w	r3, r3, #4294967295	@ 0xffffffff
 8029e48:	4631      	mov	r1, r6
 8029e4a:	dcf1      	bgt.n	8029e30 <__exponent+0x1c>
 8029e4c:	3130      	adds	r1, #48	@ 0x30
 8029e4e:	1e94      	subs	r4, r2, #2
 8029e50:	f803 1c01 	strb.w	r1, [r3, #-1]
 8029e54:	1c41      	adds	r1, r0, #1
 8029e56:	4623      	mov	r3, r4
 8029e58:	42ab      	cmp	r3, r5
 8029e5a:	d30a      	bcc.n	8029e72 <__exponent+0x5e>
 8029e5c:	f10d 0309 	add.w	r3, sp, #9
 8029e60:	1a9b      	subs	r3, r3, r2
 8029e62:	42ac      	cmp	r4, r5
 8029e64:	bf88      	it	hi
 8029e66:	2300      	movhi	r3, #0
 8029e68:	3302      	adds	r3, #2
 8029e6a:	4403      	add	r3, r0
 8029e6c:	1a18      	subs	r0, r3, r0
 8029e6e:	b003      	add	sp, #12
 8029e70:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8029e72:	f813 6b01 	ldrb.w	r6, [r3], #1
 8029e76:	f801 6f01 	strb.w	r6, [r1, #1]!
 8029e7a:	e7ed      	b.n	8029e58 <__exponent+0x44>
 8029e7c:	2330      	movs	r3, #48	@ 0x30
 8029e7e:	3130      	adds	r1, #48	@ 0x30
 8029e80:	7083      	strb	r3, [r0, #2]
 8029e82:	70c1      	strb	r1, [r0, #3]
 8029e84:	1d03      	adds	r3, r0, #4
 8029e86:	e7f1      	b.n	8029e6c <__exponent+0x58>

08029e88 <_printf_float>:
 8029e88:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8029e8c:	b08d      	sub	sp, #52	@ 0x34
 8029e8e:	460c      	mov	r4, r1
 8029e90:	f8dd 8058 	ldr.w	r8, [sp, #88]	@ 0x58
 8029e94:	4616      	mov	r6, r2
 8029e96:	461f      	mov	r7, r3
 8029e98:	4605      	mov	r5, r0
 8029e9a:	f000 fe0b 	bl	802aab4 <_localeconv_r>
 8029e9e:	f8d0 b000 	ldr.w	fp, [r0]
 8029ea2:	4658      	mov	r0, fp
 8029ea4:	f7d6 fa7c 	bl	80003a0 <strlen>
 8029ea8:	2300      	movs	r3, #0
 8029eaa:	930a      	str	r3, [sp, #40]	@ 0x28
 8029eac:	f8d8 3000 	ldr.w	r3, [r8]
 8029eb0:	f894 9018 	ldrb.w	r9, [r4, #24]
 8029eb4:	6822      	ldr	r2, [r4, #0]
 8029eb6:	9005      	str	r0, [sp, #20]
 8029eb8:	3307      	adds	r3, #7
 8029eba:	f023 0307 	bic.w	r3, r3, #7
 8029ebe:	f103 0108 	add.w	r1, r3, #8
 8029ec2:	f8c8 1000 	str.w	r1, [r8]
 8029ec6:	ed93 0b00 	vldr	d0, [r3]
 8029eca:	ed9f 6b97 	vldr	d6, [pc, #604]	@ 802a128 <_printf_float+0x2a0>
 8029ece:	eeb0 7bc0 	vabs.f64	d7, d0
 8029ed2:	eeb4 7b46 	vcmp.f64	d7, d6
 8029ed6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029eda:	ed84 0b12 	vstr	d0, [r4, #72]	@ 0x48
 8029ede:	dd24      	ble.n	8029f2a <_printf_float+0xa2>
 8029ee0:	eeb5 0bc0 	vcmpe.f64	d0, #0.0
 8029ee4:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029ee8:	d502      	bpl.n	8029ef0 <_printf_float+0x68>
 8029eea:	232d      	movs	r3, #45	@ 0x2d
 8029eec:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029ef0:	498f      	ldr	r1, [pc, #572]	@ (802a130 <_printf_float+0x2a8>)
 8029ef2:	4b90      	ldr	r3, [pc, #576]	@ (802a134 <_printf_float+0x2ac>)
 8029ef4:	f1b9 0f47 	cmp.w	r9, #71	@ 0x47
 8029ef8:	bf94      	ite	ls
 8029efa:	4688      	movls	r8, r1
 8029efc:	4698      	movhi	r8, r3
 8029efe:	f022 0204 	bic.w	r2, r2, #4
 8029f02:	2303      	movs	r3, #3
 8029f04:	6123      	str	r3, [r4, #16]
 8029f06:	6022      	str	r2, [r4, #0]
 8029f08:	f04f 0a00 	mov.w	sl, #0
 8029f0c:	9700      	str	r7, [sp, #0]
 8029f0e:	4633      	mov	r3, r6
 8029f10:	aa0b      	add	r2, sp, #44	@ 0x2c
 8029f12:	4621      	mov	r1, r4
 8029f14:	4628      	mov	r0, r5
 8029f16:	f000 f9d1 	bl	802a2bc <_printf_common>
 8029f1a:	3001      	adds	r0, #1
 8029f1c:	f040 8089 	bne.w	802a032 <_printf_float+0x1aa>
 8029f20:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 8029f24:	b00d      	add	sp, #52	@ 0x34
 8029f26:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8029f2a:	eeb4 0b40 	vcmp.f64	d0, d0
 8029f2e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029f32:	d709      	bvc.n	8029f48 <_printf_float+0xc0>
 8029f34:	ee10 3a90 	vmov	r3, s1
 8029f38:	2b00      	cmp	r3, #0
 8029f3a:	bfbc      	itt	lt
 8029f3c:	232d      	movlt	r3, #45	@ 0x2d
 8029f3e:	f884 3043 	strblt.w	r3, [r4, #67]	@ 0x43
 8029f42:	497d      	ldr	r1, [pc, #500]	@ (802a138 <_printf_float+0x2b0>)
 8029f44:	4b7d      	ldr	r3, [pc, #500]	@ (802a13c <_printf_float+0x2b4>)
 8029f46:	e7d5      	b.n	8029ef4 <_printf_float+0x6c>
 8029f48:	6863      	ldr	r3, [r4, #4]
 8029f4a:	1c59      	adds	r1, r3, #1
 8029f4c:	f009 0adf 	and.w	sl, r9, #223	@ 0xdf
 8029f50:	d139      	bne.n	8029fc6 <_printf_float+0x13e>
 8029f52:	2306      	movs	r3, #6
 8029f54:	6063      	str	r3, [r4, #4]
 8029f56:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
 8029f5a:	2300      	movs	r3, #0
 8029f5c:	6022      	str	r2, [r4, #0]
 8029f5e:	9303      	str	r3, [sp, #12]
 8029f60:	ab0a      	add	r3, sp, #40	@ 0x28
 8029f62:	e9cd 9301 	strd	r9, r3, [sp, #4]
 8029f66:	ab09      	add	r3, sp, #36	@ 0x24
 8029f68:	9300      	str	r3, [sp, #0]
 8029f6a:	6861      	ldr	r1, [r4, #4]
 8029f6c:	f10d 0323 	add.w	r3, sp, #35	@ 0x23
 8029f70:	4628      	mov	r0, r5
 8029f72:	f7ff fefb 	bl	8029d6c <__cvt>
 8029f76:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 8029f7a:	9909      	ldr	r1, [sp, #36]	@ 0x24
 8029f7c:	4680      	mov	r8, r0
 8029f7e:	d129      	bne.n	8029fd4 <_printf_float+0x14c>
 8029f80:	1cc8      	adds	r0, r1, #3
 8029f82:	db02      	blt.n	8029f8a <_printf_float+0x102>
 8029f84:	6863      	ldr	r3, [r4, #4]
 8029f86:	4299      	cmp	r1, r3
 8029f88:	dd41      	ble.n	802a00e <_printf_float+0x186>
 8029f8a:	f1a9 0902 	sub.w	r9, r9, #2
 8029f8e:	fa5f f989 	uxtb.w	r9, r9
 8029f92:	3901      	subs	r1, #1
 8029f94:	464a      	mov	r2, r9
 8029f96:	f104 0050 	add.w	r0, r4, #80	@ 0x50
 8029f9a:	9109      	str	r1, [sp, #36]	@ 0x24
 8029f9c:	f7ff ff3a 	bl	8029e14 <__exponent>
 8029fa0:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 8029fa2:	1813      	adds	r3, r2, r0
 8029fa4:	2a01      	cmp	r2, #1
 8029fa6:	4682      	mov	sl, r0
 8029fa8:	6123      	str	r3, [r4, #16]
 8029faa:	dc02      	bgt.n	8029fb2 <_printf_float+0x12a>
 8029fac:	6822      	ldr	r2, [r4, #0]
 8029fae:	07d2      	lsls	r2, r2, #31
 8029fb0:	d501      	bpl.n	8029fb6 <_printf_float+0x12e>
 8029fb2:	3301      	adds	r3, #1
 8029fb4:	6123      	str	r3, [r4, #16]
 8029fb6:	f89d 3023 	ldrb.w	r3, [sp, #35]	@ 0x23
 8029fba:	2b00      	cmp	r3, #0
 8029fbc:	d0a6      	beq.n	8029f0c <_printf_float+0x84>
 8029fbe:	232d      	movs	r3, #45	@ 0x2d
 8029fc0:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 8029fc4:	e7a2      	b.n	8029f0c <_printf_float+0x84>
 8029fc6:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 8029fca:	d1c4      	bne.n	8029f56 <_printf_float+0xce>
 8029fcc:	2b00      	cmp	r3, #0
 8029fce:	d1c2      	bne.n	8029f56 <_printf_float+0xce>
 8029fd0:	2301      	movs	r3, #1
 8029fd2:	e7bf      	b.n	8029f54 <_printf_float+0xcc>
 8029fd4:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 8029fd8:	d9db      	bls.n	8029f92 <_printf_float+0x10a>
 8029fda:	f1b9 0f66 	cmp.w	r9, #102	@ 0x66
 8029fde:	d118      	bne.n	802a012 <_printf_float+0x18a>
 8029fe0:	2900      	cmp	r1, #0
 8029fe2:	6863      	ldr	r3, [r4, #4]
 8029fe4:	dd0b      	ble.n	8029ffe <_printf_float+0x176>
 8029fe6:	6121      	str	r1, [r4, #16]
 8029fe8:	b913      	cbnz	r3, 8029ff0 <_printf_float+0x168>
 8029fea:	6822      	ldr	r2, [r4, #0]
 8029fec:	07d0      	lsls	r0, r2, #31
 8029fee:	d502      	bpl.n	8029ff6 <_printf_float+0x16e>
 8029ff0:	3301      	adds	r3, #1
 8029ff2:	440b      	add	r3, r1
 8029ff4:	6123      	str	r3, [r4, #16]
 8029ff6:	65a1      	str	r1, [r4, #88]	@ 0x58
 8029ff8:	f04f 0a00 	mov.w	sl, #0
 8029ffc:	e7db      	b.n	8029fb6 <_printf_float+0x12e>
 8029ffe:	b913      	cbnz	r3, 802a006 <_printf_float+0x17e>
 802a000:	6822      	ldr	r2, [r4, #0]
 802a002:	07d2      	lsls	r2, r2, #31
 802a004:	d501      	bpl.n	802a00a <_printf_float+0x182>
 802a006:	3302      	adds	r3, #2
 802a008:	e7f4      	b.n	8029ff4 <_printf_float+0x16c>
 802a00a:	2301      	movs	r3, #1
 802a00c:	e7f2      	b.n	8029ff4 <_printf_float+0x16c>
 802a00e:	f04f 0967 	mov.w	r9, #103	@ 0x67
 802a012:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a014:	4299      	cmp	r1, r3
 802a016:	db05      	blt.n	802a024 <_printf_float+0x19c>
 802a018:	6823      	ldr	r3, [r4, #0]
 802a01a:	6121      	str	r1, [r4, #16]
 802a01c:	07d8      	lsls	r0, r3, #31
 802a01e:	d5ea      	bpl.n	8029ff6 <_printf_float+0x16e>
 802a020:	1c4b      	adds	r3, r1, #1
 802a022:	e7e7      	b.n	8029ff4 <_printf_float+0x16c>
 802a024:	2900      	cmp	r1, #0
 802a026:	bfd4      	ite	le
 802a028:	f1c1 0202 	rsble	r2, r1, #2
 802a02c:	2201      	movgt	r2, #1
 802a02e:	4413      	add	r3, r2
 802a030:	e7e0      	b.n	8029ff4 <_printf_float+0x16c>
 802a032:	6823      	ldr	r3, [r4, #0]
 802a034:	055a      	lsls	r2, r3, #21
 802a036:	d407      	bmi.n	802a048 <_printf_float+0x1c0>
 802a038:	6923      	ldr	r3, [r4, #16]
 802a03a:	4642      	mov	r2, r8
 802a03c:	4631      	mov	r1, r6
 802a03e:	4628      	mov	r0, r5
 802a040:	47b8      	blx	r7
 802a042:	3001      	adds	r0, #1
 802a044:	d12a      	bne.n	802a09c <_printf_float+0x214>
 802a046:	e76b      	b.n	8029f20 <_printf_float+0x98>
 802a048:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 802a04c:	f240 80e0 	bls.w	802a210 <_printf_float+0x388>
 802a050:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 802a054:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a058:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a05c:	d133      	bne.n	802a0c6 <_printf_float+0x23e>
 802a05e:	4a38      	ldr	r2, [pc, #224]	@ (802a140 <_printf_float+0x2b8>)
 802a060:	2301      	movs	r3, #1
 802a062:	4631      	mov	r1, r6
 802a064:	4628      	mov	r0, r5
 802a066:	47b8      	blx	r7
 802a068:	3001      	adds	r0, #1
 802a06a:	f43f af59 	beq.w	8029f20 <_printf_float+0x98>
 802a06e:	e9dd 3809 	ldrd	r3, r8, [sp, #36]	@ 0x24
 802a072:	4543      	cmp	r3, r8
 802a074:	db02      	blt.n	802a07c <_printf_float+0x1f4>
 802a076:	6823      	ldr	r3, [r4, #0]
 802a078:	07d8      	lsls	r0, r3, #31
 802a07a:	d50f      	bpl.n	802a09c <_printf_float+0x214>
 802a07c:	9b05      	ldr	r3, [sp, #20]
 802a07e:	465a      	mov	r2, fp
 802a080:	4631      	mov	r1, r6
 802a082:	4628      	mov	r0, r5
 802a084:	47b8      	blx	r7
 802a086:	3001      	adds	r0, #1
 802a088:	f43f af4a 	beq.w	8029f20 <_printf_float+0x98>
 802a08c:	f04f 0900 	mov.w	r9, #0
 802a090:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802a094:	f104 0a1a 	add.w	sl, r4, #26
 802a098:	45c8      	cmp	r8, r9
 802a09a:	dc09      	bgt.n	802a0b0 <_printf_float+0x228>
 802a09c:	6823      	ldr	r3, [r4, #0]
 802a09e:	079b      	lsls	r3, r3, #30
 802a0a0:	f100 8107 	bmi.w	802a2b2 <_printf_float+0x42a>
 802a0a4:	68e0      	ldr	r0, [r4, #12]
 802a0a6:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a0a8:	4298      	cmp	r0, r3
 802a0aa:	bfb8      	it	lt
 802a0ac:	4618      	movlt	r0, r3
 802a0ae:	e739      	b.n	8029f24 <_printf_float+0x9c>
 802a0b0:	2301      	movs	r3, #1
 802a0b2:	4652      	mov	r2, sl
 802a0b4:	4631      	mov	r1, r6
 802a0b6:	4628      	mov	r0, r5
 802a0b8:	47b8      	blx	r7
 802a0ba:	3001      	adds	r0, #1
 802a0bc:	f43f af30 	beq.w	8029f20 <_printf_float+0x98>
 802a0c0:	f109 0901 	add.w	r9, r9, #1
 802a0c4:	e7e8      	b.n	802a098 <_printf_float+0x210>
 802a0c6:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a0c8:	2b00      	cmp	r3, #0
 802a0ca:	dc3b      	bgt.n	802a144 <_printf_float+0x2bc>
 802a0cc:	4a1c      	ldr	r2, [pc, #112]	@ (802a140 <_printf_float+0x2b8>)
 802a0ce:	2301      	movs	r3, #1
 802a0d0:	4631      	mov	r1, r6
 802a0d2:	4628      	mov	r0, r5
 802a0d4:	47b8      	blx	r7
 802a0d6:	3001      	adds	r0, #1
 802a0d8:	f43f af22 	beq.w	8029f20 <_printf_float+0x98>
 802a0dc:	e9dd 3909 	ldrd	r3, r9, [sp, #36]	@ 0x24
 802a0e0:	ea59 0303 	orrs.w	r3, r9, r3
 802a0e4:	d102      	bne.n	802a0ec <_printf_float+0x264>
 802a0e6:	6823      	ldr	r3, [r4, #0]
 802a0e8:	07d9      	lsls	r1, r3, #31
 802a0ea:	d5d7      	bpl.n	802a09c <_printf_float+0x214>
 802a0ec:	9b05      	ldr	r3, [sp, #20]
 802a0ee:	465a      	mov	r2, fp
 802a0f0:	4631      	mov	r1, r6
 802a0f2:	4628      	mov	r0, r5
 802a0f4:	47b8      	blx	r7
 802a0f6:	3001      	adds	r0, #1
 802a0f8:	f43f af12 	beq.w	8029f20 <_printf_float+0x98>
 802a0fc:	f04f 0a00 	mov.w	sl, #0
 802a100:	f104 0b1a 	add.w	fp, r4, #26
 802a104:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a106:	425b      	negs	r3, r3
 802a108:	4553      	cmp	r3, sl
 802a10a:	dc01      	bgt.n	802a110 <_printf_float+0x288>
 802a10c:	464b      	mov	r3, r9
 802a10e:	e794      	b.n	802a03a <_printf_float+0x1b2>
 802a110:	2301      	movs	r3, #1
 802a112:	465a      	mov	r2, fp
 802a114:	4631      	mov	r1, r6
 802a116:	4628      	mov	r0, r5
 802a118:	47b8      	blx	r7
 802a11a:	3001      	adds	r0, #1
 802a11c:	f43f af00 	beq.w	8029f20 <_printf_float+0x98>
 802a120:	f10a 0a01 	add.w	sl, sl, #1
 802a124:	e7ee      	b.n	802a104 <_printf_float+0x27c>
 802a126:	bf00      	nop
 802a128:	ffffffff 	.word	0xffffffff
 802a12c:	7fefffff 	.word	0x7fefffff
 802a130:	08031d31 	.word	0x08031d31
 802a134:	08031d35 	.word	0x08031d35
 802a138:	08031d39 	.word	0x08031d39
 802a13c:	08031d3d 	.word	0x08031d3d
 802a140:	08031d41 	.word	0x08031d41
 802a144:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 802a146:	f8dd a028 	ldr.w	sl, [sp, #40]	@ 0x28
 802a14a:	4553      	cmp	r3, sl
 802a14c:	bfa8      	it	ge
 802a14e:	4653      	movge	r3, sl
 802a150:	2b00      	cmp	r3, #0
 802a152:	4699      	mov	r9, r3
 802a154:	dc37      	bgt.n	802a1c6 <_printf_float+0x33e>
 802a156:	2300      	movs	r3, #0
 802a158:	9307      	str	r3, [sp, #28]
 802a15a:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 802a15e:	f104 021a 	add.w	r2, r4, #26
 802a162:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 802a164:	9907      	ldr	r1, [sp, #28]
 802a166:	9306      	str	r3, [sp, #24]
 802a168:	eba3 0309 	sub.w	r3, r3, r9
 802a16c:	428b      	cmp	r3, r1
 802a16e:	dc31      	bgt.n	802a1d4 <_printf_float+0x34c>
 802a170:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a172:	459a      	cmp	sl, r3
 802a174:	dc3b      	bgt.n	802a1ee <_printf_float+0x366>
 802a176:	6823      	ldr	r3, [r4, #0]
 802a178:	07da      	lsls	r2, r3, #31
 802a17a:	d438      	bmi.n	802a1ee <_printf_float+0x366>
 802a17c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a17e:	ebaa 0903 	sub.w	r9, sl, r3
 802a182:	9b06      	ldr	r3, [sp, #24]
 802a184:	ebaa 0303 	sub.w	r3, sl, r3
 802a188:	4599      	cmp	r9, r3
 802a18a:	bfa8      	it	ge
 802a18c:	4699      	movge	r9, r3
 802a18e:	f1b9 0f00 	cmp.w	r9, #0
 802a192:	dc34      	bgt.n	802a1fe <_printf_float+0x376>
 802a194:	f04f 0800 	mov.w	r8, #0
 802a198:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 802a19c:	f104 0b1a 	add.w	fp, r4, #26
 802a1a0:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a1a2:	ebaa 0303 	sub.w	r3, sl, r3
 802a1a6:	eba3 0309 	sub.w	r3, r3, r9
 802a1aa:	4543      	cmp	r3, r8
 802a1ac:	f77f af76 	ble.w	802a09c <_printf_float+0x214>
 802a1b0:	2301      	movs	r3, #1
 802a1b2:	465a      	mov	r2, fp
 802a1b4:	4631      	mov	r1, r6
 802a1b6:	4628      	mov	r0, r5
 802a1b8:	47b8      	blx	r7
 802a1ba:	3001      	adds	r0, #1
 802a1bc:	f43f aeb0 	beq.w	8029f20 <_printf_float+0x98>
 802a1c0:	f108 0801 	add.w	r8, r8, #1
 802a1c4:	e7ec      	b.n	802a1a0 <_printf_float+0x318>
 802a1c6:	4642      	mov	r2, r8
 802a1c8:	4631      	mov	r1, r6
 802a1ca:	4628      	mov	r0, r5
 802a1cc:	47b8      	blx	r7
 802a1ce:	3001      	adds	r0, #1
 802a1d0:	d1c1      	bne.n	802a156 <_printf_float+0x2ce>
 802a1d2:	e6a5      	b.n	8029f20 <_printf_float+0x98>
 802a1d4:	2301      	movs	r3, #1
 802a1d6:	4631      	mov	r1, r6
 802a1d8:	4628      	mov	r0, r5
 802a1da:	9206      	str	r2, [sp, #24]
 802a1dc:	47b8      	blx	r7
 802a1de:	3001      	adds	r0, #1
 802a1e0:	f43f ae9e 	beq.w	8029f20 <_printf_float+0x98>
 802a1e4:	9b07      	ldr	r3, [sp, #28]
 802a1e6:	9a06      	ldr	r2, [sp, #24]
 802a1e8:	3301      	adds	r3, #1
 802a1ea:	9307      	str	r3, [sp, #28]
 802a1ec:	e7b9      	b.n	802a162 <_printf_float+0x2da>
 802a1ee:	9b05      	ldr	r3, [sp, #20]
 802a1f0:	465a      	mov	r2, fp
 802a1f2:	4631      	mov	r1, r6
 802a1f4:	4628      	mov	r0, r5
 802a1f6:	47b8      	blx	r7
 802a1f8:	3001      	adds	r0, #1
 802a1fa:	d1bf      	bne.n	802a17c <_printf_float+0x2f4>
 802a1fc:	e690      	b.n	8029f20 <_printf_float+0x98>
 802a1fe:	9a06      	ldr	r2, [sp, #24]
 802a200:	464b      	mov	r3, r9
 802a202:	4442      	add	r2, r8
 802a204:	4631      	mov	r1, r6
 802a206:	4628      	mov	r0, r5
 802a208:	47b8      	blx	r7
 802a20a:	3001      	adds	r0, #1
 802a20c:	d1c2      	bne.n	802a194 <_printf_float+0x30c>
 802a20e:	e687      	b.n	8029f20 <_printf_float+0x98>
 802a210:	f8dd 9028 	ldr.w	r9, [sp, #40]	@ 0x28
 802a214:	f1b9 0f01 	cmp.w	r9, #1
 802a218:	dc01      	bgt.n	802a21e <_printf_float+0x396>
 802a21a:	07db      	lsls	r3, r3, #31
 802a21c:	d536      	bpl.n	802a28c <_printf_float+0x404>
 802a21e:	2301      	movs	r3, #1
 802a220:	4642      	mov	r2, r8
 802a222:	4631      	mov	r1, r6
 802a224:	4628      	mov	r0, r5
 802a226:	47b8      	blx	r7
 802a228:	3001      	adds	r0, #1
 802a22a:	f43f ae79 	beq.w	8029f20 <_printf_float+0x98>
 802a22e:	9b05      	ldr	r3, [sp, #20]
 802a230:	465a      	mov	r2, fp
 802a232:	4631      	mov	r1, r6
 802a234:	4628      	mov	r0, r5
 802a236:	47b8      	blx	r7
 802a238:	3001      	adds	r0, #1
 802a23a:	f43f ae71 	beq.w	8029f20 <_printf_float+0x98>
 802a23e:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 802a242:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a246:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a24a:	f109 39ff 	add.w	r9, r9, #4294967295	@ 0xffffffff
 802a24e:	d018      	beq.n	802a282 <_printf_float+0x3fa>
 802a250:	464b      	mov	r3, r9
 802a252:	f108 0201 	add.w	r2, r8, #1
 802a256:	4631      	mov	r1, r6
 802a258:	4628      	mov	r0, r5
 802a25a:	47b8      	blx	r7
 802a25c:	3001      	adds	r0, #1
 802a25e:	d10c      	bne.n	802a27a <_printf_float+0x3f2>
 802a260:	e65e      	b.n	8029f20 <_printf_float+0x98>
 802a262:	2301      	movs	r3, #1
 802a264:	465a      	mov	r2, fp
 802a266:	4631      	mov	r1, r6
 802a268:	4628      	mov	r0, r5
 802a26a:	47b8      	blx	r7
 802a26c:	3001      	adds	r0, #1
 802a26e:	f43f ae57 	beq.w	8029f20 <_printf_float+0x98>
 802a272:	f108 0801 	add.w	r8, r8, #1
 802a276:	45c8      	cmp	r8, r9
 802a278:	dbf3      	blt.n	802a262 <_printf_float+0x3da>
 802a27a:	4653      	mov	r3, sl
 802a27c:	f104 0250 	add.w	r2, r4, #80	@ 0x50
 802a280:	e6dc      	b.n	802a03c <_printf_float+0x1b4>
 802a282:	f04f 0800 	mov.w	r8, #0
 802a286:	f104 0b1a 	add.w	fp, r4, #26
 802a28a:	e7f4      	b.n	802a276 <_printf_float+0x3ee>
 802a28c:	2301      	movs	r3, #1
 802a28e:	4642      	mov	r2, r8
 802a290:	e7e1      	b.n	802a256 <_printf_float+0x3ce>
 802a292:	2301      	movs	r3, #1
 802a294:	464a      	mov	r2, r9
 802a296:	4631      	mov	r1, r6
 802a298:	4628      	mov	r0, r5
 802a29a:	47b8      	blx	r7
 802a29c:	3001      	adds	r0, #1
 802a29e:	f43f ae3f 	beq.w	8029f20 <_printf_float+0x98>
 802a2a2:	f108 0801 	add.w	r8, r8, #1
 802a2a6:	68e3      	ldr	r3, [r4, #12]
 802a2a8:	990b      	ldr	r1, [sp, #44]	@ 0x2c
 802a2aa:	1a5b      	subs	r3, r3, r1
 802a2ac:	4543      	cmp	r3, r8
 802a2ae:	dcf0      	bgt.n	802a292 <_printf_float+0x40a>
 802a2b0:	e6f8      	b.n	802a0a4 <_printf_float+0x21c>
 802a2b2:	f04f 0800 	mov.w	r8, #0
 802a2b6:	f104 0919 	add.w	r9, r4, #25
 802a2ba:	e7f4      	b.n	802a2a6 <_printf_float+0x41e>

0802a2bc <_printf_common>:
 802a2bc:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802a2c0:	4616      	mov	r6, r2
 802a2c2:	4698      	mov	r8, r3
 802a2c4:	688a      	ldr	r2, [r1, #8]
 802a2c6:	690b      	ldr	r3, [r1, #16]
 802a2c8:	f8dd 9020 	ldr.w	r9, [sp, #32]
 802a2cc:	4293      	cmp	r3, r2
 802a2ce:	bfb8      	it	lt
 802a2d0:	4613      	movlt	r3, r2
 802a2d2:	6033      	str	r3, [r6, #0]
 802a2d4:	f891 2043 	ldrb.w	r2, [r1, #67]	@ 0x43
 802a2d8:	4607      	mov	r7, r0
 802a2da:	460c      	mov	r4, r1
 802a2dc:	b10a      	cbz	r2, 802a2e2 <_printf_common+0x26>
 802a2de:	3301      	adds	r3, #1
 802a2e0:	6033      	str	r3, [r6, #0]
 802a2e2:	6823      	ldr	r3, [r4, #0]
 802a2e4:	0699      	lsls	r1, r3, #26
 802a2e6:	bf42      	ittt	mi
 802a2e8:	6833      	ldrmi	r3, [r6, #0]
 802a2ea:	3302      	addmi	r3, #2
 802a2ec:	6033      	strmi	r3, [r6, #0]
 802a2ee:	6825      	ldr	r5, [r4, #0]
 802a2f0:	f015 0506 	ands.w	r5, r5, #6
 802a2f4:	d106      	bne.n	802a304 <_printf_common+0x48>
 802a2f6:	f104 0a19 	add.w	sl, r4, #25
 802a2fa:	68e3      	ldr	r3, [r4, #12]
 802a2fc:	6832      	ldr	r2, [r6, #0]
 802a2fe:	1a9b      	subs	r3, r3, r2
 802a300:	42ab      	cmp	r3, r5
 802a302:	dc26      	bgt.n	802a352 <_printf_common+0x96>
 802a304:	f894 3043 	ldrb.w	r3, [r4, #67]	@ 0x43
 802a308:	6822      	ldr	r2, [r4, #0]
 802a30a:	3b00      	subs	r3, #0
 802a30c:	bf18      	it	ne
 802a30e:	2301      	movne	r3, #1
 802a310:	0692      	lsls	r2, r2, #26
 802a312:	d42b      	bmi.n	802a36c <_printf_common+0xb0>
 802a314:	f104 0243 	add.w	r2, r4, #67	@ 0x43
 802a318:	4641      	mov	r1, r8
 802a31a:	4638      	mov	r0, r7
 802a31c:	47c8      	blx	r9
 802a31e:	3001      	adds	r0, #1
 802a320:	d01e      	beq.n	802a360 <_printf_common+0xa4>
 802a322:	6823      	ldr	r3, [r4, #0]
 802a324:	6922      	ldr	r2, [r4, #16]
 802a326:	f003 0306 	and.w	r3, r3, #6
 802a32a:	2b04      	cmp	r3, #4
 802a32c:	bf02      	ittt	eq
 802a32e:	68e5      	ldreq	r5, [r4, #12]
 802a330:	6833      	ldreq	r3, [r6, #0]
 802a332:	1aed      	subeq	r5, r5, r3
 802a334:	68a3      	ldr	r3, [r4, #8]
 802a336:	bf0c      	ite	eq
 802a338:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 802a33c:	2500      	movne	r5, #0
 802a33e:	4293      	cmp	r3, r2
 802a340:	bfc4      	itt	gt
 802a342:	1a9b      	subgt	r3, r3, r2
 802a344:	18ed      	addgt	r5, r5, r3
 802a346:	2600      	movs	r6, #0
 802a348:	341a      	adds	r4, #26
 802a34a:	42b5      	cmp	r5, r6
 802a34c:	d11a      	bne.n	802a384 <_printf_common+0xc8>
 802a34e:	2000      	movs	r0, #0
 802a350:	e008      	b.n	802a364 <_printf_common+0xa8>
 802a352:	2301      	movs	r3, #1
 802a354:	4652      	mov	r2, sl
 802a356:	4641      	mov	r1, r8
 802a358:	4638      	mov	r0, r7
 802a35a:	47c8      	blx	r9
 802a35c:	3001      	adds	r0, #1
 802a35e:	d103      	bne.n	802a368 <_printf_common+0xac>
 802a360:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a364:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802a368:	3501      	adds	r5, #1
 802a36a:	e7c6      	b.n	802a2fa <_printf_common+0x3e>
 802a36c:	18e1      	adds	r1, r4, r3
 802a36e:	1c5a      	adds	r2, r3, #1
 802a370:	2030      	movs	r0, #48	@ 0x30
 802a372:	f881 0043 	strb.w	r0, [r1, #67]	@ 0x43
 802a376:	4422      	add	r2, r4
 802a378:	f894 1045 	ldrb.w	r1, [r4, #69]	@ 0x45
 802a37c:	f882 1043 	strb.w	r1, [r2, #67]	@ 0x43
 802a380:	3302      	adds	r3, #2
 802a382:	e7c7      	b.n	802a314 <_printf_common+0x58>
 802a384:	2301      	movs	r3, #1
 802a386:	4622      	mov	r2, r4
 802a388:	4641      	mov	r1, r8
 802a38a:	4638      	mov	r0, r7
 802a38c:	47c8      	blx	r9
 802a38e:	3001      	adds	r0, #1
 802a390:	d0e6      	beq.n	802a360 <_printf_common+0xa4>
 802a392:	3601      	adds	r6, #1
 802a394:	e7d9      	b.n	802a34a <_printf_common+0x8e>
	...

0802a398 <_printf_i>:
 802a398:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
 802a39c:	7e0f      	ldrb	r7, [r1, #24]
 802a39e:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 802a3a0:	2f78      	cmp	r7, #120	@ 0x78
 802a3a2:	4691      	mov	r9, r2
 802a3a4:	4680      	mov	r8, r0
 802a3a6:	460c      	mov	r4, r1
 802a3a8:	469a      	mov	sl, r3
 802a3aa:	f101 0243 	add.w	r2, r1, #67	@ 0x43
 802a3ae:	d807      	bhi.n	802a3c0 <_printf_i+0x28>
 802a3b0:	2f62      	cmp	r7, #98	@ 0x62
 802a3b2:	d80a      	bhi.n	802a3ca <_printf_i+0x32>
 802a3b4:	2f00      	cmp	r7, #0
 802a3b6:	f000 80d2 	beq.w	802a55e <_printf_i+0x1c6>
 802a3ba:	2f58      	cmp	r7, #88	@ 0x58
 802a3bc:	f000 80b9 	beq.w	802a532 <_printf_i+0x19a>
 802a3c0:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 802a3c4:	f884 7042 	strb.w	r7, [r4, #66]	@ 0x42
 802a3c8:	e03a      	b.n	802a440 <_printf_i+0xa8>
 802a3ca:	f1a7 0363 	sub.w	r3, r7, #99	@ 0x63
 802a3ce:	2b15      	cmp	r3, #21
 802a3d0:	d8f6      	bhi.n	802a3c0 <_printf_i+0x28>
 802a3d2:	a101      	add	r1, pc, #4	@ (adr r1, 802a3d8 <_printf_i+0x40>)
 802a3d4:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
 802a3d8:	0802a431 	.word	0x0802a431
 802a3dc:	0802a445 	.word	0x0802a445
 802a3e0:	0802a3c1 	.word	0x0802a3c1
 802a3e4:	0802a3c1 	.word	0x0802a3c1
 802a3e8:	0802a3c1 	.word	0x0802a3c1
 802a3ec:	0802a3c1 	.word	0x0802a3c1
 802a3f0:	0802a445 	.word	0x0802a445
 802a3f4:	0802a3c1 	.word	0x0802a3c1
 802a3f8:	0802a3c1 	.word	0x0802a3c1
 802a3fc:	0802a3c1 	.word	0x0802a3c1
 802a400:	0802a3c1 	.word	0x0802a3c1
 802a404:	0802a545 	.word	0x0802a545
 802a408:	0802a46f 	.word	0x0802a46f
 802a40c:	0802a4ff 	.word	0x0802a4ff
 802a410:	0802a3c1 	.word	0x0802a3c1
 802a414:	0802a3c1 	.word	0x0802a3c1
 802a418:	0802a567 	.word	0x0802a567
 802a41c:	0802a3c1 	.word	0x0802a3c1
 802a420:	0802a46f 	.word	0x0802a46f
 802a424:	0802a3c1 	.word	0x0802a3c1
 802a428:	0802a3c1 	.word	0x0802a3c1
 802a42c:	0802a507 	.word	0x0802a507
 802a430:	6833      	ldr	r3, [r6, #0]
 802a432:	1d1a      	adds	r2, r3, #4
 802a434:	681b      	ldr	r3, [r3, #0]
 802a436:	6032      	str	r2, [r6, #0]
 802a438:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 802a43c:	f884 3042 	strb.w	r3, [r4, #66]	@ 0x42
 802a440:	2301      	movs	r3, #1
 802a442:	e09d      	b.n	802a580 <_printf_i+0x1e8>
 802a444:	6833      	ldr	r3, [r6, #0]
 802a446:	6820      	ldr	r0, [r4, #0]
 802a448:	1d19      	adds	r1, r3, #4
 802a44a:	6031      	str	r1, [r6, #0]
 802a44c:	0606      	lsls	r6, r0, #24
 802a44e:	d501      	bpl.n	802a454 <_printf_i+0xbc>
 802a450:	681d      	ldr	r5, [r3, #0]
 802a452:	e003      	b.n	802a45c <_printf_i+0xc4>
 802a454:	0645      	lsls	r5, r0, #25
 802a456:	d5fb      	bpl.n	802a450 <_printf_i+0xb8>
 802a458:	f9b3 5000 	ldrsh.w	r5, [r3]
 802a45c:	2d00      	cmp	r5, #0
 802a45e:	da03      	bge.n	802a468 <_printf_i+0xd0>
 802a460:	232d      	movs	r3, #45	@ 0x2d
 802a462:	426d      	negs	r5, r5
 802a464:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a468:	4859      	ldr	r0, [pc, #356]	@ (802a5d0 <_printf_i+0x238>)
 802a46a:	230a      	movs	r3, #10
 802a46c:	e011      	b.n	802a492 <_printf_i+0xfa>
 802a46e:	6821      	ldr	r1, [r4, #0]
 802a470:	6833      	ldr	r3, [r6, #0]
 802a472:	0608      	lsls	r0, r1, #24
 802a474:	f853 5b04 	ldr.w	r5, [r3], #4
 802a478:	d402      	bmi.n	802a480 <_printf_i+0xe8>
 802a47a:	0649      	lsls	r1, r1, #25
 802a47c:	bf48      	it	mi
 802a47e:	b2ad      	uxthmi	r5, r5
 802a480:	2f6f      	cmp	r7, #111	@ 0x6f
 802a482:	4853      	ldr	r0, [pc, #332]	@ (802a5d0 <_printf_i+0x238>)
 802a484:	6033      	str	r3, [r6, #0]
 802a486:	bf14      	ite	ne
 802a488:	230a      	movne	r3, #10
 802a48a:	2308      	moveq	r3, #8
 802a48c:	2100      	movs	r1, #0
 802a48e:	f884 1043 	strb.w	r1, [r4, #67]	@ 0x43
 802a492:	6866      	ldr	r6, [r4, #4]
 802a494:	60a6      	str	r6, [r4, #8]
 802a496:	2e00      	cmp	r6, #0
 802a498:	bfa2      	ittt	ge
 802a49a:	6821      	ldrge	r1, [r4, #0]
 802a49c:	f021 0104 	bicge.w	r1, r1, #4
 802a4a0:	6021      	strge	r1, [r4, #0]
 802a4a2:	b90d      	cbnz	r5, 802a4a8 <_printf_i+0x110>
 802a4a4:	2e00      	cmp	r6, #0
 802a4a6:	d04b      	beq.n	802a540 <_printf_i+0x1a8>
 802a4a8:	4616      	mov	r6, r2
 802a4aa:	fbb5 f1f3 	udiv	r1, r5, r3
 802a4ae:	fb03 5711 	mls	r7, r3, r1, r5
 802a4b2:	5dc7      	ldrb	r7, [r0, r7]
 802a4b4:	f806 7d01 	strb.w	r7, [r6, #-1]!
 802a4b8:	462f      	mov	r7, r5
 802a4ba:	42bb      	cmp	r3, r7
 802a4bc:	460d      	mov	r5, r1
 802a4be:	d9f4      	bls.n	802a4aa <_printf_i+0x112>
 802a4c0:	2b08      	cmp	r3, #8
 802a4c2:	d10b      	bne.n	802a4dc <_printf_i+0x144>
 802a4c4:	6823      	ldr	r3, [r4, #0]
 802a4c6:	07df      	lsls	r7, r3, #31
 802a4c8:	d508      	bpl.n	802a4dc <_printf_i+0x144>
 802a4ca:	6923      	ldr	r3, [r4, #16]
 802a4cc:	6861      	ldr	r1, [r4, #4]
 802a4ce:	4299      	cmp	r1, r3
 802a4d0:	bfde      	ittt	le
 802a4d2:	2330      	movle	r3, #48	@ 0x30
 802a4d4:	f806 3c01 	strble.w	r3, [r6, #-1]
 802a4d8:	f106 36ff 	addle.w	r6, r6, #4294967295	@ 0xffffffff
 802a4dc:	1b92      	subs	r2, r2, r6
 802a4de:	6122      	str	r2, [r4, #16]
 802a4e0:	f8cd a000 	str.w	sl, [sp]
 802a4e4:	464b      	mov	r3, r9
 802a4e6:	aa03      	add	r2, sp, #12
 802a4e8:	4621      	mov	r1, r4
 802a4ea:	4640      	mov	r0, r8
 802a4ec:	f7ff fee6 	bl	802a2bc <_printf_common>
 802a4f0:	3001      	adds	r0, #1
 802a4f2:	d14a      	bne.n	802a58a <_printf_i+0x1f2>
 802a4f4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a4f8:	b004      	add	sp, #16
 802a4fa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802a4fe:	6823      	ldr	r3, [r4, #0]
 802a500:	f043 0320 	orr.w	r3, r3, #32
 802a504:	6023      	str	r3, [r4, #0]
 802a506:	4833      	ldr	r0, [pc, #204]	@ (802a5d4 <_printf_i+0x23c>)
 802a508:	2778      	movs	r7, #120	@ 0x78
 802a50a:	f884 7045 	strb.w	r7, [r4, #69]	@ 0x45
 802a50e:	6823      	ldr	r3, [r4, #0]
 802a510:	6831      	ldr	r1, [r6, #0]
 802a512:	061f      	lsls	r7, r3, #24
 802a514:	f851 5b04 	ldr.w	r5, [r1], #4
 802a518:	d402      	bmi.n	802a520 <_printf_i+0x188>
 802a51a:	065f      	lsls	r7, r3, #25
 802a51c:	bf48      	it	mi
 802a51e:	b2ad      	uxthmi	r5, r5
 802a520:	6031      	str	r1, [r6, #0]
 802a522:	07d9      	lsls	r1, r3, #31
 802a524:	bf44      	itt	mi
 802a526:	f043 0320 	orrmi.w	r3, r3, #32
 802a52a:	6023      	strmi	r3, [r4, #0]
 802a52c:	b11d      	cbz	r5, 802a536 <_printf_i+0x19e>
 802a52e:	2310      	movs	r3, #16
 802a530:	e7ac      	b.n	802a48c <_printf_i+0xf4>
 802a532:	4827      	ldr	r0, [pc, #156]	@ (802a5d0 <_printf_i+0x238>)
 802a534:	e7e9      	b.n	802a50a <_printf_i+0x172>
 802a536:	6823      	ldr	r3, [r4, #0]
 802a538:	f023 0320 	bic.w	r3, r3, #32
 802a53c:	6023      	str	r3, [r4, #0]
 802a53e:	e7f6      	b.n	802a52e <_printf_i+0x196>
 802a540:	4616      	mov	r6, r2
 802a542:	e7bd      	b.n	802a4c0 <_printf_i+0x128>
 802a544:	6833      	ldr	r3, [r6, #0]
 802a546:	6825      	ldr	r5, [r4, #0]
 802a548:	6961      	ldr	r1, [r4, #20]
 802a54a:	1d18      	adds	r0, r3, #4
 802a54c:	6030      	str	r0, [r6, #0]
 802a54e:	062e      	lsls	r6, r5, #24
 802a550:	681b      	ldr	r3, [r3, #0]
 802a552:	d501      	bpl.n	802a558 <_printf_i+0x1c0>
 802a554:	6019      	str	r1, [r3, #0]
 802a556:	e002      	b.n	802a55e <_printf_i+0x1c6>
 802a558:	0668      	lsls	r0, r5, #25
 802a55a:	d5fb      	bpl.n	802a554 <_printf_i+0x1bc>
 802a55c:	8019      	strh	r1, [r3, #0]
 802a55e:	2300      	movs	r3, #0
 802a560:	6123      	str	r3, [r4, #16]
 802a562:	4616      	mov	r6, r2
 802a564:	e7bc      	b.n	802a4e0 <_printf_i+0x148>
 802a566:	6833      	ldr	r3, [r6, #0]
 802a568:	1d1a      	adds	r2, r3, #4
 802a56a:	6032      	str	r2, [r6, #0]
 802a56c:	681e      	ldr	r6, [r3, #0]
 802a56e:	6862      	ldr	r2, [r4, #4]
 802a570:	2100      	movs	r1, #0
 802a572:	4630      	mov	r0, r6
 802a574:	f7d5 fec4 	bl	8000300 <memchr>
 802a578:	b108      	cbz	r0, 802a57e <_printf_i+0x1e6>
 802a57a:	1b80      	subs	r0, r0, r6
 802a57c:	6060      	str	r0, [r4, #4]
 802a57e:	6863      	ldr	r3, [r4, #4]
 802a580:	6123      	str	r3, [r4, #16]
 802a582:	2300      	movs	r3, #0
 802a584:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a588:	e7aa      	b.n	802a4e0 <_printf_i+0x148>
 802a58a:	6923      	ldr	r3, [r4, #16]
 802a58c:	4632      	mov	r2, r6
 802a58e:	4649      	mov	r1, r9
 802a590:	4640      	mov	r0, r8
 802a592:	47d0      	blx	sl
 802a594:	3001      	adds	r0, #1
 802a596:	d0ad      	beq.n	802a4f4 <_printf_i+0x15c>
 802a598:	6823      	ldr	r3, [r4, #0]
 802a59a:	079b      	lsls	r3, r3, #30
 802a59c:	d413      	bmi.n	802a5c6 <_printf_i+0x22e>
 802a59e:	68e0      	ldr	r0, [r4, #12]
 802a5a0:	9b03      	ldr	r3, [sp, #12]
 802a5a2:	4298      	cmp	r0, r3
 802a5a4:	bfb8      	it	lt
 802a5a6:	4618      	movlt	r0, r3
 802a5a8:	e7a6      	b.n	802a4f8 <_printf_i+0x160>
 802a5aa:	2301      	movs	r3, #1
 802a5ac:	4632      	mov	r2, r6
 802a5ae:	4649      	mov	r1, r9
 802a5b0:	4640      	mov	r0, r8
 802a5b2:	47d0      	blx	sl
 802a5b4:	3001      	adds	r0, #1
 802a5b6:	d09d      	beq.n	802a4f4 <_printf_i+0x15c>
 802a5b8:	3501      	adds	r5, #1
 802a5ba:	68e3      	ldr	r3, [r4, #12]
 802a5bc:	9903      	ldr	r1, [sp, #12]
 802a5be:	1a5b      	subs	r3, r3, r1
 802a5c0:	42ab      	cmp	r3, r5
 802a5c2:	dcf2      	bgt.n	802a5aa <_printf_i+0x212>
 802a5c4:	e7eb      	b.n	802a59e <_printf_i+0x206>
 802a5c6:	2500      	movs	r5, #0
 802a5c8:	f104 0619 	add.w	r6, r4, #25
 802a5cc:	e7f5      	b.n	802a5ba <_printf_i+0x222>
 802a5ce:	bf00      	nop
 802a5d0:	08031d43 	.word	0x08031d43
 802a5d4:	08031d54 	.word	0x08031d54

0802a5d8 <std>:
 802a5d8:	2300      	movs	r3, #0
 802a5da:	b510      	push	{r4, lr}
 802a5dc:	4604      	mov	r4, r0
 802a5de:	e9c0 3300 	strd	r3, r3, [r0]
 802a5e2:	e9c0 3304 	strd	r3, r3, [r0, #16]
 802a5e6:	6083      	str	r3, [r0, #8]
 802a5e8:	8181      	strh	r1, [r0, #12]
 802a5ea:	6643      	str	r3, [r0, #100]	@ 0x64
 802a5ec:	81c2      	strh	r2, [r0, #14]
 802a5ee:	6183      	str	r3, [r0, #24]
 802a5f0:	4619      	mov	r1, r3
 802a5f2:	2208      	movs	r2, #8
 802a5f4:	305c      	adds	r0, #92	@ 0x5c
 802a5f6:	f000 fa43 	bl	802aa80 <memset>
 802a5fa:	4b0d      	ldr	r3, [pc, #52]	@ (802a630 <std+0x58>)
 802a5fc:	6263      	str	r3, [r4, #36]	@ 0x24
 802a5fe:	4b0d      	ldr	r3, [pc, #52]	@ (802a634 <std+0x5c>)
 802a600:	62a3      	str	r3, [r4, #40]	@ 0x28
 802a602:	4b0d      	ldr	r3, [pc, #52]	@ (802a638 <std+0x60>)
 802a604:	62e3      	str	r3, [r4, #44]	@ 0x2c
 802a606:	4b0d      	ldr	r3, [pc, #52]	@ (802a63c <std+0x64>)
 802a608:	6323      	str	r3, [r4, #48]	@ 0x30
 802a60a:	4b0d      	ldr	r3, [pc, #52]	@ (802a640 <std+0x68>)
 802a60c:	6224      	str	r4, [r4, #32]
 802a60e:	429c      	cmp	r4, r3
 802a610:	d006      	beq.n	802a620 <std+0x48>
 802a612:	f103 0268 	add.w	r2, r3, #104	@ 0x68
 802a616:	4294      	cmp	r4, r2
 802a618:	d002      	beq.n	802a620 <std+0x48>
 802a61a:	33d0      	adds	r3, #208	@ 0xd0
 802a61c:	429c      	cmp	r4, r3
 802a61e:	d105      	bne.n	802a62c <std+0x54>
 802a620:	f104 0058 	add.w	r0, r4, #88	@ 0x58
 802a624:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a628:	f000 bb1e 	b.w	802ac68 <__retarget_lock_init_recursive>
 802a62c:	bd10      	pop	{r4, pc}
 802a62e:	bf00      	nop
 802a630:	0802a87d 	.word	0x0802a87d
 802a634:	0802a89f 	.word	0x0802a89f
 802a638:	0802a8d7 	.word	0x0802a8d7
 802a63c:	0802a8fb 	.word	0x0802a8fb
 802a640:	2402b124 	.word	0x2402b124

0802a644 <stdio_exit_handler>:
 802a644:	4a02      	ldr	r2, [pc, #8]	@ (802a650 <stdio_exit_handler+0xc>)
 802a646:	4903      	ldr	r1, [pc, #12]	@ (802a654 <stdio_exit_handler+0x10>)
 802a648:	4803      	ldr	r0, [pc, #12]	@ (802a658 <stdio_exit_handler+0x14>)
 802a64a:	f000 b869 	b.w	802a720 <_fwalk_sglue>
 802a64e:	bf00      	nop
 802a650:	2400005c 	.word	0x2400005c
 802a654:	0802cf8d 	.word	0x0802cf8d
 802a658:	240001d8 	.word	0x240001d8

0802a65c <cleanup_stdio>:
 802a65c:	6841      	ldr	r1, [r0, #4]
 802a65e:	4b0c      	ldr	r3, [pc, #48]	@ (802a690 <cleanup_stdio+0x34>)
 802a660:	4299      	cmp	r1, r3
 802a662:	b510      	push	{r4, lr}
 802a664:	4604      	mov	r4, r0
 802a666:	d001      	beq.n	802a66c <cleanup_stdio+0x10>
 802a668:	f002 fc90 	bl	802cf8c <_fflush_r>
 802a66c:	68a1      	ldr	r1, [r4, #8]
 802a66e:	4b09      	ldr	r3, [pc, #36]	@ (802a694 <cleanup_stdio+0x38>)
 802a670:	4299      	cmp	r1, r3
 802a672:	d002      	beq.n	802a67a <cleanup_stdio+0x1e>
 802a674:	4620      	mov	r0, r4
 802a676:	f002 fc89 	bl	802cf8c <_fflush_r>
 802a67a:	68e1      	ldr	r1, [r4, #12]
 802a67c:	4b06      	ldr	r3, [pc, #24]	@ (802a698 <cleanup_stdio+0x3c>)
 802a67e:	4299      	cmp	r1, r3
 802a680:	d004      	beq.n	802a68c <cleanup_stdio+0x30>
 802a682:	4620      	mov	r0, r4
 802a684:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a688:	f002 bc80 	b.w	802cf8c <_fflush_r>
 802a68c:	bd10      	pop	{r4, pc}
 802a68e:	bf00      	nop
 802a690:	2402b124 	.word	0x2402b124
 802a694:	2402b18c 	.word	0x2402b18c
 802a698:	2402b1f4 	.word	0x2402b1f4

0802a69c <global_stdio_init.part.0>:
 802a69c:	b510      	push	{r4, lr}
 802a69e:	4b0b      	ldr	r3, [pc, #44]	@ (802a6cc <global_stdio_init.part.0+0x30>)
 802a6a0:	4c0b      	ldr	r4, [pc, #44]	@ (802a6d0 <global_stdio_init.part.0+0x34>)
 802a6a2:	4a0c      	ldr	r2, [pc, #48]	@ (802a6d4 <global_stdio_init.part.0+0x38>)
 802a6a4:	601a      	str	r2, [r3, #0]
 802a6a6:	4620      	mov	r0, r4
 802a6a8:	2200      	movs	r2, #0
 802a6aa:	2104      	movs	r1, #4
 802a6ac:	f7ff ff94 	bl	802a5d8 <std>
 802a6b0:	f104 0068 	add.w	r0, r4, #104	@ 0x68
 802a6b4:	2201      	movs	r2, #1
 802a6b6:	2109      	movs	r1, #9
 802a6b8:	f7ff ff8e 	bl	802a5d8 <std>
 802a6bc:	f104 00d0 	add.w	r0, r4, #208	@ 0xd0
 802a6c0:	2202      	movs	r2, #2
 802a6c2:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a6c6:	2112      	movs	r1, #18
 802a6c8:	f7ff bf86 	b.w	802a5d8 <std>
 802a6cc:	2402b25c 	.word	0x2402b25c
 802a6d0:	2402b124 	.word	0x2402b124
 802a6d4:	0802a645 	.word	0x0802a645

0802a6d8 <__sfp_lock_acquire>:
 802a6d8:	4801      	ldr	r0, [pc, #4]	@ (802a6e0 <__sfp_lock_acquire+0x8>)
 802a6da:	f000 bac6 	b.w	802ac6a <__retarget_lock_acquire_recursive>
 802a6de:	bf00      	nop
 802a6e0:	2402b265 	.word	0x2402b265

0802a6e4 <__sfp_lock_release>:
 802a6e4:	4801      	ldr	r0, [pc, #4]	@ (802a6ec <__sfp_lock_release+0x8>)
 802a6e6:	f000 bac1 	b.w	802ac6c <__retarget_lock_release_recursive>
 802a6ea:	bf00      	nop
 802a6ec:	2402b265 	.word	0x2402b265

0802a6f0 <__sinit>:
 802a6f0:	b510      	push	{r4, lr}
 802a6f2:	4604      	mov	r4, r0
 802a6f4:	f7ff fff0 	bl	802a6d8 <__sfp_lock_acquire>
 802a6f8:	6a23      	ldr	r3, [r4, #32]
 802a6fa:	b11b      	cbz	r3, 802a704 <__sinit+0x14>
 802a6fc:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a700:	f7ff bff0 	b.w	802a6e4 <__sfp_lock_release>
 802a704:	4b04      	ldr	r3, [pc, #16]	@ (802a718 <__sinit+0x28>)
 802a706:	6223      	str	r3, [r4, #32]
 802a708:	4b04      	ldr	r3, [pc, #16]	@ (802a71c <__sinit+0x2c>)
 802a70a:	681b      	ldr	r3, [r3, #0]
 802a70c:	2b00      	cmp	r3, #0
 802a70e:	d1f5      	bne.n	802a6fc <__sinit+0xc>
 802a710:	f7ff ffc4 	bl	802a69c <global_stdio_init.part.0>
 802a714:	e7f2      	b.n	802a6fc <__sinit+0xc>
 802a716:	bf00      	nop
 802a718:	0802a65d 	.word	0x0802a65d
 802a71c:	2402b25c 	.word	0x2402b25c

0802a720 <_fwalk_sglue>:
 802a720:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802a724:	4607      	mov	r7, r0
 802a726:	4688      	mov	r8, r1
 802a728:	4614      	mov	r4, r2
 802a72a:	2600      	movs	r6, #0
 802a72c:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
 802a730:	f1b9 0901 	subs.w	r9, r9, #1
 802a734:	d505      	bpl.n	802a742 <_fwalk_sglue+0x22>
 802a736:	6824      	ldr	r4, [r4, #0]
 802a738:	2c00      	cmp	r4, #0
 802a73a:	d1f7      	bne.n	802a72c <_fwalk_sglue+0xc>
 802a73c:	4630      	mov	r0, r6
 802a73e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802a742:	89ab      	ldrh	r3, [r5, #12]
 802a744:	2b01      	cmp	r3, #1
 802a746:	d907      	bls.n	802a758 <_fwalk_sglue+0x38>
 802a748:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 802a74c:	3301      	adds	r3, #1
 802a74e:	d003      	beq.n	802a758 <_fwalk_sglue+0x38>
 802a750:	4629      	mov	r1, r5
 802a752:	4638      	mov	r0, r7
 802a754:	47c0      	blx	r8
 802a756:	4306      	orrs	r6, r0
 802a758:	3568      	adds	r5, #104	@ 0x68
 802a75a:	e7e9      	b.n	802a730 <_fwalk_sglue+0x10>

0802a75c <iprintf>:
 802a75c:	b40f      	push	{r0, r1, r2, r3}
 802a75e:	b507      	push	{r0, r1, r2, lr}
 802a760:	4906      	ldr	r1, [pc, #24]	@ (802a77c <iprintf+0x20>)
 802a762:	ab04      	add	r3, sp, #16
 802a764:	6808      	ldr	r0, [r1, #0]
 802a766:	f853 2b04 	ldr.w	r2, [r3], #4
 802a76a:	6881      	ldr	r1, [r0, #8]
 802a76c:	9301      	str	r3, [sp, #4]
 802a76e:	f002 fa71 	bl	802cc54 <_vfiprintf_r>
 802a772:	b003      	add	sp, #12
 802a774:	f85d eb04 	ldr.w	lr, [sp], #4
 802a778:	b004      	add	sp, #16
 802a77a:	4770      	bx	lr
 802a77c:	240001d4 	.word	0x240001d4

0802a780 <_puts_r>:
 802a780:	6a03      	ldr	r3, [r0, #32]
 802a782:	b570      	push	{r4, r5, r6, lr}
 802a784:	6884      	ldr	r4, [r0, #8]
 802a786:	4605      	mov	r5, r0
 802a788:	460e      	mov	r6, r1
 802a78a:	b90b      	cbnz	r3, 802a790 <_puts_r+0x10>
 802a78c:	f7ff ffb0 	bl	802a6f0 <__sinit>
 802a790:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802a792:	07db      	lsls	r3, r3, #31
 802a794:	d405      	bmi.n	802a7a2 <_puts_r+0x22>
 802a796:	89a3      	ldrh	r3, [r4, #12]
 802a798:	0598      	lsls	r0, r3, #22
 802a79a:	d402      	bmi.n	802a7a2 <_puts_r+0x22>
 802a79c:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802a79e:	f000 fa64 	bl	802ac6a <__retarget_lock_acquire_recursive>
 802a7a2:	89a3      	ldrh	r3, [r4, #12]
 802a7a4:	0719      	lsls	r1, r3, #28
 802a7a6:	d502      	bpl.n	802a7ae <_puts_r+0x2e>
 802a7a8:	6923      	ldr	r3, [r4, #16]
 802a7aa:	2b00      	cmp	r3, #0
 802a7ac:	d135      	bne.n	802a81a <_puts_r+0x9a>
 802a7ae:	4621      	mov	r1, r4
 802a7b0:	4628      	mov	r0, r5
 802a7b2:	f000 f8e5 	bl	802a980 <__swsetup_r>
 802a7b6:	b380      	cbz	r0, 802a81a <_puts_r+0x9a>
 802a7b8:	f04f 35ff 	mov.w	r5, #4294967295	@ 0xffffffff
 802a7bc:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802a7be:	07da      	lsls	r2, r3, #31
 802a7c0:	d405      	bmi.n	802a7ce <_puts_r+0x4e>
 802a7c2:	89a3      	ldrh	r3, [r4, #12]
 802a7c4:	059b      	lsls	r3, r3, #22
 802a7c6:	d402      	bmi.n	802a7ce <_puts_r+0x4e>
 802a7c8:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802a7ca:	f000 fa4f 	bl	802ac6c <__retarget_lock_release_recursive>
 802a7ce:	4628      	mov	r0, r5
 802a7d0:	bd70      	pop	{r4, r5, r6, pc}
 802a7d2:	2b00      	cmp	r3, #0
 802a7d4:	da04      	bge.n	802a7e0 <_puts_r+0x60>
 802a7d6:	69a2      	ldr	r2, [r4, #24]
 802a7d8:	429a      	cmp	r2, r3
 802a7da:	dc17      	bgt.n	802a80c <_puts_r+0x8c>
 802a7dc:	290a      	cmp	r1, #10
 802a7de:	d015      	beq.n	802a80c <_puts_r+0x8c>
 802a7e0:	6823      	ldr	r3, [r4, #0]
 802a7e2:	1c5a      	adds	r2, r3, #1
 802a7e4:	6022      	str	r2, [r4, #0]
 802a7e6:	7019      	strb	r1, [r3, #0]
 802a7e8:	68a3      	ldr	r3, [r4, #8]
 802a7ea:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 802a7ee:	3b01      	subs	r3, #1
 802a7f0:	60a3      	str	r3, [r4, #8]
 802a7f2:	2900      	cmp	r1, #0
 802a7f4:	d1ed      	bne.n	802a7d2 <_puts_r+0x52>
 802a7f6:	2b00      	cmp	r3, #0
 802a7f8:	da11      	bge.n	802a81e <_puts_r+0x9e>
 802a7fa:	4622      	mov	r2, r4
 802a7fc:	210a      	movs	r1, #10
 802a7fe:	4628      	mov	r0, r5
 802a800:	f000 f87f 	bl	802a902 <__swbuf_r>
 802a804:	3001      	adds	r0, #1
 802a806:	d0d7      	beq.n	802a7b8 <_puts_r+0x38>
 802a808:	250a      	movs	r5, #10
 802a80a:	e7d7      	b.n	802a7bc <_puts_r+0x3c>
 802a80c:	4622      	mov	r2, r4
 802a80e:	4628      	mov	r0, r5
 802a810:	f000 f877 	bl	802a902 <__swbuf_r>
 802a814:	3001      	adds	r0, #1
 802a816:	d1e7      	bne.n	802a7e8 <_puts_r+0x68>
 802a818:	e7ce      	b.n	802a7b8 <_puts_r+0x38>
 802a81a:	3e01      	subs	r6, #1
 802a81c:	e7e4      	b.n	802a7e8 <_puts_r+0x68>
 802a81e:	6823      	ldr	r3, [r4, #0]
 802a820:	1c5a      	adds	r2, r3, #1
 802a822:	6022      	str	r2, [r4, #0]
 802a824:	220a      	movs	r2, #10
 802a826:	701a      	strb	r2, [r3, #0]
 802a828:	e7ee      	b.n	802a808 <_puts_r+0x88>
	...

0802a82c <puts>:
 802a82c:	4b02      	ldr	r3, [pc, #8]	@ (802a838 <puts+0xc>)
 802a82e:	4601      	mov	r1, r0
 802a830:	6818      	ldr	r0, [r3, #0]
 802a832:	f7ff bfa5 	b.w	802a780 <_puts_r>
 802a836:	bf00      	nop
 802a838:	240001d4 	.word	0x240001d4

0802a83c <siprintf>:
 802a83c:	b40e      	push	{r1, r2, r3}
 802a83e:	b500      	push	{lr}
 802a840:	b09c      	sub	sp, #112	@ 0x70
 802a842:	ab1d      	add	r3, sp, #116	@ 0x74
 802a844:	9002      	str	r0, [sp, #8]
 802a846:	9006      	str	r0, [sp, #24]
 802a848:	f06f 4100 	mvn.w	r1, #2147483648	@ 0x80000000
 802a84c:	4809      	ldr	r0, [pc, #36]	@ (802a874 <siprintf+0x38>)
 802a84e:	9107      	str	r1, [sp, #28]
 802a850:	9104      	str	r1, [sp, #16]
 802a852:	4909      	ldr	r1, [pc, #36]	@ (802a878 <siprintf+0x3c>)
 802a854:	f853 2b04 	ldr.w	r2, [r3], #4
 802a858:	9105      	str	r1, [sp, #20]
 802a85a:	6800      	ldr	r0, [r0, #0]
 802a85c:	9301      	str	r3, [sp, #4]
 802a85e:	a902      	add	r1, sp, #8
 802a860:	f002 f8d2 	bl	802ca08 <_svfiprintf_r>
 802a864:	9b02      	ldr	r3, [sp, #8]
 802a866:	2200      	movs	r2, #0
 802a868:	701a      	strb	r2, [r3, #0]
 802a86a:	b01c      	add	sp, #112	@ 0x70
 802a86c:	f85d eb04 	ldr.w	lr, [sp], #4
 802a870:	b003      	add	sp, #12
 802a872:	4770      	bx	lr
 802a874:	240001d4 	.word	0x240001d4
 802a878:	ffff0208 	.word	0xffff0208

0802a87c <__sread>:
 802a87c:	b510      	push	{r4, lr}
 802a87e:	460c      	mov	r4, r1
 802a880:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a884:	f000 f992 	bl	802abac <_read_r>
 802a888:	2800      	cmp	r0, #0
 802a88a:	bfab      	itete	ge
 802a88c:	6d63      	ldrge	r3, [r4, #84]	@ 0x54
 802a88e:	89a3      	ldrhlt	r3, [r4, #12]
 802a890:	181b      	addge	r3, r3, r0
 802a892:	f423 5380 	biclt.w	r3, r3, #4096	@ 0x1000
 802a896:	bfac      	ite	ge
 802a898:	6563      	strge	r3, [r4, #84]	@ 0x54
 802a89a:	81a3      	strhlt	r3, [r4, #12]
 802a89c:	bd10      	pop	{r4, pc}

0802a89e <__swrite>:
 802a89e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802a8a2:	461f      	mov	r7, r3
 802a8a4:	898b      	ldrh	r3, [r1, #12]
 802a8a6:	05db      	lsls	r3, r3, #23
 802a8a8:	4605      	mov	r5, r0
 802a8aa:	460c      	mov	r4, r1
 802a8ac:	4616      	mov	r6, r2
 802a8ae:	d505      	bpl.n	802a8bc <__swrite+0x1e>
 802a8b0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a8b4:	2302      	movs	r3, #2
 802a8b6:	2200      	movs	r2, #0
 802a8b8:	f000 f966 	bl	802ab88 <_lseek_r>
 802a8bc:	89a3      	ldrh	r3, [r4, #12]
 802a8be:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802a8c2:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 802a8c6:	81a3      	strh	r3, [r4, #12]
 802a8c8:	4632      	mov	r2, r6
 802a8ca:	463b      	mov	r3, r7
 802a8cc:	4628      	mov	r0, r5
 802a8ce:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 802a8d2:	f000 b98d 	b.w	802abf0 <_write_r>

0802a8d6 <__sseek>:
 802a8d6:	b510      	push	{r4, lr}
 802a8d8:	460c      	mov	r4, r1
 802a8da:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a8de:	f000 f953 	bl	802ab88 <_lseek_r>
 802a8e2:	1c43      	adds	r3, r0, #1
 802a8e4:	89a3      	ldrh	r3, [r4, #12]
 802a8e6:	bf15      	itete	ne
 802a8e8:	6560      	strne	r0, [r4, #84]	@ 0x54
 802a8ea:	f423 5380 	biceq.w	r3, r3, #4096	@ 0x1000
 802a8ee:	f443 5380 	orrne.w	r3, r3, #4096	@ 0x1000
 802a8f2:	81a3      	strheq	r3, [r4, #12]
 802a8f4:	bf18      	it	ne
 802a8f6:	81a3      	strhne	r3, [r4, #12]
 802a8f8:	bd10      	pop	{r4, pc}

0802a8fa <__sclose>:
 802a8fa:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802a8fe:	f000 b8dd 	b.w	802aabc <_close_r>

0802a902 <__swbuf_r>:
 802a902:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802a904:	460e      	mov	r6, r1
 802a906:	4614      	mov	r4, r2
 802a908:	4605      	mov	r5, r0
 802a90a:	b118      	cbz	r0, 802a914 <__swbuf_r+0x12>
 802a90c:	6a03      	ldr	r3, [r0, #32]
 802a90e:	b90b      	cbnz	r3, 802a914 <__swbuf_r+0x12>
 802a910:	f7ff feee 	bl	802a6f0 <__sinit>
 802a914:	69a3      	ldr	r3, [r4, #24]
 802a916:	60a3      	str	r3, [r4, #8]
 802a918:	89a3      	ldrh	r3, [r4, #12]
 802a91a:	071a      	lsls	r2, r3, #28
 802a91c:	d501      	bpl.n	802a922 <__swbuf_r+0x20>
 802a91e:	6923      	ldr	r3, [r4, #16]
 802a920:	b943      	cbnz	r3, 802a934 <__swbuf_r+0x32>
 802a922:	4621      	mov	r1, r4
 802a924:	4628      	mov	r0, r5
 802a926:	f000 f82b 	bl	802a980 <__swsetup_r>
 802a92a:	b118      	cbz	r0, 802a934 <__swbuf_r+0x32>
 802a92c:	f04f 37ff 	mov.w	r7, #4294967295	@ 0xffffffff
 802a930:	4638      	mov	r0, r7
 802a932:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 802a934:	6823      	ldr	r3, [r4, #0]
 802a936:	6922      	ldr	r2, [r4, #16]
 802a938:	1a98      	subs	r0, r3, r2
 802a93a:	6963      	ldr	r3, [r4, #20]
 802a93c:	b2f6      	uxtb	r6, r6
 802a93e:	4283      	cmp	r3, r0
 802a940:	4637      	mov	r7, r6
 802a942:	dc05      	bgt.n	802a950 <__swbuf_r+0x4e>
 802a944:	4621      	mov	r1, r4
 802a946:	4628      	mov	r0, r5
 802a948:	f002 fb20 	bl	802cf8c <_fflush_r>
 802a94c:	2800      	cmp	r0, #0
 802a94e:	d1ed      	bne.n	802a92c <__swbuf_r+0x2a>
 802a950:	68a3      	ldr	r3, [r4, #8]
 802a952:	3b01      	subs	r3, #1
 802a954:	60a3      	str	r3, [r4, #8]
 802a956:	6823      	ldr	r3, [r4, #0]
 802a958:	1c5a      	adds	r2, r3, #1
 802a95a:	6022      	str	r2, [r4, #0]
 802a95c:	701e      	strb	r6, [r3, #0]
 802a95e:	6962      	ldr	r2, [r4, #20]
 802a960:	1c43      	adds	r3, r0, #1
 802a962:	429a      	cmp	r2, r3
 802a964:	d004      	beq.n	802a970 <__swbuf_r+0x6e>
 802a966:	89a3      	ldrh	r3, [r4, #12]
 802a968:	07db      	lsls	r3, r3, #31
 802a96a:	d5e1      	bpl.n	802a930 <__swbuf_r+0x2e>
 802a96c:	2e0a      	cmp	r6, #10
 802a96e:	d1df      	bne.n	802a930 <__swbuf_r+0x2e>
 802a970:	4621      	mov	r1, r4
 802a972:	4628      	mov	r0, r5
 802a974:	f002 fb0a 	bl	802cf8c <_fflush_r>
 802a978:	2800      	cmp	r0, #0
 802a97a:	d0d9      	beq.n	802a930 <__swbuf_r+0x2e>
 802a97c:	e7d6      	b.n	802a92c <__swbuf_r+0x2a>
	...

0802a980 <__swsetup_r>:
 802a980:	b538      	push	{r3, r4, r5, lr}
 802a982:	4b29      	ldr	r3, [pc, #164]	@ (802aa28 <__swsetup_r+0xa8>)
 802a984:	4605      	mov	r5, r0
 802a986:	6818      	ldr	r0, [r3, #0]
 802a988:	460c      	mov	r4, r1
 802a98a:	b118      	cbz	r0, 802a994 <__swsetup_r+0x14>
 802a98c:	6a03      	ldr	r3, [r0, #32]
 802a98e:	b90b      	cbnz	r3, 802a994 <__swsetup_r+0x14>
 802a990:	f7ff feae 	bl	802a6f0 <__sinit>
 802a994:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802a998:	0719      	lsls	r1, r3, #28
 802a99a:	d422      	bmi.n	802a9e2 <__swsetup_r+0x62>
 802a99c:	06da      	lsls	r2, r3, #27
 802a99e:	d407      	bmi.n	802a9b0 <__swsetup_r+0x30>
 802a9a0:	2209      	movs	r2, #9
 802a9a2:	602a      	str	r2, [r5, #0]
 802a9a4:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802a9a8:	81a3      	strh	r3, [r4, #12]
 802a9aa:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a9ae:	e033      	b.n	802aa18 <__swsetup_r+0x98>
 802a9b0:	0758      	lsls	r0, r3, #29
 802a9b2:	d512      	bpl.n	802a9da <__swsetup_r+0x5a>
 802a9b4:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802a9b6:	b141      	cbz	r1, 802a9ca <__swsetup_r+0x4a>
 802a9b8:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802a9bc:	4299      	cmp	r1, r3
 802a9be:	d002      	beq.n	802a9c6 <__swsetup_r+0x46>
 802a9c0:	4628      	mov	r0, r5
 802a9c2:	f000 ff6b 	bl	802b89c <_free_r>
 802a9c6:	2300      	movs	r3, #0
 802a9c8:	6363      	str	r3, [r4, #52]	@ 0x34
 802a9ca:	89a3      	ldrh	r3, [r4, #12]
 802a9cc:	f023 0324 	bic.w	r3, r3, #36	@ 0x24
 802a9d0:	81a3      	strh	r3, [r4, #12]
 802a9d2:	2300      	movs	r3, #0
 802a9d4:	6063      	str	r3, [r4, #4]
 802a9d6:	6923      	ldr	r3, [r4, #16]
 802a9d8:	6023      	str	r3, [r4, #0]
 802a9da:	89a3      	ldrh	r3, [r4, #12]
 802a9dc:	f043 0308 	orr.w	r3, r3, #8
 802a9e0:	81a3      	strh	r3, [r4, #12]
 802a9e2:	6923      	ldr	r3, [r4, #16]
 802a9e4:	b94b      	cbnz	r3, 802a9fa <__swsetup_r+0x7a>
 802a9e6:	89a3      	ldrh	r3, [r4, #12]
 802a9e8:	f403 7320 	and.w	r3, r3, #640	@ 0x280
 802a9ec:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 802a9f0:	d003      	beq.n	802a9fa <__swsetup_r+0x7a>
 802a9f2:	4621      	mov	r1, r4
 802a9f4:	4628      	mov	r0, r5
 802a9f6:	f002 fb29 	bl	802d04c <__smakebuf_r>
 802a9fa:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802a9fe:	f013 0201 	ands.w	r2, r3, #1
 802aa02:	d00a      	beq.n	802aa1a <__swsetup_r+0x9a>
 802aa04:	2200      	movs	r2, #0
 802aa06:	60a2      	str	r2, [r4, #8]
 802aa08:	6962      	ldr	r2, [r4, #20]
 802aa0a:	4252      	negs	r2, r2
 802aa0c:	61a2      	str	r2, [r4, #24]
 802aa0e:	6922      	ldr	r2, [r4, #16]
 802aa10:	b942      	cbnz	r2, 802aa24 <__swsetup_r+0xa4>
 802aa12:	f013 0080 	ands.w	r0, r3, #128	@ 0x80
 802aa16:	d1c5      	bne.n	802a9a4 <__swsetup_r+0x24>
 802aa18:	bd38      	pop	{r3, r4, r5, pc}
 802aa1a:	0799      	lsls	r1, r3, #30
 802aa1c:	bf58      	it	pl
 802aa1e:	6962      	ldrpl	r2, [r4, #20]
 802aa20:	60a2      	str	r2, [r4, #8]
 802aa22:	e7f4      	b.n	802aa0e <__swsetup_r+0x8e>
 802aa24:	2000      	movs	r0, #0
 802aa26:	e7f7      	b.n	802aa18 <__swsetup_r+0x98>
 802aa28:	240001d4 	.word	0x240001d4

0802aa2c <memcmp>:
 802aa2c:	b510      	push	{r4, lr}
 802aa2e:	3901      	subs	r1, #1
 802aa30:	4402      	add	r2, r0
 802aa32:	4290      	cmp	r0, r2
 802aa34:	d101      	bne.n	802aa3a <memcmp+0xe>
 802aa36:	2000      	movs	r0, #0
 802aa38:	e005      	b.n	802aa46 <memcmp+0x1a>
 802aa3a:	7803      	ldrb	r3, [r0, #0]
 802aa3c:	f811 4f01 	ldrb.w	r4, [r1, #1]!
 802aa40:	42a3      	cmp	r3, r4
 802aa42:	d001      	beq.n	802aa48 <memcmp+0x1c>
 802aa44:	1b18      	subs	r0, r3, r4
 802aa46:	bd10      	pop	{r4, pc}
 802aa48:	3001      	adds	r0, #1
 802aa4a:	e7f2      	b.n	802aa32 <memcmp+0x6>

0802aa4c <memmove>:
 802aa4c:	4288      	cmp	r0, r1
 802aa4e:	b510      	push	{r4, lr}
 802aa50:	eb01 0402 	add.w	r4, r1, r2
 802aa54:	d902      	bls.n	802aa5c <memmove+0x10>
 802aa56:	4284      	cmp	r4, r0
 802aa58:	4623      	mov	r3, r4
 802aa5a:	d807      	bhi.n	802aa6c <memmove+0x20>
 802aa5c:	1e43      	subs	r3, r0, #1
 802aa5e:	42a1      	cmp	r1, r4
 802aa60:	d008      	beq.n	802aa74 <memmove+0x28>
 802aa62:	f811 2b01 	ldrb.w	r2, [r1], #1
 802aa66:	f803 2f01 	strb.w	r2, [r3, #1]!
 802aa6a:	e7f8      	b.n	802aa5e <memmove+0x12>
 802aa6c:	4402      	add	r2, r0
 802aa6e:	4601      	mov	r1, r0
 802aa70:	428a      	cmp	r2, r1
 802aa72:	d100      	bne.n	802aa76 <memmove+0x2a>
 802aa74:	bd10      	pop	{r4, pc}
 802aa76:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
 802aa7a:	f802 4d01 	strb.w	r4, [r2, #-1]!
 802aa7e:	e7f7      	b.n	802aa70 <memmove+0x24>

0802aa80 <memset>:
 802aa80:	4402      	add	r2, r0
 802aa82:	4603      	mov	r3, r0
 802aa84:	4293      	cmp	r3, r2
 802aa86:	d100      	bne.n	802aa8a <memset+0xa>
 802aa88:	4770      	bx	lr
 802aa8a:	f803 1b01 	strb.w	r1, [r3], #1
 802aa8e:	e7f9      	b.n	802aa84 <memset+0x4>

0802aa90 <strncmp>:
 802aa90:	b510      	push	{r4, lr}
 802aa92:	b16a      	cbz	r2, 802aab0 <strncmp+0x20>
 802aa94:	3901      	subs	r1, #1
 802aa96:	1884      	adds	r4, r0, r2
 802aa98:	f810 2b01 	ldrb.w	r2, [r0], #1
 802aa9c:	f811 3f01 	ldrb.w	r3, [r1, #1]!
 802aaa0:	429a      	cmp	r2, r3
 802aaa2:	d103      	bne.n	802aaac <strncmp+0x1c>
 802aaa4:	42a0      	cmp	r0, r4
 802aaa6:	d001      	beq.n	802aaac <strncmp+0x1c>
 802aaa8:	2a00      	cmp	r2, #0
 802aaaa:	d1f5      	bne.n	802aa98 <strncmp+0x8>
 802aaac:	1ad0      	subs	r0, r2, r3
 802aaae:	bd10      	pop	{r4, pc}
 802aab0:	4610      	mov	r0, r2
 802aab2:	e7fc      	b.n	802aaae <strncmp+0x1e>

0802aab4 <_localeconv_r>:
 802aab4:	4800      	ldr	r0, [pc, #0]	@ (802aab8 <_localeconv_r+0x4>)
 802aab6:	4770      	bx	lr
 802aab8:	24000158 	.word	0x24000158

0802aabc <_close_r>:
 802aabc:	b538      	push	{r3, r4, r5, lr}
 802aabe:	4d06      	ldr	r5, [pc, #24]	@ (802aad8 <_close_r+0x1c>)
 802aac0:	2300      	movs	r3, #0
 802aac2:	4604      	mov	r4, r0
 802aac4:	4608      	mov	r0, r1
 802aac6:	602b      	str	r3, [r5, #0]
 802aac8:	f7d9 fb32 	bl	8004130 <_close>
 802aacc:	1c43      	adds	r3, r0, #1
 802aace:	d102      	bne.n	802aad6 <_close_r+0x1a>
 802aad0:	682b      	ldr	r3, [r5, #0]
 802aad2:	b103      	cbz	r3, 802aad6 <_close_r+0x1a>
 802aad4:	6023      	str	r3, [r4, #0]
 802aad6:	bd38      	pop	{r3, r4, r5, pc}
 802aad8:	2402b260 	.word	0x2402b260

0802aadc <_reclaim_reent>:
 802aadc:	4b29      	ldr	r3, [pc, #164]	@ (802ab84 <_reclaim_reent+0xa8>)
 802aade:	681b      	ldr	r3, [r3, #0]
 802aae0:	4283      	cmp	r3, r0
 802aae2:	b570      	push	{r4, r5, r6, lr}
 802aae4:	4604      	mov	r4, r0
 802aae6:	d04b      	beq.n	802ab80 <_reclaim_reent+0xa4>
 802aae8:	69c3      	ldr	r3, [r0, #28]
 802aaea:	b1ab      	cbz	r3, 802ab18 <_reclaim_reent+0x3c>
 802aaec:	68db      	ldr	r3, [r3, #12]
 802aaee:	b16b      	cbz	r3, 802ab0c <_reclaim_reent+0x30>
 802aaf0:	2500      	movs	r5, #0
 802aaf2:	69e3      	ldr	r3, [r4, #28]
 802aaf4:	68db      	ldr	r3, [r3, #12]
 802aaf6:	5959      	ldr	r1, [r3, r5]
 802aaf8:	2900      	cmp	r1, #0
 802aafa:	d13b      	bne.n	802ab74 <_reclaim_reent+0x98>
 802aafc:	3504      	adds	r5, #4
 802aafe:	2d80      	cmp	r5, #128	@ 0x80
 802ab00:	d1f7      	bne.n	802aaf2 <_reclaim_reent+0x16>
 802ab02:	69e3      	ldr	r3, [r4, #28]
 802ab04:	4620      	mov	r0, r4
 802ab06:	68d9      	ldr	r1, [r3, #12]
 802ab08:	f000 fec8 	bl	802b89c <_free_r>
 802ab0c:	69e3      	ldr	r3, [r4, #28]
 802ab0e:	6819      	ldr	r1, [r3, #0]
 802ab10:	b111      	cbz	r1, 802ab18 <_reclaim_reent+0x3c>
 802ab12:	4620      	mov	r0, r4
 802ab14:	f000 fec2 	bl	802b89c <_free_r>
 802ab18:	6961      	ldr	r1, [r4, #20]
 802ab1a:	b111      	cbz	r1, 802ab22 <_reclaim_reent+0x46>
 802ab1c:	4620      	mov	r0, r4
 802ab1e:	f000 febd 	bl	802b89c <_free_r>
 802ab22:	69e1      	ldr	r1, [r4, #28]
 802ab24:	b111      	cbz	r1, 802ab2c <_reclaim_reent+0x50>
 802ab26:	4620      	mov	r0, r4
 802ab28:	f000 feb8 	bl	802b89c <_free_r>
 802ab2c:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 802ab2e:	b111      	cbz	r1, 802ab36 <_reclaim_reent+0x5a>
 802ab30:	4620      	mov	r0, r4
 802ab32:	f000 feb3 	bl	802b89c <_free_r>
 802ab36:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802ab38:	b111      	cbz	r1, 802ab40 <_reclaim_reent+0x64>
 802ab3a:	4620      	mov	r0, r4
 802ab3c:	f000 feae 	bl	802b89c <_free_r>
 802ab40:	6ba1      	ldr	r1, [r4, #56]	@ 0x38
 802ab42:	b111      	cbz	r1, 802ab4a <_reclaim_reent+0x6e>
 802ab44:	4620      	mov	r0, r4
 802ab46:	f000 fea9 	bl	802b89c <_free_r>
 802ab4a:	6ca1      	ldr	r1, [r4, #72]	@ 0x48
 802ab4c:	b111      	cbz	r1, 802ab54 <_reclaim_reent+0x78>
 802ab4e:	4620      	mov	r0, r4
 802ab50:	f000 fea4 	bl	802b89c <_free_r>
 802ab54:	6c61      	ldr	r1, [r4, #68]	@ 0x44
 802ab56:	b111      	cbz	r1, 802ab5e <_reclaim_reent+0x82>
 802ab58:	4620      	mov	r0, r4
 802ab5a:	f000 fe9f 	bl	802b89c <_free_r>
 802ab5e:	6ae1      	ldr	r1, [r4, #44]	@ 0x2c
 802ab60:	b111      	cbz	r1, 802ab68 <_reclaim_reent+0x8c>
 802ab62:	4620      	mov	r0, r4
 802ab64:	f000 fe9a 	bl	802b89c <_free_r>
 802ab68:	6a23      	ldr	r3, [r4, #32]
 802ab6a:	b14b      	cbz	r3, 802ab80 <_reclaim_reent+0xa4>
 802ab6c:	4620      	mov	r0, r4
 802ab6e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 802ab72:	4718      	bx	r3
 802ab74:	680e      	ldr	r6, [r1, #0]
 802ab76:	4620      	mov	r0, r4
 802ab78:	f000 fe90 	bl	802b89c <_free_r>
 802ab7c:	4631      	mov	r1, r6
 802ab7e:	e7bb      	b.n	802aaf8 <_reclaim_reent+0x1c>
 802ab80:	bd70      	pop	{r4, r5, r6, pc}
 802ab82:	bf00      	nop
 802ab84:	240001d4 	.word	0x240001d4

0802ab88 <_lseek_r>:
 802ab88:	b538      	push	{r3, r4, r5, lr}
 802ab8a:	4d07      	ldr	r5, [pc, #28]	@ (802aba8 <_lseek_r+0x20>)
 802ab8c:	4604      	mov	r4, r0
 802ab8e:	4608      	mov	r0, r1
 802ab90:	4611      	mov	r1, r2
 802ab92:	2200      	movs	r2, #0
 802ab94:	602a      	str	r2, [r5, #0]
 802ab96:	461a      	mov	r2, r3
 802ab98:	f7d9 faf1 	bl	800417e <_lseek>
 802ab9c:	1c43      	adds	r3, r0, #1
 802ab9e:	d102      	bne.n	802aba6 <_lseek_r+0x1e>
 802aba0:	682b      	ldr	r3, [r5, #0]
 802aba2:	b103      	cbz	r3, 802aba6 <_lseek_r+0x1e>
 802aba4:	6023      	str	r3, [r4, #0]
 802aba6:	bd38      	pop	{r3, r4, r5, pc}
 802aba8:	2402b260 	.word	0x2402b260

0802abac <_read_r>:
 802abac:	b538      	push	{r3, r4, r5, lr}
 802abae:	4d07      	ldr	r5, [pc, #28]	@ (802abcc <_read_r+0x20>)
 802abb0:	4604      	mov	r4, r0
 802abb2:	4608      	mov	r0, r1
 802abb4:	4611      	mov	r1, r2
 802abb6:	2200      	movs	r2, #0
 802abb8:	602a      	str	r2, [r5, #0]
 802abba:	461a      	mov	r2, r3
 802abbc:	f7d9 fa7f 	bl	80040be <_read>
 802abc0:	1c43      	adds	r3, r0, #1
 802abc2:	d102      	bne.n	802abca <_read_r+0x1e>
 802abc4:	682b      	ldr	r3, [r5, #0]
 802abc6:	b103      	cbz	r3, 802abca <_read_r+0x1e>
 802abc8:	6023      	str	r3, [r4, #0]
 802abca:	bd38      	pop	{r3, r4, r5, pc}
 802abcc:	2402b260 	.word	0x2402b260

0802abd0 <_sbrk_r>:
 802abd0:	b538      	push	{r3, r4, r5, lr}
 802abd2:	4d06      	ldr	r5, [pc, #24]	@ (802abec <_sbrk_r+0x1c>)
 802abd4:	2300      	movs	r3, #0
 802abd6:	4604      	mov	r4, r0
 802abd8:	4608      	mov	r0, r1
 802abda:	602b      	str	r3, [r5, #0]
 802abdc:	f7d9 fadc 	bl	8004198 <_sbrk>
 802abe0:	1c43      	adds	r3, r0, #1
 802abe2:	d102      	bne.n	802abea <_sbrk_r+0x1a>
 802abe4:	682b      	ldr	r3, [r5, #0]
 802abe6:	b103      	cbz	r3, 802abea <_sbrk_r+0x1a>
 802abe8:	6023      	str	r3, [r4, #0]
 802abea:	bd38      	pop	{r3, r4, r5, pc}
 802abec:	2402b260 	.word	0x2402b260

0802abf0 <_write_r>:
 802abf0:	b538      	push	{r3, r4, r5, lr}
 802abf2:	4d07      	ldr	r5, [pc, #28]	@ (802ac10 <_write_r+0x20>)
 802abf4:	4604      	mov	r4, r0
 802abf6:	4608      	mov	r0, r1
 802abf8:	4611      	mov	r1, r2
 802abfa:	2200      	movs	r2, #0
 802abfc:	602a      	str	r2, [r5, #0]
 802abfe:	461a      	mov	r2, r3
 802ac00:	f7d9 fa7a 	bl	80040f8 <_write>
 802ac04:	1c43      	adds	r3, r0, #1
 802ac06:	d102      	bne.n	802ac0e <_write_r+0x1e>
 802ac08:	682b      	ldr	r3, [r5, #0]
 802ac0a:	b103      	cbz	r3, 802ac0e <_write_r+0x1e>
 802ac0c:	6023      	str	r3, [r4, #0]
 802ac0e:	bd38      	pop	{r3, r4, r5, pc}
 802ac10:	2402b260 	.word	0x2402b260

0802ac14 <__errno>:
 802ac14:	4b01      	ldr	r3, [pc, #4]	@ (802ac1c <__errno+0x8>)
 802ac16:	6818      	ldr	r0, [r3, #0]
 802ac18:	4770      	bx	lr
 802ac1a:	bf00      	nop
 802ac1c:	240001d4 	.word	0x240001d4

0802ac20 <__libc_init_array>:
 802ac20:	b570      	push	{r4, r5, r6, lr}
 802ac22:	4d0d      	ldr	r5, [pc, #52]	@ (802ac58 <__libc_init_array+0x38>)
 802ac24:	4c0d      	ldr	r4, [pc, #52]	@ (802ac5c <__libc_init_array+0x3c>)
 802ac26:	1b64      	subs	r4, r4, r5
 802ac28:	10a4      	asrs	r4, r4, #2
 802ac2a:	2600      	movs	r6, #0
 802ac2c:	42a6      	cmp	r6, r4
 802ac2e:	d109      	bne.n	802ac44 <__libc_init_array+0x24>
 802ac30:	4d0b      	ldr	r5, [pc, #44]	@ (802ac60 <__libc_init_array+0x40>)
 802ac32:	4c0c      	ldr	r4, [pc, #48]	@ (802ac64 <__libc_init_array+0x44>)
 802ac34:	f002 fac8 	bl	802d1c8 <_init>
 802ac38:	1b64      	subs	r4, r4, r5
 802ac3a:	10a4      	asrs	r4, r4, #2
 802ac3c:	2600      	movs	r6, #0
 802ac3e:	42a6      	cmp	r6, r4
 802ac40:	d105      	bne.n	802ac4e <__libc_init_array+0x2e>
 802ac42:	bd70      	pop	{r4, r5, r6, pc}
 802ac44:	f855 3b04 	ldr.w	r3, [r5], #4
 802ac48:	4798      	blx	r3
 802ac4a:	3601      	adds	r6, #1
 802ac4c:	e7ee      	b.n	802ac2c <__libc_init_array+0xc>
 802ac4e:	f855 3b04 	ldr.w	r3, [r5], #4
 802ac52:	4798      	blx	r3
 802ac54:	3601      	adds	r6, #1
 802ac56:	e7f2      	b.n	802ac3e <__libc_init_array+0x1e>
 802ac58:	08031ff4 	.word	0x08031ff4
 802ac5c:	08031ff4 	.word	0x08031ff4
 802ac60:	08031ff4 	.word	0x08031ff4
 802ac64:	08031ff8 	.word	0x08031ff8

0802ac68 <__retarget_lock_init_recursive>:
 802ac68:	4770      	bx	lr

0802ac6a <__retarget_lock_acquire_recursive>:
 802ac6a:	4770      	bx	lr

0802ac6c <__retarget_lock_release_recursive>:
 802ac6c:	4770      	bx	lr

0802ac6e <memcpy>:
 802ac6e:	440a      	add	r2, r1
 802ac70:	4291      	cmp	r1, r2
 802ac72:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
 802ac76:	d100      	bne.n	802ac7a <memcpy+0xc>
 802ac78:	4770      	bx	lr
 802ac7a:	b510      	push	{r4, lr}
 802ac7c:	f811 4b01 	ldrb.w	r4, [r1], #1
 802ac80:	f803 4f01 	strb.w	r4, [r3, #1]!
 802ac84:	4291      	cmp	r1, r2
 802ac86:	d1f9      	bne.n	802ac7c <memcpy+0xe>
 802ac88:	bd10      	pop	{r4, pc}
 802ac8a:	0000      	movs	r0, r0
 802ac8c:	0000      	movs	r0, r0
	...

0802ac90 <nan>:
 802ac90:	ed9f 0b01 	vldr	d0, [pc, #4]	@ 802ac98 <nan+0x8>
 802ac94:	4770      	bx	lr
 802ac96:	bf00      	nop
 802ac98:	00000000 	.word	0x00000000
 802ac9c:	7ff80000 	.word	0x7ff80000

0802aca0 <__assert_func>:
 802aca0:	b51f      	push	{r0, r1, r2, r3, r4, lr}
 802aca2:	4614      	mov	r4, r2
 802aca4:	461a      	mov	r2, r3
 802aca6:	4b09      	ldr	r3, [pc, #36]	@ (802accc <__assert_func+0x2c>)
 802aca8:	681b      	ldr	r3, [r3, #0]
 802acaa:	4605      	mov	r5, r0
 802acac:	68d8      	ldr	r0, [r3, #12]
 802acae:	b954      	cbnz	r4, 802acc6 <__assert_func+0x26>
 802acb0:	4b07      	ldr	r3, [pc, #28]	@ (802acd0 <__assert_func+0x30>)
 802acb2:	461c      	mov	r4, r3
 802acb4:	e9cd 3401 	strd	r3, r4, [sp, #4]
 802acb8:	9100      	str	r1, [sp, #0]
 802acba:	462b      	mov	r3, r5
 802acbc:	4905      	ldr	r1, [pc, #20]	@ (802acd4 <__assert_func+0x34>)
 802acbe:	f002 f98d 	bl	802cfdc <fiprintf>
 802acc2:	f002 fa21 	bl	802d108 <abort>
 802acc6:	4b04      	ldr	r3, [pc, #16]	@ (802acd8 <__assert_func+0x38>)
 802acc8:	e7f4      	b.n	802acb4 <__assert_func+0x14>
 802acca:	bf00      	nop
 802accc:	240001d4 	.word	0x240001d4
 802acd0:	08031da8 	.word	0x08031da8
 802acd4:	08031d7a 	.word	0x08031d7a
 802acd8:	08031d6d 	.word	0x08031d6d

0802acdc <quorem>:
 802acdc:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ace0:	6903      	ldr	r3, [r0, #16]
 802ace2:	690c      	ldr	r4, [r1, #16]
 802ace4:	42a3      	cmp	r3, r4
 802ace6:	4607      	mov	r7, r0
 802ace8:	db7e      	blt.n	802ade8 <quorem+0x10c>
 802acea:	3c01      	subs	r4, #1
 802acec:	f101 0814 	add.w	r8, r1, #20
 802acf0:	00a3      	lsls	r3, r4, #2
 802acf2:	f100 0514 	add.w	r5, r0, #20
 802acf6:	9300      	str	r3, [sp, #0]
 802acf8:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802acfc:	9301      	str	r3, [sp, #4]
 802acfe:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
 802ad02:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802ad06:	3301      	adds	r3, #1
 802ad08:	429a      	cmp	r2, r3
 802ad0a:	eb08 0984 	add.w	r9, r8, r4, lsl #2
 802ad0e:	fbb2 f6f3 	udiv	r6, r2, r3
 802ad12:	d32e      	bcc.n	802ad72 <quorem+0x96>
 802ad14:	f04f 0a00 	mov.w	sl, #0
 802ad18:	46c4      	mov	ip, r8
 802ad1a:	46ae      	mov	lr, r5
 802ad1c:	46d3      	mov	fp, sl
 802ad1e:	f85c 3b04 	ldr.w	r3, [ip], #4
 802ad22:	b298      	uxth	r0, r3
 802ad24:	fb06 a000 	mla	r0, r6, r0, sl
 802ad28:	0c02      	lsrs	r2, r0, #16
 802ad2a:	0c1b      	lsrs	r3, r3, #16
 802ad2c:	fb06 2303 	mla	r3, r6, r3, r2
 802ad30:	f8de 2000 	ldr.w	r2, [lr]
 802ad34:	b280      	uxth	r0, r0
 802ad36:	b292      	uxth	r2, r2
 802ad38:	1a12      	subs	r2, r2, r0
 802ad3a:	445a      	add	r2, fp
 802ad3c:	f8de 0000 	ldr.w	r0, [lr]
 802ad40:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802ad44:	b29b      	uxth	r3, r3
 802ad46:	ebc3 4322 	rsb	r3, r3, r2, asr #16
 802ad4a:	eb03 4310 	add.w	r3, r3, r0, lsr #16
 802ad4e:	b292      	uxth	r2, r2
 802ad50:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 802ad54:	45e1      	cmp	r9, ip
 802ad56:	f84e 2b04 	str.w	r2, [lr], #4
 802ad5a:	ea4f 4b23 	mov.w	fp, r3, asr #16
 802ad5e:	d2de      	bcs.n	802ad1e <quorem+0x42>
 802ad60:	9b00      	ldr	r3, [sp, #0]
 802ad62:	58eb      	ldr	r3, [r5, r3]
 802ad64:	b92b      	cbnz	r3, 802ad72 <quorem+0x96>
 802ad66:	9b01      	ldr	r3, [sp, #4]
 802ad68:	3b04      	subs	r3, #4
 802ad6a:	429d      	cmp	r5, r3
 802ad6c:	461a      	mov	r2, r3
 802ad6e:	d32f      	bcc.n	802add0 <quorem+0xf4>
 802ad70:	613c      	str	r4, [r7, #16]
 802ad72:	4638      	mov	r0, r7
 802ad74:	f001 fbec 	bl	802c550 <__mcmp>
 802ad78:	2800      	cmp	r0, #0
 802ad7a:	db25      	blt.n	802adc8 <quorem+0xec>
 802ad7c:	4629      	mov	r1, r5
 802ad7e:	2000      	movs	r0, #0
 802ad80:	f858 2b04 	ldr.w	r2, [r8], #4
 802ad84:	f8d1 c000 	ldr.w	ip, [r1]
 802ad88:	fa1f fe82 	uxth.w	lr, r2
 802ad8c:	fa1f f38c 	uxth.w	r3, ip
 802ad90:	eba3 030e 	sub.w	r3, r3, lr
 802ad94:	4403      	add	r3, r0
 802ad96:	0c12      	lsrs	r2, r2, #16
 802ad98:	ebc2 4223 	rsb	r2, r2, r3, asr #16
 802ad9c:	eb02 421c 	add.w	r2, r2, ip, lsr #16
 802ada0:	b29b      	uxth	r3, r3
 802ada2:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 802ada6:	45c1      	cmp	r9, r8
 802ada8:	f841 3b04 	str.w	r3, [r1], #4
 802adac:	ea4f 4022 	mov.w	r0, r2, asr #16
 802adb0:	d2e6      	bcs.n	802ad80 <quorem+0xa4>
 802adb2:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802adb6:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802adba:	b922      	cbnz	r2, 802adc6 <quorem+0xea>
 802adbc:	3b04      	subs	r3, #4
 802adbe:	429d      	cmp	r5, r3
 802adc0:	461a      	mov	r2, r3
 802adc2:	d30b      	bcc.n	802addc <quorem+0x100>
 802adc4:	613c      	str	r4, [r7, #16]
 802adc6:	3601      	adds	r6, #1
 802adc8:	4630      	mov	r0, r6
 802adca:	b003      	add	sp, #12
 802adcc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802add0:	6812      	ldr	r2, [r2, #0]
 802add2:	3b04      	subs	r3, #4
 802add4:	2a00      	cmp	r2, #0
 802add6:	d1cb      	bne.n	802ad70 <quorem+0x94>
 802add8:	3c01      	subs	r4, #1
 802adda:	e7c6      	b.n	802ad6a <quorem+0x8e>
 802addc:	6812      	ldr	r2, [r2, #0]
 802adde:	3b04      	subs	r3, #4
 802ade0:	2a00      	cmp	r2, #0
 802ade2:	d1ef      	bne.n	802adc4 <quorem+0xe8>
 802ade4:	3c01      	subs	r4, #1
 802ade6:	e7ea      	b.n	802adbe <quorem+0xe2>
 802ade8:	2000      	movs	r0, #0
 802adea:	e7ee      	b.n	802adca <quorem+0xee>
 802adec:	0000      	movs	r0, r0
	...

0802adf0 <_dtoa_r>:
 802adf0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802adf4:	ed2d 8b02 	vpush	{d8}
 802adf8:	69c7      	ldr	r7, [r0, #28]
 802adfa:	b091      	sub	sp, #68	@ 0x44
 802adfc:	ed8d 0b02 	vstr	d0, [sp, #8]
 802ae00:	ec55 4b10 	vmov	r4, r5, d0
 802ae04:	9e1c      	ldr	r6, [sp, #112]	@ 0x70
 802ae06:	9107      	str	r1, [sp, #28]
 802ae08:	4681      	mov	r9, r0
 802ae0a:	9209      	str	r2, [sp, #36]	@ 0x24
 802ae0c:	930d      	str	r3, [sp, #52]	@ 0x34
 802ae0e:	b97f      	cbnz	r7, 802ae30 <_dtoa_r+0x40>
 802ae10:	2010      	movs	r0, #16
 802ae12:	f7fe f8bb 	bl	8028f8c <malloc>
 802ae16:	4602      	mov	r2, r0
 802ae18:	f8c9 001c 	str.w	r0, [r9, #28]
 802ae1c:	b920      	cbnz	r0, 802ae28 <_dtoa_r+0x38>
 802ae1e:	4ba0      	ldr	r3, [pc, #640]	@ (802b0a0 <_dtoa_r+0x2b0>)
 802ae20:	21ef      	movs	r1, #239	@ 0xef
 802ae22:	48a0      	ldr	r0, [pc, #640]	@ (802b0a4 <_dtoa_r+0x2b4>)
 802ae24:	f7ff ff3c 	bl	802aca0 <__assert_func>
 802ae28:	e9c0 7701 	strd	r7, r7, [r0, #4]
 802ae2c:	6007      	str	r7, [r0, #0]
 802ae2e:	60c7      	str	r7, [r0, #12]
 802ae30:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802ae34:	6819      	ldr	r1, [r3, #0]
 802ae36:	b159      	cbz	r1, 802ae50 <_dtoa_r+0x60>
 802ae38:	685a      	ldr	r2, [r3, #4]
 802ae3a:	604a      	str	r2, [r1, #4]
 802ae3c:	2301      	movs	r3, #1
 802ae3e:	4093      	lsls	r3, r2
 802ae40:	608b      	str	r3, [r1, #8]
 802ae42:	4648      	mov	r0, r9
 802ae44:	f001 f900 	bl	802c048 <_Bfree>
 802ae48:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802ae4c:	2200      	movs	r2, #0
 802ae4e:	601a      	str	r2, [r3, #0]
 802ae50:	1e2b      	subs	r3, r5, #0
 802ae52:	bfbb      	ittet	lt
 802ae54:	f023 4300 	biclt.w	r3, r3, #2147483648	@ 0x80000000
 802ae58:	9303      	strlt	r3, [sp, #12]
 802ae5a:	2300      	movge	r3, #0
 802ae5c:	2201      	movlt	r2, #1
 802ae5e:	bfac      	ite	ge
 802ae60:	6033      	strge	r3, [r6, #0]
 802ae62:	6032      	strlt	r2, [r6, #0]
 802ae64:	4b90      	ldr	r3, [pc, #576]	@ (802b0a8 <_dtoa_r+0x2b8>)
 802ae66:	9e03      	ldr	r6, [sp, #12]
 802ae68:	43b3      	bics	r3, r6
 802ae6a:	d110      	bne.n	802ae8e <_dtoa_r+0x9e>
 802ae6c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802ae6e:	f242 730f 	movw	r3, #9999	@ 0x270f
 802ae72:	6013      	str	r3, [r2, #0]
 802ae74:	f3c6 0313 	ubfx	r3, r6, #0, #20
 802ae78:	4323      	orrs	r3, r4
 802ae7a:	f000 84de 	beq.w	802b83a <_dtoa_r+0xa4a>
 802ae7e:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802ae80:	4f8a      	ldr	r7, [pc, #552]	@ (802b0ac <_dtoa_r+0x2bc>)
 802ae82:	2b00      	cmp	r3, #0
 802ae84:	f000 84e0 	beq.w	802b848 <_dtoa_r+0xa58>
 802ae88:	1cfb      	adds	r3, r7, #3
 802ae8a:	f000 bcdb 	b.w	802b844 <_dtoa_r+0xa54>
 802ae8e:	ed9d 8b02 	vldr	d8, [sp, #8]
 802ae92:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802ae96:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802ae9a:	d10a      	bne.n	802aeb2 <_dtoa_r+0xc2>
 802ae9c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802ae9e:	2301      	movs	r3, #1
 802aea0:	6013      	str	r3, [r2, #0]
 802aea2:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802aea4:	b113      	cbz	r3, 802aeac <_dtoa_r+0xbc>
 802aea6:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802aea8:	4b81      	ldr	r3, [pc, #516]	@ (802b0b0 <_dtoa_r+0x2c0>)
 802aeaa:	6013      	str	r3, [r2, #0]
 802aeac:	4f81      	ldr	r7, [pc, #516]	@ (802b0b4 <_dtoa_r+0x2c4>)
 802aeae:	f000 bccb 	b.w	802b848 <_dtoa_r+0xa58>
 802aeb2:	aa0e      	add	r2, sp, #56	@ 0x38
 802aeb4:	a90f      	add	r1, sp, #60	@ 0x3c
 802aeb6:	4648      	mov	r0, r9
 802aeb8:	eeb0 0b48 	vmov.f64	d0, d8
 802aebc:	f001 fc68 	bl	802c790 <__d2b>
 802aec0:	f3c6 530a 	ubfx	r3, r6, #20, #11
 802aec4:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802aec6:	9001      	str	r0, [sp, #4]
 802aec8:	2b00      	cmp	r3, #0
 802aeca:	d045      	beq.n	802af58 <_dtoa_r+0x168>
 802aecc:	eeb0 7b48 	vmov.f64	d7, d8
 802aed0:	ee18 1a90 	vmov	r1, s17
 802aed4:	f3c1 0113 	ubfx	r1, r1, #0, #20
 802aed8:	f041 517f 	orr.w	r1, r1, #1069547520	@ 0x3fc00000
 802aedc:	f441 1140 	orr.w	r1, r1, #3145728	@ 0x300000
 802aee0:	f2a3 33ff 	subw	r3, r3, #1023	@ 0x3ff
 802aee4:	2500      	movs	r5, #0
 802aee6:	ee07 1a90 	vmov	s15, r1
 802aeea:	eeb7 6b08 	vmov.f64	d6, #120	@ 0x3fc00000  1.5
 802aeee:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802b088 <_dtoa_r+0x298>
 802aef2:	ee37 7b46 	vsub.f64	d7, d7, d6
 802aef6:	ed9f 6b66 	vldr	d6, [pc, #408]	@ 802b090 <_dtoa_r+0x2a0>
 802aefa:	eea7 6b05 	vfma.f64	d6, d7, d5
 802aefe:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802b098 <_dtoa_r+0x2a8>
 802af02:	ee07 3a90 	vmov	s15, r3
 802af06:	eeb8 4be7 	vcvt.f64.s32	d4, s15
 802af0a:	eeb0 7b46 	vmov.f64	d7, d6
 802af0e:	eea4 7b05 	vfma.f64	d7, d4, d5
 802af12:	eefd 6bc7 	vcvt.s32.f64	s13, d7
 802af16:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 802af1a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802af1e:	ee16 8a90 	vmov	r8, s13
 802af22:	d508      	bpl.n	802af36 <_dtoa_r+0x146>
 802af24:	eeb8 6be6 	vcvt.f64.s32	d6, s13
 802af28:	eeb4 6b47 	vcmp.f64	d6, d7
 802af2c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802af30:	bf18      	it	ne
 802af32:	f108 38ff 	addne.w	r8, r8, #4294967295	@ 0xffffffff
 802af36:	f1b8 0f16 	cmp.w	r8, #22
 802af3a:	d82b      	bhi.n	802af94 <_dtoa_r+0x1a4>
 802af3c:	495e      	ldr	r1, [pc, #376]	@ (802b0b8 <_dtoa_r+0x2c8>)
 802af3e:	eb01 01c8 	add.w	r1, r1, r8, lsl #3
 802af42:	ed91 7b00 	vldr	d7, [r1]
 802af46:	eeb4 8bc7 	vcmpe.f64	d8, d7
 802af4a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802af4e:	d501      	bpl.n	802af54 <_dtoa_r+0x164>
 802af50:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802af54:	2100      	movs	r1, #0
 802af56:	e01e      	b.n	802af96 <_dtoa_r+0x1a6>
 802af58:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802af5a:	4413      	add	r3, r2
 802af5c:	f203 4132 	addw	r1, r3, #1074	@ 0x432
 802af60:	2920      	cmp	r1, #32
 802af62:	bfc1      	itttt	gt
 802af64:	f1c1 0140 	rsbgt	r1, r1, #64	@ 0x40
 802af68:	408e      	lslgt	r6, r1
 802af6a:	f203 4112 	addwgt	r1, r3, #1042	@ 0x412
 802af6e:	fa24 f101 	lsrgt.w	r1, r4, r1
 802af72:	bfd6      	itet	le
 802af74:	f1c1 0120 	rsble	r1, r1, #32
 802af78:	4331      	orrgt	r1, r6
 802af7a:	fa04 f101 	lslle.w	r1, r4, r1
 802af7e:	ee07 1a90 	vmov	s15, r1
 802af82:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802af86:	3b01      	subs	r3, #1
 802af88:	ee17 1a90 	vmov	r1, s15
 802af8c:	2501      	movs	r5, #1
 802af8e:	f1a1 71f8 	sub.w	r1, r1, #32505856	@ 0x1f00000
 802af92:	e7a8      	b.n	802aee6 <_dtoa_r+0xf6>
 802af94:	2101      	movs	r1, #1
 802af96:	1ad2      	subs	r2, r2, r3
 802af98:	1e53      	subs	r3, r2, #1
 802af9a:	9306      	str	r3, [sp, #24]
 802af9c:	bf45      	ittet	mi
 802af9e:	f1c2 0301 	rsbmi	r3, r2, #1
 802afa2:	9305      	strmi	r3, [sp, #20]
 802afa4:	2300      	movpl	r3, #0
 802afa6:	2300      	movmi	r3, #0
 802afa8:	bf4c      	ite	mi
 802afaa:	9306      	strmi	r3, [sp, #24]
 802afac:	9305      	strpl	r3, [sp, #20]
 802afae:	f1b8 0f00 	cmp.w	r8, #0
 802afb2:	910c      	str	r1, [sp, #48]	@ 0x30
 802afb4:	db18      	blt.n	802afe8 <_dtoa_r+0x1f8>
 802afb6:	9b06      	ldr	r3, [sp, #24]
 802afb8:	f8cd 8028 	str.w	r8, [sp, #40]	@ 0x28
 802afbc:	4443      	add	r3, r8
 802afbe:	9306      	str	r3, [sp, #24]
 802afc0:	2300      	movs	r3, #0
 802afc2:	9a07      	ldr	r2, [sp, #28]
 802afc4:	2a09      	cmp	r2, #9
 802afc6:	d849      	bhi.n	802b05c <_dtoa_r+0x26c>
 802afc8:	2a05      	cmp	r2, #5
 802afca:	bfc4      	itt	gt
 802afcc:	3a04      	subgt	r2, #4
 802afce:	9207      	strgt	r2, [sp, #28]
 802afd0:	9a07      	ldr	r2, [sp, #28]
 802afd2:	f1a2 0202 	sub.w	r2, r2, #2
 802afd6:	bfcc      	ite	gt
 802afd8:	2400      	movgt	r4, #0
 802afda:	2401      	movle	r4, #1
 802afdc:	2a03      	cmp	r2, #3
 802afde:	d848      	bhi.n	802b072 <_dtoa_r+0x282>
 802afe0:	e8df f002 	tbb	[pc, r2]
 802afe4:	3a2c2e0b 	.word	0x3a2c2e0b
 802afe8:	9b05      	ldr	r3, [sp, #20]
 802afea:	2200      	movs	r2, #0
 802afec:	eba3 0308 	sub.w	r3, r3, r8
 802aff0:	9305      	str	r3, [sp, #20]
 802aff2:	920a      	str	r2, [sp, #40]	@ 0x28
 802aff4:	f1c8 0300 	rsb	r3, r8, #0
 802aff8:	e7e3      	b.n	802afc2 <_dtoa_r+0x1d2>
 802affa:	2200      	movs	r2, #0
 802affc:	9208      	str	r2, [sp, #32]
 802affe:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802b000:	2a00      	cmp	r2, #0
 802b002:	dc39      	bgt.n	802b078 <_dtoa_r+0x288>
 802b004:	f04f 0b01 	mov.w	fp, #1
 802b008:	46da      	mov	sl, fp
 802b00a:	465a      	mov	r2, fp
 802b00c:	f8cd b024 	str.w	fp, [sp, #36]	@ 0x24
 802b010:	f8d9 701c 	ldr.w	r7, [r9, #28]
 802b014:	2100      	movs	r1, #0
 802b016:	2004      	movs	r0, #4
 802b018:	f100 0614 	add.w	r6, r0, #20
 802b01c:	4296      	cmp	r6, r2
 802b01e:	d930      	bls.n	802b082 <_dtoa_r+0x292>
 802b020:	6079      	str	r1, [r7, #4]
 802b022:	4648      	mov	r0, r9
 802b024:	9304      	str	r3, [sp, #16]
 802b026:	f000 ffcf 	bl	802bfc8 <_Balloc>
 802b02a:	9b04      	ldr	r3, [sp, #16]
 802b02c:	4607      	mov	r7, r0
 802b02e:	2800      	cmp	r0, #0
 802b030:	d146      	bne.n	802b0c0 <_dtoa_r+0x2d0>
 802b032:	4b22      	ldr	r3, [pc, #136]	@ (802b0bc <_dtoa_r+0x2cc>)
 802b034:	4602      	mov	r2, r0
 802b036:	f240 11af 	movw	r1, #431	@ 0x1af
 802b03a:	e6f2      	b.n	802ae22 <_dtoa_r+0x32>
 802b03c:	2201      	movs	r2, #1
 802b03e:	e7dd      	b.n	802affc <_dtoa_r+0x20c>
 802b040:	2200      	movs	r2, #0
 802b042:	9208      	str	r2, [sp, #32]
 802b044:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802b046:	eb08 0b02 	add.w	fp, r8, r2
 802b04a:	f10b 0a01 	add.w	sl, fp, #1
 802b04e:	4652      	mov	r2, sl
 802b050:	2a01      	cmp	r2, #1
 802b052:	bfb8      	it	lt
 802b054:	2201      	movlt	r2, #1
 802b056:	e7db      	b.n	802b010 <_dtoa_r+0x220>
 802b058:	2201      	movs	r2, #1
 802b05a:	e7f2      	b.n	802b042 <_dtoa_r+0x252>
 802b05c:	2401      	movs	r4, #1
 802b05e:	2200      	movs	r2, #0
 802b060:	e9cd 2407 	strd	r2, r4, [sp, #28]
 802b064:	f04f 3bff 	mov.w	fp, #4294967295	@ 0xffffffff
 802b068:	2100      	movs	r1, #0
 802b06a:	46da      	mov	sl, fp
 802b06c:	2212      	movs	r2, #18
 802b06e:	9109      	str	r1, [sp, #36]	@ 0x24
 802b070:	e7ce      	b.n	802b010 <_dtoa_r+0x220>
 802b072:	2201      	movs	r2, #1
 802b074:	9208      	str	r2, [sp, #32]
 802b076:	e7f5      	b.n	802b064 <_dtoa_r+0x274>
 802b078:	f8dd b024 	ldr.w	fp, [sp, #36]	@ 0x24
 802b07c:	46da      	mov	sl, fp
 802b07e:	465a      	mov	r2, fp
 802b080:	e7c6      	b.n	802b010 <_dtoa_r+0x220>
 802b082:	3101      	adds	r1, #1
 802b084:	0040      	lsls	r0, r0, #1
 802b086:	e7c7      	b.n	802b018 <_dtoa_r+0x228>
 802b088:	636f4361 	.word	0x636f4361
 802b08c:	3fd287a7 	.word	0x3fd287a7
 802b090:	8b60c8b3 	.word	0x8b60c8b3
 802b094:	3fc68a28 	.word	0x3fc68a28
 802b098:	509f79fb 	.word	0x509f79fb
 802b09c:	3fd34413 	.word	0x3fd34413
 802b0a0:	08031b6e 	.word	0x08031b6e
 802b0a4:	08031db6 	.word	0x08031db6
 802b0a8:	7ff00000 	.word	0x7ff00000
 802b0ac:	08031db2 	.word	0x08031db2
 802b0b0:	08031d42 	.word	0x08031d42
 802b0b4:	08031d41 	.word	0x08031d41
 802b0b8:	08031f10 	.word	0x08031f10
 802b0bc:	08031e0e 	.word	0x08031e0e
 802b0c0:	f8d9 201c 	ldr.w	r2, [r9, #28]
 802b0c4:	f1ba 0f0e 	cmp.w	sl, #14
 802b0c8:	6010      	str	r0, [r2, #0]
 802b0ca:	d86f      	bhi.n	802b1ac <_dtoa_r+0x3bc>
 802b0cc:	2c00      	cmp	r4, #0
 802b0ce:	d06d      	beq.n	802b1ac <_dtoa_r+0x3bc>
 802b0d0:	f1b8 0f00 	cmp.w	r8, #0
 802b0d4:	f340 80c2 	ble.w	802b25c <_dtoa_r+0x46c>
 802b0d8:	4aca      	ldr	r2, [pc, #808]	@ (802b404 <_dtoa_r+0x614>)
 802b0da:	f008 010f 	and.w	r1, r8, #15
 802b0de:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802b0e2:	f418 7f80 	tst.w	r8, #256	@ 0x100
 802b0e6:	ed92 7b00 	vldr	d7, [r2]
 802b0ea:	ea4f 1128 	mov.w	r1, r8, asr #4
 802b0ee:	f000 80a9 	beq.w	802b244 <_dtoa_r+0x454>
 802b0f2:	4ac5      	ldr	r2, [pc, #788]	@ (802b408 <_dtoa_r+0x618>)
 802b0f4:	ed92 6b08 	vldr	d6, [r2, #32]
 802b0f8:	ee88 6b06 	vdiv.f64	d6, d8, d6
 802b0fc:	ed8d 6b02 	vstr	d6, [sp, #8]
 802b100:	f001 010f 	and.w	r1, r1, #15
 802b104:	2203      	movs	r2, #3
 802b106:	48c0      	ldr	r0, [pc, #768]	@ (802b408 <_dtoa_r+0x618>)
 802b108:	2900      	cmp	r1, #0
 802b10a:	f040 809d 	bne.w	802b248 <_dtoa_r+0x458>
 802b10e:	ed9d 6b02 	vldr	d6, [sp, #8]
 802b112:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802b116:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b11a:	990c      	ldr	r1, [sp, #48]	@ 0x30
 802b11c:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b120:	2900      	cmp	r1, #0
 802b122:	f000 80c1 	beq.w	802b2a8 <_dtoa_r+0x4b8>
 802b126:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 802b12a:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802b12e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b132:	f140 80b9 	bpl.w	802b2a8 <_dtoa_r+0x4b8>
 802b136:	f1ba 0f00 	cmp.w	sl, #0
 802b13a:	f000 80b5 	beq.w	802b2a8 <_dtoa_r+0x4b8>
 802b13e:	f1bb 0f00 	cmp.w	fp, #0
 802b142:	dd31      	ble.n	802b1a8 <_dtoa_r+0x3b8>
 802b144:	eeb2 6b04 	vmov.f64	d6, #36	@ 0x41200000  10.0
 802b148:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b14c:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b150:	f108 31ff 	add.w	r1, r8, #4294967295	@ 0xffffffff
 802b154:	9104      	str	r1, [sp, #16]
 802b156:	3201      	adds	r2, #1
 802b158:	465c      	mov	r4, fp
 802b15a:	ed9d 6b02 	vldr	d6, [sp, #8]
 802b15e:	eeb1 5b0c 	vmov.f64	d5, #28	@ 0x40e00000  7.0
 802b162:	ee07 2a90 	vmov	s15, r2
 802b166:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 802b16a:	eea7 5b06 	vfma.f64	d5, d7, d6
 802b16e:	ee15 2a90 	vmov	r2, s11
 802b172:	ec51 0b15 	vmov	r0, r1, d5
 802b176:	f1a2 7150 	sub.w	r1, r2, #54525952	@ 0x3400000
 802b17a:	2c00      	cmp	r4, #0
 802b17c:	f040 8098 	bne.w	802b2b0 <_dtoa_r+0x4c0>
 802b180:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802b184:	ee36 6b47 	vsub.f64	d6, d6, d7
 802b188:	ec41 0b17 	vmov	d7, r0, r1
 802b18c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b190:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b194:	f300 8261 	bgt.w	802b65a <_dtoa_r+0x86a>
 802b198:	eeb1 7b47 	vneg.f64	d7, d7
 802b19c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b1a0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b1a4:	f100 80f5 	bmi.w	802b392 <_dtoa_r+0x5a2>
 802b1a8:	ed8d 8b02 	vstr	d8, [sp, #8]
 802b1ac:	9a0f      	ldr	r2, [sp, #60]	@ 0x3c
 802b1ae:	2a00      	cmp	r2, #0
 802b1b0:	f2c0 812c 	blt.w	802b40c <_dtoa_r+0x61c>
 802b1b4:	f1b8 0f0e 	cmp.w	r8, #14
 802b1b8:	f300 8128 	bgt.w	802b40c <_dtoa_r+0x61c>
 802b1bc:	4b91      	ldr	r3, [pc, #580]	@ (802b404 <_dtoa_r+0x614>)
 802b1be:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
 802b1c2:	ed93 6b00 	vldr	d6, [r3]
 802b1c6:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b1c8:	2b00      	cmp	r3, #0
 802b1ca:	da03      	bge.n	802b1d4 <_dtoa_r+0x3e4>
 802b1cc:	f1ba 0f00 	cmp.w	sl, #0
 802b1d0:	f340 80d2 	ble.w	802b378 <_dtoa_r+0x588>
 802b1d4:	eeb2 4b04 	vmov.f64	d4, #36	@ 0x41200000  10.0
 802b1d8:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b1dc:	463e      	mov	r6, r7
 802b1de:	ee87 5b06 	vdiv.f64	d5, d7, d6
 802b1e2:	eebd 5bc5 	vcvt.s32.f64	s10, d5
 802b1e6:	ee15 3a10 	vmov	r3, s10
 802b1ea:	3330      	adds	r3, #48	@ 0x30
 802b1ec:	f806 3b01 	strb.w	r3, [r6], #1
 802b1f0:	1bf3      	subs	r3, r6, r7
 802b1f2:	459a      	cmp	sl, r3
 802b1f4:	eeb8 3bc5 	vcvt.f64.s32	d3, s10
 802b1f8:	eea3 7b46 	vfms.f64	d7, d3, d6
 802b1fc:	f040 80f8 	bne.w	802b3f0 <_dtoa_r+0x600>
 802b200:	ee37 7b07 	vadd.f64	d7, d7, d7
 802b204:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802b208:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b20c:	f300 80dd 	bgt.w	802b3ca <_dtoa_r+0x5da>
 802b210:	eeb4 7b46 	vcmp.f64	d7, d6
 802b214:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b218:	d104      	bne.n	802b224 <_dtoa_r+0x434>
 802b21a:	ee15 3a10 	vmov	r3, s10
 802b21e:	07db      	lsls	r3, r3, #31
 802b220:	f100 80d3 	bmi.w	802b3ca <_dtoa_r+0x5da>
 802b224:	9901      	ldr	r1, [sp, #4]
 802b226:	4648      	mov	r0, r9
 802b228:	f000 ff0e 	bl	802c048 <_Bfree>
 802b22c:	2300      	movs	r3, #0
 802b22e:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802b230:	7033      	strb	r3, [r6, #0]
 802b232:	f108 0301 	add.w	r3, r8, #1
 802b236:	6013      	str	r3, [r2, #0]
 802b238:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b23a:	2b00      	cmp	r3, #0
 802b23c:	f000 8304 	beq.w	802b848 <_dtoa_r+0xa58>
 802b240:	601e      	str	r6, [r3, #0]
 802b242:	e301      	b.n	802b848 <_dtoa_r+0xa58>
 802b244:	2202      	movs	r2, #2
 802b246:	e75e      	b.n	802b106 <_dtoa_r+0x316>
 802b248:	07cc      	lsls	r4, r1, #31
 802b24a:	d504      	bpl.n	802b256 <_dtoa_r+0x466>
 802b24c:	ed90 6b00 	vldr	d6, [r0]
 802b250:	3201      	adds	r2, #1
 802b252:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b256:	1049      	asrs	r1, r1, #1
 802b258:	3008      	adds	r0, #8
 802b25a:	e755      	b.n	802b108 <_dtoa_r+0x318>
 802b25c:	d022      	beq.n	802b2a4 <_dtoa_r+0x4b4>
 802b25e:	f1c8 0100 	rsb	r1, r8, #0
 802b262:	4a68      	ldr	r2, [pc, #416]	@ (802b404 <_dtoa_r+0x614>)
 802b264:	f001 000f 	and.w	r0, r1, #15
 802b268:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
 802b26c:	ed92 7b00 	vldr	d7, [r2]
 802b270:	ee28 7b07 	vmul.f64	d7, d8, d7
 802b274:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b278:	4863      	ldr	r0, [pc, #396]	@ (802b408 <_dtoa_r+0x618>)
 802b27a:	1109      	asrs	r1, r1, #4
 802b27c:	2400      	movs	r4, #0
 802b27e:	2202      	movs	r2, #2
 802b280:	b929      	cbnz	r1, 802b28e <_dtoa_r+0x49e>
 802b282:	2c00      	cmp	r4, #0
 802b284:	f43f af49 	beq.w	802b11a <_dtoa_r+0x32a>
 802b288:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b28c:	e745      	b.n	802b11a <_dtoa_r+0x32a>
 802b28e:	07ce      	lsls	r6, r1, #31
 802b290:	d505      	bpl.n	802b29e <_dtoa_r+0x4ae>
 802b292:	ed90 6b00 	vldr	d6, [r0]
 802b296:	3201      	adds	r2, #1
 802b298:	2401      	movs	r4, #1
 802b29a:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b29e:	1049      	asrs	r1, r1, #1
 802b2a0:	3008      	adds	r0, #8
 802b2a2:	e7ed      	b.n	802b280 <_dtoa_r+0x490>
 802b2a4:	2202      	movs	r2, #2
 802b2a6:	e738      	b.n	802b11a <_dtoa_r+0x32a>
 802b2a8:	f8cd 8010 	str.w	r8, [sp, #16]
 802b2ac:	4654      	mov	r4, sl
 802b2ae:	e754      	b.n	802b15a <_dtoa_r+0x36a>
 802b2b0:	4a54      	ldr	r2, [pc, #336]	@ (802b404 <_dtoa_r+0x614>)
 802b2b2:	eb02 02c4 	add.w	r2, r2, r4, lsl #3
 802b2b6:	ed12 4b02 	vldr	d4, [r2, #-8]
 802b2ba:	9a08      	ldr	r2, [sp, #32]
 802b2bc:	ec41 0b17 	vmov	d7, r0, r1
 802b2c0:	443c      	add	r4, r7
 802b2c2:	b34a      	cbz	r2, 802b318 <_dtoa_r+0x528>
 802b2c4:	eeb6 3b00 	vmov.f64	d3, #96	@ 0x3f000000  0.5
 802b2c8:	eeb7 2b00 	vmov.f64	d2, #112	@ 0x3f800000  1.0
 802b2cc:	463e      	mov	r6, r7
 802b2ce:	ee83 5b04 	vdiv.f64	d5, d3, d4
 802b2d2:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802b2d6:	ee35 7b47 	vsub.f64	d7, d5, d7
 802b2da:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802b2de:	ee14 2a90 	vmov	r2, s9
 802b2e2:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802b2e6:	3230      	adds	r2, #48	@ 0x30
 802b2e8:	ee36 6b45 	vsub.f64	d6, d6, d5
 802b2ec:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b2f0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b2f4:	f806 2b01 	strb.w	r2, [r6], #1
 802b2f8:	d438      	bmi.n	802b36c <_dtoa_r+0x57c>
 802b2fa:	ee32 5b46 	vsub.f64	d5, d2, d6
 802b2fe:	eeb4 5bc7 	vcmpe.f64	d5, d7
 802b302:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b306:	d462      	bmi.n	802b3ce <_dtoa_r+0x5de>
 802b308:	42a6      	cmp	r6, r4
 802b30a:	f43f af4d 	beq.w	802b1a8 <_dtoa_r+0x3b8>
 802b30e:	ee27 7b03 	vmul.f64	d7, d7, d3
 802b312:	ee26 6b03 	vmul.f64	d6, d6, d3
 802b316:	e7e0      	b.n	802b2da <_dtoa_r+0x4ea>
 802b318:	4621      	mov	r1, r4
 802b31a:	463e      	mov	r6, r7
 802b31c:	ee27 7b04 	vmul.f64	d7, d7, d4
 802b320:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802b324:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802b328:	ee14 2a90 	vmov	r2, s9
 802b32c:	3230      	adds	r2, #48	@ 0x30
 802b32e:	f806 2b01 	strb.w	r2, [r6], #1
 802b332:	42a6      	cmp	r6, r4
 802b334:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802b338:	ee36 6b45 	vsub.f64	d6, d6, d5
 802b33c:	d119      	bne.n	802b372 <_dtoa_r+0x582>
 802b33e:	eeb6 5b00 	vmov.f64	d5, #96	@ 0x3f000000  0.5
 802b342:	ee37 4b05 	vadd.f64	d4, d7, d5
 802b346:	eeb4 6bc4 	vcmpe.f64	d6, d4
 802b34a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b34e:	dc3e      	bgt.n	802b3ce <_dtoa_r+0x5de>
 802b350:	ee35 5b47 	vsub.f64	d5, d5, d7
 802b354:	eeb4 6bc5 	vcmpe.f64	d6, d5
 802b358:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b35c:	f57f af24 	bpl.w	802b1a8 <_dtoa_r+0x3b8>
 802b360:	460e      	mov	r6, r1
 802b362:	3901      	subs	r1, #1
 802b364:	f816 3c01 	ldrb.w	r3, [r6, #-1]
 802b368:	2b30      	cmp	r3, #48	@ 0x30
 802b36a:	d0f9      	beq.n	802b360 <_dtoa_r+0x570>
 802b36c:	f8dd 8010 	ldr.w	r8, [sp, #16]
 802b370:	e758      	b.n	802b224 <_dtoa_r+0x434>
 802b372:	ee26 6b03 	vmul.f64	d6, d6, d3
 802b376:	e7d5      	b.n	802b324 <_dtoa_r+0x534>
 802b378:	d10b      	bne.n	802b392 <_dtoa_r+0x5a2>
 802b37a:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802b37e:	ee26 6b07 	vmul.f64	d6, d6, d7
 802b382:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b386:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b38a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b38e:	f2c0 8161 	blt.w	802b654 <_dtoa_r+0x864>
 802b392:	2400      	movs	r4, #0
 802b394:	4625      	mov	r5, r4
 802b396:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b398:	43db      	mvns	r3, r3
 802b39a:	9304      	str	r3, [sp, #16]
 802b39c:	463e      	mov	r6, r7
 802b39e:	f04f 0800 	mov.w	r8, #0
 802b3a2:	4621      	mov	r1, r4
 802b3a4:	4648      	mov	r0, r9
 802b3a6:	f000 fe4f 	bl	802c048 <_Bfree>
 802b3aa:	2d00      	cmp	r5, #0
 802b3ac:	d0de      	beq.n	802b36c <_dtoa_r+0x57c>
 802b3ae:	f1b8 0f00 	cmp.w	r8, #0
 802b3b2:	d005      	beq.n	802b3c0 <_dtoa_r+0x5d0>
 802b3b4:	45a8      	cmp	r8, r5
 802b3b6:	d003      	beq.n	802b3c0 <_dtoa_r+0x5d0>
 802b3b8:	4641      	mov	r1, r8
 802b3ba:	4648      	mov	r0, r9
 802b3bc:	f000 fe44 	bl	802c048 <_Bfree>
 802b3c0:	4629      	mov	r1, r5
 802b3c2:	4648      	mov	r0, r9
 802b3c4:	f000 fe40 	bl	802c048 <_Bfree>
 802b3c8:	e7d0      	b.n	802b36c <_dtoa_r+0x57c>
 802b3ca:	f8cd 8010 	str.w	r8, [sp, #16]
 802b3ce:	4633      	mov	r3, r6
 802b3d0:	461e      	mov	r6, r3
 802b3d2:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802b3d6:	2a39      	cmp	r2, #57	@ 0x39
 802b3d8:	d106      	bne.n	802b3e8 <_dtoa_r+0x5f8>
 802b3da:	429f      	cmp	r7, r3
 802b3dc:	d1f8      	bne.n	802b3d0 <_dtoa_r+0x5e0>
 802b3de:	9a04      	ldr	r2, [sp, #16]
 802b3e0:	3201      	adds	r2, #1
 802b3e2:	9204      	str	r2, [sp, #16]
 802b3e4:	2230      	movs	r2, #48	@ 0x30
 802b3e6:	703a      	strb	r2, [r7, #0]
 802b3e8:	781a      	ldrb	r2, [r3, #0]
 802b3ea:	3201      	adds	r2, #1
 802b3ec:	701a      	strb	r2, [r3, #0]
 802b3ee:	e7bd      	b.n	802b36c <_dtoa_r+0x57c>
 802b3f0:	ee27 7b04 	vmul.f64	d7, d7, d4
 802b3f4:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802b3f8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b3fc:	f47f aeef 	bne.w	802b1de <_dtoa_r+0x3ee>
 802b400:	e710      	b.n	802b224 <_dtoa_r+0x434>
 802b402:	bf00      	nop
 802b404:	08031f10 	.word	0x08031f10
 802b408:	08031ee8 	.word	0x08031ee8
 802b40c:	9908      	ldr	r1, [sp, #32]
 802b40e:	2900      	cmp	r1, #0
 802b410:	f000 80e3 	beq.w	802b5da <_dtoa_r+0x7ea>
 802b414:	9907      	ldr	r1, [sp, #28]
 802b416:	2901      	cmp	r1, #1
 802b418:	f300 80c8 	bgt.w	802b5ac <_dtoa_r+0x7bc>
 802b41c:	2d00      	cmp	r5, #0
 802b41e:	f000 80c1 	beq.w	802b5a4 <_dtoa_r+0x7b4>
 802b422:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802b426:	9e05      	ldr	r6, [sp, #20]
 802b428:	461c      	mov	r4, r3
 802b42a:	9304      	str	r3, [sp, #16]
 802b42c:	9b05      	ldr	r3, [sp, #20]
 802b42e:	4413      	add	r3, r2
 802b430:	9305      	str	r3, [sp, #20]
 802b432:	9b06      	ldr	r3, [sp, #24]
 802b434:	2101      	movs	r1, #1
 802b436:	4413      	add	r3, r2
 802b438:	4648      	mov	r0, r9
 802b43a:	9306      	str	r3, [sp, #24]
 802b43c:	f000 ff02 	bl	802c244 <__i2b>
 802b440:	9b04      	ldr	r3, [sp, #16]
 802b442:	4605      	mov	r5, r0
 802b444:	b166      	cbz	r6, 802b460 <_dtoa_r+0x670>
 802b446:	9a06      	ldr	r2, [sp, #24]
 802b448:	2a00      	cmp	r2, #0
 802b44a:	dd09      	ble.n	802b460 <_dtoa_r+0x670>
 802b44c:	42b2      	cmp	r2, r6
 802b44e:	9905      	ldr	r1, [sp, #20]
 802b450:	bfa8      	it	ge
 802b452:	4632      	movge	r2, r6
 802b454:	1a89      	subs	r1, r1, r2
 802b456:	9105      	str	r1, [sp, #20]
 802b458:	9906      	ldr	r1, [sp, #24]
 802b45a:	1ab6      	subs	r6, r6, r2
 802b45c:	1a8a      	subs	r2, r1, r2
 802b45e:	9206      	str	r2, [sp, #24]
 802b460:	b1fb      	cbz	r3, 802b4a2 <_dtoa_r+0x6b2>
 802b462:	9a08      	ldr	r2, [sp, #32]
 802b464:	2a00      	cmp	r2, #0
 802b466:	f000 80bc 	beq.w	802b5e2 <_dtoa_r+0x7f2>
 802b46a:	b19c      	cbz	r4, 802b494 <_dtoa_r+0x6a4>
 802b46c:	4629      	mov	r1, r5
 802b46e:	4622      	mov	r2, r4
 802b470:	4648      	mov	r0, r9
 802b472:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b474:	f000 ffa6 	bl	802c3c4 <__pow5mult>
 802b478:	9a01      	ldr	r2, [sp, #4]
 802b47a:	4601      	mov	r1, r0
 802b47c:	4605      	mov	r5, r0
 802b47e:	4648      	mov	r0, r9
 802b480:	f000 fef6 	bl	802c270 <__multiply>
 802b484:	9901      	ldr	r1, [sp, #4]
 802b486:	9004      	str	r0, [sp, #16]
 802b488:	4648      	mov	r0, r9
 802b48a:	f000 fddd 	bl	802c048 <_Bfree>
 802b48e:	9a04      	ldr	r2, [sp, #16]
 802b490:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802b492:	9201      	str	r2, [sp, #4]
 802b494:	1b1a      	subs	r2, r3, r4
 802b496:	d004      	beq.n	802b4a2 <_dtoa_r+0x6b2>
 802b498:	9901      	ldr	r1, [sp, #4]
 802b49a:	4648      	mov	r0, r9
 802b49c:	f000 ff92 	bl	802c3c4 <__pow5mult>
 802b4a0:	9001      	str	r0, [sp, #4]
 802b4a2:	2101      	movs	r1, #1
 802b4a4:	4648      	mov	r0, r9
 802b4a6:	f000 fecd 	bl	802c244 <__i2b>
 802b4aa:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b4ac:	4604      	mov	r4, r0
 802b4ae:	2b00      	cmp	r3, #0
 802b4b0:	f000 81d0 	beq.w	802b854 <_dtoa_r+0xa64>
 802b4b4:	461a      	mov	r2, r3
 802b4b6:	4601      	mov	r1, r0
 802b4b8:	4648      	mov	r0, r9
 802b4ba:	f000 ff83 	bl	802c3c4 <__pow5mult>
 802b4be:	9b07      	ldr	r3, [sp, #28]
 802b4c0:	2b01      	cmp	r3, #1
 802b4c2:	4604      	mov	r4, r0
 802b4c4:	f300 8095 	bgt.w	802b5f2 <_dtoa_r+0x802>
 802b4c8:	9b02      	ldr	r3, [sp, #8]
 802b4ca:	2b00      	cmp	r3, #0
 802b4cc:	f040 808b 	bne.w	802b5e6 <_dtoa_r+0x7f6>
 802b4d0:	9b03      	ldr	r3, [sp, #12]
 802b4d2:	f3c3 0213 	ubfx	r2, r3, #0, #20
 802b4d6:	2a00      	cmp	r2, #0
 802b4d8:	f040 8087 	bne.w	802b5ea <_dtoa_r+0x7fa>
 802b4dc:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 802b4e0:	0d12      	lsrs	r2, r2, #20
 802b4e2:	0512      	lsls	r2, r2, #20
 802b4e4:	2a00      	cmp	r2, #0
 802b4e6:	f000 8082 	beq.w	802b5ee <_dtoa_r+0x7fe>
 802b4ea:	9b05      	ldr	r3, [sp, #20]
 802b4ec:	3301      	adds	r3, #1
 802b4ee:	9305      	str	r3, [sp, #20]
 802b4f0:	9b06      	ldr	r3, [sp, #24]
 802b4f2:	3301      	adds	r3, #1
 802b4f4:	9306      	str	r3, [sp, #24]
 802b4f6:	2301      	movs	r3, #1
 802b4f8:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b4fa:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b4fc:	2b00      	cmp	r3, #0
 802b4fe:	f000 81af 	beq.w	802b860 <_dtoa_r+0xa70>
 802b502:	6922      	ldr	r2, [r4, #16]
 802b504:	eb04 0282 	add.w	r2, r4, r2, lsl #2
 802b508:	6910      	ldr	r0, [r2, #16]
 802b50a:	f000 fe4f 	bl	802c1ac <__hi0bits>
 802b50e:	f1c0 0020 	rsb	r0, r0, #32
 802b512:	9b06      	ldr	r3, [sp, #24]
 802b514:	4418      	add	r0, r3
 802b516:	f010 001f 	ands.w	r0, r0, #31
 802b51a:	d076      	beq.n	802b60a <_dtoa_r+0x81a>
 802b51c:	f1c0 0220 	rsb	r2, r0, #32
 802b520:	2a04      	cmp	r2, #4
 802b522:	dd69      	ble.n	802b5f8 <_dtoa_r+0x808>
 802b524:	9b05      	ldr	r3, [sp, #20]
 802b526:	f1c0 001c 	rsb	r0, r0, #28
 802b52a:	4403      	add	r3, r0
 802b52c:	9305      	str	r3, [sp, #20]
 802b52e:	9b06      	ldr	r3, [sp, #24]
 802b530:	4406      	add	r6, r0
 802b532:	4403      	add	r3, r0
 802b534:	9306      	str	r3, [sp, #24]
 802b536:	9b05      	ldr	r3, [sp, #20]
 802b538:	2b00      	cmp	r3, #0
 802b53a:	dd05      	ble.n	802b548 <_dtoa_r+0x758>
 802b53c:	9901      	ldr	r1, [sp, #4]
 802b53e:	461a      	mov	r2, r3
 802b540:	4648      	mov	r0, r9
 802b542:	f000 ff99 	bl	802c478 <__lshift>
 802b546:	9001      	str	r0, [sp, #4]
 802b548:	9b06      	ldr	r3, [sp, #24]
 802b54a:	2b00      	cmp	r3, #0
 802b54c:	dd05      	ble.n	802b55a <_dtoa_r+0x76a>
 802b54e:	4621      	mov	r1, r4
 802b550:	461a      	mov	r2, r3
 802b552:	4648      	mov	r0, r9
 802b554:	f000 ff90 	bl	802c478 <__lshift>
 802b558:	4604      	mov	r4, r0
 802b55a:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 802b55c:	2b00      	cmp	r3, #0
 802b55e:	d056      	beq.n	802b60e <_dtoa_r+0x81e>
 802b560:	9801      	ldr	r0, [sp, #4]
 802b562:	4621      	mov	r1, r4
 802b564:	f000 fff4 	bl	802c550 <__mcmp>
 802b568:	2800      	cmp	r0, #0
 802b56a:	da50      	bge.n	802b60e <_dtoa_r+0x81e>
 802b56c:	f108 33ff 	add.w	r3, r8, #4294967295	@ 0xffffffff
 802b570:	9304      	str	r3, [sp, #16]
 802b572:	9901      	ldr	r1, [sp, #4]
 802b574:	2300      	movs	r3, #0
 802b576:	220a      	movs	r2, #10
 802b578:	4648      	mov	r0, r9
 802b57a:	f000 fd87 	bl	802c08c <__multadd>
 802b57e:	9b08      	ldr	r3, [sp, #32]
 802b580:	9001      	str	r0, [sp, #4]
 802b582:	2b00      	cmp	r3, #0
 802b584:	f000 816e 	beq.w	802b864 <_dtoa_r+0xa74>
 802b588:	4629      	mov	r1, r5
 802b58a:	2300      	movs	r3, #0
 802b58c:	220a      	movs	r2, #10
 802b58e:	4648      	mov	r0, r9
 802b590:	f000 fd7c 	bl	802c08c <__multadd>
 802b594:	f1bb 0f00 	cmp.w	fp, #0
 802b598:	4605      	mov	r5, r0
 802b59a:	dc64      	bgt.n	802b666 <_dtoa_r+0x876>
 802b59c:	9b07      	ldr	r3, [sp, #28]
 802b59e:	2b02      	cmp	r3, #2
 802b5a0:	dc3e      	bgt.n	802b620 <_dtoa_r+0x830>
 802b5a2:	e060      	b.n	802b666 <_dtoa_r+0x876>
 802b5a4:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b5a6:	f1c2 0236 	rsb	r2, r2, #54	@ 0x36
 802b5aa:	e73c      	b.n	802b426 <_dtoa_r+0x636>
 802b5ac:	f10a 34ff 	add.w	r4, sl, #4294967295	@ 0xffffffff
 802b5b0:	42a3      	cmp	r3, r4
 802b5b2:	bfbf      	itttt	lt
 802b5b4:	1ae2      	sublt	r2, r4, r3
 802b5b6:	9b0a      	ldrlt	r3, [sp, #40]	@ 0x28
 802b5b8:	189b      	addlt	r3, r3, r2
 802b5ba:	930a      	strlt	r3, [sp, #40]	@ 0x28
 802b5bc:	bfae      	itee	ge
 802b5be:	1b1c      	subge	r4, r3, r4
 802b5c0:	4623      	movlt	r3, r4
 802b5c2:	2400      	movlt	r4, #0
 802b5c4:	f1ba 0f00 	cmp.w	sl, #0
 802b5c8:	bfb5      	itete	lt
 802b5ca:	9a05      	ldrlt	r2, [sp, #20]
 802b5cc:	9e05      	ldrge	r6, [sp, #20]
 802b5ce:	eba2 060a 	sublt.w	r6, r2, sl
 802b5d2:	4652      	movge	r2, sl
 802b5d4:	bfb8      	it	lt
 802b5d6:	2200      	movlt	r2, #0
 802b5d8:	e727      	b.n	802b42a <_dtoa_r+0x63a>
 802b5da:	9e05      	ldr	r6, [sp, #20]
 802b5dc:	9d08      	ldr	r5, [sp, #32]
 802b5de:	461c      	mov	r4, r3
 802b5e0:	e730      	b.n	802b444 <_dtoa_r+0x654>
 802b5e2:	461a      	mov	r2, r3
 802b5e4:	e758      	b.n	802b498 <_dtoa_r+0x6a8>
 802b5e6:	2300      	movs	r3, #0
 802b5e8:	e786      	b.n	802b4f8 <_dtoa_r+0x708>
 802b5ea:	9b02      	ldr	r3, [sp, #8]
 802b5ec:	e784      	b.n	802b4f8 <_dtoa_r+0x708>
 802b5ee:	920b      	str	r2, [sp, #44]	@ 0x2c
 802b5f0:	e783      	b.n	802b4fa <_dtoa_r+0x70a>
 802b5f2:	2300      	movs	r3, #0
 802b5f4:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b5f6:	e784      	b.n	802b502 <_dtoa_r+0x712>
 802b5f8:	d09d      	beq.n	802b536 <_dtoa_r+0x746>
 802b5fa:	9b05      	ldr	r3, [sp, #20]
 802b5fc:	321c      	adds	r2, #28
 802b5fe:	4413      	add	r3, r2
 802b600:	9305      	str	r3, [sp, #20]
 802b602:	9b06      	ldr	r3, [sp, #24]
 802b604:	4416      	add	r6, r2
 802b606:	4413      	add	r3, r2
 802b608:	e794      	b.n	802b534 <_dtoa_r+0x744>
 802b60a:	4602      	mov	r2, r0
 802b60c:	e7f5      	b.n	802b5fa <_dtoa_r+0x80a>
 802b60e:	f1ba 0f00 	cmp.w	sl, #0
 802b612:	f8cd 8010 	str.w	r8, [sp, #16]
 802b616:	46d3      	mov	fp, sl
 802b618:	dc21      	bgt.n	802b65e <_dtoa_r+0x86e>
 802b61a:	9b07      	ldr	r3, [sp, #28]
 802b61c:	2b02      	cmp	r3, #2
 802b61e:	dd1e      	ble.n	802b65e <_dtoa_r+0x86e>
 802b620:	f1bb 0f00 	cmp.w	fp, #0
 802b624:	f47f aeb7 	bne.w	802b396 <_dtoa_r+0x5a6>
 802b628:	4621      	mov	r1, r4
 802b62a:	465b      	mov	r3, fp
 802b62c:	2205      	movs	r2, #5
 802b62e:	4648      	mov	r0, r9
 802b630:	f000 fd2c 	bl	802c08c <__multadd>
 802b634:	4601      	mov	r1, r0
 802b636:	4604      	mov	r4, r0
 802b638:	9801      	ldr	r0, [sp, #4]
 802b63a:	f000 ff89 	bl	802c550 <__mcmp>
 802b63e:	2800      	cmp	r0, #0
 802b640:	f77f aea9 	ble.w	802b396 <_dtoa_r+0x5a6>
 802b644:	463e      	mov	r6, r7
 802b646:	2331      	movs	r3, #49	@ 0x31
 802b648:	f806 3b01 	strb.w	r3, [r6], #1
 802b64c:	9b04      	ldr	r3, [sp, #16]
 802b64e:	3301      	adds	r3, #1
 802b650:	9304      	str	r3, [sp, #16]
 802b652:	e6a4      	b.n	802b39e <_dtoa_r+0x5ae>
 802b654:	f8cd 8010 	str.w	r8, [sp, #16]
 802b658:	4654      	mov	r4, sl
 802b65a:	4625      	mov	r5, r4
 802b65c:	e7f2      	b.n	802b644 <_dtoa_r+0x854>
 802b65e:	9b08      	ldr	r3, [sp, #32]
 802b660:	2b00      	cmp	r3, #0
 802b662:	f000 8103 	beq.w	802b86c <_dtoa_r+0xa7c>
 802b666:	2e00      	cmp	r6, #0
 802b668:	dd05      	ble.n	802b676 <_dtoa_r+0x886>
 802b66a:	4629      	mov	r1, r5
 802b66c:	4632      	mov	r2, r6
 802b66e:	4648      	mov	r0, r9
 802b670:	f000 ff02 	bl	802c478 <__lshift>
 802b674:	4605      	mov	r5, r0
 802b676:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802b678:	2b00      	cmp	r3, #0
 802b67a:	d058      	beq.n	802b72e <_dtoa_r+0x93e>
 802b67c:	6869      	ldr	r1, [r5, #4]
 802b67e:	4648      	mov	r0, r9
 802b680:	f000 fca2 	bl	802bfc8 <_Balloc>
 802b684:	4606      	mov	r6, r0
 802b686:	b928      	cbnz	r0, 802b694 <_dtoa_r+0x8a4>
 802b688:	4b82      	ldr	r3, [pc, #520]	@ (802b894 <_dtoa_r+0xaa4>)
 802b68a:	4602      	mov	r2, r0
 802b68c:	f240 21ef 	movw	r1, #751	@ 0x2ef
 802b690:	f7ff bbc7 	b.w	802ae22 <_dtoa_r+0x32>
 802b694:	692a      	ldr	r2, [r5, #16]
 802b696:	3202      	adds	r2, #2
 802b698:	0092      	lsls	r2, r2, #2
 802b69a:	f105 010c 	add.w	r1, r5, #12
 802b69e:	300c      	adds	r0, #12
 802b6a0:	f7ff fae5 	bl	802ac6e <memcpy>
 802b6a4:	2201      	movs	r2, #1
 802b6a6:	4631      	mov	r1, r6
 802b6a8:	4648      	mov	r0, r9
 802b6aa:	f000 fee5 	bl	802c478 <__lshift>
 802b6ae:	1c7b      	adds	r3, r7, #1
 802b6b0:	9305      	str	r3, [sp, #20]
 802b6b2:	eb07 030b 	add.w	r3, r7, fp
 802b6b6:	9309      	str	r3, [sp, #36]	@ 0x24
 802b6b8:	9b02      	ldr	r3, [sp, #8]
 802b6ba:	f003 0301 	and.w	r3, r3, #1
 802b6be:	46a8      	mov	r8, r5
 802b6c0:	9308      	str	r3, [sp, #32]
 802b6c2:	4605      	mov	r5, r0
 802b6c4:	9b05      	ldr	r3, [sp, #20]
 802b6c6:	9801      	ldr	r0, [sp, #4]
 802b6c8:	4621      	mov	r1, r4
 802b6ca:	f103 3bff 	add.w	fp, r3, #4294967295	@ 0xffffffff
 802b6ce:	f7ff fb05 	bl	802acdc <quorem>
 802b6d2:	4641      	mov	r1, r8
 802b6d4:	9002      	str	r0, [sp, #8]
 802b6d6:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802b6da:	9801      	ldr	r0, [sp, #4]
 802b6dc:	f000 ff38 	bl	802c550 <__mcmp>
 802b6e0:	462a      	mov	r2, r5
 802b6e2:	9006      	str	r0, [sp, #24]
 802b6e4:	4621      	mov	r1, r4
 802b6e6:	4648      	mov	r0, r9
 802b6e8:	f000 ff4e 	bl	802c588 <__mdiff>
 802b6ec:	68c2      	ldr	r2, [r0, #12]
 802b6ee:	4606      	mov	r6, r0
 802b6f0:	b9fa      	cbnz	r2, 802b732 <_dtoa_r+0x942>
 802b6f2:	4601      	mov	r1, r0
 802b6f4:	9801      	ldr	r0, [sp, #4]
 802b6f6:	f000 ff2b 	bl	802c550 <__mcmp>
 802b6fa:	4602      	mov	r2, r0
 802b6fc:	4631      	mov	r1, r6
 802b6fe:	4648      	mov	r0, r9
 802b700:	920a      	str	r2, [sp, #40]	@ 0x28
 802b702:	f000 fca1 	bl	802c048 <_Bfree>
 802b706:	9b07      	ldr	r3, [sp, #28]
 802b708:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802b70a:	9e05      	ldr	r6, [sp, #20]
 802b70c:	ea43 0102 	orr.w	r1, r3, r2
 802b710:	9b08      	ldr	r3, [sp, #32]
 802b712:	4319      	orrs	r1, r3
 802b714:	d10f      	bne.n	802b736 <_dtoa_r+0x946>
 802b716:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b71a:	d028      	beq.n	802b76e <_dtoa_r+0x97e>
 802b71c:	9b06      	ldr	r3, [sp, #24]
 802b71e:	2b00      	cmp	r3, #0
 802b720:	dd02      	ble.n	802b728 <_dtoa_r+0x938>
 802b722:	9b02      	ldr	r3, [sp, #8]
 802b724:	f103 0a31 	add.w	sl, r3, #49	@ 0x31
 802b728:	f88b a000 	strb.w	sl, [fp]
 802b72c:	e639      	b.n	802b3a2 <_dtoa_r+0x5b2>
 802b72e:	4628      	mov	r0, r5
 802b730:	e7bd      	b.n	802b6ae <_dtoa_r+0x8be>
 802b732:	2201      	movs	r2, #1
 802b734:	e7e2      	b.n	802b6fc <_dtoa_r+0x90c>
 802b736:	9b06      	ldr	r3, [sp, #24]
 802b738:	2b00      	cmp	r3, #0
 802b73a:	db04      	blt.n	802b746 <_dtoa_r+0x956>
 802b73c:	9907      	ldr	r1, [sp, #28]
 802b73e:	430b      	orrs	r3, r1
 802b740:	9908      	ldr	r1, [sp, #32]
 802b742:	430b      	orrs	r3, r1
 802b744:	d120      	bne.n	802b788 <_dtoa_r+0x998>
 802b746:	2a00      	cmp	r2, #0
 802b748:	ddee      	ble.n	802b728 <_dtoa_r+0x938>
 802b74a:	9901      	ldr	r1, [sp, #4]
 802b74c:	2201      	movs	r2, #1
 802b74e:	4648      	mov	r0, r9
 802b750:	f000 fe92 	bl	802c478 <__lshift>
 802b754:	4621      	mov	r1, r4
 802b756:	9001      	str	r0, [sp, #4]
 802b758:	f000 fefa 	bl	802c550 <__mcmp>
 802b75c:	2800      	cmp	r0, #0
 802b75e:	dc03      	bgt.n	802b768 <_dtoa_r+0x978>
 802b760:	d1e2      	bne.n	802b728 <_dtoa_r+0x938>
 802b762:	f01a 0f01 	tst.w	sl, #1
 802b766:	d0df      	beq.n	802b728 <_dtoa_r+0x938>
 802b768:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b76c:	d1d9      	bne.n	802b722 <_dtoa_r+0x932>
 802b76e:	2339      	movs	r3, #57	@ 0x39
 802b770:	f88b 3000 	strb.w	r3, [fp]
 802b774:	4633      	mov	r3, r6
 802b776:	461e      	mov	r6, r3
 802b778:	3b01      	subs	r3, #1
 802b77a:	f816 2c01 	ldrb.w	r2, [r6, #-1]
 802b77e:	2a39      	cmp	r2, #57	@ 0x39
 802b780:	d053      	beq.n	802b82a <_dtoa_r+0xa3a>
 802b782:	3201      	adds	r2, #1
 802b784:	701a      	strb	r2, [r3, #0]
 802b786:	e60c      	b.n	802b3a2 <_dtoa_r+0x5b2>
 802b788:	2a00      	cmp	r2, #0
 802b78a:	dd07      	ble.n	802b79c <_dtoa_r+0x9ac>
 802b78c:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802b790:	d0ed      	beq.n	802b76e <_dtoa_r+0x97e>
 802b792:	f10a 0301 	add.w	r3, sl, #1
 802b796:	f88b 3000 	strb.w	r3, [fp]
 802b79a:	e602      	b.n	802b3a2 <_dtoa_r+0x5b2>
 802b79c:	9b05      	ldr	r3, [sp, #20]
 802b79e:	9a05      	ldr	r2, [sp, #20]
 802b7a0:	f803 ac01 	strb.w	sl, [r3, #-1]
 802b7a4:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b7a6:	4293      	cmp	r3, r2
 802b7a8:	d029      	beq.n	802b7fe <_dtoa_r+0xa0e>
 802b7aa:	9901      	ldr	r1, [sp, #4]
 802b7ac:	2300      	movs	r3, #0
 802b7ae:	220a      	movs	r2, #10
 802b7b0:	4648      	mov	r0, r9
 802b7b2:	f000 fc6b 	bl	802c08c <__multadd>
 802b7b6:	45a8      	cmp	r8, r5
 802b7b8:	9001      	str	r0, [sp, #4]
 802b7ba:	f04f 0300 	mov.w	r3, #0
 802b7be:	f04f 020a 	mov.w	r2, #10
 802b7c2:	4641      	mov	r1, r8
 802b7c4:	4648      	mov	r0, r9
 802b7c6:	d107      	bne.n	802b7d8 <_dtoa_r+0x9e8>
 802b7c8:	f000 fc60 	bl	802c08c <__multadd>
 802b7cc:	4680      	mov	r8, r0
 802b7ce:	4605      	mov	r5, r0
 802b7d0:	9b05      	ldr	r3, [sp, #20]
 802b7d2:	3301      	adds	r3, #1
 802b7d4:	9305      	str	r3, [sp, #20]
 802b7d6:	e775      	b.n	802b6c4 <_dtoa_r+0x8d4>
 802b7d8:	f000 fc58 	bl	802c08c <__multadd>
 802b7dc:	4629      	mov	r1, r5
 802b7de:	4680      	mov	r8, r0
 802b7e0:	2300      	movs	r3, #0
 802b7e2:	220a      	movs	r2, #10
 802b7e4:	4648      	mov	r0, r9
 802b7e6:	f000 fc51 	bl	802c08c <__multadd>
 802b7ea:	4605      	mov	r5, r0
 802b7ec:	e7f0      	b.n	802b7d0 <_dtoa_r+0x9e0>
 802b7ee:	f1bb 0f00 	cmp.w	fp, #0
 802b7f2:	bfcc      	ite	gt
 802b7f4:	465e      	movgt	r6, fp
 802b7f6:	2601      	movle	r6, #1
 802b7f8:	443e      	add	r6, r7
 802b7fa:	f04f 0800 	mov.w	r8, #0
 802b7fe:	9901      	ldr	r1, [sp, #4]
 802b800:	2201      	movs	r2, #1
 802b802:	4648      	mov	r0, r9
 802b804:	f000 fe38 	bl	802c478 <__lshift>
 802b808:	4621      	mov	r1, r4
 802b80a:	9001      	str	r0, [sp, #4]
 802b80c:	f000 fea0 	bl	802c550 <__mcmp>
 802b810:	2800      	cmp	r0, #0
 802b812:	dcaf      	bgt.n	802b774 <_dtoa_r+0x984>
 802b814:	d102      	bne.n	802b81c <_dtoa_r+0xa2c>
 802b816:	f01a 0f01 	tst.w	sl, #1
 802b81a:	d1ab      	bne.n	802b774 <_dtoa_r+0x984>
 802b81c:	4633      	mov	r3, r6
 802b81e:	461e      	mov	r6, r3
 802b820:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802b824:	2a30      	cmp	r2, #48	@ 0x30
 802b826:	d0fa      	beq.n	802b81e <_dtoa_r+0xa2e>
 802b828:	e5bb      	b.n	802b3a2 <_dtoa_r+0x5b2>
 802b82a:	429f      	cmp	r7, r3
 802b82c:	d1a3      	bne.n	802b776 <_dtoa_r+0x986>
 802b82e:	9b04      	ldr	r3, [sp, #16]
 802b830:	3301      	adds	r3, #1
 802b832:	9304      	str	r3, [sp, #16]
 802b834:	2331      	movs	r3, #49	@ 0x31
 802b836:	703b      	strb	r3, [r7, #0]
 802b838:	e5b3      	b.n	802b3a2 <_dtoa_r+0x5b2>
 802b83a:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b83c:	4f16      	ldr	r7, [pc, #88]	@ (802b898 <_dtoa_r+0xaa8>)
 802b83e:	b11b      	cbz	r3, 802b848 <_dtoa_r+0xa58>
 802b840:	f107 0308 	add.w	r3, r7, #8
 802b844:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802b846:	6013      	str	r3, [r2, #0]
 802b848:	4638      	mov	r0, r7
 802b84a:	b011      	add	sp, #68	@ 0x44
 802b84c:	ecbd 8b02 	vpop	{d8}
 802b850:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b854:	9b07      	ldr	r3, [sp, #28]
 802b856:	2b01      	cmp	r3, #1
 802b858:	f77f ae36 	ble.w	802b4c8 <_dtoa_r+0x6d8>
 802b85c:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b85e:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b860:	2001      	movs	r0, #1
 802b862:	e656      	b.n	802b512 <_dtoa_r+0x722>
 802b864:	f1bb 0f00 	cmp.w	fp, #0
 802b868:	f77f aed7 	ble.w	802b61a <_dtoa_r+0x82a>
 802b86c:	463e      	mov	r6, r7
 802b86e:	9801      	ldr	r0, [sp, #4]
 802b870:	4621      	mov	r1, r4
 802b872:	f7ff fa33 	bl	802acdc <quorem>
 802b876:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802b87a:	f806 ab01 	strb.w	sl, [r6], #1
 802b87e:	1bf2      	subs	r2, r6, r7
 802b880:	4593      	cmp	fp, r2
 802b882:	ddb4      	ble.n	802b7ee <_dtoa_r+0x9fe>
 802b884:	9901      	ldr	r1, [sp, #4]
 802b886:	2300      	movs	r3, #0
 802b888:	220a      	movs	r2, #10
 802b88a:	4648      	mov	r0, r9
 802b88c:	f000 fbfe 	bl	802c08c <__multadd>
 802b890:	9001      	str	r0, [sp, #4]
 802b892:	e7ec      	b.n	802b86e <_dtoa_r+0xa7e>
 802b894:	08031e0e 	.word	0x08031e0e
 802b898:	08031da9 	.word	0x08031da9

0802b89c <_free_r>:
 802b89c:	b538      	push	{r3, r4, r5, lr}
 802b89e:	4605      	mov	r5, r0
 802b8a0:	2900      	cmp	r1, #0
 802b8a2:	d041      	beq.n	802b928 <_free_r+0x8c>
 802b8a4:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802b8a8:	1f0c      	subs	r4, r1, #4
 802b8aa:	2b00      	cmp	r3, #0
 802b8ac:	bfb8      	it	lt
 802b8ae:	18e4      	addlt	r4, r4, r3
 802b8b0:	f7fd fc1e 	bl	80290f0 <__malloc_lock>
 802b8b4:	4a1d      	ldr	r2, [pc, #116]	@ (802b92c <_free_r+0x90>)
 802b8b6:	6813      	ldr	r3, [r2, #0]
 802b8b8:	b933      	cbnz	r3, 802b8c8 <_free_r+0x2c>
 802b8ba:	6063      	str	r3, [r4, #4]
 802b8bc:	6014      	str	r4, [r2, #0]
 802b8be:	4628      	mov	r0, r5
 802b8c0:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802b8c4:	f7fd bc1a 	b.w	80290fc <__malloc_unlock>
 802b8c8:	42a3      	cmp	r3, r4
 802b8ca:	d908      	bls.n	802b8de <_free_r+0x42>
 802b8cc:	6820      	ldr	r0, [r4, #0]
 802b8ce:	1821      	adds	r1, r4, r0
 802b8d0:	428b      	cmp	r3, r1
 802b8d2:	bf01      	itttt	eq
 802b8d4:	6819      	ldreq	r1, [r3, #0]
 802b8d6:	685b      	ldreq	r3, [r3, #4]
 802b8d8:	1809      	addeq	r1, r1, r0
 802b8da:	6021      	streq	r1, [r4, #0]
 802b8dc:	e7ed      	b.n	802b8ba <_free_r+0x1e>
 802b8de:	461a      	mov	r2, r3
 802b8e0:	685b      	ldr	r3, [r3, #4]
 802b8e2:	b10b      	cbz	r3, 802b8e8 <_free_r+0x4c>
 802b8e4:	42a3      	cmp	r3, r4
 802b8e6:	d9fa      	bls.n	802b8de <_free_r+0x42>
 802b8e8:	6811      	ldr	r1, [r2, #0]
 802b8ea:	1850      	adds	r0, r2, r1
 802b8ec:	42a0      	cmp	r0, r4
 802b8ee:	d10b      	bne.n	802b908 <_free_r+0x6c>
 802b8f0:	6820      	ldr	r0, [r4, #0]
 802b8f2:	4401      	add	r1, r0
 802b8f4:	1850      	adds	r0, r2, r1
 802b8f6:	4283      	cmp	r3, r0
 802b8f8:	6011      	str	r1, [r2, #0]
 802b8fa:	d1e0      	bne.n	802b8be <_free_r+0x22>
 802b8fc:	6818      	ldr	r0, [r3, #0]
 802b8fe:	685b      	ldr	r3, [r3, #4]
 802b900:	6053      	str	r3, [r2, #4]
 802b902:	4408      	add	r0, r1
 802b904:	6010      	str	r0, [r2, #0]
 802b906:	e7da      	b.n	802b8be <_free_r+0x22>
 802b908:	d902      	bls.n	802b910 <_free_r+0x74>
 802b90a:	230c      	movs	r3, #12
 802b90c:	602b      	str	r3, [r5, #0]
 802b90e:	e7d6      	b.n	802b8be <_free_r+0x22>
 802b910:	6820      	ldr	r0, [r4, #0]
 802b912:	1821      	adds	r1, r4, r0
 802b914:	428b      	cmp	r3, r1
 802b916:	bf04      	itt	eq
 802b918:	6819      	ldreq	r1, [r3, #0]
 802b91a:	685b      	ldreq	r3, [r3, #4]
 802b91c:	6063      	str	r3, [r4, #4]
 802b91e:	bf04      	itt	eq
 802b920:	1809      	addeq	r1, r1, r0
 802b922:	6021      	streq	r1, [r4, #0]
 802b924:	6054      	str	r4, [r2, #4]
 802b926:	e7ca      	b.n	802b8be <_free_r+0x22>
 802b928:	bd38      	pop	{r3, r4, r5, pc}
 802b92a:	bf00      	nop
 802b92c:	2402b120 	.word	0x2402b120

0802b930 <rshift>:
 802b930:	6903      	ldr	r3, [r0, #16]
 802b932:	ebb3 1f61 	cmp.w	r3, r1, asr #5
 802b936:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 802b93a:	ea4f 1261 	mov.w	r2, r1, asr #5
 802b93e:	f100 0414 	add.w	r4, r0, #20
 802b942:	dd45      	ble.n	802b9d0 <rshift+0xa0>
 802b944:	f011 011f 	ands.w	r1, r1, #31
 802b948:	eb04 0683 	add.w	r6, r4, r3, lsl #2
 802b94c:	eb04 0582 	add.w	r5, r4, r2, lsl #2
 802b950:	d10c      	bne.n	802b96c <rshift+0x3c>
 802b952:	f100 0710 	add.w	r7, r0, #16
 802b956:	4629      	mov	r1, r5
 802b958:	42b1      	cmp	r1, r6
 802b95a:	d334      	bcc.n	802b9c6 <rshift+0x96>
 802b95c:	1a9b      	subs	r3, r3, r2
 802b95e:	009b      	lsls	r3, r3, #2
 802b960:	1eea      	subs	r2, r5, #3
 802b962:	4296      	cmp	r6, r2
 802b964:	bf38      	it	cc
 802b966:	2300      	movcc	r3, #0
 802b968:	4423      	add	r3, r4
 802b96a:	e015      	b.n	802b998 <rshift+0x68>
 802b96c:	f854 7022 	ldr.w	r7, [r4, r2, lsl #2]
 802b970:	f1c1 0820 	rsb	r8, r1, #32
 802b974:	40cf      	lsrs	r7, r1
 802b976:	f105 0e04 	add.w	lr, r5, #4
 802b97a:	46a1      	mov	r9, r4
 802b97c:	4576      	cmp	r6, lr
 802b97e:	46f4      	mov	ip, lr
 802b980:	d815      	bhi.n	802b9ae <rshift+0x7e>
 802b982:	1a9a      	subs	r2, r3, r2
 802b984:	0092      	lsls	r2, r2, #2
 802b986:	3a04      	subs	r2, #4
 802b988:	3501      	adds	r5, #1
 802b98a:	42ae      	cmp	r6, r5
 802b98c:	bf38      	it	cc
 802b98e:	2200      	movcc	r2, #0
 802b990:	18a3      	adds	r3, r4, r2
 802b992:	50a7      	str	r7, [r4, r2]
 802b994:	b107      	cbz	r7, 802b998 <rshift+0x68>
 802b996:	3304      	adds	r3, #4
 802b998:	1b1a      	subs	r2, r3, r4
 802b99a:	42a3      	cmp	r3, r4
 802b99c:	ea4f 02a2 	mov.w	r2, r2, asr #2
 802b9a0:	bf08      	it	eq
 802b9a2:	2300      	moveq	r3, #0
 802b9a4:	6102      	str	r2, [r0, #16]
 802b9a6:	bf08      	it	eq
 802b9a8:	6143      	streq	r3, [r0, #20]
 802b9aa:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802b9ae:	f8dc c000 	ldr.w	ip, [ip]
 802b9b2:	fa0c fc08 	lsl.w	ip, ip, r8
 802b9b6:	ea4c 0707 	orr.w	r7, ip, r7
 802b9ba:	f849 7b04 	str.w	r7, [r9], #4
 802b9be:	f85e 7b04 	ldr.w	r7, [lr], #4
 802b9c2:	40cf      	lsrs	r7, r1
 802b9c4:	e7da      	b.n	802b97c <rshift+0x4c>
 802b9c6:	f851 cb04 	ldr.w	ip, [r1], #4
 802b9ca:	f847 cf04 	str.w	ip, [r7, #4]!
 802b9ce:	e7c3      	b.n	802b958 <rshift+0x28>
 802b9d0:	4623      	mov	r3, r4
 802b9d2:	e7e1      	b.n	802b998 <rshift+0x68>

0802b9d4 <__hexdig_fun>:
 802b9d4:	f1a0 0330 	sub.w	r3, r0, #48	@ 0x30
 802b9d8:	2b09      	cmp	r3, #9
 802b9da:	d802      	bhi.n	802b9e2 <__hexdig_fun+0xe>
 802b9dc:	3820      	subs	r0, #32
 802b9de:	b2c0      	uxtb	r0, r0
 802b9e0:	4770      	bx	lr
 802b9e2:	f1a0 0361 	sub.w	r3, r0, #97	@ 0x61
 802b9e6:	2b05      	cmp	r3, #5
 802b9e8:	d801      	bhi.n	802b9ee <__hexdig_fun+0x1a>
 802b9ea:	3847      	subs	r0, #71	@ 0x47
 802b9ec:	e7f7      	b.n	802b9de <__hexdig_fun+0xa>
 802b9ee:	f1a0 0341 	sub.w	r3, r0, #65	@ 0x41
 802b9f2:	2b05      	cmp	r3, #5
 802b9f4:	d801      	bhi.n	802b9fa <__hexdig_fun+0x26>
 802b9f6:	3827      	subs	r0, #39	@ 0x27
 802b9f8:	e7f1      	b.n	802b9de <__hexdig_fun+0xa>
 802b9fa:	2000      	movs	r0, #0
 802b9fc:	4770      	bx	lr
	...

0802ba00 <__gethex>:
 802ba00:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ba04:	b085      	sub	sp, #20
 802ba06:	468a      	mov	sl, r1
 802ba08:	9302      	str	r3, [sp, #8]
 802ba0a:	680b      	ldr	r3, [r1, #0]
 802ba0c:	9001      	str	r0, [sp, #4]
 802ba0e:	4690      	mov	r8, r2
 802ba10:	1c9c      	adds	r4, r3, #2
 802ba12:	46a1      	mov	r9, r4
 802ba14:	f814 0b01 	ldrb.w	r0, [r4], #1
 802ba18:	2830      	cmp	r0, #48	@ 0x30
 802ba1a:	d0fa      	beq.n	802ba12 <__gethex+0x12>
 802ba1c:	eba9 0303 	sub.w	r3, r9, r3
 802ba20:	f1a3 0b02 	sub.w	fp, r3, #2
 802ba24:	f7ff ffd6 	bl	802b9d4 <__hexdig_fun>
 802ba28:	4605      	mov	r5, r0
 802ba2a:	2800      	cmp	r0, #0
 802ba2c:	d168      	bne.n	802bb00 <__gethex+0x100>
 802ba2e:	49a0      	ldr	r1, [pc, #640]	@ (802bcb0 <__gethex+0x2b0>)
 802ba30:	2201      	movs	r2, #1
 802ba32:	4648      	mov	r0, r9
 802ba34:	f7ff f82c 	bl	802aa90 <strncmp>
 802ba38:	4607      	mov	r7, r0
 802ba3a:	2800      	cmp	r0, #0
 802ba3c:	d167      	bne.n	802bb0e <__gethex+0x10e>
 802ba3e:	f899 0001 	ldrb.w	r0, [r9, #1]
 802ba42:	4626      	mov	r6, r4
 802ba44:	f7ff ffc6 	bl	802b9d4 <__hexdig_fun>
 802ba48:	2800      	cmp	r0, #0
 802ba4a:	d062      	beq.n	802bb12 <__gethex+0x112>
 802ba4c:	4623      	mov	r3, r4
 802ba4e:	7818      	ldrb	r0, [r3, #0]
 802ba50:	2830      	cmp	r0, #48	@ 0x30
 802ba52:	4699      	mov	r9, r3
 802ba54:	f103 0301 	add.w	r3, r3, #1
 802ba58:	d0f9      	beq.n	802ba4e <__gethex+0x4e>
 802ba5a:	f7ff ffbb 	bl	802b9d4 <__hexdig_fun>
 802ba5e:	fab0 f580 	clz	r5, r0
 802ba62:	096d      	lsrs	r5, r5, #5
 802ba64:	f04f 0b01 	mov.w	fp, #1
 802ba68:	464a      	mov	r2, r9
 802ba6a:	4616      	mov	r6, r2
 802ba6c:	3201      	adds	r2, #1
 802ba6e:	7830      	ldrb	r0, [r6, #0]
 802ba70:	f7ff ffb0 	bl	802b9d4 <__hexdig_fun>
 802ba74:	2800      	cmp	r0, #0
 802ba76:	d1f8      	bne.n	802ba6a <__gethex+0x6a>
 802ba78:	498d      	ldr	r1, [pc, #564]	@ (802bcb0 <__gethex+0x2b0>)
 802ba7a:	2201      	movs	r2, #1
 802ba7c:	4630      	mov	r0, r6
 802ba7e:	f7ff f807 	bl	802aa90 <strncmp>
 802ba82:	2800      	cmp	r0, #0
 802ba84:	d13f      	bne.n	802bb06 <__gethex+0x106>
 802ba86:	b944      	cbnz	r4, 802ba9a <__gethex+0x9a>
 802ba88:	1c74      	adds	r4, r6, #1
 802ba8a:	4622      	mov	r2, r4
 802ba8c:	4616      	mov	r6, r2
 802ba8e:	3201      	adds	r2, #1
 802ba90:	7830      	ldrb	r0, [r6, #0]
 802ba92:	f7ff ff9f 	bl	802b9d4 <__hexdig_fun>
 802ba96:	2800      	cmp	r0, #0
 802ba98:	d1f8      	bne.n	802ba8c <__gethex+0x8c>
 802ba9a:	1ba4      	subs	r4, r4, r6
 802ba9c:	00a7      	lsls	r7, r4, #2
 802ba9e:	7833      	ldrb	r3, [r6, #0]
 802baa0:	f003 03df 	and.w	r3, r3, #223	@ 0xdf
 802baa4:	2b50      	cmp	r3, #80	@ 0x50
 802baa6:	d13e      	bne.n	802bb26 <__gethex+0x126>
 802baa8:	7873      	ldrb	r3, [r6, #1]
 802baaa:	2b2b      	cmp	r3, #43	@ 0x2b
 802baac:	d033      	beq.n	802bb16 <__gethex+0x116>
 802baae:	2b2d      	cmp	r3, #45	@ 0x2d
 802bab0:	d034      	beq.n	802bb1c <__gethex+0x11c>
 802bab2:	1c71      	adds	r1, r6, #1
 802bab4:	2400      	movs	r4, #0
 802bab6:	7808      	ldrb	r0, [r1, #0]
 802bab8:	f7ff ff8c 	bl	802b9d4 <__hexdig_fun>
 802babc:	1e43      	subs	r3, r0, #1
 802babe:	b2db      	uxtb	r3, r3
 802bac0:	2b18      	cmp	r3, #24
 802bac2:	d830      	bhi.n	802bb26 <__gethex+0x126>
 802bac4:	f1a0 0210 	sub.w	r2, r0, #16
 802bac8:	f811 0f01 	ldrb.w	r0, [r1, #1]!
 802bacc:	f7ff ff82 	bl	802b9d4 <__hexdig_fun>
 802bad0:	f100 3cff 	add.w	ip, r0, #4294967295	@ 0xffffffff
 802bad4:	fa5f fc8c 	uxtb.w	ip, ip
 802bad8:	f1bc 0f18 	cmp.w	ip, #24
 802badc:	f04f 030a 	mov.w	r3, #10
 802bae0:	d91e      	bls.n	802bb20 <__gethex+0x120>
 802bae2:	b104      	cbz	r4, 802bae6 <__gethex+0xe6>
 802bae4:	4252      	negs	r2, r2
 802bae6:	4417      	add	r7, r2
 802bae8:	f8ca 1000 	str.w	r1, [sl]
 802baec:	b1ed      	cbz	r5, 802bb2a <__gethex+0x12a>
 802baee:	f1bb 0f00 	cmp.w	fp, #0
 802baf2:	bf0c      	ite	eq
 802baf4:	2506      	moveq	r5, #6
 802baf6:	2500      	movne	r5, #0
 802baf8:	4628      	mov	r0, r5
 802bafa:	b005      	add	sp, #20
 802bafc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bb00:	2500      	movs	r5, #0
 802bb02:	462c      	mov	r4, r5
 802bb04:	e7b0      	b.n	802ba68 <__gethex+0x68>
 802bb06:	2c00      	cmp	r4, #0
 802bb08:	d1c7      	bne.n	802ba9a <__gethex+0x9a>
 802bb0a:	4627      	mov	r7, r4
 802bb0c:	e7c7      	b.n	802ba9e <__gethex+0x9e>
 802bb0e:	464e      	mov	r6, r9
 802bb10:	462f      	mov	r7, r5
 802bb12:	2501      	movs	r5, #1
 802bb14:	e7c3      	b.n	802ba9e <__gethex+0x9e>
 802bb16:	2400      	movs	r4, #0
 802bb18:	1cb1      	adds	r1, r6, #2
 802bb1a:	e7cc      	b.n	802bab6 <__gethex+0xb6>
 802bb1c:	2401      	movs	r4, #1
 802bb1e:	e7fb      	b.n	802bb18 <__gethex+0x118>
 802bb20:	fb03 0002 	mla	r0, r3, r2, r0
 802bb24:	e7ce      	b.n	802bac4 <__gethex+0xc4>
 802bb26:	4631      	mov	r1, r6
 802bb28:	e7de      	b.n	802bae8 <__gethex+0xe8>
 802bb2a:	eba6 0309 	sub.w	r3, r6, r9
 802bb2e:	3b01      	subs	r3, #1
 802bb30:	4629      	mov	r1, r5
 802bb32:	2b07      	cmp	r3, #7
 802bb34:	dc0a      	bgt.n	802bb4c <__gethex+0x14c>
 802bb36:	9801      	ldr	r0, [sp, #4]
 802bb38:	f000 fa46 	bl	802bfc8 <_Balloc>
 802bb3c:	4604      	mov	r4, r0
 802bb3e:	b940      	cbnz	r0, 802bb52 <__gethex+0x152>
 802bb40:	4b5c      	ldr	r3, [pc, #368]	@ (802bcb4 <__gethex+0x2b4>)
 802bb42:	4602      	mov	r2, r0
 802bb44:	21e4      	movs	r1, #228	@ 0xe4
 802bb46:	485c      	ldr	r0, [pc, #368]	@ (802bcb8 <__gethex+0x2b8>)
 802bb48:	f7ff f8aa 	bl	802aca0 <__assert_func>
 802bb4c:	3101      	adds	r1, #1
 802bb4e:	105b      	asrs	r3, r3, #1
 802bb50:	e7ef      	b.n	802bb32 <__gethex+0x132>
 802bb52:	f100 0a14 	add.w	sl, r0, #20
 802bb56:	2300      	movs	r3, #0
 802bb58:	4655      	mov	r5, sl
 802bb5a:	469b      	mov	fp, r3
 802bb5c:	45b1      	cmp	r9, r6
 802bb5e:	d337      	bcc.n	802bbd0 <__gethex+0x1d0>
 802bb60:	f845 bb04 	str.w	fp, [r5], #4
 802bb64:	eba5 050a 	sub.w	r5, r5, sl
 802bb68:	10ad      	asrs	r5, r5, #2
 802bb6a:	6125      	str	r5, [r4, #16]
 802bb6c:	4658      	mov	r0, fp
 802bb6e:	f000 fb1d 	bl	802c1ac <__hi0bits>
 802bb72:	016d      	lsls	r5, r5, #5
 802bb74:	f8d8 6000 	ldr.w	r6, [r8]
 802bb78:	1a2d      	subs	r5, r5, r0
 802bb7a:	42b5      	cmp	r5, r6
 802bb7c:	dd54      	ble.n	802bc28 <__gethex+0x228>
 802bb7e:	1bad      	subs	r5, r5, r6
 802bb80:	4629      	mov	r1, r5
 802bb82:	4620      	mov	r0, r4
 802bb84:	f000 feae 	bl	802c8e4 <__any_on>
 802bb88:	4681      	mov	r9, r0
 802bb8a:	b178      	cbz	r0, 802bbac <__gethex+0x1ac>
 802bb8c:	1e6b      	subs	r3, r5, #1
 802bb8e:	1159      	asrs	r1, r3, #5
 802bb90:	f003 021f 	and.w	r2, r3, #31
 802bb94:	f85a 1021 	ldr.w	r1, [sl, r1, lsl #2]
 802bb98:	f04f 0901 	mov.w	r9, #1
 802bb9c:	fa09 f202 	lsl.w	r2, r9, r2
 802bba0:	420a      	tst	r2, r1
 802bba2:	d003      	beq.n	802bbac <__gethex+0x1ac>
 802bba4:	454b      	cmp	r3, r9
 802bba6:	dc36      	bgt.n	802bc16 <__gethex+0x216>
 802bba8:	f04f 0902 	mov.w	r9, #2
 802bbac:	4629      	mov	r1, r5
 802bbae:	4620      	mov	r0, r4
 802bbb0:	f7ff febe 	bl	802b930 <rshift>
 802bbb4:	442f      	add	r7, r5
 802bbb6:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802bbba:	42bb      	cmp	r3, r7
 802bbbc:	da42      	bge.n	802bc44 <__gethex+0x244>
 802bbbe:	9801      	ldr	r0, [sp, #4]
 802bbc0:	4621      	mov	r1, r4
 802bbc2:	f000 fa41 	bl	802c048 <_Bfree>
 802bbc6:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802bbc8:	2300      	movs	r3, #0
 802bbca:	6013      	str	r3, [r2, #0]
 802bbcc:	25a3      	movs	r5, #163	@ 0xa3
 802bbce:	e793      	b.n	802baf8 <__gethex+0xf8>
 802bbd0:	f816 2d01 	ldrb.w	r2, [r6, #-1]!
 802bbd4:	2a2e      	cmp	r2, #46	@ 0x2e
 802bbd6:	d012      	beq.n	802bbfe <__gethex+0x1fe>
 802bbd8:	2b20      	cmp	r3, #32
 802bbda:	d104      	bne.n	802bbe6 <__gethex+0x1e6>
 802bbdc:	f845 bb04 	str.w	fp, [r5], #4
 802bbe0:	f04f 0b00 	mov.w	fp, #0
 802bbe4:	465b      	mov	r3, fp
 802bbe6:	7830      	ldrb	r0, [r6, #0]
 802bbe8:	9303      	str	r3, [sp, #12]
 802bbea:	f7ff fef3 	bl	802b9d4 <__hexdig_fun>
 802bbee:	9b03      	ldr	r3, [sp, #12]
 802bbf0:	f000 000f 	and.w	r0, r0, #15
 802bbf4:	4098      	lsls	r0, r3
 802bbf6:	ea4b 0b00 	orr.w	fp, fp, r0
 802bbfa:	3304      	adds	r3, #4
 802bbfc:	e7ae      	b.n	802bb5c <__gethex+0x15c>
 802bbfe:	45b1      	cmp	r9, r6
 802bc00:	d8ea      	bhi.n	802bbd8 <__gethex+0x1d8>
 802bc02:	492b      	ldr	r1, [pc, #172]	@ (802bcb0 <__gethex+0x2b0>)
 802bc04:	9303      	str	r3, [sp, #12]
 802bc06:	2201      	movs	r2, #1
 802bc08:	4630      	mov	r0, r6
 802bc0a:	f7fe ff41 	bl	802aa90 <strncmp>
 802bc0e:	9b03      	ldr	r3, [sp, #12]
 802bc10:	2800      	cmp	r0, #0
 802bc12:	d1e1      	bne.n	802bbd8 <__gethex+0x1d8>
 802bc14:	e7a2      	b.n	802bb5c <__gethex+0x15c>
 802bc16:	1ea9      	subs	r1, r5, #2
 802bc18:	4620      	mov	r0, r4
 802bc1a:	f000 fe63 	bl	802c8e4 <__any_on>
 802bc1e:	2800      	cmp	r0, #0
 802bc20:	d0c2      	beq.n	802bba8 <__gethex+0x1a8>
 802bc22:	f04f 0903 	mov.w	r9, #3
 802bc26:	e7c1      	b.n	802bbac <__gethex+0x1ac>
 802bc28:	da09      	bge.n	802bc3e <__gethex+0x23e>
 802bc2a:	1b75      	subs	r5, r6, r5
 802bc2c:	4621      	mov	r1, r4
 802bc2e:	9801      	ldr	r0, [sp, #4]
 802bc30:	462a      	mov	r2, r5
 802bc32:	f000 fc21 	bl	802c478 <__lshift>
 802bc36:	1b7f      	subs	r7, r7, r5
 802bc38:	4604      	mov	r4, r0
 802bc3a:	f100 0a14 	add.w	sl, r0, #20
 802bc3e:	f04f 0900 	mov.w	r9, #0
 802bc42:	e7b8      	b.n	802bbb6 <__gethex+0x1b6>
 802bc44:	f8d8 5004 	ldr.w	r5, [r8, #4]
 802bc48:	42bd      	cmp	r5, r7
 802bc4a:	dd6f      	ble.n	802bd2c <__gethex+0x32c>
 802bc4c:	1bed      	subs	r5, r5, r7
 802bc4e:	42ae      	cmp	r6, r5
 802bc50:	dc34      	bgt.n	802bcbc <__gethex+0x2bc>
 802bc52:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802bc56:	2b02      	cmp	r3, #2
 802bc58:	d022      	beq.n	802bca0 <__gethex+0x2a0>
 802bc5a:	2b03      	cmp	r3, #3
 802bc5c:	d024      	beq.n	802bca8 <__gethex+0x2a8>
 802bc5e:	2b01      	cmp	r3, #1
 802bc60:	d115      	bne.n	802bc8e <__gethex+0x28e>
 802bc62:	42ae      	cmp	r6, r5
 802bc64:	d113      	bne.n	802bc8e <__gethex+0x28e>
 802bc66:	2e01      	cmp	r6, #1
 802bc68:	d10b      	bne.n	802bc82 <__gethex+0x282>
 802bc6a:	9a02      	ldr	r2, [sp, #8]
 802bc6c:	f8d8 3004 	ldr.w	r3, [r8, #4]
 802bc70:	6013      	str	r3, [r2, #0]
 802bc72:	2301      	movs	r3, #1
 802bc74:	6123      	str	r3, [r4, #16]
 802bc76:	f8ca 3000 	str.w	r3, [sl]
 802bc7a:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802bc7c:	2562      	movs	r5, #98	@ 0x62
 802bc7e:	601c      	str	r4, [r3, #0]
 802bc80:	e73a      	b.n	802baf8 <__gethex+0xf8>
 802bc82:	1e71      	subs	r1, r6, #1
 802bc84:	4620      	mov	r0, r4
 802bc86:	f000 fe2d 	bl	802c8e4 <__any_on>
 802bc8a:	2800      	cmp	r0, #0
 802bc8c:	d1ed      	bne.n	802bc6a <__gethex+0x26a>
 802bc8e:	9801      	ldr	r0, [sp, #4]
 802bc90:	4621      	mov	r1, r4
 802bc92:	f000 f9d9 	bl	802c048 <_Bfree>
 802bc96:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802bc98:	2300      	movs	r3, #0
 802bc9a:	6013      	str	r3, [r2, #0]
 802bc9c:	2550      	movs	r5, #80	@ 0x50
 802bc9e:	e72b      	b.n	802baf8 <__gethex+0xf8>
 802bca0:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bca2:	2b00      	cmp	r3, #0
 802bca4:	d1f3      	bne.n	802bc8e <__gethex+0x28e>
 802bca6:	e7e0      	b.n	802bc6a <__gethex+0x26a>
 802bca8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bcaa:	2b00      	cmp	r3, #0
 802bcac:	d1dd      	bne.n	802bc6a <__gethex+0x26a>
 802bcae:	e7ee      	b.n	802bc8e <__gethex+0x28e>
 802bcb0:	08031bdd 	.word	0x08031bdd
 802bcb4:	08031e0e 	.word	0x08031e0e
 802bcb8:	08031e1f 	.word	0x08031e1f
 802bcbc:	1e6f      	subs	r7, r5, #1
 802bcbe:	f1b9 0f00 	cmp.w	r9, #0
 802bcc2:	d130      	bne.n	802bd26 <__gethex+0x326>
 802bcc4:	b127      	cbz	r7, 802bcd0 <__gethex+0x2d0>
 802bcc6:	4639      	mov	r1, r7
 802bcc8:	4620      	mov	r0, r4
 802bcca:	f000 fe0b 	bl	802c8e4 <__any_on>
 802bcce:	4681      	mov	r9, r0
 802bcd0:	117a      	asrs	r2, r7, #5
 802bcd2:	2301      	movs	r3, #1
 802bcd4:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
 802bcd8:	f007 071f 	and.w	r7, r7, #31
 802bcdc:	40bb      	lsls	r3, r7
 802bcde:	4213      	tst	r3, r2
 802bce0:	4629      	mov	r1, r5
 802bce2:	4620      	mov	r0, r4
 802bce4:	bf18      	it	ne
 802bce6:	f049 0902 	orrne.w	r9, r9, #2
 802bcea:	f7ff fe21 	bl	802b930 <rshift>
 802bcee:	f8d8 7004 	ldr.w	r7, [r8, #4]
 802bcf2:	1b76      	subs	r6, r6, r5
 802bcf4:	2502      	movs	r5, #2
 802bcf6:	f1b9 0f00 	cmp.w	r9, #0
 802bcfa:	d047      	beq.n	802bd8c <__gethex+0x38c>
 802bcfc:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802bd00:	2b02      	cmp	r3, #2
 802bd02:	d015      	beq.n	802bd30 <__gethex+0x330>
 802bd04:	2b03      	cmp	r3, #3
 802bd06:	d017      	beq.n	802bd38 <__gethex+0x338>
 802bd08:	2b01      	cmp	r3, #1
 802bd0a:	d109      	bne.n	802bd20 <__gethex+0x320>
 802bd0c:	f019 0f02 	tst.w	r9, #2
 802bd10:	d006      	beq.n	802bd20 <__gethex+0x320>
 802bd12:	f8da 3000 	ldr.w	r3, [sl]
 802bd16:	ea49 0903 	orr.w	r9, r9, r3
 802bd1a:	f019 0f01 	tst.w	r9, #1
 802bd1e:	d10e      	bne.n	802bd3e <__gethex+0x33e>
 802bd20:	f045 0510 	orr.w	r5, r5, #16
 802bd24:	e032      	b.n	802bd8c <__gethex+0x38c>
 802bd26:	f04f 0901 	mov.w	r9, #1
 802bd2a:	e7d1      	b.n	802bcd0 <__gethex+0x2d0>
 802bd2c:	2501      	movs	r5, #1
 802bd2e:	e7e2      	b.n	802bcf6 <__gethex+0x2f6>
 802bd30:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bd32:	f1c3 0301 	rsb	r3, r3, #1
 802bd36:	930f      	str	r3, [sp, #60]	@ 0x3c
 802bd38:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bd3a:	2b00      	cmp	r3, #0
 802bd3c:	d0f0      	beq.n	802bd20 <__gethex+0x320>
 802bd3e:	f8d4 b010 	ldr.w	fp, [r4, #16]
 802bd42:	f104 0314 	add.w	r3, r4, #20
 802bd46:	ea4f 0a8b 	mov.w	sl, fp, lsl #2
 802bd4a:	eb03 018b 	add.w	r1, r3, fp, lsl #2
 802bd4e:	f04f 0c00 	mov.w	ip, #0
 802bd52:	4618      	mov	r0, r3
 802bd54:	f853 2b04 	ldr.w	r2, [r3], #4
 802bd58:	f1b2 3fff 	cmp.w	r2, #4294967295	@ 0xffffffff
 802bd5c:	d01b      	beq.n	802bd96 <__gethex+0x396>
 802bd5e:	3201      	adds	r2, #1
 802bd60:	6002      	str	r2, [r0, #0]
 802bd62:	2d02      	cmp	r5, #2
 802bd64:	f104 0314 	add.w	r3, r4, #20
 802bd68:	d13c      	bne.n	802bde4 <__gethex+0x3e4>
 802bd6a:	f8d8 2000 	ldr.w	r2, [r8]
 802bd6e:	3a01      	subs	r2, #1
 802bd70:	42b2      	cmp	r2, r6
 802bd72:	d109      	bne.n	802bd88 <__gethex+0x388>
 802bd74:	1171      	asrs	r1, r6, #5
 802bd76:	2201      	movs	r2, #1
 802bd78:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 802bd7c:	f006 061f 	and.w	r6, r6, #31
 802bd80:	fa02 f606 	lsl.w	r6, r2, r6
 802bd84:	421e      	tst	r6, r3
 802bd86:	d13a      	bne.n	802bdfe <__gethex+0x3fe>
 802bd88:	f045 0520 	orr.w	r5, r5, #32
 802bd8c:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802bd8e:	601c      	str	r4, [r3, #0]
 802bd90:	9b02      	ldr	r3, [sp, #8]
 802bd92:	601f      	str	r7, [r3, #0]
 802bd94:	e6b0      	b.n	802baf8 <__gethex+0xf8>
 802bd96:	4299      	cmp	r1, r3
 802bd98:	f843 cc04 	str.w	ip, [r3, #-4]
 802bd9c:	d8d9      	bhi.n	802bd52 <__gethex+0x352>
 802bd9e:	68a3      	ldr	r3, [r4, #8]
 802bda0:	459b      	cmp	fp, r3
 802bda2:	db17      	blt.n	802bdd4 <__gethex+0x3d4>
 802bda4:	6861      	ldr	r1, [r4, #4]
 802bda6:	9801      	ldr	r0, [sp, #4]
 802bda8:	3101      	adds	r1, #1
 802bdaa:	f000 f90d 	bl	802bfc8 <_Balloc>
 802bdae:	4681      	mov	r9, r0
 802bdb0:	b918      	cbnz	r0, 802bdba <__gethex+0x3ba>
 802bdb2:	4b1a      	ldr	r3, [pc, #104]	@ (802be1c <__gethex+0x41c>)
 802bdb4:	4602      	mov	r2, r0
 802bdb6:	2184      	movs	r1, #132	@ 0x84
 802bdb8:	e6c5      	b.n	802bb46 <__gethex+0x146>
 802bdba:	6922      	ldr	r2, [r4, #16]
 802bdbc:	3202      	adds	r2, #2
 802bdbe:	f104 010c 	add.w	r1, r4, #12
 802bdc2:	0092      	lsls	r2, r2, #2
 802bdc4:	300c      	adds	r0, #12
 802bdc6:	f7fe ff52 	bl	802ac6e <memcpy>
 802bdca:	4621      	mov	r1, r4
 802bdcc:	9801      	ldr	r0, [sp, #4]
 802bdce:	f000 f93b 	bl	802c048 <_Bfree>
 802bdd2:	464c      	mov	r4, r9
 802bdd4:	6923      	ldr	r3, [r4, #16]
 802bdd6:	1c5a      	adds	r2, r3, #1
 802bdd8:	eb04 0383 	add.w	r3, r4, r3, lsl #2
 802bddc:	6122      	str	r2, [r4, #16]
 802bdde:	2201      	movs	r2, #1
 802bde0:	615a      	str	r2, [r3, #20]
 802bde2:	e7be      	b.n	802bd62 <__gethex+0x362>
 802bde4:	6922      	ldr	r2, [r4, #16]
 802bde6:	455a      	cmp	r2, fp
 802bde8:	dd0b      	ble.n	802be02 <__gethex+0x402>
 802bdea:	2101      	movs	r1, #1
 802bdec:	4620      	mov	r0, r4
 802bdee:	f7ff fd9f 	bl	802b930 <rshift>
 802bdf2:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802bdf6:	3701      	adds	r7, #1
 802bdf8:	42bb      	cmp	r3, r7
 802bdfa:	f6ff aee0 	blt.w	802bbbe <__gethex+0x1be>
 802bdfe:	2501      	movs	r5, #1
 802be00:	e7c2      	b.n	802bd88 <__gethex+0x388>
 802be02:	f016 061f 	ands.w	r6, r6, #31
 802be06:	d0fa      	beq.n	802bdfe <__gethex+0x3fe>
 802be08:	4453      	add	r3, sl
 802be0a:	f1c6 0620 	rsb	r6, r6, #32
 802be0e:	f853 0c04 	ldr.w	r0, [r3, #-4]
 802be12:	f000 f9cb 	bl	802c1ac <__hi0bits>
 802be16:	42b0      	cmp	r0, r6
 802be18:	dbe7      	blt.n	802bdea <__gethex+0x3ea>
 802be1a:	e7f0      	b.n	802bdfe <__gethex+0x3fe>
 802be1c:	08031e0e 	.word	0x08031e0e

0802be20 <L_shift>:
 802be20:	f1c2 0208 	rsb	r2, r2, #8
 802be24:	0092      	lsls	r2, r2, #2
 802be26:	b570      	push	{r4, r5, r6, lr}
 802be28:	f1c2 0620 	rsb	r6, r2, #32
 802be2c:	6843      	ldr	r3, [r0, #4]
 802be2e:	6804      	ldr	r4, [r0, #0]
 802be30:	fa03 f506 	lsl.w	r5, r3, r6
 802be34:	432c      	orrs	r4, r5
 802be36:	40d3      	lsrs	r3, r2
 802be38:	6004      	str	r4, [r0, #0]
 802be3a:	f840 3f04 	str.w	r3, [r0, #4]!
 802be3e:	4288      	cmp	r0, r1
 802be40:	d3f4      	bcc.n	802be2c <L_shift+0xc>
 802be42:	bd70      	pop	{r4, r5, r6, pc}

0802be44 <__match>:
 802be44:	b530      	push	{r4, r5, lr}
 802be46:	6803      	ldr	r3, [r0, #0]
 802be48:	3301      	adds	r3, #1
 802be4a:	f811 4b01 	ldrb.w	r4, [r1], #1
 802be4e:	b914      	cbnz	r4, 802be56 <__match+0x12>
 802be50:	6003      	str	r3, [r0, #0]
 802be52:	2001      	movs	r0, #1
 802be54:	bd30      	pop	{r4, r5, pc}
 802be56:	f813 2b01 	ldrb.w	r2, [r3], #1
 802be5a:	f1a2 0541 	sub.w	r5, r2, #65	@ 0x41
 802be5e:	2d19      	cmp	r5, #25
 802be60:	bf98      	it	ls
 802be62:	3220      	addls	r2, #32
 802be64:	42a2      	cmp	r2, r4
 802be66:	d0f0      	beq.n	802be4a <__match+0x6>
 802be68:	2000      	movs	r0, #0
 802be6a:	e7f3      	b.n	802be54 <__match+0x10>

0802be6c <__hexnan>:
 802be6c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802be70:	680b      	ldr	r3, [r1, #0]
 802be72:	6801      	ldr	r1, [r0, #0]
 802be74:	115e      	asrs	r6, r3, #5
 802be76:	eb02 0686 	add.w	r6, r2, r6, lsl #2
 802be7a:	f013 031f 	ands.w	r3, r3, #31
 802be7e:	b087      	sub	sp, #28
 802be80:	bf18      	it	ne
 802be82:	3604      	addne	r6, #4
 802be84:	2500      	movs	r5, #0
 802be86:	1f37      	subs	r7, r6, #4
 802be88:	4682      	mov	sl, r0
 802be8a:	4690      	mov	r8, r2
 802be8c:	9301      	str	r3, [sp, #4]
 802be8e:	f846 5c04 	str.w	r5, [r6, #-4]
 802be92:	46b9      	mov	r9, r7
 802be94:	463c      	mov	r4, r7
 802be96:	9502      	str	r5, [sp, #8]
 802be98:	46ab      	mov	fp, r5
 802be9a:	784a      	ldrb	r2, [r1, #1]
 802be9c:	1c4b      	adds	r3, r1, #1
 802be9e:	9303      	str	r3, [sp, #12]
 802bea0:	b342      	cbz	r2, 802bef4 <__hexnan+0x88>
 802bea2:	4610      	mov	r0, r2
 802bea4:	9105      	str	r1, [sp, #20]
 802bea6:	9204      	str	r2, [sp, #16]
 802bea8:	f7ff fd94 	bl	802b9d4 <__hexdig_fun>
 802beac:	2800      	cmp	r0, #0
 802beae:	d151      	bne.n	802bf54 <__hexnan+0xe8>
 802beb0:	9a04      	ldr	r2, [sp, #16]
 802beb2:	9905      	ldr	r1, [sp, #20]
 802beb4:	2a20      	cmp	r2, #32
 802beb6:	d818      	bhi.n	802beea <__hexnan+0x7e>
 802beb8:	9b02      	ldr	r3, [sp, #8]
 802beba:	459b      	cmp	fp, r3
 802bebc:	dd13      	ble.n	802bee6 <__hexnan+0x7a>
 802bebe:	454c      	cmp	r4, r9
 802bec0:	d206      	bcs.n	802bed0 <__hexnan+0x64>
 802bec2:	2d07      	cmp	r5, #7
 802bec4:	dc04      	bgt.n	802bed0 <__hexnan+0x64>
 802bec6:	462a      	mov	r2, r5
 802bec8:	4649      	mov	r1, r9
 802beca:	4620      	mov	r0, r4
 802becc:	f7ff ffa8 	bl	802be20 <L_shift>
 802bed0:	4544      	cmp	r4, r8
 802bed2:	d952      	bls.n	802bf7a <__hexnan+0x10e>
 802bed4:	2300      	movs	r3, #0
 802bed6:	f1a4 0904 	sub.w	r9, r4, #4
 802beda:	f844 3c04 	str.w	r3, [r4, #-4]
 802bede:	f8cd b008 	str.w	fp, [sp, #8]
 802bee2:	464c      	mov	r4, r9
 802bee4:	461d      	mov	r5, r3
 802bee6:	9903      	ldr	r1, [sp, #12]
 802bee8:	e7d7      	b.n	802be9a <__hexnan+0x2e>
 802beea:	2a29      	cmp	r2, #41	@ 0x29
 802beec:	d157      	bne.n	802bf9e <__hexnan+0x132>
 802beee:	3102      	adds	r1, #2
 802bef0:	f8ca 1000 	str.w	r1, [sl]
 802bef4:	f1bb 0f00 	cmp.w	fp, #0
 802bef8:	d051      	beq.n	802bf9e <__hexnan+0x132>
 802befa:	454c      	cmp	r4, r9
 802befc:	d206      	bcs.n	802bf0c <__hexnan+0xa0>
 802befe:	2d07      	cmp	r5, #7
 802bf00:	dc04      	bgt.n	802bf0c <__hexnan+0xa0>
 802bf02:	462a      	mov	r2, r5
 802bf04:	4649      	mov	r1, r9
 802bf06:	4620      	mov	r0, r4
 802bf08:	f7ff ff8a 	bl	802be20 <L_shift>
 802bf0c:	4544      	cmp	r4, r8
 802bf0e:	d936      	bls.n	802bf7e <__hexnan+0x112>
 802bf10:	f1a8 0204 	sub.w	r2, r8, #4
 802bf14:	4623      	mov	r3, r4
 802bf16:	f853 1b04 	ldr.w	r1, [r3], #4
 802bf1a:	f842 1f04 	str.w	r1, [r2, #4]!
 802bf1e:	429f      	cmp	r7, r3
 802bf20:	d2f9      	bcs.n	802bf16 <__hexnan+0xaa>
 802bf22:	1b3b      	subs	r3, r7, r4
 802bf24:	f023 0303 	bic.w	r3, r3, #3
 802bf28:	3304      	adds	r3, #4
 802bf2a:	3401      	adds	r4, #1
 802bf2c:	3e03      	subs	r6, #3
 802bf2e:	42b4      	cmp	r4, r6
 802bf30:	bf88      	it	hi
 802bf32:	2304      	movhi	r3, #4
 802bf34:	4443      	add	r3, r8
 802bf36:	2200      	movs	r2, #0
 802bf38:	f843 2b04 	str.w	r2, [r3], #4
 802bf3c:	429f      	cmp	r7, r3
 802bf3e:	d2fb      	bcs.n	802bf38 <__hexnan+0xcc>
 802bf40:	683b      	ldr	r3, [r7, #0]
 802bf42:	b91b      	cbnz	r3, 802bf4c <__hexnan+0xe0>
 802bf44:	4547      	cmp	r7, r8
 802bf46:	d128      	bne.n	802bf9a <__hexnan+0x12e>
 802bf48:	2301      	movs	r3, #1
 802bf4a:	603b      	str	r3, [r7, #0]
 802bf4c:	2005      	movs	r0, #5
 802bf4e:	b007      	add	sp, #28
 802bf50:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bf54:	3501      	adds	r5, #1
 802bf56:	2d08      	cmp	r5, #8
 802bf58:	f10b 0b01 	add.w	fp, fp, #1
 802bf5c:	dd06      	ble.n	802bf6c <__hexnan+0x100>
 802bf5e:	4544      	cmp	r4, r8
 802bf60:	d9c1      	bls.n	802bee6 <__hexnan+0x7a>
 802bf62:	2300      	movs	r3, #0
 802bf64:	f844 3c04 	str.w	r3, [r4, #-4]
 802bf68:	2501      	movs	r5, #1
 802bf6a:	3c04      	subs	r4, #4
 802bf6c:	6822      	ldr	r2, [r4, #0]
 802bf6e:	f000 000f 	and.w	r0, r0, #15
 802bf72:	ea40 1002 	orr.w	r0, r0, r2, lsl #4
 802bf76:	6020      	str	r0, [r4, #0]
 802bf78:	e7b5      	b.n	802bee6 <__hexnan+0x7a>
 802bf7a:	2508      	movs	r5, #8
 802bf7c:	e7b3      	b.n	802bee6 <__hexnan+0x7a>
 802bf7e:	9b01      	ldr	r3, [sp, #4]
 802bf80:	2b00      	cmp	r3, #0
 802bf82:	d0dd      	beq.n	802bf40 <__hexnan+0xd4>
 802bf84:	f1c3 0320 	rsb	r3, r3, #32
 802bf88:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802bf8c:	40da      	lsrs	r2, r3
 802bf8e:	f856 3c04 	ldr.w	r3, [r6, #-4]
 802bf92:	4013      	ands	r3, r2
 802bf94:	f846 3c04 	str.w	r3, [r6, #-4]
 802bf98:	e7d2      	b.n	802bf40 <__hexnan+0xd4>
 802bf9a:	3f04      	subs	r7, #4
 802bf9c:	e7d0      	b.n	802bf40 <__hexnan+0xd4>
 802bf9e:	2004      	movs	r0, #4
 802bfa0:	e7d5      	b.n	802bf4e <__hexnan+0xe2>

0802bfa2 <__ascii_mbtowc>:
 802bfa2:	b082      	sub	sp, #8
 802bfa4:	b901      	cbnz	r1, 802bfa8 <__ascii_mbtowc+0x6>
 802bfa6:	a901      	add	r1, sp, #4
 802bfa8:	b142      	cbz	r2, 802bfbc <__ascii_mbtowc+0x1a>
 802bfaa:	b14b      	cbz	r3, 802bfc0 <__ascii_mbtowc+0x1e>
 802bfac:	7813      	ldrb	r3, [r2, #0]
 802bfae:	600b      	str	r3, [r1, #0]
 802bfb0:	7812      	ldrb	r2, [r2, #0]
 802bfb2:	1e10      	subs	r0, r2, #0
 802bfb4:	bf18      	it	ne
 802bfb6:	2001      	movne	r0, #1
 802bfb8:	b002      	add	sp, #8
 802bfba:	4770      	bx	lr
 802bfbc:	4610      	mov	r0, r2
 802bfbe:	e7fb      	b.n	802bfb8 <__ascii_mbtowc+0x16>
 802bfc0:	f06f 0001 	mvn.w	r0, #1
 802bfc4:	e7f8      	b.n	802bfb8 <__ascii_mbtowc+0x16>
	...

0802bfc8 <_Balloc>:
 802bfc8:	b570      	push	{r4, r5, r6, lr}
 802bfca:	69c6      	ldr	r6, [r0, #28]
 802bfcc:	4604      	mov	r4, r0
 802bfce:	460d      	mov	r5, r1
 802bfd0:	b976      	cbnz	r6, 802bff0 <_Balloc+0x28>
 802bfd2:	2010      	movs	r0, #16
 802bfd4:	f7fc ffda 	bl	8028f8c <malloc>
 802bfd8:	4602      	mov	r2, r0
 802bfda:	61e0      	str	r0, [r4, #28]
 802bfdc:	b920      	cbnz	r0, 802bfe8 <_Balloc+0x20>
 802bfde:	4b18      	ldr	r3, [pc, #96]	@ (802c040 <_Balloc+0x78>)
 802bfe0:	4818      	ldr	r0, [pc, #96]	@ (802c044 <_Balloc+0x7c>)
 802bfe2:	216b      	movs	r1, #107	@ 0x6b
 802bfe4:	f7fe fe5c 	bl	802aca0 <__assert_func>
 802bfe8:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802bfec:	6006      	str	r6, [r0, #0]
 802bfee:	60c6      	str	r6, [r0, #12]
 802bff0:	69e6      	ldr	r6, [r4, #28]
 802bff2:	68f3      	ldr	r3, [r6, #12]
 802bff4:	b183      	cbz	r3, 802c018 <_Balloc+0x50>
 802bff6:	69e3      	ldr	r3, [r4, #28]
 802bff8:	68db      	ldr	r3, [r3, #12]
 802bffa:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
 802bffe:	b9b8      	cbnz	r0, 802c030 <_Balloc+0x68>
 802c000:	2101      	movs	r1, #1
 802c002:	fa01 f605 	lsl.w	r6, r1, r5
 802c006:	1d72      	adds	r2, r6, #5
 802c008:	0092      	lsls	r2, r2, #2
 802c00a:	4620      	mov	r0, r4
 802c00c:	f001 f883 	bl	802d116 <_calloc_r>
 802c010:	b160      	cbz	r0, 802c02c <_Balloc+0x64>
 802c012:	e9c0 5601 	strd	r5, r6, [r0, #4]
 802c016:	e00e      	b.n	802c036 <_Balloc+0x6e>
 802c018:	2221      	movs	r2, #33	@ 0x21
 802c01a:	2104      	movs	r1, #4
 802c01c:	4620      	mov	r0, r4
 802c01e:	f001 f87a 	bl	802d116 <_calloc_r>
 802c022:	69e3      	ldr	r3, [r4, #28]
 802c024:	60f0      	str	r0, [r6, #12]
 802c026:	68db      	ldr	r3, [r3, #12]
 802c028:	2b00      	cmp	r3, #0
 802c02a:	d1e4      	bne.n	802bff6 <_Balloc+0x2e>
 802c02c:	2000      	movs	r0, #0
 802c02e:	bd70      	pop	{r4, r5, r6, pc}
 802c030:	6802      	ldr	r2, [r0, #0]
 802c032:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
 802c036:	2300      	movs	r3, #0
 802c038:	e9c0 3303 	strd	r3, r3, [r0, #12]
 802c03c:	e7f7      	b.n	802c02e <_Balloc+0x66>
 802c03e:	bf00      	nop
 802c040:	08031b6e 	.word	0x08031b6e
 802c044:	08031e7f 	.word	0x08031e7f

0802c048 <_Bfree>:
 802c048:	b570      	push	{r4, r5, r6, lr}
 802c04a:	69c6      	ldr	r6, [r0, #28]
 802c04c:	4605      	mov	r5, r0
 802c04e:	460c      	mov	r4, r1
 802c050:	b976      	cbnz	r6, 802c070 <_Bfree+0x28>
 802c052:	2010      	movs	r0, #16
 802c054:	f7fc ff9a 	bl	8028f8c <malloc>
 802c058:	4602      	mov	r2, r0
 802c05a:	61e8      	str	r0, [r5, #28]
 802c05c:	b920      	cbnz	r0, 802c068 <_Bfree+0x20>
 802c05e:	4b09      	ldr	r3, [pc, #36]	@ (802c084 <_Bfree+0x3c>)
 802c060:	4809      	ldr	r0, [pc, #36]	@ (802c088 <_Bfree+0x40>)
 802c062:	218f      	movs	r1, #143	@ 0x8f
 802c064:	f7fe fe1c 	bl	802aca0 <__assert_func>
 802c068:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802c06c:	6006      	str	r6, [r0, #0]
 802c06e:	60c6      	str	r6, [r0, #12]
 802c070:	b13c      	cbz	r4, 802c082 <_Bfree+0x3a>
 802c072:	69eb      	ldr	r3, [r5, #28]
 802c074:	6862      	ldr	r2, [r4, #4]
 802c076:	68db      	ldr	r3, [r3, #12]
 802c078:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 802c07c:	6021      	str	r1, [r4, #0]
 802c07e:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
 802c082:	bd70      	pop	{r4, r5, r6, pc}
 802c084:	08031b6e 	.word	0x08031b6e
 802c088:	08031e7f 	.word	0x08031e7f

0802c08c <__multadd>:
 802c08c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c090:	690d      	ldr	r5, [r1, #16]
 802c092:	4607      	mov	r7, r0
 802c094:	460c      	mov	r4, r1
 802c096:	461e      	mov	r6, r3
 802c098:	f101 0c14 	add.w	ip, r1, #20
 802c09c:	2000      	movs	r0, #0
 802c09e:	f8dc 3000 	ldr.w	r3, [ip]
 802c0a2:	b299      	uxth	r1, r3
 802c0a4:	fb02 6101 	mla	r1, r2, r1, r6
 802c0a8:	0c1e      	lsrs	r6, r3, #16
 802c0aa:	0c0b      	lsrs	r3, r1, #16
 802c0ac:	fb02 3306 	mla	r3, r2, r6, r3
 802c0b0:	b289      	uxth	r1, r1
 802c0b2:	3001      	adds	r0, #1
 802c0b4:	eb01 4103 	add.w	r1, r1, r3, lsl #16
 802c0b8:	4285      	cmp	r5, r0
 802c0ba:	f84c 1b04 	str.w	r1, [ip], #4
 802c0be:	ea4f 4613 	mov.w	r6, r3, lsr #16
 802c0c2:	dcec      	bgt.n	802c09e <__multadd+0x12>
 802c0c4:	b30e      	cbz	r6, 802c10a <__multadd+0x7e>
 802c0c6:	68a3      	ldr	r3, [r4, #8]
 802c0c8:	42ab      	cmp	r3, r5
 802c0ca:	dc19      	bgt.n	802c100 <__multadd+0x74>
 802c0cc:	6861      	ldr	r1, [r4, #4]
 802c0ce:	4638      	mov	r0, r7
 802c0d0:	3101      	adds	r1, #1
 802c0d2:	f7ff ff79 	bl	802bfc8 <_Balloc>
 802c0d6:	4680      	mov	r8, r0
 802c0d8:	b928      	cbnz	r0, 802c0e6 <__multadd+0x5a>
 802c0da:	4602      	mov	r2, r0
 802c0dc:	4b0c      	ldr	r3, [pc, #48]	@ (802c110 <__multadd+0x84>)
 802c0de:	480d      	ldr	r0, [pc, #52]	@ (802c114 <__multadd+0x88>)
 802c0e0:	21ba      	movs	r1, #186	@ 0xba
 802c0e2:	f7fe fddd 	bl	802aca0 <__assert_func>
 802c0e6:	6922      	ldr	r2, [r4, #16]
 802c0e8:	3202      	adds	r2, #2
 802c0ea:	f104 010c 	add.w	r1, r4, #12
 802c0ee:	0092      	lsls	r2, r2, #2
 802c0f0:	300c      	adds	r0, #12
 802c0f2:	f7fe fdbc 	bl	802ac6e <memcpy>
 802c0f6:	4621      	mov	r1, r4
 802c0f8:	4638      	mov	r0, r7
 802c0fa:	f7ff ffa5 	bl	802c048 <_Bfree>
 802c0fe:	4644      	mov	r4, r8
 802c100:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 802c104:	3501      	adds	r5, #1
 802c106:	615e      	str	r6, [r3, #20]
 802c108:	6125      	str	r5, [r4, #16]
 802c10a:	4620      	mov	r0, r4
 802c10c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c110:	08031e0e 	.word	0x08031e0e
 802c114:	08031e7f 	.word	0x08031e7f

0802c118 <__s2b>:
 802c118:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802c11c:	460c      	mov	r4, r1
 802c11e:	4615      	mov	r5, r2
 802c120:	461f      	mov	r7, r3
 802c122:	2209      	movs	r2, #9
 802c124:	3308      	adds	r3, #8
 802c126:	4606      	mov	r6, r0
 802c128:	fb93 f3f2 	sdiv	r3, r3, r2
 802c12c:	2100      	movs	r1, #0
 802c12e:	2201      	movs	r2, #1
 802c130:	429a      	cmp	r2, r3
 802c132:	db09      	blt.n	802c148 <__s2b+0x30>
 802c134:	4630      	mov	r0, r6
 802c136:	f7ff ff47 	bl	802bfc8 <_Balloc>
 802c13a:	b940      	cbnz	r0, 802c14e <__s2b+0x36>
 802c13c:	4602      	mov	r2, r0
 802c13e:	4b19      	ldr	r3, [pc, #100]	@ (802c1a4 <__s2b+0x8c>)
 802c140:	4819      	ldr	r0, [pc, #100]	@ (802c1a8 <__s2b+0x90>)
 802c142:	21d3      	movs	r1, #211	@ 0xd3
 802c144:	f7fe fdac 	bl	802aca0 <__assert_func>
 802c148:	0052      	lsls	r2, r2, #1
 802c14a:	3101      	adds	r1, #1
 802c14c:	e7f0      	b.n	802c130 <__s2b+0x18>
 802c14e:	9b08      	ldr	r3, [sp, #32]
 802c150:	6143      	str	r3, [r0, #20]
 802c152:	2d09      	cmp	r5, #9
 802c154:	f04f 0301 	mov.w	r3, #1
 802c158:	6103      	str	r3, [r0, #16]
 802c15a:	dd16      	ble.n	802c18a <__s2b+0x72>
 802c15c:	f104 0909 	add.w	r9, r4, #9
 802c160:	46c8      	mov	r8, r9
 802c162:	442c      	add	r4, r5
 802c164:	f818 3b01 	ldrb.w	r3, [r8], #1
 802c168:	4601      	mov	r1, r0
 802c16a:	3b30      	subs	r3, #48	@ 0x30
 802c16c:	220a      	movs	r2, #10
 802c16e:	4630      	mov	r0, r6
 802c170:	f7ff ff8c 	bl	802c08c <__multadd>
 802c174:	45a0      	cmp	r8, r4
 802c176:	d1f5      	bne.n	802c164 <__s2b+0x4c>
 802c178:	f1a5 0408 	sub.w	r4, r5, #8
 802c17c:	444c      	add	r4, r9
 802c17e:	1b2d      	subs	r5, r5, r4
 802c180:	1963      	adds	r3, r4, r5
 802c182:	42bb      	cmp	r3, r7
 802c184:	db04      	blt.n	802c190 <__s2b+0x78>
 802c186:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802c18a:	340a      	adds	r4, #10
 802c18c:	2509      	movs	r5, #9
 802c18e:	e7f6      	b.n	802c17e <__s2b+0x66>
 802c190:	f814 3b01 	ldrb.w	r3, [r4], #1
 802c194:	4601      	mov	r1, r0
 802c196:	3b30      	subs	r3, #48	@ 0x30
 802c198:	220a      	movs	r2, #10
 802c19a:	4630      	mov	r0, r6
 802c19c:	f7ff ff76 	bl	802c08c <__multadd>
 802c1a0:	e7ee      	b.n	802c180 <__s2b+0x68>
 802c1a2:	bf00      	nop
 802c1a4:	08031e0e 	.word	0x08031e0e
 802c1a8:	08031e7f 	.word	0x08031e7f

0802c1ac <__hi0bits>:
 802c1ac:	f5b0 3f80 	cmp.w	r0, #65536	@ 0x10000
 802c1b0:	4603      	mov	r3, r0
 802c1b2:	bf36      	itet	cc
 802c1b4:	0403      	lslcc	r3, r0, #16
 802c1b6:	2000      	movcs	r0, #0
 802c1b8:	2010      	movcc	r0, #16
 802c1ba:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 802c1be:	bf3c      	itt	cc
 802c1c0:	021b      	lslcc	r3, r3, #8
 802c1c2:	3008      	addcc	r0, #8
 802c1c4:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 802c1c8:	bf3c      	itt	cc
 802c1ca:	011b      	lslcc	r3, r3, #4
 802c1cc:	3004      	addcc	r0, #4
 802c1ce:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802c1d2:	bf3c      	itt	cc
 802c1d4:	009b      	lslcc	r3, r3, #2
 802c1d6:	3002      	addcc	r0, #2
 802c1d8:	2b00      	cmp	r3, #0
 802c1da:	db05      	blt.n	802c1e8 <__hi0bits+0x3c>
 802c1dc:	f013 4f80 	tst.w	r3, #1073741824	@ 0x40000000
 802c1e0:	f100 0001 	add.w	r0, r0, #1
 802c1e4:	bf08      	it	eq
 802c1e6:	2020      	moveq	r0, #32
 802c1e8:	4770      	bx	lr

0802c1ea <__lo0bits>:
 802c1ea:	6803      	ldr	r3, [r0, #0]
 802c1ec:	4602      	mov	r2, r0
 802c1ee:	f013 0007 	ands.w	r0, r3, #7
 802c1f2:	d00b      	beq.n	802c20c <__lo0bits+0x22>
 802c1f4:	07d9      	lsls	r1, r3, #31
 802c1f6:	d421      	bmi.n	802c23c <__lo0bits+0x52>
 802c1f8:	0798      	lsls	r0, r3, #30
 802c1fa:	bf49      	itett	mi
 802c1fc:	085b      	lsrmi	r3, r3, #1
 802c1fe:	089b      	lsrpl	r3, r3, #2
 802c200:	2001      	movmi	r0, #1
 802c202:	6013      	strmi	r3, [r2, #0]
 802c204:	bf5c      	itt	pl
 802c206:	6013      	strpl	r3, [r2, #0]
 802c208:	2002      	movpl	r0, #2
 802c20a:	4770      	bx	lr
 802c20c:	b299      	uxth	r1, r3
 802c20e:	b909      	cbnz	r1, 802c214 <__lo0bits+0x2a>
 802c210:	0c1b      	lsrs	r3, r3, #16
 802c212:	2010      	movs	r0, #16
 802c214:	b2d9      	uxtb	r1, r3
 802c216:	b909      	cbnz	r1, 802c21c <__lo0bits+0x32>
 802c218:	3008      	adds	r0, #8
 802c21a:	0a1b      	lsrs	r3, r3, #8
 802c21c:	0719      	lsls	r1, r3, #28
 802c21e:	bf04      	itt	eq
 802c220:	091b      	lsreq	r3, r3, #4
 802c222:	3004      	addeq	r0, #4
 802c224:	0799      	lsls	r1, r3, #30
 802c226:	bf04      	itt	eq
 802c228:	089b      	lsreq	r3, r3, #2
 802c22a:	3002      	addeq	r0, #2
 802c22c:	07d9      	lsls	r1, r3, #31
 802c22e:	d403      	bmi.n	802c238 <__lo0bits+0x4e>
 802c230:	085b      	lsrs	r3, r3, #1
 802c232:	f100 0001 	add.w	r0, r0, #1
 802c236:	d003      	beq.n	802c240 <__lo0bits+0x56>
 802c238:	6013      	str	r3, [r2, #0]
 802c23a:	4770      	bx	lr
 802c23c:	2000      	movs	r0, #0
 802c23e:	4770      	bx	lr
 802c240:	2020      	movs	r0, #32
 802c242:	4770      	bx	lr

0802c244 <__i2b>:
 802c244:	b510      	push	{r4, lr}
 802c246:	460c      	mov	r4, r1
 802c248:	2101      	movs	r1, #1
 802c24a:	f7ff febd 	bl	802bfc8 <_Balloc>
 802c24e:	4602      	mov	r2, r0
 802c250:	b928      	cbnz	r0, 802c25e <__i2b+0x1a>
 802c252:	4b05      	ldr	r3, [pc, #20]	@ (802c268 <__i2b+0x24>)
 802c254:	4805      	ldr	r0, [pc, #20]	@ (802c26c <__i2b+0x28>)
 802c256:	f240 1145 	movw	r1, #325	@ 0x145
 802c25a:	f7fe fd21 	bl	802aca0 <__assert_func>
 802c25e:	2301      	movs	r3, #1
 802c260:	6144      	str	r4, [r0, #20]
 802c262:	6103      	str	r3, [r0, #16]
 802c264:	bd10      	pop	{r4, pc}
 802c266:	bf00      	nop
 802c268:	08031e0e 	.word	0x08031e0e
 802c26c:	08031e7f 	.word	0x08031e7f

0802c270 <__multiply>:
 802c270:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c274:	4614      	mov	r4, r2
 802c276:	690a      	ldr	r2, [r1, #16]
 802c278:	6923      	ldr	r3, [r4, #16]
 802c27a:	429a      	cmp	r2, r3
 802c27c:	bfa8      	it	ge
 802c27e:	4623      	movge	r3, r4
 802c280:	460f      	mov	r7, r1
 802c282:	bfa4      	itt	ge
 802c284:	460c      	movge	r4, r1
 802c286:	461f      	movge	r7, r3
 802c288:	f8d4 a010 	ldr.w	sl, [r4, #16]
 802c28c:	f8d7 9010 	ldr.w	r9, [r7, #16]
 802c290:	68a3      	ldr	r3, [r4, #8]
 802c292:	6861      	ldr	r1, [r4, #4]
 802c294:	eb0a 0609 	add.w	r6, sl, r9
 802c298:	42b3      	cmp	r3, r6
 802c29a:	b085      	sub	sp, #20
 802c29c:	bfb8      	it	lt
 802c29e:	3101      	addlt	r1, #1
 802c2a0:	f7ff fe92 	bl	802bfc8 <_Balloc>
 802c2a4:	b930      	cbnz	r0, 802c2b4 <__multiply+0x44>
 802c2a6:	4602      	mov	r2, r0
 802c2a8:	4b44      	ldr	r3, [pc, #272]	@ (802c3bc <__multiply+0x14c>)
 802c2aa:	4845      	ldr	r0, [pc, #276]	@ (802c3c0 <__multiply+0x150>)
 802c2ac:	f44f 71b1 	mov.w	r1, #354	@ 0x162
 802c2b0:	f7fe fcf6 	bl	802aca0 <__assert_func>
 802c2b4:	f100 0514 	add.w	r5, r0, #20
 802c2b8:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 802c2bc:	462b      	mov	r3, r5
 802c2be:	2200      	movs	r2, #0
 802c2c0:	4543      	cmp	r3, r8
 802c2c2:	d321      	bcc.n	802c308 <__multiply+0x98>
 802c2c4:	f107 0114 	add.w	r1, r7, #20
 802c2c8:	f104 0214 	add.w	r2, r4, #20
 802c2cc:	eb02 028a 	add.w	r2, r2, sl, lsl #2
 802c2d0:	eb01 0389 	add.w	r3, r1, r9, lsl #2
 802c2d4:	9302      	str	r3, [sp, #8]
 802c2d6:	1b13      	subs	r3, r2, r4
 802c2d8:	3b15      	subs	r3, #21
 802c2da:	f023 0303 	bic.w	r3, r3, #3
 802c2de:	3304      	adds	r3, #4
 802c2e0:	f104 0715 	add.w	r7, r4, #21
 802c2e4:	42ba      	cmp	r2, r7
 802c2e6:	bf38      	it	cc
 802c2e8:	2304      	movcc	r3, #4
 802c2ea:	9301      	str	r3, [sp, #4]
 802c2ec:	9b02      	ldr	r3, [sp, #8]
 802c2ee:	9103      	str	r1, [sp, #12]
 802c2f0:	428b      	cmp	r3, r1
 802c2f2:	d80c      	bhi.n	802c30e <__multiply+0x9e>
 802c2f4:	2e00      	cmp	r6, #0
 802c2f6:	dd03      	ble.n	802c300 <__multiply+0x90>
 802c2f8:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 802c2fc:	2b00      	cmp	r3, #0
 802c2fe:	d05b      	beq.n	802c3b8 <__multiply+0x148>
 802c300:	6106      	str	r6, [r0, #16]
 802c302:	b005      	add	sp, #20
 802c304:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c308:	f843 2b04 	str.w	r2, [r3], #4
 802c30c:	e7d8      	b.n	802c2c0 <__multiply+0x50>
 802c30e:	f8b1 a000 	ldrh.w	sl, [r1]
 802c312:	f1ba 0f00 	cmp.w	sl, #0
 802c316:	d024      	beq.n	802c362 <__multiply+0xf2>
 802c318:	f104 0e14 	add.w	lr, r4, #20
 802c31c:	46a9      	mov	r9, r5
 802c31e:	f04f 0c00 	mov.w	ip, #0
 802c322:	f85e 7b04 	ldr.w	r7, [lr], #4
 802c326:	f8d9 3000 	ldr.w	r3, [r9]
 802c32a:	fa1f fb87 	uxth.w	fp, r7
 802c32e:	b29b      	uxth	r3, r3
 802c330:	fb0a 330b 	mla	r3, sl, fp, r3
 802c334:	ea4f 4b17 	mov.w	fp, r7, lsr #16
 802c338:	f8d9 7000 	ldr.w	r7, [r9]
 802c33c:	4463      	add	r3, ip
 802c33e:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802c342:	fb0a c70b 	mla	r7, sl, fp, ip
 802c346:	eb07 4713 	add.w	r7, r7, r3, lsr #16
 802c34a:	b29b      	uxth	r3, r3
 802c34c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802c350:	4572      	cmp	r2, lr
 802c352:	f849 3b04 	str.w	r3, [r9], #4
 802c356:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802c35a:	d8e2      	bhi.n	802c322 <__multiply+0xb2>
 802c35c:	9b01      	ldr	r3, [sp, #4]
 802c35e:	f845 c003 	str.w	ip, [r5, r3]
 802c362:	9b03      	ldr	r3, [sp, #12]
 802c364:	f8b3 9002 	ldrh.w	r9, [r3, #2]
 802c368:	3104      	adds	r1, #4
 802c36a:	f1b9 0f00 	cmp.w	r9, #0
 802c36e:	d021      	beq.n	802c3b4 <__multiply+0x144>
 802c370:	682b      	ldr	r3, [r5, #0]
 802c372:	f104 0c14 	add.w	ip, r4, #20
 802c376:	46ae      	mov	lr, r5
 802c378:	f04f 0a00 	mov.w	sl, #0
 802c37c:	f8bc b000 	ldrh.w	fp, [ip]
 802c380:	f8be 7002 	ldrh.w	r7, [lr, #2]
 802c384:	fb09 770b 	mla	r7, r9, fp, r7
 802c388:	4457      	add	r7, sl
 802c38a:	b29b      	uxth	r3, r3
 802c38c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802c390:	f84e 3b04 	str.w	r3, [lr], #4
 802c394:	f85c 3b04 	ldr.w	r3, [ip], #4
 802c398:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802c39c:	f8be 3000 	ldrh.w	r3, [lr]
 802c3a0:	fb09 330a 	mla	r3, r9, sl, r3
 802c3a4:	eb03 4317 	add.w	r3, r3, r7, lsr #16
 802c3a8:	4562      	cmp	r2, ip
 802c3aa:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802c3ae:	d8e5      	bhi.n	802c37c <__multiply+0x10c>
 802c3b0:	9f01      	ldr	r7, [sp, #4]
 802c3b2:	51eb      	str	r3, [r5, r7]
 802c3b4:	3504      	adds	r5, #4
 802c3b6:	e799      	b.n	802c2ec <__multiply+0x7c>
 802c3b8:	3e01      	subs	r6, #1
 802c3ba:	e79b      	b.n	802c2f4 <__multiply+0x84>
 802c3bc:	08031e0e 	.word	0x08031e0e
 802c3c0:	08031e7f 	.word	0x08031e7f

0802c3c4 <__pow5mult>:
 802c3c4:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802c3c8:	4615      	mov	r5, r2
 802c3ca:	f012 0203 	ands.w	r2, r2, #3
 802c3ce:	4607      	mov	r7, r0
 802c3d0:	460e      	mov	r6, r1
 802c3d2:	d007      	beq.n	802c3e4 <__pow5mult+0x20>
 802c3d4:	4c25      	ldr	r4, [pc, #148]	@ (802c46c <__pow5mult+0xa8>)
 802c3d6:	3a01      	subs	r2, #1
 802c3d8:	2300      	movs	r3, #0
 802c3da:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 802c3de:	f7ff fe55 	bl	802c08c <__multadd>
 802c3e2:	4606      	mov	r6, r0
 802c3e4:	10ad      	asrs	r5, r5, #2
 802c3e6:	d03d      	beq.n	802c464 <__pow5mult+0xa0>
 802c3e8:	69fc      	ldr	r4, [r7, #28]
 802c3ea:	b97c      	cbnz	r4, 802c40c <__pow5mult+0x48>
 802c3ec:	2010      	movs	r0, #16
 802c3ee:	f7fc fdcd 	bl	8028f8c <malloc>
 802c3f2:	4602      	mov	r2, r0
 802c3f4:	61f8      	str	r0, [r7, #28]
 802c3f6:	b928      	cbnz	r0, 802c404 <__pow5mult+0x40>
 802c3f8:	4b1d      	ldr	r3, [pc, #116]	@ (802c470 <__pow5mult+0xac>)
 802c3fa:	481e      	ldr	r0, [pc, #120]	@ (802c474 <__pow5mult+0xb0>)
 802c3fc:	f240 11b3 	movw	r1, #435	@ 0x1b3
 802c400:	f7fe fc4e 	bl	802aca0 <__assert_func>
 802c404:	e9c0 4401 	strd	r4, r4, [r0, #4]
 802c408:	6004      	str	r4, [r0, #0]
 802c40a:	60c4      	str	r4, [r0, #12]
 802c40c:	f8d7 801c 	ldr.w	r8, [r7, #28]
 802c410:	f8d8 4008 	ldr.w	r4, [r8, #8]
 802c414:	b94c      	cbnz	r4, 802c42a <__pow5mult+0x66>
 802c416:	f240 2171 	movw	r1, #625	@ 0x271
 802c41a:	4638      	mov	r0, r7
 802c41c:	f7ff ff12 	bl	802c244 <__i2b>
 802c420:	2300      	movs	r3, #0
 802c422:	f8c8 0008 	str.w	r0, [r8, #8]
 802c426:	4604      	mov	r4, r0
 802c428:	6003      	str	r3, [r0, #0]
 802c42a:	f04f 0900 	mov.w	r9, #0
 802c42e:	07eb      	lsls	r3, r5, #31
 802c430:	d50a      	bpl.n	802c448 <__pow5mult+0x84>
 802c432:	4631      	mov	r1, r6
 802c434:	4622      	mov	r2, r4
 802c436:	4638      	mov	r0, r7
 802c438:	f7ff ff1a 	bl	802c270 <__multiply>
 802c43c:	4631      	mov	r1, r6
 802c43e:	4680      	mov	r8, r0
 802c440:	4638      	mov	r0, r7
 802c442:	f7ff fe01 	bl	802c048 <_Bfree>
 802c446:	4646      	mov	r6, r8
 802c448:	106d      	asrs	r5, r5, #1
 802c44a:	d00b      	beq.n	802c464 <__pow5mult+0xa0>
 802c44c:	6820      	ldr	r0, [r4, #0]
 802c44e:	b938      	cbnz	r0, 802c460 <__pow5mult+0x9c>
 802c450:	4622      	mov	r2, r4
 802c452:	4621      	mov	r1, r4
 802c454:	4638      	mov	r0, r7
 802c456:	f7ff ff0b 	bl	802c270 <__multiply>
 802c45a:	6020      	str	r0, [r4, #0]
 802c45c:	f8c0 9000 	str.w	r9, [r0]
 802c460:	4604      	mov	r4, r0
 802c462:	e7e4      	b.n	802c42e <__pow5mult+0x6a>
 802c464:	4630      	mov	r0, r6
 802c466:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802c46a:	bf00      	nop
 802c46c:	08031ed8 	.word	0x08031ed8
 802c470:	08031b6e 	.word	0x08031b6e
 802c474:	08031e7f 	.word	0x08031e7f

0802c478 <__lshift>:
 802c478:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802c47c:	460c      	mov	r4, r1
 802c47e:	6849      	ldr	r1, [r1, #4]
 802c480:	6923      	ldr	r3, [r4, #16]
 802c482:	eb03 1862 	add.w	r8, r3, r2, asr #5
 802c486:	68a3      	ldr	r3, [r4, #8]
 802c488:	4607      	mov	r7, r0
 802c48a:	4691      	mov	r9, r2
 802c48c:	ea4f 1a62 	mov.w	sl, r2, asr #5
 802c490:	f108 0601 	add.w	r6, r8, #1
 802c494:	42b3      	cmp	r3, r6
 802c496:	db0b      	blt.n	802c4b0 <__lshift+0x38>
 802c498:	4638      	mov	r0, r7
 802c49a:	f7ff fd95 	bl	802bfc8 <_Balloc>
 802c49e:	4605      	mov	r5, r0
 802c4a0:	b948      	cbnz	r0, 802c4b6 <__lshift+0x3e>
 802c4a2:	4602      	mov	r2, r0
 802c4a4:	4b28      	ldr	r3, [pc, #160]	@ (802c548 <__lshift+0xd0>)
 802c4a6:	4829      	ldr	r0, [pc, #164]	@ (802c54c <__lshift+0xd4>)
 802c4a8:	f44f 71ef 	mov.w	r1, #478	@ 0x1de
 802c4ac:	f7fe fbf8 	bl	802aca0 <__assert_func>
 802c4b0:	3101      	adds	r1, #1
 802c4b2:	005b      	lsls	r3, r3, #1
 802c4b4:	e7ee      	b.n	802c494 <__lshift+0x1c>
 802c4b6:	2300      	movs	r3, #0
 802c4b8:	f100 0114 	add.w	r1, r0, #20
 802c4bc:	f100 0210 	add.w	r2, r0, #16
 802c4c0:	4618      	mov	r0, r3
 802c4c2:	4553      	cmp	r3, sl
 802c4c4:	db33      	blt.n	802c52e <__lshift+0xb6>
 802c4c6:	6920      	ldr	r0, [r4, #16]
 802c4c8:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 802c4cc:	f104 0314 	add.w	r3, r4, #20
 802c4d0:	f019 091f 	ands.w	r9, r9, #31
 802c4d4:	eb01 018a 	add.w	r1, r1, sl, lsl #2
 802c4d8:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
 802c4dc:	d02b      	beq.n	802c536 <__lshift+0xbe>
 802c4de:	f1c9 0e20 	rsb	lr, r9, #32
 802c4e2:	468a      	mov	sl, r1
 802c4e4:	2200      	movs	r2, #0
 802c4e6:	6818      	ldr	r0, [r3, #0]
 802c4e8:	fa00 f009 	lsl.w	r0, r0, r9
 802c4ec:	4310      	orrs	r0, r2
 802c4ee:	f84a 0b04 	str.w	r0, [sl], #4
 802c4f2:	f853 2b04 	ldr.w	r2, [r3], #4
 802c4f6:	459c      	cmp	ip, r3
 802c4f8:	fa22 f20e 	lsr.w	r2, r2, lr
 802c4fc:	d8f3      	bhi.n	802c4e6 <__lshift+0x6e>
 802c4fe:	ebac 0304 	sub.w	r3, ip, r4
 802c502:	3b15      	subs	r3, #21
 802c504:	f023 0303 	bic.w	r3, r3, #3
 802c508:	3304      	adds	r3, #4
 802c50a:	f104 0015 	add.w	r0, r4, #21
 802c50e:	4584      	cmp	ip, r0
 802c510:	bf38      	it	cc
 802c512:	2304      	movcc	r3, #4
 802c514:	50ca      	str	r2, [r1, r3]
 802c516:	b10a      	cbz	r2, 802c51c <__lshift+0xa4>
 802c518:	f108 0602 	add.w	r6, r8, #2
 802c51c:	3e01      	subs	r6, #1
 802c51e:	4638      	mov	r0, r7
 802c520:	612e      	str	r6, [r5, #16]
 802c522:	4621      	mov	r1, r4
 802c524:	f7ff fd90 	bl	802c048 <_Bfree>
 802c528:	4628      	mov	r0, r5
 802c52a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802c52e:	f842 0f04 	str.w	r0, [r2, #4]!
 802c532:	3301      	adds	r3, #1
 802c534:	e7c5      	b.n	802c4c2 <__lshift+0x4a>
 802c536:	3904      	subs	r1, #4
 802c538:	f853 2b04 	ldr.w	r2, [r3], #4
 802c53c:	f841 2f04 	str.w	r2, [r1, #4]!
 802c540:	459c      	cmp	ip, r3
 802c542:	d8f9      	bhi.n	802c538 <__lshift+0xc0>
 802c544:	e7ea      	b.n	802c51c <__lshift+0xa4>
 802c546:	bf00      	nop
 802c548:	08031e0e 	.word	0x08031e0e
 802c54c:	08031e7f 	.word	0x08031e7f

0802c550 <__mcmp>:
 802c550:	690a      	ldr	r2, [r1, #16]
 802c552:	4603      	mov	r3, r0
 802c554:	6900      	ldr	r0, [r0, #16]
 802c556:	1a80      	subs	r0, r0, r2
 802c558:	b530      	push	{r4, r5, lr}
 802c55a:	d10e      	bne.n	802c57a <__mcmp+0x2a>
 802c55c:	3314      	adds	r3, #20
 802c55e:	3114      	adds	r1, #20
 802c560:	eb03 0482 	add.w	r4, r3, r2, lsl #2
 802c564:	eb01 0182 	add.w	r1, r1, r2, lsl #2
 802c568:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 802c56c:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 802c570:	4295      	cmp	r5, r2
 802c572:	d003      	beq.n	802c57c <__mcmp+0x2c>
 802c574:	d205      	bcs.n	802c582 <__mcmp+0x32>
 802c576:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c57a:	bd30      	pop	{r4, r5, pc}
 802c57c:	42a3      	cmp	r3, r4
 802c57e:	d3f3      	bcc.n	802c568 <__mcmp+0x18>
 802c580:	e7fb      	b.n	802c57a <__mcmp+0x2a>
 802c582:	2001      	movs	r0, #1
 802c584:	e7f9      	b.n	802c57a <__mcmp+0x2a>
	...

0802c588 <__mdiff>:
 802c588:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c58c:	4689      	mov	r9, r1
 802c58e:	4606      	mov	r6, r0
 802c590:	4611      	mov	r1, r2
 802c592:	4648      	mov	r0, r9
 802c594:	4614      	mov	r4, r2
 802c596:	f7ff ffdb 	bl	802c550 <__mcmp>
 802c59a:	1e05      	subs	r5, r0, #0
 802c59c:	d112      	bne.n	802c5c4 <__mdiff+0x3c>
 802c59e:	4629      	mov	r1, r5
 802c5a0:	4630      	mov	r0, r6
 802c5a2:	f7ff fd11 	bl	802bfc8 <_Balloc>
 802c5a6:	4602      	mov	r2, r0
 802c5a8:	b928      	cbnz	r0, 802c5b6 <__mdiff+0x2e>
 802c5aa:	4b3f      	ldr	r3, [pc, #252]	@ (802c6a8 <__mdiff+0x120>)
 802c5ac:	f240 2137 	movw	r1, #567	@ 0x237
 802c5b0:	483e      	ldr	r0, [pc, #248]	@ (802c6ac <__mdiff+0x124>)
 802c5b2:	f7fe fb75 	bl	802aca0 <__assert_func>
 802c5b6:	2301      	movs	r3, #1
 802c5b8:	e9c0 3504 	strd	r3, r5, [r0, #16]
 802c5bc:	4610      	mov	r0, r2
 802c5be:	b003      	add	sp, #12
 802c5c0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c5c4:	bfbc      	itt	lt
 802c5c6:	464b      	movlt	r3, r9
 802c5c8:	46a1      	movlt	r9, r4
 802c5ca:	4630      	mov	r0, r6
 802c5cc:	f8d9 1004 	ldr.w	r1, [r9, #4]
 802c5d0:	bfba      	itte	lt
 802c5d2:	461c      	movlt	r4, r3
 802c5d4:	2501      	movlt	r5, #1
 802c5d6:	2500      	movge	r5, #0
 802c5d8:	f7ff fcf6 	bl	802bfc8 <_Balloc>
 802c5dc:	4602      	mov	r2, r0
 802c5de:	b918      	cbnz	r0, 802c5e8 <__mdiff+0x60>
 802c5e0:	4b31      	ldr	r3, [pc, #196]	@ (802c6a8 <__mdiff+0x120>)
 802c5e2:	f240 2145 	movw	r1, #581	@ 0x245
 802c5e6:	e7e3      	b.n	802c5b0 <__mdiff+0x28>
 802c5e8:	f8d9 7010 	ldr.w	r7, [r9, #16]
 802c5ec:	6926      	ldr	r6, [r4, #16]
 802c5ee:	60c5      	str	r5, [r0, #12]
 802c5f0:	f109 0310 	add.w	r3, r9, #16
 802c5f4:	f109 0514 	add.w	r5, r9, #20
 802c5f8:	f104 0e14 	add.w	lr, r4, #20
 802c5fc:	f100 0b14 	add.w	fp, r0, #20
 802c600:	eb05 0887 	add.w	r8, r5, r7, lsl #2
 802c604:	eb0e 0686 	add.w	r6, lr, r6, lsl #2
 802c608:	9301      	str	r3, [sp, #4]
 802c60a:	46d9      	mov	r9, fp
 802c60c:	f04f 0c00 	mov.w	ip, #0
 802c610:	9b01      	ldr	r3, [sp, #4]
 802c612:	f85e 0b04 	ldr.w	r0, [lr], #4
 802c616:	f853 af04 	ldr.w	sl, [r3, #4]!
 802c61a:	9301      	str	r3, [sp, #4]
 802c61c:	fa1f f38a 	uxth.w	r3, sl
 802c620:	4619      	mov	r1, r3
 802c622:	b283      	uxth	r3, r0
 802c624:	1acb      	subs	r3, r1, r3
 802c626:	0c00      	lsrs	r0, r0, #16
 802c628:	4463      	add	r3, ip
 802c62a:	ebc0 401a 	rsb	r0, r0, sl, lsr #16
 802c62e:	eb00 4023 	add.w	r0, r0, r3, asr #16
 802c632:	b29b      	uxth	r3, r3
 802c634:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
 802c638:	4576      	cmp	r6, lr
 802c63a:	f849 3b04 	str.w	r3, [r9], #4
 802c63e:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c642:	d8e5      	bhi.n	802c610 <__mdiff+0x88>
 802c644:	1b33      	subs	r3, r6, r4
 802c646:	3b15      	subs	r3, #21
 802c648:	f023 0303 	bic.w	r3, r3, #3
 802c64c:	3415      	adds	r4, #21
 802c64e:	3304      	adds	r3, #4
 802c650:	42a6      	cmp	r6, r4
 802c652:	bf38      	it	cc
 802c654:	2304      	movcc	r3, #4
 802c656:	441d      	add	r5, r3
 802c658:	445b      	add	r3, fp
 802c65a:	461e      	mov	r6, r3
 802c65c:	462c      	mov	r4, r5
 802c65e:	4544      	cmp	r4, r8
 802c660:	d30e      	bcc.n	802c680 <__mdiff+0xf8>
 802c662:	f108 0103 	add.w	r1, r8, #3
 802c666:	1b49      	subs	r1, r1, r5
 802c668:	f021 0103 	bic.w	r1, r1, #3
 802c66c:	3d03      	subs	r5, #3
 802c66e:	45a8      	cmp	r8, r5
 802c670:	bf38      	it	cc
 802c672:	2100      	movcc	r1, #0
 802c674:	440b      	add	r3, r1
 802c676:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802c67a:	b191      	cbz	r1, 802c6a2 <__mdiff+0x11a>
 802c67c:	6117      	str	r7, [r2, #16]
 802c67e:	e79d      	b.n	802c5bc <__mdiff+0x34>
 802c680:	f854 1b04 	ldr.w	r1, [r4], #4
 802c684:	46e6      	mov	lr, ip
 802c686:	0c08      	lsrs	r0, r1, #16
 802c688:	fa1c fc81 	uxtah	ip, ip, r1
 802c68c:	4471      	add	r1, lr
 802c68e:	eb00 402c 	add.w	r0, r0, ip, asr #16
 802c692:	b289      	uxth	r1, r1
 802c694:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 802c698:	f846 1b04 	str.w	r1, [r6], #4
 802c69c:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c6a0:	e7dd      	b.n	802c65e <__mdiff+0xd6>
 802c6a2:	3f01      	subs	r7, #1
 802c6a4:	e7e7      	b.n	802c676 <__mdiff+0xee>
 802c6a6:	bf00      	nop
 802c6a8:	08031e0e 	.word	0x08031e0e
 802c6ac:	08031e7f 	.word	0x08031e7f

0802c6b0 <__ulp>:
 802c6b0:	b082      	sub	sp, #8
 802c6b2:	ed8d 0b00 	vstr	d0, [sp]
 802c6b6:	9a01      	ldr	r2, [sp, #4]
 802c6b8:	4b0f      	ldr	r3, [pc, #60]	@ (802c6f8 <__ulp+0x48>)
 802c6ba:	4013      	ands	r3, r2
 802c6bc:	f1a3 7350 	sub.w	r3, r3, #54525952	@ 0x3400000
 802c6c0:	2b00      	cmp	r3, #0
 802c6c2:	dc08      	bgt.n	802c6d6 <__ulp+0x26>
 802c6c4:	425b      	negs	r3, r3
 802c6c6:	f1b3 7fa0 	cmp.w	r3, #20971520	@ 0x1400000
 802c6ca:	ea4f 5223 	mov.w	r2, r3, asr #20
 802c6ce:	da04      	bge.n	802c6da <__ulp+0x2a>
 802c6d0:	f44f 2300 	mov.w	r3, #524288	@ 0x80000
 802c6d4:	4113      	asrs	r3, r2
 802c6d6:	2200      	movs	r2, #0
 802c6d8:	e008      	b.n	802c6ec <__ulp+0x3c>
 802c6da:	f1a2 0314 	sub.w	r3, r2, #20
 802c6de:	2b1e      	cmp	r3, #30
 802c6e0:	bfda      	itte	le
 802c6e2:	f04f 4200 	movle.w	r2, #2147483648	@ 0x80000000
 802c6e6:	40da      	lsrle	r2, r3
 802c6e8:	2201      	movgt	r2, #1
 802c6ea:	2300      	movs	r3, #0
 802c6ec:	4619      	mov	r1, r3
 802c6ee:	4610      	mov	r0, r2
 802c6f0:	ec41 0b10 	vmov	d0, r0, r1
 802c6f4:	b002      	add	sp, #8
 802c6f6:	4770      	bx	lr
 802c6f8:	7ff00000 	.word	0x7ff00000

0802c6fc <__b2d>:
 802c6fc:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c700:	6906      	ldr	r6, [r0, #16]
 802c702:	f100 0814 	add.w	r8, r0, #20
 802c706:	eb08 0686 	add.w	r6, r8, r6, lsl #2
 802c70a:	1f37      	subs	r7, r6, #4
 802c70c:	f856 2c04 	ldr.w	r2, [r6, #-4]
 802c710:	4610      	mov	r0, r2
 802c712:	f7ff fd4b 	bl	802c1ac <__hi0bits>
 802c716:	f1c0 0320 	rsb	r3, r0, #32
 802c71a:	280a      	cmp	r0, #10
 802c71c:	600b      	str	r3, [r1, #0]
 802c71e:	491b      	ldr	r1, [pc, #108]	@ (802c78c <__b2d+0x90>)
 802c720:	dc15      	bgt.n	802c74e <__b2d+0x52>
 802c722:	f1c0 0c0b 	rsb	ip, r0, #11
 802c726:	fa22 f30c 	lsr.w	r3, r2, ip
 802c72a:	45b8      	cmp	r8, r7
 802c72c:	ea43 0501 	orr.w	r5, r3, r1
 802c730:	bf34      	ite	cc
 802c732:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802c736:	2300      	movcs	r3, #0
 802c738:	3015      	adds	r0, #21
 802c73a:	fa02 f000 	lsl.w	r0, r2, r0
 802c73e:	fa23 f30c 	lsr.w	r3, r3, ip
 802c742:	4303      	orrs	r3, r0
 802c744:	461c      	mov	r4, r3
 802c746:	ec45 4b10 	vmov	d0, r4, r5
 802c74a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c74e:	45b8      	cmp	r8, r7
 802c750:	bf3a      	itte	cc
 802c752:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802c756:	f1a6 0708 	subcc.w	r7, r6, #8
 802c75a:	2300      	movcs	r3, #0
 802c75c:	380b      	subs	r0, #11
 802c75e:	d012      	beq.n	802c786 <__b2d+0x8a>
 802c760:	f1c0 0120 	rsb	r1, r0, #32
 802c764:	fa23 f401 	lsr.w	r4, r3, r1
 802c768:	4082      	lsls	r2, r0
 802c76a:	4322      	orrs	r2, r4
 802c76c:	4547      	cmp	r7, r8
 802c76e:	f042 557f 	orr.w	r5, r2, #1069547520	@ 0x3fc00000
 802c772:	bf8c      	ite	hi
 802c774:	f857 2c04 	ldrhi.w	r2, [r7, #-4]
 802c778:	2200      	movls	r2, #0
 802c77a:	4083      	lsls	r3, r0
 802c77c:	40ca      	lsrs	r2, r1
 802c77e:	f445 1540 	orr.w	r5, r5, #3145728	@ 0x300000
 802c782:	4313      	orrs	r3, r2
 802c784:	e7de      	b.n	802c744 <__b2d+0x48>
 802c786:	ea42 0501 	orr.w	r5, r2, r1
 802c78a:	e7db      	b.n	802c744 <__b2d+0x48>
 802c78c:	3ff00000 	.word	0x3ff00000

0802c790 <__d2b>:
 802c790:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 802c794:	460f      	mov	r7, r1
 802c796:	2101      	movs	r1, #1
 802c798:	ec59 8b10 	vmov	r8, r9, d0
 802c79c:	4616      	mov	r6, r2
 802c79e:	f7ff fc13 	bl	802bfc8 <_Balloc>
 802c7a2:	4604      	mov	r4, r0
 802c7a4:	b930      	cbnz	r0, 802c7b4 <__d2b+0x24>
 802c7a6:	4602      	mov	r2, r0
 802c7a8:	4b23      	ldr	r3, [pc, #140]	@ (802c838 <__d2b+0xa8>)
 802c7aa:	4824      	ldr	r0, [pc, #144]	@ (802c83c <__d2b+0xac>)
 802c7ac:	f240 310f 	movw	r1, #783	@ 0x30f
 802c7b0:	f7fe fa76 	bl	802aca0 <__assert_func>
 802c7b4:	f3c9 550a 	ubfx	r5, r9, #20, #11
 802c7b8:	f3c9 0313 	ubfx	r3, r9, #0, #20
 802c7bc:	b10d      	cbz	r5, 802c7c2 <__d2b+0x32>
 802c7be:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 802c7c2:	9301      	str	r3, [sp, #4]
 802c7c4:	f1b8 0300 	subs.w	r3, r8, #0
 802c7c8:	d023      	beq.n	802c812 <__d2b+0x82>
 802c7ca:	4668      	mov	r0, sp
 802c7cc:	9300      	str	r3, [sp, #0]
 802c7ce:	f7ff fd0c 	bl	802c1ea <__lo0bits>
 802c7d2:	e9dd 1200 	ldrd	r1, r2, [sp]
 802c7d6:	b1d0      	cbz	r0, 802c80e <__d2b+0x7e>
 802c7d8:	f1c0 0320 	rsb	r3, r0, #32
 802c7dc:	fa02 f303 	lsl.w	r3, r2, r3
 802c7e0:	430b      	orrs	r3, r1
 802c7e2:	40c2      	lsrs	r2, r0
 802c7e4:	6163      	str	r3, [r4, #20]
 802c7e6:	9201      	str	r2, [sp, #4]
 802c7e8:	9b01      	ldr	r3, [sp, #4]
 802c7ea:	61a3      	str	r3, [r4, #24]
 802c7ec:	2b00      	cmp	r3, #0
 802c7ee:	bf0c      	ite	eq
 802c7f0:	2201      	moveq	r2, #1
 802c7f2:	2202      	movne	r2, #2
 802c7f4:	6122      	str	r2, [r4, #16]
 802c7f6:	b1a5      	cbz	r5, 802c822 <__d2b+0x92>
 802c7f8:	f2a5 4533 	subw	r5, r5, #1075	@ 0x433
 802c7fc:	4405      	add	r5, r0
 802c7fe:	603d      	str	r5, [r7, #0]
 802c800:	f1c0 0035 	rsb	r0, r0, #53	@ 0x35
 802c804:	6030      	str	r0, [r6, #0]
 802c806:	4620      	mov	r0, r4
 802c808:	b003      	add	sp, #12
 802c80a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802c80e:	6161      	str	r1, [r4, #20]
 802c810:	e7ea      	b.n	802c7e8 <__d2b+0x58>
 802c812:	a801      	add	r0, sp, #4
 802c814:	f7ff fce9 	bl	802c1ea <__lo0bits>
 802c818:	9b01      	ldr	r3, [sp, #4]
 802c81a:	6163      	str	r3, [r4, #20]
 802c81c:	3020      	adds	r0, #32
 802c81e:	2201      	movs	r2, #1
 802c820:	e7e8      	b.n	802c7f4 <__d2b+0x64>
 802c822:	eb04 0382 	add.w	r3, r4, r2, lsl #2
 802c826:	f2a0 4032 	subw	r0, r0, #1074	@ 0x432
 802c82a:	6038      	str	r0, [r7, #0]
 802c82c:	6918      	ldr	r0, [r3, #16]
 802c82e:	f7ff fcbd 	bl	802c1ac <__hi0bits>
 802c832:	ebc0 1042 	rsb	r0, r0, r2, lsl #5
 802c836:	e7e5      	b.n	802c804 <__d2b+0x74>
 802c838:	08031e0e 	.word	0x08031e0e
 802c83c:	08031e7f 	.word	0x08031e7f

0802c840 <__ratio>:
 802c840:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c844:	4688      	mov	r8, r1
 802c846:	4669      	mov	r1, sp
 802c848:	4681      	mov	r9, r0
 802c84a:	f7ff ff57 	bl	802c6fc <__b2d>
 802c84e:	a901      	add	r1, sp, #4
 802c850:	4640      	mov	r0, r8
 802c852:	ec55 4b10 	vmov	r4, r5, d0
 802c856:	f7ff ff51 	bl	802c6fc <__b2d>
 802c85a:	f8d8 3010 	ldr.w	r3, [r8, #16]
 802c85e:	f8d9 2010 	ldr.w	r2, [r9, #16]
 802c862:	1ad2      	subs	r2, r2, r3
 802c864:	e9dd 3100 	ldrd	r3, r1, [sp]
 802c868:	1a5b      	subs	r3, r3, r1
 802c86a:	eb03 1342 	add.w	r3, r3, r2, lsl #5
 802c86e:	ec57 6b10 	vmov	r6, r7, d0
 802c872:	2b00      	cmp	r3, #0
 802c874:	bfd6      	itet	le
 802c876:	ebc3 3303 	rsble	r3, r3, r3, lsl #12
 802c87a:	462a      	movgt	r2, r5
 802c87c:	463a      	movle	r2, r7
 802c87e:	46ab      	mov	fp, r5
 802c880:	46a2      	mov	sl, r4
 802c882:	bfce      	itee	gt
 802c884:	eb02 5b03 	addgt.w	fp, r2, r3, lsl #20
 802c888:	eb02 5303 	addle.w	r3, r2, r3, lsl #20
 802c88c:	ee00 3a90 	vmovle	s1, r3
 802c890:	ec4b ab17 	vmov	d7, sl, fp
 802c894:	ee87 0b00 	vdiv.f64	d0, d7, d0
 802c898:	b003      	add	sp, #12
 802c89a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0802c89e <__copybits>:
 802c89e:	3901      	subs	r1, #1
 802c8a0:	b570      	push	{r4, r5, r6, lr}
 802c8a2:	1149      	asrs	r1, r1, #5
 802c8a4:	6914      	ldr	r4, [r2, #16]
 802c8a6:	3101      	adds	r1, #1
 802c8a8:	f102 0314 	add.w	r3, r2, #20
 802c8ac:	eb00 0181 	add.w	r1, r0, r1, lsl #2
 802c8b0:	eb03 0484 	add.w	r4, r3, r4, lsl #2
 802c8b4:	1f05      	subs	r5, r0, #4
 802c8b6:	42a3      	cmp	r3, r4
 802c8b8:	d30c      	bcc.n	802c8d4 <__copybits+0x36>
 802c8ba:	1aa3      	subs	r3, r4, r2
 802c8bc:	3b11      	subs	r3, #17
 802c8be:	f023 0303 	bic.w	r3, r3, #3
 802c8c2:	3211      	adds	r2, #17
 802c8c4:	42a2      	cmp	r2, r4
 802c8c6:	bf88      	it	hi
 802c8c8:	2300      	movhi	r3, #0
 802c8ca:	4418      	add	r0, r3
 802c8cc:	2300      	movs	r3, #0
 802c8ce:	4288      	cmp	r0, r1
 802c8d0:	d305      	bcc.n	802c8de <__copybits+0x40>
 802c8d2:	bd70      	pop	{r4, r5, r6, pc}
 802c8d4:	f853 6b04 	ldr.w	r6, [r3], #4
 802c8d8:	f845 6f04 	str.w	r6, [r5, #4]!
 802c8dc:	e7eb      	b.n	802c8b6 <__copybits+0x18>
 802c8de:	f840 3b04 	str.w	r3, [r0], #4
 802c8e2:	e7f4      	b.n	802c8ce <__copybits+0x30>

0802c8e4 <__any_on>:
 802c8e4:	f100 0214 	add.w	r2, r0, #20
 802c8e8:	6900      	ldr	r0, [r0, #16]
 802c8ea:	114b      	asrs	r3, r1, #5
 802c8ec:	4298      	cmp	r0, r3
 802c8ee:	b510      	push	{r4, lr}
 802c8f0:	db11      	blt.n	802c916 <__any_on+0x32>
 802c8f2:	dd0a      	ble.n	802c90a <__any_on+0x26>
 802c8f4:	f011 011f 	ands.w	r1, r1, #31
 802c8f8:	d007      	beq.n	802c90a <__any_on+0x26>
 802c8fa:	f852 4023 	ldr.w	r4, [r2, r3, lsl #2]
 802c8fe:	fa24 f001 	lsr.w	r0, r4, r1
 802c902:	fa00 f101 	lsl.w	r1, r0, r1
 802c906:	428c      	cmp	r4, r1
 802c908:	d10b      	bne.n	802c922 <__any_on+0x3e>
 802c90a:	eb02 0383 	add.w	r3, r2, r3, lsl #2
 802c90e:	4293      	cmp	r3, r2
 802c910:	d803      	bhi.n	802c91a <__any_on+0x36>
 802c912:	2000      	movs	r0, #0
 802c914:	bd10      	pop	{r4, pc}
 802c916:	4603      	mov	r3, r0
 802c918:	e7f7      	b.n	802c90a <__any_on+0x26>
 802c91a:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802c91e:	2900      	cmp	r1, #0
 802c920:	d0f5      	beq.n	802c90e <__any_on+0x2a>
 802c922:	2001      	movs	r0, #1
 802c924:	e7f6      	b.n	802c914 <__any_on+0x30>

0802c926 <_malloc_usable_size_r>:
 802c926:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802c92a:	1f18      	subs	r0, r3, #4
 802c92c:	2b00      	cmp	r3, #0
 802c92e:	bfbc      	itt	lt
 802c930:	580b      	ldrlt	r3, [r1, r0]
 802c932:	18c0      	addlt	r0, r0, r3
 802c934:	4770      	bx	lr

0802c936 <__ascii_wctomb>:
 802c936:	4603      	mov	r3, r0
 802c938:	4608      	mov	r0, r1
 802c93a:	b141      	cbz	r1, 802c94e <__ascii_wctomb+0x18>
 802c93c:	2aff      	cmp	r2, #255	@ 0xff
 802c93e:	d904      	bls.n	802c94a <__ascii_wctomb+0x14>
 802c940:	228a      	movs	r2, #138	@ 0x8a
 802c942:	601a      	str	r2, [r3, #0]
 802c944:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c948:	4770      	bx	lr
 802c94a:	700a      	strb	r2, [r1, #0]
 802c94c:	2001      	movs	r0, #1
 802c94e:	4770      	bx	lr

0802c950 <__ssputs_r>:
 802c950:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802c954:	688e      	ldr	r6, [r1, #8]
 802c956:	461f      	mov	r7, r3
 802c958:	42be      	cmp	r6, r7
 802c95a:	680b      	ldr	r3, [r1, #0]
 802c95c:	4682      	mov	sl, r0
 802c95e:	460c      	mov	r4, r1
 802c960:	4690      	mov	r8, r2
 802c962:	d82d      	bhi.n	802c9c0 <__ssputs_r+0x70>
 802c964:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802c968:	f412 6f90 	tst.w	r2, #1152	@ 0x480
 802c96c:	d026      	beq.n	802c9bc <__ssputs_r+0x6c>
 802c96e:	6965      	ldr	r5, [r4, #20]
 802c970:	6909      	ldr	r1, [r1, #16]
 802c972:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 802c976:	eba3 0901 	sub.w	r9, r3, r1
 802c97a:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
 802c97e:	1c7b      	adds	r3, r7, #1
 802c980:	444b      	add	r3, r9
 802c982:	106d      	asrs	r5, r5, #1
 802c984:	429d      	cmp	r5, r3
 802c986:	bf38      	it	cc
 802c988:	461d      	movcc	r5, r3
 802c98a:	0553      	lsls	r3, r2, #21
 802c98c:	d527      	bpl.n	802c9de <__ssputs_r+0x8e>
 802c98e:	4629      	mov	r1, r5
 802c990:	f7fc fb2e 	bl	8028ff0 <_malloc_r>
 802c994:	4606      	mov	r6, r0
 802c996:	b360      	cbz	r0, 802c9f2 <__ssputs_r+0xa2>
 802c998:	6921      	ldr	r1, [r4, #16]
 802c99a:	464a      	mov	r2, r9
 802c99c:	f7fe f967 	bl	802ac6e <memcpy>
 802c9a0:	89a3      	ldrh	r3, [r4, #12]
 802c9a2:	f423 6390 	bic.w	r3, r3, #1152	@ 0x480
 802c9a6:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802c9aa:	81a3      	strh	r3, [r4, #12]
 802c9ac:	6126      	str	r6, [r4, #16]
 802c9ae:	6165      	str	r5, [r4, #20]
 802c9b0:	444e      	add	r6, r9
 802c9b2:	eba5 0509 	sub.w	r5, r5, r9
 802c9b6:	6026      	str	r6, [r4, #0]
 802c9b8:	60a5      	str	r5, [r4, #8]
 802c9ba:	463e      	mov	r6, r7
 802c9bc:	42be      	cmp	r6, r7
 802c9be:	d900      	bls.n	802c9c2 <__ssputs_r+0x72>
 802c9c0:	463e      	mov	r6, r7
 802c9c2:	6820      	ldr	r0, [r4, #0]
 802c9c4:	4632      	mov	r2, r6
 802c9c6:	4641      	mov	r1, r8
 802c9c8:	f7fe f840 	bl	802aa4c <memmove>
 802c9cc:	68a3      	ldr	r3, [r4, #8]
 802c9ce:	1b9b      	subs	r3, r3, r6
 802c9d0:	60a3      	str	r3, [r4, #8]
 802c9d2:	6823      	ldr	r3, [r4, #0]
 802c9d4:	4433      	add	r3, r6
 802c9d6:	6023      	str	r3, [r4, #0]
 802c9d8:	2000      	movs	r0, #0
 802c9da:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802c9de:	462a      	mov	r2, r5
 802c9e0:	f7fc fbd8 	bl	8029194 <_realloc_r>
 802c9e4:	4606      	mov	r6, r0
 802c9e6:	2800      	cmp	r0, #0
 802c9e8:	d1e0      	bne.n	802c9ac <__ssputs_r+0x5c>
 802c9ea:	6921      	ldr	r1, [r4, #16]
 802c9ec:	4650      	mov	r0, sl
 802c9ee:	f7fe ff55 	bl	802b89c <_free_r>
 802c9f2:	230c      	movs	r3, #12
 802c9f4:	f8ca 3000 	str.w	r3, [sl]
 802c9f8:	89a3      	ldrh	r3, [r4, #12]
 802c9fa:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802c9fe:	81a3      	strh	r3, [r4, #12]
 802ca00:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802ca04:	e7e9      	b.n	802c9da <__ssputs_r+0x8a>
	...

0802ca08 <_svfiprintf_r>:
 802ca08:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802ca0c:	4698      	mov	r8, r3
 802ca0e:	898b      	ldrh	r3, [r1, #12]
 802ca10:	061b      	lsls	r3, r3, #24
 802ca12:	b09d      	sub	sp, #116	@ 0x74
 802ca14:	4607      	mov	r7, r0
 802ca16:	460d      	mov	r5, r1
 802ca18:	4614      	mov	r4, r2
 802ca1a:	d510      	bpl.n	802ca3e <_svfiprintf_r+0x36>
 802ca1c:	690b      	ldr	r3, [r1, #16]
 802ca1e:	b973      	cbnz	r3, 802ca3e <_svfiprintf_r+0x36>
 802ca20:	2140      	movs	r1, #64	@ 0x40
 802ca22:	f7fc fae5 	bl	8028ff0 <_malloc_r>
 802ca26:	6028      	str	r0, [r5, #0]
 802ca28:	6128      	str	r0, [r5, #16]
 802ca2a:	b930      	cbnz	r0, 802ca3a <_svfiprintf_r+0x32>
 802ca2c:	230c      	movs	r3, #12
 802ca2e:	603b      	str	r3, [r7, #0]
 802ca30:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802ca34:	b01d      	add	sp, #116	@ 0x74
 802ca36:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802ca3a:	2340      	movs	r3, #64	@ 0x40
 802ca3c:	616b      	str	r3, [r5, #20]
 802ca3e:	2300      	movs	r3, #0
 802ca40:	9309      	str	r3, [sp, #36]	@ 0x24
 802ca42:	2320      	movs	r3, #32
 802ca44:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802ca48:	f8cd 800c 	str.w	r8, [sp, #12]
 802ca4c:	2330      	movs	r3, #48	@ 0x30
 802ca4e:	f8df 819c 	ldr.w	r8, [pc, #412]	@ 802cbec <_svfiprintf_r+0x1e4>
 802ca52:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802ca56:	f04f 0901 	mov.w	r9, #1
 802ca5a:	4623      	mov	r3, r4
 802ca5c:	469a      	mov	sl, r3
 802ca5e:	f813 2b01 	ldrb.w	r2, [r3], #1
 802ca62:	b10a      	cbz	r2, 802ca68 <_svfiprintf_r+0x60>
 802ca64:	2a25      	cmp	r2, #37	@ 0x25
 802ca66:	d1f9      	bne.n	802ca5c <_svfiprintf_r+0x54>
 802ca68:	ebba 0b04 	subs.w	fp, sl, r4
 802ca6c:	d00b      	beq.n	802ca86 <_svfiprintf_r+0x7e>
 802ca6e:	465b      	mov	r3, fp
 802ca70:	4622      	mov	r2, r4
 802ca72:	4629      	mov	r1, r5
 802ca74:	4638      	mov	r0, r7
 802ca76:	f7ff ff6b 	bl	802c950 <__ssputs_r>
 802ca7a:	3001      	adds	r0, #1
 802ca7c:	f000 80a7 	beq.w	802cbce <_svfiprintf_r+0x1c6>
 802ca80:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802ca82:	445a      	add	r2, fp
 802ca84:	9209      	str	r2, [sp, #36]	@ 0x24
 802ca86:	f89a 3000 	ldrb.w	r3, [sl]
 802ca8a:	2b00      	cmp	r3, #0
 802ca8c:	f000 809f 	beq.w	802cbce <_svfiprintf_r+0x1c6>
 802ca90:	2300      	movs	r3, #0
 802ca92:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802ca96:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802ca9a:	f10a 0a01 	add.w	sl, sl, #1
 802ca9e:	9304      	str	r3, [sp, #16]
 802caa0:	9307      	str	r3, [sp, #28]
 802caa2:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802caa6:	931a      	str	r3, [sp, #104]	@ 0x68
 802caa8:	4654      	mov	r4, sl
 802caaa:	2205      	movs	r2, #5
 802caac:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cab0:	484e      	ldr	r0, [pc, #312]	@ (802cbec <_svfiprintf_r+0x1e4>)
 802cab2:	f7d3 fc25 	bl	8000300 <memchr>
 802cab6:	9a04      	ldr	r2, [sp, #16]
 802cab8:	b9d8      	cbnz	r0, 802caf2 <_svfiprintf_r+0xea>
 802caba:	06d0      	lsls	r0, r2, #27
 802cabc:	bf44      	itt	mi
 802cabe:	2320      	movmi	r3, #32
 802cac0:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cac4:	0711      	lsls	r1, r2, #28
 802cac6:	bf44      	itt	mi
 802cac8:	232b      	movmi	r3, #43	@ 0x2b
 802caca:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cace:	f89a 3000 	ldrb.w	r3, [sl]
 802cad2:	2b2a      	cmp	r3, #42	@ 0x2a
 802cad4:	d015      	beq.n	802cb02 <_svfiprintf_r+0xfa>
 802cad6:	9a07      	ldr	r2, [sp, #28]
 802cad8:	4654      	mov	r4, sl
 802cada:	2000      	movs	r0, #0
 802cadc:	f04f 0c0a 	mov.w	ip, #10
 802cae0:	4621      	mov	r1, r4
 802cae2:	f811 3b01 	ldrb.w	r3, [r1], #1
 802cae6:	3b30      	subs	r3, #48	@ 0x30
 802cae8:	2b09      	cmp	r3, #9
 802caea:	d94b      	bls.n	802cb84 <_svfiprintf_r+0x17c>
 802caec:	b1b0      	cbz	r0, 802cb1c <_svfiprintf_r+0x114>
 802caee:	9207      	str	r2, [sp, #28]
 802caf0:	e014      	b.n	802cb1c <_svfiprintf_r+0x114>
 802caf2:	eba0 0308 	sub.w	r3, r0, r8
 802caf6:	fa09 f303 	lsl.w	r3, r9, r3
 802cafa:	4313      	orrs	r3, r2
 802cafc:	9304      	str	r3, [sp, #16]
 802cafe:	46a2      	mov	sl, r4
 802cb00:	e7d2      	b.n	802caa8 <_svfiprintf_r+0xa0>
 802cb02:	9b03      	ldr	r3, [sp, #12]
 802cb04:	1d19      	adds	r1, r3, #4
 802cb06:	681b      	ldr	r3, [r3, #0]
 802cb08:	9103      	str	r1, [sp, #12]
 802cb0a:	2b00      	cmp	r3, #0
 802cb0c:	bfbb      	ittet	lt
 802cb0e:	425b      	neglt	r3, r3
 802cb10:	f042 0202 	orrlt.w	r2, r2, #2
 802cb14:	9307      	strge	r3, [sp, #28]
 802cb16:	9307      	strlt	r3, [sp, #28]
 802cb18:	bfb8      	it	lt
 802cb1a:	9204      	strlt	r2, [sp, #16]
 802cb1c:	7823      	ldrb	r3, [r4, #0]
 802cb1e:	2b2e      	cmp	r3, #46	@ 0x2e
 802cb20:	d10a      	bne.n	802cb38 <_svfiprintf_r+0x130>
 802cb22:	7863      	ldrb	r3, [r4, #1]
 802cb24:	2b2a      	cmp	r3, #42	@ 0x2a
 802cb26:	d132      	bne.n	802cb8e <_svfiprintf_r+0x186>
 802cb28:	9b03      	ldr	r3, [sp, #12]
 802cb2a:	1d1a      	adds	r2, r3, #4
 802cb2c:	681b      	ldr	r3, [r3, #0]
 802cb2e:	9203      	str	r2, [sp, #12]
 802cb30:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802cb34:	3402      	adds	r4, #2
 802cb36:	9305      	str	r3, [sp, #20]
 802cb38:	f8df a0c0 	ldr.w	sl, [pc, #192]	@ 802cbfc <_svfiprintf_r+0x1f4>
 802cb3c:	7821      	ldrb	r1, [r4, #0]
 802cb3e:	2203      	movs	r2, #3
 802cb40:	4650      	mov	r0, sl
 802cb42:	f7d3 fbdd 	bl	8000300 <memchr>
 802cb46:	b138      	cbz	r0, 802cb58 <_svfiprintf_r+0x150>
 802cb48:	9b04      	ldr	r3, [sp, #16]
 802cb4a:	eba0 000a 	sub.w	r0, r0, sl
 802cb4e:	2240      	movs	r2, #64	@ 0x40
 802cb50:	4082      	lsls	r2, r0
 802cb52:	4313      	orrs	r3, r2
 802cb54:	3401      	adds	r4, #1
 802cb56:	9304      	str	r3, [sp, #16]
 802cb58:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cb5c:	4824      	ldr	r0, [pc, #144]	@ (802cbf0 <_svfiprintf_r+0x1e8>)
 802cb5e:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802cb62:	2206      	movs	r2, #6
 802cb64:	f7d3 fbcc 	bl	8000300 <memchr>
 802cb68:	2800      	cmp	r0, #0
 802cb6a:	d036      	beq.n	802cbda <_svfiprintf_r+0x1d2>
 802cb6c:	4b21      	ldr	r3, [pc, #132]	@ (802cbf4 <_svfiprintf_r+0x1ec>)
 802cb6e:	bb1b      	cbnz	r3, 802cbb8 <_svfiprintf_r+0x1b0>
 802cb70:	9b03      	ldr	r3, [sp, #12]
 802cb72:	3307      	adds	r3, #7
 802cb74:	f023 0307 	bic.w	r3, r3, #7
 802cb78:	3308      	adds	r3, #8
 802cb7a:	9303      	str	r3, [sp, #12]
 802cb7c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802cb7e:	4433      	add	r3, r6
 802cb80:	9309      	str	r3, [sp, #36]	@ 0x24
 802cb82:	e76a      	b.n	802ca5a <_svfiprintf_r+0x52>
 802cb84:	fb0c 3202 	mla	r2, ip, r2, r3
 802cb88:	460c      	mov	r4, r1
 802cb8a:	2001      	movs	r0, #1
 802cb8c:	e7a8      	b.n	802cae0 <_svfiprintf_r+0xd8>
 802cb8e:	2300      	movs	r3, #0
 802cb90:	3401      	adds	r4, #1
 802cb92:	9305      	str	r3, [sp, #20]
 802cb94:	4619      	mov	r1, r3
 802cb96:	f04f 0c0a 	mov.w	ip, #10
 802cb9a:	4620      	mov	r0, r4
 802cb9c:	f810 2b01 	ldrb.w	r2, [r0], #1
 802cba0:	3a30      	subs	r2, #48	@ 0x30
 802cba2:	2a09      	cmp	r2, #9
 802cba4:	d903      	bls.n	802cbae <_svfiprintf_r+0x1a6>
 802cba6:	2b00      	cmp	r3, #0
 802cba8:	d0c6      	beq.n	802cb38 <_svfiprintf_r+0x130>
 802cbaa:	9105      	str	r1, [sp, #20]
 802cbac:	e7c4      	b.n	802cb38 <_svfiprintf_r+0x130>
 802cbae:	fb0c 2101 	mla	r1, ip, r1, r2
 802cbb2:	4604      	mov	r4, r0
 802cbb4:	2301      	movs	r3, #1
 802cbb6:	e7f0      	b.n	802cb9a <_svfiprintf_r+0x192>
 802cbb8:	ab03      	add	r3, sp, #12
 802cbba:	9300      	str	r3, [sp, #0]
 802cbbc:	462a      	mov	r2, r5
 802cbbe:	4b0e      	ldr	r3, [pc, #56]	@ (802cbf8 <_svfiprintf_r+0x1f0>)
 802cbc0:	a904      	add	r1, sp, #16
 802cbc2:	4638      	mov	r0, r7
 802cbc4:	f7fd f960 	bl	8029e88 <_printf_float>
 802cbc8:	1c42      	adds	r2, r0, #1
 802cbca:	4606      	mov	r6, r0
 802cbcc:	d1d6      	bne.n	802cb7c <_svfiprintf_r+0x174>
 802cbce:	89ab      	ldrh	r3, [r5, #12]
 802cbd0:	065b      	lsls	r3, r3, #25
 802cbd2:	f53f af2d 	bmi.w	802ca30 <_svfiprintf_r+0x28>
 802cbd6:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802cbd8:	e72c      	b.n	802ca34 <_svfiprintf_r+0x2c>
 802cbda:	ab03      	add	r3, sp, #12
 802cbdc:	9300      	str	r3, [sp, #0]
 802cbde:	462a      	mov	r2, r5
 802cbe0:	4b05      	ldr	r3, [pc, #20]	@ (802cbf8 <_svfiprintf_r+0x1f0>)
 802cbe2:	a904      	add	r1, sp, #16
 802cbe4:	4638      	mov	r0, r7
 802cbe6:	f7fd fbd7 	bl	802a398 <_printf_i>
 802cbea:	e7ed      	b.n	802cbc8 <_svfiprintf_r+0x1c0>
 802cbec:	08031fd8 	.word	0x08031fd8
 802cbf0:	08031fe2 	.word	0x08031fe2
 802cbf4:	08029e89 	.word	0x08029e89
 802cbf8:	0802c951 	.word	0x0802c951
 802cbfc:	08031fde 	.word	0x08031fde

0802cc00 <__sfputc_r>:
 802cc00:	6893      	ldr	r3, [r2, #8]
 802cc02:	3b01      	subs	r3, #1
 802cc04:	2b00      	cmp	r3, #0
 802cc06:	b410      	push	{r4}
 802cc08:	6093      	str	r3, [r2, #8]
 802cc0a:	da08      	bge.n	802cc1e <__sfputc_r+0x1e>
 802cc0c:	6994      	ldr	r4, [r2, #24]
 802cc0e:	42a3      	cmp	r3, r4
 802cc10:	db01      	blt.n	802cc16 <__sfputc_r+0x16>
 802cc12:	290a      	cmp	r1, #10
 802cc14:	d103      	bne.n	802cc1e <__sfputc_r+0x1e>
 802cc16:	f85d 4b04 	ldr.w	r4, [sp], #4
 802cc1a:	f7fd be72 	b.w	802a902 <__swbuf_r>
 802cc1e:	6813      	ldr	r3, [r2, #0]
 802cc20:	1c58      	adds	r0, r3, #1
 802cc22:	6010      	str	r0, [r2, #0]
 802cc24:	7019      	strb	r1, [r3, #0]
 802cc26:	4608      	mov	r0, r1
 802cc28:	f85d 4b04 	ldr.w	r4, [sp], #4
 802cc2c:	4770      	bx	lr

0802cc2e <__sfputs_r>:
 802cc2e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802cc30:	4606      	mov	r6, r0
 802cc32:	460f      	mov	r7, r1
 802cc34:	4614      	mov	r4, r2
 802cc36:	18d5      	adds	r5, r2, r3
 802cc38:	42ac      	cmp	r4, r5
 802cc3a:	d101      	bne.n	802cc40 <__sfputs_r+0x12>
 802cc3c:	2000      	movs	r0, #0
 802cc3e:	e007      	b.n	802cc50 <__sfputs_r+0x22>
 802cc40:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cc44:	463a      	mov	r2, r7
 802cc46:	4630      	mov	r0, r6
 802cc48:	f7ff ffda 	bl	802cc00 <__sfputc_r>
 802cc4c:	1c43      	adds	r3, r0, #1
 802cc4e:	d1f3      	bne.n	802cc38 <__sfputs_r+0xa>
 802cc50:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

0802cc54 <_vfiprintf_r>:
 802cc54:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802cc58:	460d      	mov	r5, r1
 802cc5a:	b09d      	sub	sp, #116	@ 0x74
 802cc5c:	4614      	mov	r4, r2
 802cc5e:	4698      	mov	r8, r3
 802cc60:	4606      	mov	r6, r0
 802cc62:	b118      	cbz	r0, 802cc6c <_vfiprintf_r+0x18>
 802cc64:	6a03      	ldr	r3, [r0, #32]
 802cc66:	b90b      	cbnz	r3, 802cc6c <_vfiprintf_r+0x18>
 802cc68:	f7fd fd42 	bl	802a6f0 <__sinit>
 802cc6c:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802cc6e:	07d9      	lsls	r1, r3, #31
 802cc70:	d405      	bmi.n	802cc7e <_vfiprintf_r+0x2a>
 802cc72:	89ab      	ldrh	r3, [r5, #12]
 802cc74:	059a      	lsls	r2, r3, #22
 802cc76:	d402      	bmi.n	802cc7e <_vfiprintf_r+0x2a>
 802cc78:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802cc7a:	f7fd fff6 	bl	802ac6a <__retarget_lock_acquire_recursive>
 802cc7e:	89ab      	ldrh	r3, [r5, #12]
 802cc80:	071b      	lsls	r3, r3, #28
 802cc82:	d501      	bpl.n	802cc88 <_vfiprintf_r+0x34>
 802cc84:	692b      	ldr	r3, [r5, #16]
 802cc86:	b99b      	cbnz	r3, 802ccb0 <_vfiprintf_r+0x5c>
 802cc88:	4629      	mov	r1, r5
 802cc8a:	4630      	mov	r0, r6
 802cc8c:	f7fd fe78 	bl	802a980 <__swsetup_r>
 802cc90:	b170      	cbz	r0, 802ccb0 <_vfiprintf_r+0x5c>
 802cc92:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802cc94:	07dc      	lsls	r4, r3, #31
 802cc96:	d504      	bpl.n	802cca2 <_vfiprintf_r+0x4e>
 802cc98:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cc9c:	b01d      	add	sp, #116	@ 0x74
 802cc9e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802cca2:	89ab      	ldrh	r3, [r5, #12]
 802cca4:	0598      	lsls	r0, r3, #22
 802cca6:	d4f7      	bmi.n	802cc98 <_vfiprintf_r+0x44>
 802cca8:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802ccaa:	f7fd ffdf 	bl	802ac6c <__retarget_lock_release_recursive>
 802ccae:	e7f3      	b.n	802cc98 <_vfiprintf_r+0x44>
 802ccb0:	2300      	movs	r3, #0
 802ccb2:	9309      	str	r3, [sp, #36]	@ 0x24
 802ccb4:	2320      	movs	r3, #32
 802ccb6:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802ccba:	f8cd 800c 	str.w	r8, [sp, #12]
 802ccbe:	2330      	movs	r3, #48	@ 0x30
 802ccc0:	f8df 81ac 	ldr.w	r8, [pc, #428]	@ 802ce70 <_vfiprintf_r+0x21c>
 802ccc4:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802ccc8:	f04f 0901 	mov.w	r9, #1
 802cccc:	4623      	mov	r3, r4
 802ccce:	469a      	mov	sl, r3
 802ccd0:	f813 2b01 	ldrb.w	r2, [r3], #1
 802ccd4:	b10a      	cbz	r2, 802ccda <_vfiprintf_r+0x86>
 802ccd6:	2a25      	cmp	r2, #37	@ 0x25
 802ccd8:	d1f9      	bne.n	802ccce <_vfiprintf_r+0x7a>
 802ccda:	ebba 0b04 	subs.w	fp, sl, r4
 802ccde:	d00b      	beq.n	802ccf8 <_vfiprintf_r+0xa4>
 802cce0:	465b      	mov	r3, fp
 802cce2:	4622      	mov	r2, r4
 802cce4:	4629      	mov	r1, r5
 802cce6:	4630      	mov	r0, r6
 802cce8:	f7ff ffa1 	bl	802cc2e <__sfputs_r>
 802ccec:	3001      	adds	r0, #1
 802ccee:	f000 80a7 	beq.w	802ce40 <_vfiprintf_r+0x1ec>
 802ccf2:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802ccf4:	445a      	add	r2, fp
 802ccf6:	9209      	str	r2, [sp, #36]	@ 0x24
 802ccf8:	f89a 3000 	ldrb.w	r3, [sl]
 802ccfc:	2b00      	cmp	r3, #0
 802ccfe:	f000 809f 	beq.w	802ce40 <_vfiprintf_r+0x1ec>
 802cd02:	2300      	movs	r3, #0
 802cd04:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802cd08:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802cd0c:	f10a 0a01 	add.w	sl, sl, #1
 802cd10:	9304      	str	r3, [sp, #16]
 802cd12:	9307      	str	r3, [sp, #28]
 802cd14:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802cd18:	931a      	str	r3, [sp, #104]	@ 0x68
 802cd1a:	4654      	mov	r4, sl
 802cd1c:	2205      	movs	r2, #5
 802cd1e:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cd22:	4853      	ldr	r0, [pc, #332]	@ (802ce70 <_vfiprintf_r+0x21c>)
 802cd24:	f7d3 faec 	bl	8000300 <memchr>
 802cd28:	9a04      	ldr	r2, [sp, #16]
 802cd2a:	b9d8      	cbnz	r0, 802cd64 <_vfiprintf_r+0x110>
 802cd2c:	06d1      	lsls	r1, r2, #27
 802cd2e:	bf44      	itt	mi
 802cd30:	2320      	movmi	r3, #32
 802cd32:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cd36:	0713      	lsls	r3, r2, #28
 802cd38:	bf44      	itt	mi
 802cd3a:	232b      	movmi	r3, #43	@ 0x2b
 802cd3c:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cd40:	f89a 3000 	ldrb.w	r3, [sl]
 802cd44:	2b2a      	cmp	r3, #42	@ 0x2a
 802cd46:	d015      	beq.n	802cd74 <_vfiprintf_r+0x120>
 802cd48:	9a07      	ldr	r2, [sp, #28]
 802cd4a:	4654      	mov	r4, sl
 802cd4c:	2000      	movs	r0, #0
 802cd4e:	f04f 0c0a 	mov.w	ip, #10
 802cd52:	4621      	mov	r1, r4
 802cd54:	f811 3b01 	ldrb.w	r3, [r1], #1
 802cd58:	3b30      	subs	r3, #48	@ 0x30
 802cd5a:	2b09      	cmp	r3, #9
 802cd5c:	d94b      	bls.n	802cdf6 <_vfiprintf_r+0x1a2>
 802cd5e:	b1b0      	cbz	r0, 802cd8e <_vfiprintf_r+0x13a>
 802cd60:	9207      	str	r2, [sp, #28]
 802cd62:	e014      	b.n	802cd8e <_vfiprintf_r+0x13a>
 802cd64:	eba0 0308 	sub.w	r3, r0, r8
 802cd68:	fa09 f303 	lsl.w	r3, r9, r3
 802cd6c:	4313      	orrs	r3, r2
 802cd6e:	9304      	str	r3, [sp, #16]
 802cd70:	46a2      	mov	sl, r4
 802cd72:	e7d2      	b.n	802cd1a <_vfiprintf_r+0xc6>
 802cd74:	9b03      	ldr	r3, [sp, #12]
 802cd76:	1d19      	adds	r1, r3, #4
 802cd78:	681b      	ldr	r3, [r3, #0]
 802cd7a:	9103      	str	r1, [sp, #12]
 802cd7c:	2b00      	cmp	r3, #0
 802cd7e:	bfbb      	ittet	lt
 802cd80:	425b      	neglt	r3, r3
 802cd82:	f042 0202 	orrlt.w	r2, r2, #2
 802cd86:	9307      	strge	r3, [sp, #28]
 802cd88:	9307      	strlt	r3, [sp, #28]
 802cd8a:	bfb8      	it	lt
 802cd8c:	9204      	strlt	r2, [sp, #16]
 802cd8e:	7823      	ldrb	r3, [r4, #0]
 802cd90:	2b2e      	cmp	r3, #46	@ 0x2e
 802cd92:	d10a      	bne.n	802cdaa <_vfiprintf_r+0x156>
 802cd94:	7863      	ldrb	r3, [r4, #1]
 802cd96:	2b2a      	cmp	r3, #42	@ 0x2a
 802cd98:	d132      	bne.n	802ce00 <_vfiprintf_r+0x1ac>
 802cd9a:	9b03      	ldr	r3, [sp, #12]
 802cd9c:	1d1a      	adds	r2, r3, #4
 802cd9e:	681b      	ldr	r3, [r3, #0]
 802cda0:	9203      	str	r2, [sp, #12]
 802cda2:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802cda6:	3402      	adds	r4, #2
 802cda8:	9305      	str	r3, [sp, #20]
 802cdaa:	f8df a0d4 	ldr.w	sl, [pc, #212]	@ 802ce80 <_vfiprintf_r+0x22c>
 802cdae:	7821      	ldrb	r1, [r4, #0]
 802cdb0:	2203      	movs	r2, #3
 802cdb2:	4650      	mov	r0, sl
 802cdb4:	f7d3 faa4 	bl	8000300 <memchr>
 802cdb8:	b138      	cbz	r0, 802cdca <_vfiprintf_r+0x176>
 802cdba:	9b04      	ldr	r3, [sp, #16]
 802cdbc:	eba0 000a 	sub.w	r0, r0, sl
 802cdc0:	2240      	movs	r2, #64	@ 0x40
 802cdc2:	4082      	lsls	r2, r0
 802cdc4:	4313      	orrs	r3, r2
 802cdc6:	3401      	adds	r4, #1
 802cdc8:	9304      	str	r3, [sp, #16]
 802cdca:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cdce:	4829      	ldr	r0, [pc, #164]	@ (802ce74 <_vfiprintf_r+0x220>)
 802cdd0:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802cdd4:	2206      	movs	r2, #6
 802cdd6:	f7d3 fa93 	bl	8000300 <memchr>
 802cdda:	2800      	cmp	r0, #0
 802cddc:	d03f      	beq.n	802ce5e <_vfiprintf_r+0x20a>
 802cdde:	4b26      	ldr	r3, [pc, #152]	@ (802ce78 <_vfiprintf_r+0x224>)
 802cde0:	bb1b      	cbnz	r3, 802ce2a <_vfiprintf_r+0x1d6>
 802cde2:	9b03      	ldr	r3, [sp, #12]
 802cde4:	3307      	adds	r3, #7
 802cde6:	f023 0307 	bic.w	r3, r3, #7
 802cdea:	3308      	adds	r3, #8
 802cdec:	9303      	str	r3, [sp, #12]
 802cdee:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802cdf0:	443b      	add	r3, r7
 802cdf2:	9309      	str	r3, [sp, #36]	@ 0x24
 802cdf4:	e76a      	b.n	802cccc <_vfiprintf_r+0x78>
 802cdf6:	fb0c 3202 	mla	r2, ip, r2, r3
 802cdfa:	460c      	mov	r4, r1
 802cdfc:	2001      	movs	r0, #1
 802cdfe:	e7a8      	b.n	802cd52 <_vfiprintf_r+0xfe>
 802ce00:	2300      	movs	r3, #0
 802ce02:	3401      	adds	r4, #1
 802ce04:	9305      	str	r3, [sp, #20]
 802ce06:	4619      	mov	r1, r3
 802ce08:	f04f 0c0a 	mov.w	ip, #10
 802ce0c:	4620      	mov	r0, r4
 802ce0e:	f810 2b01 	ldrb.w	r2, [r0], #1
 802ce12:	3a30      	subs	r2, #48	@ 0x30
 802ce14:	2a09      	cmp	r2, #9
 802ce16:	d903      	bls.n	802ce20 <_vfiprintf_r+0x1cc>
 802ce18:	2b00      	cmp	r3, #0
 802ce1a:	d0c6      	beq.n	802cdaa <_vfiprintf_r+0x156>
 802ce1c:	9105      	str	r1, [sp, #20]
 802ce1e:	e7c4      	b.n	802cdaa <_vfiprintf_r+0x156>
 802ce20:	fb0c 2101 	mla	r1, ip, r1, r2
 802ce24:	4604      	mov	r4, r0
 802ce26:	2301      	movs	r3, #1
 802ce28:	e7f0      	b.n	802ce0c <_vfiprintf_r+0x1b8>
 802ce2a:	ab03      	add	r3, sp, #12
 802ce2c:	9300      	str	r3, [sp, #0]
 802ce2e:	462a      	mov	r2, r5
 802ce30:	4b12      	ldr	r3, [pc, #72]	@ (802ce7c <_vfiprintf_r+0x228>)
 802ce32:	a904      	add	r1, sp, #16
 802ce34:	4630      	mov	r0, r6
 802ce36:	f7fd f827 	bl	8029e88 <_printf_float>
 802ce3a:	4607      	mov	r7, r0
 802ce3c:	1c78      	adds	r0, r7, #1
 802ce3e:	d1d6      	bne.n	802cdee <_vfiprintf_r+0x19a>
 802ce40:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802ce42:	07d9      	lsls	r1, r3, #31
 802ce44:	d405      	bmi.n	802ce52 <_vfiprintf_r+0x1fe>
 802ce46:	89ab      	ldrh	r3, [r5, #12]
 802ce48:	059a      	lsls	r2, r3, #22
 802ce4a:	d402      	bmi.n	802ce52 <_vfiprintf_r+0x1fe>
 802ce4c:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802ce4e:	f7fd ff0d 	bl	802ac6c <__retarget_lock_release_recursive>
 802ce52:	89ab      	ldrh	r3, [r5, #12]
 802ce54:	065b      	lsls	r3, r3, #25
 802ce56:	f53f af1f 	bmi.w	802cc98 <_vfiprintf_r+0x44>
 802ce5a:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802ce5c:	e71e      	b.n	802cc9c <_vfiprintf_r+0x48>
 802ce5e:	ab03      	add	r3, sp, #12
 802ce60:	9300      	str	r3, [sp, #0]
 802ce62:	462a      	mov	r2, r5
 802ce64:	4b05      	ldr	r3, [pc, #20]	@ (802ce7c <_vfiprintf_r+0x228>)
 802ce66:	a904      	add	r1, sp, #16
 802ce68:	4630      	mov	r0, r6
 802ce6a:	f7fd fa95 	bl	802a398 <_printf_i>
 802ce6e:	e7e4      	b.n	802ce3a <_vfiprintf_r+0x1e6>
 802ce70:	08031fd8 	.word	0x08031fd8
 802ce74:	08031fe2 	.word	0x08031fe2
 802ce78:	08029e89 	.word	0x08029e89
 802ce7c:	0802cc2f 	.word	0x0802cc2f
 802ce80:	08031fde 	.word	0x08031fde

0802ce84 <__sflush_r>:
 802ce84:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802ce88:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802ce8c:	0716      	lsls	r6, r2, #28
 802ce8e:	4605      	mov	r5, r0
 802ce90:	460c      	mov	r4, r1
 802ce92:	d454      	bmi.n	802cf3e <__sflush_r+0xba>
 802ce94:	684b      	ldr	r3, [r1, #4]
 802ce96:	2b00      	cmp	r3, #0
 802ce98:	dc02      	bgt.n	802cea0 <__sflush_r+0x1c>
 802ce9a:	6c0b      	ldr	r3, [r1, #64]	@ 0x40
 802ce9c:	2b00      	cmp	r3, #0
 802ce9e:	dd48      	ble.n	802cf32 <__sflush_r+0xae>
 802cea0:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802cea2:	2e00      	cmp	r6, #0
 802cea4:	d045      	beq.n	802cf32 <__sflush_r+0xae>
 802cea6:	2300      	movs	r3, #0
 802cea8:	f412 5280 	ands.w	r2, r2, #4096	@ 0x1000
 802ceac:	682f      	ldr	r7, [r5, #0]
 802ceae:	6a21      	ldr	r1, [r4, #32]
 802ceb0:	602b      	str	r3, [r5, #0]
 802ceb2:	d030      	beq.n	802cf16 <__sflush_r+0x92>
 802ceb4:	6d62      	ldr	r2, [r4, #84]	@ 0x54
 802ceb6:	89a3      	ldrh	r3, [r4, #12]
 802ceb8:	0759      	lsls	r1, r3, #29
 802ceba:	d505      	bpl.n	802cec8 <__sflush_r+0x44>
 802cebc:	6863      	ldr	r3, [r4, #4]
 802cebe:	1ad2      	subs	r2, r2, r3
 802cec0:	6b63      	ldr	r3, [r4, #52]	@ 0x34
 802cec2:	b10b      	cbz	r3, 802cec8 <__sflush_r+0x44>
 802cec4:	6c23      	ldr	r3, [r4, #64]	@ 0x40
 802cec6:	1ad2      	subs	r2, r2, r3
 802cec8:	2300      	movs	r3, #0
 802ceca:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802cecc:	6a21      	ldr	r1, [r4, #32]
 802cece:	4628      	mov	r0, r5
 802ced0:	47b0      	blx	r6
 802ced2:	1c43      	adds	r3, r0, #1
 802ced4:	89a3      	ldrh	r3, [r4, #12]
 802ced6:	d106      	bne.n	802cee6 <__sflush_r+0x62>
 802ced8:	6829      	ldr	r1, [r5, #0]
 802ceda:	291d      	cmp	r1, #29
 802cedc:	d82b      	bhi.n	802cf36 <__sflush_r+0xb2>
 802cede:	4a2a      	ldr	r2, [pc, #168]	@ (802cf88 <__sflush_r+0x104>)
 802cee0:	410a      	asrs	r2, r1
 802cee2:	07d6      	lsls	r6, r2, #31
 802cee4:	d427      	bmi.n	802cf36 <__sflush_r+0xb2>
 802cee6:	2200      	movs	r2, #0
 802cee8:	6062      	str	r2, [r4, #4]
 802ceea:	04d9      	lsls	r1, r3, #19
 802ceec:	6922      	ldr	r2, [r4, #16]
 802ceee:	6022      	str	r2, [r4, #0]
 802cef0:	d504      	bpl.n	802cefc <__sflush_r+0x78>
 802cef2:	1c42      	adds	r2, r0, #1
 802cef4:	d101      	bne.n	802cefa <__sflush_r+0x76>
 802cef6:	682b      	ldr	r3, [r5, #0]
 802cef8:	b903      	cbnz	r3, 802cefc <__sflush_r+0x78>
 802cefa:	6560      	str	r0, [r4, #84]	@ 0x54
 802cefc:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802cefe:	602f      	str	r7, [r5, #0]
 802cf00:	b1b9      	cbz	r1, 802cf32 <__sflush_r+0xae>
 802cf02:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802cf06:	4299      	cmp	r1, r3
 802cf08:	d002      	beq.n	802cf10 <__sflush_r+0x8c>
 802cf0a:	4628      	mov	r0, r5
 802cf0c:	f7fe fcc6 	bl	802b89c <_free_r>
 802cf10:	2300      	movs	r3, #0
 802cf12:	6363      	str	r3, [r4, #52]	@ 0x34
 802cf14:	e00d      	b.n	802cf32 <__sflush_r+0xae>
 802cf16:	2301      	movs	r3, #1
 802cf18:	4628      	mov	r0, r5
 802cf1a:	47b0      	blx	r6
 802cf1c:	4602      	mov	r2, r0
 802cf1e:	1c50      	adds	r0, r2, #1
 802cf20:	d1c9      	bne.n	802ceb6 <__sflush_r+0x32>
 802cf22:	682b      	ldr	r3, [r5, #0]
 802cf24:	2b00      	cmp	r3, #0
 802cf26:	d0c6      	beq.n	802ceb6 <__sflush_r+0x32>
 802cf28:	2b1d      	cmp	r3, #29
 802cf2a:	d001      	beq.n	802cf30 <__sflush_r+0xac>
 802cf2c:	2b16      	cmp	r3, #22
 802cf2e:	d11e      	bne.n	802cf6e <__sflush_r+0xea>
 802cf30:	602f      	str	r7, [r5, #0]
 802cf32:	2000      	movs	r0, #0
 802cf34:	e022      	b.n	802cf7c <__sflush_r+0xf8>
 802cf36:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802cf3a:	b21b      	sxth	r3, r3
 802cf3c:	e01b      	b.n	802cf76 <__sflush_r+0xf2>
 802cf3e:	690f      	ldr	r7, [r1, #16]
 802cf40:	2f00      	cmp	r7, #0
 802cf42:	d0f6      	beq.n	802cf32 <__sflush_r+0xae>
 802cf44:	0793      	lsls	r3, r2, #30
 802cf46:	680e      	ldr	r6, [r1, #0]
 802cf48:	bf08      	it	eq
 802cf4a:	694b      	ldreq	r3, [r1, #20]
 802cf4c:	600f      	str	r7, [r1, #0]
 802cf4e:	bf18      	it	ne
 802cf50:	2300      	movne	r3, #0
 802cf52:	eba6 0807 	sub.w	r8, r6, r7
 802cf56:	608b      	str	r3, [r1, #8]
 802cf58:	f1b8 0f00 	cmp.w	r8, #0
 802cf5c:	dde9      	ble.n	802cf32 <__sflush_r+0xae>
 802cf5e:	6a21      	ldr	r1, [r4, #32]
 802cf60:	6aa6      	ldr	r6, [r4, #40]	@ 0x28
 802cf62:	4643      	mov	r3, r8
 802cf64:	463a      	mov	r2, r7
 802cf66:	4628      	mov	r0, r5
 802cf68:	47b0      	blx	r6
 802cf6a:	2800      	cmp	r0, #0
 802cf6c:	dc08      	bgt.n	802cf80 <__sflush_r+0xfc>
 802cf6e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802cf72:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802cf76:	81a3      	strh	r3, [r4, #12]
 802cf78:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cf7c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802cf80:	4407      	add	r7, r0
 802cf82:	eba8 0800 	sub.w	r8, r8, r0
 802cf86:	e7e7      	b.n	802cf58 <__sflush_r+0xd4>
 802cf88:	dfbffffe 	.word	0xdfbffffe

0802cf8c <_fflush_r>:
 802cf8c:	b538      	push	{r3, r4, r5, lr}
 802cf8e:	690b      	ldr	r3, [r1, #16]
 802cf90:	4605      	mov	r5, r0
 802cf92:	460c      	mov	r4, r1
 802cf94:	b913      	cbnz	r3, 802cf9c <_fflush_r+0x10>
 802cf96:	2500      	movs	r5, #0
 802cf98:	4628      	mov	r0, r5
 802cf9a:	bd38      	pop	{r3, r4, r5, pc}
 802cf9c:	b118      	cbz	r0, 802cfa6 <_fflush_r+0x1a>
 802cf9e:	6a03      	ldr	r3, [r0, #32]
 802cfa0:	b90b      	cbnz	r3, 802cfa6 <_fflush_r+0x1a>
 802cfa2:	f7fd fba5 	bl	802a6f0 <__sinit>
 802cfa6:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802cfaa:	2b00      	cmp	r3, #0
 802cfac:	d0f3      	beq.n	802cf96 <_fflush_r+0xa>
 802cfae:	6e62      	ldr	r2, [r4, #100]	@ 0x64
 802cfb0:	07d0      	lsls	r0, r2, #31
 802cfb2:	d404      	bmi.n	802cfbe <_fflush_r+0x32>
 802cfb4:	0599      	lsls	r1, r3, #22
 802cfb6:	d402      	bmi.n	802cfbe <_fflush_r+0x32>
 802cfb8:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802cfba:	f7fd fe56 	bl	802ac6a <__retarget_lock_acquire_recursive>
 802cfbe:	4628      	mov	r0, r5
 802cfc0:	4621      	mov	r1, r4
 802cfc2:	f7ff ff5f 	bl	802ce84 <__sflush_r>
 802cfc6:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802cfc8:	07da      	lsls	r2, r3, #31
 802cfca:	4605      	mov	r5, r0
 802cfcc:	d4e4      	bmi.n	802cf98 <_fflush_r+0xc>
 802cfce:	89a3      	ldrh	r3, [r4, #12]
 802cfd0:	059b      	lsls	r3, r3, #22
 802cfd2:	d4e1      	bmi.n	802cf98 <_fflush_r+0xc>
 802cfd4:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802cfd6:	f7fd fe49 	bl	802ac6c <__retarget_lock_release_recursive>
 802cfda:	e7dd      	b.n	802cf98 <_fflush_r+0xc>

0802cfdc <fiprintf>:
 802cfdc:	b40e      	push	{r1, r2, r3}
 802cfde:	b503      	push	{r0, r1, lr}
 802cfe0:	4601      	mov	r1, r0
 802cfe2:	ab03      	add	r3, sp, #12
 802cfe4:	4805      	ldr	r0, [pc, #20]	@ (802cffc <fiprintf+0x20>)
 802cfe6:	f853 2b04 	ldr.w	r2, [r3], #4
 802cfea:	6800      	ldr	r0, [r0, #0]
 802cfec:	9301      	str	r3, [sp, #4]
 802cfee:	f7ff fe31 	bl	802cc54 <_vfiprintf_r>
 802cff2:	b002      	add	sp, #8
 802cff4:	f85d eb04 	ldr.w	lr, [sp], #4
 802cff8:	b003      	add	sp, #12
 802cffa:	4770      	bx	lr
 802cffc:	240001d4 	.word	0x240001d4

0802d000 <__swhatbuf_r>:
 802d000:	b570      	push	{r4, r5, r6, lr}
 802d002:	460c      	mov	r4, r1
 802d004:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802d008:	2900      	cmp	r1, #0
 802d00a:	b096      	sub	sp, #88	@ 0x58
 802d00c:	4615      	mov	r5, r2
 802d00e:	461e      	mov	r6, r3
 802d010:	da0d      	bge.n	802d02e <__swhatbuf_r+0x2e>
 802d012:	89a3      	ldrh	r3, [r4, #12]
 802d014:	f013 0f80 	tst.w	r3, #128	@ 0x80
 802d018:	f04f 0100 	mov.w	r1, #0
 802d01c:	bf14      	ite	ne
 802d01e:	2340      	movne	r3, #64	@ 0x40
 802d020:	f44f 6380 	moveq.w	r3, #1024	@ 0x400
 802d024:	2000      	movs	r0, #0
 802d026:	6031      	str	r1, [r6, #0]
 802d028:	602b      	str	r3, [r5, #0]
 802d02a:	b016      	add	sp, #88	@ 0x58
 802d02c:	bd70      	pop	{r4, r5, r6, pc}
 802d02e:	466a      	mov	r2, sp
 802d030:	f000 f848 	bl	802d0c4 <_fstat_r>
 802d034:	2800      	cmp	r0, #0
 802d036:	dbec      	blt.n	802d012 <__swhatbuf_r+0x12>
 802d038:	9901      	ldr	r1, [sp, #4]
 802d03a:	f401 4170 	and.w	r1, r1, #61440	@ 0xf000
 802d03e:	f5a1 5300 	sub.w	r3, r1, #8192	@ 0x2000
 802d042:	4259      	negs	r1, r3
 802d044:	4159      	adcs	r1, r3
 802d046:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 802d04a:	e7eb      	b.n	802d024 <__swhatbuf_r+0x24>

0802d04c <__smakebuf_r>:
 802d04c:	898b      	ldrh	r3, [r1, #12]
 802d04e:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802d050:	079d      	lsls	r5, r3, #30
 802d052:	4606      	mov	r6, r0
 802d054:	460c      	mov	r4, r1
 802d056:	d507      	bpl.n	802d068 <__smakebuf_r+0x1c>
 802d058:	f104 0347 	add.w	r3, r4, #71	@ 0x47
 802d05c:	6023      	str	r3, [r4, #0]
 802d05e:	6123      	str	r3, [r4, #16]
 802d060:	2301      	movs	r3, #1
 802d062:	6163      	str	r3, [r4, #20]
 802d064:	b003      	add	sp, #12
 802d066:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802d068:	ab01      	add	r3, sp, #4
 802d06a:	466a      	mov	r2, sp
 802d06c:	f7ff ffc8 	bl	802d000 <__swhatbuf_r>
 802d070:	9f00      	ldr	r7, [sp, #0]
 802d072:	4605      	mov	r5, r0
 802d074:	4639      	mov	r1, r7
 802d076:	4630      	mov	r0, r6
 802d078:	f7fb ffba 	bl	8028ff0 <_malloc_r>
 802d07c:	b948      	cbnz	r0, 802d092 <__smakebuf_r+0x46>
 802d07e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802d082:	059a      	lsls	r2, r3, #22
 802d084:	d4ee      	bmi.n	802d064 <__smakebuf_r+0x18>
 802d086:	f023 0303 	bic.w	r3, r3, #3
 802d08a:	f043 0302 	orr.w	r3, r3, #2
 802d08e:	81a3      	strh	r3, [r4, #12]
 802d090:	e7e2      	b.n	802d058 <__smakebuf_r+0xc>
 802d092:	89a3      	ldrh	r3, [r4, #12]
 802d094:	6020      	str	r0, [r4, #0]
 802d096:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802d09a:	81a3      	strh	r3, [r4, #12]
 802d09c:	9b01      	ldr	r3, [sp, #4]
 802d09e:	e9c4 0704 	strd	r0, r7, [r4, #16]
 802d0a2:	b15b      	cbz	r3, 802d0bc <__smakebuf_r+0x70>
 802d0a4:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802d0a8:	4630      	mov	r0, r6
 802d0aa:	f000 f81d 	bl	802d0e8 <_isatty_r>
 802d0ae:	b128      	cbz	r0, 802d0bc <__smakebuf_r+0x70>
 802d0b0:	89a3      	ldrh	r3, [r4, #12]
 802d0b2:	f023 0303 	bic.w	r3, r3, #3
 802d0b6:	f043 0301 	orr.w	r3, r3, #1
 802d0ba:	81a3      	strh	r3, [r4, #12]
 802d0bc:	89a3      	ldrh	r3, [r4, #12]
 802d0be:	431d      	orrs	r5, r3
 802d0c0:	81a5      	strh	r5, [r4, #12]
 802d0c2:	e7cf      	b.n	802d064 <__smakebuf_r+0x18>

0802d0c4 <_fstat_r>:
 802d0c4:	b538      	push	{r3, r4, r5, lr}
 802d0c6:	4d07      	ldr	r5, [pc, #28]	@ (802d0e4 <_fstat_r+0x20>)
 802d0c8:	2300      	movs	r3, #0
 802d0ca:	4604      	mov	r4, r0
 802d0cc:	4608      	mov	r0, r1
 802d0ce:	4611      	mov	r1, r2
 802d0d0:	602b      	str	r3, [r5, #0]
 802d0d2:	f7d7 f839 	bl	8004148 <_fstat>
 802d0d6:	1c43      	adds	r3, r0, #1
 802d0d8:	d102      	bne.n	802d0e0 <_fstat_r+0x1c>
 802d0da:	682b      	ldr	r3, [r5, #0]
 802d0dc:	b103      	cbz	r3, 802d0e0 <_fstat_r+0x1c>
 802d0de:	6023      	str	r3, [r4, #0]
 802d0e0:	bd38      	pop	{r3, r4, r5, pc}
 802d0e2:	bf00      	nop
 802d0e4:	2402b260 	.word	0x2402b260

0802d0e8 <_isatty_r>:
 802d0e8:	b538      	push	{r3, r4, r5, lr}
 802d0ea:	4d06      	ldr	r5, [pc, #24]	@ (802d104 <_isatty_r+0x1c>)
 802d0ec:	2300      	movs	r3, #0
 802d0ee:	4604      	mov	r4, r0
 802d0f0:	4608      	mov	r0, r1
 802d0f2:	602b      	str	r3, [r5, #0]
 802d0f4:	f7d7 f838 	bl	8004168 <_isatty>
 802d0f8:	1c43      	adds	r3, r0, #1
 802d0fa:	d102      	bne.n	802d102 <_isatty_r+0x1a>
 802d0fc:	682b      	ldr	r3, [r5, #0]
 802d0fe:	b103      	cbz	r3, 802d102 <_isatty_r+0x1a>
 802d100:	6023      	str	r3, [r4, #0]
 802d102:	bd38      	pop	{r3, r4, r5, pc}
 802d104:	2402b260 	.word	0x2402b260

0802d108 <abort>:
 802d108:	b508      	push	{r3, lr}
 802d10a:	2006      	movs	r0, #6
 802d10c:	f000 f840 	bl	802d190 <raise>
 802d110:	2001      	movs	r0, #1
 802d112:	f7d6 ffc9 	bl	80040a8 <_exit>

0802d116 <_calloc_r>:
 802d116:	b570      	push	{r4, r5, r6, lr}
 802d118:	fba1 5402 	umull	r5, r4, r1, r2
 802d11c:	b93c      	cbnz	r4, 802d12e <_calloc_r+0x18>
 802d11e:	4629      	mov	r1, r5
 802d120:	f7fb ff66 	bl	8028ff0 <_malloc_r>
 802d124:	4606      	mov	r6, r0
 802d126:	b928      	cbnz	r0, 802d134 <_calloc_r+0x1e>
 802d128:	2600      	movs	r6, #0
 802d12a:	4630      	mov	r0, r6
 802d12c:	bd70      	pop	{r4, r5, r6, pc}
 802d12e:	220c      	movs	r2, #12
 802d130:	6002      	str	r2, [r0, #0]
 802d132:	e7f9      	b.n	802d128 <_calloc_r+0x12>
 802d134:	462a      	mov	r2, r5
 802d136:	4621      	mov	r1, r4
 802d138:	f7fd fca2 	bl	802aa80 <memset>
 802d13c:	e7f5      	b.n	802d12a <_calloc_r+0x14>

0802d13e <_raise_r>:
 802d13e:	291f      	cmp	r1, #31
 802d140:	b538      	push	{r3, r4, r5, lr}
 802d142:	4605      	mov	r5, r0
 802d144:	460c      	mov	r4, r1
 802d146:	d904      	bls.n	802d152 <_raise_r+0x14>
 802d148:	2316      	movs	r3, #22
 802d14a:	6003      	str	r3, [r0, #0]
 802d14c:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802d150:	bd38      	pop	{r3, r4, r5, pc}
 802d152:	6bc2      	ldr	r2, [r0, #60]	@ 0x3c
 802d154:	b112      	cbz	r2, 802d15c <_raise_r+0x1e>
 802d156:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
 802d15a:	b94b      	cbnz	r3, 802d170 <_raise_r+0x32>
 802d15c:	4628      	mov	r0, r5
 802d15e:	f000 f831 	bl	802d1c4 <_getpid_r>
 802d162:	4622      	mov	r2, r4
 802d164:	4601      	mov	r1, r0
 802d166:	4628      	mov	r0, r5
 802d168:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802d16c:	f000 b818 	b.w	802d1a0 <_kill_r>
 802d170:	2b01      	cmp	r3, #1
 802d172:	d00a      	beq.n	802d18a <_raise_r+0x4c>
 802d174:	1c59      	adds	r1, r3, #1
 802d176:	d103      	bne.n	802d180 <_raise_r+0x42>
 802d178:	2316      	movs	r3, #22
 802d17a:	6003      	str	r3, [r0, #0]
 802d17c:	2001      	movs	r0, #1
 802d17e:	e7e7      	b.n	802d150 <_raise_r+0x12>
 802d180:	2100      	movs	r1, #0
 802d182:	f842 1024 	str.w	r1, [r2, r4, lsl #2]
 802d186:	4620      	mov	r0, r4
 802d188:	4798      	blx	r3
 802d18a:	2000      	movs	r0, #0
 802d18c:	e7e0      	b.n	802d150 <_raise_r+0x12>
	...

0802d190 <raise>:
 802d190:	4b02      	ldr	r3, [pc, #8]	@ (802d19c <raise+0xc>)
 802d192:	4601      	mov	r1, r0
 802d194:	6818      	ldr	r0, [r3, #0]
 802d196:	f7ff bfd2 	b.w	802d13e <_raise_r>
 802d19a:	bf00      	nop
 802d19c:	240001d4 	.word	0x240001d4

0802d1a0 <_kill_r>:
 802d1a0:	b538      	push	{r3, r4, r5, lr}
 802d1a2:	4d07      	ldr	r5, [pc, #28]	@ (802d1c0 <_kill_r+0x20>)
 802d1a4:	2300      	movs	r3, #0
 802d1a6:	4604      	mov	r4, r0
 802d1a8:	4608      	mov	r0, r1
 802d1aa:	4611      	mov	r1, r2
 802d1ac:	602b      	str	r3, [r5, #0]
 802d1ae:	f7d6 ff69 	bl	8004084 <_kill>
 802d1b2:	1c43      	adds	r3, r0, #1
 802d1b4:	d102      	bne.n	802d1bc <_kill_r+0x1c>
 802d1b6:	682b      	ldr	r3, [r5, #0]
 802d1b8:	b103      	cbz	r3, 802d1bc <_kill_r+0x1c>
 802d1ba:	6023      	str	r3, [r4, #0]
 802d1bc:	bd38      	pop	{r3, r4, r5, pc}
 802d1be:	bf00      	nop
 802d1c0:	2402b260 	.word	0x2402b260

0802d1c4 <_getpid_r>:
 802d1c4:	f7d6 bf56 	b.w	8004074 <_getpid>

0802d1c8 <_init>:
 802d1c8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802d1ca:	bf00      	nop
 802d1cc:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802d1ce:	bc08      	pop	{r3}
 802d1d0:	469e      	mov	lr, r3
 802d1d2:	4770      	bx	lr

0802d1d4 <_fini>:
 802d1d4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802d1d6:	bf00      	nop
 802d1d8:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802d1da:	bc08      	pop	{r3}
 802d1dc:	469e      	mov	lr, r3
 802d1de:	4770      	bx	lr