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@@ -15,9 +15,9 @@ module top (
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inout wire spi_mosi,
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inout wire spi_miso,
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inout wire spi_clk,
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- inout wire spi_flash_cs_n,
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+ output wire spi_flash_cs_n,
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`ifdef HAS_PSRAM
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- inout wire spi_ram_cs_n,
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+ output wire spi_ram_cs_n,
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`endif
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// USB
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@@ -81,25 +81,6 @@ module top (
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wire ub_we;
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wire ub_ack;
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- // SPI
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- wire [7:0] sb_addr;
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- wire [7:0] sb_di;
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- wire [7:0] sb_do;
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- wire sb_rw;
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- wire sb_stb;
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- wire sb_ack;
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- wire sb_irq;
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- wire sb_wkup;
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-
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- wire sio_miso_o, sio_miso_oe, sio_miso_i;
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- wire sio_mosi_o, sio_mosi_oe, sio_mosi_i;
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- wire sio_clk_o, sio_clk_oe, sio_clk_i;
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- wire [3:0] sio_csn_o, sio_csn_oe;
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-
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- // LEDs
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- reg [4:0] led_ctrl;
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- wire [2:0] rgb_pwm;
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-
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// WarmBoot
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reg boot_now;
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reg [1:0] boot_sel;
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@@ -134,7 +115,6 @@ module top (
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assign wb_rdata_flat[i*WB_DW+:WB_DW] = wb_rdata[i];
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-
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// UART [1]
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// ----
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@@ -155,154 +135,57 @@ module top (
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);
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- // SPI
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+ // SPI [2]
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// ---
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- // Hard-IP
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-`ifndef SIM
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- SB_SPI #(
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- .BUS_ADDR74("0b0000")
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- ) spi_I (
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- .SBCLKI(clk_24m),
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- .SBRWI(sb_rw),
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- .SBSTBI(sb_stb),
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- .SBADRI7(sb_addr[7]),
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- .SBADRI6(sb_addr[6]),
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- .SBADRI5(sb_addr[5]),
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- .SBADRI4(sb_addr[4]),
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- .SBADRI3(sb_addr[3]),
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- .SBADRI2(sb_addr[2]),
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- .SBADRI1(sb_addr[1]),
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- .SBADRI0(sb_addr[0]),
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- .SBDATI7(sb_di[7]),
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- .SBDATI6(sb_di[6]),
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- .SBDATI5(sb_di[5]),
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- .SBDATI4(sb_di[4]),
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- .SBDATI3(sb_di[3]),
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- .SBDATI2(sb_di[2]),
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- .SBDATI1(sb_di[1]),
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- .SBDATI0(sb_di[0]),
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- .MI(sio_miso_i),
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- .SI(sio_mosi_i),
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- .SCKI(sio_clk_i),
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- .SCSNI(1'b1),
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- .SBDATO7(sb_do[7]),
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- .SBDATO6(sb_do[6]),
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- .SBDATO5(sb_do[5]),
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- .SBDATO4(sb_do[4]),
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- .SBDATO3(sb_do[3]),
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- .SBDATO2(sb_do[2]),
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- .SBDATO1(sb_do[1]),
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- .SBDATO0(sb_do[0]),
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- .SBACKO(sb_ack),
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- .SPIIRQ(sb_irq),
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- .SPIWKUP(sb_wkup),
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- .SO(sio_miso_o),
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- .SOE(sio_miso_oe),
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- .MO(sio_mosi_o),
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- .MOE(sio_mosi_oe),
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- .SCKO(sio_clk_o),
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- .SCKOE(sio_clk_oe),
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- .MCSNO3(sio_csn_o[3]),
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- .MCSNO2(sio_csn_o[2]),
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- .MCSNO1(sio_csn_o[1]),
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- .MCSNO0(sio_csn_o[0]),
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- .MCSNOE3(sio_csn_oe[3]),
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- .MCSNOE2(sio_csn_oe[2]),
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- .MCSNOE1(sio_csn_oe[1]),
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- .MCSNOE0(sio_csn_oe[0])
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- );
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+ ice40_spi_wb #(
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+`ifdef HAS_PSRAM
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+ .N_CS(2),
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`else
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- reg [3:0] sim;
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-
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- assign sb_ack = sb_stb;
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- assign sb_do = { sim, 4'h8 };
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-
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- always @(posedge clk_24m)
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- if (rst)
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- sim <= 0;
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- else if (sb_ack & sb_rw)
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- sim <= sim + 1;
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+ .N_CS(1),
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`endif
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-
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- // IO pads
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- SB_IO #(
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- .PIN_TYPE(6'b101001),
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- .PULLUP(1'b1)
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- ) spi_io_I[2:0] (
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- .PACKAGE_PIN ({spi_mosi, spi_miso, spi_clk }),
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- .OUTPUT_ENABLE({sio_mosi_oe, sio_miso_oe, sio_clk_oe}),
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- .D_OUT_0 ({sio_mosi_o, sio_miso_o, sio_clk_o }),
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- .D_IN_0 ({sio_mosi_i, sio_miso_i, sio_clk_i })
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- );
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-
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- // Bypass OE for CS_n lines
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- assign spi_flash_cs_n = sio_csn_o[0];
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+ .WITH_IOB(1),
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+ .UNIT(0)
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+ ) spi_I (
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+ .pad_mosi (spi_mosi),
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+ .pad_miso (spi_miso),
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+ .pad_clk (spi_clk),
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`ifdef HAS_PSRAM
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- assign spi_ram_cs_n = sio_csn_o[1];
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+ .pad_csn ({spi_ram_cs_n, spi_flash_cs_n}),
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+`else
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+ .pad_csn (spi_flash_cs_n),
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`endif
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+ .wb_addr (wb_addr[3:0]),
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+ .wb_rdata (wb_rdata[2]),
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+ .wb_wdata (wb_wdata),
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+ .wb_we (wb_we),
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+ .wb_cyc (wb_cyc[2]),
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+ .wb_ack (wb_ack[2]),
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+ .clk (clk_24m),
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+ .rst (rst)
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+ );
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- // Bus interface
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- assign sb_addr = { 4'h0, wb_addr[3:0] };
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- assign sb_di = wb_wdata[7:0];
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- assign sb_rw = wb_we;
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- assign sb_stb = wb_cyc[2];
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-
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- assign wb_rdata[2] = { {(WB_DW-8){1'b0}}, wb_cyc[2] ? sb_do : 8'h00 };
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- assign wb_ack[2] = sb_ack;
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-
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-
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- // LEDs
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- // ----
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- SB_LEDDA_IP led_I (
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- .LEDDCS(wb_addr[4] & wb_we),
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- .LEDDCLK(clk_24m),
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- .LEDDDAT7(wb_wdata[7]),
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- .LEDDDAT6(wb_wdata[6]),
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- .LEDDDAT5(wb_wdata[5]),
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- .LEDDDAT4(wb_wdata[4]),
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- .LEDDDAT3(wb_wdata[3]),
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- .LEDDDAT2(wb_wdata[2]),
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- .LEDDDAT1(wb_wdata[1]),
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- .LEDDDAT0(wb_wdata[0]),
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- .LEDDADDR3(wb_addr[3]),
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- .LEDDADDR2(wb_addr[2]),
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- .LEDDADDR1(wb_addr[1]),
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- .LEDDADDR0(wb_addr[0]),
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- .LEDDDEN(wb_cyc[3]),
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- .LEDDEXE(led_ctrl[1]),
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- .PWMOUT0(rgb_pwm[0]),
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- .PWMOUT1(rgb_pwm[1]),
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- .PWMOUT2(rgb_pwm[2]),
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- .LEDDON()
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- );
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+ // RGB LEDs [3]
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+ // --------
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- SB_RGBA_DRV #(
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+ ice40_rgb_wb #(
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.CURRENT_MODE("0b1"),
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.RGB0_CURRENT("0b000001"),
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.RGB1_CURRENT("0b000001"),
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.RGB2_CURRENT("0b000001")
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- ) rgb_drv_I (
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- .RGBLEDEN(led_ctrl[2]),
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- .RGB0PWM(rgb_pwm[0]),
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- .RGB1PWM(rgb_pwm[1]),
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- .RGB2PWM(rgb_pwm[2]),
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- .CURREN(led_ctrl[3]),
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- .RGB0(rgb[0]),
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- .RGB1(rgb[1]),
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- .RGB2(rgb[2])
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+ ) rgb_I (
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+ .pad_rgb (rgb),
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+ .wb_addr (wb_addr[4:0]),
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+ .wb_rdata (wb_rdata[3]),
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+ .wb_wdata (wb_wdata),
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+ .wb_we (wb_we),
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+ .wb_cyc (wb_cyc[3]),
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+ .wb_ack (wb_ack[3]),
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+ .clk (clk_24m),
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+ .rst (rst)
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);
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- always @(posedge clk_24m or posedge rst)
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- if (rst)
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- led_ctrl <= 0;
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- else if (wb_cyc[3] & ~wb_addr[4] & wb_we)
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- led_ctrl <= wb_wdata[4:0];
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-
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- assign wb_rdata[3] = { WB_DW{1'b0} };
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- assign wb_ack[3] = wb_cyc[3];
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-
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// USB Core
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// --------
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