Update all no2xxx submodules and adapt as needed to new APIs

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

build

@@ -1 +1 @@
-Subproject commit e9d0d86baff55e1341ccd0ab510eb7e17f9c0fb7
+Subproject commit d9d7a5db11c788e6cba9f4b28f47c3ee56f6cfad

cores/no2ice40

@@ -1 +1 @@
-Subproject commit e47c023fbc6da9f1ffc43e8c07b1ede8961a3b3d
+Subproject commit e2a0c694e0565ca8e065d27ac82f6746c3cb28a0

cores/no2misc

@@ -1 +1 @@
-Subproject commit d7e0208ac11637baf1d004aa13b0570a013aff14
+Subproject commit 16103ac61c8f11e63e043229a0a7a085bc38bde0

projects/riscv_usb/rtl/dfu_helper.v

@@ -95,8 +95,7 @@ module dfu_helper #(
 	glitch_filter #(
 		.L(4)
 	) btn_flt_I (
-		.pin_iob_reg(btn_iob ^ BTN_MODE[0]),
-		.cond(1'b1),
+		.in(btn_iob ^ BTN_MODE[0]),
 		.val(btn_v),
 		.rise(btn_r),
 		.fall(btn_f),

projects/riscv_usb/rtl/top.v

@@ -261,12 +261,12 @@ module top (
 	) uart_I (
 		.uart_tx(uart_tx),
 		.uart_rx(uart_rx),
-		.bus_addr(wb_addr[1:0]),
-		.bus_wdata(wb_wdata),
-		.bus_rdata(wb_rdata[1]),
-		.bus_cyc(wb_cyc[1]),
-		.bus_ack(wb_ack[1]),
-		.bus_we(wb_we),
+		.wb_addr(wb_addr[1:0]),
+		.wb_rdata(wb_rdata[1]),
+		.wb_we(wb_we),
+		.wb_wdata(wb_wdata),
+		.wb_cyc(wb_cyc[1]),
+		.wb_ack(wb_ack[1]),
 		.clk(clk_24m),
 		.rst(rst)
 	);