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Adapt SW to RTL changes.

Signed-off-by: Jakub Duchniewicz <j.duchniewicz@gmail.com>
Jakub Duchniewicz 1 月之前
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816e22617b
共有 2 个文件被更改,包括 2 次插入2 次删除
  1. 1 1
      projects/riscv_usb/fw/registers.h
  2. 1 1
      projects/riscv_usb/rtl/top.v

+ 1 - 1
projects/riscv_usb/fw/registers.h

@@ -9,7 +9,7 @@
 typedef struct {
     uint32_t period1;
     uint32_t delay1;
-    uint32_t duty2;
+    uint32_t period2;
     uint32_t delay2;
     uint32_t duty3;
     uint32_t delay3;

+ 1 - 1
projects/riscv_usb/rtl/top.v

@@ -244,7 +244,7 @@ module top (
     // --------
     assign period1 = mailbox_regs_flat[15:0];        // First 16 bits for period1
     assign delay1 = mailbox_regs_flat[31:16];        // Next 16 bits for delay1
-    assign period2 = mailbox_regs_flat[47:32];         // Next 16 bits for duty2
+    assign period2 = mailbox_regs_flat[47:32];       // Next 16 bits for period2
     assign delay2 = mailbox_regs_flat[63:48];        // Next 16 bits for delay2
     assign period3 = mailbox_regs_flat[79:64];       // Next 16 bits for period3
     assign duty3 = mailbox_regs_flat[95:80];         // Next 16 bits for duty3