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@@ -14,6 +14,10 @@
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/* Use 640x480 60 Hz video and not original 640x400 70 Hz mode */
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`define COMPAT_MODE
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+/* Enable dithering */
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+`define DITHER
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+
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+
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module vid_top (
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// Video output
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output wire [3:0] hdmi_r,
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@@ -83,6 +87,11 @@ module vid_top (
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reg pp_data_load_2;
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reg [31:0] pp_data_3;
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+ wire pp_dither_ena_4;
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+ wire pp_dither_r_4;
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+ wire pp_dither_g_4;
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+ wire pp_dither_b_4;
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+
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wire [11:0] pp_data_4;
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wire pp_hsync_4;
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wire pp_vsync_4;
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@@ -246,11 +255,23 @@ module vid_top (
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pp_data_3 <= pp_data_load_2 ? fb_v_data_1 : { 8'h00, pp_data_3[31:8] };
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// Palette fetch
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+`ifdef DITHERING
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+ assign pp_dither_ena_4 = pp_xdbl_1 ^ pp_ydbl_1;
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+ assign pp_dither_r_4 = (pal_r_data_1[11] & pp_dither_ena) &~& pal_r_data_1[15:14];
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+ assign pp_dither_g_4 = (pal_r_data_1[ 6] & pp_dither_ena) &~& pal_r_data_1[10: 9];
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+ assign pp_dither_b_4 = (pal_r_data_1[ 0] & pp_dither_ena) &~& pal_r_data_1[ 4: 3];
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+`else
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+ assign pp_dither_ena_4 = 1'b0;
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+ assign pp_dither_r_4 = 1'b0;
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+ assign pp_dither_g_4 = 1'b0;
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+ assign pp_dither_b_4 = 1'b0;
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+`endif
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+
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assign pal_r_addr_0 = pp_data_3[7:0];
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assign pp_data_4 = {
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- pal_r_data_1[15:12], // R[15:11]
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- pal_r_data_1[10: 7], // G[10: 5]
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- pal_r_data_1[4:1] // B[ 4: 0]
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+ pal_r_data_1[15:12] + pp_dither_r_4, // R[15:11]
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+ pal_r_data_1[10: 7] + pp_dither_g_4, // G[10: 5]
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+ pal_r_data_1[4:1] + pp_dither_b_4 // B[ 4: 0]
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};
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// Sync signals
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