projects/riscv_usb: Set clock to their real frequency · 903ae87b18 - Elekt

projects/riscv_usb: Set clock to their real frequency

There is really no point in adding any margin ... there is already
plenty of margin in the nextpnr timing database

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

Sylvain Munaut 4 years ago

parent

fc12f0de48

commit

903ae87b18

1 changed files with 2 additions and 2 deletions

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							+ 2
							
							- 2
						
projects/riscv_usb/data/clocks.py
							 
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				@@ -1,2 +1,2 @@
			
				-ctx.addClock("clk_24m", 25)
			
				-ctx.addClock("clk_48m", 49)
			
				+ctx.addClock("clk_24m", 24)
			
				+ctx.addClock("clk_48m", 48)