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@@ -260,17 +260,17 @@ module vgen #(
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assign fbw_col_addr = cnt_col[6:1];
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// Map to color
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- assign color[0] = { sr_data16[15:11], sr_data16[15:13] };
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+ assign color[2] = { sr_data16[15:11], sr_data16[15:13] };
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assign color[1] = { sr_data16[10: 5], sr_data16[10: 9] };
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- assign color[2] = { sr_data16[ 4: 0], sr_data16[ 4: 2] };
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+ assign color[0] = { sr_data16[ 4: 0], sr_data16[ 4: 2] };
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generate
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if (BITDEPTH == 8)
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- assign fbw_data = { color[0][7:5], color[1][7:5], color[2][7:6] };
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+ assign fbw_data = { color[2][7:5], color[1][7:5], color[0][7:6] };
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else if (BITDEPTH == 16)
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- assign fbw_data = { color[0][7:3], color[1][7:2], color[2][7:3] };
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+ assign fbw_data = { color[2][7:3], color[1][7:2], color[0][7:3] };
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else if (BITDEPTH == 24)
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- assign fbw_data = { color[0], color[1], color[2] };
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+ assign fbw_data = { color[2], color[1], color[0] };
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endgenerate
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