projects/riscv_usb: Fix bus access to WARMBOOT

Make sure to gate on write enable or any read access will reboot ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

projects/riscv_usb/rtl/top.v

@@ -485,7 +485,7 @@ module top (
 		if (rst) begin
 			boot_now <= 1'b0;
 			boot_sel <= 2'b00;
-		end else if (wb_cyc[0] & (wb_addr[2:0] == 3'b000)) begin
+		end else if (wb_cyc[0] & wb_we & (wb_addr[2:0] == 3'b000)) begin
 			boot_now <= wb_wdata[2];
 			boot_sel <= wb_wdata[1:0];
 		end