projects/memtest: Update to newer uart2wb

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

projects/memtest/rtl/boards.vh

@@ -38,20 +38,30 @@
 		// 48
 //	`define PLL_DIVF 7'b0111111
 //	`define PLL_DIVQ 3'b100
+//	`define SYS_FREQ 12e6
 
 		// 96
 //	`define PLL_DIVF 7'b0111111
 //	`define PLL_DIVQ 3'b011
+//	`define SYS_FREQ 24e6
 
 		// 144
 //	`define PLL_DIVF 7'b0101111
 //	`define PLL_DIVQ 3'b010
+//	`define SYS_FREQ 36e6
 
 		// 147
 	`define PLL_DIVF 7'b0110000
 	`define PLL_DIVQ 3'b010
+	`define SYS_FREQ 36.75e6
+
+		// 180
+//	`define PLL_DIVF 7'b0111011
+//	`define PLL_DIVQ 3'b010
+//	`define SYS_FREQ 45e6
 
 		// 200
 //	`define PLL_DIVF 7'b1000010
 //	`define PLL_DIVQ 3'b010
+//	`define SYS_FREQ 50e6
 `endif

projects/memtest/rtl/top.v

@@ -60,6 +60,10 @@ module top (
 	input  wire clk_in
 );
 
+	// Target UART baudrate
+	localparam integer BAUDRATE = 2000000;
+
+
 	// Signals
 	// -------
 
@@ -140,6 +144,7 @@ module top (
 
 `ifdef HAS_UART
 	uart2wb #(
+		.UART_DIV($rtoi((`SYS_FREQ / BAUDRATE) + 0.5)),
 `elsif HAS_USB
 	muacm2wb #(
 `endif
@@ -148,7 +153,6 @@ module top (
 `ifdef HAS_UART
 		.uart_rx  (uart_rx),
 		.uart_tx  (uart_tx),
-		.uart_div (8'd16),
 `elsif HAS_USB
 		.usb_dp   (usb_dp),
 		.usb_dn   (usb_dn),