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cores/video: Fixup IOBs in HDMI PHYs

 - Set input mode to '11'
 - Disable tristate with PIN_TYPE rather than forcing
   OUTPUT_ENABLE
 - Don't force CLOCK_ENABLE to 1'b1, just leave it off
 - Better formatting and use of the verilog multiple instances
   feature rather than generate loop

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut 4 years ago
parent
commit
b2c5aff5e6
2 changed files with 31 additions and 69 deletions
  1. 26 61
      cores/video/rtl/hdmi_phy_2x.v
  2. 5 8
      cores/video/rtl/hdmi_phy_4x.v

+ 26 - 61
cores/video/rtl/hdmi_phy_2x.v

@@ -64,76 +64,41 @@ module hdmi_phy_2x #(
 		in_data1d <= in_data1;
 
 	// Data bits
-	genvar i;
-	generate
-		for (i=0; i<DW; i=i+1)
-		begin : bit
-			SB_IO #(
-				.PIN_TYPE(6'b010000),
-				.PULLUP(1'b0),
-				.NEG_TRIGGER(1'b0),
-				.IO_STANDARD("SB_LVCMOS")
-			) iob_hdmi_data_I (
-				.PACKAGE_PIN(hdmi_data[i]),
-				.CLOCK_ENABLE(1'b1),
-				.OUTPUT_CLK(clk_1x),
-				.D_OUT_0(in_data0[i]),
-				.D_OUT_1(in_data1d[i])
-			);
-		end
-	endgenerate
-
-	// H-Sync
-	SB_IO #(
-		.PIN_TYPE(6'b010100),
-		.PULLUP(1'b0),
-		.NEG_TRIGGER(1'b0),
-		.IO_STANDARD("SB_LVCMOS")
-	) iob_hdmi_hsync_I (
-		.PACKAGE_PIN(hdmi_hsync),
-		.CLOCK_ENABLE(1'b1),
-		.OUTPUT_CLK(clk_1x),
-		.D_OUT_0(in_hsync)
-	);
-
-	// V-Sync
 	SB_IO #(
-		.PIN_TYPE(6'b010100),
-		.PULLUP(1'b0),
-		.NEG_TRIGGER(1'b0),
-		.IO_STANDARD("SB_LVCMOS")
-	) iob_hdmi_vsync_I (
-		.PACKAGE_PIN(hdmi_vsync),
-		.CLOCK_ENABLE(1'b1),
-		.OUTPUT_CLK(clk_1x),
-		.D_OUT_0(in_vsync)
+		.PIN_TYPE    (6'b0100_11),
+		.PULLUP      (1'b0),
+		.NEG_TRIGGER (1'b0),
+		.IO_STANDARD ("SB_LVCMOS")
+	) iob_hdmi_data_I[DW-1:0] (
+		.PACKAGE_PIN (hdmi_data),
+		.OUTPUT_CLK  (clk_1x),
+		.D_OUT_0     (in_data0),
+		.D_OUT_1     (in_data1d)
 	);
 
-	// DE
+	// H-Sync / V-Sync / DE
 	SB_IO #(
-		.PIN_TYPE(6'b010100),
-		.PULLUP(1'b0),
-		.NEG_TRIGGER(1'b0),
-		.IO_STANDARD("SB_LVCMOS")
-	) iob_hdmi_de_I (
-		.PACKAGE_PIN(hdmi_de),
-		.CLOCK_ENABLE(1'b1),
-		.OUTPUT_CLK(clk_1x),
-		.D_OUT_0(in_de)
+		.PIN_TYPE    (6'b0101_11),
+		.PULLUP      (1'b0),
+		.NEG_TRIGGER (1'b0),
+		.IO_STANDARD ("SB_LVCMOS")
+	) iob_hdmi_ctrl_I (
+		.PACKAGE_PIN ({hdmi_hsync, hdmi_vsync, hdmi_de}),
+		.OUTPUT_CLK  (clk_1x),
+		.D_OUT_0     ({in_hsync,   in_vsync,   in_de})
 	);
 
 	// Clock
 	SB_IO #(
-		.PIN_TYPE(6'b010000),
-		.PULLUP(1'b0),
-		.NEG_TRIGGER(1'b0),
-		.IO_STANDARD("SB_LVCMOS")
+		.PIN_TYPE    (6'b0100_11),
+		.PULLUP      (1'b0),
+		.NEG_TRIGGER (1'b0),
+		.IO_STANDARD ("SB_LVCMOS")
 	) iob_hdmi_clk_I (
-		.PACKAGE_PIN(hdmi_clk),
-		.CLOCK_ENABLE(1'b1),
-		.OUTPUT_CLK(clk_2x),
-		.D_OUT_0(1'b0),
-		.D_OUT_1(1'b1)
+		.PACKAGE_PIN (hdmi_clk),
+		.OUTPUT_CLK  (clk_2x),
+		.D_OUT_0     (1'b0),
+		.D_OUT_1     (1'b1)
 	);
 
 endmodule // hdmi_phy_2x

+ 5 - 8
cores/video/rtl/hdmi_phy_4x.v

@@ -70,10 +70,9 @@ module hdmi_phy_4x #(
 	// -----
 
 	SB_IO #(
-		.PIN_TYPE(6'b1100_01)
+		.PIN_TYPE(6'b0100_11)
 	) io_clk_I (
 		.PACKAGE_PIN(hdmi_clk),
-		.OUTPUT_ENABLE(1'b1),
 		.D_OUT_0(1'b0),
 		.D_OUT_1(1'b1),
 		.OUTPUT_CLK(clk_4x)
@@ -108,12 +107,11 @@ module hdmi_phy_4x #(
 	endgenerate
 
 	SB_IO #(
-		.PIN_TYPE(6'b 1101_01)
+		.PIN_TYPE(6'b 0101_11)
 	) io_ctrl_I[2:0] (
 		.PACKAGE_PIN(ctrl_pad),
-		.OUTPUT_ENABLE(1'b1),
 		.D_OUT_0(ctrl_iob_o),
-		.OUTPUT_CLK(clk_4x),
+		.OUTPUT_CLK(clk_4x)
 	);
 
 	assign hdmi_hsync = ctrl_pad[2];
@@ -152,12 +150,11 @@ module hdmi_phy_4x #(
 	endgenerate
 
 	SB_IO #(
-		.PIN_TYPE(6'b 1101_01)
+		.PIN_TYPE(6'b 0101_11)
 	) io_data_I[DW-1:0] (
 		.PACKAGE_PIN(data_pad),
-		.OUTPUT_ENABLE(1'b1),
 		.D_OUT_0(data_iob_o),
-		.OUTPUT_CLK(clk_4x),
+		.OUTPUT_CLK(clk_4x)
 	);
 
 	assign hdmi_data = data_pad;