projects/riscv_usb: Add support for e1tracer,ice1usb,icepick boards

Not the cleanest way to handle all those difference, but this will
do for now.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

projects/riscv_usb/data/top-e1tracer.pcf

@@ -0,0 +1,39 @@
+# LIU
+set_io -nowarn liu_mosi 31
+set_io -nowarn liu_miso 32
+set_io -nowarn liu_clk 34
+set_io -nowarn liu_cs_n[0] 42
+set_io -nowarn liu_cs_n[1] 43
+
+set_io -nowarn liu0_rx_data 45
+set_io -nowarn liu0_rx_clk  44
+set_io -nowarn liu1_rx_data 47
+set_io -nowarn liu1_rx_clk  46
+
+# Vio (needed for compat with proto)
+set_io -nowarn vio_pdm 19
+
+# USB
+set_io -nowarn usb_dp 10
+set_io -nowarn usb_dn 9
+set_io -nowarn usb_pu 6
+
+# UART (used for DFU debug)
+set_io -nowarn uart_tx 38
+
+# Clock
+set_io -nowarn clk_in 20
+
+# Button
+set_io -nowarn -pullup yes btn 25
+
+# SPI
+set_io -nowarn -pullup yes spi_mosi 14
+set_io -nowarn -pullup yes spi_miso 17
+set_io -nowarn -pullup yes spi_clk 15
+set_io -nowarn -pullup yes spi_flash_cs_n 16
+
+# Leds
+set_io -nowarn rgb[0] 39
+set_io -nowarn rgb[1] 40
+set_io -nowarn rgb[2] 41

projects/riscv_usb/data/top-ice1usb.pcf

@@ -0,0 +1,25 @@
+# SPI
+set_io -nowarn spi_mosi 14
+set_io -nowarn spi_miso 17
+set_io -nowarn spi_clk 15
+set_io -nowarn spi_flash_cs_n 16
+
+# USB
+set_io -nowarn usb_dp 10
+set_io -nowarn usb_dn  9
+set_io -nowarn usb_pu 11
+
+# UART
+set_io -nowarn uart_rx 21
+set_io -nowarn uart_tx 12
+
+# Clock
+set_io -nowarn clk_in 44
+
+# Button
+set_io -nowarn -pullup yes btn 18
+
+# Leds
+set_io -nowarn rgb[0] 39
+set_io -nowarn rgb[1] 40
+set_io -nowarn rgb[2] 41

projects/riscv_usb/data/top-icepick.pcf

@@ -0,0 +1,65 @@
+# IOs
+set_io -nowarn io_d_a[5] 43
+set_io -nowarn io_d_a[4] 42
+set_io -nowarn io_d_a[3] 38
+set_io -nowarn io_d_a[2] 34
+set_io -nowarn io_d_a[1] 32
+set_io -nowarn io_d_a[0] 31
+
+set_io -nowarn io_p_a[5] 37
+set_io -nowarn io_p_a[4] 36
+set_io -nowarn io_p_a[3] 35
+set_io -nowarn io_p_a[2] 28
+set_io -nowarn io_p_a[1] 27
+set_io -nowarn io_p_a[0] 26
+
+set_io -nowarn io_d_b[3] 47
+set_io -nowarn io_d_b[2] 46
+set_io -nowarn io_d_b[1] 45
+set_io -nowarn io_d_b[0] 44
+
+set_io -nowarn io_p_b[3] 4
+set_io -nowarn io_p_b[2] 3
+set_io -nowarn io_p_b[1] 2
+set_io -nowarn io_p_b[0] 48
+
+# Sense
+set_io -nowarn sense_ctrl 11
+set_io -nowarn sense_hi 12
+set_io -nowarn sense_lo 21
+
+set_io -nowarn sense_ena_n 13
+
+set_io -nowarn -pullup yes sense_mux[3] 18
+set_io -nowarn -pullup yes sense_mux[2] 14
+set_io -nowarn -pullup yes sense_mux[1] 17
+set_io -nowarn -pullup yes sense_mux[0] 15
+
+# Vio
+set_io -nowarn vio_pdm 19
+
+# USB
+set_io -nowarn usb_dp 10
+set_io -nowarn usb_dn 9
+set_io -nowarn usb_pu 6
+
+# UART (used for DFU debug)
+set_io -nowarn -pullup yes uart_rx 45
+set_io -nowarn uart_tx 44
+
+# Clock
+set_io -nowarn clk_in 20
+
+# Button
+set_io -nowarn -pullup yes btn 25
+
+# SPI
+set_io -nowarn -pullup yes spi_mosi 14
+set_io -nowarn -pullup yes spi_miso 17
+set_io -nowarn -pullup yes spi_clk 15
+set_io -nowarn -pullup yes spi_flash_cs_n 16
+
+# Leds
+set_io -nowarn rgb[0] 39
+set_io -nowarn rgb[1] 40
+set_io -nowarn rgb[2] 41

projects/riscv_usb/fw/led.c

@@ -103,14 +103,48 @@ void
 led_color(uint8_t r, uint8_t g, uint8_t b)
 {
 #if defined(BOARD_ICEBREAKER)
+/*	// iCEBreaker v1.0b tnt
 	led_regs->ip.pwrr = r;
 	led_regs->ip.pwrg = b;
 	led_regs->ip.pwrb = g;
-#elif defined(BOARD_BITSY_V0) || defined(BOARD_BITSY_V1)
+*/
+	// iCEBreaker v1.0c+
+	led_regs->ip.pwrr = b;
+	led_regs->ip.pwrg = g;
+	led_regs->ip.pwrb = r;
+#elif defined(BOARD_BITSY_V0)
+	// iCEBreaker bitsy v0 (RGB led 'hacked on')
 	led_regs->ip.pwrr = g;
 	led_regs->ip.pwrg = r;
 	led_regs->ip.pwrb = b;
+#elif defined(BOARD_BITSY_V1)
+	// iCEBreaker bitsy v1 (RGB led 'hacked on')
+	led_regs->ip.pwrr = r;
+	led_regs->ip.pwrg = g;
+	led_regs->ip.pwrb = b;
+#elif defined(BOARD_ICE1USB)
+	// icE1usb
+	led_regs->ip.pwrr = b;
+	led_regs->ip.pwrg = g;
+	led_regs->ip.pwrb = r;
+#elif defined(BOARD_ICEPICK)
+	// iCEpick with UHD-1110 LED
+	led_regs->ip.pwrr = b;
+	led_regs->ip.pwrg = g;
+	led_regs->ip.pwrb = r;
+
+/*	// iCEpick with alternate LED
+	led_regs->ip.pwrr = g;
+	led_regs->ip.pwrg = r;
+	led_regs->ip.pwrb = b;
+*/
+#elif defined(BOARD_E1TRACER)
+	// E1 tracer
+	led_regs->ip.pwrr = b;
+	led_regs->ip.pwrg = g;
+	led_regs->ip.pwrb = r;
 #else
+	// Default / Unknown
 	led_regs->ip.pwrr = r;
 	led_regs->ip.pwrg = g;
 	led_regs->ip.pwrb = b;

projects/riscv_usb/fw/usb_desc_app.c

@@ -163,8 +163,19 @@ static const struct usb_dev_desc _dev_desc = {
 	.bDeviceSubClass	= 0,
 	.bDeviceProtocol	= 0,
 	.bMaxPacketSize0	= 64,
+#if defined(BOARD_ICE1USB)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6145,
+#elif defined(BOARD_ICEPICK)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6149,
+#elif defined(BOARD_E1TRACER)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6151,
+#else
 	.idVendor		= 0x1d50,
 	.idProduct		= 0x6147,
+#endif
 	.bcdDevice		= 0x0001,	/* v0.1 */
 	.iManufacturer		= 2,
 	.iProduct		= 3,

projects/riscv_usb/fw/usb_desc_dfu.c

@@ -97,8 +97,19 @@ static const struct usb_dev_desc _dev_desc = {
 	.bDeviceSubClass	= 0,
 	.bDeviceProtocol	= 0,
 	.bMaxPacketSize0	= 64,
+#if defined(BOARD_ICE1USB)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6144,
+#elif defined(BOARD_ICEPICK)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6148,
+#elif defined(BOARD_E1TRACER)
+	.idVendor		= 0x1d50,
+	.idProduct		= 0x6150,
+#else
 	.idVendor		= 0x1d50,
 	.idProduct		= 0x6146,
+#endif
 	.bcdDevice		= 0x0004,	/* v0.4 */
 	.iManufacturer		= 2,
 	.iProduct		= 3,

projects/riscv_usb/fw/usb_str_app.txt

@@ -1,6 +1,6 @@
 0000000000000000
 osmocom
-iCE40 USB Demo
+!{"bitsy-v0": "iCEBreaker bitsy v0.x", "bitsy-v1": "iCEBreaker bitsy v1.x", "e1tracer": "E1 tracer", "ice1usb": "icE1usb", "icebreaker": "iCEBreaker", "icepick": "iCEpick", "": "iCE40 USB Demo"}
 Main
 Console (control)
 Console (data)

projects/riscv_usb/fw/usb_str_dfu.txt

@@ -1,6 +1,6 @@
 0000000000000000
 osmocom
-!{"bitsy": "iCEBreaker-bitsy (DFU)", "": "iCE40 USB Device (DFU)"}
+!{"bitsy-v0": "iCEBreaker bitsy v0.x (DFU)", "bitsy-v1": "iCEBreaker bitsy v1.x (DFU)", "e1tracer": "E1 tracer (DFU)", "ice1usb": "icE1usb (DFU)", "icebreaker": "iCEBreaker (DFU)", "icepick": "iCEpick (DFU)", "": "iCE40 USB Device (DFU)"}
 DFU
 iCE40 bitstream
 RISC-V firmware

projects/riscv_usb/rtl/boards.vh

@@ -0,0 +1,70 @@
+/*
+ * boards.vh
+ *
+ * vim: ts=4 sw=4 syntax=verilog
+ *
+ * Copyright (C) 2020  Sylvain Munaut <tnt@246tNt.com>
+ * All rights reserved.
+ *
+ * BSD 3-clause, see LICENSE.bsd
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of the <organization> nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+`ifdef BOARD_BITSY_V0
+	// 1bitsquared iCEbreaker bitsy prototypes (v0.x)
+	`define HAS_PSRAM
+`elsif BOARD_BITSY_V1
+	// 1bitsquared iCEbreaker bitsy prod (v1.x)
+	`define HAS_PSRAM
+`elsif BOARD_ICEBREAKER
+	// 1bitsquared iCEbreaker
+	`define HAS_PSRAM
+`elsif BOARD_ICEPICK
+	// iCEpick
+	`define PLL_CORE
+	`define HAS_VIO
+`elsif BOARD_ICE1USB
+	// icE1usb
+		// 30.72M input, 48M output
+	`define PLL_CORE
+	`define PLL_CUSTOM
+	`define PLL_DIVR 4'b0000
+	`define PLL_DIVF 7'b0011000
+	`define PLL_DIVQ 3'b100
+	`define PLL_FILTER_RANGE 3'b011
+`elsif BOARD_E1TRACER
+	// osmocom E1 tracer
+	`define PLL_CORE
+	`define HAS_VIO
+`endif
+
+
+// Defaults
+	// PLL params 12M input, 48M output
+`ifndef PLL_CUSTOM
+	`define PLL_DIVR 4'b0000
+	`define PLL_DIVF 7'b0111111
+	`define PLL_DIVQ 3'b100
+	`define PLL_FILTER_RANGE 3'b001
+`endif

projects/riscv_usb/rtl/sysmgr.v

@@ -32,6 +32,7 @@
  */
 
 `default_nettype none
+`include "boards.vh"
 
 module sysmgr (
 	input  wire clk_in,
@@ -51,11 +52,15 @@ module sysmgr (
 	reg [3:0] rst_cnt;
 
 	// PLL instance
+`ifdef PLL_CORE
+	SB_PLL40_2F_CORE #(
+`else
 	SB_PLL40_2F_PAD #(
-		.DIVR(4'b0000),
-		.DIVF(7'b0111111),
-		.DIVQ(3'b100),
-		.FILTER_RANGE(3'b001),
+`endif
+		.DIVR(`PLL_DIVR),
+		.DIVF(`PLL_DIVF),
+		.DIVQ(`PLL_DIVQ),
+		.FILTER_RANGE(`PLL_FILTER_RANGE),
 		.FEEDBACK_PATH("SIMPLE"),
 		.DELAY_ADJUSTMENT_MODE_FEEDBACK("FIXED"),
 		.FDA_FEEDBACK(4'b0000),
@@ -65,7 +70,11 @@ module sysmgr (
 		.ENABLE_ICEGATE_PORTA(1'b0),
 		.ENABLE_ICEGATE_PORTB(1'b0)
 	) pll_I (
+`ifdef PLL_CORE
+		.REFERENCECLK(clk_in),
+`else
 		.PACKAGEPIN(clk_in),
+`endif
 		.PLLOUTCOREA(),
 		.PLLOUTGLOBALA(clk_48m_i),
 		.PLLOUTCOREB(),

projects/riscv_usb/rtl/top.v

@@ -32,6 +32,7 @@
  */
 
 `default_nettype none
+`include "boards.vh"
 
 module top (
 	// SPI
@@ -39,7 +40,10 @@ module top (
 	inout  wire spi_miso,
 	inout  wire spi_clk,
 	inout  wire spi_flash_cs_n,
+`ifdef HAS_PSRAM
 	inout  wire spi_ram_cs_n,
+`endif
+
 
 	// USB
 	inout  wire usb_dp,
@@ -47,7 +51,9 @@ module top (
 	output wire usb_pu,
 
 	// Debug UART
+`ifndef BOARD_E1TRACER
 	input  wire uart_rx,
+`endif
 	output wire uart_tx,
 
 	// Button
@@ -56,6 +62,11 @@ module top (
 	// LED
 	output wire [2:0] rgb,
 
+`ifdef HAS_VIO
+	// Vio
+	output wire vio_pdm,
+`endif
+
 	// Clock
 	input  wire clk_in
 );
@@ -252,6 +263,10 @@ module top (
 	// UART
 	// ----
 
+`ifdef BOARD_E1TRACER
+	wire uart_rx = 1'b1;
+`endif
+
 	uart_wb #(
 		.DIV_WIDTH(12),
 		.DW(WB_DW)
@@ -352,7 +367,9 @@ module top (
 
 		// Bypass OE for CS_n lines
 	assign spi_flash_cs_n = sio_csn_o[0];
+`ifdef HAS_PSRAM
 	assign spi_ram_cs_n   = sio_csn_o[1];
+`endif
 
 	// Bus interface
 	assign sb_addr = { 4'h0, wb_addr[3:0] };
@@ -518,6 +535,14 @@ module top (
 	);
 
 
+	// Vio
+	// ----
+
+`ifdef HAS_VIO
+	assign vio_pdm = 1'b1;
+`endif
+
+
 	// Clock / Reset
 	// -------------