cores/ice40: Rename 'ice40' to 'no2ice40' to prepare split

This will be split off in its own repo, so rename in preparation
for that.

Directory name is not changed yet as this would break history
when doing the split.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

cores/ice40/no2core.mk

@@ -1,6 +1,6 @@
-CORE := ice40
+CORE := no2ice40
 
-RTL_SRCS_ice40 := $(addprefix rtl/, \
+RTL_SRCS_no2ice40 := $(addprefix rtl/, \
 	ice40_ebr.v \
 	ice40_spram_gen.v \
 	ice40_iserdes.v \
@@ -10,7 +10,7 @@ RTL_SRCS_ice40 := $(addprefix rtl/, \
 	ice40_serdes_sync.v \
 )
 
-TESTBENCHES_ice40 := \
+TESTBENCHES_no2ice40 := \
 	ice40_ebr_tb \
 	$(NULL)
 

cores/mem_cache/no2core.mk

@@ -1,6 +1,6 @@
 CORE := mem_cache
 
-DEPS_mem_cache := no2misc ice40
+DEPS_mem_cache := no2misc no2ice40
 
 RTL_SRCS_mem_cache := $(addprefix rtl/, \
 	mc_bus_wb.v \

cores/qspi_master/no2core.mk

@@ -1,6 +1,6 @@
 CORE := qspi_master
 
-DEPS_qspi_master = no2misc ice40
+DEPS_qspi_master = no2misc no2ice40
 
 RTL_SRCS_qspi_master := $(addprefix rtl/, \
 	qspi_master.v \

projects/memtest/Makefile

@@ -1,7 +1,7 @@
 # Project config
 PROJ = memtest
 
-PROJ_DEPS := no2misc ice40
+PROJ_DEPS := no2misc no2ice40
 PROJ_RTL_SRCS := $(addprefix rtl/, \
 	memtest.v \
 	uart2wb.v \

projects/riscv_usb/Makefile

@@ -1,7 +1,7 @@
 # Project config
 PROJ = riscv_usb
 
-PROJ_DEPS := no2usb no2misc ice40
+PROJ_DEPS := no2usb no2misc no2ice40
 PROJ_RTL_SRCS := $(addprefix rtl/, \
 	bridge.v \
 	dfu_helper.v \