 Sylvain Munaut
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5554f72a7d
cores/hyperram: Initial import of HyperRAM controller
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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356169ba87
cores/qspi_master: Initial import of QSPI master controller
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%!s(int64=4) %!d(string=hai) anos |
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Sylvain Munaut
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890eddb66d
cores/video: Add new HDMI 4x PHY using new ice40 serdes blocks
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%!s(int64=4) %!d(string=hai) anos |
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Sylvain Munaut
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caf64670e2
cores/ice40: Add support for SERDES sync signal local buffer
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%!s(int64=4) %!d(string=hai) anos |
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Sylvain Munaut
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1827bf2ea3
cores/ice40: Add the ice40 4x SERDES cores
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%!s(int64=4) %!d(string=hai) anos |
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Sylvain Munaut
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f8d8427821
cores/ice40: Import architecture specific utility cores
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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60215a80e3
build: Disable some of the iverilog warnings
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%!s(int64=4) %!d(string=hai) anos |
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Sylvain Munaut
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5699d72cdc
misc: Fix vim modeline in header to be at the top
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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f9707a2ae5
cores/usb: Minor documentation syntax fixes in markdown
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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c9a5068c7d
projects/riscv_usb: Cleanup some unused wires
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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f560755b26
projects/riscv_usb: Add support for the user button
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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779f6ae324
projects/riscv_usb: Minor syntax fixes for iverilog
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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ab62a9762e
projects/boot_stub: Add a re-arm delay between selection button presses
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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e1790c8ed2
projects/boot_stub: Import a multi-boot stub bitstream
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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3666c9f720
cores/usb: Add value init to decoded symbol in RX path (for sim only)
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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fc989e8582
cores/usb: Capture CEL state at transaction start
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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6e61f6f19c
cores/usb: Improve CRC implementation/synthesis
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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14dfdcad90
projects/hdmi_test: Update the PCFs with other options
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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0eee3517ac
cores/misc/uart_wb: Add support for overflow and improve read path
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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1f58e62045
cores/misc: Comment cleanup in uart_rx
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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7b3851315a
project/rgb_panel: Add support for two single-led PMODs on 1A & 1B
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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4a8d75283b
cores/hub75: Allow to use several PHY in parallel (multiple control signal)
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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87a8bd5b4d
project/rgb_panel: Fixup the testbench
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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96cf20200d
project/rgb_panel: Send the FM6126 sequence by default
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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b94f88978d
cores/hub75: Add support for the FM6126 init sequence
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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f649acd303
projects/rgb_panel: Add support for the single-PMOD option
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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f33e481214
build: When creating verilog define for board name, replace - with _
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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68d6faf21d
cores/hub75: Add support for DDR PHY
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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9e04d2b6df
cores/hub75: Use a 'SDW' localparam shortcut for the # of parallel data
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%!s(int64=5) %!d(string=hai) anos |
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Sylvain Munaut
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06eba0d981
cores/hub75: Add support for Inc/Rst style address lines
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%!s(int64=5) %!d(string=hai) anos |
