Historique des commits

Auteur SHA1 Message Date
  Sylvain Munaut 452cddf2a2 projects/riscv_doom: Initial project import il y a 4 ans
  Sylvain Munaut 574e9bc2c9 cores/mem_cache: Import a prototype of a bus interface for the Vex il y a 4 ans
  Sylvain Munaut ad398c9bfb cores/mem_cache: Rename wmask to wmsk il y a 4 ans
  Sylvain Munaut 71cf37bb2f cores/qspi_master: IOBs instances cleanup in PHYs il y a 4 ans
  Sylvain Munaut 3f54287f4f cores/qspi_master: Rework the CS_n driving path in PHYs il y a 4 ans
  Sylvain Munaut cccef0e9b9 cores/video: Import 1x simple HDMI PHY module il y a 4 ans
  Sylvain Munaut b2c5aff5e6 cores/video: Fixup IOBs in HDMI PHYs il y a 4 ans
  Sylvain Munaut 1512628a34 cores/video: Don't force reg in simulation il y a 4 ans
  Sylvain Munaut 4eb4d80b88 projects/rgb_panel: Fix video play direction in 'vgen' module il y a 4 ans
  Sylvain Munaut 14c14af0a5 projects/usb_audio: Initial import il y a 4 ans
  Sylvain Munaut 88d89d1288 cores: Update no2usb submodule il y a 4 ans
  Sylvain Munaut ed38d06cbd projects/riscv_usb/fw: Update LED driver to latest code il y a 4 ans
  Sylvain Munaut 01b4fc0568 projects/riscv_usb/fw: Minor warning fixes il y a 4 ans
  Sylvain Munaut 903ae87b18 projects/riscv_usb: Set clock to their real frequency il y a 4 ans
  Sylvain Munaut fc12f0de48 projects/riscv_usb: Move the USB stuff to a separate module il y a 4 ans
  Sylvain Munaut 2364fe15f4 projects/riscv_usb: Make use of ice40_spi_wb and ice40_rgb_wb il y a 4 ans
  Sylvain Munaut 3c3ec85df7 projects/riscv_usb: Reformat UART peripheral instance il y a 4 ans
  Sylvain Munaut 15e1fb5516 projects/riscv_usb: Isolate CPU / Bridge / Memory into sub module il y a 4 ans
  Sylvain Munaut 14597759d5 projects/riscv_usb: Whitespace fixes for soc_{bram,spram} il y a 4 ans
  Sylvain Munaut 6480c5c26b projects/riscv_usb: Rename bridge to soc_picorv32_bridge + WS fixes il y a 4 ans
  Sylvain Munaut b5c7b7ef93 projects/riscv_usb: Update to latest dfu_helper il y a 4 ans
  Sylvain Munaut 345435957f projects/riscv_usb: Add iCE40 specific implementation of register file il y a 4 ans
  Sylvain Munaut 67143eeaae projects/riscv_usb: Relicense RTL under CERN-OHL-P-2.0 il y a 4 ans
  Sylvain Munaut 04e7d9bc1b doc: Update license text / notes il y a 4 ans
  Sylvain Munaut 4f3b887149 Update all no2xxx submodules and adapt as needed to new APIs il y a 4 ans
  Sylvain Munaut 64cb6025b0 projects/riscv_usb: Update no2usb core and adapt to new API il y a 4 ans
  Sylvain Munaut 81b86f09d1 projects/riscv_usb: Allow dfuprog without DFU_SERIAL set il y a 4 ans
  Sylvain Munaut 3038fcadf6 projects/riscv_usb: Remove some board support il y a 4 ans
  Sylvain Munaut 1a0f4858e8 projects/riscv_usb: Remove all DFU bootloader code il y a 4 ans
  Sylvain Munaut fee323bb3b projects: Remove boot_stub. Superseded by no2bootloader repo il y a 4 ans