Commit History

Author SHA1 Message Date
  Krzysztof Skrzynecki a310b26df0 add initial version of button logic + dummy usage 5 days ago
  Jakub Duchniewicz 98f63f9b8c Cleanup WB addressing. 1 week ago
  Jakub Duchniewicz 816e22617b Adapt SW to RTL changes. 1 week ago
  Jakub Duchniewicz 254d9836e4 Fix mailbox by introducing intermediate buffer for storing and saving. 1 week ago
  Krzysztof Skrzynecki 773483ddac faster clocks for synthesis (not changing actual freq) 1 week ago
  Krzysztof Skrzynecki dc69ed9423 replace 3 signal with temporary and incomplete (but fast) version 1 week ago
  Krzysztof Skrzynecki a1e67cfd04 remove USB from deps 2 weeks ago
  Jakub Duchniewicz 6fdb3ab5aa Fix erroneous word addressing and bring back byte addressing of mailbox. Registers now work. 2 weeks ago
  Jakub Duchniewicz b7d87eaa5a Fix bridging logic. Hangups are gone. Wrong offset in register map still persits. 2 weeks ago
  Jakub Duchniewicz 03fbd5a395 Approach fixing the overlapped mailbox registers with code and bootloader. 2 weeks ago
  Jakub Duchniewicz 561a0dfbd0 Add ability to flash LEDs over Wishbone on RTL side. 3 weeks ago
  Jakub Duchniewicz 20b5151657 Increase the internal registers to 32 bits for WB compatibility. 3 weeks ago
  Jakub Duchniewicz 2c6636d5b7 Reduce WB_N to 7 as for 8 it stopped instantiating CPU. 3 weeks ago
  Jakub Duchniewicz ea6ad5f013 Flatten the mailbox registers. 3 weeks ago
  Jakub Duchniewicz c44a5464d7 Add mailbox for RTL/SW communication. 3 weeks ago
  Jakub Duchniewicz bab520e2fd Add patches to submodules. 3 weeks ago
  Jakub Duchniewicz bc60e00b90 Port 3signal code and integrate to the top module. 3 weeks ago
  Jakub Duchniewicz 888981826f Transition to riscv_usb as base for out project. 3 weeks ago
  Jakub Duchniewicz c86d575958 Add hardcoded LEDs and buttons. 3 weeks ago
  Krzysztof Skrzynecki f780f6be9f add led example 1 month ago
  Jakub Duchniewicz 043437ff45 Add binaries for KS. 1 month ago
  Jakub Duchniewicz 9d5c85cf64 My changes for debug UART and removing specs=nano. 1 month ago
  Sylvain Munaut d2fa005012 projects/usb_amr/sw: Import a small python3 test class for DLM interface 1 year ago
  Sylvain Munaut a61abc34fe projects/usb_amr/fw: Init MC97 from the start 1 year ago
  Sylvain Munaut fccbc539d7 projects/usb_amr/fw: Add an option to manually generate test ring 1 year ago
  Sylvain Munaut dfdd15fa98 projects/usb_amr/fw: Implement ring detect and notification 1 year ago
  Sylvain Munaut e730ddc644 projects/usb_amr/fw: Add support for {SET,GET,CLEAR}_COMM_FEATURE 1 year ago
  Sylvain Munaut 0b30006012 projects/usb_amr/fw: Switch to using wRequestAndtype 1 year ago
  Sylvain Munaut 94ff9d4c5d projects/usb_amr: Add the RFI module and wire it up 1 year ago
  Sylvain Munaut 637d035474 projects: Add no_rw_checks on the soc_bram instances 1 year ago