 Sylvain Munaut
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60215a80e3
build: Disable some of the iverilog warnings
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4 anni fa |
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Sylvain Munaut
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5699d72cdc
misc: Fix vim modeline in header to be at the top
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4 anni fa |
|
Sylvain Munaut
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f9707a2ae5
cores/usb: Minor documentation syntax fixes in markdown
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4 anni fa |
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Sylvain Munaut
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c9a5068c7d
projects/riscv_usb: Cleanup some unused wires
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5 anni fa |
|
Sylvain Munaut
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f560755b26
projects/riscv_usb: Add support for the user button
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5 anni fa |
|
Sylvain Munaut
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779f6ae324
projects/riscv_usb: Minor syntax fixes for iverilog
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5 anni fa |
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Sylvain Munaut
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ab62a9762e
projects/boot_stub: Add a re-arm delay between selection button presses
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5 anni fa |
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Sylvain Munaut
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e1790c8ed2
projects/boot_stub: Import a multi-boot stub bitstream
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5 anni fa |
|
Sylvain Munaut
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3666c9f720
cores/usb: Add value init to decoded symbol in RX path (for sim only)
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4 anni fa |
|
Sylvain Munaut
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fc989e8582
cores/usb: Capture CEL state at transaction start
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5 anni fa |
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Sylvain Munaut
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6e61f6f19c
cores/usb: Improve CRC implementation/synthesis
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5 anni fa |
|
Sylvain Munaut
|
14dfdcad90
projects/hdmi_test: Update the PCFs with other options
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4 anni fa |
|
Sylvain Munaut
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0eee3517ac
cores/misc/uart_wb: Add support for overflow and improve read path
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5 anni fa |
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Sylvain Munaut
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1f58e62045
cores/misc: Comment cleanup in uart_rx
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5 anni fa |
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Sylvain Munaut
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7b3851315a
project/rgb_panel: Add support for two single-led PMODs on 1A & 1B
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5 anni fa |
|
Sylvain Munaut
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4a8d75283b
cores/hub75: Allow to use several PHY in parallel (multiple control signal)
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5 anni fa |
|
Sylvain Munaut
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87a8bd5b4d
project/rgb_panel: Fixup the testbench
|
5 anni fa |
|
Sylvain Munaut
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96cf20200d
project/rgb_panel: Send the FM6126 sequence by default
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5 anni fa |
|
Sylvain Munaut
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b94f88978d
cores/hub75: Add support for the FM6126 init sequence
|
5 anni fa |
|
Sylvain Munaut
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f649acd303
projects/rgb_panel: Add support for the single-PMOD option
|
5 anni fa |
|
Sylvain Munaut
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f33e481214
build: When creating verilog define for board name, replace - with _
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5 anni fa |
|
Sylvain Munaut
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68d6faf21d
cores/hub75: Add support for DDR PHY
|
5 anni fa |
|
Sylvain Munaut
|
9e04d2b6df
cores/hub75: Use a 'SDW' localparam shortcut for the # of parallel data
|
5 anni fa |
|
Sylvain Munaut
|
06eba0d981
cores/hub75: Add support for Inc/Rst style address lines
|
5 anni fa |
 Tobias Müller
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ab0c2b9772
build: Use IVERILOG variable when building simulation
|
5 anni fa |
|
Sylvain Munaut
|
226cf1edb4
projects/rgb_panel: Fix error in fbw_data declaration
|
5 anni fa |
|
Sylvain Munaut
|
760f261f50
projects/rgb_panel: Add build option to run panels at 24 MHz
|
5 anni fa |
|
Sylvain Munaut
|
1f3b5ea6e1
projects/rgb_panel: Only start scanning after the first frame is written
|
5 anni fa |
|
Sylvain Munaut
|
ecab65eb7b
cores/hub75: Add control signal to start/stop the panel refreshes
|
5 anni fa |
|
Sylvain Munaut
|
48a784e6e2
cores/hub75: Introduce zig-zag scanning mode to minimize painting artefacts
|
5 anni fa |
