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doom_riscv
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Commit History

Author SHA1 Message Date
  Sylvain Munaut 0eee3517ac cores/misc/uart_wb: Add support for overflow and improve read path 5 years ago
  Sylvain Munaut 5e7d05e3e7 cores/misc: Fix uart_wb handling of full fifo 5 years ago
  Sylvain Munaut 22c3e9a4ee cores/misc: Add UART with wishbone & FIFO 6 years ago