Commit History

Author SHA1 Message Date
  Sylvain Munaut aa7e48dd21 cores: Replace local 'mem_cache' with 'no2memcache' submodule 3 years ago
  Sylvain Munaut 1f6961cb0a cores: Replace local 'qspi_master' with 'no2qpimem' submodule 3 years ago
  Sylvain Munaut e8445659ce cores: Replace local 'hyperram' with 'no2hyperbus' submodule 3 years ago
  Sylvain Munaut 3849fa2672 projects/rgb_panel: Fix glitch_filter usage to new 'API' 3 years ago
  Sylvain Munaut d450726794 projects/riscv_doom: Import .gitignore for boot fw 4 years ago
  Sylvain Munaut a28971d2e5 projects/riscv_doom: Don't fail on timing by default 4 years ago
  Sylvain Munaut 0351704a05 projects/riscv_doom: Allow to override nextpnr seed from environment 4 years ago
  Sylvain Munaut 8b81883f0f projects/riscv_doom: Add dithering mode for video out 4 years ago
  Sylvain Munaut 452cddf2a2 projects/riscv_doom: Initial project import 4 years ago
  Sylvain Munaut 574e9bc2c9 cores/mem_cache: Import a prototype of a bus interface for the Vex 4 years ago
  Sylvain Munaut ad398c9bfb cores/mem_cache: Rename wmask to wmsk 4 years ago
  Sylvain Munaut 71cf37bb2f cores/qspi_master: IOBs instances cleanup in PHYs 4 years ago
  Sylvain Munaut 3f54287f4f cores/qspi_master: Rework the CS_n driving path in PHYs 4 years ago
  Sylvain Munaut cccef0e9b9 cores/video: Import 1x simple HDMI PHY module 4 years ago
  Sylvain Munaut b2c5aff5e6 cores/video: Fixup IOBs in HDMI PHYs 4 years ago
  Sylvain Munaut 1512628a34 cores/video: Don't force reg in simulation 4 years ago
  Sylvain Munaut 4eb4d80b88 projects/rgb_panel: Fix video play direction in 'vgen' module 4 years ago
  Sylvain Munaut 14c14af0a5 projects/usb_audio: Initial import 4 years ago
  Sylvain Munaut 88d89d1288 cores: Update no2usb submodule 4 years ago
  Sylvain Munaut ed38d06cbd projects/riscv_usb/fw: Update LED driver to latest code 4 years ago
  Sylvain Munaut 01b4fc0568 projects/riscv_usb/fw: Minor warning fixes 4 years ago
  Sylvain Munaut 903ae87b18 projects/riscv_usb: Set clock to their real frequency 4 years ago
  Sylvain Munaut fc12f0de48 projects/riscv_usb: Move the USB stuff to a separate module 4 years ago
  Sylvain Munaut 2364fe15f4 projects/riscv_usb: Make use of ice40_spi_wb and ice40_rgb_wb 4 years ago
  Sylvain Munaut 3c3ec85df7 projects/riscv_usb: Reformat UART peripheral instance 4 years ago
  Sylvain Munaut 15e1fb5516 projects/riscv_usb: Isolate CPU / Bridge / Memory into sub module 4 years ago
  Sylvain Munaut 14597759d5 projects/riscv_usb: Whitespace fixes for soc_{bram,spram} 4 years ago
  Sylvain Munaut 6480c5c26b projects/riscv_usb: Rename bridge to soc_picorv32_bridge + WS fixes 4 years ago
  Sylvain Munaut b5c7b7ef93 projects/riscv_usb: Update to latest dfu_helper 4 years ago
  Sylvain Munaut 345435957f projects/riscv_usb: Add iCE40 specific implementation of register file 4 years ago