/* * boards.vh * * vim: ts=4 sw=4 syntax=verilog * * Copyright (C) 2020 Sylvain Munaut * All rights reserved. * * BSD 3-clause, see LICENSE.bsd * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ `ifdef BOARD_BITSY_V0 // 1bitsquared iCEbreaker bitsy prototypes (v0.x) `define HAS_PSRAM `elsif BOARD_BITSY_V1 // 1bitsquared iCEbreaker bitsy prod (v1.x) `define HAS_PSRAM `elsif BOARD_ICEBREAKER // 1bitsquared iCEbreaker `define HAS_PSRAM `elsif BOARD_ICEPICK // iCEpick `define PLL_CORE `define HAS_VIO `elsif BOARD_ICE1USB // icE1usb // 30.72M input, 48M output `define PLL_CORE `define PLL_CUSTOM `define PLL_DIVR 4'b0000 `define PLL_DIVF 7'b0011000 `define PLL_DIVQ 3'b100 `define PLL_FILTER_RANGE 3'b011 `elsif BOARD_E1TRACER // osmocom E1 tracer `define PLL_CORE `define HAS_VIO `endif // Defaults // PLL params 12M input, 48M output `ifndef PLL_CUSTOM `define PLL_DIVR 4'b0000 `define PLL_DIVF 7'b0111111 `define PLL_DIVQ 3'b100 `define PLL_FILTER_RANGE 3'b001 `endif