暫無描述

Sylvain Munaut 1f58e62045 cores/misc: Comment cleanup in uart_rx		5 年之前
build	f33e481214 build: When creating verilog define for board name, replace - with _	5 年之前
cores	1f58e62045 cores/misc: Comment cleanup in uart_rx	5 年之前
projects	7b3851315a project/rgb_panel: Add support for two single-led PMODs on 1A & 1B	5 年之前
.gitignore	6f6e75a6e8 Import gitignore	6 年之前
LICENSE	e2c6a58101 Initial import of the structure and build system	6 年之前
LICENSE.bsd	e2c6a58101 Initial import of the structure and build system	6 年之前
LICENSE.lgpl3	e2c6a58101 Initial import of the structure and build system	6 年之前
README.md	5bec2396e5 Fix README formatting	6 年之前

iCE40 Playground

Collection of ip cores / modules and example projects for the Lattice iCE40 FPGA family.

Examples are often targeted for the ICEBreaker FPGA board ( https://github.com/icebreaker-fpga/icebreaker ) but some might have other / multiple targets, check their respective README / build files

Applicable license is individual to each IP core / project and is mentionnned in the IP core / example directory itself and in each file.

README.md

iCE40 Playground