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jduchniewicz
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doom_riscv
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doom_signal_changes
doom_riscv
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riscv_usb
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Krzysztof Skrzynecki
773483ddac
faster clocks for synthesis (not changing actual freq)
1 week ago
..
clocks.py
773483ddac
faster clocks for synthesis (not changing actual freq)
1 week ago
top-bitsy-v0.pcf
7c7e120a84
projects: Update constraints for bitsy v0 and v1
4 years ago
top-bitsy-v1.pcf
7c7e120a84
projects: Update constraints for bitsy v0 and v1
4 years ago
top-icebreaker.pcf
bc60e00b90
Port 3signal code and integrate to the top module.
3 weeks ago