Jakub Duchniewicz 2c6636d5b7 Reduce WB_N to 7 as for 8 it stopped instantiating CPU.		пре 3 недеља
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data	bc60e00b90 Port 3signal code and integrate to the top module.	пре 3 недеља
fw	888981826f Transition to riscv_usb as base for out project.	пре 3 недеља
rtl	2c6636d5b7 Reduce WB_N to 7 as for 8 it stopped instantiating CPU.	пре 3 недеља
sim	f560755b26 projects/riscv_usb: Add support for the user button	пре 4 година
Makefile	c44a5464d7 Add mailbox for RTL/SW communication.	пре 3 недеља
README.md	fd6a09e0c2 projects/riscv_usb: Fixup the README	пре 1 година

RISC-V + USB core demo

For the icebreaker, the hardware connections are :

To run :

Build and flash the bitstream
- This will build fw/boot.hex and include it as the BRAM initial data
Flash the main application code in SPI at offset 1M
- make -C fw prog
Connect to the iCEBreaker uart console (ttyUSB1) with a 1M baudrate
- and then at the Command> prompt, press c for 'connect'. This will start the USB detection and device should enumerate