Home Explore Help
Register Sign In
jduchniewicz
/
doom_riscv
Watch 1
Star 0
Fork 0
Files Issues 0 Pull Requests 0 Wiki

No Description

Tree: 4812ab7b22
Branches Tags
doom_riscv
ZIP TAR.GZ
Sylvain Munaut 4812ab7b22 build: Add explicit include directory for the rtl/ & sim/ dir of each core 6 years ago
build 4812ab7b22 build: Add explicit include directory for the rtl/ & sim/ dir of each core 6 years ago
cores 4ff7a37b90 cores/hub75: Added a PHY module to contain all the IOB instances 6 years ago
projects bce8d5bb4c projects/hdmi_text: Adjust build options to never promote globals 6 years ago
.gitignore 6f6e75a6e8 Import gitignore 6 years ago
LICENSE e2c6a58101 Initial import of the structure and build system 6 years ago
LICENSE.bsd e2c6a58101 Initial import of the structure and build system 6 years ago
LICENSE.lgpl3 e2c6a58101 Initial import of the structure and build system 6 years ago
README.md 5bec2396e5 Fix README formatting 6 years ago

README.md

iCE40 Playground

Collection of ip cores / modules and example projects for the Lattice iCE40 FPGA family.

Examples are often targeted for the ICEBreaker FPGA board ( https://github.com/icebreaker-fpga/icebreaker ) but some might have other / multiple targets, check their respective README / build files

Applicable license is individual to each IP core / project and is mentionnned in the IP core / example directory itself and in each file.