top.v 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589
  1. /*
  2. * top.v
  3. *
  4. * vim: ts=4 sw=4
  5. *
  6. * Copyright (C) 2019-2020 Sylvain Munaut <tnt@246tNt.com>
  7. * SPDX-License-Identifier: CERN-OHL-P-2.0
  8. */
  9. `default_nettype none
  10. `include "boards.vh"
  11. module top (
  12. // SPI
  13. inout wire spi_mosi,
  14. inout wire spi_miso,
  15. inout wire spi_clk,
  16. output wire spi_flash_cs_n,
  17. `ifdef HAS_PSRAM
  18. output wire spi_ram_cs_n,
  19. `endif
  20. // Debug UART
  21. input wire uart_rx,
  22. output wire uart_tx,
  23. // Buttons (2 for now to test up and down)
  24. input wire btn_n,
  25. input wire btn_1, // AKA write_flash
  26. input wire btn_2,
  27. // PMOD connected buttons
  28. input wire [15:0] pmod_btns,
  29. // LEDs to blink to show that a value change has been registered?
  30. output wire[4:0] led,
  31. // GPIOs for out signal
  32. //output wire out1, TODO: uncomment when we know the proper GPIO for that
  33. //output wire out2,
  34. //output wire out3,
  35. // LED TODO: remove later
  36. output wire [2:0] rgb,
  37. // Clock
  38. input wire clk_in
  39. );
  40. localparam integer SPRAM_AW = 14; /* 14 => 64k, 15 => 128k */
  41. localparam integer WB_N = 7;
  42. localparam integer WB_DW = 32;
  43. localparam integer WB_AW = 16;
  44. localparam integer WB_RW = WB_DW * WB_N;
  45. localparam integer WB_MW = WB_DW / 8;
  46. localparam integer FAST_PWM_WIDTH = 8;
  47. localparam integer PULSE_COUNTER_WIDTH = 8;
  48. localparam integer SLOW_PWM_WIDTH = 14;
  49. localparam integer BUTTON_COUNTER_WIDTH = 8; //TODO - zmienić na 8
  50. genvar i;
  51. // Signals
  52. // -------
  53. // Wishbone
  54. wire [WB_AW-1:0] wb_addr;
  55. wire [WB_DW-1:0] wb_rdata [0:WB_N-1];
  56. wire [WB_RW-1:0] wb_rdata_flat;
  57. wire [WB_DW-1:0] wb_wdata;
  58. wire [WB_MW-1:0] wb_wmsk;
  59. wire [WB_N -1:0] wb_cyc;
  60. wire wb_we;
  61. wire [WB_N -1:0] wb_ack;
  62. // WarmBoot
  63. reg boot_now;
  64. reg [1:0] boot_sel;
  65. // Clock / Reset logic
  66. wire clk_24_75m;
  67. wire clk_99m;
  68. wire rst;
  69. // 3 signal
  70. wire [SLOW_PWM_WIDTH-1:0] period1;
  71. wire [SLOW_PWM_WIDTH-1:0] delay1;
  72. wire [SLOW_PWM_WIDTH-1:0] period2;
  73. wire [SLOW_PWM_WIDTH-1:0] delay2;
  74. wire [FAST_PWM_WIDTH-1:0] period3;
  75. wire [FAST_PWM_WIDTH-1:0] duty3;
  76. wire [SLOW_PWM_WIDTH-1:0] delay3;
  77. wire [PULSE_COUNTER_WIDTH-1:0] npuls3;
  78. wire [1:0] odd_train_flag;
  79. wire ena_odd_out3;
  80. assign ena_odd_out3=1; //TODO
  81. // Buttons
  82. reg [BUTTON_COUNTER_WIDTH-1:0] inc_f1;
  83. reg [BUTTON_COUNTER_WIDTH-1:0] dec_f1;
  84. reg [BUTTON_COUNTER_WIDTH-1:0] inc_d1;
  85. reg [BUTTON_COUNTER_WIDTH-1:0] dec_d1;
  86. reg [BUTTON_COUNTER_WIDTH-1:0] inc_d2;
  87. reg [BUTTON_COUNTER_WIDTH-1:0] dec_d2;
  88. reg [BUTTON_COUNTER_WIDTH-1:0] inc_ph2;
  89. reg [BUTTON_COUNTER_WIDTH-1:0] dec_ph2;
  90. reg [BUTTON_COUNTER_WIDTH-1:0] inc_f3;
  91. reg [BUTTON_COUNTER_WIDTH-1:0] dec_f3;
  92. reg [BUTTON_COUNTER_WIDTH-1:0] inc_d3;
  93. reg [BUTTON_COUNTER_WIDTH-1:0] dec_d3;
  94. reg [BUTTON_COUNTER_WIDTH-1:0] inc_ph3;
  95. reg [BUTTON_COUNTER_WIDTH-1:0] dec_ph3;
  96. reg [BUTTON_COUNTER_WIDTH-1:0] inc_n3;
  97. reg [BUTTON_COUNTER_WIDTH-1:0] dec_n3;
  98. // Mailbox signal wires
  99. wire [16*16-1:0] mailbox_regs_flat; // Flattened register array (16 registers of 16 bits each)
  100. wire [BUTTON_COUNTER_WIDTH*16-1:0] mailbox_btns_flat;
  101. // SoC
  102. // ---
  103. soc_picorv32_base #(
  104. .WB_N (WB_N),
  105. .WB_DW (WB_DW),
  106. .WB_AW (WB_AW),
  107. .SPRAM_AW(SPRAM_AW)
  108. ) base_I (
  109. .wb_addr (wb_addr),
  110. .wb_rdata(wb_rdata_flat),
  111. .wb_wdata(wb_wdata),
  112. .wb_wmsk (wb_wmsk),
  113. .wb_we (wb_we),
  114. .wb_cyc (wb_cyc),
  115. .wb_ack (wb_ack),
  116. .clk (clk_24_75m),
  117. .rst (rst)
  118. );
  119. for (i=0; i<WB_N; i=i+1)
  120. assign wb_rdata_flat[i*WB_DW+:WB_DW] = wb_rdata[i];
  121. // UART [1]
  122. // ----
  123. uart_wb #(
  124. .DIV_WIDTH(12),
  125. .DW(WB_DW)
  126. ) uart_I (
  127. .uart_tx (uart_tx),
  128. .uart_rx (uart_rx),
  129. .wb_addr (wb_addr[1:0]),
  130. .wb_rdata (wb_rdata[1]),
  131. .wb_we (wb_we),
  132. .wb_wdata (wb_wdata),
  133. .wb_cyc (wb_cyc[1]),
  134. .wb_ack (wb_ack[1]),
  135. .clk (clk_24_75m),
  136. .rst (rst)
  137. );
  138. // SPI [2]
  139. // ---
  140. ice40_spi_wb #(
  141. `ifdef HAS_PSRAM
  142. .N_CS(2),
  143. `else
  144. .N_CS(1),
  145. `endif
  146. .WITH_IOB(1),
  147. .UNIT(0)
  148. ) spi_I (
  149. .pad_mosi (spi_mosi),
  150. .pad_miso (spi_miso),
  151. .pad_clk (spi_clk),
  152. `ifdef HAS_PSRAM
  153. .pad_csn ({spi_ram_cs_n, spi_flash_cs_n}),
  154. `else
  155. .pad_csn (spi_flash_cs_n),
  156. `endif
  157. .wb_addr (wb_addr[3:0]),
  158. .wb_rdata (wb_rdata[2]),
  159. .wb_wdata (wb_wdata),
  160. .wb_we (wb_we),
  161. .wb_cyc (wb_cyc[2]),
  162. .wb_ack (wb_ack[2]),
  163. .clk (clk_24_75m),
  164. .rst (rst)
  165. );
  166. // RGB LEDs [3]
  167. // --------
  168. assign wb_ack[3]=wb_cyc[3];
  169. //ice40_rgb_wb #(
  170. // .CURRENT_MODE("0b1"),
  171. // .RGB0_CURRENT("0b000001"),
  172. // .RGB1_CURRENT("0b000001"),
  173. // .RGB2_CURRENT("0b000001")
  174. //) rgb_I (
  175. // .pad_rgb (rgb),
  176. // .wb_addr (wb_addr[4:0]),
  177. // .wb_rdata (wb_rdata[3]),
  178. // .wb_wdata (wb_wdata),
  179. // .wb_we (wb_we),
  180. // .wb_cyc (wb_cyc[3]),
  181. // .wb_ack (wb_ack[3]),
  182. // .clk (clk_24_75m),
  183. // .rst (rst)
  184. //);
  185. // WB Register Mailbox [4]
  186. // ----------
  187. mailbox_wb_sw2rtl #(
  188. .AW(4),
  189. .DW(WB_DW)
  190. ) mailbox_regs_I (
  191. .clk(clk_24_75m),
  192. .rst(rst),
  193. .wb_addr(wb_addr[3:0]),
  194. .wb_wdata(wb_wdata),
  195. .wb_rdata(wb_rdata[4]),
  196. .wb_we(wb_we),
  197. .wb_cyc(wb_cyc[4]),
  198. .wb_ack(wb_ack[4]),
  199. .write_flash(btn_1),
  200. .registers_flat(mailbox_regs_flat)
  201. );
  202. // 3 Signal
  203. // --------
  204. assign period1 = mailbox_regs_flat[15:0]; // First 16 bits for period1
  205. assign delay1 = mailbox_regs_flat[31:16]; // Next 16 bits for delay1
  206. assign period2 = mailbox_regs_flat[47:32]; // Next 16 bits for period2
  207. assign delay2 = mailbox_regs_flat[63:48]; // Next 16 bits for delay2
  208. assign period3 = mailbox_regs_flat[79:64]; // Next 16 bits for period3
  209. assign duty3 = mailbox_regs_flat[95:80]; // Next 16 bits for duty3
  210. assign delay3 = mailbox_regs_flat[111:96]; // Next 16 bits for delay3
  211. assign npuls3 = mailbox_regs_flat[127:112]; // Next 16 bits for npuls3
  212. assign odd_train_flag = mailbox_regs_flat[143:128]; // Next 16 bits for odd_train_flag
  213. three_signal #(
  214. .FAST_PWM_WIDTH(FAST_PWM_WIDTH),
  215. .PULSE_COUNTER_WIDTH(PULSE_COUNTER_WIDTH),
  216. .SLOW_PWM_WIDTH(SLOW_PWM_WIDTH)
  217. ) three_signal_I(
  218. .nrst(~rst),
  219. .clk(clk_99m), // TODO: fix later we have CDC problem here
  220. .period1(period1),
  221. .delay1(delay1),
  222. .period2(period2),
  223. .delay2(delay2),
  224. .period3(period3),
  225. .duty3(duty3),
  226. .delay3(delay3),
  227. .npuls3(npuls3),
  228. .odd_train_flag(odd_train_flag),
  229. .ena_odd_out3(ena_odd_out3),
  230. .Out1(led[1]), //led[1] - P2_1
  231. .Out2(led[2]), //led[2] - P2_2
  232. .Out3(led[4]) //led[4] - P2_3
  233. );
  234. // WB Button Mailbox [5]
  235. // ----------
  236. mailbox_wb_rtl2sw #(
  237. .AW(4),
  238. .DW(WB_DW)
  239. ) mailbox_btns_I (
  240. .clk(clk_24_75m),
  241. .rst(rst),
  242. .wb_addr(wb_addr[3:0]),
  243. .wb_rdata(wb_rdata[5]),
  244. .wb_cyc(wb_cyc[5]),
  245. .wb_ack(wb_ack[5]),
  246. .registers_flat_in(mailbox_btns_flat)
  247. );
  248. // WB Simple timer [6]
  249. timer_wb #(
  250. .DW(WB_DW)
  251. ) timer_I (
  252. .clk(clk_24_75m),
  253. .rst(rst),
  254. .wb_rdata(wb_rdata[6]),
  255. .wb_cyc(wb_cyc[6]),
  256. .wb_ack(wb_ack[6])
  257. );
  258. // Buttons
  259. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(0 + 1) - 1:BUTTON_COUNTER_WIDTH*0 ] = inc_f1;
  260. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(1 + 1) - 1:BUTTON_COUNTER_WIDTH*1 ] = dec_f1;
  261. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(2 + 1) - 1:BUTTON_COUNTER_WIDTH*2 ] = inc_d1;
  262. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(3 + 1) - 1:BUTTON_COUNTER_WIDTH*3 ] = dec_d1;
  263. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(4 + 1) - 1:BUTTON_COUNTER_WIDTH*4 ] = inc_d2;
  264. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(5 + 1) - 1:BUTTON_COUNTER_WIDTH*5 ] = dec_d2;
  265. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(6 + 1) - 1:BUTTON_COUNTER_WIDTH*6 ] = inc_ph2;
  266. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(7 + 1) - 1:BUTTON_COUNTER_WIDTH*7 ] = dec_ph2;
  267. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(8 + 1) - 1:BUTTON_COUNTER_WIDTH*8 ] = inc_f3;
  268. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(9 + 1) - 1:BUTTON_COUNTER_WIDTH*9 ] = dec_f3;
  269. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(10 + 1) - 1:BUTTON_COUNTER_WIDTH*10] = inc_d3;
  270. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(11 + 1) - 1:BUTTON_COUNTER_WIDTH*11] = dec_d3;
  271. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(12 + 1) - 1:BUTTON_COUNTER_WIDTH*12] = inc_ph3;
  272. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(13 + 1) - 1:BUTTON_COUNTER_WIDTH*13] = dec_ph3;
  273. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(14 + 1) - 1:BUTTON_COUNTER_WIDTH*14] = inc_n3;
  274. assign mailbox_btns_flat[BUTTON_COUNTER_WIDTH*(15 + 1) - 1:BUTTON_COUNTER_WIDTH*15] = dec_n3;
  275. /*assign mailbox_btns_flat[15:0] = 16'd666;
  276. assign mailbox_btns_flat[31:16] = 16'd1000+rst;
  277. assign mailbox_btns_flat[47:32] = pmod_btns[2];
  278. assign mailbox_btns_flat[63:48] = pmod_btns[3];
  279. assign mailbox_btns_flat[79:64] = pmod_btns[4];
  280. assign mailbox_btns_flat[95:80] = pmod_btns[5];
  281. assign mailbox_btns_flat[111:96] = pmod_btns[6];
  282. assign mailbox_btns_flat[127:112] = pmod_btns[7];
  283. assign mailbox_btns_flat[143:128] = pmod_btns[8];
  284. assign mailbox_btns_flat[159:144] = pmod_btns[9];
  285. assign mailbox_btns_flat[175:160] = pmod_btns[10];
  286. assign mailbox_btns_flat[191:176] = pmod_btns[11];
  287. assign mailbox_btns_flat[207:192] = pmod_btns[12];
  288. assign mailbox_btns_flat[223:208] = pmod_btns[13];
  289. assign mailbox_btns_flat[239:224] = pmod_btns[14];
  290. assign mailbox_btns_flat[255:240] = pmod_btns[15];*/
  291. reg [0:0] tick_1kHz, tick_100Hz;
  292. reg [15:0] cnt_1kHz;
  293. reg [4:0] cnt_100Hz;
  294. always @(posedge clk_24_75m or posedge rst) begin
  295. if(rst) begin
  296. tick_1kHz<=0;
  297. cnt_1kHz<=0;
  298. end else begin
  299. tick_1kHz<=0;
  300. tick_100Hz<=0;
  301. if (cnt_1kHz==0) begin
  302. tick_1kHz<=1;
  303. cnt_1kHz<=16'd24750;
  304. end else begin
  305. cnt_1kHz<=cnt_1kHz-1;
  306. end
  307. if(tick_1kHz) begin
  308. if(cnt_100Hz==0) begin
  309. cnt_100Hz<=9;
  310. tick_100Hz<=1;
  311. end else begin
  312. cnt_100Hz<=cnt_100Hz-1;
  313. end
  314. end
  315. end
  316. end
  317. assign led[0] = ~pmod_btns[0];
  318. button b1(
  319. .clk(clk_24_75m),
  320. .nrst(~rst),
  321. .debounce_tick(tick_1kHz),
  322. .cnt_tick(tick_100Hz),
  323. .butt(~pmod_btns[0]),
  324. .press_count(inc_f1)
  325. );
  326. button b2(
  327. .clk(clk_24_75m),
  328. .nrst(~rst),
  329. .debounce_tick(tick_1kHz),
  330. .cnt_tick(tick_100Hz),
  331. .butt(~pmod_btns[1]),
  332. .press_count(dec_f1)
  333. );
  334. button b3(
  335. .clk(clk_24_75m),
  336. .nrst(~rst),
  337. .debounce_tick(tick_1kHz),
  338. .cnt_tick(tick_100Hz),
  339. .butt(~pmod_btns[2]),
  340. .press_count(inc_d1)
  341. );
  342. button b4(
  343. .clk(clk_24_75m),
  344. .nrst(~rst),
  345. .debounce_tick(tick_1kHz),
  346. .cnt_tick(tick_100Hz),
  347. .butt(~pmod_btns[3]),
  348. .press_count(dec_d1)
  349. );
  350. button b5(
  351. .clk(clk_24_75m),
  352. .nrst(~rst),
  353. .debounce_tick(tick_1kHz),
  354. .cnt_tick(tick_100Hz),
  355. .butt(~pmod_btns[4]),
  356. .press_count(inc_d2)
  357. );
  358. button b6(
  359. .clk(clk_24_75m),
  360. .nrst(~rst),
  361. .debounce_tick(tick_1kHz),
  362. .cnt_tick(tick_100Hz),
  363. .butt(~pmod_btns[5]),
  364. .press_count(dec_d2)
  365. );
  366. button b7(
  367. .clk(clk_24_75m),
  368. .nrst(~rst),
  369. .debounce_tick(tick_1kHz),
  370. .cnt_tick(tick_100Hz),
  371. .butt(~pmod_btns[6]),
  372. .press_count(inc_ph2)
  373. );
  374. button b8(
  375. .clk(clk_24_75m),
  376. .nrst(~rst),
  377. .debounce_tick(tick_1kHz),
  378. .cnt_tick(tick_100Hz),
  379. .butt(~pmod_btns[7]),
  380. .press_count(dec_ph2)
  381. );
  382. button b9(
  383. .clk(clk_24_75m),
  384. .nrst(~rst),
  385. .debounce_tick(tick_1kHz),
  386. .cnt_tick(tick_100Hz),
  387. .butt(~pmod_btns[8]),
  388. .press_count(inc_f3)
  389. );
  390. button b10(
  391. .clk(clk_24_75m),
  392. .nrst(~rst),
  393. .debounce_tick(tick_1kHz),
  394. .cnt_tick(tick_100Hz),
  395. .butt(~pmod_btns[9]),
  396. .press_count(dec_f3)
  397. );
  398. button b11(
  399. .clk(clk_24_75m),
  400. .nrst(~rst),
  401. .debounce_tick(tick_1kHz),
  402. .cnt_tick(tick_100Hz),
  403. .butt(~pmod_btns[10]),
  404. .press_count(inc_d3)
  405. );
  406. button b12(
  407. .clk(clk_24_75m),
  408. .nrst(~rst),
  409. .debounce_tick(tick_1kHz),
  410. .cnt_tick(tick_100Hz),
  411. .butt(~pmod_btns[11]),
  412. .press_count(dec_d3)
  413. );
  414. button b13(
  415. .clk(clk_24_75m),
  416. .nrst(~rst),
  417. .debounce_tick(tick_1kHz),
  418. .cnt_tick(tick_100Hz),
  419. .butt(~pmod_btns[12]),
  420. .press_count(inc_ph3)
  421. );
  422. button b14(
  423. .clk(clk_24_75m),
  424. .nrst(~rst),
  425. .debounce_tick(tick_1kHz),
  426. .cnt_tick(tick_100Hz),
  427. .butt(~pmod_btns[13]),
  428. .press_count(dec_ph3)
  429. );
  430. button b15(
  431. .clk(clk_24_75m),
  432. .nrst(~rst),
  433. .debounce_tick(tick_1kHz),
  434. .cnt_tick(tick_100Hz),
  435. .butt(~pmod_btns[14]),
  436. .press_count(inc_n3)
  437. );
  438. button b16(
  439. .clk(clk_24_75m),
  440. .nrst(~rst),
  441. .debounce_tick(tick_1kHz),
  442. .cnt_tick(tick_100Hz),
  443. .butt(~pmod_btns[15]),
  444. .press_count(dec_n3)
  445. );
  446. // TODO: leaving until testing is done - btn pres will assert if RTL is
  447. // running still
  448. always @(posedge clk_24_75m or posedge rst)
  449. if (rst) begin
  450. led[3] = 1'b0;
  451. end else if (btn_2) begin
  452. led[3] = 1'b1;
  453. end else begin
  454. led[3] = 1'b0;
  455. end
  456. // Warm Boot
  457. // ---------
  458. // Bus interface
  459. always @(posedge clk_24_75m or posedge rst)
  460. if (rst) begin
  461. boot_now <= 1'b0;
  462. boot_sel <= 2'b00;
  463. end else if (wb_cyc[0] & wb_we & (wb_addr[2:0] == 3'b000)) begin
  464. boot_now <= wb_wdata[2];
  465. boot_sel <= wb_wdata[1:0];
  466. end
  467. assign wb_rdata[0] = 0;
  468. assign wb_ack[0] = wb_cyc[0];
  469. // Helper
  470. dfu_helper #(
  471. .TIMER_WIDTH(24),
  472. .BTN_MODE(3),
  473. .DFU_MODE(0)
  474. ) dfu_helper_I (
  475. .boot_now(boot_now),
  476. .boot_sel(boot_sel),
  477. .btn_pad(btn_n),
  478. .btn_val(),
  479. .rst_req(),
  480. .clk(clk_24_75m),
  481. .rst(rst)
  482. );
  483. // Clock / Reset
  484. // -------------
  485. `ifdef SIM
  486. reg clk_99m_s = 1'b0;
  487. reg clk_24_75m_s = 1'b0;
  488. reg rst_s = 1'b1;
  489. always #5 clk_99m_s <= !clk_99m_s;
  490. always #20 clk_24_75m_s <= !clk_24_75m_s;
  491. initial begin
  492. #200 rst_s = 0;
  493. end
  494. assign clk_99m = clk_99m_s;
  495. assign clk_24_75m = clk_24_75m_s;
  496. assign rst = rst_s;
  497. `else
  498. sysmgr sys_mgr_I (
  499. .clk_in(clk_in),
  500. .rst_in(1'b0),
  501. .clk_99m(clk_99m),
  502. .clk_24_75m(clk_24_75m),
  503. .rst_out(rst)
  504. );
  505. `endif
  506. endmodule // top