Krzysztof Skrzynecki 773483ddac faster clocks for synthesis (not changing actual freq) 1 hete
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data 773483ddac faster clocks for synthesis (not changing actual freq) 1 hete
fw a1e67cfd04 remove USB from deps 2 hete
rtl dc69ed9423 replace 3 signal with temporary and incomplete (but fast) version 1 hete
sim f560755b26 projects/riscv_usb: Add support for the user button 4 éve
Makefile a1e67cfd04 remove USB from deps 2 hete
README.md fd6a09e0c2 projects/riscv_usb: Fixup the README 1 éve

README.md

RISC-V + USB core demo

For the icebreaker, the hardware connections are :

  • P1B4: USB DP
  • P1B3: USB DN
  • P1B2: Pull up. Resistor of 1.5 kOhm to USB DP

To run :

  • Build and flash the bitstream

    • This will build fw/boot.hex and include it as the BRAM initial data
  • Flash the main application code in SPI at offset 1M

    • make -C fw prog
  • Connect to the iCEBreaker uart console (ttyUSB1) with a 1M baudrate

    • and then at the Command> prompt, press c for 'connect'. This will start the USB detection and device should enumerate