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riscv_usb
Jakub Duchniewicz b7d87eaa5a Fix bridging logic. Hangups are gone. Wrong offset in register map still persits. 2 minggu lalu
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data bc60e00b90 Port 3signal code and integrate to the top module. 3 minggu lalu
fw b7d87eaa5a Fix bridging logic. Hangups are gone. Wrong offset in register map still persits. 2 minggu lalu
rtl b7d87eaa5a Fix bridging logic. Hangups are gone. Wrong offset in register map still persits. 2 minggu lalu
sim f560755b26 projects/riscv_usb: Add support for the user button 4 tahun lalu
Makefile c44a5464d7 Add mailbox for RTL/SW communication. 3 minggu lalu
README.md fd6a09e0c2 projects/riscv_usb: Fixup the README 1 tahun lalu

README.md

RISC-V + USB core demo

For the icebreaker, the hardware connections are :

  • P1B4: USB DP
  • P1B3: USB DN
  • P1B2: Pull up. Resistor of 1.5 kOhm to USB DP

To run :

  • Build and flash the bitstream

    • This will build fw/boot.hex and include it as the BRAM initial data

  • Flash the main application code in SPI at offset 1M

    • make -C fw prog

  • Connect to the iCEBreaker uart console (ttyUSB1) with a 1M baudrate

    • and then at the Command> prompt, press c for 'connect'. This will start the USB detection and device should enumerate