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riscv_usb
Jakub Duchniewicz 506cdd9e8d Fix mailboxes to support overwrites and precedence over SW to RTL writes. Add more control code to SW. hace 7 horas
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data 773483ddac faster clocks for synthesis (not changing actual freq) hace 1 semana
fw 506cdd9e8d Fix mailboxes to support overwrites and precedence over SW to RTL writes. Add more control code to SW. hace 7 horas
rtl 506cdd9e8d Fix mailboxes to support overwrites and precedence over SW to RTL writes. Add more control code to SW. hace 7 horas
sim f560755b26 projects/riscv_usb: Add support for the user button hace 4 años
Makefile 827f19c8b2 Distinguish between two kinds of mailboxes RTL2SW and SW2RTL. hace 1 día
README.md fd6a09e0c2 projects/riscv_usb: Fixup the README hace 1 año

README.md

RISC-V + USB core demo

For the icebreaker, the hardware connections are :

  • P1B4: USB DP
  • P1B3: USB DN
  • P1B2: Pull up. Resistor of 1.5 kOhm to USB DP

To run :

  • Build and flash the bitstream

    • This will build fw/boot.hex and include it as the BRAM initial data

  • Flash the main application code in SPI at offset 1M

    • make -C fw prog

  • Connect to the iCEBreaker uart console (ttyUSB1) with a 1M baudrate

    • and then at the Command> prompt, press c for 'connect'. This will start the USB detection and device should enumerate